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More trailing whilespace removal

This commit is contained in:
Gregory Nutt 2014-04-13 16:22:22 -06:00
parent 3a1324741a
commit f8024cf409
1051 changed files with 3204 additions and 3207 deletions
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28
COPYING
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@ -11,14 +11,14 @@ NuttX
License for NuttX in general (authorship of individual files may vary):
/*************************************************************************
*
*
* Copyright (C) 2007-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* modification, are permitted provided that the following conditions
* are met:
*
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
@ -32,13 +32,13 @@ License for NuttX in general (authorship of individual files may vary):
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
@ -66,7 +66,7 @@ FAT Long File Names
o "U.S. Patent 6,286,013 (http://www.google.com/patents?vid=6286013) -
Method and system for providing a common name space for long and
short file names in an operating system. ...
"Many technical commentators have concluded that these patents only cover
FAT implementations that include support for long filenames, and that
removable solid state media and consumer devices only using short names
@ -74,7 +74,7 @@ FAT Long File Names
This Wikipedia entry has been updated with recent legal decisions in favor
of Microsoft. Refer to:
http://en.wikipedia.org/wiki/File_Allocation_Table#Legal_issues
So you have been forewarned: Use the long filename at your own risk!
@ -129,7 +129,7 @@ fs/nfs:
^^^^^^^
NFS:
Copyright (c) 1989, 1991, 1993, 1995 The Regents of the University of
California. All rights reserved.
@ -178,20 +178,20 @@ libc/string/lib_vikmemcpy.c
Permission is granted to anyone to use this software for any
purpose, including commercial applications, and to alter it and
redistribute it freely, subject to the following restrictions:
1. The origin of this software must not be misrepresented; you
must not claim that you wrote the original software. If you
use this software in a product, an acknowledgment in the
use this software in a product, an acknowledgment in the
product documentation would be appreciated but is not
required.
2. Altered source versions must be plainly marked as such, and
must not be misrepresented as being the original software.
3. This notice may not be removed or altered from any source
distribution.
libc/math
^^^^^^^^^
@ -202,11 +202,11 @@ libc/math
compatible MIT license:
Copyright (C) 2009-2011 Nick Johnson <nickbjohnson4224 at gmail.com>
Permission to use, copy, modify, and distribute this software for any
purpose with or without fee is hereby granted, provided that the above
copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR

26
Documentation/NXGraphicsSubsystem.html
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@ -326,7 +326,7 @@
<p>
NX is organized into 6 (and perhaps someday 7 or 8) logical modules.
These logical modules also correspond to the directory organization.
That NuttX directory organization is discussed in
That NuttX directory organization is discussed in
<a href="#grapicsdirs">Appendix B</a> of this document.
The logic modules are discussed in the following sub-paragraphs.
</p>
@ -622,7 +622,7 @@ void nxgl_rectunion(FAR struct nxgl_rect_s *dest,
</pre></ul>
<p>
<b>Description:</b>
Given two rectanges, <code>src1</code> and <code>src2</code>, return the larger rectangle that
Given two rectanges, <code>src1</code> and <code>src2</code>, return the larger rectangle that
contains both, <code>dest</code>.
</p>
@ -766,7 +766,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector, FAR struct nxgl_trapezoid_s
<b>Description:</b>
In the general case, a line with width can be represented as a parallelogram with a triangle at the top and bottom.
Triangles and parallelograms are both degenerate versions of a trapezoid.
This function breaks a wide line into triangles and trapezoids.
This function breaks a wide line into triangles and trapezoids.
This function also detects other degenerate cases:
</p>
<ol>
@ -801,7 +801,7 @@ int nxgl_splitline(FAR struct nxgl_vector_s *vector, FAR struct nxgl_trapezoid_s
</p>
<ul>
<p>
<code>0</code>: Line successfully broken up into three trapezoids.
<code>0</code>: Line successfully broken up into three trapezoids.
Values in <code>traps[0]</code>, <code>traps[1]</code>, and <code>traps[2]</code> are valid.
</p>
<p>
@ -1551,7 +1551,7 @@ int nx_setposition(NXWINDOW hwnd, FAR struct nxgl_point_s *pos);
<ul><dl>
<dt><code>hwnd</code>
<dd>The handle returned by <a href="#nxopenwindow"><code>nx_openwindow()</code></a>.
This handle must not have been created by
This handle must not have been created by
<a href="#nxrequestbkgd"><code>nx_requestbkgd()</code></a>.
<dt><code>pos</code>
<dd>The new position of the window
@ -1579,7 +1579,7 @@ int nx_setsize(NXWINDOW hwnd, FAR struct nxgl_size_s *size);
<ul><dl>
<dt><code>hwnd</code>
<dd>The handle returned by <a href="#nxopenwindow"><code>nx_openwindow()</code></a>.
This handle must not have been created by
This handle must not have been created by
<a href="#nxrequestbkgd"><code>nx_requestbkgd()</code></a>.
<dt><code>size</code>
<dd>The new size of the window (in pixels).
@ -1607,7 +1607,7 @@ int nx_raise(NXWINDOW hwnd);
<ul><dl>
<dt><code>hwnd</code>
<dd>The handle returned by <a href="#nxopenwindow"><code>nx_openwindow()</code></a>.
This handle must not have been created by
This handle must not have been created by
<a href="#nxrequestbkgd"><code>nx_requestbkgd()</code></a>.
<dt><code></code>
<dd>
@ -1635,7 +1635,7 @@ int nx_lower(NXWINDOW hwnd);
<ul><dl>
<dt><code>hwnd</code>
<dd>The handle returned by <a href="#nxopenwindow"><code>nx_openwindow()</code></a>.
This handle must not have been created by
This handle must not have been created by
<a href="#nxrequestbkgd"><code>nx_requestbkgd()</code></a>.
<dt><code></code>
<dd>
@ -3132,7 +3132,7 @@ int nxf_convert_32bpp(FAR uint32_t *dest, uint16_t height,
<p><b>Building <code>apps/examples/nx</code></b>.
Testing was performed using the Linux/Cygwin-based NuttX simulator.
Instructions are provided for building that simulation are provided in
Instructions are provided for building that simulation are provided in
<a href="#testcoverage">Appendix C</a> of this document.
</p>
@ -3299,7 +3299,7 @@ int nxf_convert_32bpp(FAR uint32_t *dest, uint16_t height,
<dd>Specify the colors of the border used with framed windows.
<dt><code>CONFIG_NXTK_BORDERCOLOR2</code>
<dd>The shadow side color and so is normally darker.
<dt><code>CONFIG_NXTK_BORDERCOLOR3</code>
<dt><code>CONFIG_NXTK_BORDERCOLOR3</code>
<dd>The shiny side color and so is normally brighter.
The default is medium, dark, and light grey, respectively
<dt><code>CONFIG_NXTK_AUTORAISE</code>:
@ -3426,7 +3426,7 @@ int nxf_convert_32bpp(FAR uint32_t *dest, uint16_t height,
<dt><code>CONFIG_NXCONSOLE_NXKBDIN</code>:
<dd>Take input from the NX keyboard input callback.
By default, keyboard input is taken from stdin (<code>/dev/console</code>).
If this option is set, then the interface<code>nxcon_kdbin()</code> is enabled.
If this option is set, then the interface<code>nxcon_kdbin()</code> is enabled.
That interface may be driven by window callback functions so that keyboard input <i>only</i> goes to the top window.
<dt><code>CONFIG__NXCONSOLE_KBDBUFSIZE</code>:
<dd>If <code>CONFIG_NXCONSOLE_NXKBDIN</code> is enabled, then this value may be used to
@ -3467,7 +3467,7 @@ int nxf_convert_32bpp(FAR uint32_t *dest, uint16_t height,
<p>
Locate a font in BDF format.
There are many good BDF bitmap fonts bundled with X-11.
See <a href="http://www.cl.cam.ac.uk/~mgk25/ucs-fonts.html">this link</a>, as an example,
See <a href="http://www.cl.cam.ac.uk/~mgk25/ucs-fonts.html">this link</a>, as an example,
</p>
</li>
<li>
@ -3703,7 +3703,7 @@ sudo ln -s libXext.so.6.4.0 libXext.so
This is because the sim target is based upon some assembly language setjmp/longjmp logic that only works on 32-bit systems.
</p>
<p><small>
<b>NOTE</b>: There is a workaround in this case:
<b>NOTE</b>: There is a workaround in this case:
You can build for 32-bit execution on a 64-bit machine by adding <code>-m3</code> to the <code>CFLAGS</code> and <code>-m32 -m elf_i386</code> to the <code>LDFLAGS</code>.
See the patch file <code>0001-Quick-hacks-to-build-sim-nsh-ostest-on-x86_64-as-32-.patch</code>
that can be found in NuttX <a href="http://tech.groups.yahoo.com/group/nuttx/files">files</a>.

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6
Documentation/NuttXBinfmt.html
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@ -107,7 +107,7 @@
<h2>2.1 <a name="binfmthdr">Binary Loader Header Files</a></h2>
<p>
The interface to the binary loader is described in the header file
The interface to the binary loader is described in the header file
<a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/include/nuttx/binfmt/binfmt.h">
<code>include/nuttx/binfmt/binfmt.h</code></a>.
A brief summary of the data structurs and interfaces prototyped in that header file are listed below.
@ -457,7 +457,7 @@ void exepath_release(EXEPATH_HANDLE handle);
<h2>3.1 <a name="symtabhdr">Symbol Table Header Files</a></h2>
<p>
The interface to the symbol table logic is described in the header file
The interface to the symbol table logic is described in the header file
<a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/include/nuttx/binfmt/symtab.h">
<code>include/nuttx/binfmt/symtab.h</code></a>.
A brief summary of the data structurs and interfaces prototyped in that header file are listed below.
@ -477,7 +477,7 @@ struct symtab_s
</pre></ul>
</p>
A symbol table is a fixed size array of <code>struct symtab_s</code>.
A symbol table is a fixed size array of <code>struct symtab_s</code>.
The information is intentionally minimal and supports only:
</p>
<ol>

6
Documentation/NuttXCCodingStandard.html
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@ -136,7 +136,7 @@
</p>
<ul>
<li>
A line that consists of the opening C comment (<code>/*</code>) followed by a series of asterisks extending to the length of the line (usually to column 78).
A line that consists of the opening C comment (<code>/*</code>) followed by a series of asterisks extending to the length of the line (usually to column 78).
</li>
<li>
The name of the grouping, starting at column 4.
@ -310,7 +310,7 @@
/* The forward link to the next instance of struct
* some_long_struct_name_s in a singly linked list
*/
struct some_long_struct_name_s *flink;
int short_name1; /* Short comment 1 */
int short_name2; /* This is a very long comment describing subtle
@ -2157,7 +2157,7 @@ x++;
{
ptr++;
}
</ul></pre></font>
</td></tr>
</table></center>

14
Documentation/NuttXDemandPaging.html
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@ -243,7 +243,7 @@
</li>
<li>
<b>Boost the page fill worker thread priority</b>.
Check the priority of the task at the head of the <code>g_waitingforfill</code> list.
Check the priority of the task at the head of the <code>g_waitingforfill</code> list.
If the priority of that task is higher than the current priority of the page fill worker thread, then boost the priority of the page fill worker thread to that priority.
Thus, the page fill worker thread will always run at the priority of the highest priority task that is waiting for a fill.
</li>
@ -370,7 +370,7 @@
The architecture-specific functions, <code>up_checkmapping()</code>, <code>up_allocpage(tcb, &vpage)</code> and <code>up_fillpage(page, pg_callback)</code>
will be prototyped in <code>include/nuttx/arch.h</code>
</p>
<a name="FillComplete"><h2>Fill Complete</h2></a>
<p>
@ -379,7 +379,7 @@
<p>
For the non-blocking <code>up_fillpage()</code>, the architecture-specific driver call the <code>pg_callback()</code> that was provided to <code>up_fillpage()</code> when the fill completes.
In this case, the <code>pg_callback()</code> will probably be called from driver interrupt-level logic.
The driver will provide the result of the fill as an argument to the callback function.
The driver will provide the result of the fill as an argument to the callback function.
NOTE: <code>pg_callback()</code> must also be <a href="#MemoryOrg">locked</a> in memory.
</p>
<p>
@ -404,7 +404,7 @@
</li>
</ul>
</p>
<a name="TaskResumption"><h2>Task Resumption</h2></a>
<p>
@ -600,7 +600,7 @@
<li>
In the first phase, create a partially linked objected containing all interrupt/exception handling logic, the page fill worker thread plus all parts of the IDLE thread (which must always be available for execution).
</li>
<li>
<li>
All of the <code>.text</code> and <code>.rodata</code> sections of this partial link should be collected into a single section.
</li>
<li>
@ -625,7 +625,7 @@
The currently executing task at the head of the ready to run list must be stopped.
Save its context and move it to the inactive list specified by task_state.
This function is called by the on-demand paging logic in order to block the task that requires the
page fill, and to
page fill, and to
</dd>
<dt>
<code>void up_unblock_task(FAR struct tcb_s *tcb);</code>
@ -671,4 +671,4 @@
</dl></ul>
</body>
</html>

10
Documentation/NuttXNxFlat.html
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@ -229,7 +229,7 @@
<li><b>Read-Only Data in RAM</b>
<ul>
<p>
With older GCC compilers (at least up to 4.3.3), read-only data must reside in RAM.
With older GCC compilers (at least up to 4.3.3), read-only data must reside in RAM.
In code generated by GCC, all data references are indexed by the PIC<sup>2</sup> base register (that is usually R10 or <i>sl</i> for the ARM processors).
The includes read-only data (<code>.rodata</code>).
Embedded firmware developers normally like to keep <code>.rodata</code> in FLASH with the code sections.
@ -304,7 +304,7 @@
<p>
In order to use NXFLAT, you must use special NXFLAT tools to create the binary module in FLASH.
To do this, you will need to download the buildroot package and build it on your Linux or Cygwin machine.
The buildroot can be downloaded from
The buildroot can be downloaded from
<a https://sourceforge.net/projects/nuttx/files/">Sourceforge</a>.
You will need version 0.1.7 or later.
</p>
@ -486,7 +486,7 @@ cat ../syscall/syscall.csv ../libc/lib.csv | sort >tmp.csv
<p><b>Target 1</b>.
This target links all of the module's object files together into one relocatable object.
Two relocatable objects will be generated; this is the first one (hence, the suffic <code>.r1</code>).
In this &quot;Hello, World!&quot; case, there is only a single object file, <code>hello.o</code>,
In this &quot;Hello, World!&quot; case, there is only a single object file, <code>hello.o</code>,
that is linked to produce the <code>hello.r1</code> object.
</p>
@ -553,7 +553,7 @@ cat ../syscall/syscall.csv ../libc/lib.csv | sort >tmp.csv
<p><b>Relevant Header Files:</b></p>
<ul>
<li>
The interface to the binary loader is described in the header file
The interface to the binary loader is described in the header file
<a href="http://sourceforge.net/p/nuttx/git/ci/master/tree/nuttx/include/nuttx/binfmt/binfmt.h">
<code>include/nuttx/binfmt/binfmt.h</code></a>.
A brief summary of the APIs prototyped in that header file are listed below.
@ -787,7 +787,7 @@ cat ../syscall/syscall.csv ../libc/lib.csv | sort >tmp.csv
The PIC base register needs to point to the base of the <code>.got</code> and only
addresses in the <code>.got</code>, <code>.data</code>, and <code>.bss</code>
sections can be accessed as an offset from the PIC base register.
See also this
See also this
<a href="http://xflat.cvs.sourceforge.net/viewvc/*checkout*/xflat/xflat/gcc/README?revision=1.1.1.1">XFLAT discussion</a>.
</p>
<p>

2
Documentation/NuttxPortingGuide.html
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@ -1620,7 +1620,7 @@ The system can be re-made subsequently by just typing <code>make</code>.
<p>
There is also a <code>arch/<architecture>/include/<chip>/chip.h</code> header file that can be used to communicate other microprocessor-specific information between the board logic and even application logic.
Application logic may, for example, need to know specific capabilities of the chip.
Prototypes in that <code>chip.h</code> header file should follow the microprocessor-specific naming convention.
Prototypes in that <code>chip.h</code> header file should follow the microprocessor-specific naming convention.
</p>
</li>
<li>

2
Documentation/UsbTrace.html
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@ -107,7 +107,7 @@
</p>
<ul>
<li>
For the USB serial and mass storage class, the 8-bit event data is provided in <code>include/nuttx/usb/usbdev_trace.h</code>.
For the USB serial and mass storage class, the 8-bit event data is provided in <code>include/nuttx/usb/usbdev_trace.h</code>.
</li>
<li>
For the USB device driver, that 8-bit event data is provided within the USB device driver itself.

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Makefile.unix
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@ -707,12 +707,12 @@ download: $(BIN)
# pass1dep: Create pass1 build dependencies
# pass2dep: Create pass2 build dependencies
pass1dep: context tools/mkdeps$(HOSTEXEEXT)
pass1dep: context tools/mkdeps$(HOSTEXEEXT)
$(Q) for dir in $(USERDEPDIRS) ; do \
$(MAKE) -C $$dir TOPDIR="$(TOPDIR)" depend ; \
done
pass2dep: context tools/mkdeps$(HOSTEXEEXT)
pass2dep: context tools/mkdeps$(HOSTEXEEXT)
$(Q) for dir in $(KERNDEPDIRS) ; do \
$(MAKE) -C $$dir TOPDIR="$(TOPDIR)" EXTRADEFINES=$(KDEFINE) depend; \
done

8
ReleaseNotes
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@ -5923,7 +5923,7 @@ Additional new features and extended functionality:
* TI Tiva TMC4C123G:
- Added architecture support for the TI Tiva TM4C123G parts. This was
merged into the existing support for the LM3S and LM4F families.
merged into the existing support for the LM3S and LM4F families.
All directory, file, and function references changed from lm to tiva.
* TI Tiva TMC4C123G Board Support:
@ -5949,7 +5949,7 @@ Additional new features and extended functionality:
* Documentation:
- Added a coding standards document. See
- Added a coding standards document. See
http://www.nuttx.org/doku.php?id=documentation:codingstandard
* Configuration/Build System:
@ -6013,7 +6013,7 @@ Bugfixes (see the ChangeLog for details). Some of these are very important:
- Fix one place where the connection reference count was not being
decremented in the socket close() logic. This is really a cosmetic
change BUT when CONFIG_DEBUG_NET is enabled, it will cause assertions.
- Backed out a small part of the NuttX 6.33 write buffering changed.
- Backed out a small part of the NuttX 6.33 write buffering changed.
David G says that this causes problems in connecting to a server.
- In DHCPD, there was a place where the logic was calling ntohl()
inappropriately; the address was already in the correct order. How
@ -6054,7 +6054,7 @@ Bugfixes (see the ChangeLog for details). Some of these are very important:
* Configuration/Build System:
- Several changes to restore the broken native Windows build
- Several changes to restore the broken native Windows build
* NuttShell (NSH):

4
TODO
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@ -1254,9 +1254,9 @@ o File system / Generic drivers (fs/, drivers/)
AtEsT.tXt
aTeSt.TxT
nsh> cat /tmp/aTeSt.TxT
Test2
Test2
nsh> cat /tmp/AtEsT.tXt
Test1
Test1
Status: Open
Priority: Low

2
arch/8051/include/irq.h
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@ -160,7 +160,7 @@ struct xcptcontext
uint8_t nbytes;
/* This is the saved stack. Space is allocated for the
/* This is the saved stack. Space is allocated for the
* entire 256 byte IRAM (minus register and bit usage at
* the beginning).
*/

4
arch/8051/include/limits.h
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@ -33,8 +33,8 @@
*
************************************************************/
#ifndef __ARCH_8051_INCLUDE_LIMITS_H
#define __ARCH_8051_INCLUDE_LIMITS_H
#ifndef __ARCH_8051_INCLUDE_LIMITS_H
#define __ARCH_8051_INCLUDE_LIMITS_H
/************************************************************
* Included Files

4
arch/8051/include/types.h
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@ -37,8 +37,8 @@
* only indirectly through sys/types.h
*/
#ifndef __ARCH_8051_INCLUDE_TYPES_H
#define __ARCH_8051_INCLUDE_TYPES_H
#ifndef __ARCH_8051_INCLUDE_TYPES_H
#define __ARCH_8051_INCLUDE_TYPES_H
/************************************************************************
* Included Files

2
arch/8051/src/Makefile.sdccl
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@ -200,7 +200,7 @@ up_mem.h: pass1.mem
libarch$(LIBEXT): up_mem.h $(OBJS)
$(call ARCHIVE, $@, $(OBJS))
# This builds the libboard library in the board/ subdirectory
# This builds the libboard library in the board/ subdirectory
board/libboard$(LIBEXT):
$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)

4
arch/8051/src/up_blocktask.c
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@ -131,7 +131,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
up_saveirqcontext(&tcb->xcp);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -152,7 +152,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
else if (!up_savecontext(&rtcb->xcp))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

4
arch/8051/src/up_head.S
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@ -178,7 +178,7 @@ _up_timer0:
push ie
clr ea
/* Save the remaining registers with interrupts disabled
/* Save the remaining registers with interrupts disabled
*
* a, ie, and dptr go on the stack.
*/
@ -232,7 +232,7 @@ _up_interrupt:
push ie
clr ea
/* Save the remaining registers with interrupts disabled
/* Save the remaining registers with interrupts disabled
*
* a, ie, and dptr go on the stack.
*/

2
arch/8051/src/up_initialize.c
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@ -86,7 +86,7 @@ FAR struct xcptcontext *g_irqcontext;
* to comput them.
*/
const uint8_t g_ntobit[8] =
const uint8_t g_ntobit[8] =
{ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
/************************************************************************

2
arch/8051/src/up_irqtest.c
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@ -72,7 +72,7 @@ bool g_irqtest;
volatile uint8_t g_irqtos;
uint8_t g_irqregs[REGS_SIZE];
int g_nirqs;
FAR struct xcptcontext *g_irqcontext;
FAR struct xcptcontext *g_irqcontext;
/************************************************************************
* Private Functions

2
arch/8051/src/up_putc.c
View File

@ -76,6 +76,6 @@ int up_putc(int ch)
{
_up_putc('\r');
}
return ch;
return ch;
}

6
arch/8051/src/up_releasepending.c
View File

@ -98,7 +98,7 @@ void up_release_pending(void)
up_saveirqcontext(&rtcb->xcp);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -114,13 +114,13 @@ void up_release_pending(void)
/* Copy the exception context into the TCB of the task that
* was currently active. if up_savecontext returns a non-zero
* value, then this is really the previously running task
* value, then this is really the previously running task
* restarting!
*/
else if (!up_savecontext(&rtcb->xcp))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

6
arch/8051/src/up_reprioritizertr.c
View File

@ -70,7 +70,7 @@
*
* Description:
* Called when the priority of a running or
* ready-to-run task changes and the reprioritization will
* ready-to-run task changes and the reprioritization will
* cause a context switch. Two cases:
*
* 1) The priority of the currently running task drops and the next
@ -153,7 +153,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
up_saveirqcontext(&tcb->xcp);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -174,7 +174,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
else if (!up_savecontext(&rtcb->xcp))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/8051/src/up_restorecontext.c
View File

@ -276,7 +276,7 @@ void up_restorecontext(FAR struct xcptcontext *context) __naked
/* Restore registers from the new stack */
pop dph
pop dpl
pop dpl
/* Restore the interrupt state per the stored IE value */

6
arch/8051/src/up_unblocktask.c
View File

@ -112,7 +112,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
/* The currently active task has changed! We need to do
* a context switch to the new task.
*
* Are we in an interrupt handler?
* Are we in an interrupt handler?
*/
if (g_irqtos)
@ -123,7 +123,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
up_saveirqcontext(&rtcb->xcp);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -138,7 +138,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
}
/* We are not in an interrupt andler. Copy the user C context
* into the TCB of the task that was previously active. if
* into the TCB of the task that was previously active. if
* up_savecontext returns a non-zero value, then this is really the
* previously running task restarting!
*/

4
arch/README.txt
View File

@ -171,7 +171,7 @@ arch/arm - ARM-based micro-controllers
is complete on the basic port (timer, serial console, SPI).
arch/arm/include/lm and arch/arm/src/lm
These directories contain support for the Luminary LM3S/4F family. The
These directories contain support for the Luminary LM3S/4F family. The
initial, release of this port was included in NuttX version 0.4.6. The
current port includes timer, serial console, Ethernet, SSI, and microSD
support. There are working configurations the NuttX OS test, to run the
@ -211,7 +211,7 @@ arch/arm - ARM-based micro-controllers
STATUS: The basic AT91SAM3U port was released in NuttX version 5.1.
The basic port includes boot-up logic, interrupt driven serial
console, and system timer interrupts. That release passes the
NuttX OS test and is proven to have a valid OS implementation. A
NuttX OS test and is proven to have a valid OS implementation. A
onfiguration to support the NuttShell is also included.
arch/arm/include/stm32 and arch/arm/src/stm32

2
arch/arm/include/a1x/a10_irq.h
View File

@ -48,7 +48,7 @@
* Pre-Processor Definitions
****************************************************************************************/
/* External interrupts numbers */
/* External interrupts numbers */
#define A1X_IRQ_NMI 0 /* External Non-Mask Interrupt */
# define A1X_IRQ_POWER 0 /* Power module */

2
arch/arm/include/armv7-a/irq.h
View File

@ -60,7 +60,7 @@
* (1) stmia rx, {r0-r14}
* (2) then the PC and CPSR
*
* This results in the following set of indices that can be used to access
* This results in the following set of indices that can be used to access
* individual registers in the xcp.regs array:
*/

2
arch/arm/include/armv7-m/irq_cmnvector.h
View File

@ -70,7 +70,7 @@
#ifdef CONFIG_ARCH_FPU
/* If the MCU supports a floating point unit, then it will be necessary
* to save the state of the non-volatile registers before calling code
* to save the state of the non-volatile registers before calling code
* that may save and overwrite them.
*/

2
arch/arm/include/elf.h
View File

@ -64,7 +64,7 @@
#define EF_ARM_EABI_VER4 0x04000000
#define EF_ARM_EABI_VER5 0x05000000
#define EF_ARM_BE8 0x00800000
#define EF_ARM_BE8 0x00800000
/* Table 4-4, Processor specific section types */

2
arch/arm/include/lpc2378/irq.h
View File

@ -56,7 +56,7 @@
/****************************************************************************
* Definitions
****************************************************************************/
/* LPC2378 Interrupts */
#define WDT_IRQ 0 /* Watchdog */

2
arch/arm/include/lpc43xx/irq.h
View File

@ -51,7 +51,7 @@
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to bits in
* the NVIC. This does, however, waste several words of memory in the IRQ to handle mapping
* tables.

2
arch/arm/include/nuc1xx/nuc120_irq.h
View File

@ -82,7 +82,7 @@
#define NUC_IRQ_ADC (45) /* ADC */
/* 46: Reserved */
#define NUC_IRQ_RTC (47) /* Real time clock */
#define NR_IRQS (48)
/************************************************************************************

2
arch/arm/include/sama5/chip.h
View File

@ -46,7 +46,7 @@
* Pre-processor Definitions
****************************************************************************************************/
/* SAMA5D3 Family
*
*
* ATSAMA5D31 ATSAMA5D33 ATSAMA5D34 ATSAMA5D35 ATSAMA5D36
* ------------------------- ------------- ------------- ------------- ------------- -------------
* Pin Count 324 324 324 324 324

2
arch/arm/src/a1x/a1x_pio.c
View File

@ -113,7 +113,7 @@ static int a1x_pio_interrupt(int irq, void *context)
int irq;
/* Read the set of pending GPIO interrupts */
status = getreg32(A1X_PIO_INT_STA);
mask = getreg32(A1X_PIO_INT_CTL);
pending = status & mask;

2
arch/arm/src/a1x/a1x_timerisr.c
View File

@ -120,7 +120,7 @@ void up_timerinit(void)
uint32_t regval;
/* Set the timer reload interval value */
putreg32(TMR_INTERVAL, A1X_TMR0_INTV_VALUE);
/* Configure timer 0:

2
arch/arm/src/arm/arm.h
View File

@ -332,7 +332,7 @@ static inline unsigned int get_cp15c3(void)
* ARM926EJ-S operation: Invalidate set-associative
* Data: Should be zero
*/
static inline void tlb_invalidate(void)
{
unsigned int sbz = 0;

12
arch/arm/src/arm/pg_macros.h
View File

@ -183,7 +183,7 @@
* larger than the size of the physical paged region. That is the
* core of what the On-Demanding Paging feature provides.
*/
#define PG_L1_PAGED_PADDR (PGTABLE_BASE_PADDR + ((PG_PAGED_VBASE >> 20) << 2))
#define PG_L1_PAGED_VADDR (PGTABLE_BASE_VADDR + ((PG_PAGED_VBASE >> 20) << 2))
@ -261,10 +261,10 @@
/* Case 2: Vectors are in low memory and the locked text region starts at
* the beginning of SRAM (which will be aliased to address 0x00000000).
* However, the beginning of SRAM may not be aligned to the beginning
* of the L2 page table (because the beginning of RAM is offset into
* of the L2 page table (because the beginning of RAM is offset into
* the table.
*/
#elif defined(CONFIG_ARCH_LOWVECTORS) && !defined(CONFIG_PAGING_LOCKED_PBASE)
# define PG_VECT_PBASE PG_LOCKED_PBASE
# define PG_L2_VECT_OFFSET (((PG_LOCKED_VBASE & 0x000fffff) >> PAGESHIFT) << 2)
@ -327,7 +327,7 @@
* text region (the address at the beginning of
* the page).
* PG_POOL_MAXL2NDX - This is the maximum value+1 of such an index.
*
*
* PG_POOL_PGPADDR(ndx) - Converts an page index into the corresponding
* (physical) address of the backing page memory.
* PG_POOL_PGVADDR(ndx) - Converts an page index into the corresponding
@ -340,7 +340,7 @@
* written.
*/
#define PG_POOL_VA2L1OFFSET(va) (((va) >> 20) << 2)
#define PG_POOL_VA2L1OFFSET(va) (((va) >> 20) << 2)
#define PG_POOL_VA2L1VADDR(va) (PGTABLE_BASE_VADDR + PG_POOL_VA2L1OFFSET(va))
#define PG_POOL_L12PPTABLE(L1) ((L1) & PG_L1_PADDRMASK)
#define PG_POOL_L12VPTABLE(L1) (PG_POOL_L12PPTABLE(L1) - PGTABLE_BASE_PADDR + PGTABLE_BASE_VADDR)
@ -442,7 +442,7 @@
* follows:
*
* ldr r0, =PG_L1_PGTABLE_PADDR <-- Address in the L1 table
* ldr r1, =PG_L2_PGTABLE_PADDR <-- Physical address of L2 page table
* ldr r1, =PG_L2_PGTABLE_PADDR <-- Physical address of L2 page table
* ldr r2, =PG_PGTABLE_NPAGES <-- Total number of pages
* ldr r3, =PG_PGTABLE_NPAGE1 <-- Number of pages in the first PTE
* ldr r4, =MMU_L1_PGTABFLAGS <-- L1 MMU flags

8
arch/arm/src/arm/up_allocpage.c
View File

@ -171,7 +171,7 @@ int up_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
uintptr_t paddr;
uint32_t *pte;
unsigned int pgndx;
/* Since interrupts are disabled, we don't need to anything special. */
DEBUGASSERT(tcb && vpage);
@ -199,7 +199,7 @@ int up_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
if (g_pgwrap)
{
/* Yes.. Get a pointer to the L2 entry corresponding to the previous
* mapping -- then zero it!
* mapping -- then zero it!
*/
uintptr_t oldvaddr = PG_POOL_NDX2VA(g_ptemap[pgndx]);
@ -214,7 +214,7 @@ int up_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
* case: The I-Cache uses a virtual address index and, hence, since the
* NuttX address space is flat, the cached instruction value should be
* correct even if the page mapping is no longer in place.
*/
*/
}
/* Then convert the index to a (physical) page address. */
@ -231,7 +231,7 @@ int up_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
*pte = (paddr | MMU_L2_ALLOCFLAGS);
/* And save the new L1 index */
g_ptemap[pgndx] = PG_POOL_VA2L2NDX(vaddr);
/* Finally, return the virtual address of allocated page */

4
arch/arm/src/arm/up_blocktask.c
View File

@ -130,7 +130,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -148,7 +148,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/arm/up_cache.S
View File

@ -88,7 +88,7 @@
* Wait for interrupt SBZ MCR p15, 0, <Rd>, c7, c0, 4
*/
/* Esure coherency between the Icache and the Dcache in the region described
/* Esure coherency between the Icache and the Dcache in the region described
* by r0=start and r1=end. Cleans the corresponding D-cache lines and invalidates
* the corresponding I-Cache lines.
*/

4
arch/arm/src/arm/up_dataabort.c
View File

@ -56,7 +56,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Output debug info if stack dump is selected -- even if
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/
@ -139,7 +139,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
* the exception occurred, this address was provided in the FAR register.
* (It has not yet been saved in the register context save area).
*/
pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
if (far < PG_PAGED_VBASE || far >= PG_PAGED_VEND)
{

2
arch/arm/src/arm/up_prefetchabort.c
View File

@ -56,7 +56,7 @@
/* Debug ********************************************************************/
/* Output debug info if stack dump is selected -- even if
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/

6
arch/arm/src/arm/up_releasepending.c
View File

@ -97,7 +97,7 @@ void up_release_pending(void)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -111,13 +111,13 @@ void up_release_pending(void)
/* Copy the exception context into the TCB of the task that
* was currently active. if up_saveusercontext returns a non-zero
* value, then this is really the previously running task
* value, then this is really the previously running task
* restarting!
*/
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

6
arch/arm/src/arm/up_reprioritizertr.c
View File

@ -69,7 +69,7 @@
*
* Description:
* Called when the priority of a running or
* ready-to-run task changes and the reprioritization will
* ready-to-run task changes and the reprioritization will
* cause a context switch. Two cases:
*
* 1) The priority of the currently running task drops and the next
@ -152,7 +152,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -171,7 +171,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/arm/up_syscall.c
View File

@ -50,7 +50,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Output debug info if stack dump is selected -- even if
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/

6
arch/arm/src/arm/up_unblocktask.c
View File

@ -109,7 +109,7 @@ void up_unblock_task(struct tcb_s *tcb)
/* The currently active task has changed! We need to do
* a context switch to the new task.
*
* Are we in an interrupt handler?
* Are we in an interrupt handler?
*/
if (current_regs)
@ -120,7 +120,7 @@ void up_unblock_task(struct tcb_s *tcb)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -132,7 +132,7 @@ void up_unblock_task(struct tcb_s *tcb)
}
/* We are not in an interrupt handler. Copy the user C context
* into the TCB of the task that was previously active. if
* into the TCB of the task that was previously active. if
* up_saveusercontext returns a non-zero value, then this is really the
* previously running task restarting!
*/

2
arch/arm/src/arm/up_undefinedinsn.c
View File

@ -48,7 +48,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Output debug info if stack dump is selected -- even if
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/

2
arch/arm/src/arm/up_vectors.S
View File

@ -156,7 +156,7 @@ up_vectorirq:
/************************************************************************************
* Function: up_vectorswi
*
*
* Description:
* SWI interrupt. We enter the SWI in SVC mode.
*

4
arch/arm/src/arm/vfork.S
View File

@ -64,7 +64,7 @@
* undefined if the process created by vfork() either modifies any data other than
* a variable of type pid_t used to store the return value from vfork(), or returns
* from the function in which vfork() was called, or calls any other function before
* successfully calling _exit() or one of the exec family of functions.
* successfully calling _exit() or one of the exec family of functions.
*
* This thin layer implements vfork by simply calling up_vfork() with the vfork()
* context as an argument. The overall sequence is:
@ -93,7 +93,7 @@
* Upon successful completion, vfork() returns 0 to the child process and returns
* the process ID of the child process to the parent process. Otherwise, -1 is
* returned to the parent, no child process is created, and errno is set to
* indicate the error.
* indicate the error.
*
************************************************************************************/

2
arch/arm/src/armv6-m/nvic.h
View File

@ -368,7 +368,7 @@
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
extern "C"
{
#else
#define EXTERN extern

2
arch/arm/src/armv6-m/up_blocktask.c
View File

@ -129,7 +129,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/armv6-m/up_elf.c
View File

@ -296,7 +296,7 @@ int arch_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
S = (offset >> 24) & 1;
J1 = S ^ (~(offset >> 23) & 1);
J2 = S ^ (~(offset >> 22) & 1);
upper_insn = ((upper_insn & 0xf800) | (S << 10) | ((offset >> 12) & 0x03ff));
*(uint16_t*)addr = (uint16_t)upper_insn;

2
arch/arm/src/armv6-m/up_initialstate.c
View File

@ -96,7 +96,7 @@ void up_initial_state(struct tcb_s *tcb)
/* Save the task entry point (stripping off the thumb bit) */
xcp->regs[REG_PC] = (uint32_t)tcb->start & ~1;
/* Specify thumb mode */
xcp->regs[REG_XPSR] = ARMV6M_XPSR_T;

2
arch/arm/src/armv6-m/up_releasepending.c
View File

@ -96,7 +96,7 @@ void up_release_pending(void)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

4
arch/arm/src/armv6-m/up_reprioritizertr.c
View File

@ -69,7 +69,7 @@
*
* Description:
* Called when the priority of a running or
* ready-to-run task changes and the reprioritization will
* ready-to-run task changes and the reprioritization will
* cause a context switch. Two cases:
*
* 1) The priority of the currently running task drops and the next
@ -153,7 +153,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/armv6-m/up_systemreset.c
View File

@ -68,7 +68,7 @@ void up_systemreset(void)
regval = ((0x5fa << SYSCON_AIRCR_VECTKEY_SHIFT) | SYSCON_AIRCR_SYSRESETREQ);
putreg32(regval, ARMV6M_SYSCON_AIRCR);
/* Ensure completion of memory accesses */
/* Ensure completion of memory accesses */
__asm volatile ("dsb");

4
arch/arm/src/armv6-m/up_unblocktask.c
View File

@ -108,7 +108,7 @@ void up_unblock_task(struct tcb_s *tcb)
/* The currently active task has changed! We need to do
* a context switch to the new task.
*
* Are we in an interrupt handler?
* Are we in an interrupt handler?
*/
if (current_regs)
@ -119,7 +119,7 @@ void up_unblock_task(struct tcb_s *tcb)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/armv6-m/up_vectors.c
View File

@ -84,7 +84,7 @@ extern char _ebss;
* Note that the [ ... ] desginated initialiser is a GCC extension.
*/
unsigned _vectors[] __attribute__((section(".vectors"))) =
unsigned _vectors[] __attribute__((section(".vectors"))) =
{
/* Initial stack */

4
arch/arm/src/armv6-m/vfork.S
View File

@ -65,7 +65,7 @@
* undefined if the process created by vfork() either modifies any data other than
* a variable of type pid_t used to store the return value from vfork(), or returns
* from the function in which vfork() was called, or calls any other function before
* successfully calling _exit() or one of the exec family of functions.
* successfully calling _exit() or one of the exec family of functions.
*
* This thin layer implements vfork by simply calling up_vfork() with the vfork()
* context as an argument. The overall sequence is:
@ -94,7 +94,7 @@
* Upon successful completion, vfork() returns 0 to the child process and returns
* the process ID of the child process to the parent process. Otherwise, -1 is
* returned to the parent, no child process is created, and errno is set to
* indicate the error.
* indicate the error.
*
************************************************************************************/

8
arch/arm/src/armv7-a/arm_allocpage.c
View File

@ -171,7 +171,7 @@ int arm_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
uintptr_t paddr;
uint32_t *pte;
unsigned int pgndx;
/* Since interrupts are disabled, we don't need to anything special. */
DEBUGASSERT(tcb && vpage);
@ -199,7 +199,7 @@ int arm_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
if (g_pgwrap)
{
/* Yes.. Get a pointer to the L2 entry corresponding to the previous
* mapping -- then zero it!
* mapping -- then zero it!
*/
uintptr_t oldvaddr = PG_POOL_NDX2VA(g_ptemap[pgndx]);
@ -214,7 +214,7 @@ int arm_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
* case: The I-Cache uses a virtual address index and, hence, since the
* NuttX address space is flat, the cached instruction value should be
* correct even if the page mapping is no longer in place.
*/
*/
}
/* Then convert the index to a (physical) page address. */
@ -231,7 +231,7 @@ int arm_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
*pte = (paddr | MMU_L2_ALLOCFLAGS);
/* And save the new L1 index */
g_ptemap[pgndx] = PG_POOL_VA2L2NDX(vaddr);
/* Finally, return the virtual address of allocated page */

4
arch/arm/src/armv7-a/arm_blocktask.c
View File

@ -130,7 +130,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -148,7 +148,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

4
arch/arm/src/armv7-a/arm_dataabort.c
View File

@ -56,7 +56,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Output debug info if stack dump is selected -- even if
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/
@ -136,7 +136,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
* the exception occurred, this address was provided in the DFAR register.
* (It has not yet been saved in the register context save area).
*/
pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
if (dfar < PG_PAGED_VBASE || dfar >= PG_PAGED_VEND)
{

2
arch/arm/src/armv7-a/arm_prefetchabort.c
View File

@ -56,7 +56,7 @@
/* Debug ********************************************************************/
/* Output debug info if stack dump is selected -- even if
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/

6
arch/arm/src/armv7-a/arm_releasepending.c
View File

@ -97,7 +97,7 @@ void up_release_pending(void)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -111,13 +111,13 @@ void up_release_pending(void)
/* Copy the exception context into the TCB of the task that
* was currently active. if up_saveusercontext returns a non-zero
* value, then this is really the previously running task
* value, then this is really the previously running task
* restarting!
*/
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

6
arch/arm/src/armv7-a/arm_reprioritizertr.c
View File

@ -69,7 +69,7 @@
*
* Description:
* Called when the priority of a running or
* ready-to-run task changes and the reprioritization will
* ready-to-run task changes and the reprioritization will
* cause a context switch. Two cases:
*
* 1) The priority of the currently running task drops and the next
@ -152,7 +152,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -171,7 +171,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
else if (!up_saveusercontext(rtcb->xcp.regs))
{
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/armv7-a/arm_syscall.c
View File

@ -50,7 +50,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Output debug info if stack dump is selected -- even if
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/

6
arch/arm/src/armv7-a/arm_unblocktask.c
View File

@ -109,7 +109,7 @@ void up_unblock_task(struct tcb_s *tcb)
/* The currently active task has changed! We need to do
* a context switch to the new task.
*
* Are we in an interrupt handler?
* Are we in an interrupt handler?
*/
if (current_regs)
@ -120,7 +120,7 @@ void up_unblock_task(struct tcb_s *tcb)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/
@ -132,7 +132,7 @@ void up_unblock_task(struct tcb_s *tcb)
}
/* We are not in an interrupt handler. Copy the user C context
* into the TCB of the task that was previously active. if
* into the TCB of the task that was previously active. if
* up_saveusercontext returns a non-zero value, then this is really the
* previously running task restarting!
*/

2
arch/arm/src/armv7-a/arm_undefinedinsn.c
View File

@ -48,7 +48,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Output debug info if stack dump is selected -- even if
/* Output debug info if stack dump is selected -- even if
* debug is not selected.
*/

4
arch/arm/src/armv7-a/arm_vfork.S
View File

@ -66,7 +66,7 @@
* any data other than a variable of type pid_t used to store the return
* value from vfork(), or returns from the function in which vfork() was
* called, or calls any other function before successfully calling _exit()
* or one of the exec family of functions.
* or one of the exec family of functions.
*
* This thin layer implements vfork by simply calling up_vfork() with the
* vfork() context as an argument. The overall sequence is:
@ -95,7 +95,7 @@
* Upon successful completion, vfork() returns 0 to the child process and
* returns the process ID of the child process to the parent process.
* Otherwise, -1 is returned to the parent, no child process is created,
* and errno is set to indicate the error.
* and errno is set to indicate the error.
*
****************************************************************************/

2
arch/arm/src/armv7-a/sctlr.h
View File

@ -256,7 +256,7 @@
nop
.endm
#endif /* __ASSEMBLY__ */
/************************************************************************************
* Inline Functions
************************************************************************************/

18
arch/arm/src/armv7-m/exc_return.h
View File

@ -50,10 +50,10 @@
* exception mechanism relies on this value to detect when the processor has
* completed an exception handler.
*
* Bits [31:28] of an EXC_RETURN value are always 1. When the processor loads a
* value matching this pattern to the PC it detects that the operation is a not
* a normal branch operation and instead, that the exception is complete.
* Therefore, it starts the exception return sequence.
* Bits [31:28] of an EXC_RETURN value are always 1. When the processor loads a
* value matching this pattern to the PC it detects that the operation is a not
* a normal branch operation and instead, that the exception is complete.
* Therefore, it starts the exception return sequence.
*
* Bits[4:0] of the EXC_RETURN value indicate the required return stack and eventual
* processor mode. The remaining bits of the EXC_RETURN value should be set to 1.
@ -64,23 +64,23 @@
#define EXC_RETURN_BASE 0xffffffe1
/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the hardware
* context using the process stack pointer (if not set, the context was saved
* context using the process stack pointer (if not set, the context was saved
* using the main stack pointer)
*/
#define EXC_RETURN_PROCESS_STACK (1 << 2)
/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not set,
* return stays in handler mode)
*/
#define EXC_RETURN_THREAD_MODE (1 << 3)
/* EXC_RETURN_STD_CONTEXT: The state saved on the stack does not include the
/* EXC_RETURN_STD_CONTEXT: The state saved on the stack does not include the
* volatile FP registers and FPSCR. If this bit is clear, the state does include
* these registers.
*/
#define EXC_RETURN_STD_CONTEXT (1 << 4)
/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state from

6
arch/arm/src/armv7-m/mpu.h
View File

@ -79,19 +79,19 @@
/* MPU Region Number Register Bit Definitions */
#define MPU_RNR_MASK (0xff)
#define MPU_RNR_MASK (0xff)
/* MPU Region Base Address Register Bit Definitions */
#define MPU_RBAR_REGION_SHIFT (0) /* Bits 0-3: MPU region */
#define MPU_RBAR_REGION_MASK (15 << MPU_RBAR_REGION_SHIFT)
#define MPU_RBAR_VALID (1 << 4) /* Bit 4: MPU Region Number valid */
#define MPU_RBAR_VALID (1 << 4) /* Bit 4: MPU Region Number valid */
#define MPU_RBAR_ADDR_MASK 0xffffffe0 /* Bits N-31: Region base addrese */
/* MPU Region Attributes and Size Register Bit Definitions */
#define MPU_RASR_ENABLE (1 << 0) /* Bit 0: Region enable */
#define MPU_RASR_SIZE_SHIFT (1) /* Bits 1-5: Size of the MPU protection region */
#define MPU_RASR_SIZE_SHIFT (1) /* Bits 1-5: Size of the MPU protection region */
#define MPU_RASR_SIZE_MASK (31 << MPU_RASR_SIZE_SHIFT)
# define MPU_RASR_SIZE_LOG2(n) ((n-1) << MPU_RASR_SIZE_SHIFT)
#define MPU_RASR_SRD_SHIFT (8) /* Bits 8-15: Subregion disable */

2
arch/arm/src/armv7-m/up_blocktask.c
View File

@ -130,7 +130,7 @@ void up_block_task(struct tcb_s *tcb, tstate_t task_state)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/armv7-m/up_elf.c
View File

@ -296,7 +296,7 @@ int arch_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
S = (offset >> 24) & 1;
J1 = S ^ (~(offset >> 23) & 1);
J2 = S ^ (~(offset >> 22) & 1);
upper_insn = ((upper_insn & 0xf800) | (S << 10) | ((offset >> 12) & 0x03ff));
*(uint16_t*)addr = (uint16_t)upper_insn;

4
arch/arm/src/armv7-m/up_fpu.S
View File

@ -83,7 +83,7 @@
*
* Returned Value:
* None
*
*
************************************************************************************/
.thumb_func
@ -189,7 +189,7 @@ up_savefpu:
* Returned Value:
* This function does not return anything explicitly. However, it is called from
* interrupt level assembly logic that assumes that r0 is preserved.
*
*
************************************************************************************/
.thumb_func

4
arch/arm/src/armv7-m/up_mpu.c
View File

@ -67,7 +67,7 @@
* all subregions are available (0x00).
*/
static const uint8_t g_ms_regionmask[9] =
static const uint8_t g_ms_regionmask[9] =
{
0xff, 0xfe, 0xfc, 0xf8, 0xf0, 0xe0, 0xc0, 0x80, 0x00
};
@ -77,7 +77,7 @@ static const uint8_t g_ms_regionmask[9] =
* and 8 means all subregions must be disabled (0xff).
*/
static const uint8_t g_ls_regionmask[9] =
static const uint8_t g_ls_regionmask[9] =
{
0x00, 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff
};

2
arch/arm/src/armv7-m/up_releasepending.c
View File

@ -96,7 +96,7 @@ void up_release_pending(void)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

4
arch/arm/src/armv7-m/up_reprioritizertr.c
View File

@ -69,7 +69,7 @@
*
* Description:
* Called when the priority of a running or
* ready-to-run task changes and the reprioritization will
* ready-to-run task changes and the reprioritization will
* cause a context switch. Two cases:
*
* 1) The priority of the currently running task drops and the next
@ -153,7 +153,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/armv7-m/up_systemreset.c
View File

@ -69,7 +69,7 @@ void up_systemreset(void)
regval |= ((0x5fa << NVIC_AIRCR_VECTKEY_SHIFT) | NVIC_AIRCR_SYSRESETREQ);
putreg32(regval, NVIC_AIRCR);
/* Ensure completion of memory accesses */
/* Ensure completion of memory accesses */
__asm volatile ("dsb");

4
arch/arm/src/armv7-m/up_unblocktask.c
View File

@ -109,7 +109,7 @@ void up_unblock_task(struct tcb_s *tcb)
/* The currently active task has changed! We need to do
* a context switch to the new task.
*
* Are we in an interrupt handler?
* Are we in an interrupt handler?
*/
if (current_regs)
@ -120,7 +120,7 @@ void up_unblock_task(struct tcb_s *tcb)
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
/* Restore the exception context of the rtcb at the (new) head
* of the g_readytorun task list.
*/

2
arch/arm/src/armv7-m/up_vectors.c
View File

@ -79,7 +79,7 @@ extern char _ebss;
* Note that the [ ... ] designated initialiser is a GCC extension.
*/
unsigned _vectors[] __attribute__((section(".vectors"))) =
unsigned _vectors[] __attribute__((section(".vectors"))) =
{
/* Initial stack */

4
arch/arm/src/armv7-m/vfork.S
View File

@ -66,7 +66,7 @@
* undefined if the process created by vfork() either modifies any data other than
* a variable of type pid_t used to store the return value from vfork(), or returns
* from the function in which vfork() was called, or calls any other function before
* successfully calling _exit() or one of the exec family of functions.
* successfully calling _exit() or one of the exec family of functions.
*
* This thin layer implements vfork by simply calling up_vfork() with the vfork()
* context as an argument. The overall sequence is:
@ -95,7 +95,7 @@
* Upon successful completion, vfork() returns 0 to the child process and returns
* the process ID of the child process to the parent process. Otherwise, -1 is
* returned to the parent, no child process is created, and errno is set to
* indicate the error.
* indicate the error.
*
************************************************************************************/

38
arch/arm/src/c5471/c5471_ethernet.c
View File

@ -413,7 +413,7 @@ static inline void c5471_dumpbuffer(const char *msg, const uint8_t *buffer, unsi
/* CONFIG_DEBUG, CONFIG_DEBUG_VERBOSE, and CONFIG_DEBUG_NET have to be
* defined or the following does nothing.
*/
nvdbgdumpbuffer(msg, buffer, nbytes);
}
#else
@ -723,7 +723,7 @@ static int c5471_phyinit (void)
/* Next, request a chip reset */
c5471_mdwrite(0, MD_PHY_CONTROL_REG, 0x8000);
c5471_mdwrite(0, MD_PHY_CONTROL_REG, 0x8000);
while (c5471_mdread(0, MD_PHY_CONTROL_REG) & 0x8000)
{
/* wait for chip reset to complete */
@ -743,15 +743,15 @@ static int c5471_phyinit (void)
#ifdef CONFIG_C5471_AUTONEGOTIATION
ndbg("Setting PHY Transceiver for Autonegotiation\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_AUTONEG);
#endif
#endif
#ifdef CONFIG_C5471_BASET100
ndbg("Setting PHY Transceiver for 100BaseT FullDuplex\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_100MBIT_FULLDUP);
#endif
#endif
#ifdef CONFIG_C5471_BASET10
ndbg("Setting PHY Transceiver for 10BaseT FullDuplex\n");
c5471_mdwrite(0, MD_PHY_CONTROL_REG, MODE_10MBIT_FULLDUP);
#endif
#endif
status = c5471_mdread(0, MD_PHY_CTRL_STAT_REG);
return status;
@ -1479,7 +1479,7 @@ static int c5471_interrupt(int irq, FAR void *context)
c5471_txdone(c5471);
}
/* Enable Ethernet interrupts (perhaps excluding the TX done interrupt if
/* Enable Ethernet interrupts (perhaps excluding the TX done interrupt if
* there are no pending transmissions.
*/
@ -1567,7 +1567,7 @@ static void c5471_polltimer(int argc, uint32_t arg, ...)
*
* Description:
* NuttX Callback: Bring up the Ethernet interface when an IP address is
* provided
* provided
*
* Parameters:
* dev - Reference to the NuttX driver state structure
@ -1680,7 +1680,7 @@ static int c5471_ifdown(struct uip_driver_s *dev)
* Function: c5471_txavail
*
* Description:
* Driver callback invoked when new TX data is available. This is a
* Driver callback invoked when new TX data is available. This is a
* stimulus perform an out-of-cycle poll and, thereby, reduce the TX
* latency.
*
@ -1732,7 +1732,7 @@ static int c5471_txavail(struct uip_driver_s *dev)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be added
* mac - The MAC address to be added
*
* Returned Value:
* None
@ -1762,7 +1762,7 @@ static int c5471_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
*
* Parameters:
* dev - Reference to the NuttX driver state structure
* mac - The MAC address to be removed
* mac - The MAC address to be removed
*
* Returned Value:
* None
@ -1973,7 +1973,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
// putreg32(EIM_FILTER_LOGICAL|EIM_FILTER_UNICAST|EIM_FILTER_MULTICAST|
// EIM_FILTER_BROADCAST, EIM_CPU_FILTER);
putreg32(EIM_FILTER_UNICAST|EIM_FILTER_MULTICAST|EIM_FILTER_BROADCAST, EIM_CPU_FILTER);
#endif
#endif
/* Disable all Ethernet interrupts */
@ -1984,16 +1984,16 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
#if 1
putreg32(EIM_CTRL_ENET0_EN|EIM_CTRL_RXENET0_EN|EIM_CTRL_TXENET0_EN|
EIM_CTRL_RXCPU_EN|EIM_CTRL_TXCPU_EN, EIM_CTRL);
#else
#else
putreg32(EIM_CTRL_ENET0_EN|EIM_CTRL_ENET0_FLW|EIM_CTRL_RXENET0_EN|
EIM_CTRL_TXENET0_EN|EIM_CTRL_RXCPU_EN|EIM_CTRL_TXCPU_EN, EIM_CTRL);
#endif
#if 1
#if 1
putreg32(0x00000000, EIM_MFVHI);
#else
putreg32(0x0000ff00, EIM_MFVHI);
#endif
#endif
putreg32(0x00000000, EIM_MFVLO);
putreg32(0x00000000, EIM_MFMHI);
@ -2007,16 +2007,16 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
putreg32(ENET_MODE_RJCT_SFE|ENET_MODE_MWIDTH|ENET_MODE_FULLDUPLEX, ENET0_MODE);
#else
putreg32(ENET_MODE_RJCT_SFE|ENET_MODE_MWIDTH|ENET_MODE_HALFDUPLEX, ENET0_MODE);
#endif
#endif
putreg32(0x00000000, ENET0_BOFFSEED);
putreg32(0x00000000, ENET0_FLWPAUSE);
putreg32(0x00000000, ENET0_FLWCONTROL);
putreg32(0x00000000, ENET0_VTYPE);
#if 0
#if 0
putreg32(ENET_ADR_BROADCAST|ENET_ADR_PROMISCUOUS, ENET0_ADRMODE_EN);
#else
#else
/* The CPU port is not PROMISCUOUS, it wants a no-promiscuous address
* match yet the SWITCH receives packets from the PROMISCUOUS ENET0
* which routes all packets for filter matching at the CPU port which
@ -2026,7 +2026,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
*/
putreg32(ENET_ADR_PROMISCUOUS, ENET0_ADRMODE_EN);
#endif
#endif
putreg32(0x00000000, ENET0_DRP);
up_mdelay(500);
@ -2093,7 +2093,7 @@ static void c5471_macassign(struct c5471_driver_s *c5471)
putreg32(getreg32(EIM_CPU_DALO), ENET0_LARLO);
#else
/* ENET MAC assignment not needed for its PROMISCUOUS mode */
/* ENET MAC assignment not needed for its PROMISCUOUS mode */
putreg32(0x00000000, ENET0_PARHI);
putreg32(0x00000000, ENET0_PARLO);

2
arch/arm/src/c5471/c5471_serial.c
View File

@ -805,7 +805,7 @@ static bool up_txempty(struct uart_dev_s *dev)
* Name: up_serialinit
*
* Description:
* Performs the low level UART initialization early in
* Performs the low level UART initialization early in
* debug so that the serial console will be available
* during bootup. This must be called before up_serialinit.
*

2
arch/arm/src/c5471/c5471_vectors.S
View File

@ -185,7 +185,7 @@ up_vectorirq:
/************************************************************************************
* Function: up_vectorswi
*
*
* Description:
* SWI interrupt. We enter the SWI in SVC mode
************************************************************************************/

2
arch/arm/src/common/up_internal.h
View File

@ -248,7 +248,7 @@ extern uint32_t _ebss; /* End+1 of .bss */
*
* will create a function named foo that will execute from RAM.
*/
#ifdef CONFIG_ARCH_RAMFUNCS
# define __ramfunc__ __attribute__ ((section(".ramfunc"),long_call))

2
arch/arm/src/common/up_signal_dispatch.c
View File

@ -73,7 +73,7 @@
*
* Normally the a user-mode signalling handling stub will also execute
* before the ultimate signal handler is called. See
* arch/arm/src/armv[6\7]/up_signal_handler. This function is the
* arch/arm/src/armv[6\7]/up_signal_handler. This function is the
* user-space, signal handler trampoline function. It is called from
* up_signal_dispatch() in user-mode.
*

2
arch/arm/src/common/up_stackframe.c
View File

@ -127,7 +127,7 @@ FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size)
/* Align the frame_size */
frame_size = STACK_ALIGN_UP(frame_size);
/* Is there already a stack allocated? Is it big enough? */
if (!tcb->stack_alloc_ptr || tcb->adj_stack_size <= frame_size)

6
arch/arm/src/common/up_vfork.c
View File

@ -90,7 +90,7 @@
* any data other than a variable of type pid_t used to store the return
* value from vfork(), or returns from the function in which vfork() was
* called, or calls any other function before successfully calling _exit()
* or one of the exec family of functions.
* or one of the exec family of functions.
*
* The overall sequence is:
*
@ -120,7 +120,7 @@
* Upon successful completion, vfork() returns 0 to the child process and
* returns the process ID of the child process to the parent process.
* Otherwise, -1 is returned to the parent, no child process is created,
* and errno is set to indicate the error.
* and errno is set to indicate the error.
*
****************************************************************************/
@ -180,7 +180,7 @@ pid_t up_vfork(const struct vfork_s *context)
DEBUGASSERT((uint32_t)parent->adj_stack_ptr > context->sp);
stackutil = (uint32_t)parent->adj_stack_ptr - context->sp;
svdbg("stacksize:%d stackutil:%d\n", stacksize, stackutil);
svdbg("stacksize:%d stackutil:%d\n", stacksize, stackutil);
/* Make some feeble effort to perserve the stack contents. This is
* feeble because the stack surely contains invalid pointers and other

16
arch/arm/src/dm320/dm320_boot.c
View File

@ -74,21 +74,21 @@ extern uint32_t _vector_end; /* End+1 of vector block */
static const struct section_mapping_s section_mapping[] =
{
{ DM320_PERIPHERALS_PSECTION, DM320_PERIPHERALS_VSECTION,
{ DM320_PERIPHERALS_PSECTION, DM320_PERIPHERALS_VSECTION,
DM320_PERIPHERALS_MMUFLAGS, DM320_PERIPHERALS_NSECTIONS},
{ DM320_FLASH_PSECTION, DM320_FLASH_VSECTION,
{ DM320_FLASH_PSECTION, DM320_FLASH_VSECTION,
DM320_FLASH_MMUFLAGS, DM320_FLASH_NSECTIONS},
{ DM320_CFI_PSECTION, DM320_CFI_VSECTION,
{ DM320_CFI_PSECTION, DM320_CFI_VSECTION,
DM320_CFI_MMUFLAGS, DM320_CFI_NSECTIONS},
{ DM320_SSFDC_PSECTION, DM320_SSFDC_VSECTION,
{ DM320_SSFDC_PSECTION, DM320_SSFDC_VSECTION,
DM320_SSFDC_MMUFLAGS, DM320_SSFDC_NSECTIONS},
{ DM320_CE1_PSECTION, DM320_CE1_VSECTION,
{ DM320_CE1_PSECTION, DM320_CE1_VSECTION,
DM320_CE1_MMUFLAGS, DM320_CE1_NSECTIONS},
{ DM320_CE2_PSECTION, DM320_CE2_VSECTION,
{ DM320_CE2_PSECTION, DM320_CE2_VSECTION,
DM320_CE2_MMUFLAGS, DM320_CE2_NSECTIONS},
{ DM320_VLYNQ_PSECTION, DM320_VLYNQ_VSECTION,
{ DM320_VLYNQ_PSECTION, DM320_VLYNQ_VSECTION,
DM320_VLYNQ_MMUFLAGS, DM320_VLYNQ_NSECTIONS},
{ DM320_USBOTG_PSECTION, DM320_USBOTG_VSECTION,
{ DM320_USBOTG_PSECTION, DM320_USBOTG_VSECTION,
DM320_USBOTG_MMUFLAGS, DM320_USBOTG_NSECTIONS}
};
#define NMAPPINGS (sizeof(section_mapping) / sizeof(struct section_mapping_s))

4
arch/arm/src/dm320/dm320_memorymap.h
View File

@ -67,7 +67,7 @@
* section address for most regions can be overriden if the same setting is
* defined in the board.h file (These defaults correspond to the product Neuros
* OSD memory configuration).
*
*
* 2. The DM320 only has a single control line for external peripherals. To support
* more than one peripheral, most hardware will use external memory decode logic,
* so that physical memory regions is in the board-specific files.
@ -125,7 +125,7 @@
#define DM320_CFI_NSECTIONS 16 /* 16Mb 16 sections -- */
#define DM320_CFI_SIZE (16*1024*1024)
#define DM320_SSFDC_NSECTIONS 16 /* 16Mb 16 sections -- */
#define DM320_SSFDC_SIZE (16*1024*1024)
#define DM320_SSFDC_SIZE (16*1024*1024)
#define DM320_CE1_NSECTIONS 16 /* 16Mb 16 sections -- */
#define DM320_CE1_SIZE (16*1024*1024)
#define DM320_CE2_NSECTIONS 16 /* 16Mb 16 sections -- */

4
arch/arm/src/dm320/dm320_serial.c
View File

@ -502,7 +502,7 @@ static int up_interrupt(int irq, void *context)
status = up_serialin(priv, UART_SR);
status &= (UART_SR_RFTI | UART_SR_TFTI);
if (status == 0 || passes > 256)
if (status == 0 || passes > 256)
{
return OK;
}
@ -719,7 +719,7 @@ static bool up_txempty(struct uart_dev_s *dev)
* Name: up_serialinit
*
* Description:
* Performs the low level UART initialization early in
* Performs the low level UART initialization early in
* debug so that the serial console will be available
* during bootup. This must be called before up_serialinit.
*

28
arch/arm/src/dm320/dm320_timerisr.c
View File

@ -56,24 +56,24 @@
/* DM320 Timers
*
* Each of the general-purpose timers can run in one of two modes: one-
* shot mode and free-run mode. In one-shot mode, an interrupt only
* occurs once and then the timer must be explicitly reset to begin the
* timing operation again. In free-run mode, when the timer generates an
* interrupt, the timer counter is automatically reloaded to start the count
* operation again. Use the bit field MODE in TMMDx to configure the
* shot mode and free-run mode. In one-shot mode, an interrupt only
* occurs once and then the timer must be explicitly reset to begin the
* timing operation again. In free-run mode, when the timer generates an
* interrupt, the timer counter is automatically reloaded to start the count
* operation again. Use the bit field MODE in TMMDx to configure the
* timer for one-shot more or free-run mode. The bit field MODE in TMMDx
* also allows you to stop the timer.
*
* Either the ARM clock divided by 2 (CLK_ARM/2) or an external clock
* connected to the M27XI pin can be selected as the clock source of the
*
* Either the ARM clock divided by 2 (CLK_ARM/2) or an external clock
* connected to the M27XI pin can be selected as the clock source of the
* timer.
*
* The actual clock frequency used in the timer count operation is the input
* clock divided by: 1 plus the value set in the bit field PRSCL of the
* register TMPRSCLx (10 bits). The timer expires when it reaches the
* value set in the bit field DIV of the register TMDIVx (16 bits) plus 1.
* PRSCL+1 is the source clock frequency divide factor and DIV+1 is the
* timer count value. The frequency of a timer interrupt is given by the
* The actual clock frequency used in the timer count operation is the input
* clock divided by: 1 plus the value set in the bit field PRSCL of the
* register TMPRSCLx (10 bits). The timer expires when it reaches the
* value set in the bit field DIV of the register TMDIVx (16 bits) plus 1.
* PRSCL+1 is the source clock frequency divide factor and DIV+1 is the
* timer count value. The frequency of a timer interrupt is given by the
* following equation:
*
* Interrupt Frequency = (Source Clock Frequency) / (PRSCL+1) / (DIV+1)

12
arch/arm/src/dm320/dm320_usbdev.c
View File

@ -827,7 +827,7 @@ static int dm320_epread(uint8_t epphy, uint8_t *buf, uint16_t nbytes)
bytesleft = nbytes;
}
}
else
else
{
bytesleft = dm320_getreg8(DM320_USB_RXCOUNT2);
bytesleft = (bytesleft << 8) + dm320_getreg8(DM320_USB_RXCOUNT1);
@ -1562,7 +1562,7 @@ static int dm320_ctlrinterrupt(int irq, FAR void *context)
{
/* Now ignore these unknown interrupts */
dm320_putreg8(USB_PERCSR0_CLRRXRDY | USB_PERCSR0_DATAEND, DM320_USB_PERCSR0);
dm320_putreg8(USB_PERCSR0_CLRRXRDY | USB_PERCSR0_DATAEND, DM320_USB_PERCSR0);
usbtrace(TRACE_INTENTRY(DM320_TRACEINTID_UNKNOWN), csr0);
}
}
@ -1719,7 +1719,7 @@ static inline void dm320_epinitialize(struct dm320_usbdev_s *priv)
/* Initialize endpoint 0 */
dm320_putreg8(USB_EP0_SELECT, DM320_USB_INDEX);
dm320_putreg8(USB_EP0_SELECT, DM320_USB_INDEX);
dm320_putreg8(USB_PERCSR0_CLRSETEND|USB_PERCSR0_CLRRXRDY, DM320_USB_PERCSR0);
dm320_putreg8(USB_CSR2_FLFIFO, DM320_USB_CSR2);
dm320_putreg8(USB_CSR2_FLFIFO, DM320_USB_CSR2);
@ -1837,7 +1837,7 @@ static void dm320_ctrlinitialize(FAR struct dm320_usbdev_s *priv)
dm320_putreg8((DM320_EPBULKIN << 1), DM320_USB_INTRRX1E);
dm320_putreg8((DM320_EPBULKOUT << 1) | USB_EP0, DM320_USB_INTRTX1E);
dm320_putreg8(USB_INT_RESET|USB_INT_RESUME|USB_INT_SUSPEND|USB_INT_SESSRQ|USB_INT_SOF,
DM320_USB_INTRUSBE);
DM320_USB_INTRUSBE);
/* Initialize endpoints ******************************************************/
@ -2288,7 +2288,7 @@ static int dm320_wakeup(struct usbdev_s *dev)
* Name: dm320_selfpowered
*
* Description:
* Sets/clears the device selfpowered feature
* Sets/clears the device selfpowered feature
*
*******************************************************************************/
@ -2375,7 +2375,7 @@ void up_usbinitialize(void)
/* Enable USB clock & GIO clock */
dm320_putreg16(dm320_getreg16(DM320_CLKC_MOD2) | 0x0060, DM320_CLKC_MOD2);
dm320_putreg16(dm320_getreg16(DM320_CLKC_MOD2) | 0x0060, DM320_CLKC_MOD2);
dm320_putreg16(dm320_getreg16(DM320_CLKC_DIV4) | (((4) - 1) << 8) | ((1) - 1), DM320_CLKC_DIV4);
/* Initialize D+ pullup control GIO */

2
arch/arm/src/imx/imx_aitc.h
View File

@ -39,7 +39,7 @@
/************************************************************************************
* Included Files
************************************************************************************/
/************************************************************************************
* Definitions
************************************************************************************/

14
arch/arm/src/imx/imx_boot.c
View File

@ -78,19 +78,19 @@ extern uint32_t _vector_end; /* End+1 of vector block */
static const struct section_mapping_s section_mapping[] =
{
{ IMX_PERIPHERALS_PSECTION, IMX_PERIPHERALS_VSECTION,
{ IMX_PERIPHERALS_PSECTION, IMX_PERIPHERALS_VSECTION,
IMX_PERIPHERALS_MMUFLAGS, IMX_PERIPHERALS_NSECTIONS},
{ IMX_FLASH_PSECTION, IMX_FLASH_VSECTION,
{ IMX_FLASH_PSECTION, IMX_FLASH_VSECTION,
IMX_FLASH_MMUFLAGS, IMX_FLASH_NSECTIONS},
{ IMX_CS1_PSECTION, IMX_CS1_VSECTION,
{ IMX_CS1_PSECTION, IMX_CS1_VSECTION,
IMX_PERIPHERALS_MMUFLAGS, IMX_CS1_NSECTIONS},
{ IMX_CS2_PSECTION, IMX_CS2_VSECTION,
{ IMX_CS2_PSECTION, IMX_CS2_VSECTION,
IMX_PERIPHERALS_MMUFLAGS, IMX_CS2_NSECTIONS},
{ IMX_CS3_PSECTION, IMX_CS3_VSECTION,
{ IMX_CS3_PSECTION, IMX_CS3_VSECTION,
IMX_PERIPHERALS_MMUFLAGS, IMX_CS3_NSECTIONS},
{ IMX_CS4_PSECTION, IMX_CS4_VSECTION,
{ IMX_CS4_PSECTION, IMX_CS4_VSECTION,
IMX_PERIPHERALS_MMUFLAGS, IMX_CS4_NSECTIONS},
{ IMX_CS5_PSECTION, IMX_CS5_VSECTION,
{ IMX_CS5_PSECTION, IMX_CS5_VSECTION,
IMX_PERIPHERALS_MMUFLAGS, IMX_CS5_NSECTIONS},
};

2
arch/arm/src/imx/imx_cspi.h
View File

@ -182,7 +182,7 @@ extern "C" {
* include/nuttx/spi/spi.h). All other methods (including up_spiinitialize()) are
* provided by common logic. To use this common SPI logic on your board:
*
* 1. Provide imx_spiselect() and imx_spistatus() functions in your board-specific
* 1. Provide imx_spiselect() and imx_spistatus() functions in your board-specific
* logic. This function will perform chip selection and status operations using
* GPIOs in the way your board is configured.
* 2. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration, provide the

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