Lenny Truong 2bd44c813a [Verif] Add ignore attribute to formal (#7719) ... By default, `circt-test` will not include "ignored" verif.formal ops in the output list but has an option `--list-ignored` to emit them.		2024-10-31 16:25:00 -07:00
..
Bindings	[OM] Rework ClassOp to use return style for class fields (#7537)	2024-10-21 17:15:36 -04:00
Dialect	[FIRRTL] Remove test usage of '<=' connect, NFC	2024-10-25 16:59:12 -04:00
EmitVerilog	[FIRRTL] Remove test usage of '<=' connect, NFC	2024-10-25 16:59:12 -04:00
Target	Bump LLVM to 10407be542aeb2b59477b167bbba3716538dc722. (#7550)	2024-09-01 09:15:42 +01:00
arcilator/JIT	[arcilator] Add clock divider integration test (#7705)	2024-10-28 15:02:01 -07:00
circt-bmc	[circt-bmc] Add `circt-bmc` tool (#7621)	2024-09-25 14:17:57 +01:00
circt-lec	[circt-lec] Register Verif dialects (#7744)	2024-10-28 20:49:45 +09:00
circt-rtl-sim	[ESI] [Integration tests] [Tests] Switch from 'rstn' to 'rst' (#3618)	2022-07-28 10:55:58 -07:00
circt-test	[Verif] Add ignore attribute to formal (#7719)	2024-10-31 16:25:00 -07:00
handshake-runner	[Handshake] `StandardToHandshake` -> `CFToHandshake` (#5938)	2023-08-25 09:24:26 +02:00
CMakeLists.txt	[circt-test] Add simple SymbiYosys test runner (#7756)	2024-10-31 10:14:55 -07:00
lit.cfg.py	[circt-test] Add simple SymbiYosys test runner (#7756)	2024-10-31 10:14:55 -07:00
lit.site.cfg.py.in	[PyCDE] Fixing ESI-based integration tests	2024-07-03 12:59:13 +00:00