[Moore] Fix mem2reg for variables with non-packed types

Only attempt to promote variables with packed types during mem2reg. Also
run the `basic.sv` test of ImportVerilog through `circt-verilog` as a
sanity check of the transformations done by the tool.
This commit is contained in:
Fabian Schuiki 2024-08-12 11:53:39 -07:00
parent 00f140496c
commit b89f54f2bf
3 changed files with 8 additions and 1 deletions

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@ -462,7 +462,7 @@ def NamedConstantOp : MooreOp<"named_constant", [
}];
}
def StringConstantOp : MooreOp<"string_constant", [Pure, ConstantLike]> {
def StringConstantOp : MooreOp<"string_constant", [Pure]> {
let summary = "Produce a constant string value";
let description = [{
Produces a constant value of string type.

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@ -322,6 +322,12 @@ SmallVector<MemorySlot> VariableOp::getPromotableSlots() {
if (mlir::mayBeGraphRegion(*getOperation()->getParentRegion()) ||
getInitial())
return {};
// Ensure that `getDefaultValue` can conjure up a default value for the
// variable's type.
if (!isa<PackedType>(getType().getNestedType()))
return {};
return {MemorySlot{getResult(), getType().getNestedType()}};
}

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@ -1,4 +1,5 @@
// RUN: circt-translate --import-verilog %s | FileCheck %s
// RUN: circt-verilog --ir-moore %s
// REQUIRES: slang
// Internal issue in Slang v3 about jump depending on uninitialised value.