mirror of https://github.com/llvm/circt.git
FileCheck directive fixup, now filecheck_lint-clean. (#7057)
* [FIRRTL] Fixup FileCheck directive in convention.fir. Caught by filecheck_lint.py * [Scheduling][NFC] Alter check prefix to avoid false-positive lint. As-is, "2:" is reported as possible typo for "LP:". Use slightly longer prefix to get lint check to pass. * [Ibis][NFC] Alter mechanism used to disable check directives. Use "COM:" to prefix lines that we want to ignore, which ensures filecheck_lint.py understands this as not a mistake.
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@ -221,12 +221,12 @@ ibis.container @C {
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// cannot live within an ibis.design, but we need to run this pass on the
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// ibis.design op. I don't think it's critical that we support this case currently.
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// CHECKx-LABEL: hw.module @AccessChildFromHW() {
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// CHECKx: %[[VAL_0:.*]] = ibis.container.instance @c, <@D::@C>
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// CHECKx: %[[VAL_1:.*]] = ibis.get_port %[[VAL_0]], @out : !ibis.scoperef<@D::@C> -> !ibis.portref<out i1>
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// CHECKx: %[[VAL_2:.*]] = ibis.get_port %[[VAL_0]], @in : !ibis.scoperef<@D::@C> -> !ibis.portref<in i1>
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// CHECKx: hw.output
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// CHECKx: }
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// COM: CHECK-LABEL: hw.module @AccessChildFromHW() {
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// COM: CHECK: %[[VAL_0:.*]] = ibis.container.instance @c, <@D::@C>
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// COM: CHECK: %[[VAL_1:.*]] = ibis.get_port %[[VAL_0]], @out : !ibis.scoperef<@D::@C> -> !ibis.portref<out i1>
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// COM: CHECK: %[[VAL_2:.*]] = ibis.get_port %[[VAL_0]], @in : !ibis.scoperef<@D::@C> -> !ibis.portref<in i1>
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// COM: CHECK: hw.output
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// COM: CHECK: }
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}
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@ -1,7 +1,7 @@
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// RUN: circt-opt %s -ssp-roundtrip=verify
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// RUN: circt-opt %s -ssp-schedule=scheduler=asap | FileCheck %s -check-prefixes=CHECK,ASAP
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// RUN: circt-opt %s -ssp-schedule=scheduler=simplex | FileCheck %s -check-prefixes=CHECK,SIMPLEX
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// RUN: %if or-tools %{ circt-opt %s -ssp-schedule=scheduler=lp | FileCheck %s -check-prefixes=CHECK,LP %}
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// RUN: %if or-tools %{ circt-opt %s -ssp-schedule=scheduler=lp | FileCheck %s -check-prefixes=CHECK,LINEAR %}
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// CHECK-LABEL: unit_latencies
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ssp.instance @unit_latencies of "Problem" {
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@ -26,7 +26,7 @@ ssp.instance @unit_latencies of "Problem" {
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%6 = operation<@_1>(%3, %4, %5) [t<5>]
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// ASAP-NEXT: [t<6>]
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// SIMPLEX: @last(%{{.*}}) [t<6>]
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// LP: @last(%{{.*}}) [t<6>]
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// LINEAR: @last(%{{.*}}) [t<6>]
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operation<@_1> @last(%6) [t<6>]
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}
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}
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@ -56,7 +56,7 @@ ssp.instance @arbitrary_latencies of "Problem" {
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%5 = operation<@_10>(%4) [t<50>]
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// ASAP-NEXT: [t<19>]
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// SIMPLEX: @last(%{{.*}}) [t<19>]
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// LP: @last(%{{.*}}) [t<19>]
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// LINEAR: @last(%{{.*}}) [t<19>]
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operation<@_1> @last(%5) [t<60>]
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}
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}
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@ -82,7 +82,7 @@ ssp.instance @auxiliary_dependences of "Problem" {
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operation<@_1> @op5(@op4) [t<4>]
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// ASAP-NEXT: [t<5>]
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// SIMPLEX: @last(@op3, @op5) [t<5>]
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// LP: @last(@op3, @op5) [t<5>]
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// LINEAR: @last(@op3, @op5) [t<5>]
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operation<@_1> @last(@op3, @op5) [t<5>]
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}
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}
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@ -31,7 +31,7 @@ circuit Top :
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; SCALARIZE_TTF: attributes {convention = #firrtl<convention scalarized>}
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; SCALARIZE_FFT-NOT: attributes {convention = #firrtl<convention scalarized>}
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; SCALARIZE_TFT-NOT: attributes {convention = #firrtl<convention scalarized>}
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; SCALARIZE_FTT : attributes {convention = #firrtl<convention scalarized>}
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; SCALARIZE_FTT: attributes {convention = #firrtl<convention scalarized>}
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; SCALARIZE_TTT: attributes {convention = #firrtl<convention scalarized>}
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extmodule External :
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output port: UInt<8>[2]
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