mirror of https://github.com/llvm/circt.git
[LLHD] Replace vectors with LLHD array type (#48)
* [LLHD] Replace vectors with LLHD array type * Rename overlooked vector type
This commit is contained in:
Martin Erhart
GitHub
parent
07c3a5fbc4
commit
03d4f0454d
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@ -69,7 +69,7 @@ def LLHD_EqOp : LLHD_Op<"eq", [
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let description = [{
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This operation compares two values and returns 1 if they are the same and 0
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otherwise. It is capable of comparing all types in the LLHD dialect. It
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performs element-wise equality for vectors and tuples.
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performs element-wise equality for arrays and tuples.
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Examples:
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@ -103,7 +103,7 @@ def LLHD_NeqOp : LLHD_Op<"neq", [
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let description = [{
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This operation compares two values and returns 1 if they are not the same
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and 0 if they are the same. It is capable of comparing all types in the LLHD
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dialect. It performs element-wise equality for vectors and tuples.
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dialect. It performs element-wise equality for arrays and tuples.
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Examples:
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@ -224,15 +224,15 @@ def LLHD_ShlOp : LLHD_Op<"shl", [
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// TODO: adjust type T and Th to include pointers
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let arguments = (ins
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>:$base,
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>:$hidden,
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>:$base,
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>:$hidden,
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AnySignlessInteger:$amount);
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let results = (outs
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>:$result);
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>:$result);
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let assemblyFormat = [{
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operands attr-dict `:` functional-type(operands, results)
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@ -285,15 +285,15 @@ def LLHD_ShrOp : LLHD_Op<"shr", [
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// TODO: adjust type T and Th to include pointers
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let arguments = (ins
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>:$base,
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>:$hidden,
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>:$base,
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>:$hidden,
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AnySignlessInteger:$amount);
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let results = (outs
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>:$result);
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>:$result);
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let assemblyFormat = [{
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operands attr-dict `:` functional-type(operands, results)
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@ -13,7 +13,7 @@ def LLHD_ExtractSliceOp : LLHD_Op<"extract_slice", [
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"this->getTargetSize()">>,
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SameTypeArbitraryWidth<
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"'target' and 'result' have to be both either signless integers, signals "
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"or vectors with the same element type",
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"or arrays with the same element type",
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"$target", "$result">
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]> {
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let summary = "Extract a slice of consecutive elements.";
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@ -37,13 +37,13 @@ def LLHD_ExtractSliceOp : LLHD_Op<"extract_slice", [
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}];
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let arguments = (ins
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>: $target,
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>: $target,
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IndexAttr: $start);
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let results = (outs
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>: $result);
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>: $result);
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let assemblyFormat = [{
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$target `,` $start attr-dict `:` type($target) `->` type($result)
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@ -70,7 +70,7 @@ def LLHD_DynExtractSliceOp : LLHD_Op<"dyn_extract_slice", [
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of the `$target` operand, starting at the index given by the `$start`
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operand. The resulting slice length is defined by the result type.
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The `$target` operand kind has to match the result kind.
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If `$target` is a vector, only the number of elements can change, while
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If `$target` is an array, only the number of elements can change, while
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the element type has to remain the same.
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Example:
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@ -84,13 +84,13 @@ def LLHD_DynExtractSliceOp : LLHD_Op<"dyn_extract_slice", [
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}];
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let arguments = (ins
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>: $target,
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>: $target,
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AnySignlessInteger: $start);
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let results = (outs
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AnyTypeOf<[AnySignlessInteger, AnyVector,
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LLHD_SigType<[AnySignlessInteger, AnyVector]>]>: $result);
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType,
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LLHD_SigType<[AnySignlessInteger, LLHD_ArrayType]>]>: $result);
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let assemblyFormat = [{
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operands attr-dict `:` functional-type(operands, results)
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@ -117,7 +117,7 @@ def LLHD_ExtractElementOp : LLHD_Op<"extract_element", [
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": getElementTypeAtIndex($index.cast<IntegerAttr>().getInt()))">
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]> {
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let summary = [{
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Extract an element from a vector, tuple, or signal of a vector or tuple.
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Extract an element from an array, tuple, or signal of an array or tuple.
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}];
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let description = [{
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The `llhd.extract_element` operation allows access to an element of the
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@ -128,22 +128,24 @@ def LLHD_ExtractElementOp : LLHD_Op<"extract_element", [
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Example:
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```mlir
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%0 = constant dense<[1,2,3]> : vector<3xi8>
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%1 = llhd.extract_element %0, 0 : vector<3xi8> -> i8
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%init = llhd.const 3 : i8
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%0 = llhd.array_uniform %init : !llhd.array<3xi8>
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%1 = llhd.extract_element %0, 0 : !llhd.array<3xi8> -> i8
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%2 = llhd.sig %0 : vector<3xi8>
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%3 = llhd.extract_element %2, 0 : !llhd.sig<vector<3xi8>> -> !llhd.sig<i8>
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%2 = llhd.sig %0 : !llhd.array<3xi8>
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%3 = llhd.extract_element %2, 0
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: !llhd.sig<!llhd.array<3xi8>> -> !llhd.sig<i8>
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%4 = llhd.const 8 : i16
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%5 = llhd.tuple %0, %4 : tuple<vector<3xi8>, i16>
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%6 = llhd.extract_element %5, 1 : tuple<vector<3xi8>, i16> -> i16
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%5 = llhd.tuple %0, %4 : tuple<!llhd.array<3xi8>, i16>
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%6 = llhd.extract_element %5, 1 : tuple<!llhd.array<3xi8>, i16> -> i16
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```
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}];
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let arguments = (ins AnyTypeOf<[
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AnyVector,
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LLHD_ArrayType,
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AnyTuple,
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LLHD_SigType<[AnyVector, AnyTuple]>
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LLHD_SigType<[LLHD_ArrayType, AnyTuple]>
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]>: $target,
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IndexAttr: $index);
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@ -160,24 +162,24 @@ def LLHD_ExtractElementOp : LLHD_Op<"extract_element", [
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Type targetType = target().getType();
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if (auto sig = targetType.dyn_cast<llhd::SigType>())
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targetType = sig.getUnderlyingType();
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if (auto vec = targetType.dyn_cast<VectorType>())
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return vec.getElementType();
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return targetType.dyn_cast<TupleType>().getTypes()[index];
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if (auto array = targetType.dyn_cast<llhd::ArrayType>())
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return array.getElementType();
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return targetType.cast<TupleType>().getTypes()[index];
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}
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}];
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}
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def LLHD_DynExtractElementOp : LLHD_Op<"dyn_extract_element", [
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NoSideEffect,
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TypesMatchWith<"'result' must be the element type of the 'target' vector, in "
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"case 'target' is a signal of a vector, 'result' also is a signal of the "
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"vector element type",
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TypesMatchWith<"'result' must be the element type of the 'target' array, in "
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"case 'target' is a signal of an array, 'result' also is a signal of the "
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"array element type",
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"target", "result",
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"($_self.isa<llhd::SigType>() ? llhd::SigType::get(getElementType()) "
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": getElementType())">
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]> {
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let summary = [{
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Dynamically extract an element from a vector or signal of vector.
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Dynamically extract an element from an array or signal of array.
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}];
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let description = [{
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The `llhd.dyn_extract_element` operation allows to dynamically access an
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@ -190,17 +192,18 @@ def LLHD_DynExtractElementOp : LLHD_Op<"dyn_extract_element", [
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```mlir
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%index = llhd.const 1 : i2
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%0 = constant dense<[1,2,3]> : vector<3xi8>
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%1 = llhd.dyn_extract_element %0, %index : (vector<3xi8>, i2) -> i8
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%init = llhd.const 3 : i8
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%0 = llhd.array_uniform %init : !llhd.array<3xi8>
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%1 = llhd.dyn_extract_element %0, %index : (!llhd.array<3xi8>, i2) -> i8
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%2 = llhd.sig %0 : vector<3xi8>
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%2 = llhd.sig %0 : !llhd.array<3xi8>
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%3 = llhd.dyn_extract_element %2, %index
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: (!llhd.sig<vector<3xi8>>, i2) -> !llhd.sig<i8>
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: (!llhd.sig<!llhd.array<3xi8>>, i2) -> !llhd.sig<i8>
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```
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}];
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let arguments = (ins
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AnyTypeOf<[AnyVector, LLHD_SigType<[AnyVector]>]>: $target,
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AnyTypeOf<[LLHD_ArrayType, LLHD_SigType<[LLHD_ArrayType]>]>: $target,
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AnySignlessInteger: $index);
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let results = (outs AnyType: $result);
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@ -216,7 +219,7 @@ def LLHD_DynExtractElementOp : LLHD_Op<"dyn_extract_element", [
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Type targetType = target().getType();
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if (auto sig = targetType.dyn_cast<llhd::SigType>())
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targetType = sig.getUnderlyingType();
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return targetType.dyn_cast<VectorType>().getElementType();
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return targetType.cast<llhd::ArrayType>().getElementType();
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}
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}];
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}
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@ -8,7 +8,7 @@ def LLHD_InsertSliceOp : LLHD_Op<"insert_slice", [
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NoSideEffect,
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AllTypesMatch<["target", "result"]>,
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SameTypeArbitraryWidth<
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"'target' and 'slice' have to be both either signless integers or vectors"
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"'target' and 'slice' have to be both either signless integers or arrays"
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" with the same element type",
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"$target", "$slice">,
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PredOpTrait<
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@ -33,17 +33,20 @@ def LLHD_InsertSliceOp : LLHD_Op<"insert_slice", [
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%islice = llhd.const 2 : i2
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%0 = llhd.insert_slice %itarget, %islice, 0 : i32, i2
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%vtarget = constant dense<[1,2,3]> : vector<3xi32>
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%vslice = constant dense<[4,5]> : vector<2xi32>
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%1 = llhd.insert_slice %vtarget, %vslice, 0 : vector<3xi32>, vector<2xi32>
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%init1 = llhd.const 2 : i32
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%init2 = llhd.const 3 : i32
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%vtarget = llhd.array_uniform %init1 : !llhd.array<3xi32>
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%vslice = llhd.array_uniform %init2 : !llhd.array<2xi32>
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%1 = llhd.insert_slice %vtarget, %vslice, 0
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: !llhd.array<3xi32>, !llhd.array<2xi32>
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```
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}];
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let arguments = (ins AnyTypeOf<[AnySignlessInteger, AnyVector]>: $target,
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AnyTypeOf<[AnySignlessInteger, AnyVector]>: $slice,
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let arguments = (ins AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType]>: $target,
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType]>: $slice,
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IndexAttr: $start);
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let results = (outs AnyTypeOf<[AnySignlessInteger, AnyVector]>: $result);
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let results = (outs AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType]>: $result);
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let assemblyFormat = [{
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$target `,` $slice `,` $start attr-dict `:` type($target) `,` type($slice)
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@ -64,7 +67,7 @@ def LLHD_InsertElementOp : LLHD_Op<"insert_element", [
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"target", "element",
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"this->getElementTypeAtIndex($index.cast<IntegerAttr>().getInt())">
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]> {
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let summary = "Insert an element into a vector or tuple.";
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let summary = "Insert an element into an array or tuple.";
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let description = [{
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The `llhd.insert_element` operation allows insertion of an element
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represented by the `$element` operand into the `$target` operand. The
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@ -75,22 +78,23 @@ def LLHD_InsertElementOp : LLHD_Op<"insert_element", [
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Example:
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```mlir
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%target = constant dense<[1,2,3]> : vector<3xi8>
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%init = llhd.const 1 : i8
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%target = llhd.array_uniform : !llhd.array<3xi8>
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%element = llhd.const 2 : i8
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%0 = llhd.insert_element %target, %element, 0 : vector<3xi8>, i8
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%0 = llhd.insert_element %target, %element, 0 : !llhd.array<3xi8>, i8
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%tuptarget = llhd.tuple %element, %target : tuple<i8, vector<3xi8>
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%tuptarget = llhd.tuple %element, %target : tuple<i8, !llhd.array<3xi8>
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%newelement = llhd.const 4 : i8
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%1 = llhd.insert_element %tuptarget, %newelement, 0
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: tuple<i8, vector<3xi8>>, i8
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: tuple<i8, !llhd.array<3xi8>>, i8
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```
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}];
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let arguments = (ins AnyTypeOf<[AnyVector, AnyTuple]>: $target,
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let arguments = (ins AnyTypeOf<[LLHD_ArrayType, AnyTuple]>: $target,
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AnyType: $element,
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IndexAttr: $index);
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let results = (outs AnyTypeOf<[AnyVector, AnyTuple]>: $result);
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let results = (outs AnyTypeOf<[LLHD_ArrayType, AnyTuple]>: $result);
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let assemblyFormat = [{
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$target `,` $element `,` $index attr-dict `:`
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@ -102,8 +106,8 @@ def LLHD_InsertElementOp : LLHD_Op<"insert_element", [
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Type getElementTypeAtIndex(int64_t index) {
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Type targetType = target().getType();
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if (auto vec = targetType.dyn_cast<VectorType>())
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return vec.getElementType();
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if (auto array = targetType.dyn_cast<llhd::ArrayType>())
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return array.getElementType();
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return targetType.cast<TupleType>().getTypes()[index];
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}
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}];
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@ -37,9 +37,12 @@ def LLHD_Dialect : Dialect {
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def LLHD_TimeType : Type<CPred<"$_self.isa<TimeType>()">, "LLHD time type">,
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BuildableType<"TimeType::get($_builder.getContext())">;
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// LLHD Array Type
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def LLHD_ArrayType : Type<CPred<"$_self.isa<ArrayType>()">, "LLHD array type">;
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// Legal underlying types for signals and pointers.
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def LLHD_AnyUnderlyingType :
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AnyTypeOf<[AnySignlessInteger, AnyVector, AnyTuple]>;
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AnyTypeOf<[AnySignlessInteger, LLHD_ArrayType, AnyTuple]>;
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// LLHD sig type
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class LLHD_SigType<list<Type> allowedTypes>
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@ -56,9 +59,6 @@ class LLHD_PtrType<list<Type> allowedTypes>
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def LLHD_AnyPtrType : LLHD_PtrType<[LLHD_AnyUnderlyingType]>;
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// LLHD Array Type
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def LLHD_ArrayType : Type<CPred<"$_self.isa<ArrayType>()">, "LLHD array type">;
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//===----------------------------------------------------------------------===//
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// LLDH attribute definitions
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//===----------------------------------------------------------------------===//
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@ -19,15 +19,16 @@ def LLHD_VarOp : LLHD_Op<"var", [
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```
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%int = llhd.const 0 : i32
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%arr = constant dense<[1,2,3]> : vector<3xi32>
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%arr = llhd.array_uniform %int : !llhd.array<3xi32>
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%iPtr = llhd.var %int : i32
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%arrPtr = llhd.var %arr : vector<3xi32>
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%arrPtr = llhd.var %arr : !llhd.array<3xi32>
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```
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}];
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let arguments = (ins LLHD_AnyUnderlyingType: $init);
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let results = (outs Res<LLHD_AnyPtrType, "the newly allocated reference", [MemAlloc]>: $result);
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let results = (outs Res<LLHD_AnyPtrType, "the newly allocated reference",
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[MemAlloc]>: $result);
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let assemblyFormat = "$init attr-dict `:` type($init)";
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}
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@ -46,16 +47,17 @@ def LLHD_LoadOp : LLHD_Op<"load", [
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```
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%int = llhd.const 0 : i32
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%arr = constant dense<[1,2,3]> : vector<3xi32>
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%arr = llhd.array_uniform %int : !llhd.array<3xi32>
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%iPtr = llhd.var %int : i32
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%arrPtr = llhd.var %arr : vector<3xi32>
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%arrPtr = llhd.var %arr : !llhd.array<3xi32>
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%iLd = llhd.load %iPtr : !llhd.ptr<i32>
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%arrLd = llhd.load %arrPtr : !llhd.ptr<vector<3xi32>>
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%arrLd = llhd.load %arrPtr : !llhd.ptr<!llhd.array<3xi32>>
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```
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}];
|
||||
|
||||
let arguments = (ins Arg<LLHD_AnyPtrType, "the reference to load from", [MemRead]>: $pointer);
|
||||
let arguments = (ins Arg<LLHD_AnyPtrType, "the reference to load from",
|
||||
[MemRead]>: $pointer);
|
||||
let results = (outs LLHD_AnyUnderlyingType: $result);
|
||||
|
||||
let assemblyFormat = "$pointer attr-dict `:` type($pointer)";
|
||||
|
|
@ -75,16 +77,17 @@ def LLHD_StoreOp : LLHD_Op<"store", [
|
|||
|
||||
```
|
||||
%int = llhd.const 0 : i32
|
||||
%arr = constant dense<[1,2,3]> : vector<3xi32>
|
||||
%arr = llhd.array_uniform %int : !llhd.array<3xi32>
|
||||
%iPtr = llhd.var %int : i32
|
||||
%arrPtr = llhd.var %arr : vector<3xi32>
|
||||
%arrPtr = llhd.var %arr : !llhd.array<3xi32>
|
||||
|
||||
llhd.store %iPtr, %int : !llhd.ptr<i32>
|
||||
llhd.store %arrPtr, %arr : !llhd.ptr<vector<3xi32>>
|
||||
llhd.store %arrPtr, %arr : !llhd.ptr<!llhd.array<3xi32>>
|
||||
```
|
||||
}];
|
||||
|
||||
let arguments = (ins Arg<LLHD_AnyPtrType, "the reference to store to", [MemWrite]>: $pointer,
|
||||
let arguments = (ins Arg<LLHD_AnyPtrType, "the reference to store to",
|
||||
[MemWrite]>: $pointer,
|
||||
LLHD_AnyUnderlyingType: $value);
|
||||
|
||||
let assemblyFormat = "$pointer `,` $value attr-dict `:` type($pointer)";
|
||||
|
|
|
|||
|
|
@ -34,20 +34,19 @@ def LLHD_ConstOp : LLHD_Op<"const", [ConstantLike, NoSideEffect]> {
|
|||
let hasFolder = 1;
|
||||
}
|
||||
|
||||
def LLHD_VecOp : LLHD_Op<"vec", [
|
||||
def LLHD_ArrayOp : LLHD_Op<"array", [
|
||||
NoSideEffect,
|
||||
TypesMatchWith<
|
||||
"types and number of 'values' have to match the length and type of the "
|
||||
"'result' vector",
|
||||
"'result' array",
|
||||
"result", "values",
|
||||
"std::vector<Type>($_self.cast<ShapedType>().getNumElements(), "
|
||||
"$_self.cast<ShapedType>().getElementType())">
|
||||
"std::vector<Type>($_self.cast<llhd::ArrayType>().getLength(), "
|
||||
"$_self.cast<llhd::ArrayType>().getElementType())">
|
||||
]> {
|
||||
let summary = "Create a vector from a list of values.";
|
||||
let summary = "Create an array from a list of values.";
|
||||
let description = [{
|
||||
The `llhd.vec` operation allows to create a vector from a list of
|
||||
SSA-values. This allows for more flexibility compared to only using
|
||||
`std.constant` and the vector dialect operations.
|
||||
The `llhd.array` operation allows to create an array from a list of
|
||||
SSA-values.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
@ -55,13 +54,13 @@ def LLHD_VecOp : LLHD_Op<"vec", [
|
|||
%c1 = llhd.const 1 : i32
|
||||
%c2 = llhd.const 2 : i32
|
||||
%c3 = llhd.const 3 : i32
|
||||
%vec = llhd.vec %c1, %c2, %c3 : vector<3xi32>
|
||||
%elem = vector.extractelement %vec[%c1 : i32] : vector<3xi32>
|
||||
%array = llhd.array %c1, %c2, %c3 : !llhd.array<3xi32>
|
||||
%elem = llhd.extract_element %array, 0 : !llhd.array<3xi32> -> i32
|
||||
```
|
||||
}];
|
||||
|
||||
let arguments = (ins Variadic<AnyType>: $values);
|
||||
let results = (outs AnyVector: $result);
|
||||
let results = (outs LLHD_ArrayType: $result);
|
||||
|
||||
let assemblyFormat = "$values attr-dict `:` type($result)";
|
||||
}
|
||||
|
|
@ -110,9 +109,9 @@ def LLHD_TupleOp : LLHD_Op<"tuple", [
|
|||
%c1 = llhd.const 1 : i32
|
||||
%c2 = llhd.const 2 : i2
|
||||
%sig = llhd.sig "sig_name" %c1 : i32
|
||||
%vec = constant dense<[1, 2]> : vector<2xi32>
|
||||
%tuple = llhd.tuple %c1, %c2, %vec, %sig :
|
||||
tuple<i32, i2, vector<2xi32>, !llhd.sig<i32>>
|
||||
%array = llhd.array_uniform %c1 : !llhd.array<2xi32>
|
||||
%tuple = llhd.tuple %c1, %c2, %array, %sig :
|
||||
tuple<i32, i2, !llhd.array<2xi32>, !llhd.sig<i32>>
|
||||
```
|
||||
}];
|
||||
|
||||
|
|
|
|||
|
|
@ -125,8 +125,8 @@ struct constant_int_all_ones_matcher {
|
|||
unsigned mlir::llhd::getLLHDTypeWidth(Type type) {
|
||||
if (auto sig = type.dyn_cast<llhd::SigType>())
|
||||
type = sig.getUnderlyingType();
|
||||
if (auto vec = type.dyn_cast<VectorType>())
|
||||
return vec.getNumElements();
|
||||
if (auto array = type.dyn_cast<llhd::ArrayType>())
|
||||
return array.getLength();
|
||||
if (auto tup = type.dyn_cast<TupleType>())
|
||||
return tup.size();
|
||||
return type.getIntOrFloatBitWidth();
|
||||
|
|
@ -145,6 +145,10 @@ static bool sameKindArbitraryWidth(Type lhsType, Type rhsType) {
|
|||
sig.getUnderlyingType(),
|
||||
rhsType.cast<llhd::SigType>().getUnderlyingType());
|
||||
|
||||
if (auto array = lhsType.dyn_cast<llhd::ArrayType>())
|
||||
return array.getElementType() ==
|
||||
rhsType.cast<llhd::ArrayType>().getElementType();
|
||||
|
||||
return (!lhsType.isa<ShapedType>() ||
|
||||
(lhsType.cast<ShapedType>().getElementType() ==
|
||||
rhsType.cast<ShapedType>().getElementType()));
|
||||
|
|
|
|||
|
|
@ -2,9 +2,9 @@
|
|||
|
||||
// CHECK-LABEL: @check_arithmetic
|
||||
// CHECK-SAME: %[[A:.*]]: i64
|
||||
// CHECK-SAME: %[[VEC:.*]]: vector<3xi32>
|
||||
// CHECK-SAME: %[[ARR:.*]]: !llhd.array<3xi32>
|
||||
// CHECK-SAME: %[[TUP:.*]]: tuple<i1, i2, i3>
|
||||
func @check_arithmetic(%a : i64, %vec : vector<3xi32>, %tup : tuple<i1, i2, i3>) -> () {
|
||||
func @check_arithmetic(%a : i64, %array : !llhd.array<3xi32>, %tup : tuple<i1, i2, i3>) -> () {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.neg %[[A]] : i64
|
||||
%0 = llhd.neg %a : i64
|
||||
|
||||
|
|
@ -13,15 +13,15 @@ func @check_arithmetic(%a : i64, %vec : vector<3xi32>, %tup : tuple<i1, i2, i3>)
|
|||
|
||||
// CHECK-NEXT: %{{.*}} = llhd.neq %[[A]], %[[A]] : i64
|
||||
%2 = llhd.neq %a, %a : i64
|
||||
// CHECK-NEXT: %{{.*}} = llhd.neq %[[VEC]], %[[VEC]] : vector<3xi32>
|
||||
%3 = llhd.neq %vec, %vec : vector<3xi32>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.neq %[[ARR]], %[[ARR]] : !llhd.array<3xi32>
|
||||
%3 = llhd.neq %array, %array : !llhd.array<3xi32>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.neq %[[TUP]], %[[TUP]] : tuple<i1, i2, i3>
|
||||
%4 = llhd.neq %tup, %tup : tuple<i1, i2, i3>
|
||||
|
||||
// CHECK-NEXT: %{{.*}} = llhd.eq %[[A]], %[[A]] : i64
|
||||
%5 = llhd.eq %a, %a : i64
|
||||
// CHECK-NEXT: %{{.*}} = llhd.eq %[[VEC]], %[[VEC]] : vector<3xi32>
|
||||
%6 = llhd.eq %vec, %vec : vector<3xi32>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.eq %[[ARR]], %[[ARR]] : !llhd.array<3xi32>
|
||||
%6 = llhd.eq %array, %array : !llhd.array<3xi32>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.eq %[[TUP]], %[[TUP]] : tuple<i1, i2, i3>
|
||||
%7 = llhd.eq %tup, %tup : tuple<i1, i2, i3>
|
||||
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
// RUN: circt-opt %s -mlir-print-op-generic -split-input-file -verify-diagnostics | circt-opt | circt-opt | FileCheck %s
|
||||
|
||||
// CHECK-LABEL: @check_vec
|
||||
// CHECK-LABEL: @check_array
|
||||
// CHECK-SAME: %[[C1:.*]]: i1, %[[C2:.*]]: i1, %[[C3:.*]]: i1
|
||||
// CHECK-SAME: %[[C4:.*]]: i32, %[[C5:.*]]: i32, %[[C6:.*]]: i32
|
||||
func @check_vec(%c1 : i1, %c2 : i1, %c3 : i1, %c4 : i32, %c5 : i32, %c6 : i32) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.vec %[[C1]], %[[C2]], %[[C3]] : vector<3xi1>
|
||||
%0 = llhd.vec %c1, %c2, %c3 : vector<3xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.vec %[[C4]], %[[C5]], %[[C6]] : vector<3xi32>
|
||||
%1 = llhd.vec %c4, %c5, %c6 : vector<3xi32>
|
||||
func @check_array(%c1 : i1, %c2 : i1, %c3 : i1, %c4 : i32, %c5 : i32, %c6 : i32) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.array %[[C1]], %[[C2]], %[[C3]] : !llhd.array<3xi1>
|
||||
%0 = llhd.array %c1, %c2, %c3 : !llhd.array<3xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.array %[[C4]], %[[C5]], %[[C6]] : !llhd.array<3xi32>
|
||||
%1 = llhd.array %c4, %c5, %c6 : !llhd.array<3xi32>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -5,14 +5,14 @@
|
|||
// CHECK-SAME: %[[C:.*]]: i8
|
||||
// CHECK-SAME: %[[SIG1:.*]]: !llhd.sig<i32>
|
||||
// CHECK-SAME: %[[SIG2:.*]]: !llhd.sig<i4>
|
||||
// CHECK-SAME: %[[SIGVEC4:.*]]: !llhd.sig<vector<4xi8>>
|
||||
// CHECK-SAME: %[[SIGVEC2:.*]]: !llhd.sig<vector<2xi8>>
|
||||
// CHECK-SAME: %[[VEC4:.*]]: vector<4xi8>
|
||||
// CHECK-SAME: %[[VEC2:.*]]: vector<2xi8>
|
||||
// CHECK-SAME: %[[SIGARRAY4:.*]]: !llhd.sig<!llhd.array<4xi8>>
|
||||
// CHECK-SAME: %[[SIGARRAY2:.*]]: !llhd.sig<!llhd.array<2xi8>>
|
||||
// CHECK-SAME: %[[ARRAY4:.*]]: !llhd.array<4xi8>
|
||||
// CHECK-SAME: %[[ARRAY2:.*]]: !llhd.array<2xi8>
|
||||
func @check_bitwise(%a : i64, %c : i8,
|
||||
%sig1 : !llhd.sig<i32>, %sig2 : !llhd.sig<i4>,
|
||||
%sigvec4: !llhd.sig<vector<4xi8>>, %sigvec2: !llhd.sig<vector<2xi8>>,
|
||||
%vec4: vector<4xi8>, %vec2: vector<2xi8>) {
|
||||
%sigarray4: !llhd.sig<!llhd.array<4xi8>>, %sigarray2: !llhd.sig<!llhd.array<2xi8>>,
|
||||
%array4: !llhd.array<4xi8>, %array2: !llhd.array<2xi8>) {
|
||||
|
||||
// CHECK-NEXT: %{{.*}} = llhd.not %[[A]] : i64
|
||||
%0 = llhd.not %a : i64
|
||||
|
|
@ -30,19 +30,19 @@ func @check_bitwise(%a : i64, %c : i8,
|
|||
%4 = llhd.shl %a, %a, %c : (i64, i64, i8) -> i64
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shl %[[SIG1]], %[[SIG2]], %[[C]] : (!llhd.sig<i32>, !llhd.sig<i4>, i8) -> !llhd.sig<i32>
|
||||
%5 = llhd.shl %sig1, %sig2, %c : (!llhd.sig<i32>, !llhd.sig<i4>, i8) -> !llhd.sig<i32>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shl %[[SIGVEC4]], %[[SIGVEC2]], %[[C]] : (!llhd.sig<vector<4xi8>>, !llhd.sig<vector<2xi8>>, i8) -> !llhd.sig<vector<4xi8>>
|
||||
%6 = llhd.shl %sigvec4, %sigvec2, %c : (!llhd.sig<vector<4xi8>>, !llhd.sig<vector<2xi8>>, i8) -> !llhd.sig<vector<4xi8>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shl %[[VEC4]], %[[VEC2]], %[[C]] : (vector<4xi8>, vector<2xi8>, i8) -> vector<4xi8>
|
||||
%7 = llhd.shl %vec4, %vec2, %c : (vector<4xi8>, vector<2xi8>, i8) -> vector<4xi8>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shl %[[SIGARRAY4]], %[[SIGARRAY2]], %[[C]] : (!llhd.sig<!llhd.array<4xi8>>, !llhd.sig<!llhd.array<2xi8>>, i8) -> !llhd.sig<!llhd.array<4xi8>>
|
||||
%6 = llhd.shl %sigarray4, %sigarray2, %c : (!llhd.sig<!llhd.array<4xi8>>, !llhd.sig<!llhd.array<2xi8>>, i8) -> !llhd.sig<!llhd.array<4xi8>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shl %[[ARRAY4]], %[[ARRAY2]], %[[C]] : (!llhd.array<4xi8>, !llhd.array<2xi8>, i8) -> !llhd.array<4xi8>
|
||||
%7 = llhd.shl %array4, %array2, %c : (!llhd.array<4xi8>, !llhd.array<2xi8>, i8) -> !llhd.array<4xi8>
|
||||
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shr %[[A]], %[[A]], %[[C]] : (i64, i64, i8) -> i64
|
||||
%8 = llhd.shr %a, %a, %c : (i64, i64, i8) -> i64
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shr %[[SIG1]], %[[SIG2]], %[[C]] : (!llhd.sig<i32>, !llhd.sig<i4>, i8) -> !llhd.sig<i32>
|
||||
%9 = llhd.shr %sig1, %sig2, %c : (!llhd.sig<i32>, !llhd.sig<i4>, i8) -> !llhd.sig<i32>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shr %[[SIGVEC4]], %[[SIGVEC2]], %[[C]] : (!llhd.sig<vector<4xi8>>, !llhd.sig<vector<2xi8>>, i8) -> !llhd.sig<vector<4xi8>>
|
||||
%10 = llhd.shr %sigvec4, %sigvec2, %c : (!llhd.sig<vector<4xi8>>, !llhd.sig<vector<2xi8>>, i8) -> !llhd.sig<vector<4xi8>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shr %[[VEC4]], %[[VEC2]], %[[C]] : (vector<4xi8>, vector<2xi8>, i8) -> vector<4xi8>
|
||||
%11 = llhd.shr %vec4, %vec2, %c : (vector<4xi8>, vector<2xi8>, i8) -> vector<4xi8>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shr %[[SIGARRAY4]], %[[SIGARRAY2]], %[[C]] : (!llhd.sig<!llhd.array<4xi8>>, !llhd.sig<!llhd.array<2xi8>>, i8) -> !llhd.sig<!llhd.array<4xi8>>
|
||||
%10 = llhd.shr %sigarray4, %sigarray2, %c : (!llhd.sig<!llhd.array<4xi8>>, !llhd.sig<!llhd.array<2xi8>>, i8) -> !llhd.sig<!llhd.array<4xi8>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.shr %[[ARRAY4]], %[[ARRAY2]], %[[C]] : (!llhd.array<4xi8>, !llhd.array<2xi8>, i8) -> !llhd.array<4xi8>
|
||||
%11 = llhd.shr %array4, %array2, %c : (!llhd.array<4xi8>, !llhd.array<2xi8>, i8) -> !llhd.array<4xi8>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
|
|||
|
|
@ -24,14 +24,14 @@ func @extract_slice_signals (%sI1 : !llhd.sig<i1>, %sI32 : !llhd.sig<i32>) -> ()
|
|||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @extract_slice_vector_signals
|
||||
// CHECK-SAME: %[[VEC5:.*]]: !llhd.sig<vector<5xi1>>
|
||||
// CHECK-SAME: %[[VEC1:.*]]: !llhd.sig<vector<1xi32>>
|
||||
func @extract_slice_vector_signals (%vec5 : !llhd.sig<vector<5xi1>>, %vec1 : !llhd.sig<vector<1xi32>>) -> () {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_slice %[[VEC5]], 2 : !llhd.sig<vector<5xi1>> -> !llhd.sig<vector<3xi1>>
|
||||
%0 = llhd.extract_slice %vec5, 2 : !llhd.sig<vector<5xi1>> -> !llhd.sig<vector<3xi1>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_slice %[[VEC1]], 0 : !llhd.sig<vector<1xi32>> -> !llhd.sig<vector<1xi32>>
|
||||
%1 = llhd.extract_slice %vec1, 0 : !llhd.sig<vector<1xi32>> -> !llhd.sig<vector<1xi32>>
|
||||
// CHECK-LABEL: @extract_slice_array_signals
|
||||
// CHECK-SAME: %[[ARRAY5:.*]]: !llhd.sig<!llhd.array<5xi1>>
|
||||
// CHECK-SAME: %[[ARRAY1:.*]]: !llhd.sig<!llhd.array<1xi32>>
|
||||
func @extract_slice_array_signals (%array5 : !llhd.sig<!llhd.array<5xi1>>, %array1 : !llhd.sig<!llhd.array<1xi32>>) -> () {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_slice %[[ARRAY5]], 2 : !llhd.sig<!llhd.array<5xi1>> -> !llhd.sig<!llhd.array<3xi1>>
|
||||
%0 = llhd.extract_slice %array5, 2 : !llhd.sig<!llhd.array<5xi1>> -> !llhd.sig<!llhd.array<3xi1>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_slice %[[ARRAY1]], 0 : !llhd.sig<!llhd.array<1xi32>> -> !llhd.sig<!llhd.array<1xi32>>
|
||||
%1 = llhd.extract_slice %array1, 0 : !llhd.sig<!llhd.array<1xi32>> -> !llhd.sig<!llhd.array<1xi32>>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -64,42 +64,42 @@ func @dyn_extract_slice_signals (%sI1 : !llhd.sig<i1>, %sI32 : !llhd.sig<i32>, %
|
|||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @dyn_extract_slice_vector_signals
|
||||
// CHECK-SAME: %[[SI1:.*]]: !llhd.sig<vector<5xi1>>,
|
||||
// CHECK-SAME: %[[SI32:.*]]: !llhd.sig<vector<1xi32>>,
|
||||
// CHECK-LABEL: @dyn_extract_slice_array_signals
|
||||
// CHECK-SAME: %[[SI1:.*]]: !llhd.sig<!llhd.array<5xi1>>,
|
||||
// CHECK-SAME: %[[SI32:.*]]: !llhd.sig<!llhd.array<1xi32>>,
|
||||
// CHECK-SAME: %[[IND0:.*]]: i5,
|
||||
// CHECK-SAME: %[[IND1:.*]]: i10
|
||||
func @dyn_extract_slice_vector_signals (%sI1 : !llhd.sig<vector<5xi1>>, %sI32 : !llhd.sig<vector<1xi32>>, %i0 : i5, %i1 : i10) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_slice %[[SI1]], %[[IND0]] : (!llhd.sig<vector<5xi1>>, i5) -> !llhd.sig<vector<2xi1>>
|
||||
%0 = llhd.dyn_extract_slice %sI1, %i0 : (!llhd.sig<vector<5xi1>>, i5) -> !llhd.sig<vector<2xi1>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_slice %[[SI32]], %[[IND1]] : (!llhd.sig<vector<1xi32>>, i10) -> !llhd.sig<vector<1xi32>>
|
||||
%1 = llhd.dyn_extract_slice %sI32, %i1 : (!llhd.sig<vector<1xi32>>, i10) -> !llhd.sig<vector<1xi32>>
|
||||
func @dyn_extract_slice_array_signals (%sI1 : !llhd.sig<!llhd.array<5xi1>>, %sI32 : !llhd.sig<!llhd.array<1xi32>>, %i0 : i5, %i1 : i10) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_slice %[[SI1]], %[[IND0]] : (!llhd.sig<!llhd.array<5xi1>>, i5) -> !llhd.sig<!llhd.array<2xi1>>
|
||||
%0 = llhd.dyn_extract_slice %sI1, %i0 : (!llhd.sig<!llhd.array<5xi1>>, i5) -> !llhd.sig<!llhd.array<2xi1>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_slice %[[SI32]], %[[IND1]] : (!llhd.sig<!llhd.array<1xi32>>, i10) -> !llhd.sig<!llhd.array<1xi32>>
|
||||
%1 = llhd.dyn_extract_slice %sI32, %i1 : (!llhd.sig<!llhd.array<1xi32>>, i10) -> !llhd.sig<!llhd.array<1xi32>>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @dyn_extract_slice_vec
|
||||
// CHECK-SAME: %[[V1:.*]]: vector<1xi1>,
|
||||
// CHECK-SAME: %[[V10:.*]]: vector<10xi1>,
|
||||
// CHECK-SAME: %[[V1:.*]]: !llhd.array<1xi1>,
|
||||
// CHECK-SAME: %[[V10:.*]]: !llhd.array<10xi1>,
|
||||
// CHECK-SAME: %[[IND0:.*]]: i5,
|
||||
// CHECK-SAME: %[[IND1:.*]]: i10
|
||||
func @dyn_extract_slice_vec(%v1 : vector<1xi1>, %v10 : vector<10xi1>, %i0 : i5, %i1 : i10) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_slice %[[V1]], %[[IND0]] : (vector<1xi1>, i5) -> vector<1xi1>
|
||||
%0 = llhd.dyn_extract_slice %v1, %i0 : (vector<1xi1>, i5) -> vector<1xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_slice %[[V10]], %[[IND1]] : (vector<10xi1>, i10) -> vector<5xi1>
|
||||
%1 = llhd.dyn_extract_slice %v10, %i1 : (vector<10xi1>, i10) -> vector<5xi1>
|
||||
func @dyn_extract_slice_vec(%v1 : !llhd.array<1xi1>, %v10 : !llhd.array<10xi1>, %i0 : i5, %i1 : i10) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_slice %[[V1]], %[[IND0]] : (!llhd.array<1xi1>, i5) -> !llhd.array<1xi1>
|
||||
%0 = llhd.dyn_extract_slice %v1, %i0 : (!llhd.array<1xi1>, i5) -> !llhd.array<1xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_slice %[[V10]], %[[IND1]] : (!llhd.array<10xi1>, i10) -> !llhd.array<5xi1>
|
||||
%1 = llhd.dyn_extract_slice %v10, %i1 : (!llhd.array<10xi1>, i10) -> !llhd.array<5xi1>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @extract_element_vectors
|
||||
// CHECK-SAME: %[[VEC1:.*]]: vector<1xi1>
|
||||
// CHECK-SAME: %[[VEC5:.*]]: vector<5xi32>
|
||||
func @extract_element_vectors(%vec1 : vector<1xi1>, %vec5 : vector<5xi32>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_element %[[VEC1]], 0 : vector<1xi1> -> i1
|
||||
%0 = llhd.extract_element %vec1, 0 : vector<1xi1> -> i1
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_element %[[VEC5]], 4 : vector<5xi32> -> i32
|
||||
%1 = llhd.extract_element %vec5, 4 : vector<5xi32> -> i32
|
||||
// CHECK-LABEL: @extract_element_arrays
|
||||
// CHECK-SAME: %[[ARRAY1:.*]]: !llhd.array<1xi1>
|
||||
// CHECK-SAME: %[[ARRAY5:.*]]: !llhd.array<5xi32>
|
||||
func @extract_element_arrays(%array1 : !llhd.array<1xi1>, %array5 : !llhd.array<5xi32>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_element %[[ARRAY1]], 0 : !llhd.array<1xi1> -> i1
|
||||
%0 = llhd.extract_element %array1, 0 : !llhd.array<1xi1> -> i1
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_element %[[ARRAY5]], 4 : !llhd.array<5xi32> -> i32
|
||||
%1 = llhd.extract_element %array5, 4 : !llhd.array<5xi32> -> i32
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -115,14 +115,14 @@ func @extract_element_tuples(%tup : tuple<i1, i2, i3>) {
|
|||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @extract_element_signals_of_vectors
|
||||
// CHECK-SAME: %[[VEC1:.*]]: !llhd.sig<vector<1xi1>>
|
||||
// CHECK-SAME: %[[VEC5:.*]]: !llhd.sig<vector<5xi32>>
|
||||
func @extract_element_signals_of_vectors(%vec1 : !llhd.sig<vector<1xi1>>, %vec5 : !llhd.sig<vector<5xi32>>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_element %[[VEC1]], 0 : !llhd.sig<vector<1xi1>> -> !llhd.sig<i1>
|
||||
%0 = llhd.extract_element %vec1, 0 : !llhd.sig<vector<1xi1>> -> !llhd.sig<i1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_element %[[VEC5]], 4 : !llhd.sig<vector<5xi32>> -> !llhd.sig<i32>
|
||||
%1 = llhd.extract_element %vec5, 4 : !llhd.sig<vector<5xi32>> -> !llhd.sig<i32>
|
||||
// CHECK-LABEL: @extract_element_signals_of_arrays
|
||||
// CHECK-SAME: %[[ARRAY1:.*]]: !llhd.sig<!llhd.array<1xi1>>
|
||||
// CHECK-SAME: %[[ARRAY5:.*]]: !llhd.sig<!llhd.array<5xi32>>
|
||||
func @extract_element_signals_of_arrays(%array1 : !llhd.sig<!llhd.array<1xi1>>, %array5 : !llhd.sig<!llhd.array<5xi32>>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_element %[[ARRAY1]], 0 : !llhd.sig<!llhd.array<1xi1>> -> !llhd.sig<i1>
|
||||
%0 = llhd.extract_element %array1, 0 : !llhd.sig<!llhd.array<1xi1>> -> !llhd.sig<i1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.extract_element %[[ARRAY5]], 4 : !llhd.sig<!llhd.array<5xi32>> -> !llhd.sig<i32>
|
||||
%1 = llhd.extract_element %array5, 4 : !llhd.sig<!llhd.array<5xi32>> -> !llhd.sig<i32>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -138,64 +138,64 @@ func @extract_element_signals_of_tuples(%tup : !llhd.sig<tuple<i1, i2, i3>>) {
|
|||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @dyn_extract_element_vectors
|
||||
// CHECK-LABEL: @dyn_extract_element_arrays
|
||||
// CHECK-SAME: %[[INDEX:.*]]: i32
|
||||
// CHECK-SAME: %[[VEC1:.*]]: vector<1xi1>
|
||||
// CHECK-SAME: %[[VEC5:.*]]: vector<5xi32>
|
||||
func @dyn_extract_element_vectors(%index : i32, %vec1 : vector<1xi1>, %vec5 : vector<5xi32>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_element %[[VEC1]], %[[INDEX]] : (vector<1xi1>, i32) -> i1
|
||||
%0 = llhd.dyn_extract_element %vec1, %index : (vector<1xi1>, i32) -> i1
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_element %[[VEC5]], %[[INDEX]] : (vector<5xi32>, i32) -> i32
|
||||
%1 = llhd.dyn_extract_element %vec5, %index : (vector<5xi32>, i32) -> i32
|
||||
// CHECK-SAME: %[[ARRAY1:.*]]: !llhd.array<1xi1>
|
||||
// CHECK-SAME: %[[ARRAY5:.*]]: !llhd.array<5xi32>
|
||||
func @dyn_extract_element_arrays(%index : i32, %array1 : !llhd.array<1xi1>, %array5 : !llhd.array<5xi32>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_element %[[ARRAY1]], %[[INDEX]] : (!llhd.array<1xi1>, i32) -> i1
|
||||
%0 = llhd.dyn_extract_element %array1, %index : (!llhd.array<1xi1>, i32) -> i1
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_element %[[ARRAY5]], %[[INDEX]] : (!llhd.array<5xi32>, i32) -> i32
|
||||
%1 = llhd.dyn_extract_element %array5, %index : (!llhd.array<5xi32>, i32) -> i32
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @dyn_extract_element_signals_of_vectors
|
||||
// CHECK-LABEL: @dyn_extract_element_signals_of_arrays
|
||||
// CHECK-SAME: %[[INDEX:.*]]: i32
|
||||
// CHECK-SAME: %[[VEC1:.*]]: !llhd.sig<vector<1xi1>>
|
||||
// CHECK-SAME: %[[VEC5:.*]]: !llhd.sig<vector<5xi32>>
|
||||
func @dyn_extract_element_signals_of_vectors(%index : i32, %vec1 : !llhd.sig<vector<1xi1>>, %vec5 : !llhd.sig<vector<5xi32>>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_element %[[VEC1]], %[[INDEX]] : (!llhd.sig<vector<1xi1>>, i32) -> !llhd.sig<i1>
|
||||
%0 = llhd.dyn_extract_element %vec1, %index : (!llhd.sig<vector<1xi1>>, i32) -> !llhd.sig<i1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_element %[[VEC5]], %[[INDEX]] : (!llhd.sig<vector<5xi32>>, i32) -> !llhd.sig<i32>
|
||||
%1 = llhd.dyn_extract_element %vec5, %index : (!llhd.sig<vector<5xi32>>, i32) -> !llhd.sig<i32>
|
||||
// CHECK-SAME: %[[ARRAY1:.*]]: !llhd.sig<!llhd.array<1xi1>>
|
||||
// CHECK-SAME: %[[ARRAY5:.*]]: !llhd.sig<!llhd.array<5xi32>>
|
||||
func @dyn_extract_element_signals_of_arrays(%index : i32, %array1 : !llhd.sig<!llhd.array<1xi1>>, %array5 : !llhd.sig<!llhd.array<5xi32>>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_element %[[ARRAY1]], %[[INDEX]] : (!llhd.sig<!llhd.array<1xi1>>, i32) -> !llhd.sig<i1>
|
||||
%0 = llhd.dyn_extract_element %array1, %index : (!llhd.sig<!llhd.array<1xi1>>, i32) -> !llhd.sig<i1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.dyn_extract_element %[[ARRAY5]], %[[INDEX]] : (!llhd.sig<!llhd.array<5xi32>>, i32) -> !llhd.sig<i32>
|
||||
%1 = llhd.dyn_extract_element %array5, %index : (!llhd.sig<!llhd.array<5xi32>>, i32) -> !llhd.sig<i32>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_vector_to_signal(%vec : vector<3xi32>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or vectors with the same element type}}
|
||||
%0 = llhd.extract_slice %vec, 0 : vector<3xi32> -> !llhd.sig<vector<3xi32>>
|
||||
func @illegal_array_to_signal(%array : !llhd.array<3xi32>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or arrays with the same element type}}
|
||||
%0 = llhd.extract_slice %array, 0 : !llhd.array<3xi32> -> !llhd.sig<!llhd.array<3xi32>>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_signal_to_vector(%sig : !llhd.sig<vector<3xi32>>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or vectors with the same element type}}
|
||||
%0 = llhd.extract_slice %sig, 0 : !llhd.sig<vector<3xi32>> -> vector<3xi32>
|
||||
func @illegal_signal_to_array(%sig : !llhd.sig<!llhd.array<3xi32>>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or arrays with the same element type}}
|
||||
%0 = llhd.extract_slice %sig, 0 : !llhd.sig<!llhd.array<3xi32>> -> !llhd.array<3xi32>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_vector_element_type_mismatch(%sig : !llhd.sig<vector<3xi32>>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or vectors with the same element type}}
|
||||
%0 = llhd.extract_slice %sig, 0 : !llhd.sig<vector<3xi32>> -> !llhd.sig<vector<2xi1>>
|
||||
func @illegal_array_element_type_mismatch(%sig : !llhd.sig<!llhd.array<3xi32>>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or arrays with the same element type}}
|
||||
%0 = llhd.extract_slice %sig, 0 : !llhd.sig<!llhd.array<3xi32>> -> !llhd.sig<!llhd.array<2xi1>>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_result_vector_too_big(%sig : !llhd.sig<vector<3xi32>>) {
|
||||
func @illegal_result_array_too_big(%sig : !llhd.sig<!llhd.array<3xi32>>) {
|
||||
// expected-error @+1 {{'start' + size of the slice have to be smaller or equal to the 'target' size}}
|
||||
%0 = llhd.extract_slice %sig, 0 : !llhd.sig<vector<3xi32>> -> !llhd.sig<vector<4xi32>>
|
||||
%0 = llhd.extract_slice %sig, 0 : !llhd.sig<!llhd.array<3xi32>> -> !llhd.sig<!llhd.array<4xi32>>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -203,7 +203,7 @@ func @illegal_result_vector_too_big(%sig : !llhd.sig<vector<3xi32>>) {
|
|||
// -----
|
||||
|
||||
func @illegal_int_to_sig(%c : i32) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or vectors with the same element type}}
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or arrays with the same element type}}
|
||||
%0 = llhd.extract_slice %c, 0 : i32 -> !llhd.sig<i10>
|
||||
|
||||
return
|
||||
|
|
@ -212,7 +212,7 @@ func @illegal_int_to_sig(%c : i32) {
|
|||
// -----
|
||||
|
||||
func @illegal_sig_to_int(%s : !llhd.sig<i32>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or vectors with the same element type}}
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'result' have to be both either signless integers, signals or arrays with the same element type}}
|
||||
%0 = llhd.extract_slice %s, 0 : !llhd.sig<i32> -> i10
|
||||
|
||||
return
|
||||
|
|
@ -229,36 +229,36 @@ func @illegal_out_too_big(%c : i32) {
|
|||
|
||||
// -----
|
||||
|
||||
func @illegal_vector_to_signal(%vec : vector<3xi32>, %index : i32) {
|
||||
func @illegal_array_to_signal(%array : !llhd.array<3xi32>, %index : i32) {
|
||||
// expected-error @+1 {{'target' and 'result' types have to match apart from their width}}
|
||||
%0 = llhd.dyn_extract_slice %vec, %index : (vector<3xi32>, i32) -> !llhd.sig<vector<3xi32>>
|
||||
%0 = llhd.dyn_extract_slice %array, %index : (!llhd.array<3xi32>, i32) -> !llhd.sig<!llhd.array<3xi32>>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_signal_to_vector(%sig : !llhd.sig<vector<3xi32>>, %index: i32) {
|
||||
func @illegal_signal_to_array(%sig : !llhd.sig<!llhd.array<3xi32>>, %index: i32) {
|
||||
// expected-error @+1 {{'target' and 'result' types have to match apart from their width}}
|
||||
%0 = llhd.dyn_extract_slice %sig, %index : (!llhd.sig<vector<3xi32>>, i32) -> vector<3xi32>
|
||||
%0 = llhd.dyn_extract_slice %sig, %index : (!llhd.sig<!llhd.array<3xi32>>, i32) -> !llhd.array<3xi32>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_vector_element_type_mismatch(%sig : !llhd.sig<vector<3xi32>>, %index : i32) {
|
||||
func @illegal_array_element_type_mismatch(%sig : !llhd.sig<!llhd.array<3xi32>>, %index : i32) {
|
||||
// expected-error @+1 {{'target' and 'result' types have to match apart from their width}}
|
||||
%0 = llhd.dyn_extract_slice %sig, %index : (!llhd.sig<vector<3xi32>>, i32) -> !llhd.sig<vector<2xi1>>
|
||||
%0 = llhd.dyn_extract_slice %sig, %index : (!llhd.sig<!llhd.array<3xi32>>, i32) -> !llhd.sig<!llhd.array<2xi1>>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_result_vector_too_big(%sig : !llhd.sig<vector<3xi32>>, %index : i32) {
|
||||
func @illegal_result_array_too_big(%sig : !llhd.sig<!llhd.array<3xi32>>, %index : i32) {
|
||||
// expected-error @+1 {{the result width cannot be larger than the target operand width}}
|
||||
%0 = llhd.dyn_extract_slice %sig, %index : (!llhd.sig<vector<3xi32>>, i32) -> !llhd.sig<vector<4xi32>>
|
||||
%0 = llhd.dyn_extract_slice %sig, %index : (!llhd.sig<!llhd.array<3xi32>>, i32) -> !llhd.sig<!llhd.array<4xi32>>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -283,18 +283,18 @@ func @dyn_extract_slice_illegal_out_too_wide(%c : i32, %i : i1) {
|
|||
|
||||
// -----
|
||||
|
||||
func @dyn_extract_slice_illegal_vec_element_conversion(%c : vector<1xi1>, %i : i1) {
|
||||
func @dyn_extract_slice_illegal_vec_element_conversion(%c : !llhd.array<1xi1>, %i : i1) {
|
||||
// expected-error @+1 {{'llhd.dyn_extract_slice' op failed to verify that 'target' and 'result' types have to match apart from their width}}
|
||||
%0 = llhd.dyn_extract_slice %c, %i : (vector<1xi1>, i1) -> vector<1xi10>
|
||||
%0 = llhd.dyn_extract_slice %c, %i : (!llhd.array<1xi1>, i1) -> !llhd.array<1xi10>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @extract_element_vector_index_out_of_bounds(%vec : vector<3xi1>) {
|
||||
func @extract_element_array_index_out_of_bounds(%array : !llhd.array<3xi1>) {
|
||||
// expected-error @+1 {{'index' has to be smaller than the width of the 'target' type}}
|
||||
%0 = llhd.extract_element %vec, 3 : vector<3xi1> -> i1
|
||||
%0 = llhd.extract_element %array, 3 : !llhd.array<3xi1> -> i1
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -310,9 +310,9 @@ func @extract_element_tuple_index_out_of_bounds(%tup : tuple<i1, i2, i3>) {
|
|||
|
||||
// -----
|
||||
|
||||
func @extract_element_vector_type_mismatch(%vec : vector<3xi1>) {
|
||||
func @extract_element_array_type_mismatch(%array : !llhd.array<3xi1>) {
|
||||
// expected-error @+1 {{'result' type must match the type of 'target' at position 'index', or in case 'target' is a signal, it must be a signal of the underlying type of 'target' at position 'index'}}
|
||||
%0 = llhd.extract_element %vec, 0 : vector<3xi1> -> i2
|
||||
%0 = llhd.extract_element %array, 0 : !llhd.array<3xi1> -> i2
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -346,27 +346,27 @@ func @extract_element_illegal_signal_alias(%sig : !llhd.sig<tuple<i1, i2, i3>>)
|
|||
|
||||
// -----
|
||||
|
||||
func @dyn_extract_element_vector_type_mismatch(%index : i2, %vec : vector<3xi1>) {
|
||||
// expected-error @+1 {{'result' must be the element type of the 'target' vector, in case 'target' is a signal of a vector, 'result' also is a signal of the vector element type}}
|
||||
%0 = llhd.dyn_extract_element %vec, %index : (vector<3xi1>, i2) -> i2
|
||||
func @dyn_extract_element_array_type_mismatch(%index : i2, %array : !llhd.array<3xi1>) {
|
||||
// expected-error @+1 {{'result' must be the element type of the 'target' array, in case 'target' is a signal of an array, 'result' also is a signal of the array element type}}
|
||||
%0 = llhd.dyn_extract_element %array, %index : (!llhd.array<3xi1>, i2) -> i2
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @dyn_extract_element_signal_type_mismatch(%index : i2, %sig : !llhd.sig<vector<3xi1>>) {
|
||||
// expected-error @+1 {{'result' must be the element type of the 'target' vector, in case 'target' is a signal of a vector, 'result' also is a signal of the vector element type}}
|
||||
%0 = llhd.dyn_extract_element %sig, %index : (!llhd.sig<vector<3xi1>>, i2) -> !llhd.sig<i2>
|
||||
func @dyn_extract_element_signal_type_mismatch(%index : i2, %sig : !llhd.sig<!llhd.array<3xi1>>) {
|
||||
// expected-error @+1 {{'result' must be the element type of the 'target' array, in case 'target' is a signal of an array, 'result' also is a signal of the array element type}}
|
||||
%0 = llhd.dyn_extract_element %sig, %index : (!llhd.sig<!llhd.array<3xi1>>, i2) -> !llhd.sig<i2>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @dyn_extract_element_illegal_signal_alias(%index : i2, %sig : !llhd.sig<vector<3xi1>>) {
|
||||
// expected-error @+1 {{'result' must be the element type of the 'target' vector, in case 'target' is a signal of a vector, 'result' also is a signal of the vector element type}}
|
||||
%0 = llhd.dyn_extract_element %sig, %index : (!llhd.sig<vector<3xi1>>, i2) -> i1
|
||||
func @dyn_extract_element_illegal_signal_alias(%index : i2, %sig : !llhd.sig<!llhd.array<3xi1>>) {
|
||||
// expected-error @+1 {{'result' must be the element type of the 'target' array, in case 'target' is a signal of an array, 'result' also is a signal of the array element type}}
|
||||
%0 = llhd.dyn_extract_element %sig, %index : (!llhd.sig<!llhd.array<3xi1>>, i2) -> i1
|
||||
|
||||
return
|
||||
}
|
||||
|
|
|
|||
|
|
@ -12,14 +12,14 @@ func @insert_slice_integers(%cI1 : i1, %cI32 : i32) {
|
|||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @insert_slice_vectors
|
||||
// CHECK-SAME: %[[VEC2:.*]]: vector<2xi1>
|
||||
// CHECK-SAME: %[[VEC5:.*]]: vector<5xi1>
|
||||
func @insert_slice_vectors(%vec2 : vector<2xi1>, %vec5 : vector<5xi1>) -> () {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.insert_slice %[[VEC5]], %[[VEC2]], 3 : vector<5xi1>, vector<2xi1>
|
||||
%0 = llhd.insert_slice %vec5, %vec2, 3 : vector<5xi1>, vector<2xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.insert_slice %[[VEC2]], %[[VEC2]], 0 : vector<2xi1>, vector<2xi1>
|
||||
%1 = llhd.insert_slice %vec2, %vec2, 0 : vector<2xi1>, vector<2xi1>
|
||||
// CHECK-LABEL: @insert_slice_arrays
|
||||
// CHECK-SAME: %[[ARRAY2:.*]]: !llhd.array<2xi1>
|
||||
// CHECK-SAME: %[[ARRAY5:.*]]: !llhd.array<5xi1>
|
||||
func @insert_slice_arrays(%array2 : !llhd.array<2xi1>, %array5 : !llhd.array<5xi1>) -> () {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.insert_slice %[[ARRAY5]], %[[ARRAY2]], 3 : !llhd.array<5xi1>, !llhd.array<2xi1>
|
||||
%0 = llhd.insert_slice %array5, %array2, 3 : !llhd.array<5xi1>, !llhd.array<2xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.insert_slice %[[ARRAY2]], %[[ARRAY2]], 0 : !llhd.array<2xi1>, !llhd.array<2xi1>
|
||||
%1 = llhd.insert_slice %array2, %array2, 0 : !llhd.array<2xi1>, !llhd.array<2xi1>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -37,34 +37,34 @@ func @insert_element_tuples(%tup : tuple<i1, i8>, %i1 : i1, %i8 : i8) {
|
|||
return
|
||||
}
|
||||
|
||||
// CHECK-LABEL: @insert_element_vectors
|
||||
// CHECK-SAME: %[[V1:.*]]: vector<4xi1>,
|
||||
// CHECK-SAME: %[[V8:.*]]: vector<4xi8>,
|
||||
// CHECK-LABEL: @insert_element_arrays
|
||||
// CHECK-SAME: %[[V1:.*]]: !llhd.array<4xi1>,
|
||||
// CHECK-SAME: %[[V8:.*]]: !llhd.array<4xi8>,
|
||||
// CHECK-SAME: %[[I1:.*]]: i1,
|
||||
// CHECK-SAME: %[[I8:.*]]: i8
|
||||
func @insert_element_vectors(%v1 : vector<4xi1>, %v8 : vector<4xi8>, %i1 : i1, %i8 : i8) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.insert_element %[[V1]], %[[I1]], 0 : vector<4xi1>, i1
|
||||
%0 = llhd.insert_element %v1, %i1, 0 : vector<4xi1>, i1
|
||||
// CHECK-NEXT: %{{.*}} = llhd.insert_element %[[V8]], %[[I8]], 2 : vector<4xi8>, i8
|
||||
%1 = llhd.insert_element %v8, %i8, 2 : vector<4xi8>, i8
|
||||
func @insert_element_arrays(%v1 : !llhd.array<4xi1>, %v8 : !llhd.array<4xi8>, %i1 : i1, %i8 : i8) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.insert_element %[[V1]], %[[I1]], 0 : !llhd.array<4xi1>, i1
|
||||
%0 = llhd.insert_element %v1, %i1, 0 : !llhd.array<4xi1>, i1
|
||||
// CHECK-NEXT: %{{.*}} = llhd.insert_element %[[V8]], %[[I8]], 2 : !llhd.array<4xi8>, i8
|
||||
%1 = llhd.insert_element %v8, %i8, 2 : !llhd.array<4xi8>, i8
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_kind(%c : i32, %vec : vector<2xi32>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'slice' have to be both either signless integers or vectors with the same element type}}
|
||||
%0 = llhd.insert_slice %vec, %c, 0 : vector<2xi32>, i32
|
||||
func @illegal_kind(%c : i32, %array : !llhd.array<2xi32>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'slice' have to be both either signless integers or arrays with the same element type}}
|
||||
%0 = llhd.insert_slice %array, %c, 0 : !llhd.array<2xi32>, i32
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @illegal_elemental_type(%slice : vector<1xi1>, %vec : vector<2xi32>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'slice' have to be both either signless integers or vectors with the same element type}}
|
||||
%0 = llhd.insert_slice %vec, %slice, 0 : vector<2xi32>, vector<1xi1>
|
||||
func @illegal_elemental_type(%slice : !llhd.array<1xi1>, %array : !llhd.array<2xi32>) {
|
||||
// expected-error @+1 {{failed to verify that 'target' and 'slice' have to be both either signless integers or arrays with the same element type}}
|
||||
%0 = llhd.insert_slice %array, %slice, 0 : !llhd.array<2xi32>, !llhd.array<1xi1>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
@ -80,27 +80,27 @@ func @insert_slice_illegal_start_index_int(%slice : i16, %c : i32) {
|
|||
|
||||
// -----
|
||||
|
||||
func @insert_slice_illegal_start_index_vector(%slice : vector<2xi1>, %vec : vector<3xi1>) {
|
||||
func @insert_slice_illegal_start_index_array(%slice : !llhd.array<2xi1>, %array : !llhd.array<3xi1>) {
|
||||
// expected-error @+1 {{failed to verify that 'start' + size of the 'slice' have to be smaller or equal to the 'target' size}}
|
||||
%0 = llhd.insert_slice %vec, %slice, 2 : vector<3xi1>, vector<2xi1>
|
||||
%0 = llhd.insert_slice %array, %slice, 2 : !llhd.array<3xi1>, !llhd.array<2xi1>
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @insert_element_index_out_of_bounds(%e : i1, %vec : vector<3xi1>) {
|
||||
func @insert_element_index_out_of_bounds(%e : i1, %array : !llhd.array<3xi1>) {
|
||||
// expected-error @+1 {{failed to verify that 'index' has to be smaller than the 'target' size}}
|
||||
%0 = llhd.insert_element %vec, %e, 3 : vector<3xi1>, i1
|
||||
%0 = llhd.insert_element %array, %e, 3 : !llhd.array<3xi1>, i1
|
||||
|
||||
return
|
||||
}
|
||||
|
||||
// -----
|
||||
|
||||
func @insert_element_type_mismatch_vector(%e : i2, %vec : vector<3xi1>) {
|
||||
func @insert_element_type_mismatch_array(%e : i2, %array : !llhd.array<3xi1>) {
|
||||
// expected-error @+1 {{failed to verify that 'element' type has to match type at 'index' of 'target'}}
|
||||
%0 = llhd.insert_element %vec, %e, 0 : vector<3xi1>, i2
|
||||
%0 = llhd.insert_element %array, %e, 0 : !llhd.array<3xi1>, i2
|
||||
|
||||
return
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,13 +2,13 @@
|
|||
|
||||
// CHECK-LABEL: @check_var
|
||||
// CHECK-SAME: %[[INT:.*]]: i32
|
||||
// CHECK-SAME: %[[VEC:.*]]: vector<3xi1>
|
||||
// CHECK-SAME: %[[ARRAY:.*]]: !llhd.array<3xi1>
|
||||
// CHECK-SAME: %[[TUP:.*]]: tuple<i1, i2, i3>
|
||||
func @check_var(%int : i32, %vec : vector<3xi1>, %tup : tuple<i1, i2, i3>) {
|
||||
func @check_var(%int : i32, %array : !llhd.array<3xi1>, %tup : tuple<i1, i2, i3>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.var %[[INT]] : i32
|
||||
%0 = llhd.var %int : i32
|
||||
// CHECK-NEXT: %{{.*}} = llhd.var %[[VEC]] : vector<3xi1>
|
||||
%1 = llhd.var %vec : vector<3xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.var %[[ARRAY]] : !llhd.array<3xi1>
|
||||
%1 = llhd.var %array : !llhd.array<3xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.var %[[TUP]] : tuple<i1, i2, i3>
|
||||
%2 = llhd.var %tup : tuple<i1, i2, i3>
|
||||
|
||||
|
|
@ -17,13 +17,13 @@ func @check_var(%int : i32, %vec : vector<3xi1>, %tup : tuple<i1, i2, i3>) {
|
|||
|
||||
// CHECK-LABEL: @check_load
|
||||
// CHECK-SAME: %[[INT:.*]]: !llhd.ptr<i32>
|
||||
// CHECK-SAME: %[[VEC:.*]]: !llhd.ptr<vector<3xi1>>
|
||||
// CHECK-SAME: %[[ARRAY:.*]]: !llhd.ptr<!llhd.array<3xi1>>
|
||||
// CHECK-SAME: %[[TUP:.*]]: !llhd.ptr<tuple<i1, i2, i3>>
|
||||
func @check_load(%int : !llhd.ptr<i32>, %vec : !llhd.ptr<vector<3xi1>>, %tup : !llhd.ptr<tuple<i1, i2, i3>>) {
|
||||
func @check_load(%int : !llhd.ptr<i32>, %array : !llhd.ptr<!llhd.array<3xi1>>, %tup : !llhd.ptr<tuple<i1, i2, i3>>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.load %[[INT]] : !llhd.ptr<i32>
|
||||
%0 = llhd.load %int : !llhd.ptr<i32>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.load %[[VEC]] : !llhd.ptr<vector<3xi1>>
|
||||
%1 = llhd.load %vec : !llhd.ptr<vector<3xi1>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.load %[[ARRAY]] : !llhd.ptr<!llhd.array<3xi1>>
|
||||
%1 = llhd.load %array : !llhd.ptr<!llhd.array<3xi1>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.load %[[TUP]] : !llhd.ptr<tuple<i1, i2, i3>>
|
||||
%2 = llhd.load %tup : !llhd.ptr<tuple<i1, i2, i3>>
|
||||
|
||||
|
|
@ -33,15 +33,15 @@ func @check_load(%int : !llhd.ptr<i32>, %vec : !llhd.ptr<vector<3xi1>>, %tup : !
|
|||
// CHECK-LABEL: @check_store
|
||||
// CHECK-SAME: %[[INT:.*]]: !llhd.ptr<i32>
|
||||
// CHECK-SAME: %[[INTC:.*]]: i32
|
||||
// CHECK-SAME: %[[VEC:.*]]: !llhd.ptr<vector<3xi1>>
|
||||
// CHECK-SAME: %[[VECC:.*]]: vector<3xi1>
|
||||
// CHECK-SAME: %[[ARRAY:.*]]: !llhd.ptr<!llhd.array<3xi1>>
|
||||
// CHECK-SAME: %[[ARRAYC:.*]]: !llhd.array<3xi1>
|
||||
// CHECK-SAME: %[[TUP:.*]]: !llhd.ptr<tuple<i1, i2, i3>>
|
||||
// CHECK-SAME: %[[TUPC:.*]]: tuple<i1, i2, i3>
|
||||
func @check_store(%int : !llhd.ptr<i32>, %intC : i32 , %vec : !llhd.ptr<vector<3xi1>>, %vecC : vector<3xi1>, %tup : !llhd.ptr<tuple<i1, i2, i3>>, %tupC : tuple<i1, i2, i3>) {
|
||||
func @check_store(%int : !llhd.ptr<i32>, %intC : i32 , %array : !llhd.ptr<!llhd.array<3xi1>>, %arrayC : !llhd.array<3xi1>, %tup : !llhd.ptr<tuple<i1, i2, i3>>, %tupC : tuple<i1, i2, i3>) {
|
||||
// CHECK-NEXT: llhd.store %[[INT]], %[[INTC]] : !llhd.ptr<i32>
|
||||
llhd.store %int, %intC : !llhd.ptr<i32>
|
||||
// CHECK-NEXT: llhd.store %[[VEC]], %[[VECC]] : !llhd.ptr<vector<3xi1>>
|
||||
llhd.store %vec, %vecC : !llhd.ptr<vector<3xi1>>
|
||||
// CHECK-NEXT: llhd.store %[[ARRAY]], %[[ARRAYC]] : !llhd.ptr<!llhd.array<3xi1>>
|
||||
llhd.store %array, %arrayC : !llhd.ptr<!llhd.array<3xi1>>
|
||||
// CHECK-NEXT: llhd.store %[[TUP]], %[[TUPC]] : !llhd.ptr<tuple<i1, i2, i3>>
|
||||
llhd.store %tup, %tupC : !llhd.ptr<tuple<i1, i2, i3>>
|
||||
|
||||
|
|
|
|||
|
|
@ -15,24 +15,24 @@ llhd.entity @check_sig_inst () -> () {
|
|||
// CHECK-NEXT: %{{.*}} = llhd.sig "sigTup" %[[TUP]] : tuple<i1, i64>
|
||||
%sigTup = llhd.sig "sigTup" %tup : tuple<i1, i64>
|
||||
|
||||
// CHECK-NEXT: %[[VEC:.*]] = llhd.vec
|
||||
%vec = llhd.vec %cI1, %cI1 : vector<2xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.sig "sigVec" %[[VEC]] : vector<2xi1>
|
||||
%sigVec = llhd.sig "sigVec" %vec : vector<2xi1>
|
||||
// CHECK-NEXT: %[[ARRAY:.*]] = llhd.array
|
||||
%array = llhd.array %cI1, %cI1 : !llhd.array<2xi1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.sig "sigArray" %[[ARRAY]] : !llhd.array<2xi1>
|
||||
%sigArray = llhd.sig "sigArray" %array : !llhd.array<2xi1>
|
||||
}
|
||||
|
||||
// CHECK-LABEL: check_prb
|
||||
// CHECK-SAME: %[[SI1:.*]]: !llhd.sig<i1>
|
||||
// CHECK-SAME: %[[SI64:.*]]: !llhd.sig<i64>
|
||||
// CHECK-SAME: %[[VEC:.*]]: !llhd.sig<vector<3xi8>>
|
||||
// CHECK-SAME: %[[ARRAY:.*]]: !llhd.sig<!llhd.array<3xi8>>
|
||||
// CHECK-SAME: %[[TUP:.*]]: !llhd.sig<tuple<i1, i2, i4>>
|
||||
func @check_prb(%sigI1 : !llhd.sig<i1>, %sigI64 : !llhd.sig<i64>, %sigVec : !llhd.sig<vector<3xi8>>, %sigTup : !llhd.sig<tuple<i1, i2, i4>>) {
|
||||
func @check_prb(%sigI1 : !llhd.sig<i1>, %sigI64 : !llhd.sig<i64>, %sigArray : !llhd.sig<!llhd.array<3xi8>>, %sigTup : !llhd.sig<tuple<i1, i2, i4>>) {
|
||||
// CHECK: %{{.*}} = llhd.prb %[[SI1]] : !llhd.sig<i1>
|
||||
%0 = llhd.prb %sigI1 : !llhd.sig<i1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.prb %[[SI64]] : !llhd.sig<i64>
|
||||
%1 = llhd.prb %sigI64 : !llhd.sig<i64>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.prb %[[VEC]] : !llhd.sig<vector<3xi8>>
|
||||
%2 = llhd.prb %sigVec : !llhd.sig<vector<3xi8>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.prb %[[ARRAY]] : !llhd.sig<!llhd.array<3xi8>>
|
||||
%2 = llhd.prb %sigArray : !llhd.sig<!llhd.array<3xi8>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.prb %[[TUP]] : !llhd.sig<tuple<i1, i2, i4>>
|
||||
%3 = llhd.prb %sigTup : !llhd.sig<tuple<i1, i2, i4>>
|
||||
|
||||
|
|
@ -45,19 +45,19 @@ func @check_prb(%sigI1 : !llhd.sig<i1>, %sigI64 : !llhd.sig<i64>, %sigVec : !llh
|
|||
// CHECK-SAME: %[[CI1:.*]]: i1
|
||||
// CHECK-SAME: %[[CI64:.*]]: i64
|
||||
// CHECK-SAME: %[[TIME:.*]]: !llhd.time
|
||||
// CHECK-SAME: %[[SVEC:.*]]: !llhd.sig<vector<3xi8>>
|
||||
// CHECK-SAME: %[[SARRAY:.*]]: !llhd.sig<!llhd.array<3xi8>>
|
||||
// CHECK-SAME: %[[STUP:.*]]: !llhd.sig<tuple<i1, i2, i4>>
|
||||
// CHECK-SAME: %[[VEC:.*]]: vector<3xi8>
|
||||
// CHECK-SAME: %[[ARRAY:.*]]: !llhd.array<3xi8>
|
||||
// CHECK-SAME: %[[TUP:.*]]: tuple<i1, i2, i4>
|
||||
func @check_drv(%sigI1 : !llhd.sig<i1>, %sigI64 : !llhd.sig<i64>, %cI1 : i1, %cI64 : i64, %t : !llhd.time, %sigVec : !llhd.sig<vector<3xi8>>, %sigTup : !llhd.sig<tuple<i1, i2, i4>>, %vec : vector<3xi8>, %tup : tuple<i1, i2, i4>) {
|
||||
func @check_drv(%sigI1 : !llhd.sig<i1>, %sigI64 : !llhd.sig<i64>, %cI1 : i1, %cI64 : i64, %t : !llhd.time, %sigArray : !llhd.sig<!llhd.array<3xi8>>, %sigTup : !llhd.sig<tuple<i1, i2, i4>>, %array : !llhd.array<3xi8>, %tup : tuple<i1, i2, i4>) {
|
||||
// CHECK-NEXT: llhd.drv %[[SI1]], %[[CI1]] after %[[TIME]] : !llhd.sig<i1>
|
||||
llhd.drv %sigI1, %cI1 after %t : !llhd.sig<i1>
|
||||
// CHECK-NEXT: llhd.drv %[[SI64]], %[[CI64]] after %[[TIME]] : !llhd.sig<i64>
|
||||
llhd.drv %sigI64, %cI64 after %t : !llhd.sig<i64>
|
||||
// CHECK-NEXT: llhd.drv %[[SI64]], %[[CI64]] after %[[TIME]] if %[[CI1]] : !llhd.sig<i64>
|
||||
llhd.drv %sigI64, %cI64 after %t if %cI1 : !llhd.sig<i64>
|
||||
// CHECK-NEXT: llhd.drv %[[SVEC]], %[[VEC]] after %[[TIME]] : !llhd.sig<vector<3xi8>>
|
||||
llhd.drv %sigVec, %vec after %t : !llhd.sig<vector<3xi8>>
|
||||
// CHECK-NEXT: llhd.drv %[[SARRAY]], %[[ARRAY]] after %[[TIME]] : !llhd.sig<!llhd.array<3xi8>>
|
||||
llhd.drv %sigArray, %array after %t : !llhd.sig<!llhd.array<3xi8>>
|
||||
// CHECK-NEXT: llhd.drv %[[STUP]], %[[TUP]] after %[[TIME]] : !llhd.sig<tuple<i1, i2, i4>>
|
||||
llhd.drv %sigTup, %tup after %t : !llhd.sig<tuple<i1, i2, i4>>
|
||||
|
||||
|
|
|
|||
|
|
@ -4,17 +4,17 @@
|
|||
// CHECK-SAME: %[[C1:.*]]: i1
|
||||
// CHECK-SAME: %[[C2:.*]]: i2
|
||||
// CHECK-SAME: %[[C3:.*]]: i3
|
||||
// CHECK-SAME: %[[VEC:.*]]: vector<3xi32>
|
||||
// CHECK-SAME: %[[ARRAY:.*]]: !llhd.array<3xi32>
|
||||
// CHECK-SAME: %[[TUP:.*]]: tuple<i8, i32, i16>
|
||||
func @check_tuple(%c1 : i1, %c2 : i2, %c3 : i3, %vec : vector<3xi32>, %tup : tuple<i8, i32, i16>) {
|
||||
func @check_tuple(%c1 : i1, %c2 : i2, %c3 : i3, %array : !llhd.array<3xi32>, %tup : tuple<i8, i32, i16>) {
|
||||
// CHECK-NEXT: %{{.*}} = llhd.tuple : tuple<>
|
||||
%0 = llhd.tuple : tuple<>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.tuple %[[C1]] : tuple<i1>
|
||||
%1 = llhd.tuple %c1 : tuple<i1>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.tuple %[[C1]], %[[C2]], %[[C3]] : tuple<i1, i2, i3>
|
||||
%2 = llhd.tuple %c1, %c2, %c3 : tuple<i1, i2, i3>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.tuple %[[C1]], %[[VEC]], %[[TUP]] : tuple<i1, vector<3xi32>, tuple<i8, i32, i16>
|
||||
%3 = llhd.tuple %c1, %vec, %tup : tuple<i1, vector<3xi32>, tuple<i8, i32, i16>>
|
||||
// CHECK-NEXT: %{{.*}} = llhd.tuple %[[C1]], %[[ARRAY]], %[[TUP]] : tuple<i1, !llhd.array<3xi32>, tuple<i8, i32, i16>
|
||||
%3 = llhd.tuple %c1, %array, %tup : tuple<i1, !llhd.array<3xi32>, tuple<i8, i32, i16>>
|
||||
|
||||
return
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue