diff --git a/contrib/configs/i2.kernel.tar b/contrib/configs/i2.kernel.tar
deleted file mode 100644
index c80d6474..00000000
Binary files a/contrib/configs/i2.kernel.tar and /dev/null differ
diff --git a/contrib/configs/miata.kernel.tar b/contrib/configs/miata.kernel.tar
deleted file mode 100644
index 758c93a4..00000000
Binary files a/contrib/configs/miata.kernel.tar and /dev/null differ
diff --git a/contrib/configs/mips32-malta.kernel.tar b/contrib/configs/mips32-malta.kernel.tar
deleted file mode 100644
index b95fb4e0..00000000
Binary files a/contrib/configs/mips32-malta.kernel.tar and /dev/null differ
diff --git a/contrib/configs/psim.kernel.tar b/contrib/configs/psim.kernel.tar
deleted file mode 100644
index b9dd31a6..00000000
Binary files a/contrib/configs/psim.kernel.tar and /dev/null differ
diff --git a/contrib/configs/sa1100.kernel.tar b/contrib/configs/sa1100.kernel.tar
deleted file mode 100644
index 98952242..00000000
Binary files a/contrib/configs/sa1100.kernel.tar and /dev/null differ
diff --git a/contrib/configs/tsunami.kernel.tar b/contrib/configs/tsunami.kernel.tar
deleted file mode 100644
index 9f80cfdc..00000000
Binary files a/contrib/configs/tsunami.kernel.tar and /dev/null differ
diff --git a/contrib/configs/u4600.kernel.tar b/contrib/configs/u4600.kernel.tar
deleted file mode 100644
index f5eb4758..00000000
Binary files a/contrib/configs/u4600.kernel.tar and /dev/null differ
diff --git a/contrib/disas/cpu-ia64-opc.c b/contrib/disas/cpu-ia64-opc.c
deleted file mode 100644
index 507dbc30..00000000
--- a/contrib/disas/cpu-ia64-opc.c
+++ /dev/null
@@ -1,591 +0,0 @@
-/* Copyright 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
-   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
-
-This file is part of BFD, the Binary File Descriptor library.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
-
-/* Logically, this code should be part of libopcode but since some of
-   the operand insertion/extraction functions help bfd to implement
-   relocations, this code is included as part of cpu-ia64.c.  This
-   avoids circular dependencies between libopcode and libbfd and also
-   obviates the need for applications to link in libopcode when all
-   they really want is libbfd.
-
-   --davidm Mon Apr 13 22:14:02 1998 */
-
-/* changes by ud3 marked with //ud3 */
-  
-#include "ia64-opc.h" //ud3
-
-#define NELEMS(a)  ((int) (sizeof (a) / sizeof ((a)[0])))
-
-static const char*
-ins_rsvd (const struct ia64_operand *self ATTRIBUTE_UNUSED,
-	  ia64_insn value ATTRIBUTE_UNUSED, ia64_insn *code ATTRIBUTE_UNUSED)
-{
-  return "internal error---this shouldn't happen";
-}
-
-static const char*
-ext_rsvd (const struct ia64_operand *self ATTRIBUTE_UNUSED,
-	  ia64_insn code ATTRIBUTE_UNUSED, ia64_insn *valuep ATTRIBUTE_UNUSED)
-{
-  return "internal error---this shouldn't happen";
-}
-
-static const char*
-ins_const (const struct ia64_operand *self ATTRIBUTE_UNUSED,
-	   ia64_insn value ATTRIBUTE_UNUSED, ia64_insn *code ATTRIBUTE_UNUSED)
-{
-  return 0;
-}
-
-static const char*
-ext_const (const struct ia64_operand *self ATTRIBUTE_UNUSED,
-	   ia64_insn code ATTRIBUTE_UNUSED, ia64_insn *valuep ATTRIBUTE_UNUSED)
-{
-  return 0;
-}
-
-static const char*
-ins_reg (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  if (value >= 1u << self->field[0].bits)
-    return "register number out of range";
-
-  *code |= value << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_reg (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  *valuep = ((code >> self->field[0].shift)
-	     & ((1u << self->field[0].bits) - 1));
-  return 0;
-}
-
-static const char*
-ins_immu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  ia64_insn new = 0;
-  int i;
-
-  for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
-    {
-      new |= ((value & ((((ia64_insn) 1) << self->field[i].bits) - 1))
-	      << self->field[i].shift);
-      value >>= self->field[i].bits;
-    }
-  if (value)
-    return "integer operand out of range";
-
-  *code |= new;
-  return 0;
-}
-
-static const char*
-ext_immu (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  BFD_HOST_U_64_BIT value = 0;
-  int i, bits = 0, total = 0;
-
-  for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
-    {
-      bits = self->field[i].bits;
-      value |= ((code >> self->field[i].shift)
-		& ((((BFD_HOST_U_64_BIT) 1) << bits) - 1)) << total;
-      total += bits;
-    }
-  *valuep = value;
-  return 0;
-}
-
-static const char*
-ins_immus8 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  if (value & 0x7)
-    return "value not an integer multiple of 8";
-  return ins_immu (self, value >> 3, code);
-}
-
-static const char*
-ext_immus8 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  const char *result;
-
-  result = ext_immu (self, code, valuep);
-  if (result)
-    return result;
-
-  *valuep = *valuep << 3;
-  return 0;
-}
-
-static const char*
-ins_imms_scaled (const struct ia64_operand *self, ia64_insn value,
-		 ia64_insn *code, int scale)
-{
-  BFD_HOST_64_BIT svalue = value, sign_bit = 0;
-  ia64_insn new = 0;
-  int i;
-
-  svalue >>= scale;
-
-  for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
-    {
-      new |= ((svalue & ((((ia64_insn) 1) << self->field[i].bits) - 1))
-	      << self->field[i].shift);
-      sign_bit = (svalue >> (self->field[i].bits - 1)) & 1;
-      svalue >>= self->field[i].bits;
-    }
-  if ((!sign_bit && svalue != 0) || (sign_bit && svalue != -1))
-    return "integer operand out of range";
-
-  *code |= new;
-  return 0;
-}
-
-static const char*
-ext_imms_scaled (const struct ia64_operand *self, ia64_insn code,
-		 ia64_insn *valuep, int scale)
-{
-  int i, bits = 0, total = 0, shift;
-  BFD_HOST_64_BIT val = 0;
-
-  for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i)
-    {
-      bits = self->field[i].bits;
-      val |= ((code >> self->field[i].shift)
-	      & ((((BFD_HOST_U_64_BIT) 1) << bits) - 1)) << total;
-      total += bits;
-    }
-  /* sign extend: */
-  shift = 8*sizeof (val) - total;
-  val = (val << shift) >> shift;
-
-  *valuep = (val << scale);
-  return 0;
-}
-
-static const char*
-ins_imms (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  return ins_imms_scaled (self, value, code, 0);
-}
-
-static const char*
-ins_immsu4 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  if (value == (BFD_HOST_U_64_BIT) 0x100000000)
-    value = 0;
-  else
-    value = (((BFD_HOST_64_BIT)value << 32) >> 32);
-
-  return ins_imms_scaled (self, value, code, 0);
-}
-
-static const char*
-ext_imms (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  return ext_imms_scaled (self, code, valuep, 0);
-}
-
-static const char*
-ins_immsm1 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  --value;
-  return ins_imms_scaled (self, value, code, 0);
-}
-
-static const char*
-ins_immsm1u4 (const struct ia64_operand *self, ia64_insn value,
-	      ia64_insn *code)
-{
-  if (value == (BFD_HOST_U_64_BIT) 0x100000000)
-    value = 0;
-  else
-    value = (((BFD_HOST_64_BIT)value << 32) >> 32);
-
-  --value;
-  return ins_imms_scaled (self, value, code, 0);
-}
-
-static const char*
-ext_immsm1 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  const char *res = ext_imms_scaled (self, code, valuep, 0);
-
-  ++*valuep;
-  return res;
-}
-
-static const char*
-ins_imms1 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  return ins_imms_scaled (self, value, code, 1);
-}
-
-static const char*
-ext_imms1 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  return ext_imms_scaled (self, code, valuep, 1);
-}
-
-static const char*
-ins_imms4 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  return ins_imms_scaled (self, value, code, 4);
-}
-
-static const char*
-ext_imms4 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  return ext_imms_scaled (self, code, valuep, 4);
-}
-
-static const char*
-ins_imms16 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  return ins_imms_scaled (self, value, code, 16);
-}
-
-static const char*
-ext_imms16 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  return ext_imms_scaled (self, code, valuep, 16);
-}
-
-static const char*
-ins_cimmu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  ia64_insn mask = (((ia64_insn) 1) << self->field[0].bits) - 1;
-  return ins_immu (self, value ^ mask, code);
-}
-
-static const char*
-ext_cimmu (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  const char *result;
-  ia64_insn mask;
-
-  mask = (((ia64_insn) 1) << self->field[0].bits) - 1;
-  result = ext_immu (self, code, valuep);
-  if (!result)
-    {
-      mask = (((ia64_insn) 1) << self->field[0].bits) - 1;
-      *valuep ^= mask;
-    }
-  return result;
-}
-
-static const char*
-ins_cnt (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  --value;
-  if (value >= ((BFD_HOST_U_64_BIT) 1) << self->field[0].bits)
-    return "count out of range";
-
-  *code |= value << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_cnt (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  *valuep = ((code >> self->field[0].shift)
-	     & ((((BFD_HOST_U_64_BIT) 1) << self->field[0].bits) - 1)) + 1;
-  return 0;
-}
-
-static const char*
-ins_cnt2b (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  --value;
-
-  if (value > 2)
-    return "count must be in range 1..3";
-
-  *code |= value << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_cnt2b (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  *valuep = ((code >> self->field[0].shift) & 0x3) + 1;
-  return 0;
-}
-
-static const char*
-ins_cnt2c (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  switch (value)
-    {
-    case 0:	value = 0; break;
-    case 7:	value = 1; break;
-    case 15:	value = 2; break;
-    case 16:	value = 3; break;
-    default:	return "count must be 0, 7, 15, or 16";
-    }
-  *code |= value << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_cnt2c (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  ia64_insn value;
-
-  value = (code >> self->field[0].shift) & 0x3;
-  switch (value)
-    {
-    case 0: value =  0; break;
-    case 1: value =  7; break;
-    case 2: value = 15; break;
-    case 3: value = 16; break;
-    }
-  *valuep = value;
-  return 0;
-}
-
-static const char*
-ins_inc3 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code)
-{
-  BFD_HOST_64_BIT val = value;
-  BFD_HOST_U_64_BIT sign = 0;
-
-  if (val < 0)
-    {
-      sign = 0x4;
-      value = -value;
-    }
-  switch (value)
-    {
-    case  1:	value = 3; break;
-    case  4:	value = 2; break;
-    case  8:	value = 1; break;
-    case 16:	value = 0; break;
-    default:	return "count must be +/- 1, 4, 8, or 16";
-    }
-  *code |= (sign | value) << self->field[0].shift;
-  return 0;
-}
-
-static const char*
-ext_inc3 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep)
-{
-  BFD_HOST_64_BIT val;
-  int negate;
-
-  val = (code >> self->field[0].shift) & 0x7;
-  negate = val & 0x4;
-  switch (val & 0x3)
-    {
-    case 0: val = 16; break;
-    case 1: val =  8; break;
-    case 2: val =  4; break;
-    case 3: val =  1; break;
-    }
-  if (negate)
-    val = -val;
-
-  *valuep = val;
-  return 0;
-}
-
-#define CST	IA64_OPND_CLASS_CST
-#define REG	IA64_OPND_CLASS_REG
-#define IND	IA64_OPND_CLASS_IND
-#define ABS	IA64_OPND_CLASS_ABS
-#define REL	IA64_OPND_CLASS_REL
-
-#define SDEC	IA64_OPND_FLAG_DECIMAL_SIGNED
-#define UDEC	IA64_OPND_FLAG_DECIMAL_UNSIGNED
-
-const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] =
-  {
-    /* constants: */
-    { CST, ins_const, ext_const, "NIL",		{{ 0, 0}}, 0, "<none>" },
-    { CST, ins_const, ext_const, "ar.ccv",	{{ 0, 0}}, 0, "ar.ccv" },
-    { CST, ins_const, ext_const, "ar.pfs",	{{ 0, 0}}, 0, "ar.pfs" },
-    { CST, ins_const, ext_const, "1",		{{ 0, 0}}, 0, "1" },
-    { CST, ins_const, ext_const, "8",		{{ 0, 0}}, 0, "8" },
-    { CST, ins_const, ext_const, "16",		{{ 0, 0}}, 0, "16" },
-    { CST, ins_const, ext_const, "r0",		{{ 0, 0}}, 0, "r0" },
-    { CST, ins_const, ext_const, "ip",		{{ 0, 0}}, 0, "ip" },
-    { CST, ins_const, ext_const, "pr",		{{ 0, 0}}, 0, "pr" },
-    { CST, ins_const, ext_const, "pr.rot",	{{ 0, 0}}, 0, "pr.rot" },
-    { CST, ins_const, ext_const, "psr",		{{ 0, 0}}, 0, "psr" },
-    { CST, ins_const, ext_const, "psr.l",	{{ 0, 0}}, 0, "psr.l" },
-    { CST, ins_const, ext_const, "psr.um",	{{ 0, 0}}, 0, "psr.um" },
-
-    /* register operands: */
-    { REG, ins_reg,   ext_reg,	"ar", {{ 7, 20}}, 0,		/* AR3 */
-      "an application register" },
-    { REG, ins_reg,   ext_reg,	 "b", {{ 3,  6}}, 0,		/* B1 */
-      "a branch register" },
-    { REG, ins_reg,   ext_reg,	 "b", {{ 3, 13}}, 0,		/* B2 */
-      "a branch register"},
-    { REG, ins_reg,   ext_reg,	"cr", {{ 7, 20}}, 0,		/* CR */
-      "a control register"},
-    { REG, ins_reg,   ext_reg,	 "f", {{ 7,  6}}, 0,		/* F1 */
-      "a floating-point register" },
-    { REG, ins_reg,   ext_reg,	 "f", {{ 7, 13}}, 0,		/* F2 */
-      "a floating-point register" },
-    { REG, ins_reg,   ext_reg,	 "f", {{ 7, 20}}, 0,		/* F3 */
-      "a floating-point register" },
-    { REG, ins_reg,   ext_reg,	 "f", {{ 7, 27}}, 0,		/* F4 */
-      "a floating-point register" },
-    { REG, ins_reg,   ext_reg,	 "p", {{ 6,  6}}, 0,		/* P1 */
-      "a predicate register" },
-    { REG, ins_reg,   ext_reg,	 "p", {{ 6, 27}}, 0,		/* P2 */
-      "a predicate register" },
-    { REG, ins_reg,   ext_reg,	 "r", {{ 7,  6}}, 0,		/* R1 */
-      "a general register" },
-    { REG, ins_reg,   ext_reg,	 "r", {{ 7, 13}}, 0,		/* R2 */
-      "a general register" },
-    { REG, ins_reg,   ext_reg,	 "r", {{ 7, 20}}, 0,		/* R3 */
-      "a general register" },
-    { REG, ins_reg,   ext_reg,	 "r", {{ 2, 20}}, 0,		/* R3_2 */
-      "a general register r0-r3" },
-
-    /* indirect operands: */
-    { IND, ins_reg,   ext_reg,	"cpuid", {{7, 20}}, 0,		/* CPUID_R3 */
-      "a cpuid register" },
-    { IND, ins_reg,   ext_reg,	"dbr",   {{7, 20}}, 0,		/* DBR_R3 */
-      "a dbr register" },
-    { IND, ins_reg,   ext_reg,	"dtr",   {{7, 20}}, 0,		/* DTR_R3 */
-      "a dtr register" },
-    { IND, ins_reg,   ext_reg,	"itr",   {{7, 20}}, 0,		/* ITR_R3 */
-      "an itr register" },
-    { IND, ins_reg,   ext_reg,	"ibr",   {{7, 20}}, 0,		/* IBR_R3 */
-      "an ibr register" },
-    { IND, ins_reg,   ext_reg,	"",      {{7, 20}}, 0,		/* MR3 */
-      "an indirect memory address" },
-    { IND, ins_reg,   ext_reg,	"msr",   {{7, 20}}, 0,		/* MSR_R3 */
-      "an msr register" },
-    { IND, ins_reg,   ext_reg,	"pkr",   {{7, 20}}, 0,		/* PKR_R3 */
-      "a pkr register" },
-    { IND, ins_reg,   ext_reg,	"pmc",   {{7, 20}}, 0,		/* PMC_R3 */
-      "a pmc register" },
-    { IND, ins_reg,   ext_reg,	"pmd",   {{7, 20}}, 0,		/* PMD_R3 */
-      "a pmd register" },
-    { IND, ins_reg,   ext_reg,	"rr",    {{7, 20}}, 0,		/* RR_R3 */
-      "an rr register" },
-
-    /* immediate operands: */
-    { ABS, ins_cimmu, ext_cimmu, 0, {{ 5, 20 }}, UDEC,		/* CCNT5 */
-      "a 5-bit count (0-31)" },
-    { ABS, ins_cnt,   ext_cnt,   0, {{ 2, 27 }}, UDEC,		/* CNT2a */
-      "a 2-bit count (1-4)" },
-    { ABS, ins_cnt2b, ext_cnt2b, 0, {{ 2, 27 }}, UDEC,		/* CNT2b */
-      "a 2-bit count (1-3)" },
-    { ABS, ins_cnt2c, ext_cnt2c, 0, {{ 2, 30 }}, UDEC,		/* CNT2c */
-      "a count (0, 7, 15, or 16)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 5, 14}}, UDEC,		/* CNT5 */
-      "a 5-bit count (0-31)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 6, 27}}, UDEC,		/* CNT6 */
-      "a 6-bit count (0-63)" },
-    { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 20}}, UDEC,		/* CPOS6a */
-      "a 6-bit bit pos (0-63)" },
-    { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 14}}, UDEC,		/* CPOS6b */
-      "a 6-bit bit pos (0-63)" },
-    { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 31}}, UDEC,		/* CPOS6c */
-      "a 6-bit bit pos (0-63)" },
-    { ABS, ins_imms,  ext_imms,  0, {{ 1, 36}}, SDEC,		/* IMM1 */
-      "a 1-bit integer (-1, 0)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 2, 13}}, UDEC,		/* IMMU2 */
-      "a 2-bit unsigned (0-3)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 7, 13}}, 0,		/* IMMU7a */
-      "a 7-bit unsigned (0-127)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 7, 20}}, 0,		/* IMMU7b */
-      "a 7-bit unsigned (0-127)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 7, 13}}, UDEC,		/* SOF */
-      "a frame size (register count)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 7, 20}}, UDEC,		/* SOL */
-      "a local register count" },
-    { ABS, ins_immus8,ext_immus8,0, {{ 4, 27}}, UDEC,		/* SOR */
-      "a rotating register count (integer multiple of 8)" },
-    { ABS, ins_imms,  ext_imms,  0,				/* IMM8 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit integer (-128-127)" },
-    { ABS, ins_immsu4,  ext_imms,  0,				/* IMM8U4 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit signed integer for 32-bit unsigned compare (-128-127)" },
-    { ABS, ins_immsm1,  ext_immsm1,  0,				/* IMM8M1 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit integer (-127-128)" },
-    { ABS, ins_immsm1u4,  ext_immsm1,  0,			/* IMM8M1U4 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit integer for 32-bit unsigned compare (-127-(-1),1-128,0x100000000)" },
-    { ABS, ins_immsm1,  ext_immsm1,  0,				/* IMM8M1U8 */
-      {{ 7, 13}, { 1, 36}}, SDEC,
-      "an 8-bit integer for 64-bit unsigned compare (-127-(-1),1-128,0x10000000000000000)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 2, 33}, { 7, 20}}, 0,	/* IMMU9 */
-      "a 9-bit unsigned (0-511)" },
-    { ABS, ins_imms,  ext_imms,  0,				/* IMM9a */
-      {{ 7,  6}, { 1, 27}, { 1, 36}}, SDEC,
-      "a 9-bit integer (-256-255)" },
-    { ABS, ins_imms,  ext_imms, 0,				/* IMM9b */
-      {{ 7, 13}, { 1, 27}, { 1, 36}}, SDEC,
-      "a 9-bit integer (-256-255)" },
-    { ABS, ins_imms,  ext_imms, 0,				/* IMM14 */
-      {{ 7, 13}, { 6, 27}, { 1, 36}}, SDEC,
-      "a 14-bit integer (-8192-8191)" },
-    { ABS, ins_imms1, ext_imms1, 0,				/* IMM17 */
-      {{ 7,  6}, { 8, 24}, { 1, 36}}, 0,
-      "a 17-bit integer (-65536-65535)" },
-    { ABS, ins_immu,  ext_immu,  0, {{20,  6}, { 1, 36}}, 0,	/* IMMU21 */
-      "a 21-bit unsigned" },
-    { ABS, ins_imms,  ext_imms,  0,				/* IMM22 */
-      {{ 7, 13}, { 9, 27}, { 5, 22}, { 1, 36}}, SDEC,
-      "a 22-bit signed integer" },
-    { ABS, ins_immu,  ext_immu,  0,				/* IMMU24 */
-      {{21,  6}, { 2, 31}, { 1, 36}}, 0,
-      "a 24-bit unsigned" },
-    { ABS, ins_imms16,ext_imms16,0, {{27,  6}, { 1, 36}}, 0,	/* IMM44 */
-      "a 44-bit unsigned (least 16 bits ignored/zeroes)" },
-    { ABS, ins_rsvd,  ext_rsvd,	0, {{0,  0}}, 0,		/* IMMU62 */
-      "a 62-bit unsigned" },
-    { ABS, ins_rsvd,  ext_rsvd,	0, {{0,  0}}, 0,		/* IMMU64 */
-      "a 64-bit unsigned" },
-    { ABS, ins_inc3,  ext_inc3,  0, {{ 3, 13}}, SDEC,		/* INC3 */
-      "an increment (+/- 1, 4, 8, or 16)" },
-    { ABS, ins_cnt,   ext_cnt,   0, {{ 4, 27}}, UDEC,		/* LEN4 */
-      "a 4-bit length (1-16)" },
-    { ABS, ins_cnt,   ext_cnt,   0, {{ 6, 27}}, UDEC,		/* LEN6 */
-      "a 6-bit length (1-64)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 4, 20}},	0,		/* MBTYPE4 */
-      "a mix type (@rev, @mix, @shuf, @alt, or @brcst)" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 8, 20}},	0,		/* MBTYPE8 */
-      "an 8-bit mix type" },
-    { ABS, ins_immu,  ext_immu,  0, {{ 6, 14}}, UDEC,		/* POS6 */
-      "a 6-bit bit pos (0-63)" },
-    { REL, ins_imms4, ext_imms4, 0, {{ 7,  6}, { 2, 33}}, 0,	/* TAG13 */
-      "a branch tag" },
-    { REL, ins_imms4, ext_imms4, 0, {{ 9, 24}}, 0,		/* TAG13b */
-      "a branch tag" },
-    { REL, ins_imms4, ext_imms4, 0, {{20,  6}, { 1, 36}}, 0,	/* TGT25 */
-      "a branch target" },
-    { REL, ins_imms4, ext_imms4, 0,				/* TGT25b */
-      {{ 7,  6}, {13, 20}, { 1, 36}}, 0,
-      "a branch target" },
-    { REL, ins_imms4, ext_imms4, 0, {{20, 13}, { 1, 36}}, 0,	/* TGT25c */
-      "a branch target" },
-    { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0,                  /* TGT64  */
-      "a branch target" },
-  };
diff --git a/contrib/disas/ia64-asmtab.c b/contrib/disas/ia64-asmtab.c
deleted file mode 100644
index 45f60eba..00000000
--- a/contrib/disas/ia64-asmtab.c
+++ /dev/null
@@ -1,7436 +0,0 @@
-/* This file is automatically generated by ia64-gen.  Do not edit! */
-static const char *ia64_strings[] = {
-  "", "0", "1", "a", "acq", "add", "addl", "addp4", "adds", "alloc", "and",
-  "andcm", "b", "bias", "br", "break", "brl", "brp", "bsw", "c", "call",
-  "cexit", "chk", "cloop", "clr", "clrrrb", "cmp", "cmp4", "cmpxchg1",
-  "cmpxchg2", "cmpxchg4", "cmpxchg8", "cond", "cover", "ctop", "czx1",
-  "czx2", "d", "dep", "dpnt", "dptk", "e", "epc", "eq", "excl", "exit",
-  "exp", "extr", "f", "fabs", "fadd", "famax", "famin", "fand", "fandcm",
-  "fault", "fc", "fchkf", "fclass", "fclrf", "fcmp", "fcvt", "fetchadd4",
-  "fetchadd8", "few", "fill", "flushrs", "fma", "fmax", "fmerge", "fmin",
-  "fmix", "fmpy", "fms", "fneg", "fnegabs", "fnma", "fnmpy", "fnorm", "for",
-  "fpabs", "fpack", "fpamax", "fpamin", "fpcmp", "fpcvt", "fpma", "fpmax",
-  "fpmerge", "fpmin", "fpmpy", "fpms", "fpneg", "fpnegabs", "fpnma",
-  "fpnmpy", "fprcpa", "fprsqrta", "frcpa", "frsqrta", "fselect", "fsetc",
-  "fsub", "fswap", "fsxt", "fwb", "fx", "fxor", "fxu", "g", "ga", "ge",
-  "getf", "geu", "gt", "gtu", "h", "hu", "i", "ia", "imp", "invala", "itc",
-  "itr", "l", "ld1", "ld2", "ld4", "ld8", "ldf", "ldf8", "ldfd", "ldfe",
-  "ldfp8", "ldfpd", "ldfps", "ldfs", "le", "leu", "lfetch", "loadrs",
-  "loop", "lr", "lt", "ltu", "lu", "m", "many", "mf", "mix1", "mix2",
-  "mix4", "mov", "movl", "mux1", "mux2", "nc", "ne", "neq", "nge", "ngt",
-  "nl", "nle", "nlt", "nm", "nop", "nr", "ns", "nt1", "nt2", "nta", "nz",
-  "or", "orcm", "ord", "pack2", "pack4", "padd1", "padd2", "padd4", "pavg1",
-  "pavg2", "pavgsub1", "pavgsub2", "pcmp1", "pcmp2", "pcmp4", "pmax1",
-  "pmax2", "pmin1", "pmin2", "pmpy2", "pmpyshr2", "popcnt", "pr", "probe",
-  "psad1", "pshl2", "pshl4", "pshladd2", "pshr2", "pshr4", "pshradd2",
-  "psub1", "psub2", "psub4", "ptc", "ptr", "r", "raz", "rel", "ret", "rfi",
-  "rsm", "rum", "rw", "s", "s0", "s1", "s2", "s3", "sa", "se", "setf",
-  "shl", "shladd", "shladdp4", "shr", "shrp", "sig", "spill", "spnt",
-  "sptk", "srlz", "ssm", "sss", "st1", "st2", "st4", "st8", "stf", "stf8",
-  "stfd", "stfe", "stfs", "sub", "sum", "sxt1", "sxt2", "sxt4", "sync",
-  "tak", "tbit", "thash", "tnat", "tpa", "trunc", "ttag", "u", "unc",
-  "unord", "unpack1", "unpack2", "unpack4", "uss", "uus", "uuu", "w",
-  "wexit", "wtop", "x", "xchg1", "xchg2", "xchg4", "xchg8", "xf", "xma",
-  "xmpy", "xor", "xuf", "z", "zxt1", "zxt2", "zxt4",
-};
-
-static const struct ia64_dependency
-dependencies[] = {
-  { "ALAT", 0, 0, 0, -1, NULL, },
-  { "AR[BSP]", 26, 0, 2, 17, NULL, },
-  { "AR[BSPSTORE]", 26, 0, 2, 18, NULL, },
-  { "AR[CCV]", 26, 0, 2, 32, NULL, },
-  { "AR[EC]", 26, 0, 2, 66, NULL, },
-  { "AR[FPSR].sf0.controls", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf1.controls", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf2.controls", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf3.controls", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf0.flags", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf1.flags", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf2.flags", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].sf3.flags", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].traps", 30, 0, 2, -1, NULL, },
-  { "AR[FPSR].rv", 30, 0, 2, -1, NULL, },
-  { "AR[ITC]", 26, 0, 2, 44, NULL, },
-  { "AR[K%], % in 0 - 7", 1, 0, 2, -1, NULL, },
-  { "AR[LC]", 26, 0, 2, 65, NULL, },
-  { "AR[PFS]", 26, 0, 2, 64, NULL, },
-  { "AR[PFS]", 26, 0, 2, 64, NULL, },
-  { "AR[PFS]", 26, 0, 0, 64, NULL, },
-  { "AR[RNAT]", 26, 0, 2, 19, NULL, },
-  { "AR[RSC]", 26, 0, 2, 16, NULL, },
-  { "AR[UNAT]{%}, % in 0 - 63", 2, 0, 2, -1, NULL, },
-  { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111", 3, 0, 0, -1, NULL, },
-  { "AR%, % in 48-63, 112-127", 4, 0, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 0, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 0, 0, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 2, -1, NULL, },
-  { "CFM", 6, 0, 0, -1, NULL, },
-  { "CPUID#", 7, 0, 5, -1, NULL, },
-  { "CR[CMCV]", 27, 0, 3, 74, NULL, },
-  { "CR[DCR]", 27, 0, 3, 0, NULL, },
-  { "CR[EOI]", 27, 0, 7, 67, "SC Section 10.8.3.4", },
-  { "CR[GPTA]", 27, 0, 3, 9, NULL, },
-  { "CR[IFA]", 27, 0, 1, 20, NULL, },
-  { "CR[IFA]", 27, 0, 3, 20, NULL, },
-  { "CR[IFS]", 27, 0, 3, 23, NULL, },
-  { "CR[IFS]", 27, 0, 1, 23, NULL, },
-  { "CR[IFS]", 27, 0, 1, 23, NULL, },
-  { "CR[IHA]", 27, 0, 3, 25, NULL, },
-  { "CR[IIM]", 27, 0, 3, 24, NULL, },
-  { "CR[IIP]", 27, 0, 3, 19, NULL, },
-  { "CR[IIP]", 27, 0, 1, 19, NULL, },
-  { "CR[IIPA]", 27, 0, 3, 22, NULL, },
-  { "CR[IPSR]", 27, 0, 3, 16, NULL, },
-  { "CR[IPSR]", 27, 0, 1, 16, NULL, },
-  { "CR[IRR%], % in 0 - 3", 8, 0, 3, -1, NULL, },
-  { "CR[ISR]", 27, 0, 3, 17, NULL, },
-  { "CR[ITIR]", 27, 0, 3, 21, NULL, },
-  { "CR[ITIR]", 27, 0, 1, 21, NULL, },
-  { "CR[ITM]", 27, 0, 3, 1, NULL, },
-  { "CR[ITV]", 27, 0, 3, 72, NULL, },
-  { "CR[IVA]", 27, 0, 4, 2, NULL, },
-  { "CR[IVR]", 27, 0, 7, 65, "SC Section 10.8.3.2", },
-  { "CR[LID]", 27, 0, 7, 64, "SC Section 10.8.3.1", },
-  { "CR[LRR%], % in 0 - 1", 9, 0, 3, -1, NULL, },
-  { "CR[PMV]", 27, 0, 3, 73, NULL, },
-  { "CR[PTA]", 27, 0, 3, 8, NULL, },
-  { "CR[TPR]", 27, 0, 3, 66, NULL, },
-  { "CR[TPR]", 27, 0, 7, 66, "SC Section 10.8.3.3", },
-  { "CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127", 10, 0, 0, -1, NULL, },
-  { "DBR#", 11, 0, 2, -1, NULL, },
-  { "DBR#", 11, 0, 3, -1, NULL, },
-  { "DTC", 0, 0, 3, -1, NULL, },
-  { "DTC", 0, 0, 2, -1, NULL, },
-  { "DTC", 0, 0, 0, -1, NULL, },
-  { "DTC", 0, 0, 2, -1, NULL, },
-  { "DTC_LIMIT*", 0, 0, 2, -1, NULL, },
-  { "DTR", 0, 0, 3, -1, NULL, },
-  { "DTR", 0, 0, 2, -1, NULL, },
-  { "DTR", 0, 0, 3, -1, NULL, },
-  { "DTR", 0, 0, 0, -1, NULL, },
-  { "DTR", 0, 0, 2, -1, NULL, },
-  { "FR%, % in 0 - 1", 12, 0, 0, -1, NULL, },
-  { "FR%, % in 2 - 127", 13, 0, 2, -1, NULL, },
-  { "FR%, % in 2 - 127", 13, 0, 0, -1, NULL, },
-  { "GR0", 14, 0, 0, -1, NULL, },
-  { "GR%, % in 1 - 127", 15, 0, 0, -1, NULL, },
-  { "GR%, % in 1 - 127", 15, 0, 2, -1, NULL, },
-  { "IBR#", 16, 0, 2, -1, NULL, },
-  { "InService*", 17, 0, 3, -1, NULL, },
-  { "InService*", 17, 0, 2, -1, NULL, },
-  { "InService*", 17, 0, 2, -1, NULL, },
-  { "IP", 0, 0, 0, -1, NULL, },
-  { "ITC", 0, 0, 4, -1, NULL, },
-  { "ITC", 0, 0, 2, -1, NULL, },
-  { "ITC", 0, 0, 0, -1, NULL, },
-  { "ITC", 0, 0, 4, -1, NULL, },
-  { "ITC", 0, 0, 2, -1, NULL, },
-  { "ITC_LIMIT*", 0, 0, 2, -1, NULL, },
-  { "ITR", 0, 0, 2, -1, NULL, },
-  { "ITR", 0, 0, 4, -1, NULL, },
-  { "ITR", 0, 0, 2, -1, NULL, },
-  { "ITR", 0, 0, 0, -1, NULL, },
-  { "ITR", 0, 0, 4, -1, NULL, },
-  { "memory", 0, 0, 0, -1, NULL, },
-  { "MSR#", 18, 0, 5, -1, NULL, },
-  { "PKR#", 19, 0, 3, -1, NULL, },
-  { "PKR#", 19, 0, 0, -1, NULL, },
-  { "PKR#", 19, 0, 2, -1, NULL, },
-  { "PKR#", 19, 0, 2, -1, NULL, },
-  { "PMC#", 20, 0, 2, -1, NULL, },
-  { "PMC#", 20, 0, 7, -1, "SC+3 Section 12.1.1", },
-  { "PMD#", 21, 0, 2, -1, NULL, },
-  { "PR0", 0, 0, 0, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 0, 2, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 0, 2, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 0, 0, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 0, 2, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 0, 2, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 0, 0, -1, NULL, },
-  { "PR63", 24, 0, 2, -1, NULL, },
-  { "PR63", 24, 0, 2, -1, NULL, },
-  { "PR63", 24, 0, 0, -1, NULL, },
-  { "PSR.ac", 28, 0, 1, 3, NULL, },
-  { "PSR.ac", 28, 0, 3, 3, NULL, },
-  { "PSR.ac", 28, 0, 2, 3, NULL, },
-  { "PSR.be", 28, 0, 1, 1, NULL, },
-  { "PSR.be", 28, 0, 3, 1, NULL, },
-  { "PSR.be", 28, 0, 2, 1, NULL, },
-  { "PSR.bn", 28, 0, 2, 44, NULL, },
-  { "PSR.cpl", 28, 0, 1, 32, NULL, },
-  { "PSR.da", 28, 0, 3, 38, NULL, },
-  { "PSR.db", 28, 0, 3, 24, NULL, },
-  { "PSR.db", 28, 0, 2, 24, NULL, },
-  { "PSR.db", 28, 0, 3, 24, NULL, },
-  { "PSR.dd", 28, 0, 3, 39, NULL, },
-  { "PSR.dfh", 28, 0, 3, 19, NULL, },
-  { "PSR.dfh", 28, 0, 2, 19, NULL, },
-  { "PSR.dfl", 28, 0, 3, 18, NULL, },
-  { "PSR.dfl", 28, 0, 2, 18, NULL, },
-  { "PSR.di", 28, 0, 3, 22, NULL, },
-  { "PSR.di", 28, 0, 2, 22, NULL, },
-  { "PSR.dt", 28, 0, 3, 17, NULL, },
-  { "PSR.dt", 28, 0, 2, 17, NULL, },
-  { "PSR.ed", 28, 0, 3, 43, NULL, },
-  { "PSR.i", 28, 0, 2, 14, NULL, },
-  { "PSR.i", 28, 0, 3, 14, NULL, },
-  { "PSR.ia", 28, 0, 0, 14, NULL, },
-  { "PSR.ic", 28, 0, 2, 13, NULL, },
-  { "PSR.ic", 28, 0, 3, 13, NULL, },
-  { "PSR.id", 28, 0, 0, 14, NULL, },
-  { "PSR.is", 28, 0, 0, 14, NULL, },
-  { "PSR.it", 28, 0, 3, 14, NULL, },
-  { "PSR.lp", 28, 0, 2, 25, NULL, },
-  { "PSR.lp", 28, 0, 3, 25, NULL, },
-  { "PSR.lp", 28, 0, 3, 25, NULL, },
-  { "PSR.mc", 28, 0, 0, 35, NULL, },
-  { "PSR.mfh", 28, 0, 2, 5, NULL, },
-  { "PSR.mfl", 28, 0, 2, 4, NULL, },
-  { "PSR.pk", 28, 0, 3, 15, NULL, },
-  { "PSR.pk", 28, 0, 2, 15, NULL, },
-  { "PSR.pp", 28, 0, 2, 21, NULL, },
-  { "PSR.ri", 28, 0, 0, 41, NULL, },
-  { "PSR.rt", 28, 0, 2, 27, NULL, },
-  { "PSR.rt", 28, 0, 3, 27, NULL, },
-  { "PSR.rt", 28, 0, 3, 27, NULL, },
-  { "PSR.si", 28, 0, 2, 23, NULL, },
-  { "PSR.si", 28, 0, 3, 23, NULL, },
-  { "PSR.sp", 28, 0, 2, 20, NULL, },
-  { "PSR.sp", 28, 0, 3, 20, NULL, },
-  { "PSR.ss", 28, 0, 3, 40, NULL, },
-  { "PSR.tb", 28, 0, 3, 26, NULL, },
-  { "PSR.tb", 28, 0, 2, 26, NULL, },
-  { "PSR.up", 28, 0, 2, 2, NULL, },
-  { "RR#", 25, 0, 3, -1, NULL, },
-  { "RR#", 25, 0, 2, -1, NULL, },
-  { "RSE", 29, 0, 2, -1, NULL, },
-  { "ALAT", 0, 1, 0, -1, NULL, },
-  { "AR[BSP]", 26, 1, 2, 17, NULL, },
-  { "AR[BSPSTORE]", 26, 1, 2, 18, NULL, },
-  { "AR[CCV]", 26, 1, 2, 32, NULL, },
-  { "AR[EC]", 26, 1, 2, 66, NULL, },
-  { "AR[FPSR].sf0.controls", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf1.controls", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf2.controls", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf3.controls", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf0.flags", 30, 1, 0, -1, NULL, },
-  { "AR[FPSR].sf0.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf0.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf1.flags", 30, 1, 0, -1, NULL, },
-  { "AR[FPSR].sf1.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf1.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf2.flags", 30, 1, 0, -1, NULL, },
-  { "AR[FPSR].sf2.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf2.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf3.flags", 30, 1, 0, -1, NULL, },
-  { "AR[FPSR].sf3.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].sf3.flags", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].rv", 30, 1, 2, -1, NULL, },
-  { "AR[FPSR].traps", 30, 1, 2, -1, NULL, },
-  { "AR[ITC]", 26, 1, 2, 44, NULL, },
-  { "AR[K%], % in 0 - 7", 1, 1, 2, -1, NULL, },
-  { "AR[LC]", 26, 1, 2, 65, NULL, },
-  { "AR[PFS]", 26, 1, 0, 64, NULL, },
-  { "AR[PFS]", 26, 1, 2, 64, NULL, },
-  { "AR[PFS]", 26, 1, 2, 64, NULL, },
-  { "AR[RNAT]", 26, 1, 2, 19, NULL, },
-  { "AR[RSC]", 26, 1, 2, 16, NULL, },
-  { "AR[UNAT]{%}, % in 0 - 63", 2, 1, 2, -1, NULL, },
-  { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111", 3, 1, 0, -1, NULL, },
-  { "AR%, % in 48 - 63, 112-127", 4, 1, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, },
-  { "BR%, % in 0 - 7", 5, 1, 0, -1, NULL, },
-  { "CFM", 6, 1, 2, -1, NULL, },
-  { "CPUID#", 7, 1, 0, -1, NULL, },
-  { "CR[CMCV]", 27, 1, 2, 74, NULL, },
-  { "CR[DCR]", 27, 1, 2, 0, NULL, },
-  { "CR[EOI]", 27, 1, 7, 67, "SC Section 10.8.3.4", },
-  { "CR[GPTA]", 27, 1, 2, 9, NULL, },
-  { "CR[IFA]", 27, 1, 2, 20, NULL, },
-  { "CR[IFS]", 27, 1, 2, 23, NULL, },
-  { "CR[IHA]", 27, 1, 2, 25, NULL, },
-  { "CR[IIM]", 27, 1, 2, 24, NULL, },
-  { "CR[IIP]", 27, 1, 2, 19, NULL, },
-  { "CR[IIPA]", 27, 1, 2, 22, NULL, },
-  { "CR[IPSR]", 27, 1, 2, 16, NULL, },
-  { "CR[IRR%], % in 0 - 3", 8, 1, 2, -1, NULL, },
-  { "CR[ISR]", 27, 1, 2, 17, NULL, },
-  { "CR[ITIR]", 27, 1, 2, 21, NULL, },
-  { "CR[ITM]", 27, 1, 2, 1, NULL, },
-  { "CR[ITV]", 27, 1, 2, 72, NULL, },
-  { "CR[IVA]", 27, 1, 2, 2, NULL, },
-  { "CR[IVR]", 27, 1, 7, 65, "SC", },
-  { "CR[LID]", 27, 1, 7, 64, "SC", },
-  { "CR[LRR%], % in 0 - 1", 9, 1, 2, -1, NULL, },
-  { "CR[PMV]", 27, 1, 2, 73, NULL, },
-  { "CR[PTA]", 27, 1, 2, 8, NULL, },
-  { "CR[TPR]", 27, 1, 2, 66, NULL, },
-  { "CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127", 10, 1, 0, -1, NULL, },
-  { "DBR#", 11, 1, 2, -1, NULL, },
-  { "DTC", 0, 1, 0, -1, NULL, },
-  { "DTC", 0, 1, 2, -1, NULL, },
-  { "DTC", 0, 1, 2, -1, NULL, },
-  { "DTC_LIMIT*", 0, 1, 2, -1, NULL, },
-  { "DTR", 0, 1, 2, -1, NULL, },
-  { "DTR", 0, 1, 2, -1, NULL, },
-  { "DTR", 0, 1, 2, -1, NULL, },
-  { "DTR", 0, 1, 0, -1, NULL, },
-  { "FR%, % in 0 - 1", 12, 1, 0, -1, NULL, },
-  { "FR%, % in 2 - 127", 13, 1, 2, -1, NULL, },
-  { "GR0", 14, 1, 0, -1, NULL, },
-  { "GR%, % in 1 - 127", 15, 1, 2, -1, NULL, },
-  { "IBR#", 16, 1, 2, -1, NULL, },
-  { "InService*", 17, 1, 7, -1, "SC", },
-  { "IP", 0, 1, 0, -1, NULL, },
-  { "ITC", 0, 1, 0, -1, NULL, },
-  { "ITC", 0, 1, 2, -1, NULL, },
-  { "ITC", 0, 1, 2, -1, NULL, },
-  { "ITR", 0, 1, 2, -1, NULL, },
-  { "ITR", 0, 1, 2, -1, NULL, },
-  { "ITR", 0, 1, 0, -1, NULL, },
-  { "memory", 0, 1, 0, -1, NULL, },
-  { "MSR#", 18, 1, 7, -1, "SC", },
-  { "PKR#", 19, 1, 0, -1, NULL, },
-  { "PKR#", 19, 1, 0, -1, NULL, },
-  { "PKR#", 19, 1, 2, -1, NULL, },
-  { "PMC#", 20, 1, 2, -1, NULL, },
-  { "PMD#", 21, 1, 2, -1, NULL, },
-  { "PR0", 0, 1, 0, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 1, 0, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 1, 0, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 1, 2, -1, NULL, },
-  { "PR%, % in 1 - 15", 22, 1, 2, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 1, 0, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 1, 0, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 1, 2, -1, NULL, },
-  { "PR%, % in 16 - 62", 23, 1, 2, -1, NULL, },
-  { "PR63", 24, 1, 0, -1, NULL, },
-  { "PR63", 24, 1, 0, -1, NULL, },
-  { "PR63", 24, 1, 2, -1, NULL, },
-  { "PR63", 24, 1, 2, -1, NULL, },
-  { "PSR.ac", 28, 1, 2, 3, NULL, },
-  { "PSR.be", 28, 1, 2, 1, NULL, },
-  { "PSR.bn", 28, 1, 2, 44, NULL, },
-  { "PSR.cpl", 28, 1, 2, 32, NULL, },
-  { "PSR.da", 28, 1, 2, 38, NULL, },
-  { "PSR.db", 28, 1, 2, 24, NULL, },
-  { "PSR.dd", 28, 1, 2, 39, NULL, },
-  { "PSR.dfh", 28, 1, 2, 19, NULL, },
-  { "PSR.dfl", 28, 1, 2, 18, NULL, },
-  { "PSR.di", 28, 1, 2, 22, NULL, },
-  { "PSR.dt", 28, 1, 2, 17, NULL, },
-  { "PSR.ed", 28, 1, 2, 43, NULL, },
-  { "PSR.i", 28, 1, 2, 14, NULL, },
-  { "PSR.ia", 28, 1, 2, 14, NULL, },
-  { "PSR.ic", 28, 1, 2, 13, NULL, },
-  { "PSR.id", 28, 1, 2, 14, NULL, },
-  { "PSR.is", 28, 1, 2, 14, NULL, },
-  { "PSR.it", 28, 1, 2, 14, NULL, },
-  { "PSR.lp", 28, 1, 2, 25, NULL, },
-  { "PSR.mc", 28, 1, 2, 35, NULL, },
-  { "PSR.mfh", 28, 1, 0, 5, NULL, },
-  { "PSR.mfh", 28, 1, 2, 5, NULL, },
-  { "PSR.mfh", 28, 1, 2, 5, NULL, },
-  { "PSR.mfl", 28, 1, 0, 4, NULL, },
-  { "PSR.mfl", 28, 1, 2, 4, NULL, },
-  { "PSR.mfl", 28, 1, 2, 4, NULL, },
-  { "PSR.pk", 28, 1, 2, 15, NULL, },
-  { "PSR.pp", 28, 1, 2, 21, NULL, },
-  { "PSR.ri", 28, 1, 2, 41, NULL, },
-  { "PSR.rt", 28, 1, 2, 27, NULL, },
-  { "PSR.si", 28, 1, 2, 23, NULL, },
-  { "PSR.sp", 28, 1, 2, 20, NULL, },
-  { "PSR.ss", 28, 1, 2, 40, NULL, },
-  { "PSR.tb", 28, 1, 2, 26, NULL, },
-  { "PSR.up", 28, 1, 2, 2, NULL, },
-  { "RR#", 25, 1, 2, -1, NULL, },
-  { "RSE", 29, 1, 2, -1, NULL, },
-  { "PR63", 24, 2, 6, -1, NULL, },
-};
-
-static const short dep0[] = {
-  88, 252, 2131, 2297, 
-};
-
-static const short dep1[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 4127, 
-  20605, 
-};
-
-static const short dep2[] = {
-  88, 252, 2157, 2158, 2160, 2161, 2163, 2164, 2166, 2314, 2317, 2318, 2321, 
-  2322, 2325, 2326, 
-};
-
-static const short dep3[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2314, 2317, 
-  2318, 2321, 2322, 2325, 2326, 4127, 20605, 
-};
-
-static const short dep4[] = {
-  88, 252, 22637, 22638, 22640, 22641, 22643, 22644, 22646, 22794, 22797, 22798, 
-  22801, 22802, 22805, 22806, 
-};
-
-static const short dep5[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-  22794, 22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep6[] = {
-  88, 252, 2157, 2158, 2160, 2161, 2163, 2164, 2166, 2314, 2315, 2317, 2319, 
-  2321, 2323, 2325, 
-};
-
-static const short dep7[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2314, 2315, 
-  2318, 2319, 2322, 2323, 2326, 4127, 20605, 
-};
-
-static const short dep8[] = {
-  88, 252, 2157, 2158, 2160, 2161, 2163, 2164, 2166, 2314, 2316, 2318, 2320, 
-  2322, 2324, 2326, 
-};
-
-static const short dep9[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2314, 2316, 
-  2317, 2320, 2321, 2324, 2325, 4127, 20605, 
-};
-
-static const short dep10[] = {
-  88, 252, 2157, 2158, 2160, 2161, 2163, 2164, 2166, 2314, 2315, 2316, 2317, 
-  2318, 2319, 2320, 2321, 2322, 2323, 2324, 2325, 2326, 
-};
-
-static const short dep11[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2314, 2315, 
-  2316, 2317, 2318, 2319, 2320, 2321, 2322, 2323, 2324, 2325, 2326, 4127, 20605, 
-  
-};
-
-static const short dep12[] = {
-  88, 252, 2364, 
-};
-
-static const short dep13[] = {
-  32, 33, 88, 148, 166, 167, 252, 2074, 2075, 2157, 2159, 2160, 2162, 2163, 
-  2165, 2166, 4127, 
-};
-
-static const short dep14[] = {
-  88, 147, 252, 295, 2364, 28844, 28987, 
-};
-
-static const short dep15[] = {
-  1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 21, 22, 
-  23, 24, 25, 32, 33, 88, 136, 148, 166, 167, 252, 295, 2074, 2075, 2157, 2159, 
-  2160, 2162, 2163, 2165, 2166, 4127, 28844, 28987, 
-};
-
-static const short dep16[] = {
-  1, 4, 32, 88, 126, 174, 177, 211, 252, 282, 2364, 28844, 28987, 
-};
-
-static const short dep17[] = {
-  1, 18, 20, 30, 32, 33, 88, 148, 150, 151, 166, 167, 174, 177, 211, 252, 282, 
-  2074, 2075, 2157, 2159, 2160, 2162, 2163, 2165, 2166, 4127, 28844, 28987, 
-  
-};
-
-static const short dep18[] = {
-  1, 32, 43, 88, 174, 211, 218, 252, 28844, 28987, 
-};
-
-static const short dep19[] = {
-  1, 30, 32, 33, 88, 145, 166, 174, 211, 218, 252, 4127, 28844, 28987, 
-};
-
-static const short dep20[] = {
-  32, 88, 211, 252, 
-};
-
-static const short dep21[] = {
-  88, 166, 211, 252, 
-};
-
-static const short dep22[] = {
-  1, 32, 88, 120, 121, 123, 124, 125, 126, 127, 130, 131, 132, 133, 134, 135, 
-  136, 137, 138, 139, 140, 142, 143, 144, 145, 146, 147, 148, 151, 152, 153, 
-  154, 155, 156, 157, 158, 161, 162, 163, 164, 165, 166, 167, 168, 169, 174, 
-  211, 252, 279, 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 
-  292, 293, 294, 295, 296, 297, 298, 300, 301, 303, 304, 305, 306, 307, 308, 
-  309, 310, 311, 312, 313, 28844, 28987, 
-};
-
-static const short dep23[] = {
-  1, 30, 32, 33, 42, 43, 47, 50, 64, 88, 126, 166, 174, 211, 252, 279, 280, 
-  281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, 295, 
-  296, 297, 298, 300, 301, 303, 304, 305, 306, 307, 308, 309, 310, 311, 312, 
-  313, 4127, 28844, 28987, 
-};
-
-static const short dep24[] = {
-  88, 125, 252, 281, 
-};
-
-static const short dep25[] = {
-  88, 126, 166, 252, 281, 
-};
-
-static const short dep26[] = {
-  88, 126, 252, 282, 
-};
-
-static const short dep27[] = {
-  18, 19, 88, 89, 92, 96, 99, 126, 148, 166, 252, 282, 
-};
-
-static const short dep28[] = {
-  32, 33, 88, 166, 252, 2157, 2159, 2160, 2162, 2163, 2165, 2166, 4127, 
-};
-
-static const short dep29[] = {
-  1, 18, 32, 88, 174, 199, 200, 211, 252, 2074, 2255, 2258, 2364, 28844, 28987, 
-  
-};
-
-static const short dep30[] = {
-  1, 4, 30, 32, 33, 88, 126, 148, 166, 167, 174, 199, 201, 211, 252, 2074, 2075, 
-  2157, 2159, 2160, 2162, 2163, 2165, 2166, 2256, 2258, 4127, 28844, 28987, 
-  
-};
-
-static const short dep31[] = {
-  88, 252, 
-};
-
-static const short dep32[] = {
-  88, 166, 252, 2074, 2076, 
-};
-
-static const short dep33[] = {
-  32, 33, 88, 148, 166, 167, 252, 2157, 2159, 2160, 2162, 2163, 2165, 2166, 
-  4127, 
-};
-
-static const short dep34[] = {
-  4, 29, 30, 31, 88, 116, 117, 177, 211, 252, 277, 278, 2364, 
-};
-
-static const short dep35[] = {
-  4, 29, 32, 33, 88, 148, 166, 167, 177, 211, 252, 277, 278, 316, 2157, 2159, 
-  2160, 2162, 2163, 2165, 2166, 4127, 
-};
-
-static const short dep36[] = {
-  17, 88, 198, 252, 2364, 
-};
-
-static const short dep37[] = {
-  17, 32, 33, 88, 148, 166, 167, 198, 252, 2157, 2159, 2160, 2162, 2163, 2165, 
-  2166, 4127, 
-};
-
-static const short dep38[] = {
-  4, 17, 29, 30, 31, 88, 116, 117, 177, 198, 211, 252, 277, 278, 2364, 
-};
-
-static const short dep39[] = {
-  4, 17, 29, 32, 33, 88, 148, 166, 167, 177, 198, 211, 252, 277, 278, 316, 2157, 
-  2159, 2160, 2162, 2163, 2165, 2166, 4127, 
-};
-
-static const short dep40[] = {
-  1, 4, 30, 32, 33, 88, 126, 148, 166, 167, 174, 199, 201, 211, 252, 2157, 2159, 
-  2160, 2162, 2163, 2165, 2166, 2256, 2258, 4127, 28844, 28987, 
-};
-
-static const short dep41[] = {
-  88, 166, 252, 
-};
-
-static const short dep42[] = {
-  9, 88, 182, 183, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-  22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 22797, 22798, 22801, 
-  22802, 22805, 22806, 
-};
-
-static const short dep43[] = {
-  5, 13, 14, 32, 33, 88, 166, 182, 184, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 22794, 22797, 
-  22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep44[] = {
-  9, 10, 11, 12, 88, 182, 183, 185, 186, 188, 189, 191, 192, 252, 2127, 2295, 
-  18585, 18586, 18731, 18732, 18734, 18735, 22637, 22638, 22639, 22641, 22642, 
-  22644, 22645, 22794, 22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep45[] = {
-  5, 6, 7, 8, 13, 14, 32, 33, 88, 166, 182, 184, 185, 187, 188, 190, 191, 193, 
-  252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 2295, 4127, 16516, 16518, 18731, 
-  18733, 18734, 18736, 22794, 22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep46[] = {
-  10, 88, 185, 186, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-  22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 22797, 22798, 22801, 
-  22802, 22805, 22806, 
-};
-
-static const short dep47[] = {
-  6, 13, 14, 32, 33, 88, 166, 185, 187, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 22794, 22797, 
-  22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep48[] = {
-  11, 88, 188, 189, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-  22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 22797, 22798, 22801, 
-  22802, 22805, 22806, 
-};
-
-static const short dep49[] = {
-  7, 13, 14, 32, 33, 88, 166, 188, 190, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 22794, 22797, 
-  22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep50[] = {
-  12, 88, 191, 192, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-  22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 22797, 22798, 22801, 
-  22802, 22805, 22806, 
-};
-
-static const short dep51[] = {
-  8, 13, 14, 32, 33, 88, 166, 191, 193, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 22794, 22797, 
-  22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep52[] = {
-  9, 88, 182, 183, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-  
-};
-
-static const short dep53[] = {
-  5, 13, 14, 32, 33, 88, 166, 182, 184, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 
-};
-
-static const short dep54[] = {
-  9, 10, 11, 12, 88, 182, 183, 185, 186, 188, 189, 191, 192, 252, 2127, 2295, 
-  18585, 18586, 18731, 18732, 18734, 18735, 
-};
-
-static const short dep55[] = {
-  5, 6, 7, 8, 13, 14, 32, 33, 88, 166, 182, 184, 185, 187, 188, 190, 191, 193, 
-  252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 2295, 4127, 16516, 16518, 18731, 
-  18733, 18734, 18736, 
-};
-
-static const short dep56[] = {
-  10, 88, 185, 186, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-  
-};
-
-static const short dep57[] = {
-  6, 13, 14, 32, 33, 88, 166, 185, 187, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 
-};
-
-static const short dep58[] = {
-  11, 88, 188, 189, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-  
-};
-
-static const short dep59[] = {
-  7, 13, 14, 32, 33, 88, 166, 188, 190, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 
-};
-
-static const short dep60[] = {
-  12, 88, 191, 192, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-  
-};
-
-static const short dep61[] = {
-  8, 13, 14, 32, 33, 88, 166, 191, 193, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 
-};
-
-static const short dep62[] = {
-  88, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-};
-
-static const short dep63[] = {
-  32, 33, 88, 166, 252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 2295, 4127, 
-  16516, 16518, 18731, 18733, 18734, 18736, 
-};
-
-static const short dep64[] = {
-  5, 88, 178, 252, 
-};
-
-static const short dep65[] = {
-  5, 32, 33, 88, 166, 178, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep66[] = {
-  5, 32, 33, 88, 166, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep67[] = {
-  6, 88, 179, 252, 
-};
-
-static const short dep68[] = {
-  5, 32, 33, 88, 166, 179, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep69[] = {
-  7, 88, 180, 252, 
-};
-
-static const short dep70[] = {
-  5, 32, 33, 88, 166, 180, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep71[] = {
-  8, 88, 181, 252, 
-};
-
-static const short dep72[] = {
-  5, 32, 33, 88, 166, 181, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep73[] = {
-  9, 88, 183, 184, 252, 
-};
-
-static const short dep74[] = {
-  32, 33, 88, 166, 183, 184, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep75[] = {
-  32, 33, 88, 166, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep76[] = {
-  10, 88, 186, 187, 252, 
-};
-
-static const short dep77[] = {
-  32, 33, 88, 166, 186, 187, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep78[] = {
-  11, 88, 189, 190, 252, 
-};
-
-static const short dep79[] = {
-  32, 33, 88, 166, 189, 190, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep80[] = {
-  12, 88, 192, 193, 252, 
-};
-
-static const short dep81[] = {
-  32, 33, 88, 166, 192, 193, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep82[] = {
-  9, 13, 14, 32, 33, 88, 148, 166, 167, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep83[] = {
-  9, 10, 13, 14, 32, 33, 88, 148, 166, 167, 252, 2157, 2158, 2161, 2164, 4127, 
-  
-};
-
-static const short dep84[] = {
-  9, 11, 13, 14, 32, 33, 88, 148, 166, 167, 252, 2157, 2158, 2161, 2164, 4127, 
-  
-};
-
-static const short dep85[] = {
-  9, 12, 13, 14, 32, 33, 88, 148, 166, 167, 252, 2157, 2158, 2161, 2164, 4127, 
-  
-};
-
-static const short dep86[] = {
-  9, 88, 182, 183, 252, 
-};
-
-static const short dep87[] = {
-  5, 13, 14, 32, 33, 88, 166, 182, 184, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep88[] = {
-  9, 10, 11, 12, 88, 182, 183, 185, 186, 188, 189, 191, 192, 252, 
-};
-
-static const short dep89[] = {
-  5, 6, 7, 8, 13, 14, 32, 33, 88, 166, 182, 184, 185, 187, 188, 190, 191, 193, 
-  252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep90[] = {
-  10, 88, 185, 186, 252, 
-};
-
-static const short dep91[] = {
-  6, 13, 14, 32, 33, 88, 166, 185, 187, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep92[] = {
-  11, 88, 188, 189, 252, 
-};
-
-static const short dep93[] = {
-  7, 13, 14, 32, 33, 88, 166, 188, 190, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep94[] = {
-  12, 88, 191, 192, 252, 
-};
-
-static const short dep95[] = {
-  8, 13, 14, 32, 33, 88, 166, 191, 193, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep96[] = {
-  9, 88, 182, 183, 252, 2157, 2158, 2159, 2161, 2162, 2164, 2165, 2314, 2317, 
-  2318, 2321, 2322, 2325, 2326, 
-};
-
-static const short dep97[] = {
-  5, 13, 14, 32, 33, 88, 166, 182, 184, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2314, 2317, 2318, 2321, 2322, 2325, 2326, 4127, 16516, 16518, 
-};
-
-static const short dep98[] = {
-  9, 10, 11, 12, 88, 182, 183, 185, 186, 188, 189, 191, 192, 252, 2157, 2158, 
-  2159, 2161, 2162, 2164, 2165, 2314, 2317, 2318, 2321, 2322, 2325, 2326, 
-};
-
-static const short dep99[] = {
-  5, 6, 7, 8, 13, 14, 32, 33, 88, 166, 182, 184, 185, 187, 188, 190, 191, 193, 
-  252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 2314, 2317, 2318, 2321, 2322, 
-  2325, 2326, 4127, 16516, 16518, 
-};
-
-static const short dep100[] = {
-  10, 88, 185, 186, 252, 2157, 2158, 2159, 2161, 2162, 2164, 2165, 2314, 2317, 
-  2318, 2321, 2322, 2325, 2326, 
-};
-
-static const short dep101[] = {
-  6, 13, 14, 32, 33, 88, 166, 185, 187, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2314, 2317, 2318, 2321, 2322, 2325, 2326, 4127, 16516, 16518, 
-};
-
-static const short dep102[] = {
-  11, 88, 188, 189, 252, 2157, 2158, 2159, 2161, 2162, 2164, 2165, 2314, 2317, 
-  2318, 2321, 2322, 2325, 2326, 
-};
-
-static const short dep103[] = {
-  7, 13, 14, 32, 33, 88, 166, 188, 190, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2314, 2317, 2318, 2321, 2322, 2325, 2326, 4127, 16516, 16518, 
-};
-
-static const short dep104[] = {
-  12, 88, 191, 192, 252, 2157, 2158, 2159, 2161, 2162, 2164, 2165, 2314, 2317, 
-  2318, 2321, 2322, 2325, 2326, 
-};
-
-static const short dep105[] = {
-  8, 13, 14, 32, 33, 88, 166, 191, 193, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 2314, 2317, 2318, 2321, 2322, 2325, 2326, 4127, 16516, 16518, 
-};
-
-static const short dep106[] = {
-  9, 88, 182, 183, 252, 22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 
-  22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep107[] = {
-  5, 13, 14, 32, 33, 88, 166, 182, 184, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 4127, 16516, 16518, 22794, 22797, 22798, 22801, 22802, 22805, 22806, 
-  
-};
-
-static const short dep108[] = {
-  9, 10, 11, 12, 88, 182, 183, 185, 186, 188, 189, 191, 192, 252, 22637, 22638, 
-  22639, 22641, 22642, 22644, 22645, 22794, 22797, 22798, 22801, 22802, 22805, 
-  22806, 
-};
-
-static const short dep109[] = {
-  5, 6, 7, 8, 13, 14, 32, 33, 88, 166, 182, 184, 185, 187, 188, 190, 191, 193, 
-  252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 4127, 16516, 16518, 22794, 
-  22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep110[] = {
-  10, 88, 185, 186, 252, 22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 
-  22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep111[] = {
-  6, 13, 14, 32, 33, 88, 166, 185, 187, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 4127, 16516, 16518, 22794, 22797, 22798, 22801, 22802, 22805, 22806, 
-  
-};
-
-static const short dep112[] = {
-  11, 88, 188, 189, 252, 22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 
-  22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep113[] = {
-  7, 13, 14, 32, 33, 88, 166, 188, 190, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 4127, 16516, 16518, 22794, 22797, 22798, 22801, 22802, 22805, 22806, 
-  
-};
-
-static const short dep114[] = {
-  12, 88, 191, 192, 252, 22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 
-  22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep115[] = {
-  8, 13, 14, 32, 33, 88, 166, 191, 193, 252, 2126, 2127, 2128, 2157, 2158, 2161, 
-  2164, 4127, 16516, 16518, 22794, 22797, 22798, 22801, 22802, 22805, 22806, 
-  
-};
-
-static const short dep116[] = {
-  88, 252, 2157, 2158, 2159, 2161, 2162, 2164, 2165, 2314, 2317, 2318, 2321, 
-  2322, 2325, 2326, 
-};
-
-static const short dep117[] = {
-  32, 33, 88, 166, 252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 2314, 2317, 
-  2318, 2321, 2322, 2325, 2326, 4127, 16516, 16518, 
-};
-
-static const short dep118[] = {
-  88, 252, 22637, 22638, 22639, 22641, 22642, 22644, 22645, 22794, 22797, 22798, 
-  22801, 22802, 22805, 22806, 
-};
-
-static const short dep119[] = {
-  32, 33, 88, 166, 252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 4127, 16516, 
-  16518, 22794, 22797, 22798, 22801, 22802, 22805, 22806, 
-};
-
-static const short dep120[] = {
-  13, 14, 32, 33, 88, 166, 252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 2295, 
-  4127, 16516, 16518, 18731, 18733, 18734, 18736, 
-};
-
-static const short dep121[] = {
-  32, 33, 88, 148, 166, 167, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 
-  4127, 20605, 
-};
-
-static const short dep122[] = {
-  88, 252, 2075, 2076, 2256, 2257, 
-};
-
-static const short dep123[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2255, 2257, 
-  4127, 20605, 
-};
-
-static const short dep124[] = {
-  32, 33, 88, 166, 252, 2074, 2076, 2157, 2158, 2161, 2164, 2297, 4127, 20605, 
-  
-};
-
-static const short dep125[] = {
-  88, 252, 14446, 14448, 14449, 14451, 14452, 14454, 14605, 14606, 14609, 14610, 
-  14613, 14614, 
-};
-
-static const short dep126[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 4127, 14605, 14606, 14609, 14610, 
-  14613, 14614, 20605, 24685, 24686, 24689, 24692, 
-};
-
-static const short dep127[] = {
-  88, 113, 115, 116, 118, 252, 273, 274, 277, 278, 
-};
-
-static const short dep128[] = {
-  32, 33, 88, 166, 252, 273, 274, 277, 278, 4127, 24685, 24686, 24689, 24692, 
-  
-};
-
-static const short dep129[] = {
-  32, 33, 88, 166, 252, 2157, 2158, 2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep130[] = {
-  32, 33, 88, 110, 113, 116, 166, 252, 2297, 4127, 20605, 24685, 
-};
-
-static const short dep131[] = {
-  4, 17, 19, 20, 88, 177, 198, 201, 252, 2073, 2254, 
-};
-
-static const short dep132[] = {
-  32, 33, 88, 166, 177, 198, 200, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 
-  2254, 4127, 20605, 
-};
-
-static const short dep133[] = {
-  4, 17, 18, 19, 32, 33, 88, 166, 252, 2073, 2157, 2158, 2161, 2164, 2297, 4127, 
-  20605, 
-};
-
-static const short dep134[] = {
-  0, 32, 33, 88, 148, 166, 167, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep135[] = {
-  0, 88, 173, 252, 
-};
-
-static const short dep136[] = {
-  0, 32, 33, 88, 148, 166, 167, 173, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep137[] = {
-  32, 33, 88, 166, 173, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep138[] = {
-  2, 21, 88, 175, 202, 252, 28844, 28987, 
-};
-
-static const short dep139[] = {
-  1, 2, 21, 22, 88, 160, 161, 166, 175, 202, 252, 28844, 28987, 
-};
-
-static const short dep140[] = {
-  1, 21, 22, 30, 32, 33, 88, 160, 161, 166, 175, 202, 252, 4127, 28844, 28987, 
-  
-};
-
-static const short dep141[] = {
-  0, 32, 33, 88, 166, 173, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep142[] = {
-  1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 21, 22, 23, 88, 174, 175, 
-  176, 178, 179, 180, 181, 183, 184, 186, 187, 189, 190, 192, 193, 194, 195, 
-  196, 202, 203, 204, 252, 2064, 2073, 2245, 2254, 28844, 28987, 
-};
-
-static const short dep143[] = {
-  22, 32, 33, 88, 126, 166, 174, 175, 176, 178, 179, 180, 181, 183, 184, 186, 
-  187, 189, 190, 192, 193, 194, 195, 196, 202, 203, 204, 252, 2129, 2130, 2131, 
-  2157, 2158, 2161, 2164, 2245, 2254, 4127, 20605, 28844, 28987, 
-};
-
-static const short dep144[] = {
-  88, 252, 14455, 14457, 14458, 14460, 14489, 14490, 14505, 14615, 14616, 14636, 
-  14637, 14639, 14640, 14649, 
-};
-
-static const short dep145[] = {
-  32, 33, 88, 165, 166, 252, 2157, 2158, 2161, 2164, 4127, 14615, 14616, 14636, 
-  14637, 14639, 14640, 14649, 
-};
-
-static const short dep146[] = {
-  14455, 14457, 14458, 14460, 14489, 14490, 14505, 14615, 14616, 14636, 14637, 
-  14639, 14640, 14649, 
-};
-
-static const short dep147[] = {
-  165, 14615, 14616, 14636, 14637, 14639, 14640, 14649, 
-};
-
-static const short dep148[] = {
-  88, 252, 14456, 14457, 14459, 14460, 14468, 14469, 14470, 14471, 14472, 14473, 
-  14474, 14475, 14477, 14480, 14481, 14489, 14490, 14491, 14492, 14493, 14498, 
-  14499, 14500, 14501, 14505, 14615, 14616, 14622, 14623, 14624, 14625, 14627, 
-  14629, 14636, 14637, 14639, 14640, 14641, 14642, 14645, 14646, 14649, 
-};
-
-static const short dep149[] = {
-  32, 33, 64, 88, 126, 166, 252, 2157, 2158, 2161, 2164, 4127, 14615, 14616, 
-  14622, 14623, 14624, 14625, 14627, 14629, 14636, 14637, 14639, 14640, 14641, 
-  14642, 14645, 14646, 14649, 
-};
-
-static const short dep150[] = {
-  1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 21, 22, 23, 32, 33, 88, 126, 
-  163, 166, 252, 2064, 2073, 2157, 2158, 2161, 2164, 2297, 4127, 20605, 28844, 
-  
-};
-
-static const short dep151[] = {
-  35, 36, 37, 38, 39, 40, 41, 42, 44, 45, 46, 47, 48, 49, 50, 52, 53, 54, 55, 
-  56, 57, 59, 61, 62, 63, 64, 85, 87, 88, 213, 214, 215, 216, 217, 218, 219, 
-  220, 221, 222, 223, 225, 226, 227, 228, 229, 231, 233, 234, 235, 251, 252, 
-  2108, 2280, 
-};
-
-static const short dep152[] = {
-  32, 33, 87, 88, 126, 145, 166, 213, 214, 215, 216, 217, 218, 219, 220, 221, 
-  222, 223, 225, 226, 227, 228, 229, 231, 233, 234, 235, 251, 252, 2129, 2130, 
-  2131, 2157, 2158, 2161, 2164, 2280, 4127, 20605, 
-};
-
-static const short dep153[] = {
-  51, 86, 88, 224, 251, 252, 2131, 2297, 
-};
-
-static const short dep154[] = {
-  32, 33, 35, 36, 38, 40, 41, 43, 44, 45, 46, 48, 49, 52, 53, 55, 56, 57, 58, 
-  59, 61, 62, 63, 85, 86, 88, 126, 145, 166, 224, 251, 252, 2099, 2108, 2157, 
-  2158, 2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep155[] = {
-  2, 21, 33, 88, 175, 202, 211, 252, 2131, 2297, 28844, 28987, 
-};
-
-static const short dep156[] = {
-  2, 18, 19, 21, 22, 30, 32, 33, 88, 160, 161, 166, 175, 202, 211, 252, 2297, 
-  4127, 20605, 28844, 28987, 
-};
-
-static const short dep157[] = {
-  88, 120, 121, 123, 124, 128, 129, 132, 133, 134, 135, 136, 137, 138, 139, 
-  141, 144, 145, 149, 150, 153, 154, 155, 156, 157, 159, 160, 162, 163, 164, 
-  165, 167, 168, 169, 252, 279, 280, 284, 286, 287, 288, 289, 291, 293, 297, 
-  300, 301, 303, 304, 305, 306, 308, 309, 310, 312, 313, 
-};
-
-static const short dep158[] = {
-  32, 33, 64, 88, 126, 166, 252, 279, 280, 284, 286, 287, 288, 289, 291, 293, 
-  297, 300, 301, 303, 304, 305, 306, 308, 309, 310, 312, 313, 2129, 2130, 2131, 
-  2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep159[] = {
-  88, 119, 121, 122, 124, 153, 154, 169, 252, 279, 280, 300, 301, 303, 304, 
-  313, 
-};
-
-static const short dep160[] = {
-  32, 33, 88, 165, 166, 252, 279, 280, 300, 301, 303, 304, 313, 2129, 2130, 
-  2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep161[] = {
-  32, 33, 88, 121, 124, 126, 129, 130, 133, 135, 137, 139, 141, 142, 144, 148, 
-  149, 151, 152, 153, 154, 156, 157, 159, 161, 162, 164, 166, 168, 169, 252, 
-  2157, 2158, 2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep162[] = {
-  32, 33, 88, 121, 124, 153, 154, 166, 169, 252, 2157, 2158, 2161, 2164, 2297, 
-  4127, 20605, 
-};
-
-static const short dep163[] = {
-  32, 33, 67, 68, 73, 75, 88, 102, 126, 155, 166, 170, 252, 2129, 2130, 2131, 
-  2157, 2158, 2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep164[] = {
-  32, 33, 67, 68, 73, 75, 88, 102, 126, 127, 128, 130, 131, 155, 166, 170, 252, 
-  2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep165[] = {
-  68, 69, 88, 92, 93, 239, 240, 252, 254, 255, 
-};
-
-static const short dep166[] = {
-  32, 33, 39, 54, 69, 71, 77, 88, 90, 93, 126, 145, 166, 170, 239, 240, 252, 
-  254, 255, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep167[] = {
-  32, 33, 39, 54, 69, 71, 88, 90, 93, 95, 97, 126, 145, 166, 170, 239, 240, 
-  252, 254, 255, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep168[] = {
-  88, 252, 12458, 12459, 12602, 
-};
-
-static const short dep169[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 
-  12602, 20605, 
-};
-
-static const short dep170[] = {
-  88, 252, 6210, 6211, 6381, 
-};
-
-static const short dep171[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 
-  6381, 20605, 
-};
-
-static const short dep172[] = {
-  88, 252, 6228, 6394, 
-};
-
-static const short dep173[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 
-  6394, 20605, 
-};
-
-static const short dep174[] = {
-  88, 252, 6246, 6247, 6248, 6249, 6405, 6407, 8454, 
-};
-
-static const short dep175[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 
-  6249, 6406, 6407, 8295, 8453, 20605, 
-};
-
-static const short dep176[] = {
-  88, 252, 6250, 6251, 6408, 
-};
-
-static const short dep177[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 
-  6408, 20605, 
-};
-
-static const short dep178[] = {
-  88, 252, 6252, 6409, 
-};
-
-static const short dep179[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 
-  6409, 20605, 
-};
-
-static const short dep180[] = {
-  88, 252, 10341, 10500, 
-};
-
-static const short dep181[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 
-  10500, 20605, 
-};
-
-static const short dep182[] = {
-  68, 69, 73, 74, 88, 92, 93, 239, 240, 242, 243, 252, 254, 255, 
-};
-
-static const short dep183[] = {
-  32, 33, 39, 54, 69, 71, 74, 77, 88, 90, 93, 126, 145, 166, 170, 239, 240, 
-  242, 244, 252, 254, 255, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-  
-};
-
-static const short dep184[] = {
-  68, 69, 88, 92, 93, 95, 96, 239, 240, 252, 254, 255, 256, 257, 
-};
-
-static const short dep185[] = {
-  32, 33, 39, 54, 69, 71, 88, 90, 93, 95, 97, 126, 145, 166, 170, 239, 240, 
-  252, 254, 255, 256, 257, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-  
-};
-
-static const short dep186[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 
-  4127, 12459, 20605, 
-};
-
-static const short dep187[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 
-  4127, 6210, 20605, 
-};
-
-static const short dep188[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 
-  4127, 6228, 20605, 
-};
-
-static const short dep189[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 
-  4127, 6248, 8294, 20605, 
-};
-
-static const short dep190[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 
-  4127, 6250, 20605, 
-};
-
-static const short dep191[] = {
-  32, 33, 88, 126, 165, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 
-  2297, 4127, 6251, 6252, 20605, 
-};
-
-static const short dep192[] = {
-  32, 33, 88, 126, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 
-  4127, 10341, 20605, 
-};
-
-static const short dep193[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 4127, 
-  6178, 20605, 
-};
-
-static const short dep194[] = {
-  68, 70, 71, 88, 89, 90, 91, 238, 239, 252, 253, 254, 
-};
-
-static const short dep195[] = {
-  32, 33, 69, 70, 74, 76, 88, 91, 93, 95, 98, 126, 166, 170, 238, 240, 252, 
-  253, 255, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep196[] = {
-  68, 70, 71, 72, 88, 89, 90, 91, 94, 238, 239, 241, 252, 253, 254, 
-};
-
-static const short dep197[] = {
-  32, 33, 69, 70, 72, 74, 76, 88, 91, 93, 94, 95, 98, 126, 166, 170, 238, 240, 
-  241, 252, 253, 255, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-  
-};
-
-static const short dep198[] = {
-  68, 70, 71, 75, 76, 77, 88, 89, 90, 91, 238, 239, 244, 245, 252, 253, 254, 
-  
-};
-
-static const short dep199[] = {
-  32, 33, 69, 70, 74, 76, 88, 91, 93, 126, 166, 170, 238, 240, 243, 245, 252, 
-  253, 255, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep200[] = {
-  68, 70, 71, 88, 89, 90, 91, 97, 98, 99, 238, 239, 252, 253, 254, 257, 258, 
-  
-};
-
-static const short dep201[] = {
-  32, 33, 69, 70, 88, 91, 93, 95, 98, 126, 166, 170, 238, 240, 252, 253, 255, 
-  256, 258, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep202[] = {
-  32, 33, 38, 62, 88, 166, 170, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 
-  2297, 4127, 20605, 
-};
-
-static const short dep203[] = {
-  32, 33, 88, 166, 170, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 
-  4127, 20605, 
-};
-
-static const short dep204[] = {
-  32, 33, 68, 73, 75, 88, 126, 166, 170, 252, 2129, 2130, 2131, 2157, 2158, 
-  2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep205[] = {
-  32, 33, 88, 148, 166, 167, 252, 2126, 2127, 2128, 2129, 2130, 2131, 2157, 
-  2158, 2161, 2164, 4127, 16516, 16518, 20605, 
-};
-
-static const short dep206[] = {
-  32, 33, 68, 73, 75, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 
-  4127, 20605, 
-};
-
-static const short dep207[] = {
-  32, 33, 69, 70, 88, 91, 126, 166, 238, 240, 252, 253, 255, 2129, 2130, 2131, 
-  2157, 2158, 2161, 2164, 4127, 20605, 
-};
-
-static const short dep208[] = {
-  32, 33, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 128, 130, 
-  131, 138, 155, 166, 170, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2297, 
-  4127, 20605, 
-};
-
-static const short dep209[] = {
-  32, 33, 36, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 128, 
-  130, 131, 138, 140, 155, 166, 170, 252, 2129, 2130, 2131, 2157, 2158, 2161, 
-  2164, 2297, 4127, 20605, 
-};
-
-static const short dep210[] = {
-  0, 88, 173, 252, 2131, 2297, 
-};
-
-static const short dep211[] = {
-  0, 32, 33, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 128, 
-  130, 131, 138, 155, 166, 170, 173, 252, 2129, 2130, 2131, 2157, 2158, 2161, 
-  2164, 2297, 4127, 20605, 
-};
-
-static const short dep212[] = {
-  0, 32, 33, 36, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 
-  128, 130, 131, 138, 140, 155, 166, 170, 173, 252, 2129, 2130, 2131, 2157, 
-  2158, 2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep213[] = {
-  23, 32, 33, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 128, 
-  130, 131, 138, 155, 166, 170, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 
-  2297, 4127, 20605, 
-};
-
-static const short dep214[] = {
-  0, 88, 173, 252, 2297, 26706, 
-};
-
-static const short dep215[] = {
-  0, 88, 100, 173, 252, 259, 
-};
-
-static const short dep216[] = {
-  0, 32, 33, 67, 68, 73, 75, 88, 102, 119, 120, 122, 123, 126, 127, 128, 130, 
-  131, 138, 155, 166, 170, 173, 252, 259, 2129, 2130, 2131, 2157, 2158, 2161, 
-  2164, 4127, 20605, 
-};
-
-static const short dep217[] = {
-  0, 23, 88, 100, 173, 204, 252, 259, 
-};
-
-static const short dep218[] = {
-  0, 32, 33, 67, 68, 73, 75, 88, 102, 119, 120, 122, 123, 126, 127, 128, 130, 
-  131, 138, 155, 166, 170, 173, 204, 252, 259, 2129, 2130, 2131, 2157, 2158, 
-  2161, 2164, 4127, 20605, 
-};
-
-static const short dep219[] = {
-  0, 88, 100, 173, 252, 259, 2131, 2297, 
-};
-
-static const short dep220[] = {
-  0, 3, 32, 33, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 
-  128, 130, 131, 138, 155, 166, 170, 173, 252, 259, 2129, 2130, 2131, 2157, 
-  2158, 2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep221[] = {
-  0, 32, 33, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 128, 
-  130, 131, 138, 155, 166, 170, 173, 252, 259, 2129, 2130, 2131, 2157, 2158, 
-  2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep222[] = {
-  32, 33, 88, 166, 252, 2126, 2127, 2128, 2157, 2158, 2161, 2164, 2297, 4127, 
-  16516, 16518, 20605, 
-};
-
-static const short dep223[] = {
-  0, 32, 33, 67, 68, 73, 75, 88, 102, 119, 120, 122, 123, 126, 127, 128, 130, 
-  131, 138, 155, 166, 170, 173, 252, 259, 2129, 2130, 2131, 2157, 2158, 2161, 
-  2164, 2297, 4127, 20605, 
-};
-
-static const short dep224[] = {
-  0, 23, 88, 100, 173, 204, 252, 259, 2131, 2297, 
-};
-
-static const short dep225[] = {
-  0, 32, 33, 67, 68, 73, 75, 88, 102, 119, 120, 122, 123, 126, 127, 128, 130, 
-  131, 138, 155, 166, 170, 173, 204, 252, 259, 2129, 2130, 2131, 2157, 2158, 
-  2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep226[] = {
-  32, 33, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 128, 130, 
-  131, 138, 155, 166, 170, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2295, 
-  4127, 16516, 16518, 18731, 18733, 18734, 18736, 20605, 
-};
-
-static const short dep227[] = {
-  32, 33, 36, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 128, 
-  130, 131, 138, 140, 155, 166, 170, 252, 2129, 2130, 2131, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 20605, 
-};
-
-static const short dep228[] = {
-  0, 88, 173, 252, 2127, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-};
-
-static const short dep229[] = {
-  0, 32, 33, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 128, 
-  130, 131, 138, 155, 166, 170, 173, 252, 2129, 2130, 2131, 2157, 2158, 2161, 
-  2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 20605, 
-};
-
-static const short dep230[] = {
-  0, 32, 33, 36, 67, 68, 73, 75, 88, 100, 102, 119, 120, 122, 123, 126, 127, 
-  128, 130, 131, 138, 140, 155, 166, 170, 173, 252, 2129, 2130, 2131, 2157, 
-  2158, 2161, 2164, 2295, 4127, 16516, 16518, 18731, 18733, 18734, 18736, 20605, 
-  
-};
-
-static const short dep231[] = {
-  0, 88, 173, 252, 2128, 2295, 18585, 18586, 18731, 18732, 18734, 18735, 
-};
-
-static const short dep232[] = {
-  32, 33, 67, 88, 126, 140, 166, 252, 2157, 2158, 2161, 2164, 4127, 
-};
-
-static const short dep233[] = {
-  32, 33, 67, 88, 126, 127, 131, 140, 166, 252, 2157, 2158, 2161, 2164, 4127, 
-  
-};
-
-static const short dep234[] = {
-  32, 33, 67, 88, 126, 140, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 
-  2297, 4127, 20605, 
-};
-
-static const short dep235[] = {
-  32, 33, 67, 88, 126, 127, 131, 140, 166, 252, 2129, 2130, 2131, 2157, 2158, 
-  2161, 2164, 2297, 4127, 20605, 
-};
-
-static const short dep236[] = {
-  32, 33, 88, 166, 252, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2295, 4127, 
-  16516, 16518, 18731, 18733, 18734, 18736, 20605, 
-};
-
-static const short dep237[] = {
-  1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 17, 19, 20, 21, 22, 23, 
-  88, 174, 175, 176, 177, 178, 179, 180, 181, 183, 184, 186, 187, 189, 190, 
-  192, 193, 194, 195, 196, 198, 201, 202, 203, 204, 252, 2064, 2073, 2131, 2245, 
-  2254, 2297, 28844, 28987, 
-};
-
-static const short dep238[] = {
-  1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 17, 18, 19, 21, 22, 23, 
-  32, 33, 88, 126, 163, 166, 174, 175, 176, 177, 178, 179, 180, 181, 183, 184, 
-  186, 187, 189, 190, 192, 193, 194, 195, 196, 198, 200, 202, 203, 204, 252, 
-  2064, 2073, 2129, 2130, 2131, 2157, 2158, 2161, 2164, 2245, 2254, 2297, 4127, 
-  20605, 28844, 28987, 
-};
-
-#define NELS(X) (sizeof(X)/sizeof(X[0]))
-static const struct ia64_opcode_dependency
-op_dependencies[] = {
-  { NELS(dep1), dep1, NELS(dep0), dep0, },
-  { NELS(dep3), dep3, NELS(dep2), dep2, },
-  { NELS(dep5), dep5, NELS(dep4), dep4, },
-  { NELS(dep7), dep7, NELS(dep6), dep6, },
-  { NELS(dep9), dep9, NELS(dep8), dep8, },
-  { NELS(dep11), dep11, NELS(dep10), dep10, },
-  { NELS(dep13), dep13, NELS(dep12), dep12, },
-  { NELS(dep15), dep15, NELS(dep14), dep14, },
-  { NELS(dep17), dep17, NELS(dep16), dep16, },
-  { NELS(dep19), dep19, NELS(dep18), dep18, },
-  { NELS(dep21), dep21, NELS(dep20), dep20, },
-  { NELS(dep23), dep23, NELS(dep22), dep22, },
-  { NELS(dep25), dep25, NELS(dep24), dep24, },
-  { NELS(dep27), dep27, NELS(dep26), dep26, },
-  { NELS(dep28), dep28, NELS(dep12), dep12, },
-  { NELS(dep30), dep30, NELS(dep29), dep29, },
-  { NELS(dep32), dep32, NELS(dep31), dep31, },
-  { NELS(dep33), dep33, NELS(dep12), dep12, },
-  { NELS(dep35), dep35, NELS(dep34), dep34, },
-  { NELS(dep37), dep37, NELS(dep36), dep36, },
-  { NELS(dep39), dep39, NELS(dep38), dep38, },
-  { NELS(dep40), dep40, NELS(dep29), dep29, },
-  { NELS(dep41), dep41, NELS(dep31), dep31, },
-  { NELS(dep43), dep43, NELS(dep42), dep42, },
-  { NELS(dep45), dep45, NELS(dep44), dep44, },
-  { NELS(dep47), dep47, NELS(dep46), dep46, },
-  { NELS(dep49), dep49, NELS(dep48), dep48, },
-  { NELS(dep51), dep51, NELS(dep50), dep50, },
-  { NELS(dep53), dep53, NELS(dep52), dep52, },
-  { NELS(dep55), dep55, NELS(dep54), dep54, },
-  { NELS(dep57), dep57, NELS(dep56), dep56, },
-  { NELS(dep59), dep59, NELS(dep58), dep58, },
-  { NELS(dep61), dep61, NELS(dep60), dep60, },
-  { NELS(dep63), dep63, NELS(dep62), dep62, },
-  { NELS(dep65), dep65, NELS(dep64), dep64, },
-  { NELS(dep66), dep66, NELS(dep31), dep31, },
-  { NELS(dep68), dep68, NELS(dep67), dep67, },
-  { NELS(dep70), dep70, NELS(dep69), dep69, },
-  { NELS(dep72), dep72, NELS(dep71), dep71, },
-  { NELS(dep74), dep74, NELS(dep73), dep73, },
-  { NELS(dep75), dep75, NELS(dep31), dep31, },
-  { NELS(dep77), dep77, NELS(dep76), dep76, },
-  { NELS(dep79), dep79, NELS(dep78), dep78, },
-  { NELS(dep81), dep81, NELS(dep80), dep80, },
-  { NELS(dep82), dep82, NELS(dep31), dep31, },
-  { NELS(dep83), dep83, NELS(dep31), dep31, },
-  { NELS(dep84), dep84, NELS(dep31), dep31, },
-  { NELS(dep85), dep85, NELS(dep31), dep31, },
-  { NELS(dep87), dep87, NELS(dep86), dep86, },
-  { NELS(dep89), dep89, NELS(dep88), dep88, },
-  { NELS(dep91), dep91, NELS(dep90), dep90, },
-  { NELS(dep93), dep93, NELS(dep92), dep92, },
-  { NELS(dep95), dep95, NELS(dep94), dep94, },
-  { NELS(dep97), dep97, NELS(dep96), dep96, },
-  { NELS(dep99), dep99, NELS(dep98), dep98, },
-  { NELS(dep101), dep101, NELS(dep100), dep100, },
-  { NELS(dep103), dep103, NELS(dep102), dep102, },
-  { NELS(dep105), dep105, NELS(dep104), dep104, },
-  { NELS(dep107), dep107, NELS(dep106), dep106, },
-  { NELS(dep109), dep109, NELS(dep108), dep108, },
-  { NELS(dep111), dep111, NELS(dep110), dep110, },
-  { NELS(dep113), dep113, NELS(dep112), dep112, },
-  { NELS(dep115), dep115, NELS(dep114), dep114, },
-  { NELS(dep117), dep117, NELS(dep116), dep116, },
-  { NELS(dep119), dep119, NELS(dep118), dep118, },
-  { NELS(dep120), dep120, NELS(dep62), dep62, },
-  { NELS(dep121), dep121, NELS(dep31), dep31, },
-  { NELS(dep123), dep123, NELS(dep122), dep122, },
-  { NELS(dep124), dep124, NELS(dep0), dep0, },
-  { NELS(dep126), dep126, NELS(dep125), dep125, },
-  { NELS(dep128), dep128, NELS(dep127), dep127, },
-  { NELS(dep129), dep129, NELS(dep0), dep0, },
-  { NELS(dep130), dep130, NELS(dep0), dep0, },
-  { NELS(dep132), dep132, NELS(dep131), dep131, },
-  { NELS(dep133), dep133, NELS(dep0), dep0, },
-  { NELS(dep134), dep134, NELS(dep31), dep31, },
-  { NELS(dep136), dep136, NELS(dep135), dep135, },
-  { NELS(dep137), dep137, NELS(dep135), dep135, },
-  { NELS(dep139), dep139, NELS(dep138), dep138, },
-  { NELS(dep140), dep140, NELS(dep138), dep138, },
-  { NELS(dep141), dep141, NELS(dep135), dep135, },
-  { NELS(dep143), dep143, NELS(dep142), dep142, },
-  { NELS(dep145), dep145, NELS(dep144), dep144, },
-  { NELS(dep147), dep147, NELS(dep146), dep146, },
-  { NELS(dep149), dep149, NELS(dep148), dep148, },
-  { NELS(dep150), dep150, NELS(dep0), dep0, },
-  { NELS(dep152), dep152, NELS(dep151), dep151, },
-  { NELS(dep154), dep154, NELS(dep153), dep153, },
-  { NELS(dep156), dep156, NELS(dep155), dep155, },
-  { NELS(dep158), dep158, NELS(dep157), dep157, },
-  { NELS(dep160), dep160, NELS(dep159), dep159, },
-  { NELS(dep161), dep161, NELS(dep0), dep0, },
-  { NELS(dep162), dep162, NELS(dep0), dep0, },
-  { NELS(dep163), dep163, NELS(dep0), dep0, },
-  { NELS(dep164), dep164, NELS(dep31), dep31, },
-  { NELS(dep166), dep166, NELS(dep165), dep165, },
-  { NELS(dep167), dep167, NELS(dep165), dep165, },
-  { NELS(dep169), dep169, NELS(dep168), dep168, },
-  { NELS(dep171), dep171, NELS(dep170), dep170, },
-  { NELS(dep173), dep173, NELS(dep172), dep172, },
-  { NELS(dep175), dep175, NELS(dep174), dep174, },
-  { NELS(dep177), dep177, NELS(dep176), dep176, },
-  { NELS(dep179), dep179, NELS(dep178), dep178, },
-  { NELS(dep181), dep181, NELS(dep180), dep180, },
-  { NELS(dep183), dep183, NELS(dep182), dep182, },
-  { NELS(dep185), dep185, NELS(dep184), dep184, },
-  { NELS(dep186), dep186, NELS(dep0), dep0, },
-  { NELS(dep187), dep187, NELS(dep0), dep0, },
-  { NELS(dep188), dep188, NELS(dep0), dep0, },
-  { NELS(dep189), dep189, NELS(dep0), dep0, },
-  { NELS(dep190), dep190, NELS(dep0), dep0, },
-  { NELS(dep191), dep191, NELS(dep0), dep0, },
-  { NELS(dep192), dep192, NELS(dep0), dep0, },
-  { NELS(dep193), dep193, NELS(dep0), dep0, },
-  { NELS(dep195), dep195, NELS(dep194), dep194, },
-  { NELS(dep197), dep197, NELS(dep196), dep196, },
-  { NELS(dep199), dep199, NELS(dep198), dep198, },
-  { NELS(dep201), dep201, NELS(dep200), dep200, },
-  { NELS(dep202), dep202, NELS(dep0), dep0, },
-  { NELS(dep203), dep203, NELS(dep0), dep0, },
-  { NELS(dep204), dep204, NELS(dep0), dep0, },
-  { NELS(dep205), dep205, NELS(dep31), dep31, },
-  { NELS(dep206), dep206, NELS(dep31), dep31, },
-  { NELS(dep207), dep207, NELS(dep194), dep194, },
-  { NELS(dep208), dep208, NELS(dep0), dep0, },
-  { NELS(dep209), dep209, NELS(dep0), dep0, },
-  { NELS(dep211), dep211, NELS(dep210), dep210, },
-  { NELS(dep212), dep212, NELS(dep210), dep210, },
-  { NELS(dep213), dep213, NELS(dep0), dep0, },
-  { NELS(dep211), dep211, NELS(dep214), dep214, },
-  { NELS(dep216), dep216, NELS(dep215), dep215, },
-  { NELS(dep218), dep218, NELS(dep217), dep217, },
-  { NELS(dep220), dep220, NELS(dep219), dep219, },
-  { NELS(dep221), dep221, NELS(dep219), dep219, },
-  { NELS(dep222), dep222, NELS(dep0), dep0, },
-  { NELS(dep223), dep223, NELS(dep219), dep219, },
-  { NELS(dep225), dep225, NELS(dep224), dep224, },
-  { NELS(dep226), dep226, NELS(dep62), dep62, },
-  { NELS(dep227), dep227, NELS(dep62), dep62, },
-  { NELS(dep229), dep229, NELS(dep228), dep228, },
-  { NELS(dep230), dep230, NELS(dep228), dep228, },
-  { NELS(dep229), dep229, NELS(dep231), dep231, },
-  { NELS(dep232), dep232, NELS(dep31), dep31, },
-  { NELS(dep233), dep233, NELS(dep31), dep31, },
-  { NELS(dep234), dep234, NELS(dep0), dep0, },
-  { NELS(dep235), dep235, NELS(dep0), dep0, },
-  { NELS(dep236), dep236, NELS(dep62), dep62, },
-  { 0, NULL, 0, NULL, },
-  { NELS(dep238), dep238, NELS(dep237), dep237, },
-};
-
-static const struct ia64_completer_table
-completer_table[] = {
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 88 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 449, -1, 0, 1, 6 },
-  { 0x0, 0x0, 0, 512, -1, 0, 1, 17 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 147 },
-  { 0x0, 0x0, 0, 611, -1, 0, 1, 17 },
-  { 0x0, 0x0, 0, 1815, -1, 0, 1, 10 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 9 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 13 },
-  { 0x1, 0x1, 0, -1, -1, 13, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, 1991, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 122 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 44 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 40 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 78 },
-  { 0x0, 0x0, 0, 1855, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, 2034, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, 1859, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, 1861, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, 2043, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, 2046, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, 2068, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, 2071, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 24 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 24 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 24 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 24 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 35 },
-  { 0x0, 0x0, 0, 2079, -1, 0, 1, 29 },
-  { 0x0, 0x0, 0, 1170, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 40 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 77 },
-  { 0x0, 0x0, 0, 1203, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1212, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1221, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1230, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1239, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1248, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1257, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1266, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1275, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1285, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1295, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1305, -1, 0, 1, 124 },
-  { 0x0, 0x0, 0, 1314, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1320, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1326, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1332, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1338, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1344, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1350, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1356, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1362, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1368, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1374, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1380, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1386, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1392, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1398, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1404, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1410, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1416, -1, 0, 1, 137 },
-  { 0x0, 0x0, 0, 1420, -1, 0, 1, 142 },
-  { 0x0, 0x0, 0, 1424, -1, 0, 1, 144 },
-  { 0x0, 0x0, 0, 1428, -1, 0, 1, 144 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 79 },
-  { 0x0, 0x0, 0, 250, -1, 0, 1, 40 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 67 },
-  { 0x1, 0x1, 0, 975, -1, 20, 1, 67 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 68 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 69 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 70 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 71 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 72 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 86 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 87 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 89 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 90 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 91 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 92 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 97 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 98 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 99 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 100 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 101 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 102 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 103 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 106 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 107 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 108 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 109 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 110 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 111 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 112 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 113 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 148 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 148 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 148 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 71 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 147 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2371, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2372, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 1827, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 1828, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2386, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2387, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2388, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2389, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2390, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2373, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, 2374, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 11 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 84 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 83 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x1, 0x1, 0, -1, -1, 13, 1, 0 },
-  { 0x0, 0x0, 0, 2392, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 84 },
-  { 0x0, 0x0, 0, 1692, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1694, -1, 0, 1, 135 },
-  { 0x0, 0x0, 0, 1696, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1698, -1, 0, 1, 135 },
-  { 0x0, 0x0, 0, 1700, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1702, -1, 0, 1, 135 },
-  { 0x0, 0x0, 0, 1705, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1708, -1, 0, 1, 135 },
-  { 0x0, 0x0, 0, 1711, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1712, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1713, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1714, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1715, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1716, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1717, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, 1718, -1, 0, 1, 130 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 82 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 120 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 118 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 120 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 119 },
-  { 0x0, 0x0, 0, 1429, -1, 0, 1, 133 },
-  { 0x0, 0x0, 0, 1430, -1, 0, 1, 133 },
-  { 0x0, 0x0, 0, 1431, -1, 0, 1, 133 },
-  { 0x0, 0x0, 0, 1432, -1, 0, 1, 133 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 0, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 1, 217, -1, 0, 1, 12 },
-  { 0x1, 0x1, 2, -1, -1, 27, 1, 12 },
-  { 0x0, 0x0, 3, -1, 1112, 0, 0, -1 },
-  { 0x0, 0x0, 3, -1, 1113, 0, 0, -1 },
-  { 0x1, 0x1, 3, 2262, 1196, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2263, 1205, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2264, 1214, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2265, 1223, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2266, 1232, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2267, 1241, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2268, 1250, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2269, 1259, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2270, 1268, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2271, 1277, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2272, 1287, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2273, 1297, 33, 1, 126 },
-  { 0x1, 0x1, 3, 2274, 1310, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2275, 1316, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2276, 1322, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2277, 1328, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2278, 1334, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2279, 1340, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2280, 1346, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2281, 1352, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2282, 1358, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2283, 1364, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2284, 1370, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2285, 1376, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2286, 1382, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2287, 1388, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2288, 1394, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2289, 1400, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2290, 1406, 33, 1, 139 },
-  { 0x1, 0x1, 3, 2291, 1412, 33, 1, 139 },
-  { 0x1, 0x1, 3, -1, -1, 27, 1, 40 },
-  { 0x0, 0x0, 4, 1829, 1183, 0, 1, 132 },
-  { 0x0, 0x0, 4, 1830, 1185, 0, 1, 132 },
-  { 0x0, 0x0, 4, 1831, 1187, 0, 1, 132 },
-  { 0x0, 0x0, 4, 1832, 1189, 0, 1, 132 },
-  { 0x0, 0x0, 4, 1833, 1191, 0, 1, 133 },
-  { 0x0, 0x0, 4, 1834, 1193, 0, 1, 133 },
-  { 0x1, 0x1, 4, -1, 1200, 33, 1, 129 },
-  { 0x5, 0x5, 4, 407, 1199, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1209, 33, 1, 129 },
-  { 0x5, 0x5, 4, 408, 1208, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1218, 33, 1, 129 },
-  { 0x5, 0x5, 4, 409, 1217, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1227, 33, 1, 129 },
-  { 0x5, 0x5, 4, 410, 1226, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1236, 33, 1, 129 },
-  { 0x5, 0x5, 4, 411, 1235, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1245, 33, 1, 129 },
-  { 0x5, 0x5, 4, 412, 1244, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1254, 33, 1, 129 },
-  { 0x5, 0x5, 4, 413, 1253, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1263, 33, 1, 129 },
-  { 0x5, 0x5, 4, 414, 1262, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1272, 33, 1, 129 },
-  { 0x5, 0x5, 4, 415, 1271, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1282, 33, 1, 129 },
-  { 0x5, 0x5, 4, 881, 1280, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1292, 33, 1, 129 },
-  { 0x5, 0x5, 4, 882, 1290, 32, 1, 124 },
-  { 0x1, 0x1, 4, -1, 1302, 33, 1, 129 },
-  { 0x5, 0x5, 4, 883, 1300, 32, 1, 124 },
-  { 0x1, 0x21, 10, 1727, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 10, 1728, -1, 12, 1, 3 },
-  { 0x0, 0x0, 10, 1729, -1, 0, 1, 3 },
-  { 0x1, 0x1, 10, 1730, -1, 12, 1, 3 },
-  { 0x1, 0x1, 10, 1731, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 10, 1732, -1, 12, 1, 3 },
-  { 0x0, 0x0, 10, 346, -1, 0, 1, 3 },
-  { 0x1, 0x1, 10, 1758, -1, 12, 1, 3 },
-  { 0x1, 0x1, 10, 350, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 10, 1760, -1, 12, 1, 3 },
-  { 0x1, 0x21, 10, 1737, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 10, 1738, -1, 12, 1, 3 },
-  { 0x0, 0x0, 10, -1, 1767, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1768, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1769, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1770, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1771, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1772, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1773, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1774, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1775, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1776, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1777, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1778, 0, 0, -1 },
-  { 0x1, 0x21, 10, 1739, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 10, 1740, -1, 12, 1, 3 },
-  { 0x0, 0x0, 10, 1741, -1, 0, 1, 3 },
-  { 0x1, 0x1, 10, 1742, -1, 12, 1, 3 },
-  { 0x1, 0x1, 10, 1743, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 10, 1744, -1, 12, 1, 3 },
-  { 0x0, 0x0, 10, 370, -1, 0, 1, 3 },
-  { 0x1, 0x1, 10, 1782, -1, 12, 1, 3 },
-  { 0x1, 0x1, 10, 374, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 10, 1784, -1, 12, 1, 3 },
-  { 0x1, 0x21, 10, 1749, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 10, 1750, -1, 12, 1, 3 },
-  { 0x0, 0x0, 10, -1, 1791, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1792, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1793, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1794, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1795, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1796, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1797, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1798, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1799, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1800, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1801, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1802, 0, 0, -1 },
-  { 0x1, 0x1, 10, 1751, -1, 36, 1, 3 },
-  { 0x1000001, 0x1000001, 10, 1752, -1, 12, 1, 3 },
-  { 0x0, 0x0, 10, -1, 1803, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1805, 0, 0, -1 },
-  { 0x1, 0x1, 10, 1753, -1, 36, 1, 3 },
-  { 0x1000001, 0x1000001, 10, 1754, -1, 12, 1, 3 },
-  { 0x0, 0x0, 10, -1, 1807, 0, 0, -1 },
-  { 0x0, 0x0, 10, -1, 1809, 0, 0, -1 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x0, 0x0, 11, 1755, -1, 0, 1, 3 },
-  { 0x1, 0x1, 11, 1756, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x1, 0x1, 11, 1733, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x0, 0x0, 11, 288, -1, 0, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x200001, 0x200001, 11, 1735, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x1, 0x1, 11, 290, -1, 33, 1, 3 },
-  { 0x0, 0x0, 11, 1761, -1, 0, 1, 3 },
-  { 0x1, 0x1, 11, 1762, -1, 12, 1, 3 },
-  { 0x1, 0x1, 11, 1763, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 11, 1764, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x0, 0x0, 11, 1765, -1, 0, 1, 3 },
-  { 0x1, 0x1, 11, 1766, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x0, 0x0, 11, 1779, -1, 0, 1, 3 },
-  { 0x1, 0x1, 11, 1780, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x1, 0x1, 11, 1745, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x0, 0x0, 11, 312, -1, 0, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x200001, 0x200001, 11, 1747, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x1, 0x1, 11, 314, -1, 33, 1, 3 },
-  { 0x0, 0x0, 11, 1785, -1, 0, 1, 3 },
-  { 0x1, 0x1, 11, 1786, -1, 12, 1, 3 },
-  { 0x1, 0x1, 11, 1787, -1, 33, 1, 3 },
-  { 0x200001, 0x200001, 11, 1788, -1, 12, 1, 3 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x2, 0x3, 11, -1, -1, 37, 1, 5 },
-  { 0x0, 0x0, 11, 1789, -1, 0, 1, 3 },
-  { 0x1, 0x1, 11, 1790, -1, 12, 1, 3 },
-  { 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
-  { 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
-  { 0x1, 0x1, 11, 1804, -1, 36, 1, 3 },
-  { 0x1000001, 0x1000001, 11, 1806, -1, 12, 1, 3 },
-  { 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
-  { 0x1, 0x1, 11, -1, -1, 36, 1, 5 },
-  { 0x1, 0x1, 11, 1808, -1, 36, 1, 3 },
-  { 0x1000001, 0x1000001, 11, 1810, -1, 12, 1, 3 },
-  { 0x0, 0x0, 12, -1, -1, 0, 1, 14 },
-  { 0x0, 0x0, 12, -1, -1, 0, 1, 14 },
-  { 0x1, 0x1, 13, 258, 1198, 34, 1, 124 },
-  { 0x1, 0x1, 13, 260, 1207, 34, 1, 124 },
-  { 0x1, 0x1, 13, 262, 1216, 34, 1, 124 },
-  { 0x1, 0x1, 13, 264, 1225, 34, 1, 124 },
-  { 0x1, 0x1, 13, 266, 1234, 34, 1, 124 },
-  { 0x1, 0x1, 13, 268, 1243, 34, 1, 124 },
-  { 0x1, 0x1, 13, 270, 1252, 34, 1, 124 },
-  { 0x1, 0x1, 13, 272, 1261, 34, 1, 124 },
-  { 0x1, 0x1, 13, 274, 1270, 34, 1, 124 },
-  { 0x1, 0x1, 13, 276, 1279, 34, 1, 124 },
-  { 0x1, 0x1, 13, 278, 1289, 34, 1, 124 },
-  { 0x1, 0x1, 13, 280, 1299, 34, 1, 124 },
-  { 0x0, 0x0, 19, -1, 650, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 651, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 652, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 653, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 654, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 655, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 656, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 657, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 658, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 659, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 660, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 661, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 662, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 663, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 664, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 665, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 666, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 667, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 668, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 669, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 670, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 671, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 672, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 673, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 674, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 675, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 676, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 677, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 678, 0, 0, -1 },
-  { 0x0, 0x0, 19, -1, 679, 0, 0, -1 },
-  { 0x0, 0x0, 20, -1, 2340, 0, 0, -1 },
-  { 0x0, 0x0, 20, -1, 2341, 0, 0, -1 },
-  { 0x0, 0x0, 20, -1, 2356, 0, 0, -1 },
-  { 0x0, 0x0, 20, -1, 2357, 0, 0, -1 },
-  { 0x0, 0x0, 20, -1, 2362, 0, 0, -1 },
-  { 0x0, 0x0, 20, -1, 2363, 0, 0, -1 },
-  { 0x0, 0x0, 21, 686, 2352, 0, 0, -1 },
-  { 0x0, 0x0, 21, 687, 2354, 0, 0, -1 },
-  { 0x0, 0x0, 23, -1, 2350, 0, 0, -1 },
-  { 0x0, 0x0, 23, -1, 2351, 0, 0, -1 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, 1045, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 6 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 7 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 8 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 15 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, 1066, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 18 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 19 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 20 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, 1099, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 17 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 35, 1, 21 },
-  { 0x1, 0x1, 24, -1, -1, 33, 1, 76 },
-  { 0x1, 0x1, 24, -1, -1, 33, 1, 76 },
-  { 0x1, 0x1, 24, 1114, 1201, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1115, 1210, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1116, 1219, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1117, 1228, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1118, 1237, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1119, 1246, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1120, 1255, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1121, 1264, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1122, 1273, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1123, 1283, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1124, 1293, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1125, 1303, 35, 1, 129 },
-  { 0x1, 0x1, 24, 1126, 1312, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1127, 1318, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1128, 1324, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1129, 1330, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1130, 1336, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1131, 1342, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1132, 1348, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1133, 1354, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1134, 1360, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1135, 1366, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1136, 1372, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1137, 1378, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1138, 1384, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1139, 1390, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1140, 1396, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1141, 1402, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1142, 1408, 35, 1, 141 },
-  { 0x1, 0x1, 24, 1143, 1414, 35, 1, 141 },
-  { 0x0, 0x0, 32, 2334, 2332, 0, 0, -1 },
-  { 0x0, 0x0, 32, 2337, 2335, 0, 0, -1 },
-  { 0x0, 0x0, 32, 2343, 2342, 0, 0, -1 },
-  { 0x0, 0x0, 32, 2345, 2344, 0, 0, -1 },
-  { 0x0, 0x0, 32, 2359, 2358, 0, 0, -1 },
-  { 0x0, 0x0, 32, 2361, 2360, 0, 0, -1 },
-  { 0x0, 0x0, 34, -1, 2353, 0, 0, -1 },
-  { 0x0, 0x0, 34, -1, 2355, 0, 0, -1 },
-  { 0x1, 0x1, 37, -1, 1899, 37, 1, 29 },
-  { 0x1, 0x1, 37, -1, 1934, 37, 1, 29 },
-  { 0x0, 0x0, 37, -1, 1937, 0, 0, -1 },
-  { 0x1, 0x1, 37, -1, -1, 37, 1, 29 },
-  { 0x1, 0x1, 37, -1, 1942, 37, 1, 29 },
-  { 0x0, 0x0, 37, -1, 1945, 0, 0, -1 },
-  { 0x1, 0x1, 37, -1, -1, 37, 1, 29 },
-  { 0x0, 0x0, 37, -1, 1948, 0, 0, -1 },
-  { 0x1, 0x1, 37, -1, -1, 37, 1, 29 },
-  { 0x1, 0x1, 37, -1, 1951, 37, 1, 29 },
-  { 0x1, 0x1, 37, -1, 1954, 37, 1, 29 },
-  { 0x1, 0x1, 37, -1, 1987, 37, 1, 29 },
-  { 0x3, 0x3, 37, -1, -1, 30, 1, 134 },
-  { 0x0, 0x0, 37, 951, -1, 0, 1, 95 },
-  { 0x0, 0x0, 37, -1, -1, 0, 1, 104 },
-  { 0x0, 0x0, 37, 957, -1, 0, 1, 116 },
-  { 0x3, 0x3, 37, -1, -1, 30, 1, 146 },
-  { 0x0, 0x0, 37, 958, -1, 0, 1, 40 },
-  { 0x0, 0x0, 39, -1, 818, 0, 0, -1 },
-  { 0x0, 0x0, 39, -1, 826, 0, 0, -1 },
-  { 0x0, 0x0, 39, 960, 822, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 477, 33, 1, 6 },
-  { 0x18000001, 0x18000001, 39, -1, 485, 6, 1, 7 },
-  { 0x3, 0x3, 39, 961, 481, 33, 1, 6 },
-  { 0x0, 0x0, 39, -1, 830, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 497, 33, 1, 8 },
-  { 0x0, 0x0, 39, -1, 834, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 509, 33, 1, 15 },
-  { 0x0, 0x0, 39, -1, 839, 0, 0, -1 },
-  { 0x0, 0x0, 39, -1, 843, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 532, 33, 1, 17 },
-  { 0x3, 0x3, 39, -1, 536, 33, 1, 17 },
-  { 0x0, 0x0, 39, -1, 847, 0, 0, -1 },
-  { 0x0, 0x0, 39, -1, 851, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 556, 33, 1, 18 },
-  { 0x18000001, 0x18000001, 39, -1, 560, 6, 1, 18 },
-  { 0x0, 0x0, 39, -1, 855, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 572, 33, 1, 19 },
-  { 0x0, 0x0, 39, -1, 859, 0, 0, -1 },
-  { 0x0, 0x0, 39, -1, 863, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 592, 33, 1, 20 },
-  { 0x18000001, 0x18000001, 39, -1, 596, 6, 1, 20 },
-  { 0x0, 0x0, 39, -1, 867, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 608, 33, 1, 21 },
-  { 0x0, 0x0, 39, -1, 872, 0, 0, -1 },
-  { 0x0, 0x0, 39, -1, 876, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 631, 33, 1, 17 },
-  { 0x3, 0x3, 39, -1, 635, 33, 1, 17 },
-  { 0x0, 0x0, 39, -1, 880, 0, 0, -1 },
-  { 0x3, 0x3, 39, -1, 647, 33, 1, 21 },
-  { 0x0, 0x0, 40, 706, 817, 0, 0, -1 },
-  { 0x0, 0x0, 40, 707, 825, 0, 0, -1 },
-  { 0x0, 0x0, 40, 708, 821, 0, 0, -1 },
-  { 0x1, 0x1, 40, 709, 476, 34, 1, 6 },
-  { 0x10000001, 0x10000001, 40, 710, 484, 6, 1, 7 },
-  { 0x1, 0x1, 40, 711, 480, 34, 1, 6 },
-  { 0x0, 0x0, 40, 712, 829, 0, 0, -1 },
-  { 0x1, 0x1, 40, 713, 496, 34, 1, 8 },
-  { 0x0, 0x0, 40, 714, 833, 0, 0, -1 },
-  { 0x1, 0x1, 40, 715, 508, 34, 1, 15 },
-  { 0x0, 0x0, 40, 716, 838, 0, 0, -1 },
-  { 0x0, 0x0, 40, 717, 842, 0, 0, -1 },
-  { 0x1, 0x1, 40, 718, 531, 34, 1, 17 },
-  { 0x1, 0x1, 40, 719, 535, 34, 1, 17 },
-  { 0x0, 0x0, 40, 720, 846, 0, 0, -1 },
-  { 0x0, 0x0, 40, 721, 850, 0, 0, -1 },
-  { 0x1, 0x1, 40, 722, 555, 34, 1, 18 },
-  { 0x10000001, 0x10000001, 40, 723, 559, 6, 1, 18 },
-  { 0x0, 0x0, 40, 724, 854, 0, 0, -1 },
-  { 0x1, 0x1, 40, 725, 571, 34, 1, 19 },
-  { 0x0, 0x0, 40, 726, 858, 0, 0, -1 },
-  { 0x0, 0x0, 40, 727, 862, 0, 0, -1 },
-  { 0x1, 0x1, 40, 728, 591, 34, 1, 20 },
-  { 0x10000001, 0x10000001, 40, 729, 595, 6, 1, 20 },
-  { 0x0, 0x0, 40, 730, 866, 0, 0, -1 },
-  { 0x1, 0x1, 40, 731, 607, 34, 1, 21 },
-  { 0x0, 0x0, 40, 732, 871, 0, 0, -1 },
-  { 0x0, 0x0, 40, 733, 875, 0, 0, -1 },
-  { 0x1, 0x1, 40, 734, 630, 34, 1, 17 },
-  { 0x1, 0x1, 40, 735, 634, 34, 1, 17 },
-  { 0x0, 0x0, 40, 736, 879, 0, 0, -1 },
-  { 0x1, 0x1, 40, 737, 646, 34, 1, 21 },
-  { 0x800001, 0x800001, 40, -1, 965, 4, 1, 16 },
-  { 0x1, 0x1, 40, 1845, 963, 4, 1, 16 },
-  { 0x1, 0x1, 40, 803, 968, 4, 1, 22 },
-  { 0x2, 0x3, 40, -1, 973, 20, 1, 67 },
-  { 0x1, 0x1, 40, 1846, 971, 21, 1, 67 },
-  { 0x0, 0x0, 41, -1, -1, 0, 1, 80 },
-  { 0x0, 0x0, 41, -1, -1, 0, 1, 80 },
-  { 0x0, 0x0, 41, -1, -1, 0, 1, 123 },
-  { 0x1, 0x1, 43, 1144, 281, 38, 1, 1 },
-  { 0x0, 0x0, 43, -1, 340, 0, 0, -1 },
-  { 0x1, 0x1, 43, 1147, 291, 38, 1, 1 },
-  { 0x0, 0x0, 43, -1, 360, 0, 0, -1 },
-  { 0x0, 0x0, 43, -1, 294, 0, 0, -1 },
-  { 0x0, 0x0, 43, -1, 304, 0, 0, -1 },
-  { 0x1, 0x1, 43, 1152, 305, 38, 1, 1 },
-  { 0x0, 0x0, 43, -1, 364, 0, 0, -1 },
-  { 0x1, 0x1, 43, 1155, 315, 38, 1, 1 },
-  { 0x0, 0x0, 43, -1, 384, 0, 0, -1 },
-  { 0x0, 0x0, 43, -1, 318, 0, 0, -1 },
-  { 0x0, 0x0, 43, -1, 328, 0, 0, -1 },
-  { 0x0, 0x0, 43, 1028, 1906, 0, 0, -1 },
-  { 0x0, 0x0, 43, 1029, 2439, 0, 1, 54 },
-  { 0x0, 0x0, 43, 1030, 1958, 0, 0, -1 },
-  { 0x0, 0x0, 43, 1031, -1, 0, 1, 49 },
-  { 0x0, 0x0, 43, 935, -1, 0, 1, 0 },
-  { 0x0, 0x0, 43, 936, -1, 0, 1, 0 },
-  { 0x0, 0x0, 43, 937, -1, 0, 1, 0 },
-  { 0x1, 0x1, 44, -1, 1418, 30, 1, 143 },
-  { 0x1, 0x1, 44, 808, 1417, 30, 1, 142 },
-  { 0x1, 0x1, 44, -1, 1422, 30, 1, 145 },
-  { 0x1, 0x1, 44, 809, 1421, 30, 1, 144 },
-  { 0x1, 0x1, 44, -1, 1426, 30, 1, 145 },
-  { 0x1, 0x1, 44, 810, 1425, 30, 1, 144 },
-  { 0x3, 0x3, 45, -1, 969, 3, 1, 22 },
-  { 0x1, 0x1, 46, 1866, -1, 30, 1, 134 },
-  { 0x1, 0x1, 46, 1897, -1, 30, 1, 146 },
-  { 0x0, 0x0, 48, -1, -1, 0, 1, 40 },
-  { 0x0, 0x0, 48, -1, -1, 0, 1, 40 },
-  { 0x1, 0x1, 55, -1, 1419, 31, 1, 143 },
-  { 0x1, 0x1, 55, -1, 1423, 31, 1, 145 },
-  { 0x1, 0x1, 55, -1, 1427, 31, 1, 145 },
-  { 0x0, 0x0, 55, -1, -1, 0, 1, 94 },
-  { 0x2, 0x3, 55, -1, -1, 27, 1, 94 },
-  { 0x1, 0x1, 55, -1, -1, 28, 1, 94 },
-  { 0x0, 0x0, 64, 13, 447, 0, 1, 6 },
-  { 0x0, 0x0, 64, 1046, 450, 0, 1, 6 },
-  { 0x1, 0x1, 64, 1047, 452, 33, 1, 6 },
-  { 0x1, 0x1, 64, 1048, 454, 34, 1, 6 },
-  { 0x3, 0x3, 64, 1049, 456, 33, 1, 6 },
-  { 0x0, 0x0, 64, 1050, 458, 0, 1, 6 },
-  { 0x1, 0x1, 64, 1051, 460, 33, 1, 6 },
-  { 0x1, 0x1, 64, 1052, 462, 34, 1, 6 },
-  { 0x3, 0x3, 64, 1053, 464, 33, 1, 6 },
-  { 0x1, 0x1, 64, 1054, 466, 6, 1, 7 },
-  { 0x8000001, 0x8000001, 64, 1055, 468, 6, 1, 7 },
-  { 0x10000001, 0x10000001, 64, 1056, 470, 6, 1, 7 },
-  { 0x18000001, 0x18000001, 64, 1057, 472, 6, 1, 7 },
-  { 0x0, 0x0, 64, 1058, 486, 0, 1, 8 },
-  { 0x1, 0x1, 64, 1059, 488, 33, 1, 8 },
-  { 0x1, 0x1, 64, 1060, 490, 34, 1, 8 },
-  { 0x3, 0x3, 64, 1061, 492, 33, 1, 8 },
-  { 0x0, 0x0, 64, 1062, 498, 0, 1, 15 },
-  { 0x1, 0x1, 64, 1063, 500, 33, 1, 15 },
-  { 0x1, 0x1, 64, 1064, 502, 34, 1, 15 },
-  { 0x3, 0x3, 64, 1065, 504, 33, 1, 15 },
-  { 0x0, 0x0, 64, 14, 510, 0, 1, 17 },
-  { 0x0, 0x0, 64, 1067, 513, 0, 1, 17 },
-  { 0x1, 0x1, 64, 1068, 515, 33, 1, 17 },
-  { 0x1, 0x1, 64, 1069, 517, 34, 1, 17 },
-  { 0x3, 0x3, 64, 1070, 519, 33, 1, 17 },
-  { 0x0, 0x0, 64, 1071, 521, 0, 1, 17 },
-  { 0x1, 0x1, 64, 1072, 523, 33, 1, 17 },
-  { 0x1, 0x1, 64, 1073, 525, 34, 1, 17 },
-  { 0x3, 0x3, 64, 1074, 527, 33, 1, 17 },
-  { 0x0, 0x0, 64, 1075, 537, 0, 1, 18 },
-  { 0x1, 0x1, 64, 1076, 539, 33, 1, 18 },
-  { 0x1, 0x1, 64, 1077, 541, 34, 1, 18 },
-  { 0x3, 0x3, 64, 1078, 543, 33, 1, 18 },
-  { 0x1, 0x1, 64, 1079, 545, 6, 1, 18 },
-  { 0x8000001, 0x8000001, 64, 1080, 547, 6, 1, 18 },
-  { 0x10000001, 0x10000001, 64, 1081, 549, 6, 1, 18 },
-  { 0x18000001, 0x18000001, 64, 1082, 551, 6, 1, 18 },
-  { 0x0, 0x0, 64, 1083, 561, 0, 1, 19 },
-  { 0x1, 0x1, 64, 1084, 563, 33, 1, 19 },
-  { 0x1, 0x1, 64, 1085, 565, 34, 1, 19 },
-  { 0x3, 0x3, 64, 1086, 567, 33, 1, 19 },
-  { 0x0, 0x0, 64, 1087, 573, 0, 1, 20 },
-  { 0x1, 0x1, 64, 1088, 575, 33, 1, 20 },
-  { 0x1, 0x1, 64, 1089, 577, 34, 1, 20 },
-  { 0x3, 0x3, 64, 1090, 579, 33, 1, 20 },
-  { 0x1, 0x1, 64, 1091, 581, 6, 1, 20 },
-  { 0x8000001, 0x8000001, 64, 1092, 583, 6, 1, 20 },
-  { 0x10000001, 0x10000001, 64, 1093, 585, 6, 1, 20 },
-  { 0x18000001, 0x18000001, 64, 1094, 587, 6, 1, 20 },
-  { 0x0, 0x0, 64, 1095, 597, 0, 1, 21 },
-  { 0x1, 0x1, 64, 1096, 599, 33, 1, 21 },
-  { 0x1, 0x1, 64, 1097, 601, 34, 1, 21 },
-  { 0x3, 0x3, 64, 1098, 603, 33, 1, 21 },
-  { 0x0, 0x0, 64, 16, 609, 0, 1, 17 },
-  { 0x0, 0x0, 64, 1100, 612, 0, 1, 17 },
-  { 0x1, 0x1, 64, 1101, 614, 33, 1, 17 },
-  { 0x1, 0x1, 64, 1102, 616, 34, 1, 17 },
-  { 0x3, 0x3, 64, 1103, 618, 33, 1, 17 },
-  { 0x0, 0x0, 64, 1104, 620, 0, 1, 17 },
-  { 0x1, 0x1, 64, 1105, 622, 33, 1, 17 },
-  { 0x1, 0x1, 64, 1106, 624, 34, 1, 17 },
-  { 0x3, 0x3, 64, 1107, 626, 33, 1, 17 },
-  { 0x0, 0x0, 64, 1108, 636, 0, 1, 21 },
-  { 0x1, 0x1, 64, 1109, 638, 33, 1, 21 },
-  { 0x1, 0x1, 64, 1110, 640, 34, 1, 21 },
-  { 0x3, 0x3, 64, 1111, 642, 33, 1, 21 },
-  { 0x3, 0x3, 65, 416, 1281, 33, 1, 128 },
-  { 0x3, 0x3, 65, 417, 1291, 33, 1, 128 },
-  { 0x3, 0x3, 65, 418, 1301, 33, 1, 128 },
-  { 0x0, 0x0, 65, -1, 1306, 0, 1, 137 },
-  { 0x0, 0x0, 65, -1, 1307, 0, 1, 137 },
-  { 0x0, 0x0, 65, -1, 1308, 0, 1, 137 },
-  { 0x0, 0x0, 106, 891, 1930, 0, 0, -1 },
-  { 0x0, 0x0, 106, 892, 2377, 0, 1, 29 },
-  { 0x0, 0x0, 106, 893, 1971, 0, 0, -1 },
-  { 0x0, 0x0, 106, 894, 2381, 0, 1, 29 },
-  { 0x0, 0x0, 108, -1, 1932, 0, 0, -1 },
-  { 0x1, 0x1, 108, -1, 2378, 27, 1, 29 },
-  { 0x0, 0x0, 108, -1, 1973, 0, 0, -1 },
-  { 0x1, 0x1, 108, -1, 2382, 27, 1, 29 },
-  { 0x0, 0x0, 109, 896, -1, 0, 1, 115 },
-  { 0x1, 0x1, 110, -1, -1, 27, 1, 115 },
-  { 0x0, 0x0, 111, 914, 2400, 0, 1, 1 },
-  { 0x0, 0x0, 111, 1015, 285, 0, 0, -1 },
-  { 0x0, 0x0, 111, 992, 348, 0, 0, -1 },
-  { 0x0, 0x0, 111, -1, 356, 0, 0, -1 },
-  { 0x0, 0x0, 111, 915, 2408, 0, 1, 1 },
-  { 0x0, 0x0, 111, -1, 298, 0, 0, -1 },
-  { 0x0, 0x0, 111, 1020, 299, 0, 0, -1 },
-  { 0x0, 0x0, 111, 916, 2420, 0, 1, 1 },
-  { 0x0, 0x0, 111, 1022, 309, 0, 0, -1 },
-  { 0x0, 0x0, 111, 999, 372, 0, 0, -1 },
-  { 0x0, 0x0, 111, -1, 380, 0, 0, -1 },
-  { 0x0, 0x0, 111, 1156, 2427, 0, 1, 1 },
-  { 0x0, 0x0, 111, -1, 322, 0, 0, -1 },
-  { 0x0, 0x0, 111, 1027, 323, 0, 0, -1 },
-  { 0x0, 0x0, 111, -1, 1916, 0, 0, -1 },
-  { 0x1, 0x9, 111, -1, 2446, 33, 1, 54 },
-  { 0x2, 0x3, 111, 1169, 1967, 27, 1, 49 },
-  { 0x1, 0x1, 113, 1145, 2401, 37, 1, 1 },
-  { 0x1, 0x1, 113, 1148, 2409, 37, 1, 1 },
-  { 0x1, 0x1, 113, 1153, 2421, 37, 1, 1 },
-  { 0x0, 0x0, 113, -1, 2432, 0, 1, 1 },
-  { 0x0, 0x0, 114, 938, 2398, 0, 1, 1 },
-  { 0x0, 0x0, 114, 991, 283, 0, 0, -1 },
-  { 0x0, 0x0, 114, -1, 352, 0, 0, -1 },
-  { 0x0, 0x0, 114, 1017, 354, 0, 0, -1 },
-  { 0x0, 0x0, 114, -1, 2407, 0, 1, 1 },
-  { 0x0, 0x0, 114, 1019, 296, 0, 0, -1 },
-  { 0x0, 0x0, 114, 996, 301, 0, 0, -1 },
-  { 0x0, 0x0, 114, 940, 2418, 0, 1, 1 },
-  { 0x0, 0x0, 114, 998, 307, 0, 0, -1 },
-  { 0x0, 0x0, 114, -1, 376, 0, 0, -1 },
-  { 0x0, 0x0, 114, 1024, 378, 0, 0, -1 },
-  { 0x0, 0x0, 114, -1, 2426, 0, 1, 1 },
-  { 0x0, 0x0, 114, 1026, 320, 0, 0, -1 },
-  { 0x0, 0x0, 114, 1003, 325, 0, 0, -1 },
-  { 0x0, 0x0, 114, 911, 1914, 0, 0, -1 },
-  { 0x0, 0x0, 114, 912, 2445, 0, 1, 54 },
-  { 0x0, 0x0, 114, 913, 1966, 0, 1, 49 },
-  { 0x1, 0x1, 114, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 114, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 114, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 115, -1, 2399, 37, 1, 1 },
-  { 0x0, 0x0, 115, -1, 2412, 0, 1, 1 },
-  { 0x1, 0x1, 115, -1, 2419, 37, 1, 1 },
-  { 0x0, 0x0, 115, -1, 2431, 0, 1, 1 },
-  { 0x0, 0x0, 116, 985, -1, 0, 1, 0 },
-  { 0x0, 0x0, 116, 986, -1, 0, 1, 0 },
-  { 0x0, 0x0, 116, 987, -1, 0, 1, 0 },
-  { 0x3, 0x3, 116, 947, -1, 34, 1, 33 },
-  { 0x3, 0x3, 116, 948, -1, 34, 1, 40 },
-  { 0x1, 0x1, 117, -1, -1, 35, 1, 33 },
-  { 0x1, 0x1, 117, -1, -1, 35, 1, 40 },
-  { 0x0, 0x0, 118, -1, -1, 0, 1, 40 },
-  { 0x0, 0x0, 118, -1, -1, 0, 1, 66 },
-  { 0x1, 0x1, 118, -1, -1, 27, 1, 96 },
-  { 0x0, 0x0, 118, -1, -1, 0, 1, 105 },
-  { 0x0, 0x0, 118, -1, -1, 0, 1, 73 },
-  { 0x0, 0x0, 118, -1, -1, 0, 1, 73 },
-  { 0x0, 0x0, 118, -1, -1, 0, 1, 74 },
-  { 0x0, 0x0, 118, -1, -1, 0, 1, 40 },
-  { 0x1, 0x1, 118, -1, -1, 27, 1, 117 },
-  { 0x1, 0x1, 118, -1, -1, 27, 1, 40 },
-  { 0x0, 0x0, 118, -1, -1, 0, 1, 40 },
-  { 0x0, 0x0, 119, -1, 2333, 0, 0, -1 },
-  { 0x0, 0x0, 119, -1, 2336, 0, 0, -1 },
-  { 0x1, 0x1, 120, -1, -1, 35, 1, 16 },
-  { 0x1, 0x1, 120, -1, -1, 35, 1, 16 },
-  { 0x1, 0x1, 120, -1, -1, 35, 1, 16 },
-  { 0x1, 0x1, 120, -1, -1, 35, 1, 16 },
-  { 0x1, 0x1, 120, -1, -1, 35, 1, 22 },
-  { 0x1, 0x1, 120, -1, -1, 35, 1, 22 },
-  { 0x1, 0x1, 120, -1, -1, 35, 1, 22 },
-  { 0x1, 0x1, 120, -1, -1, 35, 1, 22 },
-  { 0x1, 0x1, 120, -1, -1, 23, 1, 67 },
-  { 0x1, 0x1, 120, -1, -1, 23, 1, 67 },
-  { 0x1, 0x1, 120, -1, -1, 23, 1, 67 },
-  { 0x1, 0x1, 120, -1, -1, 23, 1, 67 },
-  { 0x1, 0x1, 120, 773, -1, 23, 1, 67 },
-  { 0x9, 0x9, 120, 774, -1, 20, 1, 67 },
-  { 0x0, 0x0, 124, 1816, -1, 0, 1, 0 },
-  { 0x0, 0x0, 124, 1817, -1, 0, 1, 0 },
-  { 0x1, 0x1, 124, -1, -1, 28, 1, 33 },
-  { 0x1, 0x1, 124, -1, -1, 27, 1, 33 },
-  { 0x1, 0x1, 124, -1, -1, 29, 1, 0 },
-  { 0x1, 0x1, 124, -1, -1, 29, 1, 0 },
-  { 0x1, 0x1, 124, -1, -1, 29, 1, 0 },
-  { 0x1, 0x1, 124, -1, -1, 29, 1, 0 },
-  { 0x0, 0x0, 124, -1, -1, 0, 1, 114 },
-  { 0x1, 0x1, 124, -1, -1, 29, 1, 0 },
-  { 0x1, 0x1, 124, -1, -1, 29, 1, 0 },
-  { 0x1, 0x1, 124, -1, -1, 29, 1, 0 },
-  { 0x0, 0x0, 124, 945, -1, 0, 1, 33 },
-  { 0x0, 0x0, 124, 1037, -1, 0, 1, 40 },
-  { 0x0, 0x0, 137, 1008, 2396, 0, 1, 1 },
-  { 0x0, 0x0, 137, 898, 284, 0, 0, -1 },
-  { 0x0, 0x0, 137, 920, 289, 0, 0, -1 },
-  { 0x0, 0x0, 137, 921, 353, 0, 0, -1 },
-  { 0x0, 0x0, 137, -1, 2406, 0, 1, 1 },
-  { 0x0, 0x0, 137, 923, 295, 0, 0, -1 },
-  { 0x0, 0x0, 137, -1, 302, 0, 0, -1 },
-  { 0x0, 0x0, 137, 1010, 2416, 0, 1, 1 },
-  { 0x0, 0x0, 137, 905, 308, 0, 0, -1 },
-  { 0x0, 0x0, 137, 927, 313, 0, 0, -1 },
-  { 0x0, 0x0, 137, 928, 377, 0, 0, -1 },
-  { 0x0, 0x0, 137, -1, 2425, 0, 1, 1 },
-  { 0x0, 0x0, 137, 930, 319, 0, 0, -1 },
-  { 0x0, 0x0, 137, -1, 326, 0, 0, -1 },
-  { 0x0, 0x0, 137, 2463, 1910, 0, 0, -1 },
-  { 0x1, 0x1, 137, 2464, 2441, 33, 1, 54 },
-  { 0x0, 0x0, 137, 2465, 1960, 0, 0, -1 },
-  { 0x1, 0x1, 137, 2466, -1, 28, 1, 49 },
-  { 0x1, 0x1, 138, -1, 2397, 37, 1, 1 },
-  { 0x0, 0x0, 138, -1, 2411, 0, 1, 1 },
-  { 0x1, 0x1, 138, -1, 2417, 37, 1, 1 },
-  { 0x0, 0x0, 138, -1, 2430, 0, 1, 1 },
-  { 0x1, 0x1, 141, 772, 967, 3, 1, 22 },
-  { 0x0, 0x0, 142, 1818, -1, 0, 1, 33 },
-  { 0x0, 0x0, 143, 778, 2393, 0, 1, 1 },
-  { 0x0, 0x0, 143, -1, 286, 0, 0, -1 },
-  { 0x0, 0x0, 143, 899, 287, 0, 0, -1 },
-  { 0x0, 0x0, 143, 900, 355, 0, 0, -1 },
-  { 0x0, 0x0, 143, 780, 2403, 0, 1, 1 },
-  { 0x0, 0x0, 143, 902, 297, 0, 0, -1 },
-  { 0x0, 0x0, 143, 924, 300, 0, 0, -1 },
-  { 0x0, 0x0, 143, 784, 2413, 0, 1, 1 },
-  { 0x0, 0x0, 143, -1, 310, 0, 0, -1 },
-  { 0x0, 0x0, 143, 906, 311, 0, 0, -1 },
-  { 0x0, 0x0, 143, 907, 379, 0, 0, -1 },
-  { 0x0, 0x0, 143, 786, 2423, 0, 1, 1 },
-  { 0x0, 0x0, 143, 909, 321, 0, 0, -1 },
-  { 0x0, 0x0, 143, 931, 324, 0, 0, -1 },
-  { 0x0, 0x0, 143, 1004, 1908, 0, 0, -1 },
-  { 0x1, 0x1, 143, 1005, 2440, 36, 1, 54 },
-  { 0x0, 0x0, 143, 1006, 1959, 0, 0, -1 },
-  { 0x1, 0x1, 143, 1007, -1, 27, 1, 49 },
-  { 0x1, 0x1, 144, -1, 2395, 37, 1, 1 },
-  { 0x1, 0x1, 144, -1, 2405, 37, 1, 1 },
-  { 0x1, 0x1, 144, -1, 2415, 37, 1, 1 },
-  { 0x0, 0x0, 144, -1, 2429, 0, 1, 1 },
-  { 0x0, 0x0, 145, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 145, 946, -1, 0, 1, 40 },
-  { 0x0, 0x0, 146, -1, -1, 0, 1, 40 },
-  { 0x0, 0x0, 146, -1, -1, 0, 1, 66 },
-  { 0x0, 0x0, 146, -1, 2433, 0, 1, 63 },
-  { 0x0, 0x0, 146, -1, -1, 0, 1, 81 },
-  { 0x0, 0x0, 146, -1, -1, 0, 1, 81 },
-  { 0x0, 0x0, 146, -1, -1, 0, 1, 85 },
-  { 0x0, 0x0, 146, -1, -1, 0, 1, 40 },
-  { 0x1, 0x1, 147, -1, 448, 12, 1, 6 },
-  { 0x1, 0x1, 147, -1, 451, 12, 1, 6 },
-  { 0x200001, 0x200001, 147, -1, 453, 12, 1, 6 },
-  { 0x400001, 0x400001, 147, -1, 455, 12, 1, 6 },
-  { 0x600001, 0x600001, 147, -1, 457, 12, 1, 6 },
-  { 0x1, 0x1, 147, -1, 459, 12, 1, 6 },
-  { 0x200001, 0x200001, 147, -1, 461, 12, 1, 6 },
-  { 0x400001, 0x400001, 147, -1, 463, 12, 1, 6 },
-  { 0x600001, 0x600001, 147, -1, 465, 12, 1, 6 },
-  { 0x41, 0x41, 147, -1, 467, 6, 1, 7 },
-  { 0x8000041, 0x8000041, 147, -1, 469, 6, 1, 7 },
-  { 0x10000041, 0x10000041, 147, -1, 471, 6, 1, 7 },
-  { 0x18000041, 0x18000041, 147, -1, 473, 6, 1, 7 },
-  { 0x1, 0x1, 147, -1, 487, 12, 1, 8 },
-  { 0x200001, 0x200001, 147, -1, 489, 12, 1, 8 },
-  { 0x400001, 0x400001, 147, -1, 491, 12, 1, 8 },
-  { 0x600001, 0x600001, 147, -1, 493, 12, 1, 8 },
-  { 0x1, 0x1, 147, -1, 499, 12, 1, 15 },
-  { 0x200001, 0x200001, 147, -1, 501, 12, 1, 15 },
-  { 0x400001, 0x400001, 147, -1, 503, 12, 1, 15 },
-  { 0x600001, 0x600001, 147, -1, 505, 12, 1, 15 },
-  { 0x1, 0x1, 147, -1, 511, 12, 1, 17 },
-  { 0x1, 0x1, 147, -1, 514, 12, 1, 17 },
-  { 0x200001, 0x200001, 147, -1, 516, 12, 1, 17 },
-  { 0x400001, 0x400001, 147, -1, 518, 12, 1, 17 },
-  { 0x600001, 0x600001, 147, -1, 520, 12, 1, 17 },
-  { 0x1, 0x1, 147, -1, 522, 12, 1, 17 },
-  { 0x200001, 0x200001, 147, -1, 524, 12, 1, 17 },
-  { 0x400001, 0x400001, 147, -1, 526, 12, 1, 17 },
-  { 0x600001, 0x600001, 147, -1, 528, 12, 1, 17 },
-  { 0x1, 0x1, 147, -1, 538, 12, 1, 18 },
-  { 0x200001, 0x200001, 147, -1, 540, 12, 1, 18 },
-  { 0x400001, 0x400001, 147, -1, 542, 12, 1, 18 },
-  { 0x600001, 0x600001, 147, -1, 544, 12, 1, 18 },
-  { 0x41, 0x41, 147, -1, 546, 6, 1, 18 },
-  { 0x8000041, 0x8000041, 147, -1, 548, 6, 1, 18 },
-  { 0x10000041, 0x10000041, 147, -1, 550, 6, 1, 18 },
-  { 0x18000041, 0x18000041, 147, -1, 552, 6, 1, 18 },
-  { 0x1, 0x1, 147, -1, 562, 12, 1, 19 },
-  { 0x200001, 0x200001, 147, -1, 564, 12, 1, 19 },
-  { 0x400001, 0x400001, 147, -1, 566, 12, 1, 19 },
-  { 0x600001, 0x600001, 147, -1, 568, 12, 1, 19 },
-  { 0x1, 0x1, 147, -1, 574, 12, 1, 20 },
-  { 0x200001, 0x200001, 147, -1, 576, 12, 1, 20 },
-  { 0x400001, 0x400001, 147, -1, 578, 12, 1, 20 },
-  { 0x600001, 0x600001, 147, -1, 580, 12, 1, 20 },
-  { 0x41, 0x41, 147, -1, 582, 6, 1, 20 },
-  { 0x8000041, 0x8000041, 147, -1, 584, 6, 1, 20 },
-  { 0x10000041, 0x10000041, 147, -1, 586, 6, 1, 20 },
-  { 0x18000041, 0x18000041, 147, -1, 588, 6, 1, 20 },
-  { 0x1, 0x1, 147, -1, 598, 12, 1, 21 },
-  { 0x200001, 0x200001, 147, -1, 600, 12, 1, 21 },
-  { 0x400001, 0x400001, 147, -1, 602, 12, 1, 21 },
-  { 0x600001, 0x600001, 147, -1, 604, 12, 1, 21 },
-  { 0x1, 0x1, 147, -1, 610, 12, 1, 17 },
-  { 0x1, 0x1, 147, -1, 613, 12, 1, 17 },
-  { 0x200001, 0x200001, 147, -1, 615, 12, 1, 17 },
-  { 0x400001, 0x400001, 147, -1, 617, 12, 1, 17 },
-  { 0x600001, 0x600001, 147, -1, 619, 12, 1, 17 },
-  { 0x1, 0x1, 147, -1, 621, 12, 1, 17 },
-  { 0x200001, 0x200001, 147, -1, 623, 12, 1, 17 },
-  { 0x400001, 0x400001, 147, -1, 625, 12, 1, 17 },
-  { 0x600001, 0x600001, 147, -1, 627, 12, 1, 17 },
-  { 0x1, 0x1, 147, -1, 637, 12, 1, 21 },
-  { 0x200001, 0x200001, 147, -1, 639, 12, 1, 21 },
-  { 0x400001, 0x400001, 147, -1, 641, 12, 1, 21 },
-  { 0x600001, 0x600001, 147, -1, 643, 12, 1, 21 },
-  { 0x0, 0x0, 156, 648, -1, 0, 1, 75 },
-  { 0x0, 0x0, 156, 649, -1, 0, 1, 75 },
-  { 0x9, 0x9, 156, -1, 1202, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1211, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1220, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1229, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1238, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1247, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1256, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1265, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1274, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1284, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1294, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1304, 32, 1, 129 },
-  { 0x9, 0x9, 156, -1, 1313, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1319, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1325, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1331, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1337, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1343, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1349, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1355, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1361, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1367, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1373, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1379, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1385, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1391, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1397, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1403, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1409, 32, 1, 141 },
-  { 0x9, 0x9, 156, -1, 1415, 32, 1, 141 },
-  { 0x0, 0x0, 157, 1032, 282, 0, 0, -1 },
-  { 0x1, 0x1, 157, -1, 2402, 38, 1, 1 },
-  { 0x0, 0x0, 157, 779, 339, 0, 0, -1 },
-  { 0x0, 0x0, 157, 1033, 292, 0, 0, -1 },
-  { 0x1, 0x1, 157, -1, 2410, 38, 1, 1 },
-  { 0x0, 0x0, 157, 781, 359, 0, 0, -1 },
-  { 0x0, 0x0, 157, 782, 293, 0, 0, -1 },
-  { 0x0, 0x0, 157, 783, 303, 0, 0, -1 },
-  { 0x0, 0x0, 157, 1034, 306, 0, 0, -1 },
-  { 0x1, 0x1, 157, -1, 2422, 38, 1, 1 },
-  { 0x0, 0x0, 157, 785, 363, 0, 0, -1 },
-  { 0x0, 0x0, 157, -1, 316, 0, 0, -1 },
-  { 0x1, 0x1, 157, -1, 2428, 38, 1, 1 },
-  { 0x0, 0x0, 157, 787, 383, 0, 0, -1 },
-  { 0x0, 0x0, 157, 788, 317, 0, 0, -1 },
-  { 0x0, 0x0, 157, 789, 327, 0, 0, -1 },
-  { 0x0, 0x0, 158, 1175, 1918, 0, 0, -1 },
-  { 0x0, 0x0, 158, 1176, 2451, 0, 1, 54 },
-  { 0x0, 0x0, 158, 1177, 1962, 0, 0, -1 },
-  { 0x1, 0x1, 158, 1178, -1, 29, 1, 49 },
-  { 0x0, 0x0, 159, -1, 1928, 0, 0, -1 },
-  { 0x1, 0x9, 159, -1, 2458, 33, 1, 54 },
-  { 0x6, 0x7, 159, -1, 1969, 27, 1, 49 },
-  { 0x0, 0x0, 160, 1164, 1926, 0, 0, -1 },
-  { 0x0, 0x0, 160, 1165, 2457, 0, 1, 54 },
-  { 0x1, 0x1, 160, 1166, 1968, 29, 1, 49 },
-  { 0x1, 0x1, 161, 1180, -1, 27, 1, 33 },
-  { 0x0, 0x0, 162, 1811, 1922, 0, 0, -1 },
-  { 0x1, 0x1, 162, 1812, 2453, 33, 1, 54 },
-  { 0x0, 0x0, 162, 1813, 1964, 0, 0, -1 },
-  { 0x3, 0x3, 162, 1814, -1, 28, 1, 49 },
-  { 0x0, 0x0, 163, 1171, 1920, 0, 0, -1 },
-  { 0x1, 0x1, 163, 1172, 2452, 36, 1, 54 },
-  { 0x0, 0x0, 163, 1173, 1963, 0, 0, -1 },
-  { 0x5, 0x5, 163, 1174, -1, 27, 1, 49 },
-  { 0x0, 0x0, 164, -1, 2434, 0, 1, 63 },
-  { 0x1, 0x1, 166, -1, -1, 28, 1, 33 },
-  { 0x1, 0x1, 167, 2292, -1, 27, 1, 33 },
-  { 0x1, 0x1, 167, 2293, -1, 27, 1, 33 },
-  { 0x1, 0x1, 168, 1445, -1, 28, 1, 132 },
-  { 0x1, 0x1, 168, 1446, -1, 28, 1, 132 },
-  { 0x1, 0x1, 168, 1447, -1, 28, 1, 132 },
-  { 0x1, 0x1, 168, 1448, -1, 28, 1, 132 },
-  { 0x1, 0x1, 168, 1449, -1, 28, 1, 132 },
-  { 0x1, 0x1, 168, 1450, -1, 28, 1, 132 },
-  { 0x1, 0x1, 168, 1451, -1, 28, 1, 132 },
-  { 0x1, 0x1, 168, 1452, -1, 28, 1, 132 },
-  { 0x1, 0x1, 168, 1453, -1, 28, 1, 133 },
-  { 0x1, 0x1, 168, 1454, -1, 28, 1, 133 },
-  { 0x1, 0x1, 168, 1455, -1, 28, 1, 133 },
-  { 0x1, 0x1, 168, 1456, -1, 28, 1, 133 },
-  { 0x1, 0x1, 168, 1457, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1458, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1459, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1460, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1461, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1462, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1463, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1464, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1465, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1466, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1467, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1468, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1469, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1470, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1471, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1472, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1473, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1474, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1475, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1476, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1477, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1478, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1479, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1480, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1481, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1482, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1483, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1484, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1485, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1486, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1487, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1488, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1489, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1490, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1491, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1492, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1493, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1494, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1495, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1496, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1497, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1498, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1499, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1500, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1501, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1502, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1503, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1504, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1505, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1506, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1507, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1508, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1509, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1510, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1511, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1512, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1513, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1514, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1515, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1516, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1517, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1518, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1519, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1520, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1521, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1522, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1523, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1524, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1525, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1526, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1527, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1528, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1529, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1530, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1531, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1532, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1533, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1534, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1535, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1536, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1537, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1538, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1539, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1540, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1541, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1542, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1543, -1, 28, 1, 128 },
-  { 0x1, 0x1, 168, 1544, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1545, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1546, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1547, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1548, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1549, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1550, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1551, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1552, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1553, -1, 28, 1, 128 },
-  { 0x1, 0x1, 168, 1554, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1555, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1556, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1557, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1558, -1, 28, 1, 125 },
-  { 0x1, 0x1, 168, 1559, -1, 28, 1, 126 },
-  { 0x1, 0x1, 168, 1560, -1, 28, 1, 127 },
-  { 0x1, 0x1, 168, 1561, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1562, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1563, -1, 28, 1, 128 },
-  { 0x1, 0x1, 168, 1564, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1565, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1566, -1, 28, 1, 129 },
-  { 0x1, 0x1, 168, 1567, -1, 28, 1, 124 },
-  { 0x1, 0x1, 168, 1568, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1569, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1570, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1571, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1572, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1573, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1574, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1575, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1576, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1577, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1578, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1579, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1580, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1581, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1582, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1583, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1584, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1585, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1586, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1587, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1588, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1589, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1590, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1591, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1592, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1593, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1594, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1595, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1596, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1597, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1598, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1599, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1600, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1601, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1602, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1603, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1604, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1605, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1606, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1607, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1608, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1609, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1610, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1611, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1612, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1613, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1614, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1615, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1616, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1617, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1618, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1619, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1620, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1621, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1622, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1623, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1624, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1625, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1626, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1627, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1628, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1629, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1630, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1631, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1632, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1633, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1634, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1635, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1636, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1637, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1638, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1639, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1640, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1641, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1642, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1643, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1644, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1645, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1646, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1647, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1648, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1649, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1650, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1651, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1652, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1653, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1654, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1655, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1656, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1657, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1658, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1659, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1660, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1661, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1662, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1663, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1664, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1665, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1666, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1667, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1668, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1669, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1670, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1671, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1672, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1673, -1, 28, 1, 138 },
-  { 0x1, 0x1, 168, 1674, -1, 28, 1, 139 },
-  { 0x1, 0x1, 168, 1675, -1, 28, 1, 140 },
-  { 0x1, 0x1, 168, 1676, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1677, -1, 28, 1, 141 },
-  { 0x1, 0x1, 168, 1678, -1, 28, 1, 137 },
-  { 0x1, 0x1, 168, 1433, -1, 28, 1, 142 },
-  { 0x1, 0x1, 168, 1434, -1, 28, 1, 143 },
-  { 0x1, 0x1, 168, 1435, -1, 28, 1, 143 },
-  { 0x1, 0x1, 168, 1436, -1, 28, 1, 142 },
-  { 0x1, 0x1, 168, 1437, -1, 28, 1, 144 },
-  { 0x1, 0x1, 168, 1438, -1, 28, 1, 145 },
-  { 0x1, 0x1, 168, 1439, -1, 28, 1, 145 },
-  { 0x1, 0x1, 168, 1440, -1, 28, 1, 144 },
-  { 0x1, 0x1, 168, 1441, -1, 28, 1, 144 },
-  { 0x1, 0x1, 168, 1442, -1, 28, 1, 145 },
-  { 0x1, 0x1, 168, 1443, -1, 28, 1, 145 },
-  { 0x1, 0x1, 168, 1444, -1, 28, 1, 144 },
-  { 0x1, 0x1, 168, 1719, -1, 28, 1, 133 },
-  { 0x1, 0x1, 168, 1720, -1, 28, 1, 133 },
-  { 0x1, 0x1, 168, 1721, -1, 28, 1, 133 },
-  { 0x1, 0x1, 168, 1722, -1, 28, 1, 133 },
-  { 0x1, 0x1, 169, 1679, -1, 29, 1, 142 },
-  { 0x1, 0x1, 169, 1680, -1, 29, 1, 143 },
-  { 0x1, 0x1, 169, 1681, -1, 29, 1, 143 },
-  { 0x1, 0x1, 169, 1682, -1, 29, 1, 142 },
-  { 0x1, 0x1, 169, 1683, -1, 29, 1, 144 },
-  { 0x1, 0x1, 169, 1684, -1, 29, 1, 145 },
-  { 0x1, 0x1, 169, 1685, -1, 29, 1, 145 },
-  { 0x1, 0x1, 169, 1686, -1, 29, 1, 144 },
-  { 0x1, 0x1, 169, 1687, -1, 29, 1, 144 },
-  { 0x1, 0x1, 169, 1688, -1, 29, 1, 145 },
-  { 0x1, 0x1, 169, 1689, -1, 29, 1, 145 },
-  { 0x1, 0x1, 169, 1690, -1, 29, 1, 144 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 132 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 132 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 132 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 132 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 132 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 132 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 132 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 132 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 133 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 133 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 133 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 133 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 257, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1867, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 259, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1868, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 261, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1869, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 263, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1870, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 265, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1871, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 267, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1872, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 269, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1873, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 271, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1874, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 273, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1875, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 128 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 275, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1876, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 128 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 277, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1877, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 125 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 126 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 127 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 128 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 279, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 129 },
-  { 0x3, 0x3, 170, 1878, -1, 28, 1, 124 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1879, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1880, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1881, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1882, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1883, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1884, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1885, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1886, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1887, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1888, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1889, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1890, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1891, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1892, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1893, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1894, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1895, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 138 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 139 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 140 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 141 },
-  { 0x3, 0x3, 170, 1896, -1, 28, 1, 137 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 142 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 143 },
-  { 0x3, 0x3, 170, 797, -1, 28, 1, 143 },
-  { 0x3, 0x3, 170, 798, -1, 28, 1, 142 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 144 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 145 },
-  { 0x3, 0x3, 170, 799, -1, 28, 1, 145 },
-  { 0x3, 0x3, 170, 800, -1, 28, 1, 144 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 144 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 145 },
-  { 0x3, 0x3, 170, 801, -1, 28, 1, 145 },
-  { 0x3, 0x3, 170, 802, -1, 28, 1, 144 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, 1835, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 135 },
-  { 0x3, 0x3, 170, 1836, -1, 28, 1, 135 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, 1837, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 135 },
-  { 0x3, 0x3, 170, 1838, -1, 28, 1, 135 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, 1839, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 135 },
-  { 0x3, 0x3, 170, 1840, -1, 28, 1, 135 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 131 },
-  { 0x3, 0x3, 170, 1841, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 135 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 136 },
-  { 0x3, 0x3, 170, 1842, -1, 28, 1, 135 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 130 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 133 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 133 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 133 },
-  { 0x3, 0x3, 170, -1, -1, 28, 1, 133 },
-  { 0x0, 0x0, 171, -1, 330, 0, 0, -1 },
-  { 0x0, 0x0, 171, 2490, 2460, 0, 1, 1 },
-  { 0x0, 0x0, 171, -1, 334, 0, 0, -1 },
-  { 0x0, 0x0, 171, 2492, 2462, 0, 1, 1 },
-  { 0x11, 0x31, 172, 2394, 337, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 172, -1, 338, 12, 1, 4 },
-  { 0x1, 0x1, 172, -1, 341, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 172, -1, 342, 12, 1, 4 },
-  { 0x11, 0x11, 172, -1, 343, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 172, -1, 344, 12, 1, 4 },
-  { 0x1, 0x1, 172, 1757, 345, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 172, -1, 347, 12, 1, 4 },
-  { 0x11, 0x11, 172, 1759, 349, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 172, -1, 351, 12, 1, 4 },
-  { 0x11, 0x31, 172, 2404, 357, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 172, -1, 358, 12, 1, 4 },
-  { 0x11, 0x31, 172, 2414, 361, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 172, -1, 362, 12, 1, 4 },
-  { 0x1, 0x1, 172, -1, 365, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 172, -1, 366, 12, 1, 4 },
-  { 0x11, 0x11, 172, -1, 367, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 172, -1, 368, 12, 1, 4 },
-  { 0x1, 0x1, 172, 1781, 369, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 172, -1, 371, 12, 1, 4 },
-  { 0x11, 0x11, 172, 1783, 373, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 172, -1, 375, 12, 1, 4 },
-  { 0x11, 0x31, 172, 2424, 381, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 172, -1, 382, 12, 1, 4 },
-  { 0x1, 0x1, 172, -1, 385, 33, 1, 4 },
-  { 0x200001, 0x200001, 172, -1, 386, 12, 1, 4 },
-  { 0x1, 0x1, 172, -1, 389, 33, 1, 4 },
-  { 0x200001, 0x200001, 172, -1, 390, 12, 1, 4 },
-  { 0x1, 0x1, 173, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 173, -1, -1, 12, 1, 4 },
-  { 0x2000001, 0x2000001, 173, -1, -1, 12, 1, 4 },
-  { 0x1, 0x1, 173, 1734, -1, 37, 1, 4 },
-  { 0x2200001, 0x2200001, 173, -1, -1, 12, 1, 4 },
-  { 0x11, 0x11, 173, 1736, -1, 33, 1, 4 },
-  { 0x1, 0x1, 173, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 173, -1, -1, 12, 1, 4 },
-  { 0x11, 0x11, 173, -1, -1, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 173, -1, -1, 12, 1, 4 },
-  { 0x1, 0x1, 173, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 173, -1, -1, 12, 1, 4 },
-  { 0x0, 0x0, 173, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 173, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 173, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 173, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 173, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 173, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 173, -1, -1, 12, 1, 4 },
-  { 0x2000001, 0x2000001, 173, -1, -1, 12, 1, 4 },
-  { 0x1, 0x1, 173, 1746, -1, 37, 1, 4 },
-  { 0x2200001, 0x2200001, 173, -1, -1, 12, 1, 4 },
-  { 0x11, 0x11, 173, 1748, -1, 33, 1, 4 },
-  { 0x1, 0x1, 173, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 173, -1, -1, 12, 1, 4 },
-  { 0x11, 0x11, 173, -1, -1, 33, 1, 4 },
-  { 0x2200001, 0x2200001, 173, -1, -1, 12, 1, 4 },
-  { 0x1, 0x1, 173, -1, -1, 37, 1, 4 },
-  { 0x2000001, 0x2000001, 173, -1, -1, 12, 1, 4 },
-  { 0x0, 0x0, 173, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 173, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 173, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 173, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 12, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 33, 1, 5 },
-  { 0x200001, 0x200001, 173, -1, -1, 12, 1, 5 },
-  { 0x0, 0x0, 173, -1, -1, 0, 1, 5 },
-  { 0x1, 0x1, 173, -1, -1, 12, 1, 5 },
-  { 0x9, 0x9, 173, -1, -1, 33, 1, 5 },
-  { 0x1, 0x1, 173, 331, -1, 33, 1, 4 },
-  { 0x1200001, 0x1200001, 173, -1, -1, 12, 1, 5 },
-  { 0x200001, 0x200001, 173, 332, -1, 12, 1, 4 },
-  { 0x9, 0x9, 173, -1, -1, 33, 1, 5 },
-  { 0x1, 0x1, 173, 335, -1, 33, 1, 4 },
-  { 0x1200001, 0x1200001, 173, -1, -1, 12, 1, 5 },
-  { 0x200001, 0x200001, 173, 336, -1, 12, 1, 4 },
-  { 0x0, 0x0, 174, -1, 1924, 0, 0, -1 },
-  { 0x9, 0x9, 174, -1, 2454, 33, 1, 49 },
-  { 0x0, 0x0, 174, -1, 1965, 0, 0, -1 },
-  { 0x7, 0x7, 174, -1, -1, 27, 1, 49 },
-  { 0x1, 0x1, 194, -1, -1, 27, 1, 10 },
-  { 0x1, 0x1, 208, -1, -1, 29, 1, 0 },
-  { 0x1, 0x1, 208, -1, -1, 29, 1, 0 },
-  { 0x2, 0x3, 208, 978, -1, 27, 1, 33 },
-  { 0x0, 0x0, 208, 979, -1, 0, 1, 33 },
-  { 0x0, 0x0, 208, 980, -1, 0, 1, 0 },
-  { 0x0, 0x0, 208, 981, -1, 0, 1, 0 },
-  { 0x0, 0x0, 208, 982, -1, 0, 1, 0 },
-  { 0x0, 0x0, 208, 983, -1, 0, 1, 0 },
-  { 0x0, 0x0, 208, 2476, -1, 0, 1, 93 },
-  { 0x0, 0x0, 208, 2477, -1, 0, 1, 93 },
-  { 0x0, 0x0, 208, 2478, 812, 0, 0, -1 },
-  { 0x1, 0x1, 209, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 209, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 210, -1, 1184, 32, 1, 132 },
-  { 0x1, 0x1, 210, -1, 1186, 32, 1, 132 },
-  { 0x1, 0x1, 210, -1, 1188, 32, 1, 132 },
-  { 0x1, 0x1, 210, -1, 1190, 32, 1, 132 },
-  { 0x1, 0x1, 210, -1, 1192, 32, 1, 133 },
-  { 0x1, 0x1, 210, -1, 1194, 32, 1, 133 },
-  { 0x1, 0x1, 210, -1, 1691, 32, 1, 130 },
-  { 0x1, 0x1, 210, -1, 1693, 32, 1, 135 },
-  { 0x1, 0x1, 210, -1, 1695, 32, 1, 130 },
-  { 0x1, 0x1, 210, -1, 1697, 32, 1, 135 },
-  { 0x1, 0x1, 210, -1, 1699, 32, 1, 130 },
-  { 0x1, 0x1, 210, -1, 1701, 32, 1, 135 },
-  { 0x1, 0x1, 210, 2296, 1703, 32, 1, 130 },
-  { 0x1, 0x1, 210, 2297, 1706, 32, 1, 135 },
-  { 0x0, 0x0, 211, -1, 2338, 0, 0, -1 },
-  { 0x0, 0x0, 211, -1, 2339, 0, 0, -1 },
-  { 0x0, 0x0, 211, -1, 2364, 0, 0, -1 },
-  { 0x5, 0x5, 211, -1, 2367, 20, 1, 67 },
-  { 0x0, 0x0, 215, 1826, 811, 0, 0, -1 },
-  { 0x0, 0x0, 216, -1, 950, 0, 0, -1 },
-  { 0x0, 0x0, 216, -1, 1039, 0, 0, -1 },
-  { 0x0, 0x0, 216, -1, -1, 0, 1, 121 },
-  { 0x0, 0x0, 216, -1, -1, 0, 1, 66 },
-  { 0x1, 0x1, 216, 688, 1898, 36, 1, 65 },
-  { 0x1, 0x1, 216, 689, 1933, 36, 1, 65 },
-  { 0x0, 0x0, 216, 690, 1936, 0, 0, -1 },
-  { 0x1, 0x1, 216, 691, -1, 36, 1, 65 },
-  { 0x0, 0x0, 216, 1181, -1, 0, 1, 33 },
-  { 0x1, 0x1, 216, 692, 1941, 36, 1, 65 },
-  { 0x0, 0x0, 216, 693, 1944, 0, 0, -1 },
-  { 0x1, 0x1, 216, 694, -1, 36, 1, 65 },
-  { 0x0, 0x0, 216, 695, 1947, 0, 0, -1 },
-  { 0x1, 0x1, 216, 696, -1, 36, 1, 65 },
-  { 0x1, 0x1, 216, 697, 1950, 36, 1, 65 },
-  { 0x1, 0x1, 216, 698, 1953, 36, 1, 65 },
-  { 0x0, 0x0, 216, 1182, -1, 0, 1, 33 },
-  { 0x1, 0x1, 216, 699, 1986, 36, 1, 65 },
-  { 0x1, 0x1, 216, 700, -1, 31, 1, 134 },
-  { 0x1, 0x1, 216, 220, 1195, 32, 1, 125 },
-  { 0x1, 0x1, 216, 221, 1204, 32, 1, 125 },
-  { 0x1, 0x1, 216, 222, 1213, 32, 1, 125 },
-  { 0x1, 0x1, 216, 223, 1222, 32, 1, 125 },
-  { 0x1, 0x1, 216, 224, 1231, 32, 1, 125 },
-  { 0x1, 0x1, 216, 225, 1240, 32, 1, 125 },
-  { 0x1, 0x1, 216, 226, 1249, 32, 1, 125 },
-  { 0x1, 0x1, 216, 227, 1258, 32, 1, 125 },
-  { 0x1, 0x1, 216, 228, 1267, 32, 1, 125 },
-  { 0x1, 0x1, 216, 229, 1276, 32, 1, 125 },
-  { 0x1, 0x1, 216, 230, 1286, 32, 1, 125 },
-  { 0x1, 0x1, 216, 231, 1296, 32, 1, 125 },
-  { 0x1, 0x1, 216, 232, 1309, 32, 1, 138 },
-  { 0x1, 0x1, 216, 233, 1315, 32, 1, 138 },
-  { 0x1, 0x1, 216, 234, 1321, 32, 1, 138 },
-  { 0x1, 0x1, 216, 235, 1327, 32, 1, 138 },
-  { 0x1, 0x1, 216, 236, 1333, 32, 1, 138 },
-  { 0x1, 0x1, 216, 237, 1339, 32, 1, 138 },
-  { 0x1, 0x1, 216, 238, 1345, 32, 1, 138 },
-  { 0x1, 0x1, 216, 239, 1351, 32, 1, 138 },
-  { 0x1, 0x1, 216, 240, 1357, 32, 1, 138 },
-  { 0x1, 0x1, 216, 241, 1363, 32, 1, 138 },
-  { 0x1, 0x1, 216, 242, 1369, 32, 1, 138 },
-  { 0x1, 0x1, 216, 243, 1375, 32, 1, 138 },
-  { 0x1, 0x1, 216, 244, 1381, 32, 1, 138 },
-  { 0x1, 0x1, 216, 245, 1387, 32, 1, 138 },
-  { 0x1, 0x1, 216, 246, 1393, 32, 1, 138 },
-  { 0x1, 0x1, 216, 247, 1399, 32, 1, 138 },
-  { 0x1, 0x1, 216, 248, 1405, 32, 1, 138 },
-  { 0x1, 0x1, 216, 249, 1411, 32, 1, 138 },
-  { 0x1, 0x1, 216, 704, -1, 31, 1, 146 },
-  { 0x0, 0x0, 217, 1989, -1, 0, 1, 65 },
-  { 0x0, 0x0, 217, 1990, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 24, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 1992, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 1993, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 1994, -1, 0, 1, 44 },
-  { 0x0, 0x0, 217, 1995, -1, 0, 1, 39 },
-  { 0x1, 0x1, 217, 1996, -1, 12, 1, 58 },
-  { 0x0, 0x0, 217, 1997, -1, 0, 1, 53 },
-  { 0x1000001, 0x1000001, 217, 1998, -1, 12, 1, 58 },
-  { 0x1, 0x1, 217, 1999, -1, 36, 1, 53 },
-  { 0x200001, 0x200001, 217, 2000, -1, 12, 1, 58 },
-  { 0x1, 0x1, 217, 2001, -1, 33, 1, 53 },
-  { 0x1200001, 0x1200001, 217, 2002, -1, 12, 1, 48 },
-  { 0x9, 0x9, 217, 2003, -1, 33, 1, 48 },
-  { 0x1, 0x1, 217, 2004, -1, 12, 1, 58 },
-  { 0x0, 0x0, 217, 2005, -1, 0, 1, 53 },
-  { 0x200001, 0x1200001, 217, 2006, -1, 12, 1, 58 },
-  { 0x1, 0x9, 217, 2007, -1, 33, 1, 53 },
-  { 0x1, 0x1, 217, 2008, -1, 12, 1, 58 },
-  { 0x0, 0x0, 217, 2009, -1, 0, 1, 53 },
-  { 0x1000001, 0x1000001, 217, 2010, -1, 12, 1, 58 },
-  { 0x1, 0x1, 217, 2011, -1, 36, 1, 53 },
-  { 0x200001, 0x200001, 217, 2012, -1, 12, 1, 58 },
-  { 0x1, 0x1, 217, 2013, -1, 33, 1, 53 },
-  { 0x1200001, 0x1200001, 217, 2014, -1, 12, 1, 48 },
-  { 0x9, 0x9, 217, 2015, -1, 33, 1, 48 },
-  { 0x1, 0x1, 217, 2016, -1, 12, 1, 58 },
-  { 0x0, 0x0, 217, 2017, -1, 0, 1, 53 },
-  { 0x200001, 0x1200001, 217, 2018, -1, 12, 1, 58 },
-  { 0x1, 0x9, 217, 2019, -1, 33, 1, 53 },
-  { 0x1, 0x1, 217, 2020, -1, 28, 1, 28 },
-  { 0x0, 0x0, 217, 2021, -1, 0, 1, 28 },
-  { 0x3, 0x3, 217, 2022, -1, 27, 1, 28 },
-  { 0x1, 0x1, 217, 2023, -1, 27, 1, 28 },
-  { 0x0, 0x0, 217, 2024, -1, 0, 1, 65 },
-  { 0x0, 0x0, 217, 2025, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2026, -1, 0, 1, 28 },
-  { 0x1, 0x1, 217, 2027, -1, 36, 1, 65 },
-  { 0x1, 0x1, 217, 2028, -1, 37, 1, 28 },
-  { 0x0, 0x0, 217, 2029, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2030, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2031, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2032, -1, 0, 1, 65 },
-  { 0x0, 0x0, 217, 2033, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 36, -1, 0, 1, 28 },
-  { 0x1, 0x1, 217, 2035, -1, 36, 1, 65 },
-  { 0x1, 0x1, 217, 2036, -1, 37, 1, 28 },
-  { 0x0, 0x0, 217, 2037, -1, 0, 1, 28 },
-  { 0x1, 0x1, 217, 2038, -1, 36, 1, 65 },
-  { 0x1, 0x1, 217, 2039, -1, 37, 1, 28 },
-  { 0x0, 0x0, 217, 2040, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2041, -1, 0, 1, 65 },
-  { 0x0, 0x0, 217, 2042, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 41, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2044, -1, 0, 1, 65 },
-  { 0x0, 0x0, 217, 2045, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 42, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2047, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2048, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2049, -1, 0, 1, 48 },
-  { 0x1, 0x1, 217, 2050, -1, 27, 1, 48 },
-  { 0x1, 0x1, 217, 2051, -1, 28, 1, 48 },
-  { 0x3, 0x3, 217, 2052, -1, 27, 1, 48 },
-  { 0x1, 0x1, 217, 2053, -1, 29, 1, 48 },
-  { 0x5, 0x5, 217, 2054, -1, 27, 1, 48 },
-  { 0x3, 0x3, 217, 2055, -1, 28, 1, 48 },
-  { 0x7, 0x7, 217, 2056, -1, 27, 1, 48 },
-  { 0x0, 0x0, 217, 2057, -1, 0, 1, 48 },
-  { 0x0, 0x0, 217, 2058, -1, 0, 1, 48 },
-  { 0x0, 0x0, 217, 2059, -1, 0, 1, 48 },
-  { 0x0, 0x0, 217, 2060, -1, 0, 1, 48 },
-  { 0x1, 0x1, 217, 2061, -1, 28, 1, 28 },
-  { 0x0, 0x0, 217, 2062, -1, 0, 1, 28 },
-  { 0x3, 0x3, 217, 2063, -1, 27, 1, 28 },
-  { 0x1, 0x1, 217, 2064, -1, 27, 1, 28 },
-  { 0x0, 0x0, 217, 2065, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2066, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2067, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 51, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2069, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2070, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 56, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 2072, -1, 0, 1, 23 },
-  { 0x0, 0x0, 217, 2073, -1, 0, 1, 23 },
-  { 0x0, 0x0, 217, 2074, -1, 0, 1, 23 },
-  { 0x0, 0x0, 217, 2075, -1, 0, 1, 23 },
-  { 0x0, 0x0, 217, 2076, -1, 0, 1, 34 },
-  { 0x0, 0x0, 217, 2077, -1, 0, 1, 65 },
-  { 0x0, 0x0, 217, 2078, -1, 0, 1, 28 },
-  { 0x0, 0x0, 217, 63, -1, 0, 1, 28 },
-  { 0x1, 0x1, 218, 2080, -1, 34, 1, 65 },
-  { 0x1, 0x1, 218, 2081, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2082, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2083, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2084, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2085, -1, 34, 1, 45 },
-  { 0x1, 0x1, 218, 2086, -1, 34, 1, 41 },
-  { 0x400001, 0x400001, 218, 2087, -1, 12, 1, 60 },
-  { 0x1, 0x1, 218, 2088, -1, 34, 1, 55 },
-  { 0x1400001, 0x1400001, 218, 2089, -1, 12, 1, 60 },
-  { 0x5, 0x5, 218, 2090, -1, 34, 1, 55 },
-  { 0x600001, 0x600001, 218, 2091, -1, 12, 1, 60 },
-  { 0x3, 0x3, 218, 2092, -1, 33, 1, 55 },
-  { 0x1600001, 0x1600001, 218, 2093, -1, 12, 1, 50 },
-  { 0xb, 0xb, 218, 2094, -1, 33, 1, 50 },
-  { 0x400001, 0x400001, 218, 2095, -1, 12, 1, 60 },
-  { 0x1, 0x1, 218, 2096, -1, 34, 1, 55 },
-  { 0x600001, 0x1600001, 218, 2097, -1, 12, 1, 60 },
-  { 0x3, 0xb, 218, 2098, -1, 33, 1, 55 },
-  { 0x400001, 0x400001, 218, 2099, -1, 12, 1, 60 },
-  { 0x1, 0x1, 218, 2100, -1, 34, 1, 55 },
-  { 0x1400001, 0x1400001, 218, 2101, -1, 12, 1, 60 },
-  { 0x5, 0x5, 218, 2102, -1, 34, 1, 55 },
-  { 0x600001, 0x600001, 218, 2103, -1, 12, 1, 60 },
-  { 0x3, 0x3, 218, 2104, -1, 33, 1, 55 },
-  { 0x1600001, 0x1600001, 218, 2105, -1, 12, 1, 50 },
-  { 0xb, 0xb, 218, 2106, -1, 33, 1, 50 },
-  { 0x400001, 0x400001, 218, 2107, -1, 12, 1, 60 },
-  { 0x1, 0x1, 218, 2108, -1, 34, 1, 55 },
-  { 0x600001, 0x1600001, 218, 2109, -1, 12, 1, 60 },
-  { 0x3, 0xb, 218, 2110, -1, 33, 1, 55 },
-  { 0x41, 0x41, 218, 2111, -1, 28, 1, 30 },
-  { 0x1, 0x1, 218, 2112, -1, 34, 1, 30 },
-  { 0x83, 0x83, 218, 2113, -1, 27, 1, 30 },
-  { 0x81, 0x81, 218, 2114, -1, 27, 1, 30 },
-  { 0x1, 0x1, 218, 2115, -1, 34, 1, 65 },
-  { 0x1, 0x1, 218, 2116, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2117, -1, 34, 1, 30 },
-  { 0x5, 0x5, 218, 2118, -1, 34, 1, 65 },
-  { 0x9, 0x9, 218, 2119, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2120, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2121, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2122, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2123, -1, 34, 1, 65 },
-  { 0x1, 0x1, 218, 2124, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2125, -1, 34, 1, 30 },
-  { 0x5, 0x5, 218, 2126, -1, 34, 1, 65 },
-  { 0x9, 0x9, 218, 2127, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2128, -1, 34, 1, 30 },
-  { 0x5, 0x5, 218, 2129, -1, 34, 1, 65 },
-  { 0x9, 0x9, 218, 2130, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2131, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2132, -1, 34, 1, 65 },
-  { 0x1, 0x1, 218, 2133, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2134, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2135, -1, 34, 1, 65 },
-  { 0x1, 0x1, 218, 2136, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2137, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2138, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2139, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2140, -1, 34, 1, 50 },
-  { 0x81, 0x81, 218, 2141, -1, 27, 1, 50 },
-  { 0x41, 0x41, 218, 2142, -1, 28, 1, 50 },
-  { 0x83, 0x83, 218, 2143, -1, 27, 1, 50 },
-  { 0x21, 0x21, 218, 2144, -1, 29, 1, 50 },
-  { 0x85, 0x85, 218, 2145, -1, 27, 1, 50 },
-  { 0x43, 0x43, 218, 2146, -1, 28, 1, 50 },
-  { 0x87, 0x87, 218, 2147, -1, 27, 1, 50 },
-  { 0x1, 0x1, 218, 2148, -1, 34, 1, 50 },
-  { 0x1, 0x1, 218, 2149, -1, 34, 1, 50 },
-  { 0x1, 0x1, 218, 2150, -1, 34, 1, 50 },
-  { 0x1, 0x1, 218, 2151, -1, 34, 1, 50 },
-  { 0x41, 0x41, 218, 2152, -1, 28, 1, 30 },
-  { 0x1, 0x1, 218, 2153, -1, 34, 1, 30 },
-  { 0x83, 0x83, 218, 2154, -1, 27, 1, 30 },
-  { 0x81, 0x81, 218, 2155, -1, 27, 1, 30 },
-  { 0x1, 0x1, 218, 2156, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2157, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2158, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2159, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2160, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2161, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2162, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2163, -1, 34, 1, 25 },
-  { 0x1, 0x1, 218, 2164, -1, 34, 1, 25 },
-  { 0x1, 0x1, 218, 2165, -1, 34, 1, 25 },
-  { 0x1, 0x1, 218, 2166, -1, 34, 1, 25 },
-  { 0x1, 0x1, 218, 2167, -1, 34, 1, 36 },
-  { 0x1, 0x1, 218, 2168, -1, 34, 1, 65 },
-  { 0x1, 0x1, 218, 2169, -1, 34, 1, 30 },
-  { 0x1, 0x1, 218, 2170, -1, 34, 1, 30 },
-  { 0x1, 0x1, 219, 2171, -1, 35, 1, 65 },
-  { 0x1, 0x1, 219, 2172, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2173, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2174, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2175, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2176, -1, 35, 1, 46 },
-  { 0x1, 0x1, 219, 2177, -1, 35, 1, 42 },
-  { 0x800001, 0x800001, 219, 2178, -1, 12, 1, 61 },
-  { 0x1, 0x1, 219, 2179, -1, 35, 1, 56 },
-  { 0x1800001, 0x1800001, 219, 2180, -1, 12, 1, 61 },
-  { 0x3, 0x3, 219, 2181, -1, 35, 1, 56 },
-  { 0xa00001, 0xa00001, 219, 2182, -1, 12, 1, 61 },
-  { 0x5, 0x5, 219, 2183, -1, 33, 1, 56 },
-  { 0x1a00001, 0x1a00001, 219, 2184, -1, 12, 1, 51 },
-  { 0xd, 0xd, 219, 2185, -1, 33, 1, 51 },
-  { 0x800001, 0x800001, 219, 2186, -1, 12, 1, 61 },
-  { 0x1, 0x1, 219, 2187, -1, 35, 1, 56 },
-  { 0xa00001, 0x1a00001, 219, 2188, -1, 12, 1, 61 },
-  { 0x5, 0xd, 219, 2189, -1, 33, 1, 56 },
-  { 0x800001, 0x800001, 219, 2190, -1, 12, 1, 61 },
-  { 0x1, 0x1, 219, 2191, -1, 35, 1, 56 },
-  { 0x1800001, 0x1800001, 219, 2192, -1, 12, 1, 61 },
-  { 0x3, 0x3, 219, 2193, -1, 35, 1, 56 },
-  { 0xa00001, 0xa00001, 219, 2194, -1, 12, 1, 61 },
-  { 0x5, 0x5, 219, 2195, -1, 33, 1, 56 },
-  { 0x1a00001, 0x1a00001, 219, 2196, -1, 12, 1, 51 },
-  { 0xd, 0xd, 219, 2197, -1, 33, 1, 51 },
-  { 0x800001, 0x800001, 219, 2198, -1, 12, 1, 61 },
-  { 0x1, 0x1, 219, 2199, -1, 35, 1, 56 },
-  { 0xa00001, 0x1a00001, 219, 2200, -1, 12, 1, 61 },
-  { 0x5, 0xd, 219, 2201, -1, 33, 1, 56 },
-  { 0x81, 0x81, 219, 2202, -1, 28, 1, 31 },
-  { 0x1, 0x1, 219, 2203, -1, 35, 1, 31 },
-  { 0x103, 0x103, 219, 2204, -1, 27, 1, 31 },
-  { 0x101, 0x101, 219, 2205, -1, 27, 1, 31 },
-  { 0x1, 0x1, 219, 2206, -1, 35, 1, 65 },
-  { 0x1, 0x1, 219, 2207, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2208, -1, 35, 1, 31 },
-  { 0x3, 0x3, 219, 2209, -1, 35, 1, 65 },
-  { 0x5, 0x5, 219, 2210, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2211, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2212, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2213, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2214, -1, 35, 1, 65 },
-  { 0x1, 0x1, 219, 2215, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2216, -1, 35, 1, 31 },
-  { 0x3, 0x3, 219, 2217, -1, 35, 1, 65 },
-  { 0x5, 0x5, 219, 2218, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2219, -1, 35, 1, 31 },
-  { 0x3, 0x3, 219, 2220, -1, 35, 1, 65 },
-  { 0x5, 0x5, 219, 2221, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2222, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2223, -1, 35, 1, 65 },
-  { 0x1, 0x1, 219, 2224, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2225, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2226, -1, 35, 1, 65 },
-  { 0x1, 0x1, 219, 2227, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2228, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2229, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2230, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2231, -1, 35, 1, 51 },
-  { 0x101, 0x101, 219, 2232, -1, 27, 1, 51 },
-  { 0x81, 0x81, 219, 2233, -1, 28, 1, 51 },
-  { 0x103, 0x103, 219, 2234, -1, 27, 1, 51 },
-  { 0x41, 0x41, 219, 2235, -1, 29, 1, 51 },
-  { 0x105, 0x105, 219, 2236, -1, 27, 1, 51 },
-  { 0x83, 0x83, 219, 2237, -1, 28, 1, 51 },
-  { 0x107, 0x107, 219, 2238, -1, 27, 1, 51 },
-  { 0x1, 0x1, 219, 2239, -1, 35, 1, 51 },
-  { 0x1, 0x1, 219, 2240, -1, 35, 1, 51 },
-  { 0x1, 0x1, 219, 2241, -1, 35, 1, 51 },
-  { 0x1, 0x1, 219, 2242, -1, 35, 1, 51 },
-  { 0x81, 0x81, 219, 2243, -1, 28, 1, 31 },
-  { 0x1, 0x1, 219, 2244, -1, 35, 1, 31 },
-  { 0x103, 0x103, 219, 2245, -1, 27, 1, 31 },
-  { 0x101, 0x101, 219, 2246, -1, 27, 1, 31 },
-  { 0x1, 0x1, 219, 2247, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2248, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2249, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2250, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2251, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2252, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2253, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2254, -1, 35, 1, 26 },
-  { 0x1, 0x1, 219, 2255, -1, 35, 1, 26 },
-  { 0x1, 0x1, 219, 2256, -1, 35, 1, 26 },
-  { 0x1, 0x1, 219, 2257, -1, 35, 1, 26 },
-  { 0x1, 0x1, 219, 2258, -1, 35, 1, 37 },
-  { 0x1, 0x1, 219, 2259, -1, 35, 1, 65 },
-  { 0x1, 0x1, 219, 2260, -1, 35, 1, 31 },
-  { 0x1, 0x1, 219, 2261, -1, 35, 1, 31 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 65 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1852, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 47 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 43 },
-  { 0xc00001, 0xc00001, 220, -1, -1, 12, 1, 62 },
-  { 0x3, 0x3, 220, 2435, -1, 34, 1, 57 },
-  { 0x1c00001, 0x1c00001, 220, -1, -1, 12, 1, 62 },
-  { 0x7, 0x7, 220, 2436, -1, 34, 1, 57 },
-  { 0xe00001, 0xe00001, 220, -1, -1, 12, 1, 62 },
-  { 0x7, 0x7, 220, 2437, -1, 33, 1, 57 },
-  { 0x1e00001, 0x1e00001, 220, -1, -1, 12, 1, 52 },
-  { 0xf, 0xf, 220, 2438, -1, 33, 1, 52 },
-  { 0xc00001, 0xc00001, 220, -1, -1, 12, 1, 62 },
-  { 0x3, 0x3, 220, 2443, -1, 34, 1, 57 },
-  { 0xe00001, 0x1e00001, 220, -1, -1, 12, 1, 62 },
-  { 0x7, 0xf, 220, 2444, -1, 33, 1, 57 },
-  { 0xc00001, 0xc00001, 220, -1, -1, 12, 1, 62 },
-  { 0x3, 0x3, 220, 2447, -1, 34, 1, 57 },
-  { 0x1c00001, 0x1c00001, 220, -1, -1, 12, 1, 62 },
-  { 0x7, 0x7, 220, 2448, -1, 34, 1, 57 },
-  { 0xe00001, 0xe00001, 220, -1, -1, 12, 1, 62 },
-  { 0x7, 0x7, 220, 2449, -1, 33, 1, 57 },
-  { 0x1e00001, 0x1e00001, 220, -1, -1, 12, 1, 52 },
-  { 0xf, 0xf, 220, 2450, -1, 33, 1, 52 },
-  { 0xc00001, 0xc00001, 220, -1, -1, 12, 1, 62 },
-  { 0x3, 0x3, 220, 2455, -1, 34, 1, 57 },
-  { 0xe00001, 0x1e00001, 220, -1, -1, 12, 1, 62 },
-  { 0x7, 0xf, 220, 2456, -1, 33, 1, 57 },
-  { 0xc1, 0xc1, 220, -1, -1, 28, 1, 32 },
-  { 0x3, 0x3, 220, 2375, -1, 34, 1, 32 },
-  { 0x183, 0x183, 220, -1, -1, 27, 1, 32 },
-  { 0x181, 0x181, 220, 2376, -1, 27, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 65 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1853, -1, 34, 1, 32 },
-  { 0x7, 0x7, 220, -1, -1, 34, 1, 65 },
-  { 0xb, 0xb, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1854, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 65 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1857, -1, 34, 1, 32 },
-  { 0x7, 0x7, 220, -1, -1, 34, 1, 65 },
-  { 0xb, 0xb, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1858, -1, 34, 1, 32 },
-  { 0x7, 0x7, 220, -1, -1, 34, 1, 65 },
-  { 0xb, 0xb, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1860, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 65 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1862, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 65 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1863, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 52 },
-  { 0x181, 0x181, 220, -1, -1, 27, 1, 52 },
-  { 0xc1, 0xc1, 220, -1, -1, 28, 1, 52 },
-  { 0x183, 0x183, 220, -1, -1, 27, 1, 52 },
-  { 0x61, 0x61, 220, -1, -1, 29, 1, 52 },
-  { 0x185, 0x185, 220, -1, -1, 27, 1, 52 },
-  { 0xc3, 0xc3, 220, -1, -1, 28, 1, 52 },
-  { 0x187, 0x187, 220, -1, -1, 27, 1, 52 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 52 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 52 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 52 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 52 },
-  { 0xc1, 0xc1, 220, -1, -1, 28, 1, 32 },
-  { 0x3, 0x3, 220, 2379, -1, 34, 1, 32 },
-  { 0x183, 0x183, 220, -1, -1, 27, 1, 32 },
-  { 0x181, 0x181, 220, 2380, -1, 27, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 27 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 27 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 27 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 27 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 38 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 65 },
-  { 0x3, 0x3, 220, -1, -1, 34, 1, 32 },
-  { 0x3, 0x3, 220, 1865, -1, 34, 1, 32 },
-  { 0x3, 0x3, 221, 395, 1197, 32, 1, 127 },
-  { 0x3, 0x3, 221, 396, 1206, 32, 1, 127 },
-  { 0x3, 0x3, 221, 397, 1215, 32, 1, 127 },
-  { 0x3, 0x3, 221, 398, 1224, 32, 1, 127 },
-  { 0x3, 0x3, 221, 399, 1233, 32, 1, 127 },
-  { 0x3, 0x3, 221, 400, 1242, 32, 1, 127 },
-  { 0x3, 0x3, 221, 401, 1251, 32, 1, 127 },
-  { 0x3, 0x3, 221, 402, 1260, 32, 1, 127 },
-  { 0x3, 0x3, 221, 403, 1269, 32, 1, 127 },
-  { 0x3, 0x3, 221, 404, 1278, 32, 1, 127 },
-  { 0x3, 0x3, 221, 405, 1288, 32, 1, 127 },
-  { 0x3, 0x3, 221, 406, 1298, 32, 1, 127 },
-  { 0x3, 0x3, 221, 419, 1311, 32, 1, 140 },
-  { 0x3, 0x3, 221, 420, 1317, 32, 1, 140 },
-  { 0x3, 0x3, 221, 421, 1323, 32, 1, 140 },
-  { 0x3, 0x3, 221, 422, 1329, 32, 1, 140 },
-  { 0x3, 0x3, 221, 423, 1335, 32, 1, 140 },
-  { 0x3, 0x3, 221, 424, 1341, 32, 1, 140 },
-  { 0x3, 0x3, 221, 425, 1347, 32, 1, 140 },
-  { 0x3, 0x3, 221, 426, 1353, 32, 1, 140 },
-  { 0x3, 0x3, 221, 427, 1359, 32, 1, 140 },
-  { 0x3, 0x3, 221, 428, 1365, 32, 1, 140 },
-  { 0x3, 0x3, 221, 429, 1371, 32, 1, 140 },
-  { 0x3, 0x3, 221, 430, 1377, 32, 1, 140 },
-  { 0x3, 0x3, 221, 431, 1383, 32, 1, 140 },
-  { 0x3, 0x3, 221, 432, 1389, 32, 1, 140 },
-  { 0x3, 0x3, 221, 433, 1395, 32, 1, 140 },
-  { 0x3, 0x3, 221, 434, 1401, 32, 1, 140 },
-  { 0x3, 0x3, 221, 435, 1407, 32, 1, 140 },
-  { 0x3, 0x3, 221, 436, 1413, 32, 1, 140 },
-  { 0x1, 0x1, 222, -1, -1, 28, 1, 33 },
-  { 0x1, 0x1, 222, -1, -1, 28, 1, 33 },
-  { 0x0, 0x0, 229, 804, -1, 0, 1, 134 },
-  { 0x0, 0x0, 229, 805, -1, 0, 1, 146 },
-  { 0x1, 0x1, 230, -1, 1704, 33, 1, 131 },
-  { 0x1, 0x1, 230, -1, 1707, 33, 1, 136 },
-  { 0x0, 0x0, 230, -1, 1709, 0, 1, 130 },
-  { 0x0, 0x0, 230, -1, 1710, 0, 1, 130 },
-  { 0x0, 0x0, 231, 738, 816, 0, 0, -1 },
-  { 0x0, 0x0, 231, 739, 824, 0, 0, -1 },
-  { 0x0, 0x0, 231, 740, 820, 0, 0, -1 },
-  { 0x1, 0x1, 231, 741, 475, 33, 1, 6 },
-  { 0x8000001, 0x8000001, 231, 742, 483, 6, 1, 7 },
-  { 0x1, 0x1, 231, 743, 479, 33, 1, 6 },
-  { 0x0, 0x0, 231, 744, 828, 0, 0, -1 },
-  { 0x1, 0x1, 231, 745, 495, 33, 1, 8 },
-  { 0x0, 0x0, 231, 746, 832, 0, 0, -1 },
-  { 0x1, 0x1, 231, 747, 507, 33, 1, 15 },
-  { 0x0, 0x0, 231, 748, 837, 0, 0, -1 },
-  { 0x0, 0x0, 231, 749, 841, 0, 0, -1 },
-  { 0x1, 0x1, 231, 750, 530, 33, 1, 17 },
-  { 0x1, 0x1, 231, 751, 534, 33, 1, 17 },
-  { 0x0, 0x0, 231, 752, 845, 0, 0, -1 },
-  { 0x0, 0x0, 231, 753, 849, 0, 0, -1 },
-  { 0x1, 0x1, 231, 754, 554, 33, 1, 18 },
-  { 0x8000001, 0x8000001, 231, 755, 558, 6, 1, 18 },
-  { 0x0, 0x0, 231, 756, 853, 0, 0, -1 },
-  { 0x1, 0x1, 231, 757, 570, 33, 1, 19 },
-  { 0x0, 0x0, 231, 758, 857, 0, 0, -1 },
-  { 0x0, 0x0, 231, 759, 861, 0, 0, -1 },
-  { 0x1, 0x1, 231, 760, 590, 33, 1, 20 },
-  { 0x8000001, 0x8000001, 231, 761, 594, 6, 1, 20 },
-  { 0x0, 0x0, 231, 762, 865, 0, 0, -1 },
-  { 0x1, 0x1, 231, 763, 606, 33, 1, 21 },
-  { 0x0, 0x0, 231, 764, 870, 0, 0, -1 },
-  { 0x0, 0x0, 231, 765, 874, 0, 0, -1 },
-  { 0x1, 0x1, 231, 766, 629, 33, 1, 17 },
-  { 0x1, 0x1, 231, 767, 633, 33, 1, 17 },
-  { 0x0, 0x0, 231, 768, 878, 0, 0, -1 },
-  { 0x1, 0x1, 231, 769, 645, 33, 1, 21 },
-  { 0x0, 0x0, 232, 2300, 815, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2301, 823, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2302, 819, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2303, 474, 0, 1, 6 },
-  { 0x1, 0x1, 232, 2304, 482, 6, 1, 7 },
-  { 0x0, 0x0, 232, 2305, 478, 0, 1, 6 },
-  { 0x0, 0x0, 232, 2306, 827, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2307, 494, 0, 1, 8 },
-  { 0x0, 0x0, 232, 2308, 831, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2309, 506, 0, 1, 15 },
-  { 0x0, 0x0, 232, 2310, 836, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2311, 840, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2312, 529, 0, 1, 17 },
-  { 0x0, 0x0, 232, 2313, 533, 0, 1, 17 },
-  { 0x0, 0x0, 232, 2314, 844, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2315, 848, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2316, 553, 0, 1, 18 },
-  { 0x1, 0x1, 232, 2317, 557, 6, 1, 18 },
-  { 0x0, 0x0, 232, 2318, 852, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2319, 569, 0, 1, 19 },
-  { 0x0, 0x0, 232, 2320, 856, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2321, 860, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2322, 589, 0, 1, 20 },
-  { 0x1, 0x1, 232, 2323, 593, 6, 1, 20 },
-  { 0x0, 0x0, 232, 2324, 864, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2325, 605, 0, 1, 21 },
-  { 0x0, 0x0, 232, 2326, 869, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2327, 873, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2328, 628, 0, 1, 17 },
-  { 0x0, 0x0, 232, 2329, 632, 0, 1, 17 },
-  { 0x0, 0x0, 232, 2330, 877, 0, 0, -1 },
-  { 0x0, 0x0, 232, 2331, 644, 0, 1, 21 },
-  { 0x1, 0x1, 232, 770, 964, 27, 1, 16 },
-  { 0x0, 0x0, 232, 771, 962, 0, 1, 16 },
-  { 0x0, 0x0, 232, 1012, 966, 0, 1, 22 },
-  { 0x0, 0x1, 232, 974, 972, 20, 1, 67 },
-  { 0x0, 0x0, 232, 108, 970, 0, 1, 67 },
-  { 0x1, 0x1, 235, -1, -1, 29, 1, 0 },
-  { 0x0, 0x0, 235, -1, -1, 0, 1, 0 },
-  { 0x1, 0x1, 235, 2472, -1, 27, 1, 0 },
-  { 0x1, 0x1, 235, 2473, -1, 27, 1, 0 },
-  { 0x1, 0x1, 235, 2474, -1, 27, 1, 0 },
-  { 0x1, 0x1, 235, 2475, -1, 27, 1, 0 },
-  { 0x0, 0x0, 256, -1, 1929, 0, 0, -1 },
-  { 0x0, 0x0, 256, -1, 1931, 0, 0, -1 },
-  { 0x1, 0x1, 256, -1, -1, 28, 1, 29 },
-  { 0x1, 0x1, 256, -1, -1, 28, 1, 29 },
-  { 0x0, 0x0, 256, -1, 1970, 0, 0, -1 },
-  { 0x0, 0x0, 256, -1, 1972, 0, 0, -1 },
-  { 0x1, 0x1, 256, -1, -1, 28, 1, 29 },
-  { 0x1, 0x1, 256, -1, -1, 28, 1, 29 },
-  { 0x0, 0x0, 258, 22, -1, 0, 1, 0 },
-  { 0x0, 0x0, 258, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 258, -1, -1, 0, 1, 0 },
-  { 0x0, 0x1, 258, -1, -1, 29, 1, 0 },
-  { 0x0, 0x1, 258, -1, -1, 29, 1, 0 },
-  { 0x0, 0x1, 258, -1, -1, 29, 1, 0 },
-  { 0x0, 0x1, 258, -1, -1, 29, 1, 0 },
-  { 0x0, 0x1, 258, -1, -1, 29, 1, 0 },
-  { 0x0, 0x0, 258, 176, -1, 0, 1, 0 },
-  { 0x0, 0x1, 258, -1, -1, 29, 1, 0 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 64 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 64 },
-  { 0x0, 0x0, 259, -1, 1905, 0, 0, -1 },
-  { 0x0, 0x0, 259, -1, 1907, 0, 0, -1 },
-  { 0x0, 0x0, 259, -1, 1909, 0, 0, -1 },
-  { 0x0, 0x0, 259, -1, 1911, 0, 0, -1 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 49 },
-  { 0x0, 0x0, 259, -1, 1913, 0, 0, -1 },
-  { 0x0, 0x0, 259, -1, 1915, 0, 0, -1 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x0, 0x0, 259, -1, 1917, 0, 0, -1 },
-  { 0x0, 0x0, 259, -1, 1919, 0, 0, -1 },
-  { 0x0, 0x0, 259, -1, 1921, 0, 0, -1 },
-  { 0x0, 0x0, 259, -1, 1923, 0, 0, -1 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 49 },
-  { 0x0, 0x0, 259, -1, 1925, 0, 0, -1 },
-  { 0x0, 0x0, 259, -1, 1927, 0, 0, -1 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, -1, -1, 12, 1, 59 },
-  { 0x1, 0x1, 259, 329, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, 387, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, 333, -1, 12, 1, 2 },
-  { 0x1, 0x1, 259, 391, -1, 12, 1, 2 },
-  { 0x0, 0x0, 260, -1, 1912, 0, 0, -1 },
-  { 0x9, 0x9, 260, -1, 2442, 33, 1, 49 },
-  { 0x0, 0x0, 260, 1162, 1961, 0, 0, -1 },
-  { 0x3, 0x3, 260, 1163, -1, 27, 1, 49 },
-  { 0x0, 0x0, 264, 2369, -1, 0, 1, 0 },
-  { 0x3, 0x3, 265, -1, -1, 27, 1, 0 },
-  { 0x3, 0x3, 265, -1, -1, 27, 1, 0 },
-  { 0x3, 0x3, 265, -1, -1, 27, 1, 0 },
-  { 0x3, 0x3, 265, -1, -1, 27, 1, 0 },
-  { 0x1, 0x1, 266, 2468, -1, 28, 1, 0 },
-  { 0x1, 0x1, 266, 2469, -1, 28, 1, 0 },
-  { 0x1, 0x1, 266, 2470, -1, 28, 1, 0 },
-  { 0x1, 0x1, 266, 2471, -1, 28, 1, 0 },
-  { 0x1, 0x1, 267, -1, -1, 27, 1, 93 },
-  { 0x1, 0x1, 267, -1, -1, 27, 1, 93 },
-  { 0x0, 0x0, 267, -1, 813, 0, 0, -1 },
-  { 0x0, 0x0, 268, 2481, 2346, 0, 0, -1 },
-  { 0x0, 0x0, 268, 2482, 2348, 0, 0, -1 },
-  { 0x0, 0x0, 269, -1, 2347, 0, 0, -1 },
-  { 0x0, 0x0, 269, -1, 2349, 0, 0, -1 },
-  { 0x0, 0x0, 270, -1, -1, 0, 1, 40 },
-  { 0x0, 0x0, 270, -1, -1, 0, 1, 40 },
-  { 0x0, 0x0, 275, -1, -1, 0, 1, 33 },
-  { 0x0, 0x0, 279, -1, 1935, 0, 1, 29 },
-  { 0x0, 0x0, 280, -1, -1, 0, 1, 0 },
-  { 0x0, 0x0, 280, -1, -1, 0, 1, 71 },
-  { 0x0, 0x0, 280, 1723, 2459, 0, 1, 1 },
-  { 0x0, 0x0, 280, -1, 388, 0, 0, -1 },
-  { 0x0, 0x0, 280, 1725, 2461, 0, 1, 1 },
-  { 0x0, 0x0, 280, -1, 392, 0, 0, -1 },
-};
-
-static const struct ia64_main_table
-main_table[] = {
-  { 5, 1, 1, 0x0000010000000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 0, },
-  { 5, 1, 1, 0x0000010008000000ull, 0x000001eff8000000ull, { 23, 24, 25, 3, 0 }, 0x0, 1, },
-  { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 23, 65, 26, 0, 0 }, 0x0, 2, },
-  { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 23, 62, 25, 0, 0 }, 0x0, 3, },
-  { 6, 1, 1, 0x0000012000000000ull, 0x000001e000000000ull, { 23, 65, 26, 0, 0 }, 0x0, 4, },
-  { 7, 1, 1, 0x0000010040000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 5, },
-  { 7, 1, 1, 0x0000010c00000000ull, 0x000001ee00000000ull, { 23, 62, 25, 0, 0 }, 0x0, 6, },
-  { 8, 1, 1, 0x0000010800000000ull, 0x000001ee00000000ull, { 23, 62, 25, 0, 0 }, 0x0, 7, },
-  { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 23, 2, 51, 52, 53 }, 0x221, 8, },
-  { 10, 1, 1, 0x0000010060000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 9, },
-  { 10, 1, 1, 0x0000010160000000ull, 0x000001eff8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 10, },
-  { 11, 1, 1, 0x0000010068000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 11, },
-  { 11, 1, 1, 0x0000010168000000ull, 0x000001eff8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 12, },
-  { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011ffull, { 15, 0, 0, 0, 0 }, 0x40, 814, },
-  { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 15, 0, 0, 0, 0 }, 0x0, 680, },
-  { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 15, 0, 0, 0, 0 }, 0x40, 681, },
-  { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 15, 0, 0, 0, 0 }, 0x200, 1843, },
-  { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 15, 0, 0, 0, 0 }, 0x240, 1844, },
-  { 14, 4, 1, 0x0000002000000000ull, 0x000001ee00001000ull, { 14, 15, 0, 0, 0 }, 0x0, 437, },
-  { 14, 4, 1, 0x0000002000000000ull, 0x000001ee00001000ull, { 14, 15, 0, 0, 0 }, 0x40, 438, },
-  { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011ffull, { 80, 0, 0, 0, 0 }, 0x40, 835, },
-  { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 80, 0, 0, 0, 0 }, 0x0, 682, },
-  { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 80, 0, 0, 0, 0 }, 0x40, 683, },
-  { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 80, 0, 0, 0, 0 }, 0x210, 2479, },
-  { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 80, 0, 0, 0, 0 }, 0x250, 2480, },
-  { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 80, 0, 0, 0, 0 }, 0x30, 445, },
-  { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 80, 0, 0, 0, 0 }, 0x70, 446, },
-  { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 80, 0, 0, 0, 0 }, 0x230, 443, },
-  { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 80, 0, 0, 0, 0 }, 0x270, 444, },
-  { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 14, 80, 0, 0, 0 }, 0x0, 439, },
-  { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 14, 80, 0, 0, 0 }, 0x40, 440, },
-  { 15, 4, 0, 0x0000000000000000ull, 0x000001e1f8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 393, },
-  { 15, 5, 0, 0x0000000000000000ull, 0x000001e3f8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 806, },
-  { 15, 2, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 64, 0, 0, 0, 0 }, 0x2, 949, },
-  { 15, 3, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 1038, },
-  { 15, 6, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 68, 0, 0, 0, 0 }, 0x0, 2483, },
-  { 15, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 64, 0, 0, 0, 0 }, 0x0, 15, },
-  { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011ffull, { 81, 0, 0, 0, 0 }, 0x40, 868, },
-  { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x0, 684, },
-  { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x40, 685, },
-  { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 14, 81, 0, 0, 0 }, 0x0, 441, },
-  { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 14, 81, 0, 0, 0 }, 0x40, 442, },
-  { 17, 4, 0, 0x0000004080000000ull, 0x000001e9f8000018ull, { 15, 76, 0, 0, 0 }, 0x20, 2365, },
-  { 17, 4, 0, 0x000000e000000000ull, 0x000001e800000018ull, { 80, 76, 0, 0, 0 }, 0x20, 2366, },
-  { 18, 4, 0, 0x0000000060000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x2c, 216, },
-  { 22, 2, 0, 0x0000000200000000ull, 0x000001ee00000000ull, { 24, 79, 0, 0, 0 }, 0x0, 1848, },
-  { 22, 3, 0, 0x0000000800000000ull, 0x000001ee00000000ull, { 23, 80, 0, 0, 0 }, 0x0, 218, },
-  { 22, 3, 0, 0x0000000c00000000ull, 0x000001ee00000000ull, { 17, 80, 0, 0, 0 }, 0x0, 219, },
-  { 22, 3, 0, 0x0000002200000000ull, 0x000001ee00000000ull, { 24, 79, 0, 0, 0 }, 0x0, 1849, },
-  { 22, 3, 0, 0x0000002600000000ull, 0x000001ee00000000ull, { 18, 79, 0, 0, 0 }, 0x0, 1850, },
-  { 22, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 79, 0, 0, 0 }, 0x0, 1851, },
-  { 25, 4, 0, 0x0000000020000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x224, 17, },
-  { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 21, 22, 24, 25, 0 }, 0x0, 1014, },
-  { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 21, 25, 24, 0 }, 0x0, 990, },
-  { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 21, 22, 25, 24, 0 }, 0x0, 918, },
-  { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 21, 24, 25, 0 }, 0x0, 897, },
-  { 26, 1, 2, 0x0000018200000000ull, 0x000001fe00001000ull, { 21, 22, 24, 25, 0 }, 0x40, 1146, },
-  { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 21, 22, 6, 25, 0 }, 0x0, 919, },
-  { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 21, 22, 25, 6, 0 }, 0x40, 1016, },
-  { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 21, 22, 6, 25, 0 }, 0x40, 993, },
-  { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 21, 22, 54, 25, 0 }, 0x0, 1018, },
-  { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 21, 22, 56, 25, 0 }, 0x0, 994, },
-  { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 21, 56, 25, 0 }, 0x0, 922, },
-  { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 21, 54, 25, 0 }, 0x0, 901, },
-  { 26, 1, 2, 0x0000018a00000000ull, 0x000001ee00001000ull, { 21, 22, 54, 25, 0 }, 0x40, 1149, },
-  { 26, 1, 2, 0x000001a800000000ull, 0x000001ee00001000ull, { 21, 22, 58, 25, 0 }, 0x0, 1009, },
-  { 26, 1, 2, 0x000001a800000000ull, 0x000001ee00001000ull, { 22, 21, 58, 25, 0 }, 0x0, 939, },
-  { 26, 1, 2, 0x000001c200000000ull, 0x000001fe00001000ull, { 22, 21, 24, 25, 0 }, 0x40, 1150, },
-  { 26, 1, 2, 0x000001d000000000ull, 0x000001fe00001000ull, { 22, 21, 6, 25, 0 }, 0x40, 995, },
-  { 26, 1, 2, 0x000001d000000000ull, 0x000001fe00001000ull, { 22, 21, 25, 6, 0 }, 0x40, 903, },
-  { 26, 1, 2, 0x000001ca00000000ull, 0x000001ee00001000ull, { 22, 21, 54, 25, 0 }, 0x40, 1151, },
-  { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 21, 22, 24, 25, 0 }, 0x0, 1021, },
-  { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 21, 25, 24, 0 }, 0x0, 997, },
-  { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 21, 22, 25, 24, 0 }, 0x0, 925, },
-  { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 21, 24, 25, 0 }, 0x0, 904, },
-  { 27, 1, 2, 0x0000018600000000ull, 0x000001fe00001000ull, { 21, 22, 24, 25, 0 }, 0x40, 1154, },
-  { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 21, 22, 6, 25, 0 }, 0x0, 926, },
-  { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 21, 22, 25, 6, 0 }, 0x40, 1023, },
-  { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 21, 22, 6, 25, 0 }, 0x40, 1000, },
-  { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 21, 22, 54, 25, 0 }, 0x0, 1025, },
-  { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 21, 22, 56, 25, 0 }, 0x0, 1001, },
-  { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 21, 56, 25, 0 }, 0x0, 929, },
-  { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 21, 54, 25, 0 }, 0x0, 908, },
-  { 27, 1, 2, 0x0000018e00000000ull, 0x000001ee00001000ull, { 21, 22, 54, 25, 0 }, 0x40, 1157, },
-  { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 21, 22, 55, 25, 0 }, 0x0, 1035, },
-  { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 21, 22, 57, 25, 0 }, 0x0, 1011, },
-  { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 22, 21, 57, 25, 0 }, 0x0, 941, },
-  { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 22, 21, 55, 25, 0 }, 0x0, 917, },
-  { 27, 1, 2, 0x000001c600000000ull, 0x000001fe00001000ull, { 22, 21, 24, 25, 0 }, 0x40, 1158, },
-  { 27, 1, 2, 0x000001d400000000ull, 0x000001fe00001000ull, { 22, 21, 6, 25, 0 }, 0x40, 1002, },
-  { 27, 1, 2, 0x000001d400000000ull, 0x000001fe00001000ull, { 22, 21, 25, 6, 0 }, 0x40, 910, },
-  { 27, 1, 2, 0x000001ce00000000ull, 0x000001ee00001000ull, { 22, 21, 54, 25, 0 }, 0x40, 1159, },
-  { 28, 3, 1, 0x0000008008000000ull, 0x000001fff8000000ull, { 23, 32, 24, 1, 0 }, 0x0, 251, },
-  { 29, 3, 1, 0x0000008048000000ull, 0x000001fff8000000ull, { 23, 32, 24, 1, 0 }, 0x0, 252, },
-  { 30, 3, 1, 0x0000008088000000ull, 0x000001fff8000000ull, { 23, 32, 24, 1, 0 }, 0x0, 253, },
-  { 31, 3, 1, 0x00000080c8000000ull, 0x000001fff8000000ull, { 23, 32, 24, 1, 0 }, 0x0, 254, },
-  { 33, 4, 0, 0x0000000010000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x224, 18, },
-  { 35, 2, 1, 0x00000000c0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 976, },
-  { 36, 2, 1, 0x00000000c8000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 977, },
-  { 38, 2, 1, 0x0000008000000000ull, 0x000001e000000000ull, { 23, 24, 25, 46, 71 }, 0x0, 19, },
-  { 38, 2, 1, 0x000000a600000000ull, 0x000001ee04000000ull, { 23, 24, 44, 72, 0 }, 0x0, 2487, },
-  { 38, 2, 1, 0x000000a604000000ull, 0x000001ee04000000ull, { 23, 54, 44, 72, 0 }, 0x0, 2488, },
-  { 38, 2, 1, 0x000000ae00000000ull, 0x000001ee00000000ull, { 23, 47, 25, 45, 72 }, 0x0, 20, },
-  { 42, 4, 0, 0x0000000080000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x20, 21, },
-  { 47, 2, 1, 0x000000a400000000ull, 0x000001ee00002000ull, { 23, 25, 75, 72, 0 }, 0x0, 2383, },
-  { 49, 5, 1, 0x0000000080000000ull, 0x000001e3f80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 23, },
-  { 50, 5, 1, 0x0000010008000000ull, 0x000001fff8000000ull, { 17, 19, 18, 0, 0 }, 0x40, 1900, },
-  { 51, 5, 1, 0x00000000b8000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1901, },
-  { 51, 5, 1, 0x00000000b8000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 25, },
-  { 52, 5, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1902, },
-  { 52, 5, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 26, },
-  { 53, 5, 1, 0x0000000160000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 27, },
-  { 54, 5, 1, 0x0000000168000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 28, },
-  { 56, 3, 0, 0x0000002180000000ull, 0x000001eff8000000ull, { 25, 0, 0, 0, 0 }, 0x0, 29, },
-  { 57, 5, 0, 0x0000000040000000ull, 0x000001eff8000000ull, { 78, 0, 0, 0, 0 }, 0x0, 1903, },
-  { 57, 5, 0, 0x0000000040000000ull, 0x000001eff8000000ull, { 78, 0, 0, 0, 0 }, 0x40, 30, },
-  { 58, 5, 2, 0x000000a000000000ull, 0x000001e000001000ull, { 21, 22, 18, 59, 0 }, 0x0, 1040, },
-  { 58, 5, 2, 0x000000a000000000ull, 0x000001e000001000ull, { 22, 21, 18, 59, 0 }, 0x40, 1179, },
-  { 59, 5, 0, 0x0000000028000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 1904, },
-  { 59, 5, 0, 0x0000000028000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x40, 31, },
-  { 60, 5, 2, 0x0000008000000000ull, 0x000001fe00001000ull, { 21, 22, 18, 19, 0 }, 0x0, 790, },
-  { 60, 5, 2, 0x0000008000000000ull, 0x000001fe00001000ull, { 21, 22, 18, 19, 0 }, 0x40, 791, },
-  { 60, 5, 2, 0x0000009000000000ull, 0x000001fe00001000ull, { 21, 22, 19, 18, 0 }, 0x0, 932, },
-  { 60, 5, 2, 0x0000009000000000ull, 0x000001fe00001000ull, { 21, 22, 19, 18, 0 }, 0x40, 933, },
-  { 60, 5, 2, 0x0000008000000000ull, 0x000001fe00001000ull, { 22, 21, 18, 19, 0 }, 0x0, 1160, },
-  { 60, 5, 2, 0x0000008000000000ull, 0x000001fe00001000ull, { 22, 21, 18, 19, 0 }, 0x40, 1161, },
-  { 60, 5, 2, 0x0000009000000000ull, 0x000001fe00001000ull, { 22, 21, 19, 18, 0 }, 0x0, 1167, },
-  { 60, 5, 2, 0x0000009000000000ull, 0x000001fe00001000ull, { 22, 21, 19, 18, 0 }, 0x40, 1168, },
-  { 61, 5, 1, 0x00000000c0000000ull, 0x000001eff8000000ull, { 17, 18, 0, 0, 0 }, 0x0, 887, },
-  { 61, 5, 1, 0x00000000c0000000ull, 0x000001eff8000000ull, { 17, 18, 0, 0, 0 }, 0x40, 888, },
-  { 61, 5, 1, 0x00000000e0000000ull, 0x000001e3f8000000ull, { 17, 18, 0, 0, 0 }, 0x0, 2485, },
-  { 61, 5, 1, 0x0000010008000000ull, 0x000001fff80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 2486, },
-  { 62, 3, 1, 0x0000008488000000ull, 0x000001fff8000000ull, { 23, 32, 70, 0, 0 }, 0x0, 255, },
-  { 63, 3, 1, 0x00000084c8000000ull, 0x000001fff8000000ull, { 23, 32, 70, 0, 0 }, 0x0, 256, },
-  { 66, 3, 0, 0x0000000060000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x21, 32, },
-  { 67, 5, 1, 0x0000010000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1938, },
-  { 67, 5, 1, 0x0000010000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 33, },
-  { 68, 5, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1939, },
-  { 68, 5, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 34, },
-  { 69, 5, 1, 0x0000000080000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1856, },
-  { 70, 5, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1940, },
-  { 70, 5, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 35, },
-  { 71, 5, 1, 0x00000001c8000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1013, },
-  { 72, 5, 1, 0x0000010000000000ull, 0x000001fc000fe000ull, { 17, 19, 20, 0, 0 }, 0x40, 1943, },
-  { 73, 5, 1, 0x0000014000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1946, },
-  { 73, 5, 1, 0x0000014000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 37, },
-  { 74, 5, 1, 0x0000000088000000ull, 0x000001e3f8000000ull, { 17, 19, 0, 0, 0 }, 0xc0, 38, },
-  { 75, 5, 1, 0x0000000088000000ull, 0x000001e3f80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 39, },
-  { 76, 5, 1, 0x0000018000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1949, },
-  { 76, 5, 1, 0x0000018000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 40, },
-  { 77, 5, 1, 0x0000018000000000ull, 0x000001fc000fe000ull, { 17, 19, 20, 0, 0 }, 0x40, 1952, },
-  { 78, 5, 1, 0x0000010008000000ull, 0x000001fff80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 1955, },
-  { 79, 5, 1, 0x0000000170000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 43, },
-  { 80, 5, 1, 0x0000002080000000ull, 0x000001e3f80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 44, },
-  { 81, 5, 1, 0x0000000140000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 45, },
-  { 82, 5, 1, 0x00000020b8000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1956, },
-  { 82, 5, 1, 0x00000020b8000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 46, },
-  { 83, 5, 1, 0x00000020b0000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1957, },
-  { 83, 5, 1, 0x00000020b0000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 47, },
-  { 84, 5, 1, 0x0000002180000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 792, },
-  { 84, 5, 1, 0x0000002180000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 793, },
-  { 84, 5, 1, 0x0000002188000000ull, 0x000001eff8000000ull, { 17, 19, 18, 0, 0 }, 0x40, 934, },
-  { 85, 5, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 17, 18, 0, 0, 0 }, 0x0, 889, },
-  { 85, 5, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 17, 18, 0, 0, 0 }, 0x40, 890, },
-  { 86, 5, 1, 0x0000013000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1974, },
-  { 86, 5, 1, 0x0000013000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 48, },
-  { 87, 5, 1, 0x00000020a8000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1975, },
-  { 87, 5, 1, 0x00000020a8000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 49, },
-  { 88, 5, 1, 0x0000002080000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1864, },
-  { 89, 5, 1, 0x00000020a0000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1976, },
-  { 89, 5, 1, 0x00000020a0000000ull, 0x000001eff8000000ull, { 17, 18, 19, 0, 0 }, 0x40, 50, },
-  { 90, 5, 1, 0x0000013000000000ull, 0x000001fc000fe000ull, { 17, 19, 20, 0, 0 }, 0x40, 1977, },
-  { 91, 5, 1, 0x0000017000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1978, },
-  { 91, 5, 1, 0x0000017000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 52, },
-  { 92, 5, 1, 0x0000002088000000ull, 0x000001e3f8000000ull, { 17, 19, 0, 0, 0 }, 0xc0, 53, },
-  { 93, 5, 1, 0x0000002088000000ull, 0x000001e3f80fe000ull, { 17, 19, 0, 0, 0 }, 0x40, 54, },
-  { 94, 5, 1, 0x000001b000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 1979, },
-  { 94, 5, 1, 0x000001b000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 55, },
-  { 95, 5, 1, 0x000001b000000000ull, 0x000001fc000fe000ull, { 17, 19, 20, 0, 0 }, 0x40, 1980, },
-  { 96, 5, 2, 0x0000002200000000ull, 0x000001fe00000000ull, { 17, 22, 18, 19, 0 }, 0x0, 1981, },
-  { 96, 5, 2, 0x0000002200000000ull, 0x000001fe00000000ull, { 17, 22, 18, 19, 0 }, 0x40, 57, },
-  { 97, 5, 2, 0x0000003200000000ull, 0x000001fe00000000ull, { 17, 22, 19, 0, 0 }, 0x0, 1982, },
-  { 97, 5, 2, 0x0000003200000000ull, 0x000001fe00000000ull, { 17, 22, 19, 0, 0 }, 0x40, 58, },
-  { 98, 5, 2, 0x0000000200000000ull, 0x000001fe00000000ull, { 17, 22, 18, 19, 0 }, 0x0, 1983, },
-  { 98, 5, 2, 0x0000000200000000ull, 0x000001fe00000000ull, { 17, 22, 18, 19, 0 }, 0x40, 59, },
-  { 99, 5, 2, 0x0000001200000000ull, 0x000001fe00000000ull, { 17, 22, 19, 0, 0 }, 0x0, 1984, },
-  { 99, 5, 2, 0x0000001200000000ull, 0x000001fe00000000ull, { 17, 22, 19, 0, 0 }, 0x40, 60, },
-  { 100, 5, 1, 0x000001c000000000ull, 0x000001f000000000ull, { 17, 19, 20, 18, 0 }, 0x0, 61, },
-  { 101, 5, 0, 0x0000000020000000ull, 0x000001eff8000000ull, { 49, 50, 0, 0, 0 }, 0x0, 1985, },
-  { 101, 5, 0, 0x0000000020000000ull, 0x000001eff8000000ull, { 49, 50, 0, 0, 0 }, 0x40, 62, },
-  { 102, 5, 1, 0x0000014008000000ull, 0x000001fff8000000ull, { 17, 19, 18, 0, 0 }, 0x40, 1988, },
-  { 103, 5, 1, 0x00000001a0000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 64, },
-  { 104, 5, 1, 0x00000001e0000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 1819, },
-  { 105, 3, 0, 0x0000000100000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 65, },
-  { 107, 5, 1, 0x0000000178000000ull, 0x000001e3f8000000ull, { 17, 18, 19, 0, 0 }, 0x0, 66, },
-  { 112, 3, 1, 0x0000008708000000ull, 0x000001ffc8000000ull, { 23, 18, 0, 0, 0 }, 0x0, 2294, },
-  { 121, 3, 0, 0x0000000080000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 67, },
-  { 121, 3, 0, 0x0000000090000000ull, 0x000001eff8000000ull, { 23, 0, 0, 0, 0 }, 0x0, 775, },
-  { 121, 3, 0, 0x0000000098000000ull, 0x000001eff8000000ull, { 17, 0, 0, 0, 0 }, 0x0, 776, },
-  { 122, 3, 0, 0x0000002170000000ull, 0x000001eff8000000ull, { 24, 0, 0, 0, 0 }, 0xc, 701, },
-  { 123, 3, 1, 0x0000002070000000ull, 0x000001eff8000000ull, { 29, 24, 0, 0, 0 }, 0x8, 702, },
-  { 123, 3, 1, 0x0000002078000000ull, 0x000001eff8000000ull, { 30, 24, 0, 0, 0 }, 0x8, 952, },
-  { 125, 3, 1, 0x0000008000000000ull, 0x000001fff8000000ull, { 23, 32, 0, 0, 0 }, 0x0, 68, },
-  { 125, 3, 1, 0x0000009000000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x400, 69, },
-  { 125, 3, 1, 0x000000a000000000ull, 0x000001eff0000000ull, { 23, 32, 61, 0, 0 }, 0x400, 70, },
-  { 126, 3, 1, 0x0000008040000000ull, 0x000001fff8000000ull, { 23, 32, 0, 0, 0 }, 0x0, 71, },
-  { 126, 3, 1, 0x0000009040000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x400, 72, },
-  { 126, 3, 1, 0x000000a040000000ull, 0x000001eff0000000ull, { 23, 32, 61, 0, 0 }, 0x400, 73, },
-  { 127, 3, 1, 0x0000008080000000ull, 0x000001fff8000000ull, { 23, 32, 0, 0, 0 }, 0x0, 74, },
-  { 127, 3, 1, 0x0000009080000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x400, 75, },
-  { 127, 3, 1, 0x000000a080000000ull, 0x000001eff0000000ull, { 23, 32, 61, 0, 0 }, 0x400, 76, },
-  { 128, 3, 1, 0x00000080c0000000ull, 0x000001fff8000000ull, { 23, 32, 0, 0, 0 }, 0x0, 77, },
-  { 128, 3, 1, 0x00000090c0000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x400, 78, },
-  { 128, 3, 1, 0x000000a0c0000000ull, 0x000001eff0000000ull, { 23, 32, 61, 0, 0 }, 0x400, 79, },
-  { 129, 3, 1, 0x000000c6c0000000ull, 0x000001fff8000000ull, { 17, 32, 0, 0, 0 }, 0x0, 884, },
-  { 129, 3, 1, 0x000000d6c0000000ull, 0x000001fff8000000ull, { 17, 32, 24, 0, 0 }, 0x400, 885, },
-  { 129, 3, 1, 0x000000e6c0000000ull, 0x000001eff0000000ull, { 17, 32, 61, 0, 0 }, 0x400, 886, },
-  { 130, 3, 1, 0x000000c040000000ull, 0x000001fff8000000ull, { 17, 32, 0, 0, 0 }, 0x0, 80, },
-  { 130, 3, 1, 0x000000d040000000ull, 0x000001fff8000000ull, { 17, 32, 24, 0, 0 }, 0x400, 81, },
-  { 130, 3, 1, 0x000000e040000000ull, 0x000001eff0000000ull, { 17, 32, 61, 0, 0 }, 0x400, 82, },
-  { 131, 3, 1, 0x000000c0c0000000ull, 0x000001fff8000000ull, { 17, 32, 0, 0, 0 }, 0x0, 83, },
-  { 131, 3, 1, 0x000000d0c0000000ull, 0x000001fff8000000ull, { 17, 32, 24, 0, 0 }, 0x400, 84, },
-  { 131, 3, 1, 0x000000e0c0000000ull, 0x000001eff0000000ull, { 17, 32, 61, 0, 0 }, 0x400, 85, },
-  { 132, 3, 1, 0x000000c000000000ull, 0x000001fff8000000ull, { 17, 32, 0, 0, 0 }, 0x0, 86, },
-  { 132, 3, 1, 0x000000d000000000ull, 0x000001fff8000000ull, { 17, 32, 24, 0, 0 }, 0x400, 87, },
-  { 132, 3, 1, 0x000000e000000000ull, 0x000001eff0000000ull, { 17, 32, 61, 0, 0 }, 0x400, 88, },
-  { 133, 3, 2, 0x000000c048000000ull, 0x000001fff8000000ull, { 17, 18, 32, 0, 0 }, 0x0, 89, },
-  { 133, 3, 2, 0x000000d048000000ull, 0x000001fff8000000ull, { 17, 18, 32, 5, 0 }, 0x400, 90, },
-  { 134, 3, 2, 0x000000c0c8000000ull, 0x000001fff8000000ull, { 17, 18, 32, 0, 0 }, 0x0, 91, },
-  { 134, 3, 2, 0x000000d0c8000000ull, 0x000001fff8000000ull, { 17, 18, 32, 5, 0 }, 0x400, 92, },
-  { 135, 3, 2, 0x000000c088000000ull, 0x000001fff8000000ull, { 17, 18, 32, 0, 0 }, 0x0, 93, },
-  { 135, 3, 2, 0x000000d088000000ull, 0x000001fff8000000ull, { 17, 18, 32, 4, 0 }, 0x400, 94, },
-  { 136, 3, 1, 0x000000c080000000ull, 0x000001fff8000000ull, { 17, 32, 0, 0, 0 }, 0x0, 95, },
-  { 136, 3, 1, 0x000000d080000000ull, 0x000001fff8000000ull, { 17, 32, 24, 0, 0 }, 0x400, 96, },
-  { 136, 3, 1, 0x000000e080000000ull, 0x000001eff0000000ull, { 17, 32, 61, 0, 0 }, 0x400, 97, },
-  { 139, 3, 0, 0x000000cb00000000ull, 0x000001fff8000000ull, { 32, 0, 0, 0, 0 }, 0x0, 98, },
-  { 139, 3, 0, 0x000000db00000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x400, 99, },
-  { 139, 3, 0, 0x000000eb00000000ull, 0x000001eff0000000ull, { 32, 61, 0, 0, 0 }, 0x400, 100, },
-  { 140, 3, 0, 0x0000000050000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x21, 101, },
-  { 148, 3, 0, 0x0000000110000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 102, },
-  { 149, 2, 1, 0x000000e880000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 1820, },
-  { 150, 2, 1, 0x000000ea80000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 1821, },
-  { 151, 2, 1, 0x000000f880000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 1822, },
-  { 152, 1, 1, 0x0000010800000000ull, 0x000001fff80fe000ull, { 23, 25, 0, 0, 0 }, 0x0, 103, },
-  { 152, 1, 1, 0x0000010800000000ull, 0x000001ee07f00000ull, { 23, 62, 0, 0, 0 }, 0x40, 104, },
-  { 152, 1, 1, 0x0000012000000000ull, 0x000001e000300000ull, { 23, 65, 0, 0, 0 }, 0x40, 105, },
-  { 152, 5, 1, 0x0000000080000000ull, 0x000001e3f8000000ull, { 17, 19, 0, 0, 0 }, 0xc0, 106, },
-  { 152, 2, 1, 0x0000000e00100000ull, 0x000001ee00f00000ull, { 14, 24, 0, 0, 0 }, 0x40, 107, },
-  { 152, 2, 1, 0x0000000e00000000ull, 0x000001ee00f00000ull, { 14, 24, 77, 0, 0 }, 0x0, 2368, },
-  { 152, 2, 1, 0x0000000188000000ull, 0x000001eff8000000ull, { 23, 15, 0, 0, 0 }, 0x0, 109, },
-  { 152, 2, 1, 0x0000000600000000ull, 0x000001ee00000000ull, { 8, 24, 63, 0, 0 }, 0x0, 110, },
-  { 152, 2, 1, 0x0000000400000000ull, 0x000001ee00000000ull, { 9, 67, 0, 0, 0 }, 0x0, 111, },
-  { 152, 2, 1, 0x0000000180000000ull, 0x000001eff8000000ull, { 23, 7, 0, 0, 0 }, 0x0, 112, },
-  { 152, 2, 1, 0x0000000198000000ull, 0x000001eff8000000ull, { 23, 8, 0, 0, 0 }, 0x0, 113, },
-  { 152, 2, 1, 0x0000000150000000ull, 0x000001eff8000000ull, { 13, 24, 0, 0, 0 }, 0x0, 953, },
-  { 152, 2, 1, 0x0000000050000000ull, 0x000001eff8000000ull, { 13, 54, 0, 0, 0 }, 0x0, 954, },
-  { 152, 2, 1, 0x0000000190000000ull, 0x000001eff8000000ull, { 23, 13, 0, 0, 0 }, 0x0, 955, },
-  { 152, 3, 1, 0x0000000140000000ull, 0x000001eff8000000ull, { 13, 54, 0, 0, 0 }, 0x0, 1041, },
-  { 152, 3, 1, 0x0000002150000000ull, 0x000001eff8000000ull, { 13, 24, 0, 0, 0 }, 0x0, 1042, },
-  { 152, 3, 1, 0x0000002110000000ull, 0x000001eff8000000ull, { 23, 13, 0, 0, 0 }, 0x0, 1043, },
-  { 152, 3, 1, 0x0000002160000000ull, 0x000001eff8000000ull, { 16, 24, 0, 0, 0 }, 0x8, 114, },
-  { 152, 3, 1, 0x0000002120000000ull, 0x000001eff8000000ull, { 23, 16, 0, 0, 0 }, 0x8, 115, },
-  { 152, 3, 1, 0x0000002168000000ull, 0x000001eff8000000ull, { 11, 24, 0, 0, 0 }, 0x8, 116, },
-  { 152, 3, 1, 0x0000002148000000ull, 0x000001eff8000000ull, { 12, 24, 0, 0, 0 }, 0x0, 117, },
-  { 152, 3, 1, 0x0000002128000000ull, 0x000001eff8000000ull, { 23, 10, 0, 0, 0 }, 0x8, 118, },
-  { 152, 3, 1, 0x0000002108000000ull, 0x000001eff8000000ull, { 23, 12, 0, 0, 0 }, 0x0, 119, },
-  { 152, 3, 1, 0x0000002000000000ull, 0x000001eff8000000ull, { 37, 24, 0, 0, 0 }, 0x8, 120, },
-  { 152, 3, 1, 0x0000002008000000ull, 0x000001eff8000000ull, { 28, 24, 0, 0, 0 }, 0x8, 121, },
-  { 152, 3, 1, 0x0000002010000000ull, 0x000001eff8000000ull, { 31, 24, 0, 0, 0 }, 0x8, 122, },
-  { 152, 3, 1, 0x0000002018000000ull, 0x000001eff8000000ull, { 34, 24, 0, 0, 0 }, 0x8, 123, },
-  { 152, 3, 1, 0x0000002020000000ull, 0x000001eff8000000ull, { 35, 24, 0, 0, 0 }, 0x8, 124, },
-  { 152, 3, 1, 0x0000002028000000ull, 0x000001eff8000000ull, { 36, 24, 0, 0, 0 }, 0x8, 125, },
-  { 152, 3, 1, 0x0000002030000000ull, 0x000001eff8000000ull, { 33, 24, 0, 0, 0 }, 0x8, 126, },
-  { 152, 3, 1, 0x0000002080000000ull, 0x000001eff8000000ull, { 23, 37, 0, 0, 0 }, 0x8, 127, },
-  { 152, 3, 1, 0x0000002088000000ull, 0x000001eff8000000ull, { 23, 28, 0, 0, 0 }, 0x8, 128, },
-  { 152, 3, 1, 0x0000002090000000ull, 0x000001eff8000000ull, { 23, 31, 0, 0, 0 }, 0x8, 129, },
-  { 152, 3, 1, 0x0000002098000000ull, 0x000001eff8000000ull, { 23, 34, 0, 0, 0 }, 0x8, 130, },
-  { 152, 3, 1, 0x00000020a0000000ull, 0x000001eff8000000ull, { 23, 35, 0, 0, 0 }, 0x8, 131, },
-  { 152, 3, 1, 0x00000020a8000000ull, 0x000001eff8000000ull, { 23, 36, 0, 0, 0 }, 0x0, 132, },
-  { 152, 3, 1, 0x00000020b0000000ull, 0x000001eff8000000ull, { 23, 33, 0, 0, 0 }, 0x8, 133, },
-  { 152, 3, 1, 0x00000020b8000000ull, 0x000001eff8000000ull, { 23, 27, 0, 0, 0 }, 0x0, 134, },
-  { 152, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 23, 13, 0, 0, 0 }, 0x0, 135, },
-  { 152, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 13, 54, 0, 0, 0 }, 0x0, 136, },
-  { 152, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 13, 24, 0, 0, 0 }, 0x0, 137, },
-  { 153, 6, 1, 0x000000c000000000ull, 0x000001e000100000ull, { 23, 69, 0, 0, 0 }, 0x0, 138, },
-  { 154, 2, 1, 0x000000eca0000000ull, 0x000001fff0000000ull, { 23, 24, 73, 0, 0 }, 0x0, 139, },
-  { 155, 2, 1, 0x000000eea0000000ull, 0x000001fff0000000ull, { 23, 24, 74, 0, 0 }, 0x0, 140, },
-  { 165, 4, 0, 0x0000004000000000ull, 0x000001e1f8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 394, },
-  { 165, 5, 0, 0x0000000008000000ull, 0x000001e3f8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 807, },
-  { 165, 2, 0, 0x0000000008000000ull, 0x000001eff8000000ull, { 64, 0, 0, 0, 0 }, 0x2, 956, },
-  { 165, 3, 0, 0x0000000008000000ull, 0x000001eff8000000ull, { 64, 0, 0, 0, 0 }, 0x0, 1044, },
-  { 165, 6, 0, 0x0000000008000000ull, 0x000001eff8000000ull, { 68, 0, 0, 0, 0 }, 0x0, 2484, },
-  { 165, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 64, 0, 0, 0, 0 }, 0x0, 141, },
-  { 172, 1, 1, 0x0000010070000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 142, },
-  { 172, 1, 1, 0x0000010170000000ull, 0x000001eff8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 143, },
-  { 175, 2, 1, 0x000000ea00000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 2467, },
-  { 176, 2, 1, 0x000000f820000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 2370, },
-  { 177, 1, 1, 0x0000010400000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 144, },
-  { 178, 1, 1, 0x0000010600000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 145, },
-  { 179, 1, 1, 0x0000011400000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 146, },
-  { 180, 1, 1, 0x0000010450000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 147, },
-  { 181, 1, 1, 0x0000010650000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 148, },
-  { 182, 1, 1, 0x0000010470000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 149, },
-  { 183, 1, 1, 0x0000010670000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 150, },
-  { 184, 1, 1, 0x0000010520000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 794, },
-  { 185, 1, 1, 0x0000010720000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 795, },
-  { 186, 1, 1, 0x0000011520000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 796, },
-  { 187, 2, 1, 0x000000e850000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 2384, },
-  { 188, 2, 1, 0x000000ea70000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 151, },
-  { 189, 2, 1, 0x000000e810000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 2385, },
-  { 190, 2, 1, 0x000000ea30000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 152, },
-  { 191, 2, 1, 0x000000ead0000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 1823, },
-  { 192, 2, 1, 0x000000e230000000ull, 0x000001ff30000000ull, { 23, 24, 25, 41, 0 }, 0x0, 153, },
-  { 193, 2, 1, 0x000000e690000000ull, 0x000001fff0000000ull, { 23, 25, 0, 0, 0 }, 0x0, 154, },
-  { 195, 3, 1, 0x00000021c0000000ull, 0x000001eff8000000ull, { 23, 25, 24, 0, 0 }, 0x0, 1824, },
-  { 195, 3, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 23, 25, 48, 0, 0 }, 0x0, 1825, },
-  { 195, 3, 0, 0x0000002188000000ull, 0x000001eff8000000ull, { 25, 48, 0, 0, 0 }, 0x0, 1847, },
-  { 196, 2, 1, 0x000000e8b0000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 155, },
-  { 197, 2, 1, 0x000000e240000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 156, },
-  { 197, 2, 1, 0x000000ee50000000ull, 0x000001fff0000000ull, { 23, 24, 38, 0, 0 }, 0x0, 157, },
-  { 198, 2, 1, 0x000000f040000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 158, },
-  { 198, 2, 1, 0x000000fc50000000ull, 0x000001fff0000000ull, { 23, 24, 38, 0, 0 }, 0x0, 159, },
-  { 199, 1, 1, 0x0000010680000000ull, 0x000001ffe0000000ull, { 23, 24, 40, 25, 0 }, 0x0, 160, },
-  { 200, 2, 1, 0x000000e220000000ull, 0x000001fff0000000ull, { 23, 25, 24, 0, 0 }, 0x0, 161, },
-  { 200, 2, 1, 0x000000e630000000ull, 0x000001fff0000000ull, { 23, 25, 42, 0, 0 }, 0x0, 162, },
-  { 201, 2, 1, 0x000000f020000000ull, 0x000001fff0000000ull, { 23, 25, 24, 0, 0 }, 0x0, 163, },
-  { 201, 2, 1, 0x000000f430000000ull, 0x000001fff0000000ull, { 23, 25, 42, 0, 0 }, 0x0, 164, },
-  { 202, 1, 1, 0x00000106c0000000ull, 0x000001ffe0000000ull, { 23, 24, 40, 25, 0 }, 0x0, 165, },
-  { 203, 1, 1, 0x0000010420000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 166, },
-  { 204, 1, 1, 0x0000010620000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 167, },
-  { 205, 1, 1, 0x0000011420000000ull, 0x000001fff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 168, },
-  { 206, 3, 0, 0x0000002048000000ull, 0x000001eff8000000ull, { 25, 24, 0, 0, 0 }, 0x8, 984, },
-  { 206, 3, 0, 0x0000002050000000ull, 0x000001eff8000000ull, { 25, 24, 0, 0, 0 }, 0xc, 895, },
-  { 206, 3, 0, 0x00000021a0000000ull, 0x000001eff8000000ull, { 25, 0, 0, 0, 0 }, 0x8, 777, },
-  { 207, 3, 0, 0x0000002060000000ull, 0x000001eff8000000ull, { 25, 24, 0, 0, 0 }, 0x8, 703, },
-  { 212, 4, 0, 0x0000000040000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x22c, 169, },
-  { 213, 3, 0, 0x0000000038000000ull, 0x000001ee78000000ull, { 66, 0, 0, 0, 0 }, 0x8, 170, },
-  { 214, 3, 0, 0x0000000028000000ull, 0x000001ee78000000ull, { 66, 0, 0, 0, 0 }, 0x0, 171, },
-  { 223, 3, 1, 0x000000c708000000ull, 0x000001ffc8000000ull, { 17, 24, 0, 0, 0 }, 0x0, 2295, },
-  { 224, 2, 1, 0x000000a600000000ull, 0x000001ee04000000ull, { 23, 24, 44, 0, 0 }, 0x140, 172, },
-  { 224, 2, 1, 0x000000f240000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 173, },
-  { 225, 1, 1, 0x0000010080000000ull, 0x000001efe0000000ull, { 23, 24, 39, 25, 0 }, 0x0, 174, },
-  { 226, 1, 1, 0x00000100c0000000ull, 0x000001efe0000000ull, { 23, 24, 39, 25, 0 }, 0x0, 175, },
-  { 227, 2, 1, 0x000000a400000000ull, 0x000001ee00002000ull, { 23, 25, 75, 0, 0 }, 0x140, 2391, },
-  { 227, 2, 1, 0x000000f220000000ull, 0x000001fff0000000ull, { 23, 25, 24, 0, 0 }, 0x0, 177, },
-  { 228, 2, 1, 0x000000ac00000000ull, 0x000001ee00000000ull, { 23, 24, 25, 43, 0 }, 0x0, 178, },
-  { 233, 3, 0, 0x0000000180000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 705, },
-  { 234, 3, 0, 0x0000000030000000ull, 0x000001ee78000000ull, { 66, 0, 0, 0, 0 }, 0x8, 179, },
-  { 236, 3, 1, 0x0000008c00000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x0, 180, },
-  { 236, 3, 1, 0x000000ac00000000ull, 0x000001eff0000000ull, { 32, 24, 60, 0, 0 }, 0x400, 181, },
-  { 237, 3, 1, 0x0000008c40000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x0, 182, },
-  { 237, 3, 1, 0x000000ac40000000ull, 0x000001eff0000000ull, { 32, 24, 60, 0, 0 }, 0x400, 183, },
-  { 238, 3, 1, 0x0000008c80000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x0, 184, },
-  { 238, 3, 1, 0x000000ac80000000ull, 0x000001eff0000000ull, { 32, 24, 60, 0, 0 }, 0x400, 185, },
-  { 239, 3, 1, 0x0000008cc0000000ull, 0x000001fff8000000ull, { 32, 24, 0, 0, 0 }, 0x0, 186, },
-  { 239, 3, 1, 0x000000acc0000000ull, 0x000001eff0000000ull, { 32, 24, 60, 0, 0 }, 0x400, 187, },
-  { 240, 3, 1, 0x000000cec0000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 2298, },
-  { 240, 3, 1, 0x000000eec0000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 2299, },
-  { 241, 3, 1, 0x000000cc40000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 188, },
-  { 241, 3, 1, 0x000000ec40000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 189, },
-  { 242, 3, 1, 0x000000ccc0000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 190, },
-  { 242, 3, 1, 0x000000ecc0000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 191, },
-  { 243, 3, 1, 0x000000cc00000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 192, },
-  { 243, 3, 1, 0x000000ec00000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 193, },
-  { 244, 3, 1, 0x000000cc80000000ull, 0x000001fff8000000ull, { 32, 18, 0, 0, 0 }, 0x0, 194, },
-  { 244, 3, 1, 0x000000ec80000000ull, 0x000001eff0000000ull, { 32, 18, 60, 0, 0 }, 0x400, 195, },
-  { 245, 1, 1, 0x0000010028000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 196, },
-  { 245, 1, 1, 0x0000010020000000ull, 0x000001eff8000000ull, { 23, 24, 25, 3, 0 }, 0x0, 197, },
-  { 245, 1, 1, 0x0000010128000000ull, 0x000001eff8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 198, },
-  { 246, 3, 0, 0x0000000020000000ull, 0x000001ee78000000ull, { 66, 0, 0, 0, 0 }, 0x0, 199, },
-  { 247, 2, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 200, },
-  { 248, 2, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 201, },
-  { 249, 2, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 202, },
-  { 250, 3, 0, 0x0000000198000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 959, },
-  { 251, 3, 1, 0x00000020f8000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x8, 203, },
-  { 252, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 21, 22, 25, 75, 0 }, 0x0, 2489, },
-  { 252, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 21, 25, 75, 0 }, 0x40, 1724, },
-  { 253, 3, 1, 0x00000020d0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 204, },
-  { 254, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 21, 22, 25, 0, 0 }, 0x0, 2491, },
-  { 254, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 21, 25, 0, 0 }, 0x40, 1726, },
-  { 255, 3, 1, 0x00000020f0000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x8, 205, },
-  { 257, 3, 1, 0x00000020d8000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 206, },
-  { 261, 2, 1, 0x000000e840000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 942, },
-  { 262, 2, 1, 0x000000ea40000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 943, },
-  { 263, 2, 1, 0x000000f840000000ull, 0x000001fff0000000ull, { 23, 24, 25, 0, 0 }, 0x0, 944, },
-  { 271, 3, 1, 0x0000008208000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x0, 207, },
-  { 272, 3, 1, 0x0000008248000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x0, 208, },
-  { 273, 3, 1, 0x0000008288000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x0, 209, },
-  { 274, 3, 1, 0x00000082c8000000ull, 0x000001fff8000000ull, { 23, 32, 24, 0, 0 }, 0x0, 210, },
-  { 276, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x0, 988, },
-  { 276, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 17, 19, 20, 18, 0 }, 0x40, 1036, },
-  { 277, 5, 1, 0x000001d000000000ull, 0x000001fc000fe000ull, { 17, 19, 20, 0, 0 }, 0x40, 989, },
-  { 278, 1, 1, 0x0000010078000000ull, 0x000001eff8000000ull, { 23, 24, 25, 0, 0 }, 0x0, 211, },
-  { 278, 1, 1, 0x0000010178000000ull, 0x000001eff8000000ull, { 23, 54, 25, 0, 0 }, 0x0, 212, },
-  { 281, 2, 1, 0x0000000080000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 213, },
-  { 282, 2, 1, 0x0000000088000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 214, },
-  { 283, 2, 1, 0x0000000090000000ull, 0x000001eff8000000ull, { 23, 25, 0, 0, 0 }, 0x0, 215, },
-};
-
-static const char dis_table[] = {
-0xa0, 0xc2, 0x60, 0xa0, 0x2c, 0x80, 0xa0, 0x2a, 0x80, 0xa0, 0x1a, 0x70, 
-0x98, 0xb0, 0x01, 0x40, 0x90, 0x50, 0x90, 0x28, 0x24, 0x31, 0x48, 0x24, 
-0x31, 0x40, 0x90, 0x28, 0x24, 0x31, 0x38, 0x24, 0x31, 0x30, 0x90, 0x50, 
-0x90, 0x28, 0x24, 0x31, 0x20, 0x24, 0x31, 0x18, 0x90, 0x28, 0x24, 0x31, 
-0x10, 0x24, 0x31, 0x08, 0xa8, 0x0b, 0x28, 0x15, 0x00, 0x97, 0x00, 0x95, 
-0xa8, 0x9a, 0x98, 0x05, 0x18, 0x90, 0xf8, 0x90, 0x80, 0x90, 0x40, 0x80, 
-0xa4, 0x21, 0x18, 0x34, 0x26, 0x80, 0xa4, 0x2e, 0xc0, 0x35, 0xdd, 0x90, 
-0x50, 0x90, 0x28, 0x80, 0x35, 0xd3, 0x80, 0x34, 0x0a, 0x81, 0x33, 0xa6, 
-0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x20, 0x30, 0x34, 0x07, 0xa4, 
-0x1d, 0x28, 0x34, 0x04, 0x90, 0x38, 0xa4, 0x30, 0xc0, 0x36, 0x1e, 0xa4, 
-0x30, 0x68, 0x36, 0x12, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x2f, 0x40, 0x35, 
-0xf3, 0xa4, 0x2f, 0x18, 0x35, 0xee, 0x80, 0xa4, 0x20, 0x10, 0x34, 0x03, 
-0x92, 0x18, 0x91, 0xc0, 0x80, 0x91, 0x80, 0x90, 0xf8, 0xdb, 0x84, 0x60, 
-0xea, 0x40, 0xc0, 0xc0, 0x80, 0xa4, 0x3a, 0x70, 0x8c, 0x3b, 0xd0, 0x84, 
-0x37, 0x84, 0xc0, 0xc0, 0x80, 0xa4, 0x3a, 0x60, 0x8c, 0x3b, 0xb0, 0x84, 
-0x37, 0x82, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x37, 0x36, 0x50, 
-0xc0, 0xc0, 0x81, 0x37, 0x34, 0xa4, 0x1d, 0x38, 0x33, 0xa8, 0x80, 0x90, 
-0x28, 0x80, 0x33, 0xa4, 0x80, 0x34, 0x0c, 0x81, 0x90, 0x38, 0xa4, 0x20, 
-0x98, 0x34, 0x0f, 0xa4, 0x20, 0x68, 0x34, 0x09, 0xc0, 0x40, 0x10, 0x10, 
-0x90, 0x38, 0xa4, 0x1d, 0x10, 0x33, 0xa3, 0xa4, 0x1d, 0x00, 0x33, 0xa1, 
-0x18, 0x24, 0x21, 0x10, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 
-0x80, 0xa4, 0x3a, 0x40, 0x37, 0x6e, 0xc0, 0xc0, 0x80, 0xa4, 0x3a, 0x30, 
-0x37, 0x6a, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x37, 0x30, 0x50, 
-0xc0, 0xc0, 0x81, 0x37, 0x2e, 0x92, 0xb8, 0x99, 0x84, 0x20, 0x88, 0x90, 
-0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x2e, 0xb8, 0x35, 0xdc, 0x82, 
-0x35, 0xd2, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x30, 0xb8, 0x36, 
-0x1d, 0xa4, 0x30, 0x60, 0x36, 0x11, 0x80, 0x90, 0x38, 0xa4, 0x2f, 0x38, 
-0x35, 0xf2, 0xa4, 0x2f, 0x10, 0x35, 0xed, 0x83, 0x90, 0xa8, 0xd3, 0x82, 
-0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x3a, 0x10, 0x37, 0x62, 0xc0, 0xc0, 0x80, 
-0xa4, 0x3a, 0x00, 0x37, 0x5e, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 
-0x37, 0x2a, 0x50, 0xc0, 0xc0, 0x81, 0x37, 0x28, 0x18, 0x24, 0x20, 0x90, 
-0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x39, 0xe0, 
-0x37, 0x56, 0xc0, 0xc0, 0x80, 0xa4, 0x39, 0xd0, 0x37, 0x52, 0xd3, 0x82, 
-0x40, 0x50, 0xc0, 0xc0, 0x81, 0x37, 0x24, 0x50, 0xc0, 0xc0, 0x81, 0x37, 
-0x22, 0x94, 0x50, 0x92, 0xf8, 0x99, 0x84, 0x1d, 0x68, 0x90, 0x78, 0x90, 
-0x50, 0x10, 0x10, 0x80, 0xa4, 0x2e, 0xb0, 0x35, 0xdb, 0x82, 0x35, 0xd1, 
-0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x30, 0xb0, 0x36, 0x1c, 0xa4, 
-0x30, 0x58, 0x36, 0x10, 0x80, 0x90, 0x38, 0xa4, 0x2f, 0x30, 0x35, 0xf1, 
-0xa4, 0x2f, 0x08, 0x35, 0xec, 0x83, 0x90, 0xe8, 0xd3, 0x83, 0xc0, 0xc0, 
-0xc0, 0x80, 0xa4, 0x3a, 0x80, 0x8c, 0x3b, 0xf0, 0x84, 0x37, 0x86, 0xc0, 
-0xc0, 0x80, 0xa4, 0x3a, 0x68, 0x8c, 0x3b, 0xc0, 0x84, 0x37, 0x83, 0xd3, 
-0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x37, 0x38, 0x50, 0xc0, 0xc0, 0x81, 
-0x37, 0x35, 0x18, 0x24, 0x1d, 0x60, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 
-0xc0, 0xc0, 0x80, 0xa4, 0x3a, 0x50, 0x37, 0x72, 0xc0, 0xc0, 0x80, 0xa4, 
-0x3a, 0x38, 0x37, 0x6c, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x37, 
-0x32, 0x50, 0xc0, 0xc0, 0x81, 0x37, 0x2f, 0x92, 0xb8, 0x99, 0x84, 0x1d, 
-0x58, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x2e, 0xa8, 0x35, 
-0xda, 0x82, 0x35, 0xd0, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x30, 
-0xa8, 0x36, 0x1b, 0xa4, 0x30, 0x50, 0x36, 0x0f, 0x80, 0x90, 0x38, 0xa4, 
-0x2f, 0x28, 0x35, 0xf0, 0xa4, 0x2f, 0x00, 0x35, 0xeb, 0x83, 0x90, 0xa8, 
-0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x3a, 0x20, 0x37, 0x66, 0xc0, 
-0xc0, 0x80, 0xa4, 0x3a, 0x08, 0x37, 0x60, 0xd3, 0x82, 0x40, 0x50, 0xc0, 
-0xc0, 0x81, 0x37, 0x2c, 0x50, 0xc0, 0xc0, 0x81, 0x37, 0x29, 0x18, 0x20, 
-0x01, 0x48, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 
-0x39, 0xf0, 0x37, 0x5a, 0xc0, 0xc0, 0x80, 0xa4, 0x39, 0xd8, 0x37, 0x54, 
-0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x37, 0x26, 0x50, 0xc0, 0xc0, 
-0x81, 0x37, 0x23, 0xda, 0x06, 0xe0, 0xea, 0x80, 0x90, 0x60, 0x90, 0x38, 
-0xa4, 0x21, 0x00, 0x34, 0x1e, 0x80, 0x34, 0x1b, 0x90, 0x38, 0xa4, 0x20, 
-0xa8, 0x34, 0x19, 0x80, 0x34, 0x16, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x20, 
-0xe8, 0x34, 0x1f, 0x80, 0x34, 0x1c, 0x90, 0x38, 0xa4, 0x20, 0xc0, 0x34, 
-0x1a, 0x80, 0x34, 0x17, 0xc8, 0x40, 0x18, 0x00, 0x91, 0x38, 0x90, 0x40, 
-0x82, 0xa4, 0x2e, 0x70, 0x35, 0xcf, 0x90, 0xc0, 0x80, 0x90, 0x90, 0x90, 
-0x48, 0xc9, 0xe1, 0x82, 0x00, 0x85, 0x36, 0x07, 0xc9, 0xe1, 0x81, 0x40, 
-0x85, 0x36, 0x04, 0x80, 0x36, 0x03, 0x10, 0x10, 0x81, 0x35, 0xdf, 0x90, 
-0xa8, 0x10, 0x10, 0x90, 0x28, 0x81, 0x35, 0xfd, 0x90, 0x38, 0xa4, 0x2f, 
-0xc0, 0x35, 0xf9, 0xa4, 0x2f, 0xb0, 0x35, 0xf7, 0x90, 0x70, 0x10, 0x10, 
-0x90, 0x38, 0xa4, 0x2f, 0xd8, 0x35, 0xfc, 0x80, 0x35, 0xfa, 0x90, 0x60, 
-0x90, 0x28, 0x24, 0x30, 0x10, 0xa4, 0x30, 0x00, 0x36, 0x01, 0x80, 0xa4, 
-0x2f, 0xf0, 0x35, 0xff, 0x80, 0x90, 0xf8, 0x90, 0x90, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x37, 0x1a, 0x80, 0x37, 0x21, 0x80, 0xa4, 0x38, 0xf8, 0x37, 
-0x20, 0x90, 0x28, 0x81, 0x37, 0x1e, 0x80, 0xa4, 0x38, 0xe0, 0x37, 0x1d, 
-0x83, 0x37, 0x1b, 0x98, 0xb0, 0x01, 0x40, 0x90, 0x50, 0x90, 0x28, 0x24, 
-0x2e, 0x60, 0x24, 0x2e, 0x58, 0x90, 0x28, 0x24, 0x2e, 0x50, 0x24, 0x2e, 
-0x48, 0x90, 0x50, 0x90, 0x28, 0x24, 0x2e, 0x38, 0x24, 0x2e, 0x30, 0x90, 
-0x28, 0x24, 0x2e, 0x28, 0x24, 0x2e, 0x20, 0xa8, 0x08, 0xe0, 0x0d, 0xe0, 
-0x96, 0x38, 0x95, 0xe8, 0x9b, 0x48, 0x05, 0xa8, 0x91, 0xa0, 0x90, 0xd0, 
-0x90, 0x70, 0x90, 0x38, 0xa4, 0x1c, 0x88, 0x33, 0x92, 0xa4, 0x1c, 0x78, 
-0x33, 0x90, 0x90, 0x38, 0xa4, 0x1c, 0x68, 0x33, 0x8e, 0x80, 0x33, 0x8c, 
-0x90, 0x60, 0x90, 0x28, 0x24, 0x1c, 0x28, 0xa4, 0x1c, 0x18, 0x33, 0x84, 
-0x90, 0x38, 0xa4, 0x1c, 0x08, 0x33, 0x82, 0xa4, 0x1c, 0x50, 0x33, 0x8b, 
-0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x1c, 0x40, 0x33, 0x89, 0xa4, 
-0x1c, 0x30, 0x33, 0x87, 0x90, 0x38, 0xa4, 0x2d, 0xd8, 0x35, 0xc1, 0xa4, 
-0x2d, 0x78, 0x35, 0xb5, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x2a, 0xb0, 0x35, 
-0x62, 0xa4, 0x2a, 0x80, 0x35, 0x5c, 0x10, 0x10, 0xa4, 0x1b, 0xf8, 0x33, 
-0x80, 0x91, 0x50, 0x90, 0x90, 0x90, 0x50, 0x90, 0x28, 0x24, 0x1c, 0xb8, 
-0x80, 0x33, 0x9e, 0x80, 0xa4, 0x1c, 0xc0, 0x33, 0x9c, 0x90, 0x50, 0x90, 
-0x28, 0x24, 0x1c, 0xc8, 0x80, 0x33, 0x9f, 0x90, 0x38, 0xa4, 0x1c, 0xd0, 
-0x33, 0x9d, 0xa4, 0x1c, 0x98, 0x33, 0x94, 0x90, 0xe0, 0x90, 0x70, 0x90, 
-0x38, 0xa4, 0x2d, 0x08, 0x35, 0xa9, 0xa4, 0x2c, 0x68, 0x35, 0x96, 0x90, 
-0x38, 0xa4, 0x2c, 0x00, 0x35, 0x87, 0xa4, 0x2b, 0x70, 0x35, 0x76, 0x81, 
-0xa4, 0x1c, 0xa8, 0x33, 0x96, 0xe4, 0xe1, 0xc5, 0x00, 0x37, 0x16, 0xed, 
-0x21, 0xc3, 0xa0, 0xdf, 0x80, 0x37, 0x10, 0x92, 0x40, 0x99, 0x18, 0x02, 
-0x00, 0x10, 0x10, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x2d, 0xd0, 
-0x35, 0xc0, 0xa4, 0x2d, 0x70, 0x35, 0xb4, 0x80, 0x90, 0x38, 0xa4, 0x2a, 
-0xa8, 0x35, 0x61, 0xa4, 0x2a, 0x78, 0x35, 0x5b, 0x10, 0x10, 0x80, 0x90, 
-0x70, 0x90, 0x38, 0xa4, 0x2c, 0xf8, 0x35, 0xa8, 0xa4, 0x2c, 0x60, 0x35, 
-0x94, 0x90, 0x38, 0xa4, 0x2b, 0xf0, 0x35, 0x86, 0xa4, 0x2b, 0x68, 0x35, 
-0x74, 0xe4, 0xe1, 0xc2, 0x00, 0x37, 0x0a, 0xed, 0x21, 0xc0, 0xa0, 0xdf, 
-0x40, 0x37, 0x04, 0x92, 0x80, 0x92, 0x40, 0x99, 0x18, 0x02, 0x00, 0x10, 
-0x10, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x2d, 0xc8, 0x35, 0xbf, 
-0xa4, 0x2d, 0x68, 0x35, 0xb3, 0x80, 0x90, 0x38, 0xa4, 0x2a, 0xa0, 0x35, 
-0x60, 0xa4, 0x2a, 0x70, 0x35, 0x5a, 0x10, 0x10, 0x80, 0x90, 0x70, 0x90, 
-0x38, 0xa4, 0x2c, 0xe8, 0x35, 0xa7, 0xa4, 0x2c, 0x58, 0x35, 0x92, 0x90, 
-0x38, 0xa4, 0x2b, 0xe0, 0x35, 0x85, 0xa4, 0x2b, 0x60, 0x35, 0x72, 0xe4, 
-0xe1, 0xc5, 0x40, 0x37, 0x18, 0xe5, 0x21, 0xc3, 0xc0, 0x37, 0x12, 0x92, 
-0x50, 0x99, 0x18, 0x02, 0x00, 0x10, 0x10, 0x90, 0x80, 0x10, 0x10, 0x90, 
-0x38, 0xa4, 0x2d, 0xc0, 0x35, 0xbe, 0xa4, 0x2d, 0x60, 0x35, 0xb2, 0x80, 
-0x90, 0x38, 0xa4, 0x2a, 0x98, 0x35, 0x5f, 0xa4, 0x2a, 0x68, 0x35, 0x59, 
-0x10, 0x10, 0x80, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x2c, 0xd8, 0x35, 0xa6, 
-0xa4, 0x2c, 0x50, 0x35, 0x90, 0x90, 0x38, 0xa4, 0x2b, 0xd0, 0x35, 0x84, 
-0xa4, 0x2b, 0x58, 0x35, 0x70, 0xec, 0xe1, 0xc2, 0x60, 0xe6, 0xc0, 0x37, 
-0x0c, 0xe5, 0x21, 0xc0, 0xc0, 0x37, 0x06, 0xc0, 0x40, 0x80, 0x10, 0x10, 
-0x81, 0x90, 0x90, 0x90, 0x48, 0xc9, 0xe1, 0x59, 0x80, 0x85, 0x35, 0x6a, 
-0xc9, 0xe1, 0x5a, 0x00, 0x85, 0x35, 0x67, 0x80, 0x35, 0x65, 0x80, 0xd8, 
-0x47, 0x80, 0x0d, 0xc0, 0xc0, 0x80, 0x10, 0x10, 0x82, 0x90, 0x58, 0xd5, 
-0x81, 0x80, 0x80, 0x37, 0x00, 0x80, 0x36, 0xfe, 0xd5, 0x81, 0x80, 0x80, 
-0x36, 0xfc, 0x80, 0x36, 0xfa, 0xc0, 0x80, 0x10, 0x10, 0x82, 0x90, 0x58, 
-0xd5, 0x81, 0x80, 0x80, 0x37, 0x01, 0x80, 0x36, 0xff, 0xd5, 0x81, 0x80, 
-0x80, 0x36, 0xfd, 0x80, 0x36, 0xfb, 0xc0, 0x80, 0x84, 0x36, 0xf9, 0xa0, 
-0x56, 0x50, 0xa0, 0x40, 0x70, 0xa8, 0x1d, 0x40, 0x33, 0x18, 0xa0, 0x12, 
-0x38, 0xa0, 0x0b, 0x48, 0x96, 0x00, 0x9a, 0xf0, 0x05, 0xc0, 0x91, 0x70, 
-0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x14, 0x50, 0x33, 0x7c, 0xa4, 
-0x14, 0x60, 0x33, 0x7b, 0x10, 0x10, 0xa4, 0x14, 0x58, 0x33, 0x7a, 0x90, 
-0x70, 0x90, 0x38, 0xa4, 0x14, 0x20, 0x33, 0x61, 0xa4, 0x14, 0x30, 0x33, 
-0x60, 0x10, 0x10, 0xa4, 0x14, 0x28, 0x33, 0x5f, 0x90, 0xb8, 0x90, 0x70, 
-0x90, 0x38, 0xa4, 0x13, 0xf0, 0x33, 0x46, 0xa4, 0x14, 0x00, 0x33, 0x45, 
-0x10, 0x10, 0xa4, 0x13, 0xf8, 0x33, 0x44, 0x90, 0x70, 0x90, 0x38, 0xa4, 
-0x13, 0xc0, 0x33, 0x2b, 0xa4, 0x13, 0xd0, 0x33, 0x2a, 0x10, 0x10, 0xa4, 
-0x13, 0xc8, 0x33, 0x29, 0x91, 0x70, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 
-0xa4, 0x14, 0x38, 0x33, 0x77, 0xa4, 0x14, 0x48, 0x33, 0x79, 0x10, 0x10, 
-0xa4, 0x14, 0x40, 0x33, 0x78, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x14, 0x08, 
-0x33, 0x5c, 0xa4, 0x14, 0x18, 0x33, 0x5e, 0x10, 0x10, 0xa4, 0x14, 0x10, 
-0x33, 0x5d, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x13, 0xd8, 0x33, 
-0x41, 0xa4, 0x13, 0xe8, 0x33, 0x43, 0x10, 0x10, 0xa4, 0x13, 0xe0, 0x33, 
-0x42, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x13, 0xa8, 0x33, 0x26, 0xa4, 0x13, 
-0xb8, 0x33, 0x28, 0x10, 0x10, 0xa4, 0x13, 0xb0, 0x33, 0x27, 0xe4, 0xe1, 
-0x4f, 0xc0, 0x35, 0x49, 0x9a, 0xf0, 0x05, 0x00, 0x91, 0x70, 0x90, 0xb8, 
-0x90, 0x70, 0x90, 0x38, 0xa4, 0x13, 0xa0, 0x33, 0x74, 0xa4, 0x13, 0x98, 
-0x33, 0x76, 0x10, 0x10, 0xa4, 0x13, 0x90, 0x33, 0x75, 0x90, 0x70, 0x90, 
-0x38, 0xa4, 0x13, 0x88, 0x33, 0x59, 0xa4, 0x13, 0x80, 0x33, 0x5b, 0x10, 
-0x10, 0xa4, 0x13, 0x78, 0x33, 0x5a, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 
-0xa4, 0x13, 0x70, 0x33, 0x3e, 0xa4, 0x13, 0x68, 0x33, 0x40, 0x10, 0x10, 
-0xa4, 0x13, 0x60, 0x33, 0x3f, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x13, 0x58, 
-0x33, 0x23, 0xa4, 0x13, 0x50, 0x33, 0x25, 0x10, 0x10, 0xa4, 0x13, 0x48, 
-0x33, 0x24, 0x91, 0x10, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 
-0x71, 0x80, 0x33, 0x73, 0x10, 0x10, 0x80, 0x33, 0x72, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x33, 0x56, 0x80, 0x33, 0x58, 0x10, 0x10, 0x80, 0x33, 0x57, 
-0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x3b, 0x80, 0x33, 0x3d, 
-0x10, 0x10, 0x80, 0x33, 0x3c, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x20, 
-0x80, 0x33, 0x22, 0x10, 0x10, 0x80, 0x33, 0x21, 0xe4, 0xe1, 0x3d, 0x40, 
-0x35, 0x09, 0x95, 0x40, 0x9a, 0x90, 0x05, 0x00, 0x91, 0x10, 0x90, 0x88, 
-0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x6e, 0x80, 0x33, 0x70, 0x10, 0x10, 
-0x80, 0x33, 0x6f, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x53, 0x80, 0x33, 
-0x55, 0x10, 0x10, 0x80, 0x33, 0x54, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 
-0xa4, 0x13, 0x30, 0x33, 0x38, 0xa4, 0x13, 0x40, 0x33, 0x3a, 0x10, 0x10, 
-0xa4, 0x13, 0x38, 0x33, 0x39, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x13, 0x00, 
-0x33, 0x1d, 0xa4, 0x13, 0x10, 0x33, 0x1f, 0x10, 0x10, 0xa4, 0x13, 0x08, 
-0x33, 0x1e, 0x91, 0x10, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 
-0x6b, 0x80, 0x33, 0x6d, 0x10, 0x10, 0x80, 0x33, 0x6c, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x33, 0x50, 0x80, 0x33, 0x52, 0x10, 0x10, 0x80, 0x33, 0x51, 
-0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x13, 0x18, 0x33, 0x35, 0xa4, 
-0x13, 0x28, 0x33, 0x37, 0x10, 0x10, 0xa4, 0x13, 0x20, 0x33, 0x36, 0x90, 
-0x70, 0x90, 0x38, 0xa4, 0x12, 0xe8, 0x33, 0x1a, 0xa4, 0x12, 0xf8, 0x33, 
-0x1c, 0x10, 0x10, 0xa4, 0x12, 0xf0, 0x33, 0x1b, 0xe4, 0xe1, 0x4f, 0x40, 
-0x35, 0x47, 0x98, 0xb8, 0x01, 0x68, 0x10, 0x10, 0x10, 0x10, 0x90, 0x50, 
-0x90, 0x28, 0x80, 0x33, 0x17, 0x80, 0x33, 0x19, 0x10, 0x10, 0x80, 0x33, 
-0x18, 0x90, 0x60, 0x90, 0x30, 0x60, 0xa0, 0x97, 0x00, 0x60, 0xa0, 0x96, 
-0xc0, 0x90, 0x30, 0x60, 0xa0, 0x96, 0x80, 0x60, 0xa0, 0x96, 0x40, 0xe4, 
-0xe1, 0x3c, 0x40, 0x35, 0x05, 0x96, 0xe8, 0x94, 0x80, 0x9a, 0x30, 0x04, 
-0x40, 0x91, 0x10, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x65, 
-0x80, 0x33, 0x6a, 0x10, 0x10, 0x80, 0x33, 0x69, 0x90, 0x50, 0x90, 0x28, 
-0x80, 0x33, 0x4a, 0x80, 0x33, 0x4f, 0x10, 0x10, 0x80, 0x33, 0x4e, 0x90, 
-0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x2f, 0x80, 0x33, 0x34, 0x10, 
-0x10, 0x80, 0x33, 0x33, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x11, 0x80, 
-0x33, 0x16, 0x10, 0x10, 0x80, 0x33, 0x15, 0x91, 0x10, 0x90, 0x88, 0x90, 
-0x50, 0x90, 0x28, 0x80, 0x33, 0x62, 0x80, 0x33, 0x64, 0x10, 0x10, 0x80, 
-0x33, 0x63, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x47, 0x80, 0x33, 0x49, 
-0x10, 0x10, 0x80, 0x33, 0x48, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 
-0x33, 0x2c, 0x80, 0x33, 0x2e, 0x10, 0x10, 0x80, 0x33, 0x2d, 0x90, 0x50, 
-0x90, 0x28, 0x80, 0x33, 0x0e, 0x80, 0x33, 0x10, 0x10, 0x10, 0x80, 0x33, 
-0x0f, 0xe4, 0xe1, 0x4e, 0xc0, 0x35, 0x45, 0x88, 0x02, 0x28, 0x91, 0x10, 
-0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x66, 0x80, 0x33, 0x68, 
-0x10, 0x10, 0x80, 0x33, 0x67, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x4b, 
-0x80, 0x33, 0x4d, 0x10, 0x10, 0x80, 0x33, 0x4c, 0x90, 0x88, 0x90, 0x50, 
-0x90, 0x28, 0x80, 0x33, 0x30, 0x80, 0x33, 0x32, 0x10, 0x10, 0x80, 0x33, 
-0x31, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x12, 0x80, 0x33, 0x14, 0x10, 
-0x10, 0x80, 0x33, 0x13, 0xe4, 0xe1, 0x3b, 0x40, 0x35, 0x01, 0x93, 0x40, 
-0x99, 0x90, 0x03, 0x00, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x28, 0x81, 0x32, 
-0x9e, 0x10, 0x10, 0x80, 0x32, 0x9d, 0x90, 0x28, 0x81, 0x32, 0x9a, 0x10, 
-0x10, 0x80, 0x32, 0x99, 0x90, 0x60, 0x90, 0x28, 0x81, 0x32, 0x96, 0x10, 
-0x10, 0x80, 0x32, 0x95, 0x90, 0x28, 0x81, 0x32, 0x92, 0x10, 0x10, 0x80, 
-0x32, 0x91, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x28, 0x81, 0x32, 0x9b, 0x10, 
-0x10, 0x80, 0x32, 0x9c, 0x90, 0x28, 0x81, 0x32, 0x97, 0x10, 0x10, 0x80, 
-0x32, 0x98, 0x90, 0x60, 0x90, 0x28, 0x81, 0x32, 0x93, 0x10, 0x10, 0x80, 
-0x32, 0x94, 0x90, 0x28, 0x81, 0x32, 0x8f, 0x10, 0x10, 0x80, 0x32, 0x90, 
-0xe4, 0xe1, 0x4e, 0x40, 0x35, 0x43, 0x88, 0x00, 0x88, 0x10, 0x10, 0x10, 
-0x10, 0x90, 0x28, 0x81, 0x32, 0x8d, 0x10, 0x10, 0x80, 0x32, 0x8e, 0xe4, 
-0xe1, 0x3a, 0x40, 0x34, 0xfd, 0xa0, 0x0e, 0x80, 0xa0, 0x09, 0x08, 0x94, 
-0x80, 0x9a, 0x30, 0x04, 0x40, 0x91, 0x10, 0x90, 0x88, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x33, 0x0d, 0x80, 0x33, 0x0c, 0x10, 0x10, 0x80, 0x33, 0x0b, 
-0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xf2, 0x80, 0x32, 0xf1, 0x10, 0x10, 
-0x80, 0x32, 0xf0, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xd7, 
-0x80, 0x32, 0xd6, 0x10, 0x10, 0x80, 0x32, 0xd5, 0x90, 0x50, 0x90, 0x28, 
-0x80, 0x32, 0xbc, 0x80, 0x32, 0xbb, 0x10, 0x10, 0x80, 0x32, 0xba, 0x91, 
-0x10, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x08, 0x80, 0x33, 
-0x0a, 0x10, 0x10, 0x80, 0x33, 0x09, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 
-0xed, 0x80, 0x32, 0xef, 0x10, 0x10, 0x80, 0x32, 0xee, 0x90, 0x88, 0x90, 
-0x50, 0x90, 0x28, 0x80, 0x32, 0xd2, 0x80, 0x32, 0xd4, 0x10, 0x10, 0x80, 
-0x32, 0xd3, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xb7, 0x80, 0x32, 0xb9, 
-0x10, 0x10, 0x80, 0x32, 0xb8, 0xe4, 0xe1, 0x47, 0x40, 0x35, 0x31, 0x9a, 
-0x30, 0x04, 0x40, 0x91, 0x10, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 
-0x33, 0x05, 0x80, 0x33, 0x07, 0x10, 0x10, 0x80, 0x33, 0x06, 0x90, 0x50, 
-0x90, 0x28, 0x80, 0x32, 0xea, 0x80, 0x32, 0xec, 0x10, 0x10, 0x80, 0x32, 
-0xeb, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xcf, 0x80, 0x32, 
-0xd1, 0x10, 0x10, 0x80, 0x32, 0xd0, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 
-0xb4, 0x80, 0x32, 0xb6, 0x10, 0x10, 0x80, 0x32, 0xb5, 0x91, 0x10, 0x90, 
-0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0x02, 0x80, 0x33, 0x04, 0x10, 
-0x10, 0x80, 0x33, 0x03, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xe7, 0x80, 
-0x32, 0xe9, 0x10, 0x10, 0x80, 0x32, 0xe8, 0x90, 0x88, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x32, 0xcc, 0x80, 0x32, 0xce, 0x10, 0x10, 0x80, 0x32, 0xcd, 
-0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xb1, 0x80, 0x32, 0xb3, 0x10, 0x10, 
-0x80, 0x32, 0xb2, 0xe4, 0xe1, 0x36, 0xc0, 0x34, 0xe5, 0x94, 0x80, 0x9a, 
-0x30, 0x04, 0x40, 0x91, 0x10, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 
-0x32, 0xff, 0x80, 0x33, 0x01, 0x10, 0x10, 0x80, 0x33, 0x00, 0x90, 0x50, 
-0x90, 0x28, 0x80, 0x32, 0xe4, 0x80, 0x32, 0xe6, 0x10, 0x10, 0x80, 0x32, 
-0xe5, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xc9, 0x80, 0x32, 
-0xcb, 0x10, 0x10, 0x80, 0x32, 0xca, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 
-0xae, 0x80, 0x32, 0xb0, 0x10, 0x10, 0x80, 0x32, 0xaf, 0x91, 0x10, 0x90, 
-0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xfc, 0x80, 0x32, 0xfe, 0x10, 
-0x10, 0x80, 0x32, 0xfd, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xe1, 0x80, 
-0x32, 0xe3, 0x10, 0x10, 0x80, 0x32, 0xe2, 0x90, 0x88, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x32, 0xc6, 0x80, 0x32, 0xc8, 0x10, 0x10, 0x80, 0x32, 0xc7, 
-0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xab, 0x80, 0x32, 0xad, 0x10, 0x10, 
-0x80, 0x32, 0xac, 0xe4, 0xe1, 0x46, 0x40, 0x35, 0x2d, 0x88, 0x00, 0xb0, 
-0x10, 0x10, 0x10, 0x10, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xa8, 0x80, 
-0x32, 0xaa, 0x10, 0x10, 0x80, 0x32, 0xa9, 0xe4, 0xe1, 0x36, 0x40, 0x34, 
-0xe3, 0x96, 0xe8, 0x94, 0x80, 0x9a, 0x30, 0x04, 0x40, 0x91, 0x10, 0x90, 
-0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xf6, 0x80, 0x32, 0xfb, 0x10, 
-0x10, 0x80, 0x32, 0xfa, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xdb, 0x80, 
-0x32, 0xe0, 0x10, 0x10, 0x80, 0x32, 0xdf, 0x90, 0x88, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x32, 0xc0, 0x80, 0x32, 0xc5, 0x10, 0x10, 0x80, 0x32, 0xc4, 
-0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xa2, 0x80, 0x32, 0xa7, 0x10, 0x10, 
-0x80, 0x32, 0xa6, 0x91, 0x10, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 
-0x32, 0xf3, 0x80, 0x32, 0xf5, 0x10, 0x10, 0x80, 0x32, 0xf4, 0x90, 0x50, 
-0x90, 0x28, 0x80, 0x32, 0xd8, 0x80, 0x32, 0xda, 0x10, 0x10, 0x80, 0x32, 
-0xd9, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xbd, 0x80, 0x32, 
-0xbf, 0x10, 0x10, 0x80, 0x32, 0xbe, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 
-0x9f, 0x80, 0x32, 0xa1, 0x10, 0x10, 0x80, 0x32, 0xa0, 0xe4, 0xe1, 0x45, 
-0x40, 0x35, 0x29, 0x88, 0x02, 0x28, 0x91, 0x10, 0x90, 0x88, 0x90, 0x50, 
-0x90, 0x28, 0x80, 0x32, 0xf7, 0x80, 0x32, 0xf9, 0x10, 0x10, 0x80, 0x32, 
-0xf8, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 0xdc, 0x80, 0x32, 0xde, 0x10, 
-0x10, 0x80, 0x32, 0xdd, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x32, 
-0xc1, 0x80, 0x32, 0xc3, 0x10, 0x10, 0x80, 0x32, 0xc2, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x32, 0xa3, 0x80, 0x32, 0xa5, 0x10, 0x10, 0x80, 0x32, 0xa4, 
-0xe4, 0xe1, 0x35, 0xc0, 0x34, 0xe1, 0x90, 0x40, 0xe5, 0x21, 0x44, 0x40, 
-0x35, 0x25, 0xe5, 0x21, 0x35, 0x40, 0x34, 0xdf, 0x9e, 0xb4, 0x20, 0x08, 
-0x93, 0x70, 0x91, 0xd8, 0xd5, 0x07, 0x80, 0xd0, 0xc4, 0x40, 0x90, 0x48, 
-0x80, 0x8c, 0x37, 0x58, 0x84, 0x36, 0xf5, 0xa4, 0x35, 0x38, 0x36, 0xbf, 
-0x90, 0x28, 0x24, 0x34, 0x78, 0xa4, 0x32, 0xf8, 0x36, 0x77, 0xd0, 0xc4, 
-0x40, 0x90, 0x48, 0x80, 0x8c, 0x37, 0x38, 0x84, 0x36, 0xf3, 0xa4, 0x35, 
-0x28, 0x36, 0xbd, 0x90, 0x28, 0x24, 0x34, 0x68, 0xa4, 0x32, 0xe8, 0x36, 
-0x75, 0xd5, 0x06, 0x80, 0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 0x36, 0xdf, 
-0xa4, 0x35, 0x08, 0x36, 0xb9, 0x90, 0x28, 0x24, 0x34, 0x48, 0xa4, 0x32, 
-0xc8, 0x36, 0x71, 0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 0x36, 0xdb, 0xa4, 
-0x34, 0xf8, 0x36, 0xb7, 0x90, 0x28, 0x24, 0x34, 0x38, 0xa4, 0x32, 0xb8, 
-0x36, 0x6f, 0x91, 0x98, 0xd5, 0x06, 0x80, 0xd0, 0xc3, 0x40, 0x90, 0x28, 
-0x80, 0x36, 0xd3, 0xa4, 0x34, 0xd8, 0x36, 0xb3, 0x90, 0x28, 0x24, 0x34, 
-0x18, 0xa4, 0x32, 0x98, 0x36, 0x6b, 0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 
-0x36, 0xcf, 0xa4, 0x34, 0xc8, 0x36, 0xb1, 0x90, 0x28, 0x24, 0x34, 0x08, 
-0xa4, 0x32, 0x88, 0x36, 0x69, 0xd5, 0x06, 0x80, 0xd0, 0xc3, 0x40, 0x90, 
-0x28, 0x80, 0x36, 0xc7, 0xa4, 0x34, 0xa8, 0x36, 0xad, 0x90, 0x28, 0x24, 
-0x33, 0xe8, 0xa4, 0x32, 0x68, 0x36, 0x65, 0xd0, 0xc3, 0x40, 0x90, 0x28, 
-0x80, 0x36, 0xc3, 0xa4, 0x34, 0x98, 0x36, 0xab, 0x90, 0x28, 0x24, 0x33, 
-0xd8, 0xa4, 0x32, 0x58, 0x36, 0x63, 0x93, 0x70, 0x91, 0xd8, 0xd5, 0x07, 
-0x80, 0xd0, 0xc4, 0x40, 0x90, 0x48, 0x80, 0x8c, 0x37, 0x78, 0x84, 0x36, 
-0xf7, 0xa4, 0x35, 0x48, 0x36, 0xc1, 0x90, 0x28, 0x24, 0x34, 0x88, 0xa4, 
-0x33, 0x08, 0x36, 0x79, 0xd0, 0xc4, 0x40, 0x90, 0x48, 0x80, 0x8c, 0x37, 
-0x48, 0x84, 0x36, 0xf4, 0xa4, 0x35, 0x30, 0x36, 0xbe, 0x90, 0x28, 0x24, 
-0x34, 0x70, 0xa4, 0x32, 0xf0, 0x36, 0x76, 0xd5, 0x06, 0x80, 0xd0, 0xc3, 
-0x40, 0x90, 0x28, 0x80, 0x36, 0xe3, 0xa4, 0x35, 0x18, 0x36, 0xbb, 0x90, 
-0x28, 0x24, 0x34, 0x58, 0xa4, 0x32, 0xd8, 0x36, 0x73, 0xd0, 0xc3, 0x40, 
-0x90, 0x28, 0x80, 0x36, 0xdd, 0xa4, 0x35, 0x00, 0x36, 0xb8, 0x90, 0x28, 
-0x24, 0x34, 0x40, 0xa4, 0x32, 0xc0, 0x36, 0x70, 0x91, 0x98, 0xd5, 0x06, 
-0x80, 0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 0x36, 0xd7, 0xa4, 0x34, 0xe8, 
-0x36, 0xb5, 0x90, 0x28, 0x24, 0x34, 0x28, 0xa4, 0x32, 0xa8, 0x36, 0x6d, 
-0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 0x36, 0xd1, 0xa4, 0x34, 0xd0, 0x36, 
-0xb2, 0x90, 0x28, 0x24, 0x34, 0x10, 0xa4, 0x32, 0x90, 0x36, 0x6a, 0xd5, 
-0x06, 0x80, 0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 0x36, 0xcb, 0xa4, 0x34, 
-0xb8, 0x36, 0xaf, 0x90, 0x28, 0x24, 0x33, 0xf8, 0xa4, 0x32, 0x78, 0x36, 
-0x67, 0xd0, 0xc3, 0x40, 0x90, 0x28, 0x80, 0x36, 0xc5, 0xa4, 0x34, 0xa0, 
-0x36, 0xac, 0x90, 0x28, 0x24, 0x33, 0xe0, 0xa4, 0x32, 0x60, 0x36, 0x64, 
-0x99, 0x08, 0x01, 0xf0, 0x81, 0x90, 0x78, 0xd4, 0xc2, 0x00, 0xa4, 0x1f, 
-0xb0, 0x33, 0xee, 0xa4, 0x1f, 0x30, 0x33, 0xde, 0xd4, 0xc2, 0x00, 0xa4, 
-0x1f, 0x40, 0x33, 0xf0, 0xa4, 0x1e, 0xc0, 0x33, 0xe0, 0x81, 0x90, 0x78, 
-0xd4, 0xc2, 0x00, 0xa4, 0x1f, 0x60, 0x33, 0xf4, 0xa4, 0x1e, 0xe0, 0x33, 
-0xe4, 0xd4, 0xc2, 0x00, 0xa4, 0x1f, 0x50, 0x33, 0xf2, 0xa4, 0x1e, 0xd0, 
-0x33, 0xe2, 0xa8, 0x0b, 0x18, 0x13, 0xa8, 0x96, 0x80, 0x93, 0x40, 0x99, 
-0x90, 0x03, 0x00, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0xb8, 
-0x32, 0x58, 0x24, 0x12, 0xb0, 0x90, 0x38, 0xa4, 0x11, 0xe0, 0x32, 0x3d, 
-0x24, 0x11, 0xd8, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x11, 0x08, 0x32, 0x22, 
-0x24, 0x11, 0x00, 0x90, 0x38, 0xa4, 0x10, 0x30, 0x32, 0x07, 0x24, 0x10, 
-0x28, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0xa8, 0x32, 0x53, 
-0x24, 0x12, 0xa0, 0x90, 0x38, 0xa4, 0x11, 0xd0, 0x32, 0x38, 0x24, 0x11, 
-0xc8, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x10, 0xf8, 0x32, 0x1d, 0x24, 0x10, 
-0xf0, 0x90, 0x38, 0xa4, 0x10, 0x20, 0x32, 0x02, 0x24, 0x10, 0x18, 0xe4, 
-0xe1, 0x91, 0x40, 0x36, 0x47, 0x99, 0x90, 0x03, 0x00, 0x90, 0xc0, 0x90, 
-0x60, 0x90, 0x38, 0xa4, 0x12, 0x90, 0x32, 0x50, 0x24, 0x12, 0x88, 0x90, 
-0x38, 0xa4, 0x11, 0xb8, 0x32, 0x35, 0x24, 0x11, 0xb0, 0x90, 0x60, 0x90, 
-0x38, 0xa4, 0x10, 0xe0, 0x32, 0x1a, 0x24, 0x10, 0xd8, 0x90, 0x38, 0xa4, 
-0x10, 0x08, 0x31, 0xff, 0x24, 0x10, 0x00, 0x90, 0xc0, 0x90, 0x60, 0x90, 
-0x38, 0xa4, 0x12, 0x78, 0x32, 0x4d, 0x24, 0x12, 0x70, 0x90, 0x38, 0xa4, 
-0x11, 0xa0, 0x32, 0x32, 0x24, 0x11, 0x98, 0x90, 0x60, 0x90, 0x38, 0xa4, 
-0x10, 0xc8, 0x32, 0x17, 0x24, 0x10, 0xc0, 0x90, 0x38, 0xa4, 0x0f, 0xf0, 
-0x31, 0xfc, 0x24, 0x0f, 0xe8, 0xe4, 0xe1, 0x8f, 0xc0, 0x36, 0x41, 0x93, 
-0x78, 0x99, 0x90, 0x03, 0x00, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 
-0x12, 0x60, 0x32, 0x4a, 0x24, 0x12, 0x58, 0x90, 0x38, 0xa4, 0x11, 0x88, 
-0x32, 0x2f, 0x24, 0x11, 0x80, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x10, 0xb0, 
-0x32, 0x14, 0x24, 0x10, 0xa8, 0x90, 0x38, 0xa4, 0x0f, 0xd8, 0x31, 0xf9, 
-0x24, 0x0f, 0xd0, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0x48, 
-0x32, 0x47, 0x24, 0x12, 0x40, 0x90, 0x38, 0xa4, 0x11, 0x70, 0x32, 0x2c, 
-0x24, 0x11, 0x68, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x10, 0x98, 0x32, 0x11, 
-0x24, 0x10, 0x90, 0x90, 0x38, 0xa4, 0x0f, 0xc0, 0x31, 0xf6, 0x24, 0x0f, 
-0xb8, 0xec, 0xa0, 0xff, 0x00, 0x02, 0x00, 0x33, 0xfe, 0xa4, 0x31, 0xc8, 
-0x36, 0x3b, 0x88, 0x00, 0x88, 0x10, 0x10, 0x10, 0x10, 0x90, 0x38, 0xa4, 
-0x0f, 0xa8, 0x31, 0xf3, 0x24, 0x0f, 0xa0, 0xe9, 0x60, 0xfe, 0x40, 0x02, 
-0x00, 0x33, 0xfa, 0xe3, 0x61, 0x8c, 0xc0, 0x36, 0x35, 0x95, 0x08, 0x93, 
-0x40, 0x99, 0x90, 0x03, 0x00, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 
-0x12, 0x30, 0x32, 0x41, 0x24, 0x12, 0x28, 0x90, 0x38, 0xa4, 0x11, 0x58, 
-0x32, 0x26, 0x24, 0x11, 0x50, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x10, 0x80, 
-0x32, 0x0b, 0x24, 0x10, 0x78, 0x90, 0x38, 0xa4, 0x0f, 0x90, 0x31, 0xed, 
-0x24, 0x0f, 0x88, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0x00, 
-0x32, 0x3e, 0x24, 0x11, 0xf8, 0x90, 0x38, 0xa4, 0x11, 0x28, 0x32, 0x23, 
-0x24, 0x11, 0x20, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x10, 0x50, 0x32, 0x08, 
-0x24, 0x10, 0x48, 0x90, 0x38, 0xa4, 0x0f, 0x60, 0x31, 0xea, 0x24, 0x0f, 
-0x58, 0xe4, 0xe1, 0x91, 0x80, 0x36, 0x49, 0x88, 0x01, 0x88, 0x90, 0xc0, 
-0x90, 0x60, 0x90, 0x38, 0xa4, 0x12, 0x20, 0x32, 0x42, 0x24, 0x12, 0x18, 
-0x90, 0x38, 0xa4, 0x11, 0x48, 0x32, 0x27, 0x24, 0x11, 0x40, 0x90, 0x60, 
-0x90, 0x38, 0xa4, 0x10, 0x70, 0x32, 0x0c, 0x24, 0x10, 0x68, 0x90, 0x38, 
-0xa4, 0x0f, 0x80, 0x31, 0xee, 0x24, 0x0f, 0x78, 0xe4, 0xe1, 0x90, 0x00, 
-0x36, 0x43, 0x92, 0xd0, 0x99, 0x50, 0x02, 0x80, 0x90, 0xa0, 0x90, 0x50, 
-0x90, 0x28, 0x80, 0x31, 0xe9, 0x24, 0x0f, 0x40, 0x90, 0x28, 0x80, 0x31, 
-0xe5, 0x24, 0x0f, 0x20, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0xe1, 0x24, 
-0x0f, 0x00, 0x90, 0x28, 0x80, 0x31, 0xdd, 0x24, 0x0e, 0xe0, 0x90, 0xa0, 
-0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0xe6, 0x24, 0x0f, 0x38, 0x90, 0x28, 
-0x80, 0x31, 0xe2, 0x24, 0x0f, 0x18, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 
-0xde, 0x24, 0x0e, 0xf8, 0x90, 0x28, 0x80, 0x31, 0xda, 0x24, 0x0e, 0xd8, 
-0xec, 0xe1, 0x8e, 0xa1, 0x00, 0x00, 0x36, 0x3d, 0x88, 0x00, 0x78, 0x10, 
-0x10, 0x10, 0x10, 0x90, 0x28, 0x80, 0x31, 0xd8, 0x24, 0x0e, 0xc8, 0xec, 
-0xe1, 0x8d, 0x20, 0xfe, 0x00, 0x36, 0x37, 0xe5, 0xa1, 0x34, 0xc0, 0x34, 
-0xd1, 0xa0, 0x2a, 0x10, 0xa8, 0x16, 0x60, 0x29, 0xd8, 0xa0, 0x0c, 0x48, 
-0xa0, 0x0a, 0xc8, 0x95, 0x60, 0x92, 0xb0, 0x91, 0x40, 0x90, 0x88, 0x90, 
-0x50, 0x90, 0x28, 0x80, 0x31, 0xa1, 0x80, 0x31, 0xa0, 0x10, 0x10, 0x80, 
-0x31, 0x9f, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0x98, 0x31, 0xb3, 0xa4, 
-0x08, 0x90, 0x31, 0xb2, 0x10, 0x10, 0xa4, 0x08, 0x88, 0x31, 0xb1, 0x90, 
-0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x09, 0xb8, 0x31, 0xd7, 0xa4, 0x09, 
-0xb0, 0x31, 0xd6, 0x10, 0x10, 0xa4, 0x09, 0xa8, 0x31, 0xd5, 0x90, 0x70, 
-0x90, 0x38, 0xa4, 0x09, 0x28, 0x31, 0xc5, 0xa4, 0x09, 0x20, 0x31, 0xc4, 
-0x10, 0x10, 0xa4, 0x09, 0x18, 0x31, 0xc3, 0x91, 0x40, 0x90, 0x88, 0x90, 
-0x50, 0x90, 0x28, 0x80, 0x31, 0x9c, 0x80, 0x31, 0x9e, 0x10, 0x10, 0x80, 
-0x31, 0x9d, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0x70, 0x31, 0xae, 0xa4, 
-0x08, 0x80, 0x31, 0xb0, 0x10, 0x10, 0xa4, 0x08, 0x78, 0x31, 0xaf, 0x90, 
-0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x09, 0x90, 0x31, 0xd2, 0xa4, 0x09, 
-0xa0, 0x31, 0xd4, 0x10, 0x10, 0xa4, 0x09, 0x98, 0x31, 0xd3, 0x90, 0x70, 
-0x90, 0x38, 0xa4, 0x09, 0x00, 0x31, 0xc0, 0xa4, 0x09, 0x10, 0x31, 0xc2, 
-0x10, 0x10, 0xa4, 0x09, 0x08, 0x31, 0xc1, 0x92, 0xb0, 0x91, 0x40, 0x90, 
-0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x99, 0x80, 0x31, 0x9b, 0x10, 
-0x10, 0x80, 0x31, 0x9a, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0x58, 0x31, 
-0xab, 0xa4, 0x08, 0x68, 0x31, 0xad, 0x10, 0x10, 0xa4, 0x08, 0x60, 0x31, 
-0xac, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x09, 0x78, 0x31, 0xcf, 
-0xa4, 0x09, 0x88, 0x31, 0xd1, 0x10, 0x10, 0xa4, 0x09, 0x80, 0x31, 0xd0, 
-0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0xe8, 0x31, 0xbd, 0xa4, 0x08, 0xf8, 
-0x31, 0xbf, 0x10, 0x10, 0xa4, 0x08, 0xf0, 0x31, 0xbe, 0x91, 0x40, 0x90, 
-0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x96, 0x80, 0x31, 0x98, 0x10, 
-0x10, 0x80, 0x31, 0x97, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0x40, 0x31, 
-0xa8, 0xa4, 0x08, 0x50, 0x31, 0xaa, 0x10, 0x10, 0xa4, 0x08, 0x48, 0x31, 
-0xa9, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x09, 0x60, 0x31, 0xcc, 
-0xa4, 0x09, 0x70, 0x31, 0xce, 0x10, 0x10, 0xa4, 0x09, 0x68, 0x31, 0xcd, 
-0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0xd0, 0x31, 0xba, 0xa4, 0x08, 0xe0, 
-0x31, 0xbc, 0x10, 0x10, 0xa4, 0x08, 0xd8, 0x31, 0xbb, 0x10, 0x10, 0x90, 
-0xa8, 0x10, 0x10, 0x10, 0x10, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x8d, 
-0x80, 0x31, 0x8f, 0x10, 0x10, 0x80, 0x31, 0x8e, 0x90, 0x60, 0x90, 0x30, 
-0x60, 0xa0, 0x2a, 0xc0, 0x60, 0xa0, 0x2a, 0x80, 0x90, 0x30, 0x60, 0xa0, 
-0x2a, 0x40, 0x60, 0xa0, 0x2a, 0x00, 0x97, 0xf0, 0x95, 0x60, 0x92, 0xb0, 
-0x91, 0x40, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x93, 0x80, 
-0x31, 0x95, 0x10, 0x10, 0x80, 0x31, 0x94, 0x90, 0x70, 0x90, 0x38, 0xa4, 
-0x08, 0x28, 0x31, 0xa5, 0xa4, 0x08, 0x38, 0x31, 0xa7, 0x10, 0x10, 0xa4, 
-0x08, 0x30, 0x31, 0xa6, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x09, 
-0x48, 0x31, 0xc9, 0xa4, 0x09, 0x58, 0x31, 0xcb, 0x10, 0x10, 0xa4, 0x09, 
-0x50, 0x31, 0xca, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0xb8, 0x31, 0xb7, 
-0xa4, 0x08, 0xc8, 0x31, 0xb9, 0x10, 0x10, 0xa4, 0x08, 0xc0, 0x31, 0xb8, 
-0x91, 0x40, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x90, 0x80, 
-0x31, 0x92, 0x10, 0x10, 0x80, 0x31, 0x91, 0x90, 0x70, 0x90, 0x38, 0xa4, 
-0x08, 0x10, 0x31, 0xa2, 0xa4, 0x08, 0x20, 0x31, 0xa4, 0x10, 0x10, 0xa4, 
-0x08, 0x18, 0x31, 0xa3, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x09, 
-0x30, 0x31, 0xc6, 0xa4, 0x09, 0x40, 0x31, 0xc8, 0x10, 0x10, 0xa4, 0x09, 
-0x38, 0x31, 0xc7, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0xa0, 0x31, 0xb4, 
-0xa4, 0x08, 0xb0, 0x31, 0xb6, 0x10, 0x10, 0xa4, 0x08, 0xa8, 0x31, 0xb5, 
-0x10, 0x10, 0x91, 0x40, 0x90, 0xa0, 0x90, 0x50, 0x90, 0x28, 0x80, 0x30, 
-0xcb, 0x80, 0x30, 0xca, 0x90, 0x28, 0x80, 0x30, 0xc9, 0x80, 0x30, 0xc8, 
-0x90, 0x50, 0x90, 0x28, 0x80, 0x30, 0xc4, 0x80, 0x30, 0xc7, 0x90, 0x28, 
-0x80, 0x30, 0xc6, 0x80, 0x30, 0xc5, 0x90, 0xa0, 0x90, 0x50, 0x90, 0x28, 
-0x80, 0x30, 0xbc, 0x80, 0x30, 0xc3, 0x90, 0x28, 0x80, 0x30, 0xc2, 0x80, 
-0x30, 0xc1, 0x90, 0x50, 0x90, 0x28, 0x80, 0x30, 0xbd, 0x80, 0x30, 0xc0, 
-0x90, 0x28, 0x80, 0x30, 0xbf, 0x80, 0x30, 0xbe, 0x91, 0x88, 0x80, 0x90, 
-0xc0, 0x90, 0x60, 0x90, 0x28, 0x81, 0x31, 0x3b, 0x10, 0x10, 0x80, 0x31, 
-0x3a, 0x90, 0x28, 0x81, 0x31, 0x3d, 0x10, 0x10, 0x80, 0x31, 0x3c, 0x90, 
-0x60, 0x90, 0x28, 0x81, 0x31, 0x41, 0x10, 0x10, 0x80, 0x31, 0x40, 0x90, 
-0x28, 0x81, 0x31, 0x3f, 0x10, 0x10, 0x80, 0x31, 0x3e, 0x80, 0x10, 0x10, 
-0x10, 0x10, 0x90, 0x28, 0x81, 0x31, 0x38, 0x10, 0x10, 0x80, 0x31, 0x39, 
-0xa0, 0x0b, 0x90, 0xa0, 0x0a, 0xc8, 0x95, 0x60, 0x92, 0xb0, 0x91, 0x40, 
-0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x56, 0x80, 0x31, 0x55, 
-0x10, 0x10, 0x80, 0x31, 0x54, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x06, 0xe8, 
-0x31, 0x68, 0xa4, 0x06, 0xe0, 0x31, 0x67, 0x10, 0x10, 0xa4, 0x06, 0xd8, 
-0x31, 0x66, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x08, 0x08, 0x31, 
-0x8c, 0xa4, 0x08, 0x00, 0x31, 0x8b, 0x10, 0x10, 0xa4, 0x07, 0xf8, 0x31, 
-0x8a, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x07, 0x78, 0x31, 0x7a, 0xa4, 0x07, 
-0x70, 0x31, 0x79, 0x10, 0x10, 0xa4, 0x07, 0x68, 0x31, 0x78, 0x91, 0x40, 
-0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x51, 0x80, 0x31, 0x53, 
-0x10, 0x10, 0x80, 0x31, 0x52, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x06, 0xc0, 
-0x31, 0x63, 0xa4, 0x06, 0xd0, 0x31, 0x65, 0x10, 0x10, 0xa4, 0x06, 0xc8, 
-0x31, 0x64, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x07, 0xe0, 0x31, 
-0x87, 0xa4, 0x07, 0xf0, 0x31, 0x89, 0x10, 0x10, 0xa4, 0x07, 0xe8, 0x31, 
-0x88, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x07, 0x50, 0x31, 0x75, 0xa4, 0x07, 
-0x60, 0x31, 0x77, 0x10, 0x10, 0xa4, 0x07, 0x58, 0x31, 0x76, 0x92, 0xb0, 
-0x91, 0x40, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x4e, 0x80, 
-0x31, 0x50, 0x10, 0x10, 0x80, 0x31, 0x4f, 0x90, 0x70, 0x90, 0x38, 0xa4, 
-0x06, 0xa8, 0x31, 0x60, 0xa4, 0x06, 0xb8, 0x31, 0x62, 0x10, 0x10, 0xa4, 
-0x06, 0xb0, 0x31, 0x61, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x07, 
-0xc8, 0x31, 0x84, 0xa4, 0x07, 0xd8, 0x31, 0x86, 0x10, 0x10, 0xa4, 0x07, 
-0xd0, 0x31, 0x85, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x07, 0x38, 0x31, 0x72, 
-0xa4, 0x07, 0x48, 0x31, 0x74, 0x10, 0x10, 0xa4, 0x07, 0x40, 0x31, 0x73, 
-0x91, 0x40, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 0x31, 0x4b, 0x80, 
-0x31, 0x4d, 0x10, 0x10, 0x80, 0x31, 0x4c, 0x90, 0x70, 0x90, 0x38, 0xa4, 
-0x06, 0x90, 0x31, 0x5d, 0xa4, 0x06, 0xa0, 0x31, 0x5f, 0x10, 0x10, 0xa4, 
-0x06, 0x98, 0x31, 0x5e, 0x90, 0xb8, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x07, 
-0xb0, 0x31, 0x81, 0xa4, 0x07, 0xc0, 0x31, 0x83, 0x10, 0x10, 0xa4, 0x07, 
-0xb8, 0x31, 0x82, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x07, 0x20, 0x31, 0x6f, 
-0xa4, 0x07, 0x30, 0x31, 0x71, 0x10, 0x10, 0xa4, 0x07, 0x28, 0x31, 0x70, 
-0x10, 0x10, 0x80, 0x10, 0x10, 0x10, 0x10, 0x90, 0x50, 0x90, 0x28, 0x80, 
-0x31, 0x42, 0x80, 0x31, 0x44, 0x10, 0x10, 0x80, 0x31, 0x43, 0x80, 0x95, 
-0x60, 0x92, 0xb0, 0x91, 0x40, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 
-0x31, 0x48, 0x80, 0x31, 0x4a, 0x10, 0x10, 0x80, 0x31, 0x49, 0x90, 0x70, 
-0x90, 0x38, 0xa4, 0x06, 0x78, 0x31, 0x5a, 0xa4, 0x06, 0x88, 0x31, 0x5c, 
-0x10, 0x10, 0xa4, 0x06, 0x80, 0x31, 0x5b, 0x90, 0xb8, 0x90, 0x70, 0x90, 
-0x38, 0xa4, 0x07, 0x98, 0x31, 0x7e, 0xa4, 0x07, 0xa8, 0x31, 0x80, 0x10, 
-0x10, 0xa4, 0x07, 0xa0, 0x31, 0x7f, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x07, 
-0x08, 0x31, 0x6c, 0xa4, 0x07, 0x18, 0x31, 0x6e, 0x10, 0x10, 0xa4, 0x07, 
-0x10, 0x31, 0x6d, 0x91, 0x40, 0x90, 0x88, 0x90, 0x50, 0x90, 0x28, 0x80, 
-0x31, 0x45, 0x80, 0x31, 0x47, 0x10, 0x10, 0x80, 0x31, 0x46, 0x90, 0x70, 
-0x90, 0x38, 0xa4, 0x06, 0x60, 0x31, 0x57, 0xa4, 0x06, 0x70, 0x31, 0x59, 
-0x10, 0x10, 0xa4, 0x06, 0x68, 0x31, 0x58, 0x90, 0xb8, 0x90, 0x70, 0x90, 
-0x38, 0xa4, 0x07, 0x80, 0x31, 0x7b, 0xa4, 0x07, 0x90, 0x31, 0x7d, 0x10, 
-0x10, 0xa4, 0x07, 0x88, 0x31, 0x7c, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x06, 
-0xf0, 0x31, 0x69, 0xa4, 0x07, 0x00, 0x31, 0x6b, 0x10, 0x10, 0xa4, 0x06, 
-0xf8, 0x31, 0x6a, 0x10, 0x10, 0x91, 0x40, 0x90, 0xa0, 0x90, 0x50, 0x90, 
-0x28, 0x80, 0x30, 0xbb, 0x80, 0x30, 0xba, 0x90, 0x28, 0x80, 0x30, 0xb9, 
-0x80, 0x30, 0xb8, 0x90, 0x50, 0x90, 0x28, 0x80, 0x30, 0xb4, 0x80, 0x30, 
-0xb7, 0x90, 0x28, 0x80, 0x30, 0xb6, 0x80, 0x30, 0xb5, 0x90, 0xa0, 0x90, 
-0x50, 0x90, 0x28, 0x80, 0x30, 0xac, 0x80, 0x30, 0xb3, 0x90, 0x28, 0x80, 
-0x30, 0xb2, 0x80, 0x30, 0xb1, 0x90, 0x50, 0x90, 0x28, 0x80, 0x30, 0xad, 
-0x80, 0x30, 0xb0, 0x90, 0x28, 0x80, 0x30, 0xaf, 0x80, 0x30, 0xae, 0xc3, 
-0xc0, 0x30, 0x42, 0x9c, 0xe8, 0x07, 0x60, 0x91, 0x90, 0x90, 0xf0, 0x10, 
-0x10, 0x80, 0x88, 0x00, 0x80, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0xbc, 
-0x80, 0x33, 0xbd, 0x81, 0x33, 0xb3, 0xd0, 0x41, 0x80, 0x24, 0x1e, 0xb0, 
-0x24, 0x1e, 0xb8, 0x10, 0x10, 0x80, 0x90, 0x58, 0x80, 0x90, 0x28, 0x24, 
-0x1d, 0xb0, 0x24, 0x1d, 0xb8, 0x81, 0x24, 0x1d, 0x70, 0x92, 0x68, 0x91, 
-0x00, 0x80, 0x90, 0x90, 0x90, 0x30, 0x80, 0x24, 0x1e, 0x20, 0x90, 0x38, 
-0xa4, 0x1e, 0x18, 0x33, 0xca, 0x80, 0x33, 0xc9, 0x80, 0x90, 0x28, 0x80, 
-0x33, 0xd3, 0xa4, 0x1e, 0x00, 0x33, 0xd2, 0x80, 0x90, 0xc0, 0x90, 0x60, 
-0x90, 0x28, 0x80, 0x33, 0xcd, 0xa4, 0x1e, 0x10, 0x33, 0xcc, 0x90, 0x28, 
-0x80, 0x33, 0xc8, 0xa4, 0x1e, 0x08, 0x33, 0xc7, 0x90, 0x50, 0x90, 0x28, 
-0x80, 0x33, 0xd1, 0x80, 0x33, 0xd0, 0x90, 0x28, 0x24, 0x1e, 0xa8, 0x24, 
-0x1e, 0xa0, 0x90, 0x58, 0x80, 0x10, 0x10, 0x80, 0x10, 0x10, 0x80, 0x33, 
-0xbf, 0x80, 0x90, 0x40, 0x10, 0x10, 0x80, 0x24, 0x1d, 0x80, 0x80, 0x10, 
-0x10, 0x80, 0x33, 0xbe, 0x91, 0x58, 0x91, 0x00, 0x90, 0x80, 0x81, 0x90, 
-0x50, 0x90, 0x28, 0x80, 0x33, 0xba, 0x80, 0x33, 0xbb, 0x81, 0x33, 0xb2, 
-0x81, 0x90, 0x50, 0x90, 0x28, 0x80, 0x33, 0xb8, 0x80, 0x33, 0xb9, 0x81, 
-0x33, 0xb1, 0x83, 0x90, 0x28, 0x24, 0x1d, 0xa0, 0x24, 0x1d, 0xa8, 0x90, 
-0xe8, 0x81, 0x90, 0x88, 0x90, 0x38, 0x10, 0x10, 0x80, 0x33, 0xcb, 0x90, 
-0x28, 0x80, 0x33, 0xc6, 0x80, 0x33, 0xc5, 0x80, 0x90, 0x28, 0x80, 0x33, 
-0xcf, 0x80, 0x33, 0xce, 0x82, 0x10, 0x10, 0x80, 0x24, 0x1d, 0x78, 0x97, 
-0x10, 0x9e, 0x10, 0x06, 0x98, 0x93, 0x00, 0x91, 0x80, 0x90, 0xc0, 0x90, 
-0x60, 0x90, 0x38, 0xa4, 0x03, 0x80, 0x30, 0x71, 0x24, 0x03, 0x78, 0x90, 
-0x38, 0xa4, 0x04, 0x10, 0x30, 0x83, 0x24, 0x04, 0x08, 0x90, 0x60, 0x90, 
-0x38, 0xa4, 0x05, 0x30, 0x30, 0xa7, 0x24, 0x05, 0x28, 0x90, 0x38, 0xa4, 
-0x04, 0xa0, 0x30, 0x95, 0x24, 0x04, 0x98, 0x90, 0xc0, 0x90, 0x60, 0x90, 
-0x38, 0xa4, 0x03, 0x70, 0x30, 0x6c, 0x24, 0x03, 0x68, 0x90, 0x38, 0xa4, 
-0x04, 0x00, 0x30, 0x7e, 0x24, 0x03, 0xf8, 0x90, 0x60, 0x90, 0x38, 0xa4, 
-0x05, 0x20, 0x30, 0xa2, 0x24, 0x05, 0x18, 0x90, 0x38, 0xa4, 0x04, 0x90, 
-0x30, 0x90, 0x24, 0x04, 0x88, 0x91, 0x80, 0x90, 0xc0, 0x90, 0x60, 0x90, 
-0x38, 0xa4, 0x03, 0x58, 0x30, 0x69, 0x24, 0x03, 0x50, 0x90, 0x38, 0xa4, 
-0x03, 0xe8, 0x30, 0x7b, 0x24, 0x03, 0xe0, 0x90, 0x60, 0x90, 0x38, 0xa4, 
-0x05, 0x08, 0x30, 0x9f, 0x24, 0x05, 0x00, 0x90, 0x38, 0xa4, 0x04, 0x78, 
-0x30, 0x8d, 0x24, 0x04, 0x70, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 
-0x03, 0x40, 0x30, 0x66, 0x24, 0x03, 0x38, 0x90, 0x38, 0xa4, 0x03, 0xd0, 
-0x30, 0x78, 0x24, 0x03, 0xc8, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x04, 0xf0, 
-0x30, 0x9c, 0x24, 0x04, 0xe8, 0x90, 0x38, 0xa4, 0x04, 0x60, 0x30, 0x8a, 
-0x24, 0x04, 0x58, 0x10, 0x10, 0x80, 0x10, 0x10, 0x10, 0x10, 0x90, 0x38, 
-0xa4, 0x02, 0xf8, 0x30, 0x5d, 0x24, 0x02, 0xf0, 0xd7, 0x42, 0x00, 0xa4, 
-0x31, 0x78, 0x36, 0x31, 0xa4, 0x31, 0x58, 0x36, 0x2d, 0x9c, 0xe0, 0x06, 
-0x90, 0x93, 0x00, 0x91, 0x80, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 
-0x03, 0x28, 0x30, 0x63, 0x24, 0x03, 0x20, 0x90, 0x38, 0xa4, 0x03, 0xb8, 
-0x30, 0x75, 0x24, 0x03, 0xb0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x04, 0xd8, 
-0x30, 0x99, 0x24, 0x04, 0xd0, 0x90, 0x38, 0xa4, 0x04, 0x48, 0x30, 0x87, 
-0x24, 0x04, 0x40, 0x90, 0xc0, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x03, 0x10, 
-0x30, 0x60, 0x24, 0x03, 0x08, 0x90, 0x38, 0xa4, 0x03, 0xa0, 0x30, 0x72, 
-0x24, 0x03, 0x98, 0x90, 0x60, 0x90, 0x38, 0xa4, 0x04, 0xc0, 0x30, 0x96, 
-0x24, 0x04, 0xb8, 0x90, 0x38, 0xa4, 0x04, 0x30, 0x30, 0x84, 0x24, 0x04, 
-0x28, 0x10, 0x10, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x02, 0x88, 
-0x30, 0x52, 0xa4, 0x02, 0x78, 0x30, 0x50, 0x90, 0x38, 0xa4, 0x02, 0x70, 
-0x30, 0x4b, 0xa4, 0x02, 0x60, 0x30, 0x4d, 0x90, 0x70, 0x90, 0x38, 0xa4, 
-0x02, 0x50, 0x30, 0x43, 0xa4, 0x02, 0x40, 0x30, 0x49, 0x90, 0x38, 0xa4, 
-0x02, 0x38, 0x30, 0x44, 0xa4, 0x02, 0x28, 0x30, 0x46, 0x91, 0x48, 0x80, 
-0x90, 0xa0, 0x90, 0x50, 0x90, 0x28, 0x80, 0x30, 0x56, 0x24, 0x02, 0xa8, 
-0x90, 0x28, 0x80, 0x30, 0x58, 0x24, 0x02, 0xb8, 0x90, 0x50, 0x90, 0x28, 
-0x80, 0x30, 0x5c, 0x24, 0x02, 0xd8, 0x90, 0x28, 0x80, 0x30, 0x5a, 0x24, 
-0x02, 0xc8, 0x80, 0x10, 0x10, 0x10, 0x10, 0x90, 0x28, 0x80, 0x30, 0x53, 
-0x24, 0x02, 0xa0, 0xd7, 0x42, 0x00, 0xa4, 0x31, 0x80, 0x36, 0x32, 0xa4, 
-0x31, 0x60, 0x36, 0x2e, 0xa0, 0x14, 0x90, 0xa0, 0x10, 0xb8, 0xa0, 0x0c, 
-0x88, 0x9e, 0x88, 0x09, 0xd0, 0x94, 0xf0, 0x90, 0xb0, 0x88, 0x00, 0x68, 
-0x84, 0x10, 0x10, 0xc9, 0xe1, 0x2c, 0x40, 0x85, 0x34, 0xcd, 0xcb, 0x61, 
-0x25, 0x00, 0x85, 0x34, 0xa3, 0x9a, 0x00, 0x03, 0xf8, 0x91, 0x98, 0x80, 
-0x91, 0x10, 0x90, 0xa0, 0x90, 0x68, 0x90, 0x20, 0x38, 0x96, 0xc9, 0xe2, 
-0x25, 0x00, 0x85, 0x34, 0xcb, 0xa4, 0x44, 0x90, 0x38, 0x93, 0x90, 0x38, 
-0xa4, 0x44, 0x58, 0x38, 0x8c, 0xa4, 0x44, 0x48, 0x38, 0x8a, 0x90, 0x48, 
-0x10, 0x10, 0xa4, 0x44, 0x10, 0x38, 0x83, 0x10, 0x10, 0x80, 0x38, 0x7f, 
-0x81, 0x10, 0x10, 0x80, 0xa4, 0x43, 0xe0, 0x38, 0x7d, 0x91, 0xb0, 0x91, 
-0x60, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x44, 0x80, 0x38, 0x91, 
-0xa4, 0x44, 0x70, 0x38, 0x8f, 0x90, 0x38, 0xa4, 0x44, 0x38, 0x38, 0x88, 
-0xa4, 0x44, 0x28, 0x38, 0x86, 0x90, 0x48, 0x10, 0x10, 0xa4, 0x44, 0x00, 
-0x38, 0x81, 0x10, 0x10, 0x80, 0x38, 0x7e, 0x90, 0x28, 0x80, 0x38, 0x77, 
-0x80, 0x38, 0x76, 0x81, 0x10, 0x10, 0x80, 0xa4, 0x43, 0xd0, 0x38, 0x7b, 
-0xcb, 0x61, 0x24, 0xc0, 0x85, 0x34, 0xa2, 0x90, 0xd8, 0x88, 0x00, 0x90, 
-0x84, 0x90, 0x38, 0xc1, 0xc0, 0x85, 0x38, 0x9a, 0xc9, 0xe1, 0x2c, 0x00, 
-0x85, 0x34, 0xc9, 0xcb, 0x61, 0x24, 0x80, 0x85, 0x34, 0xa1, 0x88, 0x00, 
-0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x2b, 0xc0, 0x85, 0x34, 0xc7, 0xcb, 
-0x61, 0x24, 0x40, 0x85, 0x34, 0xa0, 0x91, 0xf8, 0x90, 0xb0, 0x88, 0x00, 
-0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x2b, 0x40, 0x85, 0x34, 0xc3, 0xcb, 
-0x61, 0x23, 0xc0, 0x85, 0x34, 0x9e, 0x88, 0x01, 0x00, 0x90, 0xa0, 0x81, 
-0x90, 0x70, 0x80, 0x90, 0x20, 0x38, 0x8d, 0xc9, 0xe1, 0x2b, 0x00, 0x85, 
-0x34, 0xc1, 0x81, 0x38, 0x84, 0x81, 0x10, 0x10, 0x80, 0xa4, 0x43, 0xc0, 
-0x38, 0x79, 0xcb, 0x61, 0x23, 0x80, 0x85, 0x34, 0x9d, 0x90, 0xb0, 0x88, 
-0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x2a, 0xc0, 0x85, 0x34, 0xbf, 
-0xcb, 0x61, 0x23, 0x40, 0x85, 0x34, 0x9c, 0x88, 0x00, 0x68, 0x84, 0x10, 
-0x10, 0xc9, 0xe1, 0x2a, 0x80, 0x85, 0x34, 0xbd, 0xcb, 0x61, 0x23, 0x00, 
-0x85, 0x34, 0x9b, 0x92, 0x38, 0x81, 0x91, 0x68, 0x91, 0x18, 0x90, 0x80, 
-0x90, 0x40, 0x80, 0xa4, 0x45, 0x48, 0x38, 0xaa, 0x80, 0xa4, 0x45, 0x40, 
-0x38, 0xa7, 0x90, 0x28, 0x81, 0x38, 0xa6, 0x90, 0x38, 0xa4, 0x45, 0x20, 
-0x38, 0xa5, 0xa4, 0x45, 0x10, 0x38, 0xa3, 0x90, 0x28, 0x80, 0x38, 0xa1, 
-0x80, 0x38, 0xa0, 0x80, 0x90, 0x40, 0x10, 0x10, 0x80, 0x24, 0x44, 0xf8, 
-0x10, 0x10, 0x90, 0x38, 0xa4, 0x44, 0xe8, 0x38, 0x9e, 0xa4, 0x44, 0xd8, 
-0x38, 0x9c, 0x90, 0x50, 0x80, 0xc9, 0xa2, 0x26, 0x00, 0x85, 0x38, 0x99, 
-0x80, 0x38, 0x97, 0x9a, 0xd0, 0x03, 0xe0, 0x91, 0x60, 0x90, 0xb0, 0x88, 
-0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x2a, 0x00, 0x85, 0x34, 0xb9, 
-0xcb, 0x61, 0x22, 0x80, 0x85, 0x34, 0x99, 0x88, 0x00, 0x68, 0x84, 0x10, 
-0x10, 0xc9, 0xe1, 0x29, 0xc0, 0x85, 0x34, 0xb7, 0xcb, 0x61, 0x22, 0x40, 
-0x85, 0x34, 0x98, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 
-0xe1, 0x29, 0x80, 0x85, 0x34, 0xb5, 0xcb, 0x61, 0x22, 0x00, 0x85, 0x34, 
-0x97, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x29, 0x40, 0x85, 
-0x34, 0xb3, 0xcb, 0x61, 0x21, 0xc0, 0x85, 0x34, 0x96, 0x90, 0x90, 0x90, 
-0x48, 0xcb, 0xa1, 0x20, 0x00, 0x85, 0x34, 0x85, 0xcb, 0xa1, 0x1f, 0xc0, 
-0x85, 0x34, 0x84, 0x90, 0x48, 0xcb, 0xa1, 0x1f, 0x80, 0x85, 0x34, 0x83, 
-0xcb, 0xa1, 0x1f, 0x40, 0x85, 0x34, 0x82, 0xcb, 0xa2, 0x1d, 0x00, 0x80, 
-0x38, 0x75, 0x92, 0x40, 0x91, 0x20, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x23, 
-0x60, 0x84, 0x24, 0x23, 0xd8, 0x8c, 0x23, 0x58, 0x84, 0x24, 0x23, 0xd0, 
-0x90, 0x48, 0x8c, 0x23, 0x50, 0x84, 0x24, 0x23, 0xc8, 0x8c, 0x23, 0x48, 
-0x84, 0x24, 0x23, 0xc0, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x23, 0x38, 0x84, 
-0x24, 0x23, 0xb0, 0x8c, 0x23, 0x30, 0x84, 0x24, 0x23, 0xa8, 0x90, 0x48, 
-0x8c, 0x23, 0x28, 0x84, 0x24, 0x23, 0xa0, 0x8c, 0x23, 0x20, 0x84, 0x24, 
-0x23, 0x98, 0x91, 0x20, 0x90, 0x90, 0x90, 0x48, 0x8c, 0x23, 0x10, 0x84, 
-0x24, 0x23, 0x88, 0x8c, 0x23, 0x08, 0x84, 0x24, 0x23, 0x80, 0x90, 0x48, 
-0x8c, 0x23, 0x00, 0x84, 0x24, 0x23, 0x78, 0x8c, 0x22, 0xf8, 0x84, 0x24, 
-0x23, 0x70, 0x90, 0x38, 0xa4, 0x22, 0xe0, 0x34, 0x5d, 0xa4, 0x22, 0xd0, 
-0x34, 0x5b, 0xa0, 0x0f, 0x50, 0xa0, 0x09, 0x08, 0x9a, 0x30, 0x04, 0x40, 
-0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x1c, 0x00, 
-0x38, 0x6c, 0xe5, 0x22, 0x18, 0x00, 0x38, 0x6a, 0xcb, 0x61, 0x12, 0x40, 
-0x85, 0x34, 0x58, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x14, 0x00, 0x38, 
-0x4c, 0xe5, 0x22, 0x10, 0x00, 0x38, 0x4a, 0xcb, 0x61, 0x12, 0x00, 0x85, 
-0x34, 0x57, 0x90, 0x48, 0xcb, 0xa1, 0x11, 0xc0, 0x85, 0x34, 0x56, 0xcb, 
-0xa1, 0x11, 0x80, 0x85, 0x34, 0x55, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 
-0x00, 0x80, 0xe5, 0x22, 0x09, 0x00, 0x38, 0x30, 0xe5, 0x22, 0x03, 0x00, 
-0x38, 0x18, 0xcb, 0x61, 0x11, 0x00, 0x85, 0x34, 0x53, 0x98, 0x50, 0x00, 
-0x80, 0xe5, 0x21, 0xfd, 0x00, 0x38, 0x00, 0xe5, 0x21, 0xf7, 0x00, 0x37, 
-0xe8, 0xcb, 0x61, 0x10, 0xc0, 0x85, 0x34, 0x52, 0x90, 0x48, 0xcb, 0xa1, 
-0x10, 0x80, 0x85, 0x34, 0x51, 0xcb, 0xa1, 0x10, 0x40, 0x85, 0x34, 0x50, 
-0x92, 0x20, 0x91, 0x30, 0x90, 0xb8, 0xd5, 0x03, 0x00, 0xc0, 0xc0, 0x81, 
-0x8c, 0x01, 0xa0, 0x84, 0x30, 0x3e, 0xc0, 0xc0, 0x81, 0x8c, 0x01, 0x80, 
-0x84, 0x30, 0x3c, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81, 0x30, 0x28, 0xc0, 
-0xc0, 0x81, 0x30, 0x24, 0x90, 0x78, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81, 
-0x30, 0x1c, 0xc0, 0xc0, 0x81, 0x30, 0x18, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 
-0x81, 0x30, 0x10, 0xc0, 0xc0, 0x81, 0x30, 0x0c, 0x91, 0x70, 0x90, 0xd8, 
-0xd5, 0x03, 0x80, 0xc8, 0xe1, 0xf3, 0x00, 0x81, 0x8c, 0x01, 0xc0, 0x84, 
-0x30, 0x40, 0xc8, 0xe1, 0xf4, 0x00, 0x81, 0x8c, 0x01, 0x90, 0x84, 0x30, 
-0x3d, 0xd5, 0x02, 0x80, 0xc8, 0xe1, 0xf2, 0x80, 0x81, 0x30, 0x2c, 0xc8, 
-0xe1, 0xef, 0x80, 0x81, 0x30, 0x26, 0x90, 0x98, 0xd5, 0x02, 0x80, 0xc8, 
-0xe1, 0xe9, 0x80, 0x81, 0x30, 0x20, 0xc8, 0xe1, 0xea, 0x80, 0x81, 0x30, 
-0x1a, 0xd5, 0x02, 0x80, 0xc8, 0xe1, 0xe9, 0x00, 0x81, 0x30, 0x14, 0xc8, 
-0xe1, 0xe6, 0x00, 0x81, 0x30, 0x0e, 0x9a, 0x30, 0x04, 0x40, 0x91, 0x90, 
-0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x16, 0x00, 0x38, 0x54, 
-0xe5, 0x22, 0x17, 0x00, 0x38, 0x66, 0xcb, 0x61, 0x0f, 0xc0, 0x85, 0x34, 
-0x4e, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 0x0e, 0x00, 0x38, 0x34, 0xe5, 
-0x22, 0x0f, 0x00, 0x38, 0x46, 0xcb, 0x61, 0x0f, 0x80, 0x85, 0x34, 0x4d, 
-0x90, 0x48, 0xcb, 0xa1, 0x0f, 0x40, 0x85, 0x34, 0x4c, 0xcb, 0xa1, 0x0f, 
-0x00, 0x85, 0x34, 0x4b, 0x91, 0x90, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 
-0xe5, 0x22, 0x07, 0x00, 0x38, 0x28, 0xe5, 0x22, 0x01, 0x00, 0x38, 0x10, 
-0xcb, 0x61, 0x0d, 0x40, 0x85, 0x34, 0x3a, 0x98, 0x50, 0x00, 0x80, 0xe5, 
-0x21, 0xfb, 0x00, 0x37, 0xf8, 0xe5, 0x21, 0xf5, 0x00, 0x37, 0xe0, 0xcb, 
-0x61, 0x0d, 0x00, 0x85, 0x34, 0x39, 0x90, 0x48, 0xcb, 0xa1, 0x0c, 0xc0, 
-0x85, 0x34, 0x38, 0xcb, 0xa1, 0x0c, 0x80, 0x85, 0x34, 0x37, 0x91, 0x00, 
-0x90, 0x80, 0x90, 0x40, 0xe5, 0x20, 0x02, 0x40, 0x30, 0x0a, 0xe5, 0x20, 
-0x01, 0x80, 0x30, 0x07, 0x90, 0x40, 0xe5, 0x20, 0x00, 0xc0, 0x30, 0x04, 
-0xe5, 0x20, 0x00, 0x00, 0x30, 0x01, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x21, 
-0xed, 0x00, 0x37, 0xae, 0xe5, 0x21, 0xee, 0x40, 0x37, 0xc4, 0x90, 0x40, 
-0xe5, 0x21, 0xe3, 0x80, 0x37, 0x88, 0xe5, 0x21, 0xe4, 0xc0, 0x37, 0x9e, 
-0x80, 0x99, 0x28, 0x02, 0xf0, 0x8c, 0x21, 0x48, 0x90, 0x80, 0x90, 0x40, 
-0xe5, 0x22, 0x19, 0x00, 0x38, 0x62, 0xe5, 0x22, 0x17, 0x80, 0x38, 0x68, 
-0x90, 0x40, 0xe5, 0x22, 0x11, 0x00, 0x38, 0x42, 0xe5, 0x22, 0x0f, 0x80, 
-0x38, 0x48, 0x91, 0x48, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, 
-0x08, 0x00, 0x38, 0x2c, 0xe5, 0x22, 0x02, 0x00, 0x38, 0x14, 0xcb, 0x61, 
-0x0b, 0x00, 0x85, 0x34, 0x30, 0x90, 0x40, 0xe5, 0x21, 0xfc, 0x00, 0x37, 
-0xfc, 0xe5, 0x21, 0xf6, 0x00, 0x37, 0xe4, 0x90, 0x48, 0xcb, 0xa1, 0x0a, 
-0x80, 0x85, 0x34, 0x2e, 0xcb, 0xa1, 0x0a, 0xc0, 0x85, 0x34, 0x2f, 0x10, 
-0x10, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x21, 0xf0, 0x80, 0x37, 0xc0, 0xe5, 
-0x21, 0xef, 0x00, 0x37, 0xc8, 0x90, 0x40, 0xe5, 0x21, 0xe7, 0x00, 0x37, 
-0x9a, 0xe5, 0x21, 0xe5, 0x80, 0x37, 0xa2, 
-};
-
-static const struct ia64_dis_names ia64_dis_names[] = {
-{ 0x51, 40, 0, 9 },
-{ 0x31, 40, 1, 19 },
-{ 0x11, 41, 0, 18 },
-{ 0x29, 40, 0, 11 },
-{ 0x19, 40, 1, 23 },
-{ 0x9, 41, 0, 22 },
-{ 0x15, 40, 0, 13 },
-{ 0xd, 40, 1, 27 },
-{ 0x5, 41, 0, 26 },
-{ 0xb, 40, 0, 15 },
-{ 0x7, 40, 1, 31 },
-{ 0x3, 41, 0, 30 },
-{ 0x51, 38, 1, 57 },
-{ 0x50, 38, 0, 33 },
-{ 0xd1, 38, 1, 56 },
-{ 0xd0, 38, 0, 32 },
-{ 0x31, 38, 1, 67 },
-{ 0x30, 38, 1, 43 },
-{ 0x11, 39, 1, 66 },
-{ 0x10, 39, 0, 42 },
-{ 0x71, 38, 1, 65 },
-{ 0x70, 38, 1, 41 },
-{ 0x31, 39, 1, 64 },
-{ 0x30, 39, 0, 40 },
-{ 0x29, 38, 1, 59 },
-{ 0x28, 38, 0, 35 },
-{ 0x69, 38, 1, 58 },
-{ 0x68, 38, 0, 34 },
-{ 0x19, 38, 1, 71 },
-{ 0x18, 38, 1, 47 },
-{ 0x9, 39, 1, 70 },
-{ 0x8, 39, 0, 46 },
-{ 0x39, 38, 1, 69 },
-{ 0x38, 38, 1, 45 },
-{ 0x19, 39, 1, 68 },
-{ 0x18, 39, 0, 44 },
-{ 0x15, 38, 1, 61 },
-{ 0x14, 38, 0, 37 },
-{ 0x35, 38, 1, 60 },
-{ 0x34, 38, 0, 36 },
-{ 0xd, 38, 1, 75 },
-{ 0xc, 38, 1, 51 },
-{ 0x5, 39, 1, 74 },
-{ 0x4, 39, 0, 50 },
-{ 0x1d, 38, 1, 73 },
-{ 0x1c, 38, 1, 49 },
-{ 0xd, 39, 1, 72 },
-{ 0xc, 39, 0, 48 },
-{ 0xb, 38, 1, 63 },
-{ 0xa, 38, 0, 39 },
-{ 0x1b, 38, 1, 62 },
-{ 0x1a, 38, 0, 38 },
-{ 0x7, 38, 1, 79 },
-{ 0x6, 38, 1, 55 },
-{ 0x3, 39, 1, 78 },
-{ 0x2, 39, 0, 54 },
-{ 0xf, 38, 1, 77 },
-{ 0xe, 38, 1, 53 },
-{ 0x7, 39, 1, 76 },
-{ 0x6, 39, 0, 52 },
-{ 0x8, 37, 0, 81 },
-{ 0x18, 37, 0, 80 },
-{ 0x1, 37, 1, 85 },
-{ 0x2, 37, 0, 84 },
-{ 0x3, 37, 1, 83 },
-{ 0x4, 37, 0, 82 },
-{ 0x1, 284, 0, 86 },
-{ 0x20, 237, 0, 96 },
-{ 0x220, 237, 0, 92 },
-{ 0x1220, 237, 0, 89 },
-{ 0xa20, 237, 0, 90 },
-{ 0x620, 237, 0, 91 },
-{ 0x120, 237, 0, 93 },
-{ 0xa0, 237, 0, 94 },
-{ 0x60, 237, 0, 95 },
-{ 0x10, 237, 0, 100 },
-{ 0x90, 237, 0, 97 },
-{ 0x50, 237, 0, 98 },
-{ 0x30, 237, 0, 99 },
-{ 0x8, 237, 0, 101 },
-{ 0x4, 237, 0, 102 },
-{ 0x2, 237, 0, 103 },
-{ 0x1, 237, 0, 104 },
-{ 0x1, 357, 0, 106 },
-{ 0x3, 357, 0, 105 },
-{ 0x2, 363, 0, 107 },
-{ 0x1, 363, 0, 108 },
-{ 0x2, 359, 0, 109 },
-{ 0x1, 359, 0, 110 },
-{ 0x2, 361, 0, 111 },
-{ 0x1, 361, 0, 112 },
-{ 0x2, 365, 0, 113 },
-{ 0x1, 365, 0, 114 },
-{ 0x1, 216, 0, 141 },
-{ 0x5, 216, 0, 139 },
-{ 0x3, 216, 0, 140 },
-{ 0x140, 225, 0, 117 },
-{ 0x540, 225, 0, 115 },
-{ 0x340, 225, 0, 116 },
-{ 0xc0, 225, 0, 129 },
-{ 0x2c0, 225, 0, 127 },
-{ 0x1c0, 225, 0, 128 },
-{ 0x20, 225, 0, 144 },
-{ 0xa0, 225, 0, 142 },
-{ 0x60, 225, 0, 143 },
-{ 0x10, 225, 0, 156 },
-{ 0x50, 225, 0, 154 },
-{ 0x30, 225, 0, 155 },
-{ 0x8, 225, 0, 168 },
-{ 0x28, 225, 0, 166 },
-{ 0x18, 225, 0, 167 },
-{ 0x4, 225, 0, 178 },
-{ 0x2, 225, 0, 179 },
-{ 0x1, 225, 0, 180 },
-{ 0x140, 219, 0, 120 },
-{ 0x540, 219, 0, 118 },
-{ 0x340, 219, 0, 119 },
-{ 0xc0, 219, 0, 132 },
-{ 0x2c0, 219, 0, 130 },
-{ 0x1c0, 219, 0, 131 },
-{ 0x20, 219, 0, 147 },
-{ 0xa0, 219, 0, 145 },
-{ 0x60, 219, 0, 146 },
-{ 0x10, 219, 0, 159 },
-{ 0x50, 219, 0, 157 },
-{ 0x30, 219, 0, 158 },
-{ 0x8, 219, 0, 171 },
-{ 0x28, 219, 0, 169 },
-{ 0x18, 219, 0, 170 },
-{ 0x4, 219, 0, 181 },
-{ 0x2, 219, 0, 182 },
-{ 0x1, 219, 0, 183 },
-{ 0x140, 222, 0, 123 },
-{ 0x540, 222, 0, 121 },
-{ 0x340, 222, 0, 122 },
-{ 0xc0, 222, 0, 135 },
-{ 0x2c0, 222, 0, 133 },
-{ 0x1c0, 222, 0, 134 },
-{ 0x20, 222, 0, 150 },
-{ 0xa0, 222, 0, 148 },
-{ 0x60, 222, 0, 149 },
-{ 0x10, 222, 0, 162 },
-{ 0x50, 222, 0, 160 },
-{ 0x30, 222, 0, 161 },
-{ 0x8, 222, 0, 174 },
-{ 0x28, 222, 0, 172 },
-{ 0x18, 222, 0, 173 },
-{ 0x4, 222, 0, 184 },
-{ 0x2, 222, 0, 185 },
-{ 0x1, 222, 0, 186 },
-{ 0x140, 234, 0, 126 },
-{ 0x540, 234, 0, 124 },
-{ 0x340, 234, 0, 125 },
-{ 0xc0, 234, 0, 138 },
-{ 0x2c0, 234, 0, 136 },
-{ 0x1c0, 234, 0, 137 },
-{ 0x20, 234, 0, 153 },
-{ 0xa0, 234, 0, 151 },
-{ 0x60, 234, 0, 152 },
-{ 0x10, 234, 0, 165 },
-{ 0x50, 234, 0, 163 },
-{ 0x30, 234, 0, 164 },
-{ 0x8, 234, 0, 177 },
-{ 0x28, 234, 0, 175 },
-{ 0x18, 234, 0, 176 },
-{ 0x4, 234, 0, 187 },
-{ 0x2, 234, 0, 188 },
-{ 0x1, 234, 0, 189 },
-{ 0x8, 338, 0, 190 },
-{ 0x4, 338, 0, 191 },
-{ 0x2, 338, 0, 192 },
-{ 0x1, 338, 0, 193 },
-{ 0x20, 236, 0, 201 },
-{ 0x220, 236, 0, 197 },
-{ 0x1220, 236, 0, 194 },
-{ 0xa20, 236, 0, 195 },
-{ 0x620, 236, 0, 196 },
-{ 0x120, 236, 0, 198 },
-{ 0xa0, 236, 0, 199 },
-{ 0x60, 236, 0, 200 },
-{ 0x10, 236, 0, 205 },
-{ 0x90, 236, 0, 202 },
-{ 0x50, 236, 0, 203 },
-{ 0x30, 236, 0, 204 },
-{ 0x8, 236, 0, 206 },
-{ 0x4, 236, 0, 207 },
-{ 0x2, 236, 0, 208 },
-{ 0x1, 236, 0, 209 },
-{ 0x20, 235, 0, 217 },
-{ 0x220, 235, 0, 213 },
-{ 0x1220, 235, 0, 210 },
-{ 0xa20, 235, 0, 211 },
-{ 0x620, 235, 0, 212 },
-{ 0x120, 235, 0, 214 },
-{ 0xa0, 235, 0, 215 },
-{ 0x60, 235, 0, 216 },
-{ 0x10, 235, 0, 221 },
-{ 0x90, 235, 0, 218 },
-{ 0x50, 235, 0, 219 },
-{ 0x30, 235, 0, 220 },
-{ 0x8, 235, 0, 222 },
-{ 0x4, 235, 0, 223 },
-{ 0x2, 235, 0, 224 },
-{ 0x1, 235, 0, 225 },
-{ 0x140, 227, 0, 228 },
-{ 0x540, 227, 0, 226 },
-{ 0x340, 227, 0, 227 },
-{ 0xc0, 227, 0, 237 },
-{ 0x2c0, 227, 0, 235 },
-{ 0x1c0, 227, 0, 236 },
-{ 0x20, 227, 0, 246 },
-{ 0xa0, 227, 0, 244 },
-{ 0x60, 227, 0, 245 },
-{ 0x10, 227, 0, 255 },
-{ 0x50, 227, 0, 253 },
-{ 0x30, 227, 0, 254 },
-{ 0x8, 227, 0, 264 },
-{ 0x28, 227, 0, 262 },
-{ 0x18, 227, 0, 263 },
-{ 0x4, 227, 0, 271 },
-{ 0x2, 227, 0, 272 },
-{ 0x1, 227, 0, 273 },
-{ 0x140, 229, 0, 231 },
-{ 0x540, 229, 0, 229 },
-{ 0x340, 229, 0, 230 },
-{ 0xc0, 229, 0, 240 },
-{ 0x2c0, 229, 0, 238 },
-{ 0x1c0, 229, 0, 239 },
-{ 0x20, 229, 0, 249 },
-{ 0xa0, 229, 0, 247 },
-{ 0x60, 229, 0, 248 },
-{ 0x10, 229, 0, 258 },
-{ 0x50, 229, 0, 256 },
-{ 0x30, 229, 0, 257 },
-{ 0x8, 229, 0, 267 },
-{ 0x28, 229, 0, 265 },
-{ 0x18, 229, 0, 266 },
-{ 0x4, 229, 0, 274 },
-{ 0x2, 229, 0, 275 },
-{ 0x1, 229, 0, 276 },
-{ 0x140, 231, 0, 234 },
-{ 0x540, 231, 0, 232 },
-{ 0x340, 231, 0, 233 },
-{ 0xc0, 231, 0, 243 },
-{ 0x2c0, 231, 0, 241 },
-{ 0x1c0, 231, 0, 242 },
-{ 0x20, 231, 0, 252 },
-{ 0xa0, 231, 0, 250 },
-{ 0x60, 231, 0, 251 },
-{ 0x10, 231, 0, 261 },
-{ 0x50, 231, 0, 259 },
-{ 0x30, 231, 0, 260 },
-{ 0x8, 231, 0, 270 },
-{ 0x28, 231, 0, 268 },
-{ 0x18, 231, 0, 269 },
-{ 0x4, 231, 0, 277 },
-{ 0x2, 231, 0, 278 },
-{ 0x1, 231, 0, 279 },
-{ 0x140, 226, 0, 282 },
-{ 0x540, 226, 0, 280 },
-{ 0x340, 226, 0, 281 },
-{ 0xc0, 226, 0, 291 },
-{ 0x2c0, 226, 0, 289 },
-{ 0x1c0, 226, 0, 290 },
-{ 0x20, 226, 0, 300 },
-{ 0xa0, 226, 0, 298 },
-{ 0x60, 226, 0, 299 },
-{ 0x10, 226, 0, 309 },
-{ 0x50, 226, 0, 307 },
-{ 0x30, 226, 0, 308 },
-{ 0x8, 226, 0, 318 },
-{ 0x28, 226, 0, 316 },
-{ 0x18, 226, 0, 317 },
-{ 0x4, 226, 0, 325 },
-{ 0x2, 226, 0, 326 },
-{ 0x1, 226, 0, 327 },
-{ 0x140, 228, 0, 285 },
-{ 0x540, 228, 0, 283 },
-{ 0x340, 228, 0, 284 },
-{ 0xc0, 228, 0, 294 },
-{ 0x2c0, 228, 0, 292 },
-{ 0x1c0, 228, 0, 293 },
-{ 0x20, 228, 0, 303 },
-{ 0xa0, 228, 0, 301 },
-{ 0x60, 228, 0, 302 },
-{ 0x10, 228, 0, 312 },
-{ 0x50, 228, 0, 310 },
-{ 0x30, 228, 0, 311 },
-{ 0x8, 228, 0, 321 },
-{ 0x28, 228, 0, 319 },
-{ 0x18, 228, 0, 320 },
-{ 0x4, 228, 0, 328 },
-{ 0x2, 228, 0, 329 },
-{ 0x1, 228, 0, 330 },
-{ 0x140, 230, 0, 288 },
-{ 0x540, 230, 0, 286 },
-{ 0x340, 230, 0, 287 },
-{ 0xc0, 230, 0, 297 },
-{ 0x2c0, 230, 0, 295 },
-{ 0x1c0, 230, 0, 296 },
-{ 0x20, 230, 0, 306 },
-{ 0xa0, 230, 0, 304 },
-{ 0x60, 230, 0, 305 },
-{ 0x10, 230, 0, 315 },
-{ 0x50, 230, 0, 313 },
-{ 0x30, 230, 0, 314 },
-{ 0x8, 230, 0, 324 },
-{ 0x28, 230, 0, 322 },
-{ 0x18, 230, 0, 323 },
-{ 0x4, 230, 0, 331 },
-{ 0x2, 230, 0, 332 },
-{ 0x1, 230, 0, 333 },
-{ 0x1, 356, 0, 335 },
-{ 0x3, 356, 0, 334 },
-{ 0x2, 362, 0, 336 },
-{ 0x1, 362, 0, 337 },
-{ 0x2, 358, 0, 338 },
-{ 0x1, 358, 0, 339 },
-{ 0x2, 360, 0, 340 },
-{ 0x1, 360, 0, 341 },
-{ 0x2, 364, 0, 342 },
-{ 0x1, 364, 0, 343 },
-{ 0x1, 215, 0, 370 },
-{ 0x5, 215, 0, 368 },
-{ 0x3, 215, 0, 369 },
-{ 0x140, 224, 0, 346 },
-{ 0x540, 224, 0, 344 },
-{ 0x340, 224, 0, 345 },
-{ 0xc0, 224, 0, 358 },
-{ 0x2c0, 224, 0, 356 },
-{ 0x1c0, 224, 0, 357 },
-{ 0x20, 224, 0, 373 },
-{ 0xa0, 224, 0, 371 },
-{ 0x60, 224, 0, 372 },
-{ 0x10, 224, 0, 385 },
-{ 0x50, 224, 0, 383 },
-{ 0x30, 224, 0, 384 },
-{ 0x8, 224, 0, 397 },
-{ 0x28, 224, 0, 395 },
-{ 0x18, 224, 0, 396 },
-{ 0x4, 224, 0, 407 },
-{ 0x2, 224, 0, 408 },
-{ 0x1, 224, 0, 409 },
-{ 0x140, 218, 0, 349 },
-{ 0x540, 218, 0, 347 },
-{ 0x340, 218, 0, 348 },
-{ 0xc0, 218, 0, 361 },
-{ 0x2c0, 218, 0, 359 },
-{ 0x1c0, 218, 0, 360 },
-{ 0x20, 218, 0, 376 },
-{ 0xa0, 218, 0, 374 },
-{ 0x60, 218, 0, 375 },
-{ 0x10, 218, 0, 388 },
-{ 0x50, 218, 0, 386 },
-{ 0x30, 218, 0, 387 },
-{ 0x8, 218, 0, 400 },
-{ 0x28, 218, 0, 398 },
-{ 0x18, 218, 0, 399 },
-{ 0x4, 218, 0, 410 },
-{ 0x2, 218, 0, 411 },
-{ 0x1, 218, 0, 412 },
-{ 0x140, 221, 0, 352 },
-{ 0x540, 221, 0, 350 },
-{ 0x340, 221, 0, 351 },
-{ 0xc0, 221, 0, 364 },
-{ 0x2c0, 221, 0, 362 },
-{ 0x1c0, 221, 0, 363 },
-{ 0x20, 221, 0, 379 },
-{ 0xa0, 221, 0, 377 },
-{ 0x60, 221, 0, 378 },
-{ 0x10, 221, 0, 391 },
-{ 0x50, 221, 0, 389 },
-{ 0x30, 221, 0, 390 },
-{ 0x8, 221, 0, 403 },
-{ 0x28, 221, 0, 401 },
-{ 0x18, 221, 0, 402 },
-{ 0x4, 221, 0, 413 },
-{ 0x2, 221, 0, 414 },
-{ 0x1, 221, 0, 415 },
-{ 0x140, 233, 0, 355 },
-{ 0x540, 233, 0, 353 },
-{ 0x340, 233, 0, 354 },
-{ 0xc0, 233, 0, 367 },
-{ 0x2c0, 233, 0, 365 },
-{ 0x1c0, 233, 0, 366 },
-{ 0x20, 233, 0, 382 },
-{ 0xa0, 233, 0, 380 },
-{ 0x60, 233, 0, 381 },
-{ 0x10, 233, 0, 394 },
-{ 0x50, 233, 0, 392 },
-{ 0x30, 233, 0, 393 },
-{ 0x8, 233, 0, 406 },
-{ 0x28, 233, 0, 404 },
-{ 0x18, 233, 0, 405 },
-{ 0x4, 233, 0, 416 },
-{ 0x2, 233, 0, 417 },
-{ 0x1, 233, 0, 418 },
-{ 0x1, 214, 0, 445 },
-{ 0x5, 214, 0, 443 },
-{ 0x3, 214, 0, 444 },
-{ 0x140, 223, 0, 421 },
-{ 0x540, 223, 0, 419 },
-{ 0x340, 223, 0, 420 },
-{ 0xc0, 223, 0, 433 },
-{ 0x2c0, 223, 0, 431 },
-{ 0x1c0, 223, 0, 432 },
-{ 0x20, 223, 0, 448 },
-{ 0xa0, 223, 0, 446 },
-{ 0x60, 223, 0, 447 },
-{ 0x10, 223, 0, 460 },
-{ 0x50, 223, 0, 458 },
-{ 0x30, 223, 0, 459 },
-{ 0x8, 223, 0, 472 },
-{ 0x28, 223, 0, 470 },
-{ 0x18, 223, 0, 471 },
-{ 0x4, 223, 0, 482 },
-{ 0x2, 223, 0, 483 },
-{ 0x1, 223, 0, 484 },
-{ 0x140, 217, 0, 424 },
-{ 0x540, 217, 0, 422 },
-{ 0x340, 217, 0, 423 },
-{ 0xc0, 217, 0, 436 },
-{ 0x2c0, 217, 0, 434 },
-{ 0x1c0, 217, 0, 435 },
-{ 0x20, 217, 0, 451 },
-{ 0xa0, 217, 0, 449 },
-{ 0x60, 217, 0, 450 },
-{ 0x10, 217, 0, 463 },
-{ 0x50, 217, 0, 461 },
-{ 0x30, 217, 0, 462 },
-{ 0x8, 217, 0, 475 },
-{ 0x28, 217, 0, 473 },
-{ 0x18, 217, 0, 474 },
-{ 0x4, 217, 0, 485 },
-{ 0x2, 217, 0, 486 },
-{ 0x1, 217, 0, 487 },
-{ 0x140, 220, 0, 427 },
-{ 0x540, 220, 0, 425 },
-{ 0x340, 220, 0, 426 },
-{ 0xc0, 220, 0, 439 },
-{ 0x2c0, 220, 0, 437 },
-{ 0x1c0, 220, 0, 438 },
-{ 0x20, 220, 0, 454 },
-{ 0xa0, 220, 0, 452 },
-{ 0x60, 220, 0, 453 },
-{ 0x10, 220, 0, 466 },
-{ 0x50, 220, 0, 464 },
-{ 0x30, 220, 0, 465 },
-{ 0x8, 220, 0, 478 },
-{ 0x28, 220, 0, 476 },
-{ 0x18, 220, 0, 477 },
-{ 0x4, 220, 0, 488 },
-{ 0x2, 220, 0, 489 },
-{ 0x1, 220, 0, 490 },
-{ 0x140, 232, 0, 430 },
-{ 0x540, 232, 0, 428 },
-{ 0x340, 232, 0, 429 },
-{ 0xc0, 232, 0, 442 },
-{ 0x2c0, 232, 0, 440 },
-{ 0x1c0, 232, 0, 441 },
-{ 0x20, 232, 0, 457 },
-{ 0xa0, 232, 0, 455 },
-{ 0x60, 232, 0, 456 },
-{ 0x10, 232, 0, 469 },
-{ 0x50, 232, 0, 467 },
-{ 0x30, 232, 0, 468 },
-{ 0x8, 232, 0, 481 },
-{ 0x28, 232, 0, 479 },
-{ 0x18, 232, 0, 480 },
-{ 0x4, 232, 0, 491 },
-{ 0x2, 232, 0, 492 },
-{ 0x1, 232, 0, 493 },
-{ 0x8, 355, 0, 495 },
-{ 0x18, 355, 0, 494 },
-{ 0x4, 355, 0, 497 },
-{ 0xc, 355, 0, 496 },
-{ 0x2, 355, 0, 504 },
-{ 0x1, 355, 0, 505 },
-{ 0x4, 353, 0, 499 },
-{ 0xc, 353, 0, 498 },
-{ 0x2, 353, 0, 506 },
-{ 0x1, 353, 0, 507 },
-{ 0x4, 351, 0, 501 },
-{ 0xc, 351, 0, 500 },
-{ 0x2, 351, 0, 508 },
-{ 0x1, 351, 0, 509 },
-{ 0x4, 349, 0, 503 },
-{ 0xc, 349, 0, 502 },
-{ 0x2, 349, 0, 510 },
-{ 0x1, 349, 0, 511 },
-{ 0xa00, 213, 0, 526 },
-{ 0x2a00, 213, 0, 524 },
-{ 0x1a00, 213, 0, 525 },
-{ 0x600, 213, 0, 538 },
-{ 0x2600, 213, 0, 514 },
-{ 0xa600, 213, 0, 512 },
-{ 0x6600, 213, 0, 513 },
-{ 0x1600, 213, 0, 536 },
-{ 0xe00, 213, 0, 537 },
-{ 0x100, 213, 0, 550 },
-{ 0x500, 213, 0, 548 },
-{ 0x300, 213, 0, 549 },
-{ 0x80, 213, 0, 553 },
-{ 0x280, 213, 0, 551 },
-{ 0x180, 213, 0, 552 },
-{ 0x40, 213, 0, 565 },
-{ 0x140, 213, 0, 563 },
-{ 0xc0, 213, 0, 564 },
-{ 0x20, 213, 0, 577 },
-{ 0xa0, 213, 0, 575 },
-{ 0x60, 213, 0, 576 },
-{ 0x10, 213, 0, 589 },
-{ 0x50, 213, 0, 587 },
-{ 0x30, 213, 0, 588 },
-{ 0x8, 213, 0, 601 },
-{ 0x28, 213, 0, 599 },
-{ 0x18, 213, 0, 600 },
-{ 0x4, 213, 0, 611 },
-{ 0x2, 213, 0, 612 },
-{ 0x1, 213, 0, 613 },
-{ 0x500, 210, 0, 529 },
-{ 0x1500, 210, 0, 527 },
-{ 0xd00, 210, 0, 528 },
-{ 0x300, 210, 0, 541 },
-{ 0x1300, 210, 0, 517 },
-{ 0x5300, 210, 0, 515 },
-{ 0x3300, 210, 0, 516 },
-{ 0xb00, 210, 0, 539 },
-{ 0x700, 210, 0, 540 },
-{ 0x80, 210, 0, 556 },
-{ 0x280, 210, 0, 554 },
-{ 0x180, 210, 0, 555 },
-{ 0x40, 210, 0, 568 },
-{ 0x140, 210, 0, 566 },
-{ 0xc0, 210, 0, 567 },
-{ 0x20, 210, 0, 580 },
-{ 0xa0, 210, 0, 578 },
-{ 0x60, 210, 0, 579 },
-{ 0x10, 210, 0, 592 },
-{ 0x50, 210, 0, 590 },
-{ 0x30, 210, 0, 591 },
-{ 0x8, 210, 0, 604 },
-{ 0x28, 210, 0, 602 },
-{ 0x18, 210, 0, 603 },
-{ 0x4, 210, 0, 614 },
-{ 0x2, 210, 0, 615 },
-{ 0x1, 210, 0, 616 },
-{ 0x500, 207, 0, 532 },
-{ 0x1500, 207, 0, 530 },
-{ 0xd00, 207, 0, 531 },
-{ 0x300, 207, 0, 544 },
-{ 0x1300, 207, 0, 520 },
-{ 0x5300, 207, 0, 518 },
-{ 0x3300, 207, 0, 519 },
-{ 0xb00, 207, 0, 542 },
-{ 0x700, 207, 0, 543 },
-{ 0x80, 207, 0, 559 },
-{ 0x280, 207, 0, 557 },
-{ 0x180, 207, 0, 558 },
-{ 0x40, 207, 0, 571 },
-{ 0x140, 207, 0, 569 },
-{ 0xc0, 207, 0, 570 },
-{ 0x20, 207, 0, 583 },
-{ 0xa0, 207, 0, 581 },
-{ 0x60, 207, 0, 582 },
-{ 0x10, 207, 0, 595 },
-{ 0x50, 207, 0, 593 },
-{ 0x30, 207, 0, 594 },
-{ 0x8, 207, 0, 607 },
-{ 0x28, 207, 0, 605 },
-{ 0x18, 207, 0, 606 },
-{ 0x4, 207, 0, 617 },
-{ 0x2, 207, 0, 618 },
-{ 0x1, 207, 0, 619 },
-{ 0x500, 204, 0, 535 },
-{ 0x1500, 204, 0, 533 },
-{ 0xd00, 204, 0, 534 },
-{ 0x300, 204, 0, 547 },
-{ 0x1300, 204, 0, 523 },
-{ 0x5300, 204, 0, 521 },
-{ 0x3300, 204, 0, 522 },
-{ 0xb00, 204, 0, 545 },
-{ 0x700, 204, 0, 546 },
-{ 0x80, 204, 0, 562 },
-{ 0x280, 204, 0, 560 },
-{ 0x180, 204, 0, 561 },
-{ 0x40, 204, 0, 574 },
-{ 0x140, 204, 0, 572 },
-{ 0xc0, 204, 0, 573 },
-{ 0x20, 204, 0, 586 },
-{ 0xa0, 204, 0, 584 },
-{ 0x60, 204, 0, 585 },
-{ 0x10, 204, 0, 598 },
-{ 0x50, 204, 0, 596 },
-{ 0x30, 204, 0, 597 },
-{ 0x8, 204, 0, 610 },
-{ 0x28, 204, 0, 608 },
-{ 0x18, 204, 0, 609 },
-{ 0x4, 204, 0, 620 },
-{ 0x2, 204, 0, 621 },
-{ 0x1, 204, 0, 622 },
-{ 0x8, 195, 0, 623 },
-{ 0x4, 195, 0, 624 },
-{ 0x2, 195, 0, 625 },
-{ 0x1, 195, 0, 626 },
-{ 0x2, 133, 0, 629 },
-{ 0xa, 133, 0, 627 },
-{ 0x6, 133, 0, 628 },
-{ 0x1, 133, 0, 635 },
-{ 0x5, 133, 0, 633 },
-{ 0x3, 133, 0, 634 },
-{ 0x2, 132, 0, 632 },
-{ 0xa, 132, 0, 630 },
-{ 0x6, 132, 0, 631 },
-{ 0x1, 132, 0, 638 },
-{ 0x5, 132, 0, 636 },
-{ 0x3, 132, 0, 637 },
-{ 0x4, 388, 0, 639 },
-{ 0x2, 388, 0, 640 },
-{ 0x1, 388, 0, 641 },
-{ 0x4, 387, 0, 642 },
-{ 0x2, 387, 0, 643 },
-{ 0x1, 387, 0, 644 },
-{ 0x4, 386, 0, 645 },
-{ 0x2, 386, 0, 646 },
-{ 0x1, 386, 0, 647 },
-{ 0x4, 385, 0, 648 },
-{ 0x2, 385, 0, 649 },
-{ 0x1, 385, 0, 650 },
-{ 0x2, 95, 0, 653 },
-{ 0xa, 95, 0, 651 },
-{ 0x6, 95, 0, 652 },
-{ 0x1, 95, 0, 665 },
-{ 0x5, 95, 0, 663 },
-{ 0x3, 95, 0, 664 },
-{ 0x2, 94, 0, 656 },
-{ 0xa, 94, 0, 654 },
-{ 0x6, 94, 0, 655 },
-{ 0x1, 94, 0, 668 },
-{ 0x5, 94, 0, 666 },
-{ 0x3, 94, 0, 667 },
-{ 0x2, 93, 0, 659 },
-{ 0xa, 93, 0, 657 },
-{ 0x6, 93, 0, 658 },
-{ 0x1, 93, 0, 671 },
-{ 0x5, 93, 0, 669 },
-{ 0x3, 93, 0, 670 },
-{ 0x2, 92, 0, 662 },
-{ 0xa, 92, 0, 660 },
-{ 0x6, 92, 0, 661 },
-{ 0x1, 92, 0, 674 },
-{ 0x5, 92, 0, 672 },
-{ 0x3, 92, 0, 673 },
-{ 0x8, 354, 0, 676 },
-{ 0x18, 354, 0, 675 },
-{ 0x4, 354, 0, 678 },
-{ 0xc, 354, 0, 677 },
-{ 0x2, 354, 0, 685 },
-{ 0x1, 354, 0, 686 },
-{ 0x4, 352, 0, 680 },
-{ 0xc, 352, 0, 679 },
-{ 0x2, 352, 0, 687 },
-{ 0x1, 352, 0, 688 },
-{ 0x4, 350, 0, 682 },
-{ 0xc, 350, 0, 681 },
-{ 0x2, 350, 0, 689 },
-{ 0x1, 350, 0, 690 },
-{ 0x4, 348, 0, 684 },
-{ 0xc, 348, 0, 683 },
-{ 0x2, 348, 0, 691 },
-{ 0x1, 348, 0, 692 },
-{ 0xa00, 212, 0, 707 },
-{ 0x2a00, 212, 0, 705 },
-{ 0x1a00, 212, 0, 706 },
-{ 0x600, 212, 0, 719 },
-{ 0x2600, 212, 0, 695 },
-{ 0xa600, 212, 0, 693 },
-{ 0x6600, 212, 0, 694 },
-{ 0x1600, 212, 0, 717 },
-{ 0xe00, 212, 0, 718 },
-{ 0x100, 212, 0, 731 },
-{ 0x500, 212, 0, 729 },
-{ 0x300, 212, 0, 730 },
-{ 0x80, 212, 0, 734 },
-{ 0x280, 212, 0, 732 },
-{ 0x180, 212, 0, 733 },
-{ 0x40, 212, 0, 746 },
-{ 0x140, 212, 0, 744 },
-{ 0xc0, 212, 0, 745 },
-{ 0x20, 212, 0, 758 },
-{ 0xa0, 212, 0, 756 },
-{ 0x60, 212, 0, 757 },
-{ 0x10, 212, 0, 770 },
-{ 0x50, 212, 0, 768 },
-{ 0x30, 212, 0, 769 },
-{ 0x8, 212, 0, 782 },
-{ 0x28, 212, 0, 780 },
-{ 0x18, 212, 0, 781 },
-{ 0x4, 212, 0, 792 },
-{ 0x2, 212, 0, 793 },
-{ 0x1, 212, 0, 794 },
-{ 0x500, 209, 0, 710 },
-{ 0x1500, 209, 0, 708 },
-{ 0xd00, 209, 0, 709 },
-{ 0x300, 209, 0, 722 },
-{ 0x1300, 209, 0, 698 },
-{ 0x5300, 209, 0, 696 },
-{ 0x3300, 209, 0, 697 },
-{ 0xb00, 209, 0, 720 },
-{ 0x700, 209, 0, 721 },
-{ 0x80, 209, 0, 737 },
-{ 0x280, 209, 0, 735 },
-{ 0x180, 209, 0, 736 },
-{ 0x40, 209, 0, 749 },
-{ 0x140, 209, 0, 747 },
-{ 0xc0, 209, 0, 748 },
-{ 0x20, 209, 0, 761 },
-{ 0xa0, 209, 0, 759 },
-{ 0x60, 209, 0, 760 },
-{ 0x10, 209, 0, 773 },
-{ 0x50, 209, 0, 771 },
-{ 0x30, 209, 0, 772 },
-{ 0x8, 209, 0, 785 },
-{ 0x28, 209, 0, 783 },
-{ 0x18, 209, 0, 784 },
-{ 0x4, 209, 0, 795 },
-{ 0x2, 209, 0, 796 },
-{ 0x1, 209, 0, 797 },
-{ 0x500, 206, 0, 713 },
-{ 0x1500, 206, 0, 711 },
-{ 0xd00, 206, 0, 712 },
-{ 0x300, 206, 0, 725 },
-{ 0x1300, 206, 0, 701 },
-{ 0x5300, 206, 0, 699 },
-{ 0x3300, 206, 0, 700 },
-{ 0xb00, 206, 0, 723 },
-{ 0x700, 206, 0, 724 },
-{ 0x80, 206, 0, 740 },
-{ 0x280, 206, 0, 738 },
-{ 0x180, 206, 0, 739 },
-{ 0x40, 206, 0, 752 },
-{ 0x140, 206, 0, 750 },
-{ 0xc0, 206, 0, 751 },
-{ 0x20, 206, 0, 764 },
-{ 0xa0, 206, 0, 762 },
-{ 0x60, 206, 0, 763 },
-{ 0x10, 206, 0, 776 },
-{ 0x50, 206, 0, 774 },
-{ 0x30, 206, 0, 775 },
-{ 0x8, 206, 0, 788 },
-{ 0x28, 206, 0, 786 },
-{ 0x18, 206, 0, 787 },
-{ 0x4, 206, 0, 798 },
-{ 0x2, 206, 0, 799 },
-{ 0x1, 206, 0, 800 },
-{ 0x500, 203, 0, 716 },
-{ 0x1500, 203, 0, 714 },
-{ 0xd00, 203, 0, 715 },
-{ 0x300, 203, 0, 728 },
-{ 0x1300, 203, 0, 704 },
-{ 0x5300, 203, 0, 702 },
-{ 0x3300, 203, 0, 703 },
-{ 0xb00, 203, 0, 726 },
-{ 0x700, 203, 0, 727 },
-{ 0x80, 203, 0, 743 },
-{ 0x280, 203, 0, 741 },
-{ 0x180, 203, 0, 742 },
-{ 0x40, 203, 0, 755 },
-{ 0x140, 203, 0, 753 },
-{ 0xc0, 203, 0, 754 },
-{ 0x20, 203, 0, 767 },
-{ 0xa0, 203, 0, 765 },
-{ 0x60, 203, 0, 766 },
-{ 0x10, 203, 0, 779 },
-{ 0x50, 203, 0, 777 },
-{ 0x30, 203, 0, 778 },
-{ 0x8, 203, 0, 791 },
-{ 0x28, 203, 0, 789 },
-{ 0x18, 203, 0, 790 },
-{ 0x4, 203, 0, 801 },
-{ 0x2, 203, 0, 802 },
-{ 0x1, 203, 0, 803 },
-{ 0xa00, 211, 0, 818 },
-{ 0x2a00, 211, 0, 816 },
-{ 0x1a00, 211, 0, 817 },
-{ 0x600, 211, 0, 830 },
-{ 0x2600, 211, 0, 806 },
-{ 0xa600, 211, 0, 804 },
-{ 0x6600, 211, 0, 805 },
-{ 0x1600, 211, 0, 828 },
-{ 0xe00, 211, 0, 829 },
-{ 0x100, 211, 0, 842 },
-{ 0x500, 211, 0, 840 },
-{ 0x300, 211, 0, 841 },
-{ 0x80, 211, 0, 845 },
-{ 0x280, 211, 0, 843 },
-{ 0x180, 211, 0, 844 },
-{ 0x40, 211, 0, 857 },
-{ 0x140, 211, 0, 855 },
-{ 0xc0, 211, 0, 856 },
-{ 0x20, 211, 0, 869 },
-{ 0xa0, 211, 0, 867 },
-{ 0x60, 211, 0, 868 },
-{ 0x10, 211, 0, 881 },
-{ 0x50, 211, 0, 879 },
-{ 0x30, 211, 0, 880 },
-{ 0x8, 211, 0, 893 },
-{ 0x28, 211, 0, 891 },
-{ 0x18, 211, 0, 892 },
-{ 0x4, 211, 0, 903 },
-{ 0x2, 211, 0, 904 },
-{ 0x1, 211, 0, 905 },
-{ 0x500, 208, 0, 821 },
-{ 0x1500, 208, 0, 819 },
-{ 0xd00, 208, 0, 820 },
-{ 0x300, 208, 0, 833 },
-{ 0x1300, 208, 0, 809 },
-{ 0x5300, 208, 0, 807 },
-{ 0x3300, 208, 0, 808 },
-{ 0xb00, 208, 0, 831 },
-{ 0x700, 208, 0, 832 },
-{ 0x80, 208, 0, 848 },
-{ 0x280, 208, 0, 846 },
-{ 0x180, 208, 0, 847 },
-{ 0x40, 208, 0, 860 },
-{ 0x140, 208, 0, 858 },
-{ 0xc0, 208, 0, 859 },
-{ 0x20, 208, 0, 872 },
-{ 0xa0, 208, 0, 870 },
-{ 0x60, 208, 0, 871 },
-{ 0x10, 208, 0, 884 },
-{ 0x50, 208, 0, 882 },
-{ 0x30, 208, 0, 883 },
-{ 0x8, 208, 0, 896 },
-{ 0x28, 208, 0, 894 },
-{ 0x18, 208, 0, 895 },
-{ 0x4, 208, 0, 906 },
-{ 0x2, 208, 0, 907 },
-{ 0x1, 208, 0, 908 },
-{ 0x500, 205, 0, 824 },
-{ 0x1500, 205, 0, 822 },
-{ 0xd00, 205, 0, 823 },
-{ 0x300, 205, 0, 836 },
-{ 0x1300, 205, 0, 812 },
-{ 0x5300, 205, 0, 810 },
-{ 0x3300, 205, 0, 811 },
-{ 0xb00, 205, 0, 834 },
-{ 0x700, 205, 0, 835 },
-{ 0x80, 205, 0, 851 },
-{ 0x280, 205, 0, 849 },
-{ 0x180, 205, 0, 850 },
-{ 0x40, 205, 0, 863 },
-{ 0x140, 205, 0, 861 },
-{ 0xc0, 205, 0, 862 },
-{ 0x20, 205, 0, 875 },
-{ 0xa0, 205, 0, 873 },
-{ 0x60, 205, 0, 874 },
-{ 0x10, 205, 0, 887 },
-{ 0x50, 205, 0, 885 },
-{ 0x30, 205, 0, 886 },
-{ 0x8, 205, 0, 899 },
-{ 0x28, 205, 0, 897 },
-{ 0x18, 205, 0, 898 },
-{ 0x4, 205, 0, 909 },
-{ 0x2, 205, 0, 910 },
-{ 0x1, 205, 0, 911 },
-{ 0x500, 202, 0, 827 },
-{ 0x1500, 202, 0, 825 },
-{ 0xd00, 202, 0, 826 },
-{ 0x300, 202, 0, 839 },
-{ 0x1300, 202, 0, 815 },
-{ 0x5300, 202, 0, 813 },
-{ 0x3300, 202, 0, 814 },
-{ 0xb00, 202, 0, 837 },
-{ 0x700, 202, 0, 838 },
-{ 0x80, 202, 0, 854 },
-{ 0x280, 202, 0, 852 },
-{ 0x180, 202, 0, 853 },
-{ 0x40, 202, 0, 866 },
-{ 0x140, 202, 0, 864 },
-{ 0xc0, 202, 0, 865 },
-{ 0x20, 202, 0, 878 },
-{ 0xa0, 202, 0, 876 },
-{ 0x60, 202, 0, 877 },
-{ 0x10, 202, 0, 890 },
-{ 0x50, 202, 0, 888 },
-{ 0x30, 202, 0, 889 },
-{ 0x8, 202, 0, 902 },
-{ 0x28, 202, 0, 900 },
-{ 0x18, 202, 0, 901 },
-{ 0x4, 202, 0, 912 },
-{ 0x2, 202, 0, 913 },
-{ 0x1, 202, 0, 914 },
-{ 0x1, 49, 0, 917 },
-{ 0x3, 48, 0, 918 },
-{ 0x1, 374, 0, 919 },
-{ 0x1, 380, 0, 920 },
-{ 0x2, 334, 0, 923 },
-{ 0x1, 334, 0, 924 },
-{ 0x2, 332, 0, 925 },
-{ 0x1, 332, 0, 926 },
-{ 0x1, 331, 0, 927 },
-{ 0x1, 276, 0, 932 },
-{ 0x1, 275, 0, 933 },
-{ 0x1, 274, 0, 934 },
-{ 0x1, 273, 0, 935 },
-{ 0x1, 201, 0, 936 },
-{ 0x1, 200, 0, 937 },
-{ 0x1, 272, 0, 938 },
-{ 0x1, 271, 0, 939 },
-{ 0x1, 270, 0, 940 },
-{ 0x1, 269, 0, 941 },
-{ 0x1, 268, 0, 942 },
-{ 0x1, 267, 0, 943 },
-{ 0x1, 266, 0, 944 },
-{ 0x2, 199, 0, 945 },
-{ 0x1, 199, 0, 946 },
-{ 0x2, 314, 0, 952 },
-{ 0x1, 314, 0, 953 },
-{ 0x1, 265, 0, 954 },
-{ 0x1, 264, 0, 955 },
-{ 0x1, 263, 0, 956 },
-{ 0x1, 262, 0, 957 },
-{ 0x1, 8, 0, 958 },
-{ 0x1, 261, 0, 959 },
-{ 0x1, 260, 0, 960 },
-{ 0x1, 259, 0, 961 },
-{ 0x1, 258, 0, 962 },
-{ 0x1, 336, 0, 963 },
-{ 0x1, 347, 0, 964 },
-{ 0x1, 337, 0, 965 },
-{ 0x1, 369, 0, 966 },
-{ 0x1, 257, 0, 969 },
-{ 0x1, 198, 0, 970 },
-{ 0x1, 134, 0, 973 },
-{ 0x2, 239, 0, 977 },
-{ 0x1, 239, 0, 978 },
-{ 0x1, 193, 0, 979 },
-{ 0x5, 47, 0, 981 },
-{ 0x3, 47, 0, 982 },
-{ 0x5, 46, 0, 983 },
-{ 0x3, 46, 0, 984 },
-{ 0x1, 313, 0, 985 },
-{ 0x1, 321, 0, 986 },
-{ 0x1, 319, 0, 987 },
-{ 0x1, 340, 0, 988 },
-{ 0x1, 320, 0, 989 },
-{ 0x1, 318, 0, 990 },
-{ 0x2, 326, 0, 991 },
-{ 0x1, 326, 0, 993 },
-{ 0x2, 324, 0, 992 },
-{ 0x1, 324, 0, 994 },
-{ 0x2, 344, 0, 995 },
-{ 0x1, 344, 0, 998 },
-{ 0x2, 325, 0, 996 },
-{ 0x1, 325, 0, 999 },
-{ 0x2, 323, 0, 997 },
-{ 0x1, 323, 0, 1000 },
-{ 0x1, 286, 0, 1001 },
-{ 0x1, 285, 0, 1002 },
-{ 0x1, 317, 0, 1003 },
-{ 0x1, 308, 0, 1004 },
-{ 0x1, 310, 0, 1005 },
-{ 0x1, 307, 0, 1006 },
-{ 0x1, 309, 0, 1007 },
-{ 0x2, 384, 0, 1008 },
-{ 0x1, 384, 0, 1011 },
-{ 0x2, 383, 0, 1009 },
-{ 0x1, 383, 0, 1012 },
-{ 0x2, 382, 0, 1010 },
-{ 0x1, 382, 0, 1013 },
-{ 0x1, 296, 0, 1014 },
-{ 0x2, 295, 0, 1015 },
-{ 0x1, 295, 0, 1016 },
-{ 0x2, 242, 0, 1017 },
-{ 0x1, 242, 0, 1020 },
-{ 0x2, 241, 0, 1018 },
-{ 0x1, 241, 0, 1021 },
-{ 0x2, 240, 0, 1019 },
-{ 0x1, 240, 0, 1022 },
-{ 0x2, 311, 0, 1023 },
-{ 0x1, 311, 0, 1024 },
-{ 0x2, 312, 0, 1025 },
-{ 0x1, 312, 0, 1026 },
-{ 0xa, 378, 1, 1032 },
-{ 0xa, 379, 0, 1031 },
-{ 0x1a, 378, 1, 1028 },
-{ 0x32, 379, 0, 1027 },
-{ 0x6, 378, 1, 1036 },
-{ 0x6, 379, 0, 1035 },
-{ 0x1, 378, 1, 1042 },
-{ 0x1, 379, 0, 1041 },
-{ 0x9, 378, 1, 1034 },
-{ 0x9, 379, 0, 1033 },
-{ 0x19, 378, 1, 1030 },
-{ 0x31, 379, 0, 1029 },
-{ 0x5, 378, 1, 1038 },
-{ 0x5, 379, 0, 1037 },
-{ 0x3, 378, 1, 1040 },
-{ 0x3, 379, 0, 1039 },
-{ 0xa, 375, 1, 1048 },
-{ 0xa, 376, 0, 1047 },
-{ 0x1a, 375, 1, 1044 },
-{ 0x32, 376, 0, 1043 },
-{ 0x6, 375, 1, 1052 },
-{ 0x6, 376, 0, 1051 },
-{ 0x1, 375, 1, 1058 },
-{ 0x1, 376, 0, 1057 },
-{ 0x9, 375, 1, 1050 },
-{ 0x9, 376, 0, 1049 },
-{ 0x19, 375, 1, 1046 },
-{ 0x31, 376, 0, 1045 },
-{ 0x5, 375, 1, 1054 },
-{ 0x5, 376, 0, 1053 },
-{ 0x3, 375, 1, 1056 },
-{ 0x3, 376, 0, 1055 },
-{ 0x1, 102, 0, 1059 },
-{ 0x1, 101, 0, 1060 },
-{ 0x1, 339, 1, 1062 },
-{ 0x1, 100, 0, 1061 },
-{ 0x2, 343, 1, 1064 },
-{ 0x2, 104, 0, 1063 },
-{ 0x1, 343, 1, 1066 },
-{ 0x1, 104, 0, 1065 },
-{ 0x1, 345, 0, 1067 },
-{ 0x1, 99, 0, 1068 },
-{ 0x2, 98, 0, 1069 },
-{ 0x2, 97, 0, 1070 },
-{ 0x1, 396, 1, 1076 },
-{ 0x1, 197, 0, 971 },
-{ 0x1, 395, 0, 1077 },
-{ 0x1, 394, 1, 1078 },
-{ 0x1, 196, 0, 980 },
-{ 0x1, 256, 0, 1079 },
-{ 0x1, 255, 1, 1080 },
-{ 0x1, 238, 0, 972 },
-{ 0x1, 254, 0, 1081 },
-{ 0x1, 253, 1, 1082 },
-{ 0x1, 373, 0, 974 },
-{ 0x1, 252, 1, 1083 },
-{ 0x1, 346, 0, 976 },
-{ 0x1, 251, 0, 1084 },
-{ 0x1, 250, 0, 1085 },
-{ 0x1, 249, 1, 1086 },
-{ 0x2, 346, 0, 975 },
-{ 0x10, 248, 0, 1090 },
-{ 0x90, 248, 0, 1088 },
-{ 0x190, 248, 0, 1087 },
-{ 0x50, 248, 0, 1089 },
-{ 0x30, 248, 0, 1092 },
-{ 0x70, 248, 0, 1091 },
-{ 0x8, 248, 0, 1094 },
-{ 0x18, 248, 0, 1093 },
-{ 0x4, 248, 0, 1095 },
-{ 0x1, 248, 0, 1098 },
-{ 0x3, 248, 0, 1097 },
-{ 0x1, 247, 1, 1099 },
-{ 0x2, 248, 0, 1096 },
-{ 0x3, 45, 0, 1100 },
-{ 0x1, 289, 1, 1101 },
-{ 0x1, 290, 1, 967 },
-{ 0x1, 291, 0, 87 },
-{ 0x1, 33, 1, 1102 },
-{ 0x1, 34, 1, 968 },
-{ 0x1, 35, 0, 88 },
-{ 0x1, 187, 0, 1103 },
-{ 0x4, 389, 0, 1104 },
-{ 0x2, 389, 0, 1105 },
-{ 0x1, 389, 1, 1107 },
-{ 0x1, 390, 0, 1106 },
-{ 0x8, 391, 0, 1108 },
-{ 0x4, 391, 0, 1109 },
-{ 0x1, 391, 1, 1111 },
-{ 0x2, 391, 0, 1110 },
-{ 0x8, 176, 0, 1112 },
-{ 0x4, 176, 0, 1113 },
-{ 0x2, 176, 0, 1114 },
-{ 0x1, 176, 1, 1116 },
-{ 0x1, 177, 0, 1115 },
-{ 0x10, 178, 0, 1117 },
-{ 0x8, 178, 0, 1118 },
-{ 0x4, 178, 0, 1119 },
-{ 0x1, 178, 1, 1121 },
-{ 0x2, 178, 0, 1120 },
-{ 0x220, 148, 0, 1122 },
-{ 0x120, 148, 0, 1123 },
-{ 0xa0, 148, 0, 1124 },
-{ 0x60, 148, 1, 1126 },
-{ 0x4, 149, 0, 1125 },
-{ 0x110, 148, 0, 1132 },
-{ 0x90, 148, 0, 1133 },
-{ 0x50, 148, 0, 1134 },
-{ 0x30, 148, 1, 1136 },
-{ 0x2, 149, 0, 1135 },
-{ 0x8, 148, 0, 1137 },
-{ 0x4, 148, 0, 1138 },
-{ 0x2, 148, 0, 1139 },
-{ 0x1, 148, 1, 1141 },
-{ 0x1, 149, 0, 1140 },
-{ 0x440, 150, 0, 1127 },
-{ 0x240, 150, 0, 1128 },
-{ 0x140, 150, 0, 1129 },
-{ 0xc0, 150, 1, 1131 },
-{ 0x40, 150, 0, 1130 },
-{ 0x220, 150, 0, 1142 },
-{ 0x120, 150, 0, 1143 },
-{ 0xa0, 150, 0, 1144 },
-{ 0x60, 150, 1, 1146 },
-{ 0x20, 150, 0, 1145 },
-{ 0x10, 150, 0, 1147 },
-{ 0x8, 150, 0, 1148 },
-{ 0x4, 150, 0, 1149 },
-{ 0x1, 150, 1, 1151 },
-{ 0x2, 150, 0, 1150 },
-{ 0x8, 172, 0, 1152 },
-{ 0x4, 172, 0, 1153 },
-{ 0x2, 172, 0, 1154 },
-{ 0x1, 172, 1, 1156 },
-{ 0x1, 173, 0, 1155 },
-{ 0x220, 144, 0, 1157 },
-{ 0x120, 144, 0, 1158 },
-{ 0xa0, 144, 0, 1159 },
-{ 0x60, 144, 1, 1161 },
-{ 0x4, 145, 0, 1160 },
-{ 0x110, 144, 0, 1167 },
-{ 0x90, 144, 0, 1168 },
-{ 0x50, 144, 0, 1169 },
-{ 0x30, 144, 1, 1171 },
-{ 0x2, 145, 0, 1170 },
-{ 0x8, 144, 0, 1172 },
-{ 0x4, 144, 0, 1173 },
-{ 0x2, 144, 0, 1174 },
-{ 0x1, 144, 1, 1176 },
-{ 0x1, 145, 0, 1175 },
-{ 0x440, 190, 0, 1162 },
-{ 0x240, 190, 0, 1163 },
-{ 0x140, 190, 0, 1164 },
-{ 0xc0, 190, 1, 1166 },
-{ 0x40, 190, 0, 1165 },
-{ 0x220, 190, 0, 1177 },
-{ 0x120, 190, 0, 1178 },
-{ 0xa0, 190, 0, 1179 },
-{ 0x60, 190, 1, 1181 },
-{ 0x20, 190, 0, 1180 },
-{ 0x10, 190, 0, 1182 },
-{ 0x8, 190, 0, 1183 },
-{ 0x4, 190, 0, 1184 },
-{ 0x1, 190, 1, 1186 },
-{ 0x2, 190, 0, 1185 },
-{ 0x8, 164, 0, 1187 },
-{ 0x4, 164, 0, 1188 },
-{ 0x2, 164, 0, 1189 },
-{ 0x1, 164, 1, 1191 },
-{ 0x1, 165, 0, 1190 },
-{ 0x10, 171, 0, 1192 },
-{ 0x8, 171, 0, 1193 },
-{ 0x4, 171, 0, 1194 },
-{ 0x1, 171, 1, 1196 },
-{ 0x2, 171, 0, 1195 },
-{ 0x220, 135, 0, 1197 },
-{ 0x120, 135, 0, 1198 },
-{ 0xa0, 135, 0, 1199 },
-{ 0x60, 135, 1, 1201 },
-{ 0x4, 136, 0, 1200 },
-{ 0x110, 135, 0, 1222 },
-{ 0x90, 135, 0, 1223 },
-{ 0x50, 135, 0, 1224 },
-{ 0x30, 135, 1, 1226 },
-{ 0x2, 136, 0, 1225 },
-{ 0x8, 135, 0, 1227 },
-{ 0x4, 135, 0, 1228 },
-{ 0x2, 135, 0, 1229 },
-{ 0x1, 135, 1, 1231 },
-{ 0x1, 136, 0, 1230 },
-{ 0x440, 143, 0, 1202 },
-{ 0x240, 143, 0, 1203 },
-{ 0x140, 143, 0, 1204 },
-{ 0xc0, 143, 1, 1206 },
-{ 0x40, 143, 0, 1205 },
-{ 0x220, 143, 0, 1232 },
-{ 0x120, 143, 0, 1233 },
-{ 0xa0, 143, 0, 1234 },
-{ 0x60, 143, 1, 1236 },
-{ 0x20, 143, 0, 1235 },
-{ 0x10, 143, 0, 1237 },
-{ 0x8, 143, 0, 1238 },
-{ 0x4, 143, 0, 1239 },
-{ 0x1, 143, 1, 1241 },
-{ 0x2, 143, 0, 1240 },
-{ 0x440, 106, 0, 1207 },
-{ 0x240, 106, 0, 1208 },
-{ 0x140, 106, 0, 1209 },
-{ 0xc0, 106, 1, 1211 },
-{ 0x40, 106, 0, 1210 },
-{ 0x220, 106, 0, 1242 },
-{ 0x120, 106, 0, 1243 },
-{ 0xa0, 106, 0, 1244 },
-{ 0x60, 106, 1, 1246 },
-{ 0x20, 106, 0, 1245 },
-{ 0x10, 106, 0, 1247 },
-{ 0x8, 106, 0, 1248 },
-{ 0x1, 106, 1, 1251 },
-{ 0x2, 106, 0, 1250 },
-{ 0x440, 151, 1, 1217 },
-{ 0x441, 131, 0, 1212 },
-{ 0x240, 151, 1, 1218 },
-{ 0x241, 131, 0, 1213 },
-{ 0x140, 151, 1, 1219 },
-{ 0x141, 131, 0, 1214 },
-{ 0xc0, 151, 1, 1221 },
-{ 0x40, 151, 1, 1220 },
-{ 0xc1, 131, 1, 1216 },
-{ 0x41, 131, 0, 1215 },
-{ 0x220, 151, 1, 1262 },
-{ 0x221, 131, 0, 1252 },
-{ 0x120, 151, 1, 1263 },
-{ 0x121, 131, 0, 1253 },
-{ 0xa0, 151, 1, 1264 },
-{ 0xa1, 131, 0, 1254 },
-{ 0x60, 151, 1, 1266 },
-{ 0x20, 151, 1, 1265 },
-{ 0x61, 131, 1, 1256 },
-{ 0x21, 131, 0, 1255 },
-{ 0x10, 151, 1, 1267 },
-{ 0x11, 131, 0, 1257 },
-{ 0x8, 151, 1, 1268 },
-{ 0x9, 131, 0, 1258 },
-{ 0x4, 151, 1, 1269 },
-{ 0x5, 131, 0, 1259 },
-{ 0x1, 151, 1, 1271 },
-{ 0x2, 151, 1, 1270 },
-{ 0x3, 131, 1, 1261 },
-{ 0x1, 131, 0, 1260 },
-{ 0x1, 116, 1, 1275 },
-{ 0x1, 117, 0, 1274 },
-{ 0x3, 116, 1, 1273 },
-{ 0x3, 117, 0, 1272 },
-{ 0x1108, 120, 1, 1356 },
-{ 0x1108, 124, 0, 1276 },
-{ 0x908, 120, 1, 1357 },
-{ 0x908, 124, 0, 1277 },
-{ 0x508, 120, 1, 1358 },
-{ 0x508, 124, 0, 1278 },
-{ 0x308, 120, 1, 1360 },
-{ 0x18, 121, 1, 1359 },
-{ 0x308, 124, 1, 1280 },
-{ 0x18, 125, 0, 1279 },
-{ 0x88, 120, 1, 1376 },
-{ 0x88, 124, 0, 1316 },
-{ 0x48, 120, 1, 1377 },
-{ 0x48, 124, 0, 1317 },
-{ 0x28, 120, 1, 1378 },
-{ 0x28, 124, 0, 1318 },
-{ 0x18, 120, 1, 1380 },
-{ 0x8, 121, 1, 1379 },
-{ 0x18, 124, 1, 1320 },
-{ 0x8, 125, 0, 1319 },
-{ 0x884, 120, 1, 1361 },
-{ 0x442, 122, 1, 1306 },
-{ 0x884, 124, 1, 1291 },
-{ 0x442, 126, 0, 1281 },
-{ 0x484, 120, 1, 1362 },
-{ 0x242, 122, 1, 1307 },
-{ 0x484, 124, 1, 1292 },
-{ 0x242, 126, 0, 1282 },
-{ 0x284, 120, 1, 1363 },
-{ 0x142, 122, 1, 1308 },
-{ 0x284, 124, 1, 1293 },
-{ 0x142, 126, 0, 1283 },
-{ 0x184, 120, 1, 1365 },
-{ 0xc, 121, 1, 1364 },
-{ 0xc2, 122, 1, 1310 },
-{ 0x6, 123, 1, 1309 },
-{ 0x184, 124, 1, 1295 },
-{ 0xc, 125, 1, 1294 },
-{ 0xc2, 126, 1, 1285 },
-{ 0x6, 127, 0, 1284 },
-{ 0x44, 120, 1, 1381 },
-{ 0x22, 122, 1, 1346 },
-{ 0x44, 124, 1, 1331 },
-{ 0x22, 126, 0, 1321 },
-{ 0x24, 120, 1, 1382 },
-{ 0x12, 122, 1, 1347 },
-{ 0x24, 124, 1, 1332 },
-{ 0x12, 126, 0, 1322 },
-{ 0x14, 120, 1, 1383 },
-{ 0xa, 122, 1, 1348 },
-{ 0x14, 124, 1, 1333 },
-{ 0xa, 126, 0, 1323 },
-{ 0xc, 120, 1, 1385 },
-{ 0x4, 121, 1, 1384 },
-{ 0x6, 122, 1, 1350 },
-{ 0x2, 123, 1, 1349 },
-{ 0xc, 124, 1, 1335 },
-{ 0x4, 125, 1, 1334 },
-{ 0x6, 126, 1, 1325 },
-{ 0x2, 127, 0, 1324 },
-{ 0x442, 120, 1, 1366 },
-{ 0x221, 122, 1, 1311 },
-{ 0x442, 124, 1, 1296 },
-{ 0x221, 126, 0, 1286 },
-{ 0x242, 120, 1, 1367 },
-{ 0x121, 122, 1, 1312 },
-{ 0x242, 124, 1, 1297 },
-{ 0x121, 126, 0, 1287 },
-{ 0x142, 120, 1, 1368 },
-{ 0xa1, 122, 1, 1313 },
-{ 0x142, 124, 1, 1298 },
-{ 0xa1, 126, 0, 1288 },
-{ 0xc2, 120, 1, 1370 },
-{ 0x6, 121, 1, 1369 },
-{ 0x61, 122, 1, 1315 },
-{ 0x3, 123, 1, 1314 },
-{ 0xc2, 124, 1, 1300 },
-{ 0x6, 125, 1, 1299 },
-{ 0x61, 126, 1, 1290 },
-{ 0x3, 127, 0, 1289 },
-{ 0x22, 120, 1, 1386 },
-{ 0x11, 122, 1, 1351 },
-{ 0x22, 124, 1, 1336 },
-{ 0x11, 126, 0, 1326 },
-{ 0x12, 120, 1, 1387 },
-{ 0x9, 122, 1, 1352 },
-{ 0x12, 124, 1, 1337 },
-{ 0x9, 126, 0, 1327 },
-{ 0xa, 120, 1, 1388 },
-{ 0x5, 122, 1, 1353 },
-{ 0xa, 124, 1, 1338 },
-{ 0x5, 126, 0, 1328 },
-{ 0x6, 120, 1, 1390 },
-{ 0x2, 121, 1, 1389 },
-{ 0x3, 122, 1, 1355 },
-{ 0x1, 123, 1, 1354 },
-{ 0x6, 124, 1, 1340 },
-{ 0x2, 125, 1, 1339 },
-{ 0x3, 126, 1, 1330 },
-{ 0x1, 127, 0, 1329 },
-{ 0x221, 120, 1, 1371 },
-{ 0x221, 124, 0, 1301 },
-{ 0x121, 120, 1, 1372 },
-{ 0x121, 124, 0, 1302 },
-{ 0xa1, 120, 1, 1373 },
-{ 0xa1, 124, 0, 1303 },
-{ 0x61, 120, 1, 1375 },
-{ 0x3, 121, 1, 1374 },
-{ 0x61, 124, 1, 1305 },
-{ 0x3, 125, 0, 1304 },
-{ 0x11, 120, 1, 1391 },
-{ 0x11, 124, 0, 1341 },
-{ 0x9, 120, 1, 1392 },
-{ 0x9, 124, 0, 1342 },
-{ 0x5, 120, 1, 1393 },
-{ 0x5, 124, 0, 1343 },
-{ 0x3, 120, 1, 1395 },
-{ 0x1, 121, 1, 1394 },
-{ 0x3, 124, 1, 1345 },
-{ 0x1, 125, 0, 1344 },
-{ 0x442, 162, 0, 1396 },
-{ 0x242, 162, 0, 1397 },
-{ 0x142, 162, 0, 1398 },
-{ 0xc2, 162, 1, 1400 },
-{ 0x6, 163, 1, 1399 },
-{ 0x1, 381, 0, 921 },
-{ 0x22, 162, 0, 1406 },
-{ 0x12, 162, 0, 1407 },
-{ 0xa, 162, 0, 1408 },
-{ 0x6, 162, 1, 1410 },
-{ 0x2, 163, 1, 1409 },
-{ 0x2, 315, 0, 950 },
-{ 0x221, 162, 0, 1401 },
-{ 0x121, 162, 0, 1402 },
-{ 0xa1, 162, 0, 1403 },
-{ 0x61, 162, 1, 1405 },
-{ 0x3, 163, 1, 1404 },
-{ 0x1, 377, 0, 922 },
-{ 0x11, 162, 0, 1411 },
-{ 0x9, 162, 0, 1412 },
-{ 0x5, 162, 0, 1413 },
-{ 0x3, 162, 1, 1415 },
-{ 0x1, 163, 1, 1414 },
-{ 0x1, 315, 0, 951 },
-{ 0x4, 168, 0, 1416 },
-{ 0x1, 168, 0, 1418 },
-{ 0x1, 175, 0, 1419 },
-{ 0x1, 174, 1, 1420 },
-{ 0x2, 168, 0, 1417 },
-{ 0x1, 153, 0, 1421 },
-{ 0x880, 159, 0, 1422 },
-{ 0x480, 159, 0, 1423 },
-{ 0x280, 159, 0, 1424 },
-{ 0x180, 159, 1, 1426 },
-{ 0x80, 160, 0, 1425 },
-{ 0x440, 159, 1, 1437 },
-{ 0x88, 161, 0, 1427 },
-{ 0x240, 159, 1, 1438 },
-{ 0x48, 161, 0, 1428 },
-{ 0x140, 159, 1, 1439 },
-{ 0x28, 161, 0, 1429 },
-{ 0xc0, 159, 1, 1441 },
-{ 0x40, 160, 1, 1440 },
-{ 0x18, 161, 1, 1431 },
-{ 0x8, 161, 0, 1430 },
-{ 0x220, 159, 1, 1442 },
-{ 0x44, 161, 0, 1432 },
-{ 0x120, 159, 1, 1443 },
-{ 0x24, 161, 0, 1433 },
-{ 0xa0, 159, 1, 1444 },
-{ 0x14, 161, 0, 1434 },
-{ 0x60, 159, 1, 1446 },
-{ 0x20, 160, 1, 1445 },
-{ 0xc, 161, 1, 1436 },
-{ 0x4, 161, 0, 1435 },
-{ 0x110, 159, 0, 1447 },
-{ 0x90, 159, 0, 1448 },
-{ 0x50, 159, 0, 1449 },
-{ 0x30, 159, 1, 1451 },
-{ 0x10, 160, 1, 1450 },
-{ 0x1, 333, 0, 915 },
-{ 0x88, 159, 0, 1452 },
-{ 0x48, 159, 0, 1453 },
-{ 0x28, 159, 0, 1454 },
-{ 0x18, 159, 1, 1456 },
-{ 0x8, 160, 1, 1455 },
-{ 0xc, 316, 0, 947 },
-{ 0x44, 159, 1, 1467 },
-{ 0x22, 161, 0, 1457 },
-{ 0x24, 159, 1, 1468 },
-{ 0x12, 161, 0, 1458 },
-{ 0x14, 159, 1, 1469 },
-{ 0xa, 161, 0, 1459 },
-{ 0xc, 159, 1, 1471 },
-{ 0x4, 160, 1, 1470 },
-{ 0x6, 161, 1, 1461 },
-{ 0x2, 161, 1, 1460 },
-{ 0x6, 316, 0, 948 },
-{ 0x22, 159, 1, 1472 },
-{ 0x11, 161, 0, 1462 },
-{ 0x12, 159, 1, 1473 },
-{ 0x9, 161, 0, 1463 },
-{ 0xa, 159, 1, 1474 },
-{ 0x5, 161, 0, 1464 },
-{ 0x6, 159, 1, 1476 },
-{ 0x2, 160, 1, 1475 },
-{ 0x3, 161, 1, 1466 },
-{ 0x1, 161, 1, 1465 },
-{ 0x3, 316, 0, 949 },
-{ 0x11, 159, 0, 1477 },
-{ 0x9, 159, 0, 1478 },
-{ 0x5, 159, 0, 1479 },
-{ 0x3, 159, 1, 1481 },
-{ 0x1, 160, 1, 1480 },
-{ 0x1, 113, 0, 916 },
-{ 0x8, 155, 0, 1482 },
-{ 0x4, 155, 0, 1483 },
-{ 0x2, 155, 0, 1484 },
-{ 0x1, 155, 1, 1486 },
-{ 0x1, 156, 1, 1485 },
-{ 0x1, 280, 0, 928 },
-{ 0x8, 157, 0, 1487 },
-{ 0x4, 157, 0, 1488 },
-{ 0x2, 157, 0, 1489 },
-{ 0x1, 157, 1, 1491 },
-{ 0x1, 158, 1, 1490 },
-{ 0x1, 279, 0, 929 },
-{ 0x8, 166, 0, 1492 },
-{ 0x4, 166, 0, 1493 },
-{ 0x2, 166, 0, 1494 },
-{ 0x1, 166, 1, 1496 },
-{ 0x1, 167, 1, 1495 },
-{ 0x1, 278, 0, 930 },
-{ 0x8, 169, 0, 1497 },
-{ 0x4, 169, 0, 1498 },
-{ 0x2, 169, 0, 1499 },
-{ 0x1, 169, 1, 1501 },
-{ 0x1, 170, 1, 1500 },
-{ 0x1, 277, 0, 931 },
-{ 0x8, 181, 0, 1502 },
-{ 0x4, 181, 0, 1503 },
-{ 0x2, 181, 0, 1504 },
-{ 0x1, 181, 1, 1506 },
-{ 0x1, 182, 0, 1505 },
-{ 0x8, 179, 0, 1507 },
-{ 0x4, 179, 0, 1508 },
-{ 0x2, 179, 0, 1509 },
-{ 0x1, 179, 1, 1511 },
-{ 0x1, 180, 0, 1510 },
-{ 0x1, 288, 0, 1512 },
-{ 0x1, 32, 0, 1513 },
-{ 0x8, 114, 0, 1514 },
-{ 0x4, 114, 0, 1515 },
-{ 0x2, 114, 0, 1516 },
-{ 0x1, 114, 1, 1518 },
-{ 0x1, 115, 0, 1517 },
-{ 0x8, 118, 0, 1519 },
-{ 0x4, 118, 0, 1520 },
-{ 0x2, 118, 0, 1521 },
-{ 0x1, 118, 1, 1523 },
-{ 0x1, 119, 0, 1522 },
-{ 0x8, 188, 0, 1524 },
-{ 0x4, 188, 0, 1525 },
-{ 0x2, 188, 0, 1526 },
-{ 0x1, 188, 1, 1528 },
-{ 0x1, 189, 0, 1527 },
-{ 0x1, 130, 0, 1529 },
-{ 0x442, 128, 0, 1530 },
-{ 0x242, 128, 0, 1531 },
-{ 0x142, 128, 0, 1532 },
-{ 0xc2, 128, 1, 1534 },
-{ 0x6, 129, 0, 1533 },
-{ 0x22, 128, 0, 1540 },
-{ 0x12, 128, 0, 1541 },
-{ 0xa, 128, 0, 1542 },
-{ 0x6, 128, 1, 1544 },
-{ 0x2, 129, 1, 1543 },
-{ 0x1, 98, 0, 1071 },
-{ 0x221, 128, 0, 1535 },
-{ 0x121, 128, 0, 1536 },
-{ 0xa1, 128, 0, 1537 },
-{ 0x61, 128, 1, 1539 },
-{ 0x3, 129, 0, 1538 },
-{ 0x11, 128, 0, 1545 },
-{ 0x9, 128, 0, 1546 },
-{ 0x5, 128, 0, 1547 },
-{ 0x3, 128, 1, 1549 },
-{ 0x1, 129, 1, 1548 },
-{ 0x1, 97, 0, 1072 },
-{ 0x1, 194, 0, 1550 },
-{ 0x1, 152, 0, 1551 },
-{ 0x1, 112, 0, 1552 },
-{ 0x1, 111, 0, 1553 },
-{ 0x4, 191, 0, 1554 },
-{ 0x2, 191, 0, 1555 },
-{ 0x1, 191, 0, 1556 },
-{ 0x1, 154, 0, 1557 },
-{ 0x2, 192, 0, 1558 },
-{ 0x1, 192, 0, 1559 },
-{ 0x4, 142, 0, 1560 },
-{ 0x2, 142, 0, 1561 },
-{ 0x1, 142, 0, 1562 },
-{ 0x4, 139, 0, 1563 },
-{ 0x1, 147, 0, 1566 },
-{ 0x1, 146, 1, 1567 },
-{ 0x2, 139, 0, 1564 },
-{ 0x1, 105, 0, 1568 },
-{ 0x1, 246, 1, 1569 },
-{ 0x1, 139, 0, 1565 },
-{ 0x8, 107, 0, 1570 },
-{ 0x4, 107, 0, 1571 },
-{ 0x2, 107, 0, 1572 },
-{ 0x1, 107, 1, 1574 },
-{ 0x1, 108, 0, 1573 },
-{ 0x8, 109, 0, 1575 },
-{ 0x4, 109, 0, 1576 },
-{ 0x2, 109, 0, 1577 },
-{ 0x1, 109, 1, 1579 },
-{ 0x1, 110, 1, 1578 },
-{ 0x1, 372, 0, 1073 },
-{ 0x8, 137, 0, 1580 },
-{ 0x4, 137, 0, 1581 },
-{ 0x2, 137, 0, 1582 },
-{ 0x1, 137, 1, 1584 },
-{ 0x1, 138, 1, 1583 },
-{ 0x1, 371, 0, 1074 },
-{ 0x8, 140, 0, 1585 },
-{ 0x4, 140, 0, 1586 },
-{ 0x2, 140, 0, 1587 },
-{ 0x1, 140, 1, 1589 },
-{ 0x1, 141, 1, 1588 },
-{ 0x1, 370, 0, 1075 },
-{ 0x8, 185, 0, 1590 },
-{ 0x4, 185, 0, 1591 },
-{ 0x2, 185, 0, 1592 },
-{ 0x1, 185, 1, 1594 },
-{ 0x1, 186, 0, 1593 },
-{ 0x8, 183, 0, 1595 },
-{ 0x4, 183, 0, 1596 },
-{ 0x2, 183, 0, 1597 },
-{ 0x1, 183, 1, 1599 },
-{ 0x1, 184, 0, 1598 },
-{ 0x8, 43, 0, 1604 },
-{ 0x18, 43, 0, 1600 },
-{ 0x4, 43, 0, 1605 },
-{ 0xc, 43, 0, 1601 },
-{ 0x2, 43, 0, 1606 },
-{ 0x6, 43, 0, 1602 },
-{ 0x1, 43, 0, 1607 },
-{ 0x3, 43, 0, 1603 },
-{ 0x51, 29, 0, 1609 },
-{ 0xd1, 29, 0, 1608 },
-{ 0x31, 29, 1, 1619 },
-{ 0x11, 30, 0, 1618 },
-{ 0x71, 29, 1, 1617 },
-{ 0x31, 30, 0, 1616 },
-{ 0x29, 29, 0, 1611 },
-{ 0x69, 29, 0, 1610 },
-{ 0x19, 29, 1, 1623 },
-{ 0x9, 30, 0, 1622 },
-{ 0x39, 29, 1, 1621 },
-{ 0x19, 30, 0, 1620 },
-{ 0x15, 29, 0, 1613 },
-{ 0x35, 29, 0, 1612 },
-{ 0xd, 29, 1, 1627 },
-{ 0x5, 30, 0, 1626 },
-{ 0x1d, 29, 1, 1625 },
-{ 0xd, 30, 0, 1624 },
-{ 0xb, 29, 0, 1615 },
-{ 0x1b, 29, 0, 1614 },
-{ 0x7, 29, 1, 1631 },
-{ 0x3, 30, 0, 1630 },
-{ 0xf, 29, 1, 1629 },
-{ 0x7, 30, 0, 1628 },
-{ 0xa2, 27, 0, 1633 },
-{ 0x1a2, 27, 0, 1632 },
-{ 0x62, 27, 1, 1643 },
-{ 0x22, 28, 0, 1642 },
-{ 0xe2, 27, 1, 1641 },
-{ 0x62, 28, 0, 1640 },
-{ 0x52, 27, 0, 1635 },
-{ 0xd2, 27, 0, 1634 },
-{ 0x32, 27, 1, 1647 },
-{ 0x12, 28, 0, 1646 },
-{ 0x72, 27, 1, 1645 },
-{ 0x32, 28, 0, 1644 },
-{ 0x2a, 27, 0, 1637 },
-{ 0x6a, 27, 0, 1636 },
-{ 0x1a, 27, 1, 1651 },
-{ 0xa, 28, 0, 1650 },
-{ 0x3a, 27, 1, 1649 },
-{ 0x1a, 28, 0, 1648 },
-{ 0x16, 27, 0, 1639 },
-{ 0x36, 27, 0, 1638 },
-{ 0xe, 27, 1, 1655 },
-{ 0x6, 28, 0, 1654 },
-{ 0x1e, 27, 1, 1653 },
-{ 0xe, 28, 0, 1652 },
-{ 0x51, 27, 0, 1657 },
-{ 0xd1, 27, 0, 1656 },
-{ 0x31, 27, 1, 1667 },
-{ 0x11, 28, 0, 1666 },
-{ 0x71, 27, 1, 1665 },
-{ 0x31, 28, 0, 1664 },
-{ 0x29, 27, 0, 1659 },
-{ 0x69, 27, 0, 1658 },
-{ 0x19, 27, 1, 1671 },
-{ 0x9, 28, 0, 1670 },
-{ 0x39, 27, 1, 1669 },
-{ 0x19, 28, 0, 1668 },
-{ 0x15, 27, 0, 1661 },
-{ 0x35, 27, 0, 1660 },
-{ 0xd, 27, 1, 1675 },
-{ 0x5, 28, 0, 1674 },
-{ 0x1d, 27, 1, 1673 },
-{ 0xd, 28, 0, 1672 },
-{ 0xb, 27, 0, 1663 },
-{ 0x1b, 27, 0, 1662 },
-{ 0x7, 27, 1, 1679 },
-{ 0x3, 28, 0, 1678 },
-{ 0xf, 27, 1, 1677 },
-{ 0x7, 28, 0, 1676 },
-{ 0x51, 25, 0, 1681 },
-{ 0xd1, 25, 0, 1680 },
-{ 0x31, 25, 1, 1691 },
-{ 0x11, 26, 0, 1690 },
-{ 0x71, 25, 1, 1689 },
-{ 0x31, 26, 0, 1688 },
-{ 0x29, 25, 0, 1683 },
-{ 0x69, 25, 0, 1682 },
-{ 0x19, 25, 1, 1695 },
-{ 0x9, 26, 0, 1694 },
-{ 0x39, 25, 1, 1693 },
-{ 0x19, 26, 0, 1692 },
-{ 0x15, 25, 0, 1685 },
-{ 0x35, 25, 0, 1684 },
-{ 0xd, 25, 1, 1699 },
-{ 0x5, 26, 0, 1698 },
-{ 0x1d, 25, 1, 1697 },
-{ 0xd, 26, 0, 1696 },
-{ 0xb, 25, 0, 1687 },
-{ 0x1b, 25, 0, 1686 },
-{ 0x7, 25, 1, 1703 },
-{ 0x3, 26, 0, 1702 },
-{ 0xf, 25, 1, 1701 },
-{ 0x7, 26, 0, 1700 },
-{ 0xa2, 23, 0, 1705 },
-{ 0x1a2, 23, 0, 1704 },
-{ 0x62, 23, 1, 1715 },
-{ 0x22, 24, 0, 1714 },
-{ 0xe2, 23, 1, 1713 },
-{ 0x62, 24, 0, 1712 },
-{ 0x52, 23, 0, 1707 },
-{ 0xd2, 23, 0, 1706 },
-{ 0x32, 23, 1, 1719 },
-{ 0x12, 24, 0, 1718 },
-{ 0x72, 23, 1, 1717 },
-{ 0x32, 24, 0, 1716 },
-{ 0x2a, 23, 0, 1709 },
-{ 0x6a, 23, 0, 1708 },
-{ 0x1a, 23, 1, 1723 },
-{ 0xa, 24, 0, 1722 },
-{ 0x3a, 23, 1, 1721 },
-{ 0x1a, 24, 0, 1720 },
-{ 0x16, 23, 0, 1711 },
-{ 0x36, 23, 0, 1710 },
-{ 0xe, 23, 1, 1727 },
-{ 0x6, 24, 0, 1726 },
-{ 0x1e, 23, 1, 1725 },
-{ 0xe, 24, 0, 1724 },
-{ 0x51, 23, 0, 1729 },
-{ 0xd1, 23, 0, 1728 },
-{ 0x31, 23, 1, 1739 },
-{ 0x11, 24, 0, 1738 },
-{ 0x71, 23, 1, 1737 },
-{ 0x31, 24, 0, 1736 },
-{ 0x29, 23, 0, 1731 },
-{ 0x69, 23, 0, 1730 },
-{ 0x19, 23, 1, 1743 },
-{ 0x9, 24, 0, 1742 },
-{ 0x39, 23, 1, 1741 },
-{ 0x19, 24, 0, 1740 },
-{ 0x15, 23, 0, 1733 },
-{ 0x35, 23, 0, 1732 },
-{ 0xd, 23, 1, 1747 },
-{ 0x5, 24, 0, 1746 },
-{ 0x1d, 23, 1, 1745 },
-{ 0xd, 24, 0, 1744 },
-{ 0xb, 23, 0, 1735 },
-{ 0x1b, 23, 0, 1734 },
-{ 0x7, 23, 1, 1751 },
-{ 0x3, 24, 0, 1750 },
-{ 0xf, 23, 1, 1749 },
-{ 0x7, 24, 0, 1748 },
-{ 0x51, 21, 1, 1777 },
-{ 0x50, 21, 0, 1753 },
-{ 0xd1, 21, 1, 1776 },
-{ 0xd0, 21, 0, 1752 },
-{ 0x31, 21, 1, 1787 },
-{ 0x30, 21, 1, 1763 },
-{ 0x11, 22, 1, 1786 },
-{ 0x10, 22, 0, 1762 },
-{ 0x71, 21, 1, 1785 },
-{ 0x70, 21, 1, 1761 },
-{ 0x31, 22, 1, 1784 },
-{ 0x30, 22, 0, 1760 },
-{ 0x29, 21, 1, 1779 },
-{ 0x28, 21, 0, 1755 },
-{ 0x69, 21, 1, 1778 },
-{ 0x68, 21, 0, 1754 },
-{ 0x19, 21, 1, 1791 },
-{ 0x18, 21, 1, 1767 },
-{ 0x9, 22, 1, 1790 },
-{ 0x8, 22, 0, 1766 },
-{ 0x39, 21, 1, 1789 },
-{ 0x38, 21, 1, 1765 },
-{ 0x19, 22, 1, 1788 },
-{ 0x18, 22, 0, 1764 },
-{ 0x15, 21, 1, 1781 },
-{ 0x14, 21, 0, 1757 },
-{ 0x35, 21, 1, 1780 },
-{ 0x34, 21, 0, 1756 },
-{ 0xd, 21, 1, 1795 },
-{ 0xc, 21, 1, 1771 },
-{ 0x5, 22, 1, 1794 },
-{ 0x4, 22, 0, 1770 },
-{ 0x1d, 21, 1, 1793 },
-{ 0x1c, 21, 1, 1769 },
-{ 0xd, 22, 1, 1792 },
-{ 0xc, 22, 0, 1768 },
-{ 0xb, 21, 1, 1783 },
-{ 0xa, 21, 0, 1759 },
-{ 0x1b, 21, 1, 1782 },
-{ 0x1a, 21, 0, 1758 },
-{ 0x7, 21, 1, 1799 },
-{ 0x6, 21, 1, 1775 },
-{ 0x3, 22, 1, 1798 },
-{ 0x2, 22, 0, 1774 },
-{ 0xf, 21, 1, 1797 },
-{ 0xe, 21, 1, 1773 },
-{ 0x7, 22, 1, 1796 },
-{ 0x6, 22, 0, 1772 },
-{ 0x8, 20, 0, 1801 },
-{ 0x18, 20, 0, 1800 },
-{ 0x1, 20, 1, 1805 },
-{ 0x2, 20, 0, 1804 },
-{ 0x3, 20, 1, 1803 },
-{ 0x4, 20, 0, 1802 },
-{ 0x1, 287, 0, 1806 },
-{ 0x14, 42, 0, 1809 },
-{ 0x34, 42, 0, 1807 },
-{ 0xc, 42, 0, 1810 },
-{ 0x1c, 42, 0, 1808 },
-{ 0x2, 42, 0, 1813 },
-{ 0x6, 42, 0, 1811 },
-{ 0x1, 42, 0, 1814 },
-{ 0x3, 42, 0, 1812 },
-{ 0x51, 18, 0, 1816 },
-{ 0xd1, 18, 0, 1815 },
-{ 0x31, 18, 1, 1826 },
-{ 0x11, 19, 0, 1825 },
-{ 0x71, 18, 1, 1824 },
-{ 0x31, 19, 0, 1823 },
-{ 0x29, 18, 0, 1818 },
-{ 0x69, 18, 0, 1817 },
-{ 0x19, 18, 1, 1830 },
-{ 0x9, 19, 0, 1829 },
-{ 0x39, 18, 1, 1828 },
-{ 0x19, 19, 0, 1827 },
-{ 0x15, 18, 0, 1820 },
-{ 0x35, 18, 0, 1819 },
-{ 0xd, 18, 1, 1834 },
-{ 0x5, 19, 0, 1833 },
-{ 0x1d, 18, 1, 1832 },
-{ 0xd, 19, 0, 1831 },
-{ 0xb, 18, 0, 1822 },
-{ 0x1b, 18, 0, 1821 },
-{ 0x7, 18, 1, 1838 },
-{ 0x3, 19, 0, 1837 },
-{ 0xf, 18, 1, 1836 },
-{ 0x7, 19, 0, 1835 },
-{ 0x1, 31, 0, 1839 },
-{ 0x1, 103, 0, 1840 },
-{ 0x2, 44, 0, 1841 },
-{ 0x1, 44, 0, 1842 },
-{ 0x1, 335, 0, 1843 },
-{ 0x2, 51, 0, 1844 },
-{ 0x1, 51, 0, 1845 },
-{ 0x1, 96, 0, 1846 },
-{ 0x51, 16, 0, 1848 },
-{ 0xd1, 16, 0, 1847 },
-{ 0x31, 16, 1, 1858 },
-{ 0x11, 17, 0, 1857 },
-{ 0x71, 16, 1, 1856 },
-{ 0x31, 17, 0, 1855 },
-{ 0x29, 16, 0, 1850 },
-{ 0x69, 16, 0, 1849 },
-{ 0x19, 16, 1, 1862 },
-{ 0x9, 17, 0, 1861 },
-{ 0x39, 16, 1, 1860 },
-{ 0x19, 17, 0, 1859 },
-{ 0x15, 16, 0, 1852 },
-{ 0x35, 16, 0, 1851 },
-{ 0xd, 16, 1, 1866 },
-{ 0x5, 17, 0, 1865 },
-{ 0x1d, 16, 1, 1864 },
-{ 0xd, 17, 0, 1863 },
-{ 0xb, 16, 0, 1854 },
-{ 0x1b, 16, 0, 1853 },
-{ 0x7, 16, 1, 1870 },
-{ 0x3, 17, 0, 1869 },
-{ 0xf, 16, 1, 1868 },
-{ 0x7, 17, 0, 1867 },
-{ 0xa20, 14, 0, 1872 },
-{ 0x1a20, 14, 0, 1871 },
-{ 0x620, 14, 1, 1882 },
-{ 0x220, 15, 0, 1881 },
-{ 0xe20, 14, 1, 1880 },
-{ 0x620, 15, 0, 1879 },
-{ 0x520, 14, 0, 1874 },
-{ 0xd20, 14, 0, 1873 },
-{ 0x320, 14, 1, 1886 },
-{ 0x120, 15, 0, 1885 },
-{ 0x720, 14, 1, 1884 },
-{ 0x320, 15, 0, 1883 },
-{ 0x2a0, 14, 0, 1876 },
-{ 0x6a0, 14, 0, 1875 },
-{ 0x1a0, 14, 1, 1890 },
-{ 0xa0, 15, 0, 1889 },
-{ 0x3a0, 14, 1, 1888 },
-{ 0x1a0, 15, 0, 1887 },
-{ 0x160, 14, 0, 1878 },
-{ 0x360, 14, 0, 1877 },
-{ 0xe0, 14, 1, 1894 },
-{ 0x60, 15, 0, 1893 },
-{ 0x1e0, 14, 1, 1892 },
-{ 0xe0, 15, 0, 1891 },
-{ 0x51, 14, 1, 1920 },
-{ 0x50, 14, 0, 1896 },
-{ 0xd1, 14, 1, 1919 },
-{ 0xd0, 14, 0, 1895 },
-{ 0x31, 14, 1, 1930 },
-{ 0x30, 14, 1, 1906 },
-{ 0x11, 15, 1, 1929 },
-{ 0x10, 15, 0, 1905 },
-{ 0x71, 14, 1, 1928 },
-{ 0x70, 14, 1, 1904 },
-{ 0x31, 15, 1, 1927 },
-{ 0x30, 15, 0, 1903 },
-{ 0x29, 14, 1, 1922 },
-{ 0x28, 14, 0, 1898 },
-{ 0x69, 14, 1, 1921 },
-{ 0x68, 14, 0, 1897 },
-{ 0x19, 14, 1, 1934 },
-{ 0x18, 14, 1, 1910 },
-{ 0x9, 15, 1, 1933 },
-{ 0x8, 15, 0, 1909 },
-{ 0x39, 14, 1, 1932 },
-{ 0x38, 14, 1, 1908 },
-{ 0x19, 15, 1, 1931 },
-{ 0x18, 15, 0, 1907 },
-{ 0x15, 14, 1, 1924 },
-{ 0x14, 14, 0, 1900 },
-{ 0x35, 14, 1, 1923 },
-{ 0x34, 14, 0, 1899 },
-{ 0xd, 14, 1, 1938 },
-{ 0xc, 14, 1, 1914 },
-{ 0x5, 15, 1, 1937 },
-{ 0x4, 15, 0, 1913 },
-{ 0x1d, 14, 1, 1936 },
-{ 0x1c, 14, 1, 1912 },
-{ 0xd, 15, 1, 1935 },
-{ 0xc, 15, 0, 1911 },
-{ 0xb, 14, 1, 1926 },
-{ 0xa, 14, 0, 1902 },
-{ 0x1b, 14, 1, 1925 },
-{ 0x1a, 14, 0, 1901 },
-{ 0x7, 14, 1, 1942 },
-{ 0x6, 14, 1, 1918 },
-{ 0x3, 15, 1, 1941 },
-{ 0x2, 15, 0, 1917 },
-{ 0xf, 14, 1, 1940 },
-{ 0xe, 14, 1, 1916 },
-{ 0x7, 15, 1, 1939 },
-{ 0x6, 15, 0, 1915 },
-{ 0x8, 13, 0, 1944 },
-{ 0x18, 13, 0, 1943 },
-{ 0x1, 13, 1, 1948 },
-{ 0x2, 13, 0, 1947 },
-{ 0x3, 13, 1, 1946 },
-{ 0x4, 13, 0, 1945 },
-{ 0x1, 84, 1, 2024 },
-{ 0x1, 85, 1, 2023 },
-{ 0x1, 86, 1, 2022 },
-{ 0x1, 87, 1, 2021 },
-{ 0x39, 40, 1, 21 },
-{ 0x19, 41, 0, 20 },
-{ 0x3, 84, 1, 2020 },
-{ 0x3, 85, 1, 2019 },
-{ 0x3, 86, 1, 2018 },
-{ 0x3, 87, 1, 2017 },
-{ 0x69, 40, 0, 10 },
-{ 0x14, 79, 1, 2014 },
-{ 0xa, 83, 1, 2013 },
-{ 0xd1, 40, 0, 8 },
-{ 0x34, 79, 1, 1950 },
-{ 0xe, 91, 0, 1949 },
-{ 0xc, 79, 1, 2094 },
-{ 0x6, 83, 0, 2093 },
-{ 0x2, 79, 1, 1956 },
-{ 0x2, 82, 0, 1955 },
-{ 0x12, 79, 1, 1954 },
-{ 0x6, 82, 0, 1953 },
-{ 0xa, 79, 1, 2016 },
-{ 0x5, 83, 1, 2015 },
-{ 0x71, 40, 1, 17 },
-{ 0x31, 41, 0, 16 },
-{ 0x1a, 79, 1, 1952 },
-{ 0x7, 91, 0, 1951 },
-{ 0x6, 79, 1, 2096 },
-{ 0x3, 83, 0, 2095 },
-{ 0x1, 79, 1, 2104 },
-{ 0x1, 80, 1, 2103 },
-{ 0x1, 81, 1, 2102 },
-{ 0x1, 82, 0, 2101 },
-{ 0x3, 79, 1, 2100 },
-{ 0x3, 80, 1, 2099 },
-{ 0x3, 81, 1, 2098 },
-{ 0x3, 82, 0, 2097 },
-{ 0x8, 60, 1, 2036 },
-{ 0x2, 63, 1, 2033 },
-{ 0x1, 65, 1, 2035 },
-{ 0x1, 66, 1, 2034 },
-{ 0xf, 40, 1, 29 },
-{ 0x7, 41, 0, 28 },
-{ 0x18, 60, 1, 2032 },
-{ 0x6, 63, 1, 2029 },
-{ 0x3, 65, 1, 2031 },
-{ 0x3, 66, 1, 2030 },
-{ 0x1b, 40, 0, 14 },
-{ 0x14, 60, 1, 2026 },
-{ 0xa, 64, 1, 2025 },
-{ 0x35, 40, 0, 12 },
-{ 0x34, 60, 1, 1958 },
-{ 0xe, 70, 0, 1957 },
-{ 0xc, 60, 1, 2106 },
-{ 0x6, 64, 0, 2105 },
-{ 0x2, 60, 1, 1964 },
-{ 0x4, 63, 0, 1963 },
-{ 0x12, 60, 1, 1962 },
-{ 0xc, 63, 0, 1961 },
-{ 0xa, 60, 1, 2028 },
-{ 0x5, 64, 1, 2027 },
-{ 0x1d, 40, 1, 25 },
-{ 0xd, 41, 0, 24 },
-{ 0x1a, 60, 1, 1960 },
-{ 0x7, 70, 0, 1959 },
-{ 0x6, 60, 1, 2108 },
-{ 0x3, 64, 0, 2107 },
-{ 0x1, 60, 1, 2116 },
-{ 0x1, 61, 1, 2115 },
-{ 0x1, 62, 1, 2114 },
-{ 0x1, 63, 0, 2113 },
-{ 0x3, 60, 1, 2112 },
-{ 0x3, 61, 1, 2111 },
-{ 0x3, 62, 1, 2110 },
-{ 0x3, 63, 0, 2109 },
-{ 0x28, 76, 1, 2040 },
-{ 0x44, 77, 1, 2037 },
-{ 0x88, 77, 1, 2039 },
-{ 0x28, 78, 0, 2038 },
-{ 0x68, 76, 1, 1968 },
-{ 0x188, 77, 1, 1967 },
-{ 0x38, 89, 1, 1966 },
-{ 0x38, 90, 0, 1965 },
-{ 0x18, 76, 1, 2120 },
-{ 0x14, 77, 1, 2117 },
-{ 0x28, 77, 1, 2119 },
-{ 0x18, 78, 0, 2118 },
-{ 0x14, 76, 1, 2044 },
-{ 0x24, 77, 1, 2043 },
-{ 0x48, 77, 1, 2041 },
-{ 0x14, 78, 0, 2042 },
-{ 0x34, 76, 1, 1972 },
-{ 0x64, 77, 1, 1971 },
-{ 0x1c, 89, 1, 1970 },
-{ 0x1c, 90, 0, 1969 },
-{ 0xc, 76, 1, 2124 },
-{ 0xc, 77, 1, 2123 },
-{ 0x18, 77, 1, 2121 },
-{ 0xc, 78, 0, 2122 },
-{ 0xa, 76, 1, 2048 },
-{ 0x11, 77, 1, 2045 },
-{ 0x22, 77, 1, 2047 },
-{ 0xa, 78, 0, 2046 },
-{ 0x1a, 76, 1, 1976 },
-{ 0x62, 77, 1, 1975 },
-{ 0xe, 89, 1, 1974 },
-{ 0xe, 90, 0, 1973 },
-{ 0x6, 76, 1, 2128 },
-{ 0x5, 77, 1, 2125 },
-{ 0xa, 77, 1, 2127 },
-{ 0x6, 78, 0, 2126 },
-{ 0x5, 76, 1, 2052 },
-{ 0x9, 77, 1, 2051 },
-{ 0x12, 77, 1, 2049 },
-{ 0x5, 78, 0, 2050 },
-{ 0xd, 76, 1, 1980 },
-{ 0x19, 77, 1, 1979 },
-{ 0x7, 89, 1, 1978 },
-{ 0x7, 90, 0, 1977 },
-{ 0x3, 76, 1, 2132 },
-{ 0x3, 77, 1, 2131 },
-{ 0x6, 77, 1, 2129 },
-{ 0x3, 78, 0, 2130 },
-{ 0x28, 57, 1, 2056 },
-{ 0x44, 58, 1, 2053 },
-{ 0x88, 58, 1, 2055 },
-{ 0x28, 59, 0, 2054 },
-{ 0x68, 57, 1, 1984 },
-{ 0x188, 58, 1, 1983 },
-{ 0x38, 68, 1, 1982 },
-{ 0x38, 69, 0, 1981 },
-{ 0x18, 57, 1, 2136 },
-{ 0x14, 58, 1, 2133 },
-{ 0x28, 58, 1, 2135 },
-{ 0x18, 59, 0, 2134 },
-{ 0x14, 57, 1, 2060 },
-{ 0x24, 58, 1, 2059 },
-{ 0x48, 58, 1, 2057 },
-{ 0x14, 59, 0, 2058 },
-{ 0x34, 57, 1, 1988 },
-{ 0x64, 58, 1, 1987 },
-{ 0x1c, 68, 1, 1986 },
-{ 0x1c, 69, 0, 1985 },
-{ 0xc, 57, 1, 2140 },
-{ 0xc, 58, 1, 2139 },
-{ 0x18, 58, 1, 2137 },
-{ 0xc, 59, 0, 2138 },
-{ 0xa, 57, 1, 2064 },
-{ 0x11, 58, 1, 2061 },
-{ 0x22, 58, 1, 2063 },
-{ 0xa, 59, 0, 2062 },
-{ 0x1a, 57, 1, 1992 },
-{ 0x62, 58, 1, 1991 },
-{ 0xe, 68, 1, 1990 },
-{ 0xe, 69, 0, 1989 },
-{ 0x6, 57, 1, 2144 },
-{ 0x5, 58, 1, 2141 },
-{ 0xa, 58, 1, 2143 },
-{ 0x6, 59, 0, 2142 },
-{ 0x5, 57, 1, 2068 },
-{ 0x9, 58, 1, 2067 },
-{ 0x12, 58, 1, 2065 },
-{ 0x5, 59, 0, 2066 },
-{ 0xd, 57, 1, 1996 },
-{ 0x19, 58, 1, 1995 },
-{ 0x7, 68, 1, 1994 },
-{ 0x7, 69, 0, 1993 },
-{ 0x3, 57, 1, 2148 },
-{ 0x3, 58, 1, 2147 },
-{ 0x6, 58, 1, 2145 },
-{ 0x3, 59, 0, 2146 },
-{ 0x8, 71, 1, 2080 },
-{ 0x2, 72, 1, 2079 },
-{ 0x2, 73, 1, 2078 },
-{ 0x2, 74, 0, 2077 },
-{ 0x18, 71, 1, 2076 },
-{ 0x6, 72, 1, 2075 },
-{ 0x6, 73, 1, 2074 },
-{ 0x6, 74, 0, 2073 },
-{ 0x14, 71, 1, 2070 },
-{ 0xa, 75, 0, 2069 },
-{ 0x34, 71, 1, 1998 },
-{ 0xe, 88, 0, 1997 },
-{ 0xc, 71, 1, 2150 },
-{ 0x6, 75, 0, 2149 },
-{ 0x2, 71, 1, 2004 },
-{ 0x4, 74, 0, 2003 },
-{ 0x12, 71, 1, 2002 },
-{ 0xc, 74, 0, 2001 },
-{ 0xa, 71, 1, 2072 },
-{ 0x5, 75, 0, 2071 },
-{ 0x1a, 71, 1, 2000 },
-{ 0x7, 88, 0, 1999 },
-{ 0x6, 71, 1, 2152 },
-{ 0x3, 75, 0, 2151 },
-{ 0x1, 71, 1, 2160 },
-{ 0x1, 72, 1, 2159 },
-{ 0x1, 73, 1, 2158 },
-{ 0x1, 74, 0, 2157 },
-{ 0x3, 71, 1, 2156 },
-{ 0x3, 72, 1, 2155 },
-{ 0x3, 73, 1, 2154 },
-{ 0x3, 74, 0, 2153 },
-{ 0x8, 52, 1, 2092 },
-{ 0x2, 53, 1, 2091 },
-{ 0x2, 54, 1, 2090 },
-{ 0x2, 55, 0, 2089 },
-{ 0x18, 52, 1, 2088 },
-{ 0x6, 53, 1, 2087 },
-{ 0x6, 54, 1, 2086 },
-{ 0x6, 55, 0, 2085 },
-{ 0x14, 52, 1, 2082 },
-{ 0xa, 56, 0, 2081 },
-{ 0x34, 52, 1, 2006 },
-{ 0xe, 67, 0, 2005 },
-{ 0xc, 52, 1, 2162 },
-{ 0x6, 56, 0, 2161 },
-{ 0x2, 52, 1, 2012 },
-{ 0x4, 55, 0, 2011 },
-{ 0x12, 52, 1, 2010 },
-{ 0xc, 55, 0, 2009 },
-{ 0xa, 52, 1, 2084 },
-{ 0x5, 56, 0, 2083 },
-{ 0x1a, 52, 1, 2008 },
-{ 0x7, 67, 0, 2007 },
-{ 0x6, 52, 1, 2164 },
-{ 0x3, 56, 0, 2163 },
-{ 0x1, 52, 1, 2172 },
-{ 0x1, 53, 1, 2171 },
-{ 0x1, 54, 1, 2170 },
-{ 0x1, 55, 0, 2169 },
-{ 0x3, 52, 1, 2168 },
-{ 0x3, 53, 1, 2167 },
-{ 0x3, 54, 1, 2166 },
-{ 0x3, 55, 0, 2165 },
-{ 0x1, 4, 0, 2173 },
-{ 0x1, 245, 0, 2174 },
-{ 0x1, 327, 0, 2175 },
-{ 0x1, 322, 0, 2176 },
-{ 0x2, 306, 0, 2177 },
-{ 0x1, 306, 0, 2180 },
-{ 0x2, 305, 0, 2178 },
-{ 0x1, 305, 0, 2181 },
-{ 0x2, 304, 0, 2179 },
-{ 0x1, 304, 0, 2182 },
-{ 0x1, 303, 0, 2183 },
-{ 0x1, 302, 0, 2184 },
-{ 0x2, 301, 0, 2185 },
-{ 0x1, 301, 0, 2187 },
-{ 0x2, 300, 0, 2186 },
-{ 0x1, 300, 0, 2188 },
-{ 0x1, 330, 0, 2195 },
-{ 0x8, 329, 0, 2189 },
-{ 0x4, 329, 0, 2191 },
-{ 0x2, 329, 0, 2193 },
-{ 0x1, 329, 0, 2196 },
-{ 0x8, 328, 0, 2190 },
-{ 0x4, 328, 0, 2192 },
-{ 0x2, 328, 0, 2194 },
-{ 0x1, 328, 0, 2197 },
-{ 0x1, 299, 0, 2204 },
-{ 0x8, 298, 0, 2198 },
-{ 0x4, 298, 0, 2200 },
-{ 0x2, 298, 0, 2202 },
-{ 0x1, 298, 0, 2205 },
-{ 0x8, 297, 0, 2199 },
-{ 0x4, 297, 0, 2201 },
-{ 0x2, 297, 1, 2203 },
-{ 0x4, 106, 0, 1249 },
-{ 0x1, 297, 0, 2206 },
-{ 0x1, 6, 0, 2207 },
-{ 0x1, 7, 0, 2208 },
-{ 0x1, 244, 0, 2209 },
-{ 0x1, 243, 0, 2210 },
-{ 0x1, 393, 0, 2211 },
-{ 0x1, 294, 0, 2212 },
-{ 0x1, 12, 0, 2213 },
-{ 0x1, 10, 0, 2214 },
-{ 0x1, 368, 0, 2215 },
-{ 0x1, 342, 0, 2216 },
-{ 0x1, 341, 0, 2217 },
-{ 0x1, 392, 0, 2218 },
-{ 0x1, 293, 0, 2219 },
-{ 0x1, 11, 0, 2220 },
-{ 0x1, 9, 0, 2221 },
-{ 0x1, 5, 0, 2222 },
-{ 0x1, 367, 0, 2223 },
-{ 0x1, 366, 0, 2224 },
-{ 0x1, 1, 0, 2225 },
-{ 0x1, 0, 0, 2226 },
-};
-
diff --git a/contrib/disas/ia64-asmtab.h b/contrib/disas/ia64-asmtab.h
deleted file mode 100644
index 822007a3..00000000
--- a/contrib/disas/ia64-asmtab.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ia64-asmtab.h -- Header for compacted IA-64 opcode tables.
-   Copyright 1999, 2000 Free Software Foundation, Inc.
-   Contributed by Bob Manson of Cygnus Support <manson@cygnus.com>
-
-   This file is part of GDB, GAS, and the GNU binutils.
-
-   GDB, GAS, and the GNU binutils are free software; you can redistribute
-   them and/or modify them under the terms of the GNU General Public
-   License as published by the Free Software Foundation; either version
-   2, or (at your option) any later version.
-
-   GDB, GAS, and the GNU binutils are distributed in the hope that they
-   will be useful, but WITHOUT ANY WARRANTY; without even the implied
-   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-   the GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this file; see the file COPYING.  If not, write to the
-   Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-   02111-1307, USA.  */
-
-#ifndef IA64_ASMTAB_H
-#define IA64_ASMTAB_H
-
-#include "opcode/ia64.h"
-
-/* The primary opcode table is made up of the following: */
-struct ia64_main_table
-{
-  /* The entry in the string table that corresponds to the name of this
-     opcode. */
-  unsigned short name_index;
-
-  /* The type of opcode; corresponds to the TYPE field in 
-     struct ia64_opcode. */
-  unsigned char opcode_type;
-
-  /* The number of outputs for this opcode. */
-  unsigned char num_outputs;
-
-  /* The base insn value for this opcode.  It may be modified by completers. */
-  ia64_insn opcode;
-
-  /* The mask of valid bits in OPCODE. Zeros indicate operand fields. */
-  ia64_insn mask;
-
-  /* The operands of this instruction.  Corresponds to the OPERANDS field
-     in struct ia64_opcode. */
-  unsigned char operands[5];
-
-  /* The flags for this instruction.  Corresponds to the FLAGS field in
-     struct ia64_opcode. */
-  short flags;
-
-  /* The tree of completers for this instruction; this is an offset into
-     completer_table. */
-  short completers;
-};
-
-/* Each instruction has a set of possible "completers", or additional
-   suffixes that can alter the instruction's behavior, and which has
-   potentially different dependencies.
-
-   The completer entries modify certain bits in the instruction opcode.
-   Which bits are to be modified are marked by the BITS, MASK and
-   OFFSET fields.  The completer entry may also note dependencies for the
-   opcode. 
-
-   These completers are arranged in a DAG; the pointers are indexes
-   into the completer_table array.  The completer DAG is searched by
-   find_completer () and ia64_find_matching_opcode ().
-
-   Note that each completer needs to be applied in turn, so that if we
-   have the instruction
-   	cmp.lt.unc
-   the completer entries for both "lt" and "unc" would need to be applied
-   to the opcode's value.
-
-   Some instructions do not require any completers; these contain an
-   empty completer entry.  Instructions that require a completer do
-   not contain an empty entry.
-
-   Terminal completers (those completers that validly complete an
-   instruction) are marked by having the TERMINAL_COMPLETER flag set. 
-
-   Only dependencies listed in the terminal completer for an opcode are
-   considered to apply to that opcode instance. */
-
-struct ia64_completer_table
-{
-  /* The bit value that this completer sets. */
-  unsigned int bits;
-
-  /* And its mask. 1s are bits that are to be modified in the 
-     instruction. */
-  unsigned int mask;
-
-  /* The entry in the string table that corresponds to the name of this
-     completer. */
-  unsigned short name_index;
-
-  /* An alternative completer, or -1 if this is the end of the chain. */
-  short alternative;
-
-  /* A pointer to the DAG of completers that can potentially follow
-     this one, or -1. */
-  short subentries;
-
-  /* The bit offset in the instruction where BITS and MASK should be
-     applied. */
-  unsigned char offset : 7;
-
-  unsigned char terminal_completer : 1;
-
-  /* Index into the dependency list table */
-  short dependencies;
-};
-
-/* This contains sufficient information for the disassembler to resolve
-   the complete name of the original instruction.  */
-struct ia64_dis_names 
-{
-  /* COMPLETER_INDEX represents the tree of completers that make up
-     the instruction.  The LSB represents the top of the tree for the
-     specified instruction. 
-
-     A 0 bit indicates to go to the next alternate completer via the
-     alternative field; a 1 bit indicates that the current completer
-     is part of the instruction, and to go down the subentries index.
-     We know we've reached the final completer when we run out of 1
-     bits.
-
-     There is always at least one 1 bit. */
-  unsigned int completer_index : 20;
-
-  /* The index in the main_table[] array for the instruction. */
-  unsigned short insn_index : 11;
-
-  /* If set, the next entry in this table is an alternate possibility
-     for this instruction encoding.  Which one to use is determined by
-     the instruction type and other factors (see opcode_verify ()).  */
-  unsigned int next_flag : 1;
-
-  /* The disassembly priority of this entry among instructions. */
-  unsigned short priority;
-};
-
-#endif
diff --git a/contrib/disas/ia64-dis.c b/contrib/disas/ia64-dis.c
deleted file mode 100644
index 820dfbb4..00000000
--- a/contrib/disas/ia64-dis.c
+++ /dev/null
@@ -1,274 +0,0 @@
-/* ia64-dis.c -- Disassemble ia64 instructions
-   Copyright 1998, 1999, 2000 Free Software Foundation, Inc.
-   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
-
-   This file is part of GDB, GAS, and the GNU binutils.
-
-   GDB, GAS, and the GNU binutils are free software; you can redistribute
-   them and/or modify them under the terms of the GNU General Public
-   License as published by the Free Software Foundation; either version
-   2, or (at your option) any later version.
-
-   GDB, GAS, and the GNU binutils are distributed in the hope that they
-   will be useful, but WITHOUT ANY WARRANTY; without even the implied
-   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-   the GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this file; see the file COPYING.  If not, write to the
-   Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-   02111-1307, USA.  */
-
-/* search for comments by ud3 */
-//ud3 #include <assert.h>
-//ud3 #include <string.h>
-
-//ud3 #include "dis-asm.h"
-#include "opcode/ia64.h"
-
-#define NELEMS(a)	((int) (sizeof (a) / sizeof (a[0])))
-
-/* Disassemble ia64 instruction.  */
-
-/* Return the instruction type for OPCODE found in unit UNIT. */
-
-static enum ia64_insn_type
-unit_to_type (ia64_insn opcode, enum ia64_unit unit)
-{
-  enum ia64_insn_type type;
-  int op;
-
-  op = IA64_OP (opcode);
-
-  if (op >= 8 && (unit == IA64_UNIT_I || unit == IA64_UNIT_M))
-    {
-      type = IA64_TYPE_A;
-    }
-  else
-    {
-      switch (unit)
-	{
-	case IA64_UNIT_I:
-	  type = IA64_TYPE_I; break;
-	case IA64_UNIT_M:
-	  type = IA64_TYPE_M; break;
-	case IA64_UNIT_B:
-	  type = IA64_TYPE_B; break;
-	case IA64_UNIT_F:
-	  type = IA64_TYPE_F; break;
-        case IA64_UNIT_L:
-	case IA64_UNIT_X:
-	  type = IA64_TYPE_X; break;
-	default:
-	  type = -1;
-	}
-    }
-  return type;
-}
-
-int
-print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info)
-{
-  ia64_insn t0, t1, slot[3], template, s_bit, insn;
-  int slotnum, j, status, need_comma, retval, slot_multiplier;
-  const struct ia64_operand *odesc;
-  const struct ia64_opcode *idesc;
-  const char *err, *str, *tname;
-  BFD_HOST_U_64_BIT value;
-  bfd_byte bundle[16];
-  enum ia64_unit unit;
-  char regname[16];
-
-  if (info->bytes_per_line == 0)
-    info->bytes_per_line = 6;
-  info->display_endian = info->endian;
-
-  slot_multiplier = info->bytes_per_line;
-  retval = slot_multiplier;
-
-  slotnum = (((long) memaddr) & 0xf) / slot_multiplier;
-  if (slotnum > 2)
-    return -1;
-
-  memaddr -= (memaddr & 0xf);
-  status = (*info->read_memory_func) (memaddr, bundle, sizeof (bundle), info);
-  if (status != 0)
-    {
-      (*info->memory_error_func) (status, memaddr, info);
-      return -1;
-    }
-  /* bundles are always in little-endian byte order */
-  t0 = bfd_getl64 (bundle);
-  t1 = bfd_getl64 (bundle + 8);
-  s_bit = t0 & 1;
-  template = (t0 >> 1) & 0xf;
-  slot[0] = (t0 >>  5) & 0x1ffffffffffLL;
-  slot[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
-  slot[2] = (t1 >> 23) & 0x1ffffffffffLL;
-
-  tname = ia64_templ_desc[template].name;
-  if (slotnum == 0)
-    (*info->fprintf_func) (info->stream, "[%s] ", tname);
-  else
-    (*info->fprintf_func) (info->stream, "      ", tname);
-
-  unit = ia64_templ_desc[template].exec_unit[slotnum];
-
-  if (template == 2 && slotnum == 1)
-    {
-      /* skip L slot in MLI template: */
-      slotnum = 2;
-      retval += slot_multiplier;
-    }
-
-  insn = slot[slotnum];
-
-  if (unit == IA64_UNIT_NIL)
-    goto decoding_failed;
-
-  idesc = ia64_dis_opcode (insn, unit_to_type (insn, unit));
-  if (idesc == NULL)
-    goto decoding_failed;
-
-  /* print predicate, if any: */
-
-  if ((idesc->flags & IA64_OPCODE_NO_PRED)
-      || (insn & 0x3f) == 0)
-    (*info->fprintf_func) (info->stream, "      ");
-  else
-    (*info->fprintf_func) (info->stream, "(p%02d) ", (int)(insn & 0x3f));
-
-  /* now the actual instruction: */
-
-  (*info->fprintf_func) (info->stream, "%s", idesc->name);
-  if (idesc->operands[0])
-    (*info->fprintf_func) (info->stream, " ");
-
-  need_comma = 0;
-  for (j = 0; j < NELEMS (idesc->operands) && idesc->operands[j]; ++j)
-    {
-      odesc = elf64_ia64_operands + idesc->operands[j];
-
-      if (need_comma)
-	(*info->fprintf_func) (info->stream, ",");
-
-      if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
-	{
-	  /* special case of 64 bit immediate load: */
-	  value = ((insn >> 13) & 0x7f) | (((insn >> 27) & 0x1ff) << 7)
-	    | (((insn >> 22) & 0x1f) << 16) | (((insn >> 21) & 0x1) << 21)
-	    | (slot[1] << 22) | (((insn >> 36) & 0x1) << 63);
-	}
-      else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
-        {
-          /* 62-bit immediate for nop.x/break.x */
-          value = ((slot[1] & 0x1ffffffffffLL) << 21)
-            | (((insn >> 36) & 0x1) << 20)
-            | ((insn >> 6) & 0xfffff);
-        }
-      else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
-	{
-	  /* 60-bit immedate for long branches.  */
-	  value = (((insn >> 13) & 0xfffff)
-		   | (((insn >> 36) & 1) << 59)
-		   | (slot[1] << 20)) << 4;
-	}
-      else
-	{
-	  err = (*odesc->extract) (odesc, insn, &value);
-	  if (err)
-	    {
-	      (*info->fprintf_func) (info->stream, "%s", err);
-	      goto done;
-	    }
-	}
-
-	switch (odesc->class)
-	  {
-	  case IA64_OPND_CLASS_CST:
-	    (*info->fprintf_func) (info->stream, "%s", odesc->str);
-	    break;
-
-	  case IA64_OPND_CLASS_REG:
-	    if (odesc->str[0] == 'a' && odesc->str[1] == 'r')
-	      {
-		switch (value)
-		  {
-		  case 0: case 1: case 2: case 3:
-		  case 4: case 5: case 6: case 7:
-		    sprintf (regname, "ar.k%u", (unsigned int) value);
-		    break;
-		  case 16:	strcpy (regname, "ar.rsc"); break;
-		  case 17:	strcpy (regname, "ar.bsp"); break;
-		  case 18:	strcpy (regname, "ar.bspstore"); break;
-		  case 19:	strcpy (regname, "ar.rnat"); break;
-		  case 32:	strcpy (regname, "ar.ccv"); break;
-		  case 36:	strcpy (regname, "ar.unat"); break;
-		  case 40:	strcpy (regname, "ar.fpsr"); break;
-		  case 44:	strcpy (regname, "ar.itc"); break;
-		  case 64:	strcpy (regname, "ar.pfs"); break;
-		  case 65:	strcpy (regname, "ar.lc"); break;
-		  case 66:	strcpy (regname, "ar.ec"); break;
-		  default:
-		    sprintf (regname, "ar%u", (unsigned int) value);
-		    break;
-		  }
-		(*info->fprintf_func) (info->stream, "%s", regname);
-	      }
-	    else
-	      (*info->fprintf_func) (info->stream, "%s%d", odesc->str, (int)value);
-	    break;
-
-	  case IA64_OPND_CLASS_IND:
-	    (*info->fprintf_func) (info->stream, "%s[r%d]", odesc->str, (int)value);
-	    break;
-
-	  case IA64_OPND_CLASS_ABS:
-	    str = 0;
-	    if (odesc - elf64_ia64_operands == IA64_OPND_MBTYPE4)
-	      switch (value)
-		{
-		case 0x0: str = "@brcst"; break;
-		case 0x8: str = "@mix"; break;
-		case 0x9: str = "@shuf"; break;
-		case 0xa: str = "@alt"; break;
-		case 0xb: str = "@rev"; break;
-		}
-
-	    if (str)
-	      (*info->fprintf_func) (info->stream, "%s", str);
-	    else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_SIGNED)
-	      (*info->fprintf_func) (info->stream, "%lld", value);
-	    else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_UNSIGNED)
-	      (*info->fprintf_func) (info->stream, "%llu", value);
-	    else
-	      (*info->fprintf_func) (info->stream, "0x%llx", value);
-	    break;
-
-	  case IA64_OPND_CLASS_REL:
-	    (*info->print_address_func) (memaddr + value, info);
-	    break;
-	  }
-
-      need_comma = 1;
-      if (j + 1 == idesc->num_outputs)
-	{
-	  (*info->fprintf_func) (info->stream, "=");
-	  need_comma = 0;
-	}
-    }
-  if (slotnum + 1 == ia64_templ_desc[template].group_boundary 
-      || ((slotnum == 2) && s_bit))
-    (*info->fprintf_func) (info->stream, ";;");
-
- done:
-//ud3  ia64_free_opcode ((struct ia64_opcode *)idesc);
- failed:
-  if (slotnum == 2)
-    retval += 16 - 3*slot_multiplier;
-  return retval;
-
- decoding_failed:
-  (*info->fprintf_func) (info->stream, "      data8 %#011llx", insn);
-  goto failed;
-}
diff --git a/contrib/disas/ia64-opc.c b/contrib/disas/ia64-opc.c
deleted file mode 100644
index 6cd09539..00000000
--- a/contrib/disas/ia64-opc.c
+++ /dev/null
@@ -1,773 +0,0 @@
-/* ia64-opc.c -- Functions to access the compacted opcode table
-   Copyright 1999, 2000 Free Software Foundation, Inc.
-   Written by Bob Manson of Cygnus Solutions, <manson@cygnus.com>
-
-   This file is part of GDB, GAS, and the GNU binutils.
-
-   GDB, GAS, and the GNU binutils are free software; you can redistribute
-   them and/or modify them under the terms of the GNU General Public
-   License as published by the Free Software Foundation; either version
-   2, or (at your option) any later version.
-
-   GDB, GAS, and the GNU binutils are distributed in the hope that they
-   will be useful, but WITHOUT ANY WARRANTY; without even the implied
-   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-   the GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this file; see the file COPYING.  If not, write to the
-   Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-   02111-1307, USA.  */
-
-/* changes by ud3 marked with //ud3 */
-//ud3 #include "ansidecl.h"
-//ud3 #include "libiberty.h"
-//ud3 #include "sysdep.h"
-#include "ia64-asmtab.h"
-#include "ia64-asmtab.c"
-
-static void get_opc_prefix PARAMS ((const char **, char *));
-static short int find_string_ent PARAMS ((const char *));
-static short int find_main_ent PARAMS ((short int));
-static short int find_completer PARAMS ((short int, short int, const char *));
-static ia64_insn apply_completer PARAMS ((ia64_insn, int));
-static int extract_op_bits PARAMS ((int, int, int));
-static int extract_op PARAMS ((int, int *, unsigned int *));
-static int opcode_verify PARAMS ((ia64_insn, int, enum ia64_insn_type));
-static int locate_opcode_ent PARAMS ((ia64_insn, enum ia64_insn_type));
-static struct ia64_opcode *make_ia64_opcode
-  PARAMS ((ia64_insn, const char *, int, int));
-static struct ia64_opcode *ia64_find_matching_opcode
-  PARAMS ((const char *, short int));
-
-const struct ia64_templ_desc ia64_templ_desc[16] =
-  {
-    { 0, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_I }, "MII" },	/* 0 */
-    { 2, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_I }, "MII" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_L, IA64_UNIT_X }, "MLX" },
-    { 0, { 0, },				    "-3-" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_I }, "MMI" },	/* 4 */
-    { 1, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_I }, "MMI" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_F, IA64_UNIT_I }, "MFI" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_F }, "MMF" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_B }, "MIB" },	/* 8 */
-    { 0, { IA64_UNIT_M, IA64_UNIT_B, IA64_UNIT_B }, "MBB" },
-    { 0, { 0, },				    "-a-" },
-    { 0, { IA64_UNIT_B, IA64_UNIT_B, IA64_UNIT_B }, "BBB" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_B }, "MMB" },	/* c */
-    { 0, { 0, },				    "-d-" },
-    { 0, { IA64_UNIT_M, IA64_UNIT_F, IA64_UNIT_B }, "MFB" },
-    { 0, { 0, },				    "-f-" },
-  };
-
-#if 0 //ud3
-
-/* Copy the prefix contained in *PTR (up to a '.' or a NUL) to DEST.
-   PTR will be adjusted to point to the start of the next portion
-   of the opcode, or at the NUL character. */
-
-static void
-get_opc_prefix (ptr, dest)
-     const char **ptr;
-     char *dest;
-{
-  char *c = strchr (*ptr, '.');
-  if (c != NULL)
-    {
-      memcpy (dest, *ptr, c - *ptr);
-      dest[c - *ptr] = '\0';
-      *ptr = c + 1;
-    }
-  else
-    {
-      int l = strlen (*ptr);
-      memcpy (dest, *ptr, l);
-      dest[l] = '\0';
-      *ptr += l;
-    }
-}
-
-/* Find the index of the entry in the string table corresponding to
-   STR; return -1 if one does not exist. */
-
-static short
-find_string_ent (str)
-     const char *str;
-{
-  short start = 0;
-  short end = sizeof (ia64_strings) / sizeof (const char *);
-  short i = (start + end) / 2;
-
-  if (strcmp (str, ia64_strings[end - 1]) > 0)
-    {
-      return -1;
-    }
-  while (start <= end)
-    {
-      int c = strcmp (str, ia64_strings[i]);
-      if (c < 0)
-	{
-	  end = i - 1;
-	}
-      else if (c == 0)
-	{
-	  return i;
-	}
-      else
-	{
-	  start = i + 1;
-	}
-      i = (start + end) / 2;
-    }
-  return -1;
-}
-
-/* Find the opcode in the main opcode table whose name is STRINGINDEX, or
-   return -1 if one does not exist. */
-
-static short
-find_main_ent (nameindex)
-     short nameindex;
-{
-  short start = 0;
-  short end = sizeof (main_table) / sizeof (struct ia64_main_table);
-  short i = (start + end) / 2;
-
-  if (nameindex < main_table[0].name_index
-      || nameindex > main_table[end - 1].name_index)
-    {
-      return -1;
-    }
-  while (start <= end)
-    {
-      if (nameindex < main_table[i].name_index)
-	{
-	  end = i - 1;
-	}
-      else if (nameindex == main_table[i].name_index)
-	{
-	  while (i > 0 && main_table[i - 1].name_index == nameindex)
-	    {
-	      i--;
-	    }
-	  return i;
-	}
-      else
-	{
-	  start = i + 1;
-	}
-      i = (start + end) / 2;
-    }
-  return -1;
-}
-
-/* Find the index of the entry in the completer table that is part of
-   MAIN_ENT (starting from PREV_COMPLETER) that matches NAME, or
-   return -1 if one does not exist. */
-
-static short
-find_completer (main_ent, prev_completer, name)
-     short main_ent;
-     short prev_completer;
-     const char *name;
-{
-  short name_index = find_string_ent (name);
-
-  if (name_index < 0)
-    {
-      return -1;
-    }
-
-  if (prev_completer == -1)
-    {
-      prev_completer = main_table[main_ent].completers;
-    }
-  else
-    {
-      prev_completer = completer_table[prev_completer].subentries;
-    }
-
-  while (prev_completer != -1)
-    {
-      if (completer_table[prev_completer].name_index == name_index)
-	{
-	  return prev_completer;
-	}
-      prev_completer = completer_table[prev_completer].alternative;
-    }
-  return -1;
-}
-#endif //ud3
-
-/* Apply the completer referred to by COMPLETER_INDEX to OPCODE, and
-   return the result. */
-
-static ia64_insn
-apply_completer (opcode, completer_index)
-     ia64_insn opcode;
-     int completer_index;
-{
-  ia64_insn mask = completer_table[completer_index].mask;
-  ia64_insn bits = completer_table[completer_index].bits;
-  int shiftamt = (completer_table[completer_index].offset & 63);
-
-  mask = mask << shiftamt;
-  bits = bits << shiftamt;
-  opcode = (opcode & ~mask) | bits;
-  return opcode;
-}
-
-/* Extract BITS number of bits starting from OP_POINTER + BITOFFSET in
-   the dis_table array, and return its value.  (BITOFFSET is numbered
-   starting from MSB to LSB, so a BITOFFSET of 0 indicates the MSB of the
-   first byte in OP_POINTER.) */
-
-static int
-extract_op_bits (op_pointer, bitoffset, bits)
-     int op_pointer;
-     int bitoffset;
-     int bits;
-{
-  int res = 0;
-
-  op_pointer += (bitoffset / 8);
-
-  if (bitoffset % 8)
-    {
-      unsigned int op = dis_table[op_pointer++];
-      int numb = 8 - (bitoffset % 8);
-      int mask = (1 << numb) - 1;
-      int bata = (bits < numb) ? bits : numb;
-      int delta = numb - bata;
-
-      res = (res << bata) | ((op & mask) >> delta);
-      bitoffset += bata;
-      bits -= bata;
-    }
-  while (bits >= 8)
-    {
-      res = (res << 8) | (dis_table[op_pointer++] & 255);
-      bits -= 8;
-    }
-  if (bits > 0)
-    {
-      unsigned int op = (dis_table[op_pointer++] & 255);
-      res = (res << bits) | (op >> (8 - bits));
-    }
-  return res;
-}
-
-/* Examine the state machine entry at OP_POINTER in the dis_table
-   array, and extract its values into OPVAL and OP.  The length of the
-   state entry in bits is returned. */
-
-static int
-extract_op (op_pointer, opval, op)
-     int op_pointer;
-     int *opval;
-     unsigned int *op;
-{
-  int oplen = 5;
-
-  *op = dis_table[op_pointer];
-
-  if ((*op) & 0x40)
-    {
-      opval[0] = extract_op_bits (op_pointer, oplen, 5);
-      oplen += 5;
-    }
-  switch ((*op) & 0x30)
-    {
-    case 0x10:
-      {
-	opval[1] = extract_op_bits (op_pointer, oplen, 8);
-	oplen += 8;
-	opval[1] += op_pointer;
-	break;
-      }
-    case 0x20:
-      {
-	opval[1] = extract_op_bits (op_pointer, oplen, 16);
-	if (! (opval[1] & 32768))
-	  {
-	    opval[1] += op_pointer;
-	  }
-	oplen += 16;
-	break;
-      }
-    case 0x30:
-      {
-	oplen--;
-	opval[2] = extract_op_bits (op_pointer, oplen, 12);
-	oplen += 12;
-	opval[2] |= 32768;
-	break;
-      }
-    }
-  if (((*op) & 0x08) && (((*op) & 0x30) != 0x30))
-    {
-      opval[2] = extract_op_bits (op_pointer, oplen, 16);
-      oplen += 16;
-      if (! (opval[2] & 32768))
-	{
-	  opval[2] += op_pointer;
-	}
-    }
-  return oplen;
-}
-
-/* Returns a non-zero value if the opcode in the main_table list at
-   PLACE matches OPCODE and is of type TYPE. */
-
-static int
-opcode_verify (opcode, place, type)
-     ia64_insn opcode;
-     int place;
-     enum ia64_insn_type type;
-{
-  if (main_table[place].opcode_type != type)
-    {
-      return 0;
-    }
-  if (main_table[place].flags
-      & (IA64_OPCODE_F2_EQ_F3 | IA64_OPCODE_LEN_EQ_64MCNT))
-    {
-      const struct ia64_operand *o1, *o2;
-      ia64_insn f2, f3;
-
-      if (main_table[place].flags & IA64_OPCODE_F2_EQ_F3)
-	{
-	  o1 = elf64_ia64_operands + IA64_OPND_F2;
-	  o2 = elf64_ia64_operands + IA64_OPND_F3;
-	  (*o1->extract) (o1, opcode, &f2);
-	  (*o2->extract) (o2, opcode, &f3);
-	  if (f2 != f3)
-	    return 0;
-	}
-      else
-	{
-	  ia64_insn len, count;
-
-	  /* length must equal 64-count: */
-	  o1 = elf64_ia64_operands + IA64_OPND_LEN6;
-	  o2 = elf64_ia64_operands + main_table[place].operands[2];
-	  (*o1->extract) (o1, opcode, &len);
-	  (*o2->extract) (o2, opcode, &count);
-	  if (len != 64 - count)
-	    return 0;
-	}
-    }
-  return 1;
-}
-
-/* Find an instruction entry in the ia64_dis_names array that matches
-   opcode OPCODE and is of type TYPE.  Returns either a positive index
-   into the array, or a negative value if an entry for OPCODE could
-   not be found.  Checks all matches and returns the one with the highest
-   priority. */
-
-static int
-locate_opcode_ent (opcode, type)
-     ia64_insn opcode;
-     enum ia64_insn_type type;
-{
-  int currtest[41];
-  int bitpos[41];
-  int op_ptr[41];
-  int currstatenum = 0;
-  short found_disent = -1;
-  short found_priority = -1;
-
-  currtest[currstatenum] = 0;
-  op_ptr[currstatenum] = 0;
-  bitpos[currstatenum] = 40;
-
-  while (1)
-    {
-      int op_pointer = op_ptr[currstatenum];
-      unsigned int op;
-      int currbitnum = bitpos[currstatenum];
-      int oplen;
-      int opval[3];
-      int next_op;
-      int currbit;
-
-      oplen = extract_op (op_pointer, opval, &op);
-
-      bitpos[currstatenum] = currbitnum;
-
-      /* Skip opval[0] bits in the instruction. */
-      if (op & 0x40)
-	{
-	  currbitnum -= opval[0];
-	}
-
-      /* The value of the current bit being tested. */
-      currbit = opcode & (((ia64_insn) 1) << currbitnum) ? 1 : 0;
-      next_op = -1;
-
-      /* We always perform the tests specified in the current state in
-	 a particular order, falling through to the next test if the
-	 previous one failed. */
-      switch (currtest[currstatenum])
-	{
-	case 0:
-	  currtest[currstatenum]++;
-	  if (currbit == 0 && (op & 0x80))
-	    {
-	      /* Check for a zero bit.  If this test solely checks for
-		 a zero bit, we can check for up to 8 consecutive zero
-		 bits (the number to check is specified by the lower 3
-		 bits in the state code.)
-
-		 If the state instruction matches, we go to the very
-		 next state instruction; otherwise, try the next test. */
-
-	      if ((op & 0xf8) == 0x80)
-		{
-		  int count = op & 0x7;
-		  int x;
-
-		  for (x = 0; x <= count; x++)
-		    {
-		      int i =
-			opcode & (((ia64_insn) 1) << (currbitnum - x)) ? 1 : 0;
-		      if (i)
-			{
-			  break;
-			}
-		    }
-		  if (x > count)
-		    {
-		      next_op = op_pointer + ((oplen + 7) / 8);
-		      currbitnum -= count;
-		      break;
-		    }
-		}
-	      else if (! currbit)
-		{
-		  next_op = op_pointer + ((oplen + 7) / 8);
-		  break;
-		}
-	    }
-	  /* FALLTHROUGH */
-	case 1:
-	  /* If the bit in the instruction is one, go to the state
-	     instruction specified by opval[1]. */
-	  currtest[currstatenum]++;
-	  if (currbit && (op & 0x30) != 0 && ((op & 0x30) != 0x30))
-	    {
-	      next_op = opval[1];
-	      break;
-	    }
-	  /* FALLTHROUGH */
-	case 2:
-	  /* Don't care.  Skip the current bit and go to the state
-	     instruction specified by opval[2].
-
-	     An encoding of 0x30 is special; this means that a 12-bit
-	     offset into the ia64_dis_names[] array is specified.  */
-	  currtest[currstatenum]++;
-	  if ((op & 0x08) || ((op & 0x30) == 0x30))
-	    {
-	      next_op = opval[2];
-	      break;
-	    }
-	}
-
-      /* If bit 15 is set in the address of the next state, an offset
-	 in the ia64_dis_names array was specified instead.  We then
-	 check to see if an entry in the list of opcodes matches the
-	 opcode we were given; if so, we have succeeded.  */
-
-      if ((next_op >= 0) && (next_op & 32768))
-	{
-	  short disent = next_op & 32767;
-          short priority = -1;
-
-	  if (next_op > 65535)
-	    {
-	      abort ();
-	    }
-
-	  /* Run through the list of opcodes to check, trying to find
-	     one that matches.  */
-	  while (disent >= 0)
-	    {
-	      int place = ia64_dis_names[disent].insn_index;
-
-              priority = ia64_dis_names[disent].priority;
-
-	      if (opcode_verify (opcode, place, type)
-                  && priority > found_priority)
-		{
-		  break;
-		}
-	      if (ia64_dis_names[disent].next_flag)
-		{
-		  disent++;
-		}
-	      else
-		{
-		  disent = -1;
-		}
-	    }
-
-	  if (disent >= 0)
-	    {
-              found_disent = disent;
-              found_priority = priority;
-	    }
-          /* Try the next test in this state, regardless of whether a match
-             was found. */
-          next_op = -2;
-	}
-
-      /* next_op == -1 is "back up to the previous state".
-	 next_op == -2 is "stay in this state and try the next test".
-	 Otherwise, transition to the state indicated by next_op. */
-
-      if (next_op == -1)
-	{
-	  currstatenum--;
-	  if (currstatenum < 0)
-	    {
-              return found_disent;
-	    }
-	}
-      else if (next_op >= 0)
-	{
-	  currstatenum++;
-	  bitpos[currstatenum] = currbitnum - 1;
-	  op_ptr[currstatenum] = next_op;
-	  currtest[currstatenum] = 0;
-	}
-    }
-}
-
-/* Construct an ia64_opcode entry based on OPCODE, NAME and PLACE. */
-
-static struct ia64_opcode __ia64_opcode; //ud3
-static struct ia64_opcode *
-make_ia64_opcode (opcode, name, place, depind)
-     ia64_insn opcode;
-     const char *name;
-     int place;
-     int depind;
-{
-#if 0 //ud3
-  struct ia64_opcode *res =
-    (struct ia64_opcode *) xmalloc (sizeof (struct ia64_opcode));
-  res->name = xstrdup (name);
-#else
-  struct ia64_opcode *res = &__ia64_opcode;
-  res->name = name;
-#endif //ud3
-  res->type = main_table[place].opcode_type;
-  res->num_outputs = main_table[place].num_outputs;
-  res->opcode = opcode;
-  res->mask = main_table[place].mask;
-  res->operands[0] = main_table[place].operands[0];
-  res->operands[1] = main_table[place].operands[1];
-  res->operands[2] = main_table[place].operands[2];
-  res->operands[3] = main_table[place].operands[3];
-  res->operands[4] = main_table[place].operands[4];
-  res->flags = main_table[place].flags;
-  res->ent_index = place;
-  res->dependencies = &op_dependencies[depind];
-  return res;
-}
-
-/* Determine the ia64_opcode entry for the opcode specified by INSN
-   and TYPE.  If a valid entry is not found, return NULL. */
-struct ia64_opcode *
-ia64_dis_opcode (insn, type)
-     ia64_insn insn;
-     enum ia64_insn_type type;
-{
-  int disent = locate_opcode_ent (insn, type);
-
-  if (disent < 0)
-    {
-      return NULL;
-    }
-  else
-    {
-      unsigned int cb = ia64_dis_names[disent].completer_index;
-      static char name[128];
-      int place = ia64_dis_names[disent].insn_index;
-      int ci = main_table[place].completers;
-      ia64_insn tinsn = main_table[place].opcode;
-
-      strcpy (name, ia64_strings [main_table[place].name_index]);
-
-      while (cb)
-	{
-	  if (cb & 1)
-	    {
-	      int cname = completer_table[ci].name_index;
-
-	      tinsn = apply_completer (tinsn, ci);
-
-	      if (ia64_strings[cname][0] != '\0')
-		{
-		  strcat (name, ".");
-		  strcat (name, ia64_strings[cname]);
-		}
-	      if (cb != 1)
-		{
-		  ci = completer_table[ci].subentries;
-		}
-	    }
-	  else
-	    {
-	      ci = completer_table[ci].alternative;
-	    }
-	  if (ci < 0)
-	    {
-	      abort ();
-	    }
-	  cb = cb >> 1;
-	}
-      if (tinsn != (insn & main_table[place].mask))
-	{
-	  abort ();
-	}
-      return make_ia64_opcode (insn, name, place,
-                               completer_table[ci].dependencies);
-    }
-}
-#if 0 //ud3
-
-/* Search the main_opcode table starting from PLACE for an opcode that
-   matches NAME.  Return NULL if one is not found. */
-
-static struct ia64_opcode *
-ia64_find_matching_opcode (name, place)
-     const char *name;
-     short place;
-{
-  char op[129];
-  const char *suffix;
-  short name_index;
-
-  if (strlen (name) > 128)
-    {
-      return NULL;
-    }
-  suffix = name;
-  get_opc_prefix (&suffix, op);
-  name_index = find_string_ent (op);
-  if (name_index < 0)
-    {
-      return NULL;
-    }
-
-  while (main_table[place].name_index == name_index)
-    {
-      const char *curr_suffix = suffix;
-      ia64_insn curr_insn = main_table[place].opcode;
-      short completer = -1;
-
-      do {
-	if (suffix[0] == '\0')
-	  {
-	    completer = find_completer (place, completer, suffix);
-	  }
-	else
-	  {
-	    get_opc_prefix (&curr_suffix, op);
-	    completer = find_completer (place, completer, op);
-	  }
-	if (completer != -1)
-	  {
-	    curr_insn = apply_completer (curr_insn, completer);
-	  }
-      } while (completer != -1 && curr_suffix[0] != '\0');
-
-      if (completer != -1 && curr_suffix[0] == '\0'
-	  && completer_table[completer].terminal_completer)
-	{
-          int depind = completer_table[completer].dependencies;
-	  return make_ia64_opcode (curr_insn, name, place, depind);
-	}
-      else
-	{
-	  place++;
-	}
-    }
-  return NULL;
-}
-
-/* Find the next opcode after PREV_ENT that matches PREV_ENT, or return NULL
-   if one does not exist.
-
-   It is the caller's responsibility to invoke ia64_free_opcode () to
-   release any resources used by the returned entry. */
-
-struct ia64_opcode *
-ia64_find_next_opcode (prev_ent)
-     struct ia64_opcode *prev_ent;
-{
-  return ia64_find_matching_opcode (prev_ent->name,
-				    prev_ent->ent_index + 1);
-}
-
-/* Find the first opcode that matches NAME, or return NULL if it does
-   not exist.
-
-   It is the caller's responsibility to invoke ia64_free_opcode () to
-   release any resources used by the returned entry. */
-
-struct ia64_opcode *
-ia64_find_opcode (name)
-     const char *name;
-{
-  char op[129];
-  const char *suffix;
-  short place;
-  short name_index;
-
-  if (strlen (name) > 128)
-    {
-      return NULL;
-    }
-  suffix = name;
-  get_opc_prefix (&suffix, op);
-  name_index = find_string_ent (op);
-  if (name_index < 0)
-    {
-      return NULL;
-    }
-
-  place = find_main_ent (name_index);
-
-  if (place < 0)
-    {
-      return NULL;
-    }
-  return ia64_find_matching_opcode (name, place);
-}
-
-/* Free any resources used by ENT. */
-void
-ia64_free_opcode (ent)
-     struct ia64_opcode *ent;
-{
-  free ((void *)ent->name);
-  free (ent);
-}
-
-const struct ia64_dependency *
-ia64_find_dependency (index)
-  int index;
-{
-  index = DEP(index);
-
-  if (index < 0
-      || index >= (int)(sizeof(dependencies) / sizeof(dependencies[0])))
-    return NULL;
-
-  return &dependencies[index];
-}
-#endif //ud3
diff --git a/contrib/disas/ia64-opc.h b/contrib/disas/ia64-opc.h
deleted file mode 100644
index b721cb87..00000000
--- a/contrib/disas/ia64-opc.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/* ia64-opc.h -- IA-64 opcode table.
-   Copyright 1998, 1999, 2000 Free Software Foundation, Inc.
-   Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
-
-   This file is part of GDB, GAS, and the GNU binutils.
-
-   GDB, GAS, and the GNU binutils are free software; you can redistribute
-   them and/or modify them under the terms of the GNU General Public
-   License as published by the Free Software Foundation; either version
-   2, or (at your option) any later version.
-
-   GDB, GAS, and the GNU binutils are distributed in the hope that they
-   will be useful, but WITHOUT ANY WARRANTY; without even the implied
-   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-   the GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this file; see the file COPYING.  If not, write to the
-   Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-   02111-1307, USA.  */
-
-#ifndef IA64_OPC_H
-#define IA64_OPC_H
-
-#include "opcode/ia64.h"
-
-/* define a couple of abbreviations: */
-
-#define bOp(x)	(((ia64_insn) ((x) & 0xf)) << 37)
-#define mOp	bOp (-1)
-#define Op(x)	bOp (x), mOp
-
-#define FIRST		IA64_OPCODE_FIRST
-#define X_IN_MLX	IA64_OPCODE_X_IN_MLX
-#define LAST		IA64_OPCODE_LAST
-#define PRIV		IA64_OPCODE_PRIV
-#define NO_PRED		IA64_OPCODE_NO_PRED
-#define SLOT2		IA64_OPCODE_SLOT2
-#define PSEUDO		IA64_OPCODE_PSEUDO
-#define F2_EQ_F3	IA64_OPCODE_F2_EQ_F3
-#define LEN_EQ_64MCNT	IA64_OPCODE_LEN_EQ_64MCNT
-#define MOD_RRBS        IA64_OPCODE_MOD_RRBS
-#define POSTINC		IA64_OPCODE_POSTINC
-
-#define AR_CCV	IA64_OPND_AR_CCV
-#define AR_PFS	IA64_OPND_AR_PFS
-#define C1	IA64_OPND_C1
-#define C8	IA64_OPND_C8
-#define C16	IA64_OPND_C16
-#define GR0	IA64_OPND_GR0
-#define IP	IA64_OPND_IP
-#define PR	IA64_OPND_PR
-#define PR_ROT	IA64_OPND_PR_ROT
-#define PSR	IA64_OPND_PSR
-#define PSR_L	IA64_OPND_PSR_L
-#define PSR_UM	IA64_OPND_PSR_UM
-
-#define AR3	IA64_OPND_AR3
-#define B1	IA64_OPND_B1
-#define B2	IA64_OPND_B2
-#define CR3	IA64_OPND_CR3
-#define F1	IA64_OPND_F1
-#define F2	IA64_OPND_F2
-#define F3	IA64_OPND_F3
-#define F4	IA64_OPND_F4
-#define P1	IA64_OPND_P1
-#define P2	IA64_OPND_P2
-#define R1	IA64_OPND_R1
-#define R2	IA64_OPND_R2
-#define R3	IA64_OPND_R3
-#define R3_2	IA64_OPND_R3_2
-
-#define CPUID_R3 IA64_OPND_CPUID_R3
-#define DBR_R3	IA64_OPND_DBR_R3
-#define DTR_R3	IA64_OPND_DTR_R3
-#define ITR_R3	IA64_OPND_ITR_R3
-#define IBR_R3	IA64_OPND_IBR_R3
-#define MR3	IA64_OPND_MR3
-#define MSR_R3	IA64_OPND_MSR_R3
-#define PKR_R3	IA64_OPND_PKR_R3
-#define PMC_R3	IA64_OPND_PMC_R3
-#define PMD_R3	IA64_OPND_PMD_R3
-#define RR_R3	IA64_OPND_RR_R3
-
-#define CCNT5	IA64_OPND_CCNT5
-#define CNT2a	IA64_OPND_CNT2a
-#define CNT2b	IA64_OPND_CNT2b
-#define CNT2c	IA64_OPND_CNT2c
-#define CNT5	IA64_OPND_CNT5
-#define CNT6	IA64_OPND_CNT6
-#define CPOS6a	IA64_OPND_CPOS6a
-#define CPOS6b	IA64_OPND_CPOS6b
-#define CPOS6c	IA64_OPND_CPOS6c
-#define IMM1	IA64_OPND_IMM1
-#define IMM14	IA64_OPND_IMM14
-#define IMM17	IA64_OPND_IMM17
-#define IMM22	IA64_OPND_IMM22
-#define IMM44	IA64_OPND_IMM44
-#define SOF	IA64_OPND_SOF
-#define SOL	IA64_OPND_SOL
-#define SOR	IA64_OPND_SOR
-#define IMM8	IA64_OPND_IMM8
-#define IMM8U4	IA64_OPND_IMM8U4
-#define IMM8M1	IA64_OPND_IMM8M1
-#define IMM8M1U4 IA64_OPND_IMM8M1U4
-#define IMM8M1U8 IA64_OPND_IMM8M1U8
-#define IMM9a	IA64_OPND_IMM9a
-#define IMM9b	IA64_OPND_IMM9b
-#define IMMU2	IA64_OPND_IMMU2
-#define IMMU21	IA64_OPND_IMMU21
-#define IMMU24	IA64_OPND_IMMU24
-#define IMMU62	IA64_OPND_IMMU62
-#define IMMU64	IA64_OPND_IMMU64
-#define IMMU7a	IA64_OPND_IMMU7a
-#define IMMU7b	IA64_OPND_IMMU7b
-#define IMMU9	IA64_OPND_IMMU9
-#define INC3	IA64_OPND_INC3
-#define LEN4	IA64_OPND_LEN4
-#define LEN6	IA64_OPND_LEN6
-#define MBTYPE4	IA64_OPND_MBTYPE4
-#define MHTYPE8	IA64_OPND_MHTYPE8
-#define POS6	IA64_OPND_POS6
-#define TAG13	IA64_OPND_TAG13
-#define TAG13b	IA64_OPND_TAG13b
-#define TGT25	IA64_OPND_TGT25
-#define TGT25b	IA64_OPND_TGT25b
-#define TGT25c	IA64_OPND_TGT25c
-#define TGT64   IA64_OPND_TGT64
-
-#endif
diff --git a/contrib/disas/mips-dis.cc b/contrib/disas/mips-dis.cc
deleted file mode 100644
index 7c71b5a1..00000000
--- a/contrib/disas/mips-dis.cc
+++ /dev/null
@@ -1,891 +0,0 @@
-/* Print mips instructions for GDB, the GNU debugger, or for objdump.
-   Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-   2000, 2001, 2002, 2003
-   Free Software Foundation, Inc.
-   Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
-
-#include "mips.h"
-
-/* FIXME: These are needed to figure out if the code is mips16 or
-   not. The low bit of the address is often a good indicator.  No
-   symbol table is available when this code runs out in an embedded
-   system as when it is used for disassembler support in a monitor.  */
-
-#ifndef _
-#define _(string) string
-#endif
-
-#ifndef ARRAY_SIZE
-#define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
-#endif
-
-static void print_address( unsigned long addr );
-
-static int strcmp( const char *s1, const char *s2 )
-{
-    while( 1 ) {
-	if( !*s1 && !*s2 )
-	    return 0;
-	if( (!*s1 && *s2) || (*s1 < *s2) )
-	    return -1;
-	if( (*s1 && !*s2) || (*s1 > *s2) )
-	    return 1;
-	s1++;
-	s2++;
-    }
-}
-
-/* Mips instructions are at maximum this many bytes long.  */
-#define INSNLEN 4
-
-static int _print_insn_mips
-  PARAMS ((word_t, unsigned long, unsigned long format ));
-static int print_insn_mips
-  PARAMS ((unsigned long, unsigned long int, unsigned long format));
-static void print_insn_args
-  PARAMS ((const char *, unsigned long, unsigned , unsigned long format));
-
-/* FIXME: These should be shared with gdb somehow.  */
-
-struct mips_cp0sel_name {
-	unsigned int cp0reg;
-	unsigned int sel;
-	const char * const name;
-};
-
-#if 0
-static const char * const mips_gpr_names_numeric[32] = {
-  "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
-  "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
-  "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
-  "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31"
-};
-
-static const char * const mips_gpr_names_oldabi[32] = {
-  "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
-  "t0",   "t1",   "t2",   "t3",   "t4",   "t5",   "t6",   "t7",
-  "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
-  "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra"
-};
-
-static const char * const mips_gpr_names_newabi[32] = {
-  "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
-  "a4",   "a5",   "a6",   "a7",   "t0",   "t1",   "t2",   "t3",
-  "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
-  "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra"
-};
-#endif
-
-static const char * const mips_gpr_names_pistachio[32] = {
-  "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
-  "a4",   "a5",   "a6",   "a7",   "t4",   "t5",   "t6",   "t7",
-  "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
-  "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra"
-};
-
-static const char * const mips_fpr_names_numeric[32] = {
-  "$f0",  "$f1",  "$f2",  "$f3",  "$f4",  "$f5",  "$f6",  "$f7",
-  "$f8",  "$f9",  "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
-  "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
-  "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31"
-};
-
-#if 0
-static const char * const mips_fpr_names_32[32] = {
-  "fv0",  "fv0f", "fv1",  "fv1f", "ft0",  "ft0f", "ft1",  "ft1f",
-  "ft2",  "ft2f", "ft3",  "ft3f", "fa0",  "fa0f", "fa1",  "fa1f",
-  "ft4",  "ft4f", "ft5",  "ft5f", "fs0",  "fs0f", "fs1",  "fs1f",
-  "fs2",  "fs2f", "fs3",  "fs3f", "fs4",  "fs4f", "fs5",  "fs5f"
-};
-
-static const char * const mips_fpr_names_n32[32] = {
-  "fv0",  "ft14", "fv1",  "ft15", "ft0",  "ft1",  "ft2",  "ft3",
-  "ft4",  "ft5",  "ft6",  "ft7",  "fa0",  "fa1",  "fa2",  "fa3",
-  "fa4",  "fa5",  "fa6",  "fa7",  "fs0",  "ft8",  "fs1",  "ft9",
-  "fs2",  "ft10", "fs3",  "ft11", "fs4",  "ft12", "fs5",  "ft13"
-};
-
-static const char * const mips_fpr_names_64[32] = {
-  "fv0",  "ft12", "fv1",  "ft13", "ft0",  "ft1",  "ft2",  "ft3",
-  "ft4",  "ft5",  "ft6",  "ft7",  "fa0",  "fa1",  "fa2",  "fa3",
-  "fa4",  "fa5",  "fa6",  "fa7",  "ft8",  "ft9",  "ft10", "ft11",
-  "fs0",  "fs1",  "fs2",  "fs3",  "fs4",  "fs5",  "fs6",  "fs7"
-};
-#endif
-
-static const char * const mips_cp0_names_r4x00[32] = {
-  "c0_index",     "c0_random",    "c0_entrylo0",  "c0_entrylo1",
-  "c0_context",   "c0_pagemask",  "c0_wired",     "$7",
-  "c0_badvaddr",  "c0_count",     "c0_entryhi",   "c0_compare",
-  "c0_status",    "c0_cause",     "c0_epc",       "c0_prid",
-  "c0_config",    "c0_lladdr",    "c0_watchlo",   "c0_watchhi",
-  "c0_xcontext",  "$21",          "$22",          "$23",
-  "$24",	  "$25",	  "c0_ecc",	  "c0_cacheerr",
-  "c0_taglo",     "c0_taghi",     "c0_errorepc",  "$31",
-};
-
-
-#if 0
-static const char * const mips_cp0_names_mips3264[32] = {
-  "c0_index",     "c0_random",    "c0_entrylo0",  "c0_entrylo1",
-  "c0_context",   "c0_pagemask",  "c0_wired",     "$7",
-  "c0_badvaddr",  "c0_count",     "c0_entryhi",   "c0_compare",
-  "c0_status",    "c0_cause",     "c0_epc",       "c0_prid",
-  "c0_config",    "c0_lladdr",    "c0_watchlo",   "c0_watchhi",
-  "c0_xcontext",  "$21",          "$22",          "c0_debug",
-  "c0_depc",      "c0_perfcnt",   "c0_errctl",    "c0_cacheerr",
-  "c0_taglo",     "c0_taghi",     "c0_errorepc",  "c0_desave",
-};
-
-static const struct mips_cp0sel_name mips_cp0sel_names_mips3264[] = {
-  { 16, 1, "c0_config1"		},
-  { 16, 2, "c0_config2"		},
-  { 16, 3, "c0_config3"		},
-  { 18, 1, "c0_watchlo,1"	},
-  { 18, 2, "c0_watchlo,2"	},
-  { 18, 3, "c0_watchlo,3"	},
-  { 18, 4, "c0_watchlo,4"	},
-  { 18, 5, "c0_watchlo,5"	},
-  { 18, 6, "c0_watchlo,6"	},
-  { 18, 7, "c0_watchlo,7"	},
-  { 19, 1, "c0_watchhi,1"	},
-  { 19, 2, "c0_watchhi,2"	},
-  { 19, 3, "c0_watchhi,3"	},
-  { 19, 4, "c0_watchhi,4"	},
-  { 19, 5, "c0_watchhi,5"	},
-  { 19, 6, "c0_watchhi,6"	},
-  { 19, 7, "c0_watchhi,7"	},
-  { 25, 1, "c0_perfcnt,1"	},
-  { 25, 2, "c0_perfcnt,2"	},
-  { 25, 3, "c0_perfcnt,3"	},
-  { 25, 4, "c0_perfcnt,4"	},
-  { 25, 5, "c0_perfcnt,5"	},
-  { 25, 6, "c0_perfcnt,6"	},
-  { 25, 7, "c0_perfcnt,7"	},
-  { 27, 1, "c0_cacheerr,1"	},
-  { 27, 2, "c0_cacheerr,2"	},
-  { 27, 3, "c0_cacheerr,3"	},
-  { 28, 1, "c0_datalo"		},
-  { 29, 1, "c0_datahi"		}
-};
-
-static const char * const mips_cp0_names_mips3264r2[32] = {
-  "c0_index",     "c0_random",    "c0_entrylo0",  "c0_entrylo1",
-  "c0_context",   "c0_pagemask",  "c0_wired",     "c0_hwrena",
-  "c0_badvaddr",  "c0_count",     "c0_entryhi",   "c0_compare",
-  "c0_status",    "c0_cause",     "c0_epc",       "c0_prid",
-  "c0_config",    "c0_lladdr",    "c0_watchlo",   "c0_watchhi",
-  "c0_xcontext",  "$21",          "$22",          "c0_debug",
-  "c0_depc",      "c0_perfcnt",   "c0_errctl",    "c0_cacheerr",
-  "c0_taglo",     "c0_taghi",     "c0_errorepc",  "c0_desave",
-};
-
-static const struct mips_cp0sel_name mips_cp0sel_names_mips3264r2[] = {
-  {  4, 1, "c0_contextconfig"	},
-  {  5, 1, "c0_pagegrain"	},
-  { 12, 1, "c0_intctl"		},
-  { 12, 2, "c0_srsctl"		},
-  { 12, 3, "c0_srsmap"		},
-  { 15, 1, "c0_ebase"		},
-  { 16, 1, "c0_config1"		},
-  { 16, 2, "c0_config2"		},
-  { 16, 3, "c0_config3"		},
-  { 18, 1, "c0_watchlo,1"	},
-  { 18, 2, "c0_watchlo,2"	},
-  { 18, 3, "c0_watchlo,3"	},
-  { 18, 4, "c0_watchlo,4"	},
-  { 18, 5, "c0_watchlo,5"	},
-  { 18, 6, "c0_watchlo,6"	},
-  { 18, 7, "c0_watchlo,7"	},
-  { 19, 1, "c0_watchhi,1"	},
-  { 19, 2, "c0_watchhi,2"	},
-  { 19, 3, "c0_watchhi,3"	},
-  { 19, 4, "c0_watchhi,4"	},
-  { 19, 5, "c0_watchhi,5"	},
-  { 19, 6, "c0_watchhi,6"	},
-  { 19, 7, "c0_watchhi,7"	},
-  { 23, 1, "c0_tracecontrol"	},
-  { 23, 2, "c0_tracecontrol2"	},
-  { 23, 3, "c0_usertracedata"	},
-  { 23, 4, "c0_tracebpc"	},
-  { 25, 1, "c0_perfcnt,1"	},
-  { 25, 2, "c0_perfcnt,2"	},
-  { 25, 3, "c0_perfcnt,3"	},
-  { 25, 4, "c0_perfcnt,4"	},
-  { 25, 5, "c0_perfcnt,5"	},
-  { 25, 6, "c0_perfcnt,6"	},
-  { 25, 7, "c0_perfcnt,7"	},
-  { 27, 1, "c0_cacheerr,1"	},
-  { 27, 2, "c0_cacheerr,2"	},
-  { 27, 3, "c0_cacheerr,3"	},
-  { 28, 1, "c0_datalo"		},
-  { 28, 2, "c0_taglo1"		},
-  { 28, 3, "c0_datalo1"		},
-  { 28, 4, "c0_taglo2"		},
-  { 28, 5, "c0_datalo2"		},
-  { 28, 6, "c0_taglo3"		},
-  { 28, 7, "c0_datalo3"		},
-  { 29, 1, "c0_datahi"		},
-  { 29, 2, "c0_taghi1"		},
-  { 29, 3, "c0_datahi1"		},
-  { 29, 4, "c0_taghi2"		},
-  { 29, 5, "c0_datahi2"		},
-  { 29, 6, "c0_taghi3"		},
-  { 29, 7, "c0_datahi3"		},
-};
-#endif
-
-#if CONFIG_CPU_MIPS64_SB1
-
-/* SB-1: MIPS64 (mips_cp0_names_mips3264) with minor mods.  */
-static const char * const mips_cp0_names_sb1[32] = {
-  "c0_index",     "c0_random",    "c0_entrylo0",  "c0_entrylo1",
-  "c0_context",   "c0_pagemask",  "c0_wired",     "$7",
-  "c0_badvaddr",  "c0_count",     "c0_entryhi",   "c0_compare",
-  "c0_status",    "c0_cause",     "c0_epc",       "c0_prid",
-  "c0_config",    "c0_lladdr",    "c0_watchlo",   "c0_watchhi",
-  "c0_xcontext",  "$21",          "$22",          "c0_debug",
-  "c0_depc",      "c0_perfcnt",   "c0_errctl",    "c0_cacheerr_i",
-  "c0_taglo_i",   "c0_taghi_i",   "c0_errorepc",  "c0_desave",
-};
-
-static const struct mips_cp0sel_name mips_cp0sel_names_sb1[] = {
-  { 16, 1, "c0_config1"		},
-  { 18, 1, "c0_watchlo,1"	},
-  { 19, 1, "c0_watchhi,1"	},
-  { 22, 0, "c0_perftrace"	},
-  { 23, 3, "c0_edebug"		},
-  { 25, 1, "c0_perfcnt,1"	},
-  { 25, 2, "c0_perfcnt,2"	},
-  { 25, 3, "c0_perfcnt,3"	},
-  { 25, 4, "c0_perfcnt,4"	},
-  { 25, 5, "c0_perfcnt,5"	},
-  { 25, 6, "c0_perfcnt,6"	},
-  { 25, 7, "c0_perfcnt,7"	},
-  { 26, 1, "c0_buserr_pa"	},
-  { 27, 1, "c0_cacheerr_d"	},
-  { 27, 3, "c0_cacheerr_d_pa"	},
-  { 28, 1, "c0_datalo_i"	},
-  { 28, 2, "c0_taglo_d"		},
-  { 28, 3, "c0_datalo_d"	},
-  { 29, 1, "c0_datahi_i"	},
-  { 29, 2, "c0_taghi_d"		},
-  { 29, 3, "c0_datahi_d"	},
-};
-
-#endif
-
-static const char * const mips_hwr_names_numeric[32] = {
-  "$0",   "$1",   "$2",   "$3",   "$4",   "$5",   "$6",   "$7",
-  "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
-  "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
-  "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31"
-};
-
-#if 0
-static const char * const mips_hwr_names_mips3264r2[32] = {
-  "hwr_cpunum",   "hwr_synci_step", "hwr_cc",     "hwr_ccres",
-  "$4",          "$5",            "$6",           "$7",
-  "$8",   "$9",   "$10",  "$11",  "$12",  "$13",  "$14",  "$15",
-  "$16",  "$17",  "$18",  "$19",  "$20",  "$21",  "$22",  "$23",
-  "$24",  "$25",  "$26",  "$27",  "$28",  "$29",  "$30",  "$31"
-};
-#endif
-
-struct mips_abi_choice {
-  const char *name;
-  const char * const *gpr_names;
-  const char * const *fpr_names;
-};
-
-struct mips_arch_choice {
-  const char *name;
-  int bfd_mach_valid;
-  unsigned long bfd_mach;
-  int processor;
-  int isa;
-  const char * const *cp0_names;
-  const struct mips_cp0sel_name *cp0sel_names;
-  unsigned int cp0sel_names_len;
-  const char * const *hwr_names;
-};
-
-#if 0
-const struct mips_arch_choice mips_arch_choices[] = {
-  { "numeric",	0, 0, 0, 0,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-
-  { "r3000",	1, bfd_mach_mips3000, CPU_R3000, ISA_MIPS1,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r3900",	1, bfd_mach_mips3900, CPU_R3900, ISA_MIPS1,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r4000",	1, bfd_mach_mips4000, CPU_R4000, ISA_MIPS3,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r4010",	1, bfd_mach_mips4010, CPU_R4010, ISA_MIPS2,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "vr4100",	1, bfd_mach_mips4100, CPU_VR4100, ISA_MIPS3,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "vr4111",	1, bfd_mach_mips4111, CPU_R4111, ISA_MIPS3,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "vr4120",	1, bfd_mach_mips4120, CPU_VR4120, ISA_MIPS3,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r4300",	1, bfd_mach_mips4300, CPU_R4300, ISA_MIPS3,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r4400",	1, bfd_mach_mips4400, CPU_R4400, ISA_MIPS3,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r4600",	1, bfd_mach_mips4600, CPU_R4600, ISA_MIPS3,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r4650",	1, bfd_mach_mips4650, CPU_R4650, ISA_MIPS3,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r5000",	1, bfd_mach_mips5000, CPU_R5000, ISA_MIPS4,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "vr5400",	1, bfd_mach_mips5400, CPU_VR5400, ISA_MIPS4,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "vr5500",	1, bfd_mach_mips5500, CPU_VR5500, ISA_MIPS4,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r6000",	1, bfd_mach_mips6000, CPU_R6000, ISA_MIPS2,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r8000",	1, bfd_mach_mips8000, CPU_R8000, ISA_MIPS4,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r10000",	1, bfd_mach_mips10000, CPU_R10000, ISA_MIPS4,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "r12000",	1, bfd_mach_mips12000, CPU_R12000, ISA_MIPS4,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-  { "mips5",	1, bfd_mach_mips5, CPU_MIPS5, ISA_MIPS5,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-
-  /* For stock MIPS32, disassemble all applicable MIPS-specified ASEs.
-     Note that MIPS-3D and MDMX are not applicable to MIPS32.  (See
-     _MIPS32 Architecture For Programmers Volume I: Introduction to the
-     MIPS32 Architecture_ (MIPS Document Number MD00082, Revision 0.95),
-     page 1.  */
-  { "mips32",	1, bfd_mach_mipsisa32, CPU_MIPS32,
-    ISA_MIPS32 | INSN_MIPS16,
-    mips_cp0_names_mips3264,
-    mips_cp0sel_names_mips3264, ARRAY_SIZE (mips_cp0sel_names_mips3264),
-    mips_hwr_names_numeric },
-
-  { "mips32r2",	1, bfd_mach_mipsisa32r2, CPU_MIPS32R2,
-    ISA_MIPS32R2 | INSN_MIPS16,
-    mips_cp0_names_mips3264r2,
-    mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
-    mips_hwr_names_mips3264r2 },
-
-  /* For stock MIPS64, disassemble all applicable MIPS-specified ASEs.  */
-  { "mips64",	1, bfd_mach_mipsisa64, CPU_MIPS64,
-    ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX,
-    mips_cp0_names_mips3264,
-    mips_cp0sel_names_mips3264, ARRAY_SIZE (mips_cp0sel_names_mips3264),
-    mips_hwr_names_numeric },
-
-  { "sb1",	1, bfd_mach_mips_sb1, CPU_SB1,
-    ISA_MIPS64 | INSN_MIPS3D | INSN_SB1,
-    mips_cp0_names_sb1,
-    mips_cp0sel_names_sb1, ARRAY_SIZE (mips_cp0sel_names_sb1),
-    mips_hwr_names_numeric },
-
-  /* This entry, mips16, is here only for ISA/processor selection; do
-     not print its name.  */
-  { "",		1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,
-    mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
-};
-#endif
-
-/* ISA and processor type to disassemble for, and register names to use.
-   set_default_mips_dis_options and parse_mips_dis_options fill in these
-   values.  */
-static int mips_processor;
-static int mips_isa;
-static const char * const *mips_gpr_names;
-static const char * const *mips_fpr_names;
-static const char * const *mips_cp0_names;
-static const struct mips_cp0sel_name *mips_cp0sel_names;
-static int mips_cp0sel_names_len;
-static const char * const *mips_hwr_names;
-
-static const struct mips_cp0sel_name *lookup_mips_cp0sel_name
-  PARAMS ((const struct mips_cp0sel_name *, unsigned int, unsigned int,
-	   unsigned int));
-
-
-void
-set_default_mips_dis_options ( unsigned int type )
-{
-  /* Defaults: mipsIII/r3000 (?!), (o)32-style ("oldabi") GPR names,
-     and numeric FPR, CP0 register, and HWR names.  */
-
-  mips_gpr_names = mips_gpr_names_pistachio;
-  mips_fpr_names = mips_fpr_names_numeric;
-
-#if CONFIG_CPU_MIPS64_R4X00
-  mips_isa = ISA_MIPS3;
-  mips_processor =  CPU_R4600;
-  mips_cp0sel_names = NULL;
-  mips_cp0sel_names_len = 0;
-  mips_hwr_names = mips_hwr_names_numeric;
-  mips_cp0_names = mips_cp0_names_r4x00;
-
-#elif CONFIG_CPU_MIPS64_RC64574
-  mips_isa = ISA_MIPS4;
-  mips_processor =  CPU_R5000;
-  mips_cp0sel_names = NULL;
-  mips_cp0sel_names_len = 0;
-  mips_hwr_names = mips_hwr_names_numeric;
-  mips_cp0_names = mips_cp0_names_r4x00;
-
-#elif CONFIG_CPU_MIPS64_SB1
-  mips_isa = ISA_MIPS64 | INSN_MIPS3D | INSN_SB1;
-  mips_processor =  CPU_SB1;
-  mips_cp0sel_names = mips_cp0sel_names_sb1;
-  mips_cp0sel_names_len = ARRAY_SIZE (mips_cp0sel_names_sb1);
-  mips_hwr_names = mips_hwr_names_numeric;
-  mips_cp0_names = mips_cp0_names_sb1;
-
-#elif CONFIG_CPU_MIPS64_VR4121
-  mips_isa = ISA_MIPS3;
-  mips_processor =  CPU_VR4120;
-  mips_cp0sel_names = NULL;
-  mips_cp0sel_names_len = 0;
-  mips_hwr_names = mips_hwr_names_numeric;
-  mips_cp0_names = mips_cp0_names_r4x00;
-
-#elif CONFIG_CPU_MIPS64_VR4181
-  mips_isa = ISA_MIPS3;
-  mips_processor =  CPU_R4111;
-  mips_cp0sel_names = NULL;
-  mips_cp0sel_names_len = 0;
-  mips_hwr_names = mips_hwr_names_numeric;
-  mips_cp0_names = mips_cp0_names_r4x00;
-
-#else
-#error unknown CPU
-#endif
-
-}
-
-static const struct mips_cp0sel_name *
-lookup_mips_cp0sel_name( const struct mips_cp0sel_name *names,
-	unsigned int len, unsigned int cp0reg,
-	unsigned int sel )
-{
-  unsigned int i;
-
-  for (i = 0; i < len; i++)
-    if (names[i].cp0reg == cp0reg && names[i].sel == sel)
-      return &names[i];
-  return NULL;
-}
-
-/* Print insn arguments for 32/64-bit code.  */
-
-static void
-print_insn_args ( const char *d,
-     unsigned long int l,
-     unsigned long pc,
-     unsigned long format )
-{
-  int op, delta;
-  unsigned int lsb, msb, msbd;
-  unsigned long target;
-
-  lsb = 0;
-
-  for (; *d != '\0'; d++)
-    {
-      switch (*d)
-	{
-	case ',':
-	case '(':
-	case ')':
-	case '[':
-	case ']':
-	  printf("%c", *d);
-	  break;
-
-	case '+':
-	  /* Extension character; switch for second char.  */
-	  d++;
-	  switch (*d)
-	    {
-	    case '\0':
-	      /* xgettext:c-format */
-	      printf( _("# internal error, incomplete extension sequence (+)"));
-	      return;
-
-	    case 'A':
-	      lsb = (l >> OP_SH_SHAMT) & OP_MASK_SHAMT;
-	      printf ("0x%x", lsb);
-	      break;
-	
-	    case 'B':
-	      msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB;
-	      printf ("0x%x", msb - lsb + 1);
-	      break;
-
-	    case 'C':
-	      msbd = (l >> OP_SH_EXTMSBD) & OP_MASK_EXTMSBD;
-	      printf("0x%x", msbd + 1);
-	      break;
-
-	    case 'D':
-	      {
-		const struct mips_cp0sel_name *n;
-		unsigned int cp0reg, sel;
-
-		cp0reg = (l >> OP_SH_RD) & OP_MASK_RD;
-		sel = (l >> OP_SH_SEL) & OP_MASK_SEL;
-
-		/* CP0 register including 'sel' code for mtcN (et al.), to be
-		   printed textually if known.  If not known, print both
-		   CP0 register name and sel numerically since CP0 register
-		   with sel 0 may have a name unrelated to register being
-		   printed.  */
-		n = lookup_mips_cp0sel_name(mips_cp0sel_names,
-					    mips_cp0sel_names_len, cp0reg, sel);
-		if (n != NULL)
-		  printf ( "%s", n->name);
-		else
-		  printf("$%d,%d", cp0reg, sel);
-		break;
-	      }
-
-	    default:
-	      /* xgettext:c-format */
-	      printf( _("# internal error, undefined extension sequence (+%c)"),
-				     *d);
-	      return;
-	    }
-	  break;
-
-	case 's':
-	case 'b':
-	case 'r':
-	case 'v':
-	  printf("%s", mips_gpr_names[(l >> OP_SH_RS) & OP_MASK_RS]);
-	  break;
-
-	case 't':
-	case 'w':
-	  printf("%s", mips_gpr_names[(l >> OP_SH_RT) & OP_MASK_RT]);
-	  break;
-
-	case 'i':
-	case 'u':
-	  printf("0x%x", (l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE);
-	  break;
-
-	case 'j': /* Same as i, but sign-extended.  */
-	case 'o':
-	  delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
-	  if (delta & 0x8000)
-	    delta |= ~0xffff;
-	  printf("%d", delta);
-	  break;
-
-	case 'h':
-	  printf ("0x%x", (unsigned int) ((l >> OP_SH_PREFX)
-						 & OP_MASK_PREFX));
-	  break;
-
-	case 'k':
-	  printf("0x%x", (unsigned int) ((l >> OP_SH_CACHE)
-						 & OP_MASK_CACHE));
-	  break;
-
-	case 'a':
-	  target = (((pc + 4) & ~(unsigned long) 0x0fffffff)
-			  | (((l >> OP_SH_TARGET) & OP_MASK_TARGET) << 2));
-	  print_address (target);
-	  break;
-
-	case 'p':
-	  /* Sign extend the displacement.  */
-	  delta = (l >> OP_SH_DELTA) & OP_MASK_DELTA;
-	  if (delta & 0x8000)
-	    delta |= ~0xffff;
-	  target = (delta << 2) + pc + INSNLEN;
-	  print_address(target);
-	  break;
-
-	case 'd':
-	  printf ("%s", mips_gpr_names[(l >> OP_SH_RD) & OP_MASK_RD]);
-	  break;
-
-	case 'U':
-	  {
-	    /* First check for both rd and rt being equal.  */
-	    unsigned int reg = (l >> OP_SH_RD) & OP_MASK_RD;
-	    if (reg == ((l >> OP_SH_RT) & OP_MASK_RT))
-	      printf("%s",
-				     mips_gpr_names[reg]);
-	    else
-	      {
-		/* If one is zero use the other.  */
-		if (reg == 0)
-		  printf ("%s", mips_gpr_names[(l >> OP_SH_RT) & OP_MASK_RT]);
-		else if (((l >> OP_SH_RT) & OP_MASK_RT) == 0)
-		  printf("%s", mips_gpr_names[reg]);
-		else /* Bogus, result depends on processor.  */
-		  printf("%s or %s", mips_gpr_names[reg],
-					 mips_gpr_names[(l >> OP_SH_RT) & OP_MASK_RT]);
-	      }
-	  }
-	  break;
-
-	case 'z':
-	  printf ( "%s", mips_gpr_names[0]);
-	  break;
-
-	case '<':
-	  printf( "0x%x", (l >> OP_SH_SHAMT) & OP_MASK_SHAMT);
-	  break;
-
-	case 'c':
-	  printf ("0x%x", (l >> OP_SH_CODE) & OP_MASK_CODE);
-	  break;
-
-	case 'q':
-	  printf ("0x%x", (l >> OP_SH_CODE2) & OP_MASK_CODE2);
-	  break;
-
-	case 'C':
-	  printf("0x%x", (l >> OP_SH_COPZ) & OP_MASK_COPZ);
-	  break;
-
-	case 'B':
-	  printf ("0x%x", (l >> OP_SH_CODE20) & OP_MASK_CODE20);
-	  break;
-
-	case 'J':
-	  printf ("0x%x", (l >> OP_SH_CODE19) & OP_MASK_CODE19);
-	  break;
-
-	case 'S':
-	case 'V':
-	  printf ( "%s", mips_fpr_names[(l >> OP_SH_FS) & OP_MASK_FS]);
-	  break;
-
-	case 'T':
-	case 'W':
-	  printf( "%s", mips_fpr_names[(l >> OP_SH_FT) & OP_MASK_FT]);
-	  break;
-
-	case 'D':
-	  printf ("%s", mips_fpr_names[(l >> OP_SH_FD) & OP_MASK_FD]);
-	  break;
-
-	case 'R':
-	  printf("%s", mips_fpr_names[(l >> OP_SH_FR) & OP_MASK_FR]);
-	  break;
-
-	case 'E':
-	  /* Coprocessor register for lwcN instructions, et al.
-
-	     Note that there is no load/store cp0 instructions, and
-	     that FPU (cp1) instructions disassemble this field using
-	     'T' format.  Therefore, until we gain understanding of
-	     cp2 register names, we can simply print the register
-	     numbers.  */
-	  printf("$%d", (l >> OP_SH_RT) & OP_MASK_RT);
-	  break;
-
-	case 'G':
-	  /* Coprocessor register for mtcN instructions, et al.  Note
-	     that FPU (cp1) instructions disassemble this field using
-	     'S' format.  Therefore, we only need to worry about cp0,
-	     cp2, and cp3.  */
-	  op = (l >> OP_SH_OP) & OP_MASK_OP;
-	  if (op == OP_OP_COP0)
-	    printf("%s", mips_cp0_names[(l >> OP_SH_RD) & OP_MASK_RD]);
-	  else
-	    printf("$%d", (l >> OP_SH_RD) & OP_MASK_RD);
-	  break;
-
-	case 'K':
-	  printf ("%s", mips_hwr_names[(l >> OP_SH_RD) & OP_MASK_RD]);
-	  break;
-
-	case 'N':
-	  printf("$fcc%d", (l >> OP_SH_BCC) & OP_MASK_BCC);
-	  break;
-
-	case 'M':
-	  printf ("$fcc%d", (l >> OP_SH_CCC) & OP_MASK_CCC);
-	  break;
-
-	case 'P':
-	  printf ("%d", (l >> OP_SH_PERFREG) & OP_MASK_PERFREG);
-	  break;
-
-	case 'e':
-	  printf("%d", (l >> OP_SH_VECBYTE) & OP_MASK_VECBYTE);
-	  break;
-
-	case '%':
-	  printf("%d", (l >> OP_SH_VECALIGN) & OP_MASK_VECALIGN);
-	  break;
-
-	case 'H':
-	  printf ("%d", (l >> OP_SH_SEL) & OP_MASK_SEL);
-	  break;
-
-	case 'O':
-	  printf( "%d", (l >> OP_SH_ALN) & OP_MASK_ALN);
-	  break;
-
-	case 'Q':
-	  {
-	    unsigned int vsel = (l >> OP_SH_VSEL) & OP_MASK_VSEL;
-	    if ((vsel & 0x10) == 0)
-	      {
-		int fmt;
-		vsel &= 0x0f;
-		for (fmt = 0; fmt < 3; fmt++, vsel >>= 1)
-		  if ((vsel & 1) == 0)
-		    break;
-		printf( "$v%d[%d]",
-				       (l >> OP_SH_FT) & OP_MASK_FT,
-				       vsel >> 1);
-	      }
-	    else if ((vsel & 0x08) == 0)
-	      {
-		printf( "$v%d", (l >> OP_SH_FT) & OP_MASK_FT);
-	      }
-	    else
-	      {
-		printf("0x%x", (l >> OP_SH_FT) & OP_MASK_FT);
-	      }
-	  }
-	  break;
-
-	case 'X':
-	  printf("$v%d", (l >> OP_SH_FD) & OP_MASK_FD);
-	  break;
-
-	case 'Y':
-	  printf ( "$v%d", (l >> OP_SH_FS) & OP_MASK_FS);
-	  break;
-
-	case 'Z':
-	  printf ("$v%d", (l >> OP_SH_FT) & OP_MASK_FT);
-	  break;
-
-	default:
-	  /* xgettext:c-format */
-	  printf( _("# internal error, undefined modifier(%c)"),
-				 *d);
-	  return;
-	}
-    }
-}
-
-/* Print the mips instruction at address MEMADDR in debugged memory,
-   on using INFO.  Returns length of the instruction, in bytes, which is
-   always INSNLEN.  BIGENDIAN must be 1 if this is big-endian code, 0 if
-   this is little-endian code.  */
-
-static int
-print_insn_mips ( unsigned long memaddr,
-     unsigned long int word,
-     unsigned long format )
-{
-  register const struct mips_opcode *op;
-  static bool init = 0;
-  static const struct mips_opcode *mips_hash[OP_MASK_OP + 1];
-
-  /* Build a hash table to shorten the search time.  */
-  if (! init)
-    {
-      unsigned int i;
-
-      for (i = 0; i <= OP_MASK_OP; i++)
-	{
-	  for (op = mips_opcodes; op < &mips_opcodes[NUMOPCODES]; op++)
-	    {
-	      if (op->pinfo == INSN_MACRO)
-		continue;
-	      if (i == ((op->match >> OP_SH_OP) & OP_MASK_OP))
-		{
-		  mips_hash[i] = op;
-		  break;
-		}
-	    }
-	}
-
-	set_default_mips_dis_options ( 0 );
-
-      init = 1;
-    }
-
-  op = mips_hash[(word >> OP_SH_OP) & OP_MASK_OP];
-  if (op != NULL)
-    {
-      for (; op < &mips_opcodes[NUMOPCODES]; op++)
-	{
-	  if (op->pinfo != INSN_MACRO && (word & op->mask) == op->match)
-	    {
-	      register const char *d;
-
-	      /* We always allow to disassemble the jalx instruction.  */
-	      if (! OPCODE_IS_MEMBER (op, mips_isa, mips_processor)
-		  && strcmp (op->name, "jalx"))
-		continue;
-
-	      /* Figure out instruction type and branch delay information.  */
-	      if ((op->pinfo & INSN_UNCOND_BRANCH_DELAY) != 0)
-	        {
-		}
-	      else if ((op->pinfo & (INSN_COND_BRANCH_DELAY
-				     | INSN_COND_BRANCH_LIKELY)) != 0)
-		{
-		}
-	      else if ((op->pinfo & (INSN_STORE_MEMORY
-				     | INSN_LOAD_MEMORY_DELAY)) != 0)
-		;
-
-	      printf( "%s", op->name);
-
-	      d = op->args;
-	      if (d != NULL && *d != '\0')
-		{
-		  printf ("\t");
-		  print_insn_args (d, word, memaddr, format);
-		}
-
-	      return INSNLEN;
-	    }
-	}
-    }
-
-  printf("0x%x", word);
-  return INSNLEN;
-}
-
-/* In an environment where we do not know the symbol type of the
-   instruction we are forced to assume that the low order bit of the
-   instructions' address may mark it as a mips16 instruction.  If we
-   are single stepping, or the pc is within the disassembled function,
-   this works.  Otherwise, we need a clue.  Sometimes.  */
-
-static int
-_print_insn_mips ( word_t insn, unsigned long memaddr, unsigned long format )
-{
-      return print_insn_mips (memaddr, insn, format);
-}
-
diff --git a/contrib/disas/mips-opc.cc b/contrib/disas/mips-opc.cc
deleted file mode 100644
index f1d4b5eb..00000000
--- a/contrib/disas/mips-opc.cc
+++ /dev/null
@@ -1,1199 +0,0 @@
-/* mips-opc.c -- MIPS opcode list.
-   Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
-   Free Software Foundation, Inc.
-   Contributed by Ralph Campbell and OSF
-   Commented and modified by Ian Lance Taylor, Cygnus Support
-   Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
-   MIPS-3D, MDMX, and MIPS32 Release 2 support added by Broadcom
-   Corporation (SiByte).
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING.  If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
-
-//#include <stdio.h>
-//#include "sysdep.h"
-#include "mips.h"
-
-/* Short hand so the lines aren't too long.  */
-
-#define LDD     INSN_LOAD_MEMORY_DELAY
-#define LCD	INSN_LOAD_COPROC_DELAY
-#define UBD     INSN_UNCOND_BRANCH_DELAY
-#define CBD	INSN_COND_BRANCH_DELAY
-#define COD     INSN_COPROC_MOVE_DELAY
-#define CLD	INSN_COPROC_MEMORY_DELAY
-#define CBL	INSN_COND_BRANCH_LIKELY
-#define TRAP	INSN_TRAP
-#define SM	INSN_STORE_MEMORY
-
-#define WR_d    INSN_WRITE_GPR_D
-#define WR_t    INSN_WRITE_GPR_T
-#define WR_31   INSN_WRITE_GPR_31
-#define WR_D    INSN_WRITE_FPR_D
-#define WR_T	INSN_WRITE_FPR_T
-#define WR_S	INSN_WRITE_FPR_S
-#define RD_s    INSN_READ_GPR_S
-#define RD_b    INSN_READ_GPR_S
-#define RD_t    INSN_READ_GPR_T
-#define RD_S    INSN_READ_FPR_S
-#define RD_T    INSN_READ_FPR_T
-#define RD_R	INSN_READ_FPR_R
-#define WR_CC	INSN_WRITE_COND_CODE
-#define RD_CC	INSN_READ_COND_CODE
-#define RD_C0   INSN_COP
-#define RD_C1	INSN_COP
-#define RD_C2   INSN_COP
-#define RD_C3   INSN_COP
-#define WR_C0   INSN_COP
-#define WR_C1	INSN_COP
-#define WR_C2   INSN_COP
-#define WR_C3   INSN_COP
-
-#define WR_HI	INSN_WRITE_HI
-#define RD_HI	INSN_READ_HI
-#define MOD_HI  WR_HI|RD_HI
-
-#define WR_LO	INSN_WRITE_LO
-#define RD_LO	INSN_READ_LO
-#define MOD_LO  WR_LO|RD_LO
-
-#define WR_HILO WR_HI|WR_LO
-#define RD_HILO RD_HI|RD_LO
-#define MOD_HILO WR_HILO|RD_HILO
-
-#define IS_M    INSN_MULT
-
-#define WR_MACC INSN_WRITE_MDMX_ACC
-#define RD_MACC INSN_READ_MDMX_ACC
-
-#define I1	INSN_ISA1
-#define I2	INSN_ISA2
-#define I3	INSN_ISA3
-#define I4	INSN_ISA4
-#define I5	INSN_ISA5
-#define I32	INSN_ISA32
-#define I64     INSN_ISA64
-#define I33	INSN_ISA32R2
-
-/* MIPS64 MIPS-3D ASE support.  */
-#define I16     INSN_MIPS16
-
-/* MIPS64 MIPS-3D ASE support.  */
-#define M3D     INSN_MIPS3D
-
-/* MIPS64 MDMX ASE support.  */
-#define MX      INSN_MDMX
-
-#define P3	INSN_4650
-#define L1	INSN_4010
-#define V1	(INSN_4100 | INSN_4111 | INSN_4120)
-#define T3      INSN_3900
-#define M1	INSN_10000
-#define SB1     INSN_SB1
-#define N411	INSN_4111
-#define N412	INSN_4120
-#define N5	(INSN_5400 | INSN_5500)
-#define N54	INSN_5400
-#define N55	INSN_5500
-
-#define G1      (T3             \
-                 )
-
-#define G2      (T3             \
-                 )
-
-#define G3      (I4             \
-                 )
-
-/* The order of overloaded instructions matters.  Label arguments and
-   register arguments look the same. Instructions that can have either
-   for arguments must apear in the correct order in this table for the
-   assembler to pick the right one. In other words, entries with
-   immediate operands must apear after the same instruction with
-   registers.
-
-   Because of the lookup algorithm used, entries with the same opcode
-   name must be contiguous.
- 
-   Many instructions are short hand for other instructions (i.e., The
-   jal <register> instruction is short for jalr <register>).  */
-
-const struct mips_opcode mips_builtin_opcodes[] =
-{
-/* These instructions appear first so that the disassembler will find
-   them first.  The assemblers uses a hash table based on the
-   instruction name anyhow.  */
-/* name,    args,	match,	    mask,	pinfo,          	membership */
-{"pref",    "k,o(b)",   0xcc000000, 0xfc000000, RD_b,           	I4|I32|G3	},
-{"prefx",   "h,t(b)",	0x4c00000f, 0xfc0007ff, RD_b|RD_t,		I4	},
-{"nop",     "",         0x00000000, 0xffffffff, 0,              	I1      }, /* sll */
-{"ssnop",   "",         0x00000040, 0xffffffff, 0,              	I32|N55	}, /* sll */
-{"ehb",     "",         0x000000c0, 0xffffffff, 0,              	I33	}, /* sll */
-{"li",      "t,j",      0x24000000, 0xffe00000, WR_t,			I1	}, /* addiu */
-{"li",	    "t,i",	0x34000000, 0xffe00000, WR_t,			I1	}, /* ori */
-{"li",      "t,I",	0,    (int) M_LI,	INSN_MACRO,		I1	},
-{"move",    "d,s",	0,    (int) M_MOVE,	INSN_MACRO,		I1	},
-{"move",    "d,s",	0x0000002d, 0xfc1f07ff, WR_d|RD_s,		I3	},/* daddu */
-{"move",    "d,s",	0x00000021, 0xfc1f07ff, WR_d|RD_s,		I1	},/* addu */
-{"move",    "d,s",	0x00000025, 0xfc1f07ff,	WR_d|RD_s,		I1	},/* or */
-{"b",       "p",	0x10000000, 0xffff0000,	UBD,			I1	},/* beq 0,0 */
-{"b",       "p",	0x04010000, 0xffff0000,	UBD,			I1	},/* bgez 0 */
-{"bal",     "p",	0x04110000, 0xffff0000,	UBD|WR_31,		I1	},/* bgezal 0*/
-
-{"abs",     "d,v",	0,    (int) M_ABS,	INSN_MACRO,		I1	},
-{"abs.s",   "D,V",	0x46000005, 0xffff003f,	WR_D|RD_S|FP_S,		I1	},
-{"abs.d",   "D,V",	0x46200005, 0xffff003f,	WR_D|RD_S|FP_D,		I1	},
-{"abs.ps",  "D,V",	0x46c00005, 0xffff003f,	WR_D|RD_S|FP_D,		I5	},
-{"add",     "d,v,t",	0x00000020, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"add",     "t,r,I",	0,    (int) M_ADD_I,	INSN_MACRO,		I1	},
-{"add.s",   "D,V,T",	0x46000000, 0xffe0003f,	WR_D|RD_S|RD_T|FP_S,	I1	},
-{"add.d",   "D,V,T",	0x46200000, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I1	},
-{"add.ob",  "X,Y,Q",	0x7800000b, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"add.ob",  "D,S,T",	0x4ac0000b, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"add.ob",  "D,S,T[e]",	0x4800000b, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"add.ob",  "D,S,k",	0x4bc0000b, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"add.ps",  "D,V,T",	0x46c00000, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-{"add.qh",  "X,Y,Q",	0x7820000b, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"adda.ob", "Y,Q",	0x78000037, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"adda.qh", "Y,Q",	0x78200037, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"addi",    "t,r,j",	0x20000000, 0xfc000000,	WR_t|RD_s,		I1	},
-{"addiu",   "t,r,j",	0x24000000, 0xfc000000,	WR_t|RD_s,		I1	},
-{"addl.ob", "Y,Q",	0x78000437, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"addl.qh", "Y,Q",	0x78200437, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"addr.ps", "D,S,T",	0x46c00018, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	M3D	},
-{"addu",    "d,v,t",	0x00000021, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"addu",    "t,r,I",	0,    (int) M_ADDU_I,	INSN_MACRO,		I1	},
-{"alni.ob", "X,Y,Z,O",	0x78000018, 0xff00003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"alni.ob", "D,S,T,%",	0x48000018, 0xff00003f,	WR_D|RD_S|RD_T, 	N54	},
-{"alni.qh", "X,Y,Z,O",	0x7800001a, 0xff00003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"alnv.ps", "D,V,T,s",	0x4c00001e, 0xfc00003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-{"alnv.ob", "X,Y,Z,s",	0x78000019, 0xfc00003f,	WR_D|RD_S|RD_T|RD_s|FP_D, MX|SB1	},
-{"alnv.qh", "X,Y,Z,s",	0x7800001b, 0xfc00003f,	WR_D|RD_S|RD_T|RD_s|FP_D, MX	},
-{"and",     "d,v,t",	0x00000024, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"and",     "t,r,I",	0,    (int) M_AND_I,	INSN_MACRO,		I1	},
-{"and.ob",  "X,Y,Q",	0x7800000c, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"and.ob",  "D,S,T",	0x4ac0000c, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"and.ob",  "D,S,T[e]",	0x4800000c, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"and.ob",  "D,S,k",	0x4bc0000c, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"and.qh",  "X,Y,Q",	0x7820000c, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"andi",    "t,r,i",	0x30000000, 0xfc000000,	WR_t|RD_s,		I1	},
-/* b is at the top of the table.  */
-/* bal is at the top of the table.  */
-{"bc0f",    "p",	0x41000000, 0xffff0000,	CBD|RD_CC,		I1	},
-{"bc0fl",   "p",	0x41020000, 0xffff0000,	CBL|RD_CC,		I2|T3	},
-{"bc0t",    "p",	0x41010000, 0xffff0000,	CBD|RD_CC,		I1	},
-{"bc0tl",   "p",	0x41030000, 0xffff0000,	CBL|RD_CC,		I2|T3	},
-{"bc1any2f", "N,p",	0x45200000, 0xffe30000,	CBD|RD_CC|FP_S,		M3D	},
-{"bc1any2t", "N,p",	0x45210000, 0xffe30000,	CBD|RD_CC|FP_S,		M3D	},
-{"bc1any4f", "N,p",	0x45400000, 0xffe30000,	CBD|RD_CC|FP_S,		M3D	},
-{"bc1any4t", "N,p",	0x45410000, 0xffe30000,	CBD|RD_CC|FP_S,		M3D	},
-{"bc1f",    "p",	0x45000000, 0xffff0000,	CBD|RD_CC|FP_S,		I1	},
-{"bc1f",    "N,p",      0x45000000, 0xffe30000, CBD|RD_CC|FP_S, 	I4|I32	},
-{"bc1fl",   "p",	0x45020000, 0xffff0000,	CBL|RD_CC|FP_S,		I2|T3	},
-{"bc1fl",   "N,p",      0x45020000, 0xffe30000, CBL|RD_CC|FP_S, 	I4|I32	},
-{"bc1t",    "p",	0x45010000, 0xffff0000,	CBD|RD_CC|FP_S,		I1	},
-{"bc1t",    "N,p",      0x45010000, 0xffe30000, CBD|RD_CC|FP_S, 	I4|I32	},
-{"bc1tl",   "p",	0x45030000, 0xffff0000,	CBL|RD_CC|FP_S,		I2|T3	},
-{"bc1tl",   "N,p",      0x45030000, 0xffe30000, CBL|RD_CC|FP_S, 	I4|I32	},
-{"bc2f",    "p",	0x49000000, 0xffff0000,	CBD|RD_CC,		I1	},
-{"bc2fl",   "p",	0x49020000, 0xffff0000,	CBL|RD_CC,		I2|T3	},
-{"bc2t",    "p",	0x49010000, 0xffff0000,	CBD|RD_CC,		I1	},
-{"bc2tl",   "p",	0x49030000, 0xffff0000,	CBL|RD_CC,		I2|T3	},
-{"bc3f",    "p",	0x4d000000, 0xffff0000,	CBD|RD_CC,		I1	},
-{"bc3fl",   "p",	0x4d020000, 0xffff0000,	CBL|RD_CC,		I2|T3	},
-{"bc3t",    "p",	0x4d010000, 0xffff0000,	CBD|RD_CC,		I1	},
-{"bc3tl",   "p",	0x4d030000, 0xffff0000,	CBL|RD_CC,		I2|T3	},
-{"beqz",    "s,p",	0x10000000, 0xfc1f0000,	CBD|RD_s,		I1	},
-{"beqzl",   "s,p",	0x50000000, 0xfc1f0000,	CBL|RD_s,		I2|T3	},
-{"beq",     "s,t,p",	0x10000000, 0xfc000000,	CBD|RD_s|RD_t,		I1	},
-{"beq",     "s,I,p",	0,    (int) M_BEQ_I,	INSN_MACRO,		I1	},
-{"beql",    "s,t,p",	0x50000000, 0xfc000000,	CBL|RD_s|RD_t,		I2|T3	},
-{"beql",    "s,I,p",	0,    (int) M_BEQL_I,	INSN_MACRO,		I2|T3	},
-{"bge",     "s,t,p",	0,    (int) M_BGE,	INSN_MACRO,		I1	},
-{"bge",     "s,I,p",	0,    (int) M_BGE_I,	INSN_MACRO,		I1	},
-{"bgel",    "s,t,p",	0,    (int) M_BGEL,	INSN_MACRO,		I2|T3	},
-{"bgel",    "s,I,p",	0,    (int) M_BGEL_I,	INSN_MACRO,		I2|T3	},
-{"bgeu",    "s,t,p",	0,    (int) M_BGEU,	INSN_MACRO,		I1	},
-{"bgeu",    "s,I,p",	0,    (int) M_BGEU_I,	INSN_MACRO,		I1	},
-{"bgeul",   "s,t,p",	0,    (int) M_BGEUL,	INSN_MACRO,		I2|T3	},
-{"bgeul",   "s,I,p",	0,    (int) M_BGEUL_I,	INSN_MACRO,		I2|T3	},
-{"bgez",    "s,p",	0x04010000, 0xfc1f0000,	CBD|RD_s,		I1	},
-{"bgezl",   "s,p",	0x04030000, 0xfc1f0000,	CBL|RD_s,		I2|T3	},
-{"bgezal",  "s,p",	0x04110000, 0xfc1f0000,	CBD|RD_s|WR_31,		I1	},
-{"bgezall", "s,p",	0x04130000, 0xfc1f0000,	CBL|RD_s|WR_31,		I2|T3	},
-{"bgt",     "s,t,p",	0,    (int) M_BGT,	INSN_MACRO,		I1	},
-{"bgt",     "s,I,p",	0,    (int) M_BGT_I,	INSN_MACRO,		I1	},
-{"bgtl",    "s,t,p",	0,    (int) M_BGTL,	INSN_MACRO,		I2|T3	},
-{"bgtl",    "s,I,p",	0,    (int) M_BGTL_I,	INSN_MACRO,		I2|T3	},
-{"bgtu",    "s,t,p",	0,    (int) M_BGTU,	INSN_MACRO,		I1	},
-{"bgtu",    "s,I,p",	0,    (int) M_BGTU_I,	INSN_MACRO,		I1	},
-{"bgtul",   "s,t,p",	0,    (int) M_BGTUL,	INSN_MACRO,		I2|T3	},
-{"bgtul",   "s,I,p",	0,    (int) M_BGTUL_I,	INSN_MACRO,		I2|T3	},
-{"bgtz",    "s,p",	0x1c000000, 0xfc1f0000,	CBD|RD_s,		I1	},
-{"bgtzl",   "s,p",	0x5c000000, 0xfc1f0000,	CBL|RD_s,		I2|T3	},
-{"ble",     "s,t,p",	0,    (int) M_BLE,	INSN_MACRO,		I1	},
-{"ble",     "s,I,p",	0,    (int) M_BLE_I,	INSN_MACRO,		I1	},
-{"blel",    "s,t,p",	0,    (int) M_BLEL,	INSN_MACRO,		I2|T3	},
-{"blel",    "s,I,p",	0,    (int) M_BLEL_I,	INSN_MACRO,		I2|T3	},
-{"bleu",    "s,t,p",	0,    (int) M_BLEU,	INSN_MACRO,		I1	},
-{"bleu",    "s,I,p",	0,    (int) M_BLEU_I,	INSN_MACRO,		I1	},
-{"bleul",   "s,t,p",	0,    (int) M_BLEUL,	INSN_MACRO,		I2|T3	},
-{"bleul",   "s,I,p",	0,    (int) M_BLEUL_I,	INSN_MACRO,		I2|T3	},
-{"blez",    "s,p",	0x18000000, 0xfc1f0000,	CBD|RD_s,		I1	},
-{"blezl",   "s,p",	0x58000000, 0xfc1f0000,	CBL|RD_s,		I2|T3	},
-{"blt",     "s,t,p",	0,    (int) M_BLT,	INSN_MACRO,		I1	},
-{"blt",     "s,I,p",	0,    (int) M_BLT_I,	INSN_MACRO,		I1	},
-{"bltl",    "s,t,p",	0,    (int) M_BLTL,	INSN_MACRO,		I2|T3	},
-{"bltl",    "s,I,p",	0,    (int) M_BLTL_I,	INSN_MACRO,		I2|T3	},
-{"bltu",    "s,t,p",	0,    (int) M_BLTU,	INSN_MACRO,		I1	},
-{"bltu",    "s,I,p",	0,    (int) M_BLTU_I,	INSN_MACRO,		I1	},
-{"bltul",   "s,t,p",	0,    (int) M_BLTUL,	INSN_MACRO,		I2|T3	},
-{"bltul",   "s,I,p",	0,    (int) M_BLTUL_I,	INSN_MACRO,		I2|T3	},
-{"bltz",    "s,p",	0x04000000, 0xfc1f0000,	CBD|RD_s,		I1	},
-{"bltzl",   "s,p",	0x04020000, 0xfc1f0000,	CBL|RD_s,		I2|T3	},
-{"bltzal",  "s,p",	0x04100000, 0xfc1f0000,	CBD|RD_s|WR_31,		I1	},
-{"bltzall", "s,p",	0x04120000, 0xfc1f0000,	CBL|RD_s|WR_31,		I2|T3	},
-{"bnez",    "s,p",	0x14000000, 0xfc1f0000,	CBD|RD_s,		I1	},
-{"bnezl",   "s,p",	0x54000000, 0xfc1f0000,	CBL|RD_s,		I2|T3	},
-{"bne",     "s,t,p",	0x14000000, 0xfc000000,	CBD|RD_s|RD_t,		I1	},
-{"bne",     "s,I,p",	0,    (int) M_BNE_I,	INSN_MACRO,		I1	},
-{"bnel",    "s,t,p",	0x54000000, 0xfc000000,	CBL|RD_s|RD_t, 		I2|T3	},
-{"bnel",    "s,I,p",	0,    (int) M_BNEL_I,	INSN_MACRO,		I2|T3	},
-{"break",   "",		0x0000000d, 0xffffffff,	TRAP,			I1	},
-{"break",   "B",        0x0000000d, 0xfc00003f, TRAP,           	I32     },
-{"break",   "c",	0x0000000d, 0xfc00ffff,	TRAP,			I1	},
-{"break",   "c,q",	0x0000000d, 0xfc00003f,	TRAP,			I1	},
-{"c.f.d",   "S,T",	0x46200030, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.f.d",   "M,S,T",    0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.f.s",   "S,T",      0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.f.s",   "M,S,T",    0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.f.ps",  "S,T",	0x46c00030, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.f.ps",  "M,S,T",	0x46c00030, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.un.d",  "S,T",	0x46200031, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.un.d",  "M,S,T",    0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.un.s",  "S,T",      0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.un.s",  "M,S,T",    0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.un.ps", "S,T",	0x46c00031, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.un.ps", "M,S,T",	0x46c00031, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.eq.d",  "S,T",	0x46200032, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.eq.d",  "M,S,T",    0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.eq.s",  "S,T",      0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.eq.s",  "M,S,T",    0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.eq.ob", "Y,Q",	0x78000001, 0xfc2007ff,	WR_CC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"c.eq.ob", "S,T",	0x4ac00001, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.eq.ob", "S,T[e]",	0x48000001, 0xfe2007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.eq.ob", "S,k",	0x4bc00001, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.eq.ps", "S,T",	0x46c00032, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.eq.ps", "M,S,T",	0x46c00032, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.eq.qh", "Y,Q",	0x78200001, 0xfc2007ff,	WR_CC|RD_S|RD_T|FP_D,	MX	},
-{"c.ueq.d", "S,T",	0x46200033, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.ueq.d", "M,S,T",    0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.ueq.s", "S,T",      0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.ueq.s", "M,S,T",    0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.ueq.ps","S,T",	0x46c00033, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ueq.ps","M,S,T",	0x46c00033, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.olt.d", "S,T",      0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
-{"c.olt.d", "M,S,T",    0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.olt.s", "S,T",	0x46000034, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_S,	I1	},
-{"c.olt.s", "M,S,T",    0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.olt.ps","S,T",	0x46c00034, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.olt.ps","M,S,T",	0x46c00034, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ult.d", "S,T",	0x46200035, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.ult.d", "M,S,T",    0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.ult.s", "S,T",      0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.ult.s", "M,S,T",    0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.ult.ps","S,T",	0x46c00035, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ult.ps","M,S,T",	0x46c00035, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ole.d", "S,T",      0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D,   I1      },
-{"c.ole.d", "M,S,T",    0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.ole.s", "S,T",      0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.ole.s", "M,S,T",    0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.ole.ps","S,T",	0x46c00036, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ole.ps","M,S,T",	0x46c00036, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ule.d", "S,T",	0x46200037, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.ule.d", "M,S,T",    0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.ule.s", "S,T",      0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.ule.s", "M,S,T",    0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.ule.ps","S,T",	0x46c00037, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ule.ps","M,S,T",	0x46c00037, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.sf.d",  "S,T",	0x46200038, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.sf.d",  "M,S,T",    0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.sf.s",  "S,T",      0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.sf.s",  "M,S,T",    0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.sf.ps", "S,T",	0x46c00038, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.sf.ps", "M,S,T",	0x46c00038, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ngle.d","S,T",	0x46200039, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.ngle.d","M,S,T",    0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.ngle.s","S,T",      0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.ngle.s","M,S,T",    0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.ngle.ps","S,T",	0x46c00039, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ngle.ps","M,S,T",	0x46c00039, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.seq.d", "S,T",	0x4620003a, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.seq.d", "M,S,T",    0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.seq.s", "S,T",      0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.seq.s", "M,S,T",    0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.seq.ps","S,T",	0x46c0003a, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.seq.ps","M,S,T",	0x46c0003a, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ngl.d", "S,T",	0x4620003b, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.ngl.d", "M,S,T",    0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.ngl.s", "S,T",      0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.ngl.s", "M,S,T",    0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.ngl.ps","S,T",	0x46c0003b, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ngl.ps","M,S,T",	0x46c0003b, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.lt.d",  "S,T",	0x4620003c, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.lt.d",  "M,S,T",    0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.lt.s",  "S,T",	0x4600003c, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_S,	I1	},
-{"c.lt.s",  "M,S,T",    0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.lt.ob", "Y,Q",	0x78000004, 0xfc2007ff,	WR_CC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"c.lt.ob", "S,T",	0x4ac00004, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.lt.ob", "S,T[e]",	0x48000004, 0xfe2007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.lt.ob", "S,k",	0x4bc00004, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.lt.ps", "S,T",	0x46c0003c, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.lt.ps", "M,S,T",	0x46c0003c, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.lt.qh", "Y,Q",	0x78200004, 0xfc2007ff,	WR_CC|RD_S|RD_T|FP_D,	MX	},
-{"c.nge.d", "S,T",	0x4620003d, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.nge.d", "M,S,T",    0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.nge.s", "S,T",      0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.nge.s", "M,S,T",    0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.nge.ps","S,T",	0x46c0003d, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.nge.ps","M,S,T",	0x46c0003d, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.le.d",  "S,T",	0x4620003e, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.le.d",  "M,S,T",    0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.le.s",  "S,T",	0x4600003e, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_S,	I1	},
-{"c.le.s",  "M,S,T",    0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.le.ob", "Y,Q",	0x78000005, 0xfc2007ff,	WR_CC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"c.le.ob", "S,T",	0x4ac00005, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.le.ob", "S,T[e]",	0x48000005, 0xfe2007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.le.ob", "S,k",	0x4bc00005, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"c.le.ps", "S,T",	0x46c0003e, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.le.ps", "M,S,T",	0x46c0003e, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.le.qh", "Y,Q",	0x78200005, 0xfc2007ff,	WR_CC|RD_S|RD_T|FP_D,	MX	},
-{"c.ngt.d", "S,T",	0x4620003f, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I1	},
-{"c.ngt.d", "M,S,T",    0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D,   I4|I32	},
-{"c.ngt.s", "S,T",      0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S,   I1      },
-{"c.ngt.s", "M,S,T",    0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S,   I4|I32	},
-{"c.ngt.ps","S,T",	0x46c0003f, 0xffe007ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"c.ngt.ps","M,S,T",	0x46c0003f, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	I5	},
-{"cabs.eq.d",  "M,S,T",	0x46200072, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.eq.ps", "M,S,T",	0x46c00072, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.eq.s",  "M,S,T",	0x46000072, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.f.d",   "M,S,T",	0x46200070, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.f.ps",  "M,S,T",	0x46c00070, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.f.s",   "M,S,T",	0x46000070, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.le.d",  "M,S,T",	0x4620007e, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.le.ps", "M,S,T",	0x46c0007e, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.le.s",  "M,S,T",	0x4600007e, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.lt.d",  "M,S,T",	0x4620007c, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.lt.ps", "M,S,T",	0x46c0007c, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.lt.s",  "M,S,T",	0x4600007c, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.nge.d", "M,S,T",	0x4620007d, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.nge.ps","M,S,T",	0x46c0007d, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.nge.s", "M,S,T",	0x4600007d, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.ngl.d", "M,S,T",	0x4620007b, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ngl.ps","M,S,T",	0x46c0007b, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ngl.s", "M,S,T",	0x4600007b, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.ngle.d","M,S,T",	0x46200079, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ngle.ps","M,S,T",0x46c00079, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ngle.s","M,S,T",	0x46000079, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.ngt.d", "M,S,T",	0x4620007f, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ngt.ps","M,S,T",	0x46c0007f, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ngt.s", "M,S,T",	0x4600007f, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.ole.d", "M,S,T",	0x46200076, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ole.ps","M,S,T",	0x46c00076, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ole.s", "M,S,T",	0x46000076, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.olt.d", "M,S,T",	0x46200074, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.olt.ps","M,S,T",	0x46c00074, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.olt.s", "M,S,T",	0x46000074, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.seq.d", "M,S,T",	0x4620007a, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.seq.ps","M,S,T",	0x46c0007a, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.seq.s", "M,S,T",	0x4600007a, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.sf.d",  "M,S,T",	0x46200078, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.sf.ps", "M,S,T",	0x46c00078, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.sf.s",  "M,S,T",	0x46000078, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.ueq.d", "M,S,T",	0x46200073, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ueq.ps","M,S,T",	0x46c00073, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ueq.s", "M,S,T",	0x46000073, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.ule.d", "M,S,T",	0x46200077, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ule.ps","M,S,T",	0x46c00077, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ule.s", "M,S,T",	0x46000077, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.ult.d", "M,S,T",	0x46200075, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ult.ps","M,S,T",	0x46c00075, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.ult.s", "M,S,T",	0x46000075, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cabs.un.d",  "M,S,T",	0x46200071, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.un.ps", "M,S,T",	0x46c00071, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_D,	M3D	},
-{"cabs.un.s",  "M,S,T",	0x46000071, 0xffe000ff,	RD_S|RD_T|WR_CC|FP_S,	M3D	},
-{"cache",   "k,o(b)",   0xbc000000, 0xfc000000, RD_b,           	I3|I32|T3},
-{"ceil.l.d", "D,S",	0x4620000a, 0xffff003f, WR_D|RD_S|FP_D,		I3	},
-{"ceil.l.s", "D,S",	0x4600000a, 0xffff003f, WR_D|RD_S|FP_S,		I3	},
-{"ceil.w.d", "D,S",	0x4620000e, 0xffff003f, WR_D|RD_S|FP_D,		I2	},
-{"ceil.w.s", "D,S",	0x4600000e, 0xffff003f, WR_D|RD_S|FP_S,		I2	},
-{"cfc0",    "t,G",	0x40400000, 0xffe007ff,	LCD|WR_t|RD_C0,		I1	},
-{"cfc1",    "t,G",	0x44400000, 0xffe007ff,	LCD|WR_t|RD_C1|FP_S,	I1	},
-{"cfc1",    "t,S",	0x44400000, 0xffe007ff,	LCD|WR_t|RD_C1|FP_S,	I1	},
-{"cfc2",    "t,G",	0x48400000, 0xffe007ff,	LCD|WR_t|RD_C2,		I1	},
-{"cfc3",    "t,G",	0x4c400000, 0xffe007ff,	LCD|WR_t|RD_C3,		I1	},
-{"clo",     "U,s",      0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, 	I32|N55 },
-{"clz",     "U,s",      0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, 	I32|N55 },
-{"ctc0",    "t,G",	0x40c00000, 0xffe007ff,	COD|RD_t|WR_CC,		I1	},
-{"ctc1",    "t,G",	0x44c00000, 0xffe007ff,	COD|RD_t|WR_CC|FP_S,	I1	},
-{"ctc1",    "t,S",	0x44c00000, 0xffe007ff,	COD|RD_t|WR_CC|FP_S,	I1	},
-{"ctc2",    "t,G",	0x48c00000, 0xffe007ff,	COD|RD_t|WR_CC,		I1	},
-{"ctc3",    "t,G",	0x4cc00000, 0xffe007ff,	COD|RD_t|WR_CC,		I1	},
-{"cvt.d.l", "D,S",	0x46a00021, 0xffff003f,	WR_D|RD_S|FP_D,		I3	},
-{"cvt.d.s", "D,S",	0x46000021, 0xffff003f,	WR_D|RD_S|FP_D|FP_S,	I1	},
-{"cvt.d.w", "D,S",	0x46800021, 0xffff003f,	WR_D|RD_S|FP_D,		I1	},
-{"cvt.l.d", "D,S",	0x46200025, 0xffff003f,	WR_D|RD_S|FP_D,		I3	},
-{"cvt.l.s", "D,S",	0x46000025, 0xffff003f,	WR_D|RD_S|FP_S,		I3	},
-{"cvt.s.l", "D,S",	0x46a00020, 0xffff003f,	WR_D|RD_S|FP_S,		I3	},
-{"cvt.s.d", "D,S",	0x46200020, 0xffff003f,	WR_D|RD_S|FP_S|FP_D,	I1	},
-{"cvt.s.w", "D,S",	0x46800020, 0xffff003f,	WR_D|RD_S|FP_S,		I1	},
-{"cvt.s.pl","D,S",	0x46c00028, 0xffff003f,	WR_D|RD_S|FP_S|FP_D,	I5	},
-{"cvt.s.pu","D,S",	0x46c00020, 0xffff003f,	WR_D|RD_S|FP_S|FP_D,	I5	},
-{"cvt.w.d", "D,S",	0x46200024, 0xffff003f,	WR_D|RD_S|FP_D,		I1	},
-{"cvt.w.s", "D,S",	0x46000024, 0xffff003f,	WR_D|RD_S|FP_S,		I1	},
-{"cvt.ps.pw", "D,S",	0x46800026, 0xffff003f,	WR_D|RD_S|FP_S|FP_D,	M3D	},
-{"cvt.ps.s","D,V,T",	0x46000026, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-{"cvt.pw.ps", "D,S",	0x46c00024, 0xffff003f,	WR_D|RD_S|FP_S|FP_D,	M3D	},
-{"dabs",    "d,v",	0,    (int) M_DABS,	INSN_MACRO,		I3	},
-{"dadd",    "d,v,t",	0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t,		I3	},
-{"dadd",    "t,r,I",	0,    (int) M_DADD_I,	INSN_MACRO,		I3	},
-{"daddi",   "t,r,j",	0x60000000, 0xfc000000, WR_t|RD_s,		I3	},
-{"daddiu",  "t,r,j",	0x64000000, 0xfc000000, WR_t|RD_s,		I3	},
-{"daddu",   "d,v,t",	0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t,		I3	},
-{"daddu",   "t,r,I",	0,    (int) M_DADDU_I,	INSN_MACRO,		I3	},
-{"dbreak",  "",		0x7000003f, 0xffffffff,	0,			N5	},
-{"dclo",    "U,s",      0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, 	I64|N55 },
-{"dclz",    "U,s",      0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, 	I64|N55 },
-/* dctr and dctw are used on the r5000.  */
-{"dctr",    "o(b)",	0xbc050000, 0xfc1f0000, RD_b,			I3	},
-{"dctw",    "o(b)",	0xbc090000, 0xfc1f0000, RD_b,			I3	},
-{"deret",   "",         0x4200001f, 0xffffffff, 0, 			I32|G2	},
-/* For ddiv, see the comments about div.  */
-{"ddiv",    "z,s,t",    0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
-{"ddiv",    "d,v,t",	0,    (int) M_DDIV_3,	INSN_MACRO,		I3	},
-{"ddiv",    "d,v,I",	0,    (int) M_DDIV_3I,	INSN_MACRO,		I3	},
-/* For ddivu, see the comments about div.  */
-{"ddivu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
-{"ddivu",   "d,v,t",	0,    (int) M_DDIVU_3,	INSN_MACRO,		I3	},
-{"ddivu",   "d,v,I",	0,    (int) M_DDIVU_3I,	INSN_MACRO,		I3	},
-{"di",      "",		0x41606000, 0xffffffff,	WR_t|WR_C0,		I33	},
-{"di",      "t",	0x41606000, 0xffe0ffff,	WR_t|WR_C0,		I33	},
-/* The MIPS assembler treats the div opcode with two operands as
-   though the first operand appeared twice (the first operand is both
-   a source and a destination).  To get the div machine instruction,
-   you must use an explicit destination of $0.  */
-{"div",     "z,s,t",    0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I1      },
-{"div",     "z,t",      0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HILO,      I1      },
-{"div",     "d,v,t",	0,    (int) M_DIV_3,	INSN_MACRO,		I1	},
-{"div",     "d,v,I",	0,    (int) M_DIV_3I,	INSN_MACRO,		I1	},
-{"div.d",   "D,V,T",	0x46200003, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I1	},
-{"div.s",   "D,V,T",	0x46000003, 0xffe0003f,	WR_D|RD_S|RD_T|FP_S,	I1	},
-{"div.ps",  "D,V,T",	0x46c00003, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	SB1	},
-/* For divu, see the comments about div.  */
-{"divu",    "z,s,t",    0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I1      },
-{"divu",    "z,t",      0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO,      I1      },
-{"divu",    "d,v,t",	0,    (int) M_DIVU_3,	INSN_MACRO,		I1	},
-{"divu",    "d,v,I",	0,    (int) M_DIVU_3I,	INSN_MACRO,		I1	},
-{"dla",     "t,A(b)",	0,    (int) M_DLA_AB,	INSN_MACRO,		I3	},
-{"dli",     "t,j",      0x24000000, 0xffe00000, WR_t,			I3	}, /* addiu */
-{"dli",	    "t,i",	0x34000000, 0xffe00000, WR_t,			I3	}, /* ori */
-{"dli",     "t,I",	0,    (int) M_DLI,	INSN_MACRO,		I3	},
-{"dmacc",   "d,s,t",	0x00000029, 0xfc0007ff,	RD_s|RD_t|WR_LO|WR_d,	N412	},
-{"dmacchi", "d,s,t",	0x00000229, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,	N412	},
-{"dmacchis", "d,s,t",	0x00000629, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,	N412	},
-{"dmacchiu", "d,s,t",	0x00000269, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,	N412	},
-{"dmacchius", "d,s,t",	0x00000669, 0xfc0007ff, RD_s|RD_t|WR_LO|WR_d,	N412	},
-{"dmaccs",  "d,s,t",	0x00000429, 0xfc0007ff,	RD_s|RD_t|WR_LO|WR_d,	N412	},
-{"dmaccu",  "d,s,t",	0x00000069, 0xfc0007ff,	RD_s|RD_t|WR_LO|WR_d,	N412	},
-{"dmaccus", "d,s,t",	0x00000469, 0xfc0007ff,	RD_s|RD_t|WR_LO|WR_d,	N412	},
-{"dmadd16", "s,t",      0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO,       N411    },
-{"dmfc0",   "t,G",	0x40200000, 0xffe007ff, LCD|WR_t|RD_C0,		I3	},
-{"dmfc0",   "t,+D",     0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 	I64     },
-{"dmfc0",   "t,G,H",    0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 	I64     },
-{"dmtc0",   "t,G",	0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC,	I3	},
-{"dmtc0",   "t,+D",     0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC,   I64     },
-{"dmtc0",   "t,G,H",    0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC,   I64     },
-{"dmfc1",   "t,S",	0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,	I3	},
-{"dmfc1",   "t,G",      0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S,     I3      },
-{"dmtc1",   "t,S",	0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S,	I3	},
-{"dmtc1",   "t,G",      0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S,     I3      },
-{"dmfc2",   "t,G",      0x48200000, 0xffe007ff, LCD|WR_t|RD_C2, 	I3      },
-{"dmfc2",   "t,G,H",    0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, 	I64     },
-{"dmtc2",   "t,G",      0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC,   I3      },
-{"dmtc2",   "t,G,H",    0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC,   I64     },
-{"dmfc3",   "t,G",      0x4c200000, 0xffe007ff, LCD|WR_t|RD_C3, 	I3      },
-{"dmfc3",   "t,G,H",    0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3, 	I64     },
-{"dmtc3",   "t,G",      0x4ca00000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC,   I3      },
-{"dmtc3",   "t,G,H",    0x4ca00000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC,   I64     },
-{"dmul",    "d,v,t",	0,    (int) M_DMUL,	INSN_MACRO,		I3	},
-{"dmul",    "d,v,I",	0,    (int) M_DMUL_I,	INSN_MACRO,		I3	},
-{"dmulo",   "d,v,t",	0,    (int) M_DMULO,	INSN_MACRO,		I3	},
-{"dmulo",   "d,v,I",	0,    (int) M_DMULO_I,	INSN_MACRO,		I3	},
-{"dmulou",  "d,v,t",	0,    (int) M_DMULOU,	INSN_MACRO,		I3	},
-{"dmulou",  "d,v,I",	0,    (int) M_DMULOU_I,	INSN_MACRO,		I3	},
-{"dmult",   "s,t",      0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3	},
-{"dmultu",  "s,t",      0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3	},
-{"dneg",    "d,w",	0x0000002e, 0xffe007ff,	WR_d|RD_t,		I3	}, /* dsub 0 */
-{"dnegu",   "d,w",	0x0000002f, 0xffe007ff,	WR_d|RD_t,		I3	}, /* dsubu 0*/
-{"drem",    "z,s,t",    0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
-{"drem",    "d,v,t",	3,    (int) M_DREM_3,	INSN_MACRO,		I3	},
-{"drem",    "d,v,I",	3,    (int) M_DREM_3I,	INSN_MACRO,		I3	},
-{"dremu",   "z,s,t",    0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I3      },
-{"dremu",   "d,v,t",	3,    (int) M_DREMU_3,	INSN_MACRO,		I3	},
-{"dremu",   "d,v,I",	3,    (int) M_DREMU_3I,	INSN_MACRO,		I3	},
-{"dret",    "",		0x7000003e, 0xffffffff,	0,			N5	},
-{"drol",    "d,v,t",	0,    (int) M_DROL,	INSN_MACRO,		I3	},
-{"drol",    "d,v,I",	0,    (int) M_DROL_I,	INSN_MACRO,		I3	},
-{"dror",    "d,v,t",	0,    (int) M_DROR,	INSN_MACRO,		I3	},
-{"dror",    "d,v,I",	0,    (int) M_DROR_I,	INSN_MACRO,		I3	},
-{"dror",    "d,w,<",	0x0020003a, 0xffe0003f,	WR_d|RD_t,		N5	},
-{"drorv",   "d,t,s",	0x00000056, 0xfc0007ff,	RD_t|RD_s|WR_d,		N5	},
-{"dror32",  "d,w,<",	0x0020003e, 0xffe0003f,	WR_d|RD_t,		N5	},
-{"dsllv",   "d,t,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	},
-{"dsll32",  "d,w,<",	0x0000003c, 0xffe0003f, WR_d|RD_t,		I3	},
-{"dsll",    "d,w,s",	0x00000014, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	}, /* dsllv */
-{"dsll",    "d,w,>",	0x0000003c, 0xffe0003f, WR_d|RD_t,		I3	}, /* dsll32 */
-{"dsll",    "d,w,<",	0x00000038, 0xffe0003f,	WR_d|RD_t,		I3	},
-{"dsrav",   "d,t,s",	0x00000017, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	},
-{"dsra32",  "d,w,<",	0x0000003f, 0xffe0003f, WR_d|RD_t,		I3	},
-{"dsra",    "d,w,s",	0x00000017, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	}, /* dsrav */
-{"dsra",    "d,w,>",	0x0000003f, 0xffe0003f, WR_d|RD_t,		I3	}, /* dsra32 */
-{"dsra",    "d,w,<",	0x0000003b, 0xffe0003f,	WR_d|RD_t,		I3	},
-{"dsrlv",   "d,t,s",	0x00000016, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	},
-{"dsrl32",  "d,w,<",	0x0000003e, 0xffe0003f, WR_d|RD_t,		I3	},
-{"dsrl",    "d,w,s",	0x00000016, 0xfc0007ff,	WR_d|RD_t|RD_s,		I3	}, /* dsrlv */
-{"dsrl",    "d,w,>",	0x0000003e, 0xffe0003f, WR_d|RD_t,		I3	}, /* dsrl32 */
-{"dsrl",    "d,w,<",	0x0000003a, 0xffe0003f,	WR_d|RD_t,		I3	},
-{"dsub",    "d,v,t",	0x0000002e, 0xfc0007ff,	WR_d|RD_s|RD_t,		I3	},
-{"dsub",    "d,v,I",	0,    (int) M_DSUB_I,	INSN_MACRO,		I3	},
-{"dsubu",   "d,v,t",	0x0000002f, 0xfc0007ff,	WR_d|RD_s|RD_t,		I3	},
-{"dsubu",   "d,v,I",	0,    (int) M_DSUBU_I,	INSN_MACRO,		I3	},
-{"ei",      "",		0x41606020, 0xffffffff,	WR_t|WR_C0,		I33	},
-{"ei",      "t",	0x41606020, 0xffe0ffff,	WR_t|WR_C0,		I33	},
-{"eret",    "",         0x42000018, 0xffffffff, 0,      		I3|I32	},
-{"ext",     "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s,    		I33	},
-{"floor.l.d", "D,S",	0x4620000b, 0xffff003f, WR_D|RD_S|FP_D,		I3	},
-{"floor.l.s", "D,S",	0x4600000b, 0xffff003f, WR_D|RD_S|FP_S,		I3	},
-{"floor.w.d", "D,S",	0x4620000f, 0xffff003f, WR_D|RD_S|FP_D,		I2	},
-{"floor.w.s", "D,S",	0x4600000f, 0xffff003f, WR_D|RD_S|FP_S,		I2	},
-{"flushi",  "",		0xbc010000, 0xffffffff, 0,			L1	},
-{"flushd",  "",		0xbc020000, 0xffffffff, 0, 			L1	},
-{"flushid", "",		0xbc030000, 0xffffffff, 0, 			L1	},
-{"hibernate","",        0x42000023, 0xffffffff,	0, 			V1	},
-{"ins",     "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s,    		I33	},
-{"jr",      "s",	0x00000008, 0xfc1fffff,	UBD|RD_s,		I1	},
-{"jr.hb",   "s",	0x00000408, 0xfc1fffff,	UBD|RD_s,		I33	},
-{"j",       "s",	0x00000008, 0xfc1fffff,	UBD|RD_s,		I1	}, /* jr */
-/* SVR4 PIC code requires special handling for j, so it must be a
-   macro.  */
-{"j",	    "a",	0,     (int) M_J_A,	INSN_MACRO,		I1	},
-/* This form of j is used by the disassembler and internally by the
-   assembler, but will never match user input (because the line above
-   will match first).  */
-{"j",       "a",	0x08000000, 0xfc000000,	UBD,			I1	},
-{"jalr",    "s",	0x0000f809, 0xfc1fffff,	UBD|RD_s|WR_d,		I1	},
-{"jalr",    "d,s",	0x00000009, 0xfc1f07ff,	UBD|RD_s|WR_d,		I1	},
-{"jalr.hb", "s",	0x0000fc09, 0xfc1fffff,	UBD|RD_s|WR_d,		I33	},
-{"jalr.hb", "d,s",	0x00000409, 0xfc1f07ff,	UBD|RD_s|WR_d,		I33	},
-/* SVR4 PIC code requires special handling for jal, so it must be a
-   macro.  */
-{"jal",     "d,s",	0,     (int) M_JAL_2,	INSN_MACRO,		I1	},
-{"jal",     "s",	0,     (int) M_JAL_1,	INSN_MACRO,		I1	},
-{"jal",     "a",	0,     (int) M_JAL_A,	INSN_MACRO,		I1	},
-/* This form of jal is used by the disassembler and internally by the
-   assembler, but will never match user input (because the line above
-   will match first).  */
-{"jal",     "a",	0x0c000000, 0xfc000000,	UBD|WR_31,		I1	},
-{"jalx",    "a",	0x74000000, 0xfc000000, UBD|WR_31,		I16     },
-{"la",      "t,A(b)",	0,    (int) M_LA_AB,	INSN_MACRO,		I1	},
-{"lb",      "t,o(b)",	0x80000000, 0xfc000000,	LDD|RD_b|WR_t,		I1	},
-{"lb",      "t,A(b)",	0,    (int) M_LB_AB,	INSN_MACRO,		I1	},
-{"lbu",     "t,o(b)",	0x90000000, 0xfc000000,	LDD|RD_b|WR_t,		I1	},
-{"lbu",     "t,A(b)",	0,    (int) M_LBU_AB,	INSN_MACRO,		I1	},
-{"ld",	    "t,o(b)",   0xdc000000, 0xfc000000, WR_t|RD_b,		I3	},
-{"ld",      "t,o(b)",	0,    (int) M_LD_OB,	INSN_MACRO,		I1	},
-{"ld",      "t,A(b)",	0,    (int) M_LD_AB,	INSN_MACRO,		I1	},
-{"ldc1",    "T,o(b)",	0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,	I2	},
-{"ldc1",    "E,o(b)",	0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,	I2	},
-{"ldc1",    "T,A(b)",	0,    (int) M_LDC1_AB,	INSN_MACRO,		I2	},
-{"ldc1",    "E,A(b)",	0,    (int) M_LDC1_AB,	INSN_MACRO,		I2	},
-{"l.d",     "T,o(b)",	0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,	I2	}, /* ldc1 */
-{"l.d",     "T,o(b)",	0,    (int) M_L_DOB,	INSN_MACRO,		I1	},
-{"l.d",     "T,A(b)",	0,    (int) M_L_DAB,	INSN_MACRO,		I1	},
-{"ldc2",    "E,o(b)",	0xd8000000, 0xfc000000, CLD|RD_b|WR_CC,		I2	},
-{"ldc2",    "E,A(b)",	0,    (int) M_LDC2_AB,	INSN_MACRO,		I2	},
-{"ldc3",    "E,o(b)",	0xdc000000, 0xfc000000, CLD|RD_b|WR_CC,		I2	},
-{"ldc3",    "E,A(b)",	0,    (int) M_LDC3_AB,	INSN_MACRO,		I2	},
-{"ldl",	    "t,o(b)",	0x68000000, 0xfc000000, LDD|WR_t|RD_b,		I3	},
-{"ldl",	    "t,A(b)",	0,    (int) M_LDL_AB,	INSN_MACRO,		I3	},
-{"ldr",	    "t,o(b)",	0x6c000000, 0xfc000000, LDD|WR_t|RD_b,		I3	},
-{"ldr",     "t,A(b)",	0,    (int) M_LDR_AB,	INSN_MACRO,		I3	},
-{"ldxc1",   "D,t(b)",	0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b,	I4	},
-{"lh",      "t,o(b)",	0x84000000, 0xfc000000,	LDD|RD_b|WR_t,		I1	},
-{"lh",      "t,A(b)",	0,    (int) M_LH_AB,	INSN_MACRO,		I1	},
-{"lhu",     "t,o(b)",	0x94000000, 0xfc000000,	LDD|RD_b|WR_t,		I1	},
-{"lhu",     "t,A(b)",	0,    (int) M_LHU_AB,	INSN_MACRO,		I1	},
-/* li is at the start of the table.  */
-{"li.d",    "t,F",	0,    (int) M_LI_D,	INSN_MACRO,		I1	},
-{"li.d",    "T,L",	0,    (int) M_LI_DD,	INSN_MACRO,		I1	},
-{"li.s",    "t,f",	0,    (int) M_LI_S,	INSN_MACRO,		I1	},
-{"li.s",    "T,l",	0,    (int) M_LI_SS,	INSN_MACRO,		I1	},
-{"ll",	    "t,o(b)",	0xc0000000, 0xfc000000, LDD|RD_b|WR_t,		I2	},
-{"ll",	    "t,A(b)",	0,    (int) M_LL_AB,	INSN_MACRO,		I2	},
-{"lld",	    "t,o(b)",	0xd0000000, 0xfc000000, LDD|RD_b|WR_t,		I3	},
-{"lld",     "t,A(b)",	0,    (int) M_LLD_AB,	INSN_MACRO,		I3	},
-{"lui",     "t,u",	0x3c000000, 0xffe00000,	WR_t,			I1	},
-{"luxc1",   "D,t(b)",	0x4c000005, 0xfc00f83f, LDD|WR_D|RD_t|RD_b,	I5|N55	},
-{"lw",      "t,o(b)",	0x8c000000, 0xfc000000,	LDD|RD_b|WR_t,		I1	},
-{"lw",      "t,A(b)",	0,    (int) M_LW_AB,	INSN_MACRO,		I1	},
-{"lwc0",    "E,o(b)",	0xc0000000, 0xfc000000,	CLD|RD_b|WR_CC,		I1	},
-{"lwc0",    "E,A(b)",	0,    (int) M_LWC0_AB,	INSN_MACRO,		I1	},
-{"lwc1",    "T,o(b)",	0xc4000000, 0xfc000000,	CLD|RD_b|WR_T|FP_S,	I1	},
-{"lwc1",    "E,o(b)",	0xc4000000, 0xfc000000,	CLD|RD_b|WR_T|FP_S,	I1	},
-{"lwc1",    "T,A(b)",	0,    (int) M_LWC1_AB,	INSN_MACRO,		I1	},
-{"lwc1",    "E,A(b)",	0,    (int) M_LWC1_AB,	INSN_MACRO,		I1	},
-{"l.s",     "T,o(b)",	0xc4000000, 0xfc000000,	CLD|RD_b|WR_T|FP_S,	I1	}, /* lwc1 */
-{"l.s",     "T,A(b)",	0,    (int) M_LWC1_AB,	INSN_MACRO,		I1	},
-{"lwc2",    "E,o(b)",	0xc8000000, 0xfc000000,	CLD|RD_b|WR_CC,		I1	},
-{"lwc2",    "E,A(b)",	0,    (int) M_LWC2_AB,	INSN_MACRO,		I1	},
-{"lwc3",    "E,o(b)",	0xcc000000, 0xfc000000,	CLD|RD_b|WR_CC,		I1	},
-{"lwc3",    "E,A(b)",	0,    (int) M_LWC3_AB,	INSN_MACRO,		I1	},
-{"lwl",     "t,o(b)",	0x88000000, 0xfc000000,	LDD|RD_b|WR_t,		I1	},
-{"lwl",     "t,A(b)",	0,    (int) M_LWL_AB,	INSN_MACRO,		I1	},
-{"lcache",  "t,o(b)",	0x88000000, 0xfc000000,	LDD|RD_b|WR_t,		I2	}, /* same */
-{"lcache",  "t,A(b)",	0,    (int) M_LWL_AB,	INSN_MACRO,		I2	}, /* as lwl */
-{"lwr",     "t,o(b)",	0x98000000, 0xfc000000,	LDD|RD_b|WR_t,		I1	},
-{"lwr",     "t,A(b)",	0,    (int) M_LWR_AB,	INSN_MACRO,		I1	},
-{"flush",   "t,o(b)",	0x98000000, 0xfc000000,	LDD|RD_b|WR_t,		I2	}, /* same */
-{"flush",   "t,A(b)",	0,    (int) M_LWR_AB,	INSN_MACRO,		I2	}, /* as lwr */
-{"lwu",     "t,o(b)",	0x9c000000, 0xfc000000,	LDD|RD_b|WR_t,		I3	},
-{"lwu",     "t,A(b)",	0,    (int) M_LWU_AB,	INSN_MACRO,		I3	},
-{"lwxc1",   "D,t(b)",	0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b,	I4	},
-{"macc",    "d,s,t",	0x00000028, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N412    },
-{"macc",    "d,s,t",	0x00000158, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,	N5      },
-{"maccs",   "d,s,t",	0x00000428, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d, N412    },
-{"macchi",  "d,s,t",	0x00000228, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N412    },
-{"macchi",  "d,s,t",	0x00000358, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5      },
-{"macchis", "d,s,t",	0x00000628, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d, N412    },
-{"macchiu", "d,s,t",	0x00000268, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d, N412    },
-{"macchiu", "d,s,t",	0x00000359, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,	N5      },
-{"macchius","d,s,t",	0x00000668, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d, N412    },
-{"maccu",   "d,s,t",	0x00000068, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d, N412    },
-{"maccu",   "d,s,t",	0x00000159, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,	N5      },
-{"maccus",  "d,s,t",	0x00000468, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d, N412    },
-{"mad",     "s,t",      0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     P3      },
-{"madu",    "s,t",      0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     P3      },
-{"madd.d",  "D,R,S,T",	0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D,    I4	},
-{"madd.s",  "D,R,S,T",	0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S,    I4	},
-{"madd.ps", "D,R,S,T",	0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D,    I5	},
-{"madd",    "s,t",      0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO,           L1 },
-{"madd",    "s,t",      0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO,          I32|N55},
-{"madd",    "s,t",      0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M,      G1 },
-{"madd",    "d,s,t",    0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
-{"maddu",   "s,t",      0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO,           L1 },
-{"maddu",   "s,t",      0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO,          I32|N55},
-{"maddu",   "s,t",      0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M,      G1	},
-{"maddu",   "d,s,t",    0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1	},
-{"madd16",  "s,t",      0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO,	N411    },
-{"max.ob",  "X,Y,Q",	0x78000007, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"max.ob",  "D,S,T",	0x4ac00007, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"max.ob",  "D,S,T[e]",	0x48000007, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"max.ob",  "D,S,k",	0x4bc00007, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"max.qh",  "X,Y,Q",	0x78200007, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"mfpc",    "t,P",	0x4000c801, 0xffe0ffc1,	LCD|WR_t|RD_C0,		M1|N5	},
-{"mfps",    "t,P",	0x4000c800, 0xffe0ffc1,	LCD|WR_t|RD_C0,		M1|N5	},
-{"mfc0",    "t,G",	0x40000000, 0xffe007ff,	LCD|WR_t|RD_C0,		I1	},
-{"mfc0",    "t,+D",     0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, 	I32     },
-{"mfc0",    "t,G,H",    0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, 	I32     },
-{"mfc1",    "t,S",	0x44000000, 0xffe007ff,	LCD|WR_t|RD_S|FP_S,	I1	},
-{"mfc1",    "t,G",	0x44000000, 0xffe007ff,	LCD|WR_t|RD_S|FP_S,	I1	},
-{"mfhc1",   "t,S",	0x44600000, 0xffe007ff,	LCD|WR_t|RD_S|FP_S,	I33	},
-{"mfhc1",   "t,G",	0x44600000, 0xffe007ff,	LCD|WR_t|RD_S|FP_S,	I33	},
-{"mfc2",    "t,G",	0x48000000, 0xffe007ff,	LCD|WR_t|RD_C2,		I1	},
-{"mfc2",    "t,G,H",    0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, 	I32     },
-{"mfhc2",   "t,i",	0x48600000, 0xffe00000,	LCD|WR_t|RD_C2,		I33	},
-{"mfc3",    "t,G",	0x4c000000, 0xffe007ff,	LCD|WR_t|RD_C3,		I1	},
-{"mfc3",    "t,G,H",    0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, 	I32     },
-{"mfdr",    "t,G",	0x7000003d, 0xffe007ff,	LCD|WR_t|RD_C0,		N5      },
-{"mfhi",    "d",	0x00000010, 0xffff07ff,	WR_d|RD_HI,		I1	},
-{"mflo",    "d",	0x00000012, 0xffff07ff,	WR_d|RD_LO,		I1	},
-{"min.ob",  "X,Y,Q",	0x78000006, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"min.ob",  "D,S,T",	0x4ac00006, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"min.ob",  "D,S,T[e]",	0x48000006, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"min.ob",  "D,S,k",	0x4bc00006, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"min.qh",  "X,Y,Q",	0x78200006, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"mov.d",   "D,S",	0x46200006, 0xffff003f,	WR_D|RD_S|FP_D,		I1	},
-{"mov.s",   "D,S",	0x46000006, 0xffff003f,	WR_D|RD_S|FP_S,		I1	},
-{"mov.ps",  "D,S",	0x46c00006, 0xffff003f,	WR_D|RD_S|FP_D,		I5	},
-{"movf",    "d,s,N",    0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4|I32},
-{"movf.d",  "D,S,N",    0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   I4|I32	},
-{"movf.l",  "D,S,N",	0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,	MX|SB1	},
-{"movf.l",  "X,Y,N",	0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,	MX|SB1	},
-{"movf.s",  "D,S,N",    0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S,   I4|I32	},
-{"movf.ps", "D,S,N",	0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,	I5	},
-{"movn",    "d,v,t",    0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, 	I4|I32	},
-{"ffc",     "d,v",	0x0000000b, 0xfc1f07ff,	WR_d|RD_s,		L1	},
-{"movn.d",  "D,S,t",    0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I4|I32	},
-{"movn.l",  "D,S,t",    0x46a00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    MX|SB1	},
-{"movn.l",  "X,Y,t",    0x46a00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    MX|SB1	},
-{"movn.s",  "D,S,t",    0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S,    I4|I32	},
-{"movn.ps", "D,S,t",    0x46c00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I5	},
-{"movt",    "d,s,N",    0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC,        I4|I32	},
-{"movt.d",  "D,S,N",    0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   I4|I32	},
-{"movt.l",  "D,S,N",    0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   MX|SB1	},
-{"movt.l",  "X,Y,N",    0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   MX|SB1	},
-{"movt.s",  "D,S,N",    0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S,   I4|I32	},
-{"movt.ps", "D,S,N",	0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,	I5	},
-{"movz",    "d,v,t",    0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, 	I4|I32	},
-{"ffs",     "d,v",	0x0000000a, 0xfc1f07ff,	WR_d|RD_s,		L1	},
-{"movz.d",  "D,S,t",    0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I4|I32	},
-{"movz.l",  "D,S,t",    0x46a00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    MX|SB1	},
-{"movz.l",  "X,Y,t",    0x46a00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    MX|SB1	},
-{"movz.s",  "D,S,t",    0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S,    I4|I32	},
-{"movz.ps", "D,S,t",    0x46c00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I5	},
-{"msac",    "d,s,t",	0x000001d8, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"msacu",   "d,s,t",	0x000001d9, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"msachi",  "d,s,t",	0x000003d8, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"msachiu", "d,s,t",	0x000003d9, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-/* move is at the top of the table.  */
-{"msgn.qh", "X,Y,Q",	0x78200000, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"msub.d",  "D,R,S,T",	0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4	},
-{"msub.s",  "D,R,S,T",	0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4	},
-{"msub.ps", "D,R,S,T",	0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5	},
-{"msub",    "s,t",      0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO,	L1    	},
-{"msub",    "s,t",      0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     I32|N55 },
-{"msubu",   "s,t",      0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO,	L1	},
-{"msubu",   "s,t",      0x70000005, 0xfc00ffff, RD_s|RD_t|MOD_HILO,     I32|N55	},
-{"mtpc",    "t,P",	0x4080c801, 0xffe0ffc1,	COD|RD_t|WR_C0,		M1|N5	},
-{"mtps",    "t,P",	0x4080c800, 0xffe0ffc1,	COD|RD_t|WR_C0,		M1|N5	},
-{"mtc0",    "t,G",	0x40800000, 0xffe007ff,	COD|RD_t|WR_C0|WR_CC,	I1	},
-{"mtc0",    "t,+D",     0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC,   I32     },
-{"mtc0",    "t,G,H",    0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC,   I32     },
-{"mtc1",    "t,S",	0x44800000, 0xffe007ff,	COD|RD_t|WR_S|FP_S,	I1	},
-{"mtc1",    "t,G",	0x44800000, 0xffe007ff,	COD|RD_t|WR_S|FP_S,	I1	},
-{"mthc1",   "t,S",	0x44e00000, 0xffe007ff,	COD|RD_t|WR_S|FP_S,	I33	},
-{"mthc1",   "t,G",	0x44e00000, 0xffe007ff,	COD|RD_t|WR_S|FP_S,	I33	},
-{"mtc2",    "t,G",	0x48800000, 0xffe007ff,	COD|RD_t|WR_C2|WR_CC,	I1	},
-{"mtc2",    "t,G,H",    0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC,   I32     },
-{"mthc2",   "t,i",	0x48e00000, 0xffe00000,	COD|RD_t|WR_C2|WR_CC,	I33	},
-{"mtc3",    "t,G",	0x4c800000, 0xffe007ff,	COD|RD_t|WR_C3|WR_CC,	I1	},
-{"mtc3",    "t,G,H",    0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC,   I32     },
-{"mtdr",    "t,G",	0x7080003d, 0xffe007ff,	COD|RD_t|WR_C0,		N5	},
-{"mthi",    "s",	0x00000011, 0xfc1fffff,	RD_s|WR_HI,		I1	},
-{"mtlo",    "s",	0x00000013, 0xfc1fffff,	RD_s|WR_LO,		I1	},
-{"mul.d",   "D,V,T",	0x46200002, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I1	},
-{"mul.s",   "D,V,T",	0x46000002, 0xffe0003f,	WR_D|RD_S|RD_T|FP_S,	I1	},
-{"mul.ob",  "X,Y,Q",	0x78000030, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"mul.ob",  "D,S,T",	0x4ac00030, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"mul.ob",  "D,S,T[e]",	0x48000030, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"mul.ob",  "D,S,k",	0x4bc00030, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"mul.ps",  "D,V,T",	0x46c00002, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-{"mul.qh",  "X,Y,Q",	0x78200030, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"mul",     "d,v,t",    0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, I32|P3|N55},
-{"mul",     "d,s,t",	0x00000058, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N54	},
-{"mul",     "d,v,t",	0,    (int) M_MUL,	INSN_MACRO,		I1	},
-{"mul",     "d,v,I",	0,    (int) M_MUL_I,	INSN_MACRO,		I1	},
-{"mula.ob", "Y,Q",	0x78000033, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"mula.ob", "S,T",	0x4ac00033, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mula.ob", "S,T[e]",	0x48000033, 0xfe2007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mula.ob", "S,k",	0x4bc00033, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mula.qh", "Y,Q",	0x78200033, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"mulhi",   "d,s,t",	0x00000258, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"mulhiu",  "d,s,t",	0x00000259, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"mull.ob", "Y,Q",	0x78000433, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D, MX|SB1	},
-{"mull.ob", "S,T",	0x4ac00433, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mull.ob", "S,T[e]",	0x48000433, 0xfe2007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mull.ob", "S,k",	0x4bc00433, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mull.qh", "Y,Q",	0x78200433, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"mulo",    "d,v,t",	0,    (int) M_MULO,	INSN_MACRO,		I1	},
-{"mulo",    "d,v,I",	0,    (int) M_MULO_I,	INSN_MACRO,		I1	},
-{"mulou",   "d,v,t",	0,    (int) M_MULOU,	INSN_MACRO,		I1	},
-{"mulou",   "d,v,I",	0,    (int) M_MULOU_I,	INSN_MACRO,		I1	},
-{"mulr.ps", "D,S,T",	0x46c0001a, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	M3D	},
-{"muls",    "d,s,t",	0x000000d8, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"mulsu",   "d,s,t",	0x000000d9, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"mulshi",  "d,s,t",	0x000002d8, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"mulshiu", "d,s,t",	0x000002d9, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"muls.ob", "Y,Q",	0x78000032, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"muls.ob", "S,T",	0x4ac00032, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"muls.ob", "S,T[e]",	0x48000032, 0xfe2007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"muls.ob", "S,k",	0x4bc00032, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"muls.qh", "Y,Q",	0x78200032, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"mulsl.ob", "Y,Q",	0x78000432, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"mulsl.ob", "S,T",	0x4ac00432, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mulsl.ob", "S,T[e]",	0x48000432, 0xfe2007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mulsl.ob", "S,k",	0x4bc00432, 0xffe007ff,	WR_CC|RD_S|RD_T,	N54	},
-{"mulsl.qh", "Y,Q",	0x78200432, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"mult",    "s,t",      0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1	},
-{"mult",    "d,s,t",    0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1	},
-{"multu",   "s,t",      0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1	},
-{"multu",   "d,s,t",    0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1	},
-{"mulu",    "d,s,t",	0x00000059, 0xfc0007ff,	RD_s|RD_t|WR_HILO|WR_d,	N5	},
-{"neg",     "d,w",	0x00000022, 0xffe007ff,	WR_d|RD_t,		I1	}, /* sub 0 */
-{"negu",    "d,w",	0x00000023, 0xffe007ff,	WR_d|RD_t,		I1	}, /* subu 0 */
-{"neg.d",   "D,V",	0x46200007, 0xffff003f,	WR_D|RD_S|FP_D,		I1	},
-{"neg.s",   "D,V",	0x46000007, 0xffff003f,	WR_D|RD_S|FP_S,		I1	},
-{"neg.ps",  "D,V",	0x46c00007, 0xffff003f,	WR_D|RD_S|FP_D,		I5	},
-{"nmadd.d", "D,R,S,T",	0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4	},
-{"nmadd.s", "D,R,S,T",	0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4	},
-{"nmadd.ps","D,R,S,T",	0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5	},
-{"nmsub.d", "D,R,S,T",	0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4	},
-{"nmsub.s", "D,R,S,T",	0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4	},
-{"nmsub.ps","D,R,S,T",	0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5	},
-/* nop is at the start of the table.  */
-{"nor",     "d,v,t",	0x00000027, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"nor",     "t,r,I",	0,    (int) M_NOR_I,	INSN_MACRO,		I1	},
-{"nor.ob",  "X,Y,Q",	0x7800000f, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"nor.ob",  "D,S,T",	0x4ac0000f, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"nor.ob",  "D,S,T[e]",	0x4800000f, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"nor.ob",  "D,S,k",	0x4bc0000f, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"nor.qh",  "X,Y,Q",	0x7820000f, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"not",     "d,v",	0x00000027, 0xfc1f07ff,	WR_d|RD_s|RD_t,		I1	},/*nor d,s,0*/
-{"or",      "d,v,t",	0x00000025, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"or",      "t,r,I",	0,    (int) M_OR_I,	INSN_MACRO,		I1	},
-{"or.ob",   "X,Y,Q",	0x7800000e, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"or.ob",   "D,S,T",	0x4ac0000e, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"or.ob",   "D,S,T[e]",	0x4800000e, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"or.ob",   "D,S,k",	0x4bc0000e, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"or.qh",   "X,Y,Q",	0x7820000e, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"ori",     "t,r,i",	0x34000000, 0xfc000000,	WR_t|RD_s,		I1	},
-{"pabsdiff.ob", "X,Y,Q",0x78000009, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	SB1	},
-{"pabsdiffc.ob", "Y,Q",	0x78000035, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	SB1	},
-{"pavg.ob", "X,Y,Q",	0x78000008, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	SB1	},
-{"pickf.ob", "X,Y,Q",	0x78000002, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"pickf.ob", "D,S,T",	0x4ac00002, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"pickf.ob", "D,S,T[e]",0x48000002, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"pickf.ob", "D,S,k",	0x4bc00002, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"pickf.qh", "X,Y,Q",	0x78200002, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"pickt.ob", "X,Y,Q",	0x78000003, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"pickt.ob", "D,S,T",	0x4ac00003, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"pickt.ob", "D,S,T[e]",0x48000003, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"pickt.ob", "D,S,k",	0x4bc00003, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"pickt.qh", "X,Y,Q",	0x78200003, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"pll.ps",  "D,V,T",	0x46c0002c, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-{"plu.ps",  "D,V,T",	0x46c0002d, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-  /* pref and prefx are at the start of the table.  */
-{"pul.ps",  "D,V,T",	0x46c0002e, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-{"puu.ps",  "D,V,T",	0x46c0002f, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-{"rach.ob", "X",	0x7a00003f, 0xfffff83f,	WR_D|RD_MACC|FP_D,	MX|SB1	},
-{"rach.ob", "D",	0x4a00003f, 0xfffff83f,	WR_D,			N54	},
-{"rach.qh", "X",	0x7a20003f, 0xfffff83f,	WR_D|RD_MACC|FP_D,	MX	},
-{"racl.ob", "X",	0x7800003f, 0xfffff83f,	WR_D|RD_MACC|FP_D,	MX|SB1	},
-{"racl.ob", "D",	0x4800003f, 0xfffff83f,	WR_D,			N54	},
-{"racl.qh", "X",	0x7820003f, 0xfffff83f,	WR_D|RD_MACC|FP_D,	MX	},
-{"racm.ob", "X",	0x7900003f, 0xfffff83f,	WR_D|RD_MACC|FP_D,	MX|SB1	},
-{"racm.ob", "D",	0x4900003f, 0xfffff83f,	WR_D,			N54	},
-{"racm.qh", "X",	0x7920003f, 0xfffff83f,	WR_D|RD_MACC|FP_D,	MX	},
-{"recip.d", "D,S",	0x46200015, 0xffff003f, WR_D|RD_S|FP_D,		I4	},
-{"recip.ps","D,S",	0x46c00015, 0xffff003f, WR_D|RD_S|FP_D,		SB1	},
-{"recip.s", "D,S",	0x46000015, 0xffff003f, WR_D|RD_S|FP_S,		I4	},
-{"recip1.d",  "D,S",	0x4620001d, 0xffff003f,	WR_D|RD_S|FP_D,		M3D	},
-{"recip1.ps", "D,S",	0x46c0001d, 0xffff003f,	WR_D|RD_S|FP_S,		M3D	},
-{"recip1.s",  "D,S",	0x4600001d, 0xffff003f,	WR_D|RD_S|FP_S,		M3D	},
-{"recip2.d",  "D,S,T",	0x4620001c, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	M3D	},
-{"recip2.ps", "D,S,T",	0x46c0001c, 0xffe0003f,	WR_D|RD_S|RD_T|FP_S,	M3D	},
-{"recip2.s",  "D,S,T",	0x4600001c, 0xffe0003f,	WR_D|RD_S|RD_T|FP_S,	M3D	},
-{"rem",     "z,s,t",    0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I1	},
-{"rem",     "d,v,t",	0,    (int) M_REM_3,	INSN_MACRO,		I1	},
-{"rem",     "d,v,I",	0,    (int) M_REM_3I,	INSN_MACRO,		I1	},
-{"remu",    "z,s,t",    0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO,      I1	},
-{"remu",    "d,v,t",	0,    (int) M_REMU_3,	INSN_MACRO,		I1	},
-{"remu",    "d,v,I",	0,    (int) M_REMU_3I,	INSN_MACRO,		I1	},
-{"rdhwr",   "t,K",	0x7c00003b, 0xffe007ff, WR_t,			I33	},
-{"rdpgpr",  "d,w",	0x41400000, 0xffe007ff, WR_d,			I33	},
-{"rfe",     "",		0x42000010, 0xffffffff,	0,			I1|T3	},
-{"rnas.qh", "X,Q",	0x78200025, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX	},
-{"rnau.ob", "X,Q",	0x78000021, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX|SB1	},
-{"rnau.qh", "X,Q",	0x78200021, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX	},
-{"rnes.qh", "X,Q",	0x78200026, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX	},
-{"rneu.ob", "X,Q",	0x78000022, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX|SB1	},
-{"rneu.qh", "X,Q",	0x78200022, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX	},
-{"rol",     "d,v,t",	0,    (int) M_ROL,	INSN_MACRO,		I1	},
-{"rol",     "d,v,I",	0,    (int) M_ROL_I,	INSN_MACRO,		I1	},
-{"ror",     "d,v,t",	0,    (int) M_ROR,	INSN_MACRO,		I1	},
-{"ror",     "d,v,I",	0,    (int) M_ROR_I,	INSN_MACRO,		I1	},
-{"ror",	    "d,w,<",	0x00200002, 0xffe0003f,	WR_d|RD_t,		N5|I33	},
-{"rorv",    "d,t,s",	0x00000046, 0xfc0007ff,	RD_t|RD_s|WR_d,		N5|I33	},
-{"rotl",    "d,v,t",	0,    (int) M_ROL,	INSN_MACRO,		I33	},
-{"rotl",    "d,v,I",	0,    (int) M_ROL_I,	INSN_MACRO,		I33	},
-{"rotr",    "d,v,t",	0,    (int) M_ROR,	INSN_MACRO,		I33	},
-{"rotr",    "d,v,I",	0,    (int) M_ROR_I,	INSN_MACRO,		I33	},
-{"rotrv",   "d,t,s",	0x00000046, 0xfc0007ff,	RD_t|RD_s|WR_d,		I33	},
-{"round.l.d", "D,S",	0x46200008, 0xffff003f, WR_D|RD_S|FP_D,		I3	},
-{"round.l.s", "D,S",	0x46000008, 0xffff003f, WR_D|RD_S|FP_S,		I3	},
-{"round.w.d", "D,S",	0x4620000c, 0xffff003f, WR_D|RD_S|FP_D,		I2	},
-{"round.w.s", "D,S",	0x4600000c, 0xffff003f, WR_D|RD_S|FP_S,		I2	},
-{"rsqrt.d", "D,S",	0x46200016, 0xffff003f, WR_D|RD_S|FP_D,		I4	},
-{"rsqrt.ps","D,S",	0x46c00016, 0xffff003f, WR_D|RD_S|FP_D,		SB1	},
-{"rsqrt.s", "D,S",	0x46000016, 0xffff003f, WR_D|RD_S|FP_S,		I4	},
-{"rsqrt1.d",  "D,S",	0x4620001e, 0xffff003f,	WR_D|RD_S|FP_D,		M3D	},
-{"rsqrt1.ps", "D,S",	0x46c0001e, 0xffff003f,	WR_D|RD_S|FP_S,		M3D	},
-{"rsqrt1.s",  "D,S",	0x4600001e, 0xffff003f,	WR_D|RD_S|FP_S,		M3D	},
-{"rsqrt2.d",  "D,S,T",	0x4620001f, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	M3D	},
-{"rsqrt2.ps", "D,S,T",	0x46c0001f, 0xffe0003f,	WR_D|RD_S|RD_T|FP_S,	M3D	},
-{"rsqrt2.s",  "D,S,T",	0x4600001f, 0xffe0003f,	WR_D|RD_S|RD_T|FP_S,	M3D	},
-{"rzs.qh",  "X,Q",	0x78200024, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX	},
-{"rzu.ob",  "X,Q",	0x78000020, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX|SB1	},
-{"rzu.ob",  "D,k",	0x4bc00020, 0xffe0f83f,	WR_D|RD_S|RD_T,		N54	},
-{"rzu.qh",  "X,Q",	0x78200020, 0xfc20f83f,	WR_D|RD_MACC|RD_T|FP_D,	MX	},
-{"sb",      "t,o(b)",	0xa0000000, 0xfc000000,	SM|RD_t|RD_b,		I1	},
-{"sb",      "t,A(b)",	0,    (int) M_SB_AB,	INSN_MACRO,		I1	},
-{"sc",	    "t,o(b)",	0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b,	I2	},
-{"sc",	    "t,A(b)",	0,    (int) M_SC_AB,	INSN_MACRO,		I2	},
-{"scd",	    "t,o(b)",	0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b,	I3	},
-{"scd",	    "t,A(b)",	0,    (int) M_SCD_AB,	INSN_MACRO,		I3	},
-{"sd",	    "t,o(b)",	0xfc000000, 0xfc000000,	SM|RD_t|RD_b,		I3	},
-{"sd",      "t,o(b)",	0,    (int) M_SD_OB,	INSN_MACRO,		I1	},
-{"sd",      "t,A(b)",	0,    (int) M_SD_AB,	INSN_MACRO,		I1	},
-{"sdbbp",   "",		0x0000000e, 0xffffffff,	TRAP,           	G2	},
-{"sdbbp",   "c",	0x0000000e, 0xfc00ffff,	TRAP,			G2	},
-{"sdbbp",   "c,q",	0x0000000e, 0xfc00003f,	TRAP,			G2	},
-{"sdbbp",   "",         0x7000003f, 0xffffffff, TRAP,           	I32     },
-{"sdbbp",   "B",        0x7000003f, 0xfc00003f, TRAP,           	I32     },
-{"sdc1",    "T,o(b)",	0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,	I2	},
-{"sdc1",    "E,o(b)",	0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,	I2	},
-{"sdc1",    "T,A(b)",	0,    (int) M_SDC1_AB,	INSN_MACRO,		I2	},
-{"sdc1",    "E,A(b)",	0,    (int) M_SDC1_AB,	INSN_MACRO,		I2	},
-{"sdc2",    "E,o(b)",	0xf8000000, 0xfc000000, SM|RD_C2|RD_b,		I2	},
-{"sdc2",    "E,A(b)",	0,    (int) M_SDC2_AB,	INSN_MACRO,		I2	},
-{"sdc3",    "E,o(b)",	0xfc000000, 0xfc000000, SM|RD_C3|RD_b,		I2	},
-{"sdc3",    "E,A(b)",	0,    (int) M_SDC3_AB,	INSN_MACRO,		I2	},
-{"s.d",     "T,o(b)",	0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,	I2	},
-{"s.d",     "T,o(b)",	0,    (int) M_S_DOB,	INSN_MACRO,		I1	},
-{"s.d",     "T,A(b)",	0,    (int) M_S_DAB,	INSN_MACRO,		I1	},
-{"sdl",     "t,o(b)",	0xb0000000, 0xfc000000,	SM|RD_t|RD_b,		I3	},
-{"sdl",     "t,A(b)",	0,    (int) M_SDL_AB,	INSN_MACRO,		I3	},
-{"sdr",     "t,o(b)",	0xb4000000, 0xfc000000,	SM|RD_t|RD_b,		I3	},
-{"sdr",     "t,A(b)",	0,    (int) M_SDR_AB,	INSN_MACRO,		I3	},
-{"sdxc1",   "S,t(b)",   0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b,	I4	},
-{"seb",     "d,w",	0x7c000420, 0xffe007ff,	WR_d|RD_t,		I33	},
-{"seh",     "d,w",	0x7c000620, 0xffe007ff,	WR_d|RD_t,		I33	},
-{"selsl",   "d,v,t",	0x00000005, 0xfc0007ff,	WR_d|RD_s|RD_t,		L1	},
-{"selsr",   "d,v,t",	0x00000001, 0xfc0007ff,	WR_d|RD_s|RD_t,		L1	},
-{"seq",     "d,v,t",	0,    (int) M_SEQ,	INSN_MACRO,		I1	},
-{"seq",     "d,v,I",	0,    (int) M_SEQ_I,	INSN_MACRO,		I1	},
-{"sge",     "d,v,t",	0,    (int) M_SGE,	INSN_MACRO,		I1	},
-{"sge",     "d,v,I",	0,    (int) M_SGE_I,	INSN_MACRO,		I1	},
-{"sgeu",    "d,v,t",	0,    (int) M_SGEU,	INSN_MACRO,		I1	},
-{"sgeu",    "d,v,I",	0,    (int) M_SGEU_I,	INSN_MACRO,		I1	},
-{"sgt",     "d,v,t",	0,    (int) M_SGT,	INSN_MACRO,		I1	},
-{"sgt",     "d,v,I",	0,    (int) M_SGT_I,	INSN_MACRO,		I1	},
-{"sgtu",    "d,v,t",	0,    (int) M_SGTU,	INSN_MACRO,		I1	},
-{"sgtu",    "d,v,I",	0,    (int) M_SGTU_I,	INSN_MACRO,		I1	},
-{"sh",      "t,o(b)",	0xa4000000, 0xfc000000,	SM|RD_t|RD_b,		I1	},
-{"sh",      "t,A(b)",	0,    (int) M_SH_AB,	INSN_MACRO,		I1	},
-{"shfl.bfla.qh", "X,Y,Z", 0x7a20001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX	},
-{"shfl.mixh.ob", "X,Y,Z", 0x7980001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"shfl.mixh.ob", "D,S,T", 0x4980001f, 0xffe0003f, WR_D|RD_S|RD_T, 	N54	},
-{"shfl.mixh.qh", "X,Y,Z", 0x7820001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX	},
-{"shfl.mixl.ob", "X,Y,Z", 0x79c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"shfl.mixl.ob", "D,S,T", 0x49c0001f, 0xffe0003f, WR_D|RD_S|RD_T, 	N54	},
-{"shfl.mixl.qh", "X,Y,Z", 0x78a0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX	},
-{"shfl.pach.ob", "X,Y,Z", 0x7900001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"shfl.pach.ob", "D,S,T", 0x4900001f, 0xffe0003f, WR_D|RD_S|RD_T, 	N54	},
-{"shfl.pach.qh", "X,Y,Z", 0x7920001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX	},
-{"shfl.pacl.ob", "D,S,T", 0x4940001f, 0xffe0003f, WR_D|RD_S|RD_T, 	N54	},
-{"shfl.repa.qh", "X,Y,Z", 0x7b20001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX	},
-{"shfl.repb.qh", "X,Y,Z", 0x7ba0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX	},
-{"shfl.upsl.ob", "X,Y,Z", 0x78c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"sle",     "d,v,t",	0,    (int) M_SLE,	INSN_MACRO,		I1	},
-{"sle",     "d,v,I",	0,    (int) M_SLE_I,	INSN_MACRO,		I1	},
-{"sleu",    "d,v,t",	0,    (int) M_SLEU,	INSN_MACRO,		I1	},
-{"sleu",    "d,v,I",	0,    (int) M_SLEU_I,	INSN_MACRO,		I1	},
-{"sllv",    "d,t,s",	0x00000004, 0xfc0007ff,	WR_d|RD_t|RD_s,		I1	},
-{"sll",     "d,w,s",	0x00000004, 0xfc0007ff,	WR_d|RD_t|RD_s,		I1	}, /* sllv */
-{"sll",     "d,w,<",	0x00000000, 0xffe0003f,	WR_d|RD_t,		I1	},
-{"sll.ob",  "X,Y,Q",	0x78000010, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"sll.ob",  "D,S,T[e]",	0x48000010, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"sll.ob",  "D,S,k",	0x4bc00010, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"sll.qh",  "X,Y,Q",	0x78200010, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"slt",     "d,v,t",	0x0000002a, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"slt",     "d,v,I",	0,    (int) M_SLT_I,	INSN_MACRO,		I1	},
-{"slti",    "t,r,j",	0x28000000, 0xfc000000,	WR_t|RD_s,		I1	},
-{"sltiu",   "t,r,j",	0x2c000000, 0xfc000000,	WR_t|RD_s,		I1	},
-{"sltu",    "d,v,t",	0x0000002b, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"sltu",    "d,v,I",	0,    (int) M_SLTU_I,	INSN_MACRO,		I1	},
-{"sne",     "d,v,t",	0,    (int) M_SNE,	INSN_MACRO,		I1	},
-{"sne",     "d,v,I",	0,    (int) M_SNE_I,	INSN_MACRO,		I1	},
-{"sqrt.d",  "D,S",	0x46200004, 0xffff003f, WR_D|RD_S|FP_D,		I2	},
-{"sqrt.s",  "D,S",	0x46000004, 0xffff003f, WR_D|RD_S|FP_S,		I2	},
-{"sqrt.ps", "D,S",	0x46c00004, 0xffff003f, WR_D|RD_S|FP_D,		SB1	},
-{"srav",    "d,t,s",	0x00000007, 0xfc0007ff,	WR_d|RD_t|RD_s,		I1	},
-{"sra",     "d,w,s",	0x00000007, 0xfc0007ff,	WR_d|RD_t|RD_s,		I1	}, /* srav */
-{"sra",     "d,w,<",	0x00000003, 0xffe0003f,	WR_d|RD_t,		I1	},
-{"sra.qh",  "X,Y,Q",	0x78200013, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"srlv",    "d,t,s",	0x00000006, 0xfc0007ff,	WR_d|RD_t|RD_s,		I1	},
-{"srl",     "d,w,s",	0x00000006, 0xfc0007ff,	WR_d|RD_t|RD_s,		I1	}, /* srlv */
-{"srl",     "d,w,<",	0x00000002, 0xffe0003f,	WR_d|RD_t,		I1	},
-{"srl.ob",  "X,Y,Q",	0x78000012, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"srl.ob",  "D,S,T[e]",	0x48000012, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"srl.ob",  "D,S,k",	0x4bc00012, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"srl.qh",  "X,Y,Q",	0x78200012, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-/* ssnop is at the start of the table.  */
-{"standby", "",         0x42000021, 0xffffffff,	0,			V1	},
-{"sub",     "d,v,t",	0x00000022, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"sub",     "d,v,I",	0,    (int) M_SUB_I,	INSN_MACRO,		I1	},
-{"sub.d",   "D,V,T",	0x46200001, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I1	},
-{"sub.s",   "D,V,T",	0x46000001, 0xffe0003f,	WR_D|RD_S|RD_T|FP_S,	I1	},
-{"sub.ob",  "X,Y,Q",	0x7800000a, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"sub.ob",  "D,S,T",	0x4ac0000a, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"sub.ob",  "D,S,T[e]",	0x4800000a, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"sub.ob",  "D,S,k",	0x4bc0000a, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"sub.ps",  "D,V,T",	0x46c00001, 0xffe0003f,	WR_D|RD_S|RD_T|FP_D,	I5	},
-{"sub.qh",  "X,Y,Q",	0x7820000a, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"suba.ob", "Y,Q",	0x78000036, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"suba.qh", "Y,Q",	0x78200036, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"subl.ob", "Y,Q",	0x78000436, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"subl.qh", "Y,Q",	0x78200436, 0xfc2007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"subu",    "d,v,t",	0x00000023, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"subu",    "d,v,I",	0,    (int) M_SUBU_I,	INSN_MACRO,		I1	},
-{"suspend", "",         0x42000022, 0xffffffff,	0,			V1	},
-{"suxc1",   "S,t(b)",   0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b,	I5|N55	},
-{"sw",      "t,o(b)",	0xac000000, 0xfc000000,	SM|RD_t|RD_b,		I1	},
-{"sw",      "t,A(b)",	0,    (int) M_SW_AB,	INSN_MACRO,		I1	},
-{"swc0",    "E,o(b)",	0xe0000000, 0xfc000000,	SM|RD_C0|RD_b,		I1	},
-{"swc0",    "E,A(b)",	0,    (int) M_SWC0_AB,	INSN_MACRO,		I1	},
-{"swc1",    "T,o(b)",	0xe4000000, 0xfc000000,	SM|RD_T|RD_b|FP_S,	I1	},
-{"swc1",    "E,o(b)",	0xe4000000, 0xfc000000,	SM|RD_T|RD_b|FP_S,	I1	},
-{"swc1",    "T,A(b)",	0,    (int) M_SWC1_AB,	INSN_MACRO,		I1	},
-{"swc1",    "E,A(b)",	0,    (int) M_SWC1_AB,	INSN_MACRO,		I1	},
-{"s.s",     "T,o(b)",	0xe4000000, 0xfc000000,	SM|RD_T|RD_b|FP_S,	I1	}, /* swc1 */
-{"s.s",     "T,A(b)",	0,    (int) M_SWC1_AB,	INSN_MACRO,		I1	},
-{"swc2",    "E,o(b)",	0xe8000000, 0xfc000000,	SM|RD_C2|RD_b,		I1	},
-{"swc2",    "E,A(b)",	0,    (int) M_SWC2_AB,	INSN_MACRO,		I1	},
-{"swc3",    "E,o(b)",	0xec000000, 0xfc000000,	SM|RD_C3|RD_b,		I1	},
-{"swc3",    "E,A(b)",	0,    (int) M_SWC3_AB,	INSN_MACRO,		I1	},
-{"swl",     "t,o(b)",	0xa8000000, 0xfc000000,	SM|RD_t|RD_b,		I1	},
-{"swl",     "t,A(b)",	0,    (int) M_SWL_AB,	INSN_MACRO,		I1	},
-{"scache",  "t,o(b)",	0xa8000000, 0xfc000000,	RD_t|RD_b,		I2	}, /* same */
-{"scache",  "t,A(b)",	0,    (int) M_SWL_AB,	INSN_MACRO,		I2	}, /* as swl */
-{"swr",     "t,o(b)",	0xb8000000, 0xfc000000,	SM|RD_t|RD_b,		I1	},
-{"swr",     "t,A(b)",	0,    (int) M_SWR_AB,	INSN_MACRO,		I1	},
-{"invalidate", "t,o(b)",0xb8000000, 0xfc000000,	RD_t|RD_b,		I2	}, /* same */
-{"invalidate", "t,A(b)",0,    (int) M_SWR_AB,	INSN_MACRO,		I2	}, /* as swr */
-{"swxc1",   "S,t(b)",   0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b,	I4	},
-{"sync",    "",		0x0000000f, 0xffffffff,	INSN_SYNC,		I2|G1	},
-{"sync.p",  "",		0x0000040f, 0xffffffff,	INSN_SYNC,		I2	},
-{"sync.l",  "",		0x0000000f, 0xffffffff,	INSN_SYNC,		I2	},
-{"synci",   "o(b)",	0x041f0000, 0xfc1f0000,	SM|RD_b,		I33	},
-{"syscall", "",		0x0000000c, 0xffffffff,	TRAP,			I1	},
-{"syscall", "B",	0x0000000c, 0xfc00003f,	TRAP,			I1	},
-{"teqi",    "s,j",	0x040c0000, 0xfc1f0000, RD_s|TRAP,		I2	},
-{"teq",	    "s,t",	0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP,		I2	},
-{"teq",	    "s,t,q",	0x00000034, 0xfc00003f, RD_s|RD_t|TRAP,		I2	},
-{"teq",     "s,j",	0x040c0000, 0xfc1f0000, RD_s|TRAP,		I2	}, /* teqi */
-{"teq",     "s,I",	0,    (int) M_TEQ_I,	INSN_MACRO,		I2	},
-{"tgei",    "s,j",	0x04080000, 0xfc1f0000, RD_s|TRAP,		I2	},
-{"tge",	    "s,t",	0x00000030, 0xfc00ffff,	RD_s|RD_t|TRAP,		I2	},
-{"tge",	    "s,t,q",	0x00000030, 0xfc00003f,	RD_s|RD_t|TRAP,		I2	},
-{"tge",     "s,j",	0x04080000, 0xfc1f0000, RD_s|TRAP,		I2	}, /* tgei */
-{"tge",	    "s,I",	0,    (int) M_TGE_I,    INSN_MACRO,		I2	},
-{"tgeiu",   "s,j",	0x04090000, 0xfc1f0000, RD_s|TRAP,		I2	},
-{"tgeu",    "s,t",	0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP,		I2	},
-{"tgeu",    "s,t,q",	0x00000031, 0xfc00003f, RD_s|RD_t|TRAP,		I2	},
-{"tgeu",    "s,j",	0x04090000, 0xfc1f0000, RD_s|TRAP,		I2	}, /* tgeiu */
-{"tgeu",    "s,I",	0,    (int) M_TGEU_I,	INSN_MACRO,		I2	},
-{"tlbp",    "",         0x42000008, 0xffffffff, INSN_TLB,       	I1   	},
-{"tlbr",    "",         0x42000001, 0xffffffff, INSN_TLB,       	I1   	},
-{"tlbwi",   "",         0x42000002, 0xffffffff, INSN_TLB,       	I1   	},
-{"tlbwr",   "",         0x42000006, 0xffffffff, INSN_TLB,       	I1   	},
-{"tlti",    "s,j",	0x040a0000, 0xfc1f0000,	RD_s|TRAP,		I2	},
-{"tlt",     "s,t",	0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP,		I2	},
-{"tlt",     "s,t,q",	0x00000032, 0xfc00003f, RD_s|RD_t|TRAP,		I2	},
-{"tlt",     "s,j",	0x040a0000, 0xfc1f0000,	RD_s|TRAP,		I2	}, /* tlti */
-{"tlt",     "s,I",	0,    (int) M_TLT_I,	INSN_MACRO,		I2	},
-{"tltiu",   "s,j",	0x040b0000, 0xfc1f0000, RD_s|TRAP,		I2	},
-{"tltu",    "s,t",	0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP,		I2	},
-{"tltu",    "s,t,q",	0x00000033, 0xfc00003f, RD_s|RD_t|TRAP,		I2	},
-{"tltu",    "s,j",	0x040b0000, 0xfc1f0000, RD_s|TRAP,		I2	}, /* tltiu */
-{"tltu",    "s,I",	0,    (int) M_TLTU_I,	INSN_MACRO,		I2	},
-{"tnei",    "s,j",	0x040e0000, 0xfc1f0000, RD_s|TRAP,		I2	},
-{"tne",     "s,t",	0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP,		I2	},
-{"tne",     "s,t,q",	0x00000036, 0xfc00003f, RD_s|RD_t|TRAP,		I2	},
-{"tne",     "s,j",	0x040e0000, 0xfc1f0000, RD_s|TRAP,		I2	}, /* tnei */
-{"tne",     "s,I",	0,    (int) M_TNE_I,	INSN_MACRO,		I2	},
-{"trunc.l.d", "D,S",	0x46200009, 0xffff003f, WR_D|RD_S|FP_D,		I3	},
-{"trunc.l.s", "D,S",	0x46000009, 0xffff003f,	WR_D|RD_S|FP_S,		I3	},
-{"trunc.w.d", "D,S",	0x4620000d, 0xffff003f, WR_D|RD_S|FP_D,		I2	},
-{"trunc.w.d", "D,S,x",	0x4620000d, 0xffff003f, WR_D|RD_S|FP_D,		I2	},
-{"trunc.w.d", "D,S,t",	0,    (int) M_TRUNCWD,	INSN_MACRO,		I1	},
-{"trunc.w.s", "D,S",	0x4600000d, 0xffff003f,	WR_D|RD_S|FP_S,		I2	},
-{"trunc.w.s", "D,S,x",	0x4600000d, 0xffff003f,	WR_D|RD_S|FP_S,		I2	},
-{"trunc.w.s", "D,S,t",	0,    (int) M_TRUNCWS,	INSN_MACRO,		I1	},
-{"uld",     "t,o(b)",	0,    (int) M_ULD,	INSN_MACRO,		I3	},
-{"uld",     "t,A(b)",	0,    (int) M_ULD_A,	INSN_MACRO,		I3	},
-{"ulh",     "t,o(b)",	0,    (int) M_ULH,	INSN_MACRO,		I1	},
-{"ulh",     "t,A(b)",	0,    (int) M_ULH_A,	INSN_MACRO,		I1	},
-{"ulhu",    "t,o(b)",	0,    (int) M_ULHU,	INSN_MACRO,		I1	},
-{"ulhu",    "t,A(b)",	0,    (int) M_ULHU_A,	INSN_MACRO,		I1	},
-{"ulw",     "t,o(b)",	0,    (int) M_ULW,	INSN_MACRO,		I1	},
-{"ulw",     "t,A(b)",	0,    (int) M_ULW_A,	INSN_MACRO,		I1	},
-{"usd",     "t,o(b)",	0,    (int) M_USD,	INSN_MACRO,		I3	},
-{"usd",     "t,A(b)",	0,    (int) M_USD_A,	INSN_MACRO,		I3	},
-{"ush",     "t,o(b)",	0,    (int) M_USH,	INSN_MACRO,		I1	},
-{"ush",     "t,A(b)",	0,    (int) M_USH_A,	INSN_MACRO,		I1	},
-{"usw",     "t,o(b)",	0,    (int) M_USW,	INSN_MACRO,		I1	},
-{"usw",     "t,A(b)",	0,    (int) M_USW_A,	INSN_MACRO,		I1	},
-{"wach.ob", "Y",	0x7a00003e, 0xffff07ff,	WR_MACC|RD_S|FP_D,	MX|SB1	},
-{"wach.ob", "S",	0x4a00003e, 0xffff07ff,	RD_S,			N54	},
-{"wach.qh", "Y",	0x7a20003e, 0xffff07ff,	WR_MACC|RD_S|FP_D,	MX	},
-{"wacl.ob", "Y,Z",	0x7800003e, 0xffe007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX|SB1	},
-{"wacl.ob", "S,T",	0x4800003e, 0xffe007ff,	RD_S|RD_T,		N54	},
-{"wacl.qh", "Y,Z",	0x7820003e, 0xffe007ff,	WR_MACC|RD_S|RD_T|FP_D,	MX	},
-{"wait",    "",         0x42000020, 0xffffffff, TRAP,   		I3|I32	},
-{"wait",    "J",        0x42000020, 0xfe00003f, TRAP,   		I32|N55	},
-{"waiti",   "",		0x42000020, 0xffffffff,	TRAP,			L1	},
-{"wb", 	    "o(b)",	0xbc040000, 0xfc1f0000, SM|RD_b,		L1	},
-{"wrpgpr",  "d,w",	0x41c00000, 0xffe007ff, RD_t,			I33	},
-{"wsbh",    "d,w",	0x7c0000a0, 0xffe007ff,	WR_d|RD_t,		I33	},
-{"xor",     "d,v,t",	0x00000026, 0xfc0007ff,	WR_d|RD_s|RD_t,		I1	},
-{"xor",     "t,r,I",	0,    (int) M_XOR_I,	INSN_MACRO,		I1	},
-{"xor.ob",  "X,Y,Q",	0x7800000d, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX|SB1	},
-{"xor.ob",  "D,S,T",	0x4ac0000d, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"xor.ob",  "D,S,T[e]",	0x4800000d, 0xfe20003f,	WR_D|RD_S|RD_T,		N54	},
-{"xor.ob",  "D,S,k",	0x4bc0000d, 0xffe0003f,	WR_D|RD_S|RD_T,		N54	},
-{"xor.qh",  "X,Y,Q",	0x7820000d, 0xfc20003f,	WR_D|RD_S|RD_T|FP_D,	MX	},
-{"xori",    "t,r,i",	0x38000000, 0xfc000000,	WR_t|RD_s,		I1	},
-
-/* No hazard protection on coprocessor instructions--they shouldn't
-   change the state of the processor and if they do it's up to the
-   user to put in nops as necessary.  These are at the end so that the
-   disassembler recognizes more specific versions first.  */
-{"c0",      "C",	0x42000000, 0xfe000000,	0,			I1	},
-{"c1",      "C",	0x46000000, 0xfe000000,	0,			I1	},
-{"c2",      "C",	0x4a000000, 0xfe000000,	0,			I1	},
-{"c3",      "C",	0x4e000000, 0xfe000000,	0,			I1	},
-{"cop0",     "C",	0,    (int) M_COP0,	INSN_MACRO,		I1	},
-{"cop1",     "C",	0,    (int) M_COP1,	INSN_MACRO,		I1	},
-{"cop2",     "C",	0,    (int) M_COP2,	INSN_MACRO,		I1	},
-{"cop3",     "C",	0,    (int) M_COP3,	INSN_MACRO,		I1	},
-
-  /* Conflicts with the 4650's "mul" instruction.  Nobody's using the
-     4010 any more, so move this insn out of the way.  If the object
-     format gave us more info, we could do this right.  */
-{"addciu",  "t,r,j",	0x70000000, 0xfc000000,	WR_t|RD_s,		L1	},
-};
-
-#define MIPS_NUM_OPCODES \
-	((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
-const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
-
-/* const removed from the following to allow for dynamic extensions to the
- * built-in instruction set. */
-struct mips_opcode *mips_opcodes =
-  (struct mips_opcode *) mips_builtin_opcodes;
-int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
-#undef MIPS_NUM_OPCODES
diff --git a/contrib/disas/mips.h b/contrib/disas/mips.h
deleted file mode 100644
index 476c8e31..00000000
--- a/contrib/disas/mips.h
+++ /dev/null
@@ -1,890 +0,0 @@
-/* mips.h.  Mips opcode list for GDB, the GNU debugger.
-   Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
-   Free Software Foundation, Inc.
-   Contributed by Ralph Campbell and OSF
-   Commented and modified by Ian Lance Taylor, Cygnus Support
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING.  If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
-
-#ifndef _MIPS_H_
-#define _MIPS_H_
-
-/* These are bit masks and shift counts to use to access the various
-   fields of an instruction.  To retrieve the X field of an
-   instruction, use the expression
-	(i >> OP_SH_X) & OP_MASK_X
-   To set the same field (to j), use
-	i = (i &~ (OP_MASK_X << OP_SH_X)) | (j << OP_SH_X)
-
-   Make sure you use fields that are appropriate for the instruction,
-   of course.
-
-   The 'i' format uses OP, RS, RT and IMMEDIATE.
-
-   The 'j' format uses OP and TARGET.
-
-   The 'r' format uses OP, RS, RT, RD, SHAMT and FUNCT.
-
-   The 'b' format uses OP, RS, RT and DELTA.
-
-   The floating point 'i' format uses OP, RS, RT and IMMEDIATE.
-
-   The floating point 'r' format uses OP, FMT, FT, FS, FD and FUNCT.
-
-   A breakpoint instruction uses OP, CODE and SPEC (10 bits of the
-   breakpoint instruction are not defined; Kane says the breakpoint
-   code field in BREAK is 20 bits; yet MIPS assemblers and debuggers
-   only use ten bits).  An optional two-operand form of break/sdbbp
-   allows the lower ten bits to be set too, and MIPS32 and later
-   architectures allow 20 bits to be set with a signal operand
-   (using CODE20).
-
-   The syscall instruction uses CODE20.
-
-   The general coprocessor instructions use COPZ.  */
-
-#define OP_MASK_OP		0x3f
-#define OP_SH_OP		26
-#define OP_MASK_RS		0x1f
-#define OP_SH_RS		21
-#define OP_MASK_FR		0x1f
-#define OP_SH_FR		21
-#define OP_MASK_FMT		0x1f
-#define OP_SH_FMT		21
-#define OP_MASK_BCC		0x7
-#define OP_SH_BCC		18
-#define OP_MASK_CODE		0x3ff
-#define OP_SH_CODE		16
-#define OP_MASK_CODE2		0x3ff
-#define OP_SH_CODE2		6
-#define OP_MASK_RT		0x1f
-#define OP_SH_RT		16
-#define OP_MASK_FT		0x1f
-#define OP_SH_FT		16
-#define OP_MASK_CACHE		0x1f
-#define OP_SH_CACHE		16
-#define OP_MASK_RD		0x1f
-#define OP_SH_RD		11
-#define OP_MASK_FS		0x1f
-#define OP_SH_FS		11
-#define OP_MASK_PREFX		0x1f
-#define OP_SH_PREFX		11
-#define OP_MASK_CCC		0x7
-#define OP_SH_CCC		8
-#define OP_MASK_CODE20		0xfffff /* 20 bit syscall/breakpoint code.  */
-#define OP_SH_CODE20		6
-#define OP_MASK_SHAMT		0x1f
-#define OP_SH_SHAMT		6
-#define OP_MASK_FD		0x1f
-#define OP_SH_FD		6
-#define OP_MASK_TARGET		0x3ffffff
-#define OP_SH_TARGET		0
-#define OP_MASK_COPZ		0x1ffffff
-#define OP_SH_COPZ		0
-#define OP_MASK_IMMEDIATE	0xffff
-#define OP_SH_IMMEDIATE		0
-#define OP_MASK_DELTA		0xffff
-#define OP_SH_DELTA		0
-#define OP_MASK_FUNCT		0x3f
-#define OP_SH_FUNCT		0
-#define OP_MASK_SPEC		0x3f
-#define OP_SH_SPEC		0
-#define OP_SH_LOCC              8       /* FP condition code.  */
-#define OP_SH_HICC              18      /* FP condition code.  */
-#define OP_MASK_CC              0x7
-#define OP_SH_COP1NORM          25      /* Normal COP1 encoding.  */
-#define OP_MASK_COP1NORM        0x1     /* a single bit.  */
-#define OP_SH_COP1SPEC          21      /* COP1 encodings.  */
-#define OP_MASK_COP1SPEC        0xf
-#define OP_MASK_COP1SCLR        0x4
-#define OP_MASK_COP1CMP         0x3
-#define OP_SH_COP1CMP           4
-#define OP_SH_FORMAT            21      /* FP short format field.  */
-#define OP_MASK_FORMAT          0x7
-#define OP_SH_TRUE              16
-#define OP_MASK_TRUE            0x1
-#define OP_SH_GE                17
-#define OP_MASK_GE              0x01
-#define OP_SH_UNSIGNED          16
-#define OP_MASK_UNSIGNED        0x1
-#define OP_SH_HINT              16
-#define OP_MASK_HINT            0x1f
-#define OP_SH_MMI               0       /* Multimedia (parallel) op.  */
-#define OP_MASK_MMI             0x3f
-#define OP_SH_MMISUB            6
-#define OP_MASK_MMISUB          0x1f
-#define OP_MASK_PERFREG		0x1f	/* Performance monitoring.  */
-#define OP_SH_PERFREG		1
-#define OP_SH_SEL		0	/* Coprocessor select field.  */
-#define OP_MASK_SEL		0x7	/* The sel field of mfcZ and mtcZ.  */
-#define OP_SH_CODE19		6       /* 19 bit wait code.  */
-#define OP_MASK_CODE19		0x7ffff
-#define OP_SH_ALN		21
-#define OP_MASK_ALN		0x7
-#define OP_SH_VSEL		21
-#define OP_MASK_VSEL		0x1f
-#define OP_MASK_VECBYTE		0x7	/* Selector field is really 4 bits,
-					   but 0x8-0xf don't select bytes.  */
-#define OP_SH_VECBYTE		22
-#define OP_MASK_VECALIGN	0x7	/* Vector byte-align (alni.ob) op.  */
-#define OP_SH_VECALIGN		21
-#define OP_MASK_INSMSB		0x1f	/* "ins" MSB.  */
-#define OP_SH_INSMSB		11
-#define OP_MASK_EXTMSBD		0x1f	/* "ext" MSBD.  */
-#define OP_SH_EXTMSBD		11
-
-#define	OP_OP_COP0		0x10
-#define	OP_OP_COP1		0x11
-#define	OP_OP_COP2		0x12
-#define	OP_OP_COP3		0x13
-#define	OP_OP_LWC1		0x31
-#define	OP_OP_LWC2		0x32
-#define	OP_OP_LWC3		0x33	/* a.k.a. pref */
-#define	OP_OP_LDC1		0x35
-#define	OP_OP_LDC2		0x36
-#define	OP_OP_LDC3		0x37	/* a.k.a. ld */
-#define	OP_OP_SWC1		0x39
-#define	OP_OP_SWC2		0x3a
-#define	OP_OP_SWC3		0x3b
-#define	OP_OP_SDC1		0x3d
-#define	OP_OP_SDC2		0x3e
-#define	OP_OP_SDC3		0x3f	/* a.k.a. sd */
-
-/* Values in the 'VSEL' field.  */
-#define MDMX_FMTSEL_IMM_QH	0x1d
-#define MDMX_FMTSEL_IMM_OB	0x1e
-#define MDMX_FMTSEL_VEC_QH	0x15
-#define MDMX_FMTSEL_VEC_OB	0x16
-
-/* This structure holds information for a particular instruction.  */
-
-struct mips_opcode
-{
-  /* The name of the instruction.  */
-  const char *name;
-  /* A string describing the arguments for this instruction.  */
-  const char *args;
-  /* The basic opcode for the instruction.  When assembling, this
-     opcode is modified by the arguments to produce the actual opcode
-     that is used.  If pinfo is INSN_MACRO, then this is 0.  */
-  unsigned long match;
-  /* If pinfo is not INSN_MACRO, then this is a bit mask for the
-     relevant portions of the opcode when disassembling.  If the
-     actual opcode anded with the match field equals the opcode field,
-     then we have found the correct instruction.  If pinfo is
-     INSN_MACRO, then this field is the macro identifier.  */
-  unsigned long mask;
-  /* For a macro, this is INSN_MACRO.  Otherwise, it is a collection
-     of bits describing the instruction, notably any relevant hazard
-     information.  */
-  unsigned long pinfo;
-  /* A collection of bits describing the instruction sets of which this
-     instruction or macro is a member. */
-  unsigned long membership;
-};
-
-/* These are the characters which may appear in the args field of an
-   instruction.  They appear in the order in which the fields appear
-   when the instruction is used.  Commas and parentheses in the args
-   string are ignored when assembling, and written into the output
-   when disassembling.
-
-   Each of these characters corresponds to a mask field defined above.
-
-   "<" 5 bit shift amount (OP_*_SHAMT)
-   ">" shift amount between 32 and 63, stored after subtracting 32 (OP_*_SHAMT)
-   "a" 26 bit target address (OP_*_TARGET)
-   "b" 5 bit base register (OP_*_RS)
-   "c" 10 bit breakpoint code (OP_*_CODE)
-   "d" 5 bit destination register specifier (OP_*_RD)
-   "h" 5 bit prefx hint (OP_*_PREFX)
-   "i" 16 bit unsigned immediate (OP_*_IMMEDIATE)
-   "j" 16 bit signed immediate (OP_*_DELTA)
-   "k" 5 bit cache opcode in target register position (OP_*_CACHE)
-       Also used for immediate operands in vr5400 vector insns.
-   "o" 16 bit signed offset (OP_*_DELTA)
-   "p" 16 bit PC relative branch target address (OP_*_DELTA)
-   "q" 10 bit extra breakpoint code (OP_*_CODE2)
-   "r" 5 bit same register used as both source and target (OP_*_RS)
-   "s" 5 bit source register specifier (OP_*_RS)
-   "t" 5 bit target register (OP_*_RT)
-   "u" 16 bit upper 16 bits of address (OP_*_IMMEDIATE)
-   "v" 5 bit same register used as both source and destination (OP_*_RS)
-   "w" 5 bit same register used as both target and destination (OP_*_RT)
-   "U" 5 bit same destination register in both OP_*_RD and OP_*_RT
-       (used by clo and clz)
-   "C" 25 bit coprocessor function code (OP_*_COPZ)
-   "B" 20 bit syscall/breakpoint function code (OP_*_CODE20)
-   "J" 19 bit wait function code (OP_*_CODE19)
-   "x" accept and ignore register name
-   "z" must be zero register
-   "K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD)
-   "+A" 5 bit ins/ext position, which becomes LSB (OP_*_SHAMT).
-	Enforces: 0 <= pos < 32.
-   "+B" 5 bit ins size, which becomes MSB (OP_*_INSMSB).
-	Requires that "+A" occur first to set position.
-	Enforces: 0 < (pos+size) <= 32.
-   "+C" 5 bit ext size, which becomes MSBD (OP_*_EXTMSBD).
-	Requires that "+A" occur first to set position.
-	Enforces: 0 < (pos+size) <= 32.
-
-   Floating point instructions:
-   "D" 5 bit destination register (OP_*_FD)
-   "M" 3 bit compare condition code (OP_*_CCC) (only used for mips4 and up)
-   "N" 3 bit branch condition code (OP_*_BCC) (only used for mips4 and up)
-   "S" 5 bit fs source 1 register (OP_*_FS)
-   "T" 5 bit ft source 2 register (OP_*_FT)
-   "R" 5 bit fr source 3 register (OP_*_FR)
-   "V" 5 bit same register used as floating source and destination (OP_*_FS)
-   "W" 5 bit same register used as floating target and destination (OP_*_FT)
-
-   Coprocessor instructions:
-   "E" 5 bit target register (OP_*_RT)
-   "G" 5 bit destination register (OP_*_RD)
-   "H" 3 bit sel field for (d)mtc* and (d)mfc* (OP_*_SEL)
-   "P" 5 bit performance-monitor register (OP_*_PERFREG)
-   "e" 5 bit vector register byte specifier (OP_*_VECBYTE)
-   "%" 3 bit immediate vr5400 vector alignment operand (OP_*_VECALIGN)
-   see also "k" above
-   "+D" Combined destination register ("G") and sel ("H") for CP0 ops,
-	for pretty-printing in disassembly only.
-
-   Macro instructions:
-   "A" General 32 bit expression
-   "I" 32 bit immediate
-   "F" 64 bit floating point constant in .rdata
-   "L" 64 bit floating point constant in .lit8
-   "f" 32 bit floating point constant
-   "l" 32 bit floating point constant in .lit4
-
-   MDMX instruction operands (note that while these use the FP register
-   fields, they accept both $fN and $vN names for the registers):  
-   "O"	MDMX alignment offset (OP_*_ALN)
-   "Q"	MDMX vector/scalar/immediate source (OP_*_VSEL and OP_*_FT)
-   "X"	MDMX destination register (OP_*_FD) 
-   "Y"	MDMX source register (OP_*_FS)
-   "Z"	MDMX source register (OP_*_FT)
-
-   Other:
-   "()" parens surrounding optional value
-   ","  separates operands
-   "[]" brackets around index for vector-op scalar operand specifier (vr5400)
-   "+"  Start of extension sequence.
-
-   Characters used so far, for quick reference when adding more:
-   "%[]<>(),+"
-   "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
-   "abcdefhijklopqrstuvwxz"
-
-   Extension character sequences used so far ("+" followed by the
-   following), for quick reference when adding more:
-   "ABCD"
-*/
-
-/* These are the bits which may be set in the pinfo field of an
-   instructions, if it is not equal to INSN_MACRO.  */
-
-/* Modifies the general purpose register in OP_*_RD.  */
-#define INSN_WRITE_GPR_D            0x00000001
-/* Modifies the general purpose register in OP_*_RT.  */
-#define INSN_WRITE_GPR_T            0x00000002
-/* Modifies general purpose register 31.  */
-#define INSN_WRITE_GPR_31           0x00000004
-/* Modifies the floating point register in OP_*_FD.  */
-#define INSN_WRITE_FPR_D            0x00000008
-/* Modifies the floating point register in OP_*_FS.  */
-#define INSN_WRITE_FPR_S            0x00000010
-/* Modifies the floating point register in OP_*_FT.  */
-#define INSN_WRITE_FPR_T            0x00000020
-/* Reads the general purpose register in OP_*_RS.  */
-#define INSN_READ_GPR_S             0x00000040
-/* Reads the general purpose register in OP_*_RT.  */
-#define INSN_READ_GPR_T             0x00000080
-/* Reads the floating point register in OP_*_FS.  */
-#define INSN_READ_FPR_S             0x00000100
-/* Reads the floating point register in OP_*_FT.  */
-#define INSN_READ_FPR_T             0x00000200
-/* Reads the floating point register in OP_*_FR.  */
-#define INSN_READ_FPR_R		    0x00000400
-/* Modifies coprocessor condition code.  */
-#define INSN_WRITE_COND_CODE        0x00000800
-/* Reads coprocessor condition code.  */
-#define INSN_READ_COND_CODE         0x00001000
-/* TLB operation.  */
-#define INSN_TLB                    0x00002000
-/* Reads coprocessor register other than floating point register.  */
-#define INSN_COP                    0x00004000
-/* Instruction loads value from memory, requiring delay.  */
-#define INSN_LOAD_MEMORY_DELAY      0x00008000
-/* Instruction loads value from coprocessor, requiring delay.  */
-#define INSN_LOAD_COPROC_DELAY	    0x00010000
-/* Instruction has unconditional branch delay slot.  */
-#define INSN_UNCOND_BRANCH_DELAY    0x00020000
-/* Instruction has conditional branch delay slot.  */
-#define INSN_COND_BRANCH_DELAY      0x00040000
-/* Conditional branch likely: if branch not taken, insn nullified.  */
-#define INSN_COND_BRANCH_LIKELY	    0x00080000
-/* Moves to coprocessor register, requiring delay.  */
-#define INSN_COPROC_MOVE_DELAY      0x00100000
-/* Loads coprocessor register from memory, requiring delay.  */
-#define INSN_COPROC_MEMORY_DELAY    0x00200000
-/* Reads the HI register.  */
-#define INSN_READ_HI		    0x00400000
-/* Reads the LO register.  */
-#define INSN_READ_LO		    0x00800000
-/* Modifies the HI register.  */
-#define INSN_WRITE_HI		    0x01000000
-/* Modifies the LO register.  */
-#define INSN_WRITE_LO		    0x02000000
-/* Takes a trap (easier to keep out of delay slot).  */
-#define INSN_TRAP                   0x04000000
-/* Instruction stores value into memory.  */
-#define INSN_STORE_MEMORY	    0x08000000
-/* Instruction uses single precision floating point.  */
-#define FP_S			    0x10000000
-/* Instruction uses double precision floating point.  */
-#define FP_D			    0x20000000
-/* Instruction is part of the tx39's integer multiply family.    */
-#define INSN_MULT                   0x40000000
-/* Instruction synchronize shared memory.  */
-#define INSN_SYNC		    0x80000000
-/* Instruction reads MDMX accumulator.  XXX FIXME: No bits left!  */
-#define INSN_READ_MDMX_ACC	    0
-/* Instruction writes MDMX accumulator.  XXX FIXME: No bits left!  */
-#define INSN_WRITE_MDMX_ACC	    0
-
-/* Instruction is actually a macro.  It should be ignored by the
-   disassembler, and requires special treatment by the assembler.  */
-#define INSN_MACRO                  0xffffffff
-
-/* Masks used to mark instructions to indicate which MIPS ISA level
-   they were introduced in.  ISAs, as defined below, are logical
-   ORs of these bits, indicating that they support the instructions
-   defined at the given level.  */
-
-#define INSN_ISA_MASK		  0x00000fff
-#define INSN_ISA1                 0x00000001
-#define INSN_ISA2                 0x00000002
-#define INSN_ISA3                 0x00000004
-#define INSN_ISA4                 0x00000008
-#define INSN_ISA5                 0x00000010
-#define INSN_ISA32                0x00000020
-#define INSN_ISA64                0x00000040
-#define INSN_ISA32R2              0x00000080
-
-/* Masks used for MIPS-defined ASEs.  */
-#define INSN_ASE_MASK		  0x0000f000
-
-/* MIPS 16 ASE */
-#define INSN_MIPS16               0x00002000
-/* MIPS-3D ASE */
-#define INSN_MIPS3D               0x00004000
-/* MDMX ASE */ 
-#define INSN_MDMX                 0x00008000
-
-/* Chip specific instructions.  These are bitmasks.  */
-
-/* MIPS R4650 instruction.  */
-#define INSN_4650                 0x00010000
-/* LSI R4010 instruction.  */
-#define INSN_4010                 0x00020000
-/* NEC VR4100 instruction.  */
-#define INSN_4100                 0x00040000
-/* Toshiba R3900 instruction.  */
-#define INSN_3900                 0x00080000
-/* MIPS R10000 instruction.  */
-#define INSN_10000                0x00100000
-/* Broadcom SB-1 instruction.  */
-#define INSN_SB1                  0x00200000
-/* NEC VR4111/VR4181 instruction.  */
-#define INSN_4111                 0x00400000
-/* NEC VR4120 instruction.  */
-#define INSN_4120                 0x00800000
-/* NEC VR5400 instruction.  */
-#define INSN_5400		  0x01000000
-/* NEC VR5500 instruction.  */
-#define INSN_5500		  0x02000000
-
-/* MIPS ISA defines, use instead of hardcoding ISA level.  */
-
-#define       ISA_UNKNOWN     0               /* Gas internal use.  */
-#define       ISA_MIPS1       (INSN_ISA1)
-#define       ISA_MIPS2       (ISA_MIPS1 | INSN_ISA2)
-#define       ISA_MIPS3       (ISA_MIPS2 | INSN_ISA3)
-#define       ISA_MIPS4       (ISA_MIPS3 | INSN_ISA4)
-#define       ISA_MIPS5       (ISA_MIPS4 | INSN_ISA5)
-
-#define       ISA_MIPS32      (ISA_MIPS2 | INSN_ISA32)
-#define       ISA_MIPS64      (ISA_MIPS5 | INSN_ISA32 | INSN_ISA64)
-
-#define       ISA_MIPS32R2    (ISA_MIPS32 | INSN_ISA32R2)
-
-/* CPU defines, use instead of hardcoding processor number. Keep this
-   in sync with bfd/archures.c in order for machine selection to work.  */
-#define CPU_UNKNOWN	0               /* Gas internal use.  */
-#define CPU_R3000	3000
-#define CPU_R3900	3900
-#define CPU_R4000	4000
-#define CPU_R4010	4010
-#define CPU_VR4100	4100
-#define CPU_R4111	4111
-#define CPU_VR4120	4120
-#define CPU_R4300	4300
-#define CPU_R4400	4400
-#define CPU_R4600	4600
-#define CPU_R4650	4650
-#define CPU_R5000	5000
-#define CPU_VR5400	5400
-#define CPU_VR5500	5500
-#define CPU_R6000	6000
-#define CPU_R8000	8000
-#define CPU_R10000	10000
-#define CPU_R12000	12000
-#define CPU_MIPS16	16
-#define CPU_MIPS32	32
-#define CPU_MIPS32R2	33
-#define CPU_MIPS5       5
-#define CPU_MIPS64      64
-#define CPU_SB1         12310201        /* octal 'SB', 01.  */
-
-/* Test for membership in an ISA including chip specific ISAs.  INSN
-   is pointer to an element of the opcode table; ISA is the specified
-   ISA/ASE bitmask to test against; and CPU is the CPU specific ISA to
-   test, or zero if no CPU specific ISA test is desired.  */
-
-#define OPCODE_IS_MEMBER(insn, isa, cpu)				\
-    (((insn)->membership & isa) != 0					\
-     || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0)	\
-     || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0)	\
-     || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0)	\
-     || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0)	\
-     || ((cpu == CPU_R10000 || cpu == CPU_R12000)			\
-	 && ((insn)->membership & INSN_10000) != 0)			\
-     || (cpu == CPU_SB1 && ((insn)->membership & INSN_SB1) != 0)	\
-     || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0)	\
-     || (cpu == CPU_VR4120 && ((insn)->membership & INSN_4120) != 0)	\
-     || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0)	\
-     || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0)	\
-     || 0)	/* Please keep this term for easier source merging.  */
-
-/* This is a list of macro expanded instructions.
-
-   _I appended means immediate
-   _A appended means address
-   _AB appended means address with base register
-   _D appended means 64 bit floating point constant
-   _S appended means 32 bit floating point constant.  */
-
-enum
-{
-  M_ABS,
-  M_ADD_I,
-  M_ADDU_I,
-  M_AND_I,
-  M_BEQ,
-  M_BEQ_I,
-  M_BEQL_I,
-  M_BGE,
-  M_BGEL,
-  M_BGE_I,
-  M_BGEL_I,
-  M_BGEU,
-  M_BGEUL,
-  M_BGEU_I,
-  M_BGEUL_I,
-  M_BGT,
-  M_BGTL,
-  M_BGT_I,
-  M_BGTL_I,
-  M_BGTU,
-  M_BGTUL,
-  M_BGTU_I,
-  M_BGTUL_I,
-  M_BLE,
-  M_BLEL,
-  M_BLE_I,
-  M_BLEL_I,
-  M_BLEU,
-  M_BLEUL,
-  M_BLEU_I,
-  M_BLEUL_I,
-  M_BLT,
-  M_BLTL,
-  M_BLT_I,
-  M_BLTL_I,
-  M_BLTU,
-  M_BLTUL,
-  M_BLTU_I,
-  M_BLTUL_I,
-  M_BNE,
-  M_BNE_I,
-  M_BNEL_I,
-  M_DABS,
-  M_DADD_I,
-  M_DADDU_I,
-  M_DDIV_3,
-  M_DDIV_3I,
-  M_DDIVU_3,
-  M_DDIVU_3I,
-  M_DIV_3,
-  M_DIV_3I,
-  M_DIVU_3,
-  M_DIVU_3I,
-  M_DLA_AB,
-  M_DLI,
-  M_DMUL,
-  M_DMUL_I,
-  M_DMULO,
-  M_DMULO_I,
-  M_DMULOU,
-  M_DMULOU_I,
-  M_DREM_3,
-  M_DREM_3I,
-  M_DREMU_3,
-  M_DREMU_3I,
-  M_DSUB_I,
-  M_DSUBU_I,
-  M_DSUBU_I_2,
-  M_J_A,
-  M_JAL_1,
-  M_JAL_2,
-  M_JAL_A,
-  M_L_DOB,
-  M_L_DAB,
-  M_LA_AB,
-  M_LB_A,
-  M_LB_AB,
-  M_LBU_A,
-  M_LBU_AB,
-  M_LD_A,
-  M_LD_OB,
-  M_LD_AB,
-  M_LDC1_AB,
-  M_LDC2_AB,
-  M_LDC3_AB,
-  M_LDL_AB,
-  M_LDR_AB,
-  M_LH_A,
-  M_LH_AB,
-  M_LHU_A,
-  M_LHU_AB,
-  M_LI,
-  M_LI_D,
-  M_LI_DD,
-  M_LI_S,
-  M_LI_SS,
-  M_LL_AB,
-  M_LLD_AB,
-  M_LS_A,
-  M_LW_A,
-  M_LW_AB,
-  M_LWC0_A,
-  M_LWC0_AB,
-  M_LWC1_A,
-  M_LWC1_AB,
-  M_LWC2_A,
-  M_LWC2_AB,
-  M_LWC3_A,
-  M_LWC3_AB,
-  M_LWL_A,
-  M_LWL_AB,
-  M_LWR_A,
-  M_LWR_AB,
-  M_LWU_AB,
-  M_MOVE,
-  M_MUL,
-  M_MUL_I,
-  M_MULO,
-  M_MULO_I,
-  M_MULOU,
-  M_MULOU_I,
-  M_NOR_I,
-  M_OR_I,
-  M_REM_3,
-  M_REM_3I,
-  M_REMU_3,
-  M_REMU_3I,
-  M_DROL,
-  M_ROL,
-  M_DROL_I,
-  M_ROL_I,
-  M_DROR,
-  M_ROR,
-  M_DROR_I,
-  M_ROR_I,
-  M_S_DA,
-  M_S_DOB,
-  M_S_DAB,
-  M_S_S,
-  M_SC_AB,
-  M_SCD_AB,
-  M_SD_A,
-  M_SD_OB,
-  M_SD_AB,
-  M_SDC1_AB,
-  M_SDC2_AB,
-  M_SDC3_AB,
-  M_SDL_AB,
-  M_SDR_AB,
-  M_SEQ,
-  M_SEQ_I,
-  M_SGE,
-  M_SGE_I,
-  M_SGEU,
-  M_SGEU_I,
-  M_SGT,
-  M_SGT_I,
-  M_SGTU,
-  M_SGTU_I,
-  M_SLE,
-  M_SLE_I,
-  M_SLEU,
-  M_SLEU_I,
-  M_SLT_I,
-  M_SLTU_I,
-  M_SNE,
-  M_SNE_I,
-  M_SB_A,
-  M_SB_AB,
-  M_SH_A,
-  M_SH_AB,
-  M_SW_A,
-  M_SW_AB,
-  M_SWC0_A,
-  M_SWC0_AB,
-  M_SWC1_A,
-  M_SWC1_AB,
-  M_SWC2_A,
-  M_SWC2_AB,
-  M_SWC3_A,
-  M_SWC3_AB,
-  M_SWL_A,
-  M_SWL_AB,
-  M_SWR_A,
-  M_SWR_AB,
-  M_SUB_I,
-  M_SUBU_I,
-  M_SUBU_I_2,
-  M_TEQ_I,
-  M_TGE_I,
-  M_TGEU_I,
-  M_TLT_I,
-  M_TLTU_I,
-  M_TNE_I,
-  M_TRUNCWD,
-  M_TRUNCWS,
-  M_ULD,
-  M_ULD_A,
-  M_ULH,
-  M_ULH_A,
-  M_ULHU,
-  M_ULHU_A,
-  M_ULW,
-  M_ULW_A,
-  M_USH,
-  M_USH_A,
-  M_USW,
-  M_USW_A,
-  M_USD,
-  M_USD_A,
-  M_XOR_I,
-  M_COP0,
-  M_COP1,
-  M_COP2,
-  M_COP3,
-  M_NUM_MACROS
-};
-
-
-/* The order of overloaded instructions matters.  Label arguments and
-   register arguments look the same. Instructions that can have either
-   for arguments must apear in the correct order in this table for the
-   assembler to pick the right one. In other words, entries with
-   immediate operands must apear after the same instruction with
-   registers.
-
-   Many instructions are short hand for other instructions (i.e., The
-   jal <register> instruction is short for jalr <register>).  */
-
-extern const struct mips_opcode mips_builtin_opcodes[];
-extern const int bfd_mips_num_builtin_opcodes;
-extern struct mips_opcode *mips_opcodes;
-extern int bfd_mips_num_opcodes;
-#define NUMOPCODES bfd_mips_num_opcodes
-
-
-/* The rest of this file adds definitions for the mips16 TinyRISC
-   processor.  */
-
-/* These are the bitmasks and shift counts used for the different
-   fields in the instruction formats.  Other than OP, no masks are
-   provided for the fixed portions of an instruction, since they are
-   not needed.
-
-   The I format uses IMM11.
-
-   The RI format uses RX and IMM8.
-
-   The RR format uses RX, and RY.
-
-   The RRI format uses RX, RY, and IMM5.
-
-   The RRR format uses RX, RY, and RZ.
-
-   The RRI_A format uses RX, RY, and IMM4.
-
-   The SHIFT format uses RX, RY, and SHAMT.
-
-   The I8 format uses IMM8.
-
-   The I8_MOVR32 format uses RY and REGR32.
-
-   The IR_MOV32R format uses REG32R and MOV32Z.
-
-   The I64 format uses IMM8.
-
-   The RI64 format uses RY and IMM5.
-   */
-
-#define MIPS16OP_MASK_OP	0x1f
-#define MIPS16OP_SH_OP		11
-#define MIPS16OP_MASK_IMM11	0x7ff
-#define MIPS16OP_SH_IMM11	0
-#define MIPS16OP_MASK_RX	0x7
-#define MIPS16OP_SH_RX		8
-#define MIPS16OP_MASK_IMM8	0xff
-#define MIPS16OP_SH_IMM8	0
-#define MIPS16OP_MASK_RY	0x7
-#define MIPS16OP_SH_RY		5
-#define MIPS16OP_MASK_IMM5	0x1f
-#define MIPS16OP_SH_IMM5	0
-#define MIPS16OP_MASK_RZ	0x7
-#define MIPS16OP_SH_RZ		2
-#define MIPS16OP_MASK_IMM4	0xf
-#define MIPS16OP_SH_IMM4	0
-#define MIPS16OP_MASK_REGR32	0x1f
-#define MIPS16OP_SH_REGR32	0
-#define MIPS16OP_MASK_REG32R	0x1f
-#define MIPS16OP_SH_REG32R	3
-#define MIPS16OP_EXTRACT_REG32R(i) ((((i) >> 5) & 7) | ((i) & 0x18))
-#define MIPS16OP_MASK_MOVE32Z	0x7
-#define MIPS16OP_SH_MOVE32Z	0
-#define MIPS16OP_MASK_IMM6	0x3f
-#define MIPS16OP_SH_IMM6	5
-
-/* These are the characters which may appears in the args field of an
-   instruction.  They appear in the order in which the fields appear
-   when the instruction is used.  Commas and parentheses in the args
-   string are ignored when assembling, and written into the output
-   when disassembling.
-
-   "y" 3 bit register (MIPS16OP_*_RY)
-   "x" 3 bit register (MIPS16OP_*_RX)
-   "z" 3 bit register (MIPS16OP_*_RZ)
-   "Z" 3 bit register (MIPS16OP_*_MOVE32Z)
-   "v" 3 bit same register as source and destination (MIPS16OP_*_RX)
-   "w" 3 bit same register as source and destination (MIPS16OP_*_RY)
-   "0" zero register ($0)
-   "S" stack pointer ($sp or $29)
-   "P" program counter
-   "R" return address register ($ra or $31)
-   "X" 5 bit MIPS register (MIPS16OP_*_REGR32)
-   "Y" 5 bit MIPS register (MIPS16OP_*_REG32R)
-   "6" 6 bit unsigned break code (MIPS16OP_*_IMM6)
-   "a" 26 bit jump address
-   "e" 11 bit extension value
-   "l" register list for entry instruction
-   "L" register list for exit instruction
-
-   The remaining codes may be extended.  Except as otherwise noted,
-   the full extended operand is a 16 bit signed value.
-   "<" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 5 bit unsigned)
-   ">" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 5 bit unsigned)
-   "[" 3 bit unsigned shift count * 0 (MIPS16OP_*_RZ) (full 6 bit unsigned)
-   "]" 3 bit unsigned shift count * 0 (MIPS16OP_*_RX) (full 6 bit unsigned)
-   "4" 4 bit signed immediate * 0 (MIPS16OP_*_IMM4) (full 15 bit signed)
-   "5" 5 bit unsigned immediate * 0 (MIPS16OP_*_IMM5)
-   "H" 5 bit unsigned immediate * 2 (MIPS16OP_*_IMM5)
-   "W" 5 bit unsigned immediate * 4 (MIPS16OP_*_IMM5)
-   "D" 5 bit unsigned immediate * 8 (MIPS16OP_*_IMM5)
-   "j" 5 bit signed immediate * 0 (MIPS16OP_*_IMM5)
-   "8" 8 bit unsigned immediate * 0 (MIPS16OP_*_IMM8)
-   "V" 8 bit unsigned immediate * 4 (MIPS16OP_*_IMM8)
-   "C" 8 bit unsigned immediate * 8 (MIPS16OP_*_IMM8)
-   "U" 8 bit unsigned immediate * 0 (MIPS16OP_*_IMM8) (full 16 bit unsigned)
-   "k" 8 bit signed immediate * 0 (MIPS16OP_*_IMM8)
-   "K" 8 bit signed immediate * 8 (MIPS16OP_*_IMM8)
-   "p" 8 bit conditional branch address (MIPS16OP_*_IMM8)
-   "q" 11 bit branch address (MIPS16OP_*_IMM11)
-   "A" 8 bit PC relative address * 4 (MIPS16OP_*_IMM8)
-   "B" 5 bit PC relative address * 8 (MIPS16OP_*_IMM5)
-   "E" 5 bit PC relative address * 4 (MIPS16OP_*_IMM5)
-   */
-
-/* For the mips16, we use the same opcode table format and a few of
-   the same flags.  However, most of the flags are different.  */
-
-/* Modifies the register in MIPS16OP_*_RX.  */
-#define MIPS16_INSN_WRITE_X		    0x00000001
-/* Modifies the register in MIPS16OP_*_RY.  */
-#define MIPS16_INSN_WRITE_Y		    0x00000002
-/* Modifies the register in MIPS16OP_*_RZ.  */
-#define MIPS16_INSN_WRITE_Z		    0x00000004
-/* Modifies the T ($24) register.  */
-#define MIPS16_INSN_WRITE_T		    0x00000008
-/* Modifies the SP ($29) register.  */
-#define MIPS16_INSN_WRITE_SP		    0x00000010
-/* Modifies the RA ($31) register.  */
-#define MIPS16_INSN_WRITE_31		    0x00000020
-/* Modifies the general purpose register in MIPS16OP_*_REG32R.  */
-#define MIPS16_INSN_WRITE_GPR_Y		    0x00000040
-/* Reads the register in MIPS16OP_*_RX.  */
-#define MIPS16_INSN_READ_X		    0x00000080
-/* Reads the register in MIPS16OP_*_RY.  */
-#define MIPS16_INSN_READ_Y		    0x00000100
-/* Reads the register in MIPS16OP_*_MOVE32Z.  */
-#define MIPS16_INSN_READ_Z		    0x00000200
-/* Reads the T ($24) register.  */
-#define MIPS16_INSN_READ_T		    0x00000400
-/* Reads the SP ($29) register.  */
-#define MIPS16_INSN_READ_SP		    0x00000800
-/* Reads the RA ($31) register.  */
-#define MIPS16_INSN_READ_31		    0x00001000
-/* Reads the program counter.  */
-#define MIPS16_INSN_READ_PC		    0x00002000
-/* Reads the general purpose register in MIPS16OP_*_REGR32.  */
-#define MIPS16_INSN_READ_GPR_X		    0x00004000
-/* Is a branch insn. */
-#define MIPS16_INSN_BRANCH                  0x00010000
-
-/* The following flags have the same value for the mips16 opcode
-   table:
-   INSN_UNCOND_BRANCH_DELAY
-   INSN_COND_BRANCH_DELAY
-   INSN_COND_BRANCH_LIKELY (never used)
-   INSN_READ_HI
-   INSN_READ_LO
-   INSN_WRITE_HI
-   INSN_WRITE_LO
-   INSN_TRAP
-   INSN_ISA3
-   */
-
-extern const struct mips_opcode mips16_opcodes[];
-extern const int bfd_mips16_num_opcodes;
-
-#endif /* _MIPS_H_ */
diff --git a/contrib/disas/opcode/ia64.h b/contrib/disas/opcode/ia64.h
deleted file mode 100644
index b94749a3..00000000
--- a/contrib/disas/opcode/ia64.h
+++ /dev/null
@@ -1,392 +0,0 @@
-/* ia64.h -- Header file for ia64 opcode table
-   Copyright (C) 1998, 1999 David Mosberger-Tang <davidm@hpl.hp.com>
-
-   See the file HP-COPYRIGHT for additional information.  */
-
-#ifndef opcode_ia64_h
-#define opcode_ia64_h
-
-
-/* next two comments by ud3 */
-//#include <sys/types.h>
-//#include <bfd.h>
-
-
-typedef u64_t ia64_insn;
-
-enum ia64_insn_type
-  {
-    IA64_TYPE_NIL = 0,	/* illegal type */
-    IA64_TYPE_A,	/* integer alu (I- or M-unit) */
-    IA64_TYPE_I,	/* non-alu integer (I-unit) */
-    IA64_TYPE_M,	/* memory (M-unit) */
-    IA64_TYPE_B,	/* branch (B-unit) */
-    IA64_TYPE_F,	/* floating-point (F-unit) */
-    IA64_TYPE_X,	/* long encoding (X-unit) */
-    IA64_TYPE_DYN,	/* Dynamic opcode */
-    IA64_NUM_TYPES
-  };
-
-enum ia64_unit
-  {
-    IA64_UNIT_NIL = 0,	/* illegal unit */
-    IA64_UNIT_I,	/* integer unit */
-    IA64_UNIT_M,	/* memory unit */
-    IA64_UNIT_B,	/* branching unit */
-    IA64_UNIT_F,	/* floating-point unit */
-    IA64_UNIT_L,	/* long "unit" */
-    IA64_UNIT_X,	/* may be integer or branch unit */
-    IA64_NUM_UNITS
-  };
-
-/* Changes to this enumeration must be propagated to the operand table in
-   bfd/cpu-ia64-opc.c 
- */ 
-enum ia64_opnd
-  {
-    IA64_OPND_NIL,	/* no operand---MUST BE FIRST!*/
-
-    /* constants */
-    IA64_OPND_AR_CCV,	/* application register ccv (ar.ccv) */
-    IA64_OPND_AR_PFS,	/* application register pfs (ar.pfs) */
-    IA64_OPND_C1,	/* the constant 1 */
-    IA64_OPND_C8,	/* the constant 8 */
-    IA64_OPND_C16,	/* the constant 16 */
-    IA64_OPND_GR0,	/* gr0 */
-    IA64_OPND_IP,	/* instruction pointer (ip) */
-    IA64_OPND_PR,	/* predicate register (pr) */
-    IA64_OPND_PR_ROT,	/* rotating predicate register (pr.rot) */
-    IA64_OPND_PSR,	/* processor status register (psr) */
-    IA64_OPND_PSR_L,	/* processor status register L (psr.l) */
-    IA64_OPND_PSR_UM,	/* processor status register UM (psr.um) */
-
-    /* register operands: */
-    IA64_OPND_AR3,	/* third application register # (bits 20-26) */
-    IA64_OPND_B1,	/* branch register # (bits 6-8) */
-    IA64_OPND_B2,	/* branch register # (bits 13-15) */
-    IA64_OPND_CR3,	/* third control register # (bits 20-26) */
-    IA64_OPND_F1,	/* first floating-point register # */
-    IA64_OPND_F2,	/* second floating-point register # */
-    IA64_OPND_F3,	/* third floating-point register # */
-    IA64_OPND_F4,	/* fourth floating-point register # */
-    IA64_OPND_P1,	/* first predicate # */
-    IA64_OPND_P2,	/* second predicate # */
-    IA64_OPND_R1,	/* first register # */
-    IA64_OPND_R2,	/* second register # */
-    IA64_OPND_R3,	/* third register # */
-    IA64_OPND_R3_2,	/* third register # (limited to gr0-gr3) */
-
-    /* indirect operands: */
-    IA64_OPND_CPUID_R3,	/* cpuid[reg] */
-    IA64_OPND_DBR_R3,	/* dbr[reg] */
-    IA64_OPND_DTR_R3,	/* dtr[reg] */
-    IA64_OPND_ITR_R3,	/* itr[reg] */
-    IA64_OPND_IBR_R3,	/* ibr[reg] */
-    IA64_OPND_MR3,	/* memory at addr of third register # */
-    IA64_OPND_MSR_R3,	/* msr[reg] */
-    IA64_OPND_PKR_R3,	/* pkr[reg] */
-    IA64_OPND_PMC_R3,	/* pmc[reg] */
-    IA64_OPND_PMD_R3,	/* pmd[reg] */
-    IA64_OPND_RR_R3,	/* rr[reg] */
-
-    /* immediate operands: */
-    IA64_OPND_CCNT5,	/* 5-bit count (31 - bits 20-24) */
-    IA64_OPND_CNT2a,	/* 2-bit count (1 + bits 27-28) */
-    IA64_OPND_CNT2b,	/* 2-bit count (bits 27-28): 1, 2, 3 */
-    IA64_OPND_CNT2c,	/* 2-bit count (bits 30-31): 0, 7, 15, or 16 */
-    IA64_OPND_CNT5,	/* 5-bit count (bits 14-18) */
-    IA64_OPND_CNT6,	/* 6-bit count (bits 27-32) */
-    IA64_OPND_CPOS6a,	/* 6-bit count (63 - bits 20-25) */
-    IA64_OPND_CPOS6b,	/* 6-bit count (63 - bits 14-19) */
-    IA64_OPND_CPOS6c,	/* 6-bit count (63 - bits 31-36) */
-    IA64_OPND_IMM1,	/* signed 1-bit immediate (bit 36) */
-    IA64_OPND_IMMU2,	/* unsigned 2-bit immediate (bits 13-14) */
-    IA64_OPND_IMMU7a,	/* unsigned 7-bit immediate (bits 13-19) */
-    IA64_OPND_IMMU7b,	/* unsigned 7-bit immediate (bits 20-26) */
-    IA64_OPND_SOF,	/* 8-bit stack frame size */
-    IA64_OPND_SOL,	/* 8-bit size of locals */
-    IA64_OPND_SOR,	/* 6-bit number of rotating registers (scaled by 8) */
-    IA64_OPND_IMM8,	/* signed 8-bit immediate (bits 13-19 & 36) */
-    IA64_OPND_IMM8U4,	/* cmp4*u signed 8-bit immediate (bits 13-19 & 36) */
-    IA64_OPND_IMM8M1,	/* signed 8-bit immediate -1 (bits 13-19 & 36) */
-    IA64_OPND_IMM8M1U4,	/* cmp4*u signed 8-bit immediate -1 (bits 13-19 & 36)*/
-    IA64_OPND_IMM8M1U8,	/* cmp*u signed 8-bit immediate -1 (bits 13-19 & 36) */
-    IA64_OPND_IMMU9,	/* unsigned 9-bit immediate (bits 33-34, 20-26) */
-    IA64_OPND_IMM9a,	/* signed 9-bit immediate (bits 6-12, 27, 36) */
-    IA64_OPND_IMM9b,	/* signed 9-bit immediate (bits 13-19, 27, 36) */
-    IA64_OPND_IMM14,	/* signed 14-bit immediate (bits 13-19, 27-32, 36) */
-    IA64_OPND_IMM17,	/* signed 17-bit immediate (2*bits 6-12, 24-31, 36) */
-    IA64_OPND_IMMU21,	/* unsigned 21-bit immediate (bits 6-25, 36) */
-    IA64_OPND_IMM22,	/* signed 22-bit immediate (bits 13-19, 22-36) */
-    IA64_OPND_IMMU24,	/* unsigned 24-bit immediate (bits 6-26, 31-32, 36) */
-    IA64_OPND_IMM44,	/* signed 44-bit immediate (2^16*bits 6-32, 36) */
-    IA64_OPND_IMMU62,	/* unsigned 62-bit immediate */
-    IA64_OPND_IMMU64,	/* unsigned 64-bit immediate (lotsa bits...) */
-    IA64_OPND_INC3,	/* signed 3-bit (bits 13-15): +/-1, 4, 8, 16 */
-    IA64_OPND_LEN4,	/* 4-bit count (bits 27-30 + 1) */
-    IA64_OPND_LEN6,	/* 6-bit count (bits 27-32 + 1) */
-    IA64_OPND_MBTYPE4,	/* 4-bit mux type (bits 20-23) */
-    IA64_OPND_MHTYPE8,	/* 8-bit mux type (bits 20-27) */
-    IA64_OPND_POS6,	/* 6-bit count (bits 14-19) */
-    IA64_OPND_TAG13,	/* signed 13-bit tag (ip + 16*bits 6-12, 33-34) */
-    IA64_OPND_TAG13b,	/* signed 13-bit tag (ip + 16*bits 24-32) */
-    IA64_OPND_TGT25,	/* signed 25-bit (ip + 16*bits 6-25, 36) */
-    IA64_OPND_TGT25b,	/* signed 25-bit (ip + 16*bits 6-12, 20-32, 36) */
-    IA64_OPND_TGT25c,	/* signed 25-bit (ip + 16*bits 13-32, 36) */
-    IA64_OPND_TGT64,    /* 64-bit (ip + 16*bits 13-32, 36, 2-40(L)) */
-
-    IA64_OPND_COUNT	/* # of operand types (MUST BE LAST!) */
-  };
-
-enum ia64_dependency_mode
-{
-  IA64_DV_RAW,
-  IA64_DV_WAW,
-  IA64_DV_WAR,
-};
-
-enum ia64_dependency_semantics
-{
-  IA64_DVS_NONE,
-  IA64_DVS_IMPLIED,
-  IA64_DVS_IMPLIEDF,
-  IA64_DVS_DATA,
-  IA64_DVS_INSTR,
-  IA64_DVS_SPECIFIC,
-  IA64_DVS_STOP,
-  IA64_DVS_OTHER,
-};
-
-enum ia64_resource_specifier
-{
-  IA64_RS_ANY,
-  IA64_RS_AR_K,
-  IA64_RS_AR_UNAT,
-  IA64_RS_AR, /* 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111 */
-  IA64_RS_ARb, /* 48-63, 112-127 */
-  IA64_RS_BR,
-  IA64_RS_CFM,
-  IA64_RS_CPUID,
-  IA64_RS_CR_IRR,
-  IA64_RS_CR_LRR,
-  IA64_RS_CR, /* 3-7,10-15,18,26-63,75-79,82-127 */
-  IA64_RS_DBR,
-  IA64_RS_FR,
-  IA64_RS_FRb,
-  IA64_RS_GR0,
-  IA64_RS_GR,
-  IA64_RS_IBR,
-  IA64_RS_INSERVICE, /* CR[EOI] or CR[IVR] */
-  IA64_RS_MSR,
-  IA64_RS_PKR,
-  IA64_RS_PMC,
-  IA64_RS_PMD,
-  IA64_RS_PR,  /* non-rotating, 1-15 */
-  IA64_RS_PRr, /* rotating, 16-62 */
-  IA64_RS_PR63,
-  IA64_RS_RR,
-
-  IA64_RS_ARX, /* ARs not in RS_AR or RS_ARb */
-  IA64_RS_CRX, /* CRs not in RS_CR */
-  IA64_RS_PSR, /* PSR bits */
-  IA64_RS_RSE, /* implementation-specific RSE resources */
-  IA64_RS_AR_FPSR,
-};
-
-enum ia64_rse_resource
-{
-  IA64_RSE_N_STACKED_PHYS,
-  IA64_RSE_BOF,
-  IA64_RSE_STORE_REG,
-  IA64_RSE_LOAD_REG,
-  IA64_RSE_BSPLOAD,
-  IA64_RSE_RNATBITINDEX,
-  IA64_RSE_CFLE,
-  IA64_RSE_NDIRTY,
-};
-
-/* Information about a given resource dependency */
-struct ia64_dependency
-{
-  /* Name of the resource */
-  const char *name;
-  /* Does this dependency need further specification? */
-  enum ia64_resource_specifier specifier;
-  /* Mode of dependency */
-  enum ia64_dependency_mode mode;
-  /* Dependency semantics */
-  enum ia64_dependency_semantics semantics;
-  /* Register index, if applicable (distinguishes AR, CR, and PSR deps) */
-#define REG_NONE (-1)
-  int regindex;
-  /* Special info on semantics */
-  const char *info;
-};
-
-/* Two arrays of indexes into the ia64_dependency table.
-   chks are dependencies to check for conflicts when an opcode is
-   encountered; regs are dependencies to register (mark as used) when an
-   opcode is used.  chks correspond to readers (RAW) or writers (WAW or
-   WAR) of a resource, while regs correspond to writers (RAW or WAW) and
-   readers (WAR) of a resource.  */
-struct ia64_opcode_dependency
-{
-  int nchks;
-  const unsigned short *chks;
-  int nregs;
-  const unsigned short *regs;
-};
-
-/* encode/extract the note/index for a dependency */
-#define RDEP(N,X) (((N)<<11)|(X))
-#define NOTE(X) (((X)>>11)&0x1F)
-#define DEP(X) ((X)&0x7FF)
-
-/* A template descriptor describes the execution units that are active
-   for each of the three slots.  It also specifies the location of
-   instruction group boundaries that may be present between two slots.  */
-struct ia64_templ_desc
-  {
-    int group_boundary;	/* 0=no boundary, 1=between slot 0 & 1, etc. */
-    enum ia64_unit exec_unit[3];
-    const char *name;
-  };
-
-/* The opcode table is an array of struct ia64_opcode.  */
-
-struct ia64_opcode
-  {
-    /* The opcode name.  */
-    const char *name;
-
-    /* The type of the instruction: */
-    enum ia64_insn_type type;
-
-    /* Number of output operands: */
-    int num_outputs;
-
-    /* The opcode itself.  Those bits which will be filled in with
-       operands are zeroes.  */
-    ia64_insn opcode;
-
-    /* The opcode mask.  This is used by the disassembler.  This is a
-       mask containing ones indicating those bits which must match the
-       opcode field, and zeroes indicating those bits which need not
-       match (and are presumably filled in by operands).  */
-    ia64_insn mask;
-
-    /* An array of operand codes.  Each code is an index into the
-       operand table.  They appear in the order which the operands must
-       appear in assembly code, and are terminated by a zero.  */
-    enum ia64_opnd operands[5];
-
-    /* One bit flags for the opcode.  These are primarily used to
-       indicate specific processors and environments support the
-       instructions.  The defined values are listed below. */
-    unsigned int flags;
-
-    /* Used by ia64_find_next_opcode (). */
-    short ent_index;
-
-    /* Opcode dependencies. */ 
-    const struct ia64_opcode_dependency *dependencies;
-  };
-
-/* Values defined for the flags field of a struct ia64_opcode.  */
-
-#define IA64_OPCODE_FIRST	(1<<0)	/* must be first in an insn group */
-#define IA64_OPCODE_X_IN_MLX	(1<<1)	/* insn is allowed in X slot of MLX */
-#define IA64_OPCODE_LAST	(1<<2)	/* must be last in an insn group */
-#define IA64_OPCODE_PRIV	(1<<3)	/* privileged instruct */
-#define IA64_OPCODE_SLOT2	(1<<4)	/* insn allowed in slot 2 only */
-#define IA64_OPCODE_NO_PRED	(1<<5)	/* insn cannot be predicated */
-#define IA64_OPCODE_PSEUDO	(1<<6)	/* insn is a pseudo-op */
-#define IA64_OPCODE_F2_EQ_F3	(1<<7)	/* constraint: F2 == F3 */
-#define IA64_OPCODE_LEN_EQ_64MCNT	(1<<8)	/* constraint: LEN == 64-CNT */
-#define IA64_OPCODE_MOD_RRBS    (1<<9)	/* modifies all rrbs in CFM */
-#define IA64_OPCODE_POSTINC	(1<<10)	/* postincrement MR3 operand */
-
-/* A macro to extract the major opcode from an instruction.  */
-#define IA64_OP(i)	(((i) >> 37) & 0xf)
-
-enum ia64_operand_class
-  {
-    IA64_OPND_CLASS_CST,	/* constant */
-    IA64_OPND_CLASS_REG,	/* register */
-    IA64_OPND_CLASS_IND,	/* indirect register */
-    IA64_OPND_CLASS_ABS,	/* absolute value */
-    IA64_OPND_CLASS_REL,	/* IP-relative value */
-  };
-
-/* The operands table is an array of struct ia64_operand.  */
-
-struct ia64_operand
-{
-  enum ia64_operand_class class;
-
-  /* Set VALUE as the operand bits for the operand of type SELF in the
-     instruction pointed to by CODE.  If an error occurs, *CODE is not
-     modified and the returned string describes the cause of the
-     error.  If no error occurs, NULL is returned.  */
-  const char *(*insert) (const struct ia64_operand *self, ia64_insn value,
-			 ia64_insn *code);
-
-  /* Extract the operand bits for an operand of type SELF from
-     instruction CODE store them in *VALUE.  If an error occurs, the
-     cause of the error is described by the string returned.  If no
-     error occurs, NULL is returned.  */
-  const char *(*extract) (const struct ia64_operand *self, ia64_insn code,
-			  ia64_insn *value);
-
-  /* A string whose meaning depends on the operand class.  */
-
-  const char *str;
-
-  struct bit_field
-    {
-      /* The number of bits in the operand.  */
-      int bits;
-
-      /* How far the operand is left shifted in the instruction.  */
-      int shift;
-    }
-  field[4];		/* no operand has more than this many bit-fields */
-
-  unsigned int flags;
-
-  const char *desc;	/* brief description */
-};
-
-/* Values defined for the flags field of a struct ia64_operand.  */
-
-/* Disassemble as signed decimal (instead of hex): */
-#define IA64_OPND_FLAG_DECIMAL_SIGNED	(1<<0)
-/* Disassemble as unsigned decimal (instead of hex): */
-#define IA64_OPND_FLAG_DECIMAL_UNSIGNED	(1<<1)
-
-extern const struct ia64_templ_desc ia64_templ_desc[16];
-
-/* The tables are sorted by major opcode number and are otherwise in
-   the order in which the disassembler should consider instructions.  */
-extern struct ia64_opcode ia64_opcodes_a[];
-extern struct ia64_opcode ia64_opcodes_i[];
-extern struct ia64_opcode ia64_opcodes_m[];
-extern struct ia64_opcode ia64_opcodes_b[];
-extern struct ia64_opcode ia64_opcodes_f[];
-extern struct ia64_opcode ia64_opcodes_d[];
-
-
-extern struct ia64_opcode *ia64_find_opcode (const char *name);
-extern struct ia64_opcode *ia64_find_next_opcode (struct ia64_opcode *ent);
-
-extern struct ia64_opcode *ia64_dis_opcode (ia64_insn insn,
-					    enum ia64_insn_type type);
-
-extern void ia64_free_opcode (struct ia64_opcode *ent);
-extern const struct ia64_dependency *ia64_find_dependency (int index);
-
-/* To avoid circular library dependencies, this array is implemented
-   in bfd/cpu-ia64-opc.c: */
-extern const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT];
-
-#endif /* opcode_ia64_h */
diff --git a/kernel/Mk/Makeconf.alpha b/kernel/Mk/Makeconf.alpha
deleted file mode 100644
index aa0e3303..00000000
--- a/kernel/Mk/Makeconf.alpha
+++ /dev/null
@@ -1,38 +0,0 @@
-################ -*- mode: Makefile; -*- #############################
-##                
-## Copyright (C) 2004,  Karlsruhe University
-##                
-## File path:     Makeconf.alpha
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf.alpha,v 1.2 2004/08/25 06:45:47 awiggins Exp $
-##                
-######################################################################
-
-LDFLAGS_alpha   += 
-CFLAGS_alpha    += -O2 -mno-fp-regs -freg-struct-return
-CFLAGS_a21264   += -mcpu=ev6
-ASMFLAGS_a21264 += -mcpu=ev6 -Wa,-m21264
-CFLAGS_a21164   += -mcpu=ev5
-CFLAGS_a21164a  += -mcpu=ev56
-CFLAGS_a21064   += -mcpu=ev4
diff --git a/kernel/Mk/Makeconf.arm b/kernel/Mk/Makeconf.arm
deleted file mode 100644
index 55f63d13..00000000
--- a/kernel/Mk/Makeconf.arm
+++ /dev/null
@@ -1,50 +0,0 @@
-################ -*- mode: Makefile; -*- #############################
-##                
-## Copyright (C) 2004,  Karlsruhe University
-##                
-## File path:     Makeconf.arm
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf.arm,v 1.8 2004/12/02 22:02:16 cvansch Exp $
-##                
-######################################################################
-
-CFLAGS_arm	+= -O2 -finline-limit=999999999
-ASMFLAGS_arm	+= 
-LDFLAGS_arm	+=
-
-CFLAGS_sa1100	+= -march=armv4 -mtune=strongarm1100
-ASMFLAGS_sa1100	+= -march=armv4 -mtune=strongarm1100
-
-CFLAGS_xscale	+= -march=armv5 -mtune=xscale
-ASMFLAGS_xscale	+= -march=armv5 -mtune=xscale
-
-CFLAGS_omap1510	+= -march=armv4 -mtune=arm9tdmi -mshort-load-bytes
-CFLAGS_cs337	+= -march=armv4 -mtune=arm9tdmi -mshort-load-bytes
-CFLAGS_ixdp425	+= -mbig-endian
-ASMFLAGS_ixdp425	+= -mbig-endian
-
-ifeq ($(PLATFORM),ixdp425)
-LDFLAGS_arm	+= -EB
-VFLAGS		+= -EB
-endif
diff --git a/kernel/Mk/Makeconf.ia64 b/kernel/Mk/Makeconf.ia64
deleted file mode 100644
index e15d2900..00000000
--- a/kernel/Mk/Makeconf.ia64
+++ /dev/null
@@ -1,36 +0,0 @@
-################ -*- mode: Makefile; -*- #############################
-##                
-## Copyright (C) 2004,  Karlsruhe University
-##                
-## File path:     Makeconf.ia64
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf.ia64,v 1.1 2004/05/25 19:21:51 skoglund Exp $
-##                
-######################################################################
-
-CFLAGS_ia64+=	-O2 -freg-struct-return -mconstant-gp -finline-limit=999999
-ASMFLAGS_ia64+=	-mconstant-gp
-# eSk says: CML2 is complete and utter crap.  There is no way to
-# unconditionally set a simple variable.
-DEFINES_ia64+=	CONFIG_IA64_PHYSMEM_OFFSET=0x100000000
diff --git a/kernel/Mk/Makeconf.mips32 b/kernel/Mk/Makeconf.mips32
deleted file mode 100644
index d8009c95..00000000
--- a/kernel/Mk/Makeconf.mips32
+++ /dev/null
@@ -1,42 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2006,  Karlsruhe University
-##                
-## File path:     Mk/Makeconf.mips32
-## Description:   MIPS32 make settings
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf.mips32,v 1.1 2006/02/23 21:07:37 ud3 Exp $
-##                
-######################################################################
-
-CFLAGS_mips32	+= -mips32 -ggdb -Wall -fno-builtin -fno-pic -mno-abicalls -O2
-TOOLPREFIX=mipsel-unknown-linux-gnu-
-
-LDFLAGS_mips32   +=	-nostdlib -mips32
-
-#LDFLAGS_mips32   += -T/home/thomas/mips32/pistachio/kernel/src/platform/malta/linker.lds  # XXX
-#VFLAGS += -EL
-ASMFLAGS_mips32  += -mips32 -fno-pic 
-
-
diff --git a/kernel/Mk/Makeconf.mips64 b/kernel/Mk/Makeconf.mips64
deleted file mode 100644
index de43ea9a..00000000
--- a/kernel/Mk/Makeconf.mips64
+++ /dev/null
@@ -1,69 +0,0 @@
-################ -*- mode: Makefile; -*- #############################
-##                
-## Copyright (C) 2004,  Karlsruhe University
-##                
-## File path:     Makeconf.mips64
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf.mips64,v 1.2 2004/12/02 00:16:10 cvansch Exp $
-##                
-######################################################################
-
-CFLAGS_mips64	+= -O3 -G 0 -mlong64 -mno-abicalls -non_shared -msplit-addresses
-
-# Mips64 Compile Note: cvansch - UNSW
-#  GNU GCC/Binutils are broken for anything but ABI=o64
-#  We support the ABI=64 calling convention
-#  GCC is not broken for ABI=64 however GAS and LD are.
-#  Temporary solution is to let GCC generate ABI=64 code
-#  and pass ABI=o64 to the assembler.
-#  This works consistantly with diferent GCC/binutils
-#  versions and has a side effect of producing optimised
-#  address calculation.
-ifeq ($(PLATFORM),erpcn01)
-LDFLAGS_mips64   += -EL
-VFLAGS += -EL
-CFLAGS_rc64574  += -EL -march=r5000 -mabi=64 -Wa,-mabi=o64
-ASMFLAGS_mips64  += $(CFLAGS_mips64) $(CFLAGS_rc64574)
-endif
-
-ifeq ($(PLATFORM),u4600)
-LDFLAGS_mips64   += -EB
-VFLAGS += -EB
-CFLAGS_r4x00  += -EB -march=r4000 -mabi=64 -Wa,-mabi=o64
-ASMFLAGS_mips64  += $(CFLAGS_mips64) $(CFLAGS_r4x00)
-endif
-
-ifeq ($(PLATFORM),sb1)
-LDFLAGS_mips64   += -EB
-VFLAGS += -EB
-CFLAGS_sb1  += -EB -march=sb1 -mabi=64 -Wa,-mabi=o64
-ASMFLAGS_mips64  += $(CFLAGS_mips64) $(CFLAGS_sb1)
-endif
-
-ifeq ($(PLATFORM),vr41xx)
-LDFLAGS_mips64   += -EL
-VFLAGS += -EL
-CFLAGS_vr41xx += -EL -march=vr4100 -mabi=64 -Wa,-mabi=o64
-ASMFLAGS_mips64  += $(CFLAGS_mips64) $(CFLAGS_vr41xx)
-endif
diff --git a/kernel/Mk/Makeconf.sparc64 b/kernel/Mk/Makeconf.sparc64
deleted file mode 100644
index 0bea88cd..00000000
--- a/kernel/Mk/Makeconf.sparc64
+++ /dev/null
@@ -1,34 +0,0 @@
-################ -*- mode: Makefile; -*- #############################
-##                
-## Copyright (C) 2004,  Karlsruhe University
-##                
-## File path:     Makeconf.sparc64
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf.sparc64,v 1.3 2004/07/01 04:06:50 philipd Exp $
-##                
-######################################################################
-
-CFLAGS_sparc64  += -O3 -mcmodel=medany
-CFLAGS_ultrasparc += -mcpu=ultrasparc
-LDFLAGS_sparc64   += -N
diff --git a/kernel/config/Makefile b/kernel/config/Makefile
index 9f466b6c..cfa00aa2 100644
--- a/kernel/config/Makefile
+++ b/kernel/config/Makefile
@@ -36,12 +36,8 @@ CMLCONFIG=	$(CMLPATH)/cmlconfigure.py
 CMLCONFIGTRANS=	$(CMLPATH)/configtrans.py
 
 CML_INPUT=	$(addprefix $(SRCDIR)/config/, rules.cml \
-		  alpha.cml	\
 		  amd64.cml	\
-		  arm.cml	\
 		  ia32.cml	\
-		  ia64.cml	\
-		  mips64.cml	\
 		  powerpc.cml	\
 		  powerpc64.cml	\
 		 )
diff --git a/kernel/config/alpha.cml b/kernel/config/alpha.cml
deleted file mode 100644
index aab92bd1..00000000
--- a/kernel/config/alpha.cml
+++ /dev/null
@@ -1,111 +0,0 @@
-######################################################################
-#		 
-# Copyright (C) 1999, 2000, 2001,  Karlsruhe University
-#		 
-# File path:	 config/alpha.cml
-# Description:	 rules for Pistachio's Alpha CML2 configuration system
-#		 
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in the
-#    documentation and/or other materials provided with the distribution.
-# 
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#		 
-# $Id: alpha.cml,v 1.16 2004/08/25 06:52:31 awiggins Exp $
-#		 
-######################################################################
-
-symbols
-
-ARCH_ALPHA	'Alpha'
-alpha_type	'System Type'
-CPU_ALPHA_A21264  '21264'
-# Whate about the different variations (21164A etc.)
-CPU_ALPHA_A21164  '21164'
-CPU_ALPHA_A21164A '21164A'
-CPU_ALPHA_A21064  '21064'
-
-alpha_platform	'Platform'
-PLAT_MULTIA	'Multia'
-PLAT_MIATA	'Miata'
-PLAT_TSUNAMI	'Tsunami'
-# PLAT_SRM        'Generic'
-
-NO_CLOCK_IN_INT 'Ignore timer interrupts that occur in interrupts'
-ALPHA_PAL_IPC_FASTPATH 'Enable PAL mode IPC fastpath' text
-
-This enables an IPC fast which operates purely in PAL mode. To do
-so it needs to copy over memory usually reserved for the SRM console
-software. This has been tested on 21264 however if problems exist
-disable it and report a bug.
-.
-
-ALPHA_ADDRESS_BITS    'Size of the Virtual Address Space'
-ALPHA_CONSOLE_RESERVE 'Address at which to load kernel'
-USER_LOAD_PHYS       'User load address is a physical address'
-
-choices alpha_type
-	CPU_ALPHA_A21064
-	CPU_ALPHA_A21164
-	CPU_ALPHA_A21164A
-	CPU_ALPHA_A21264
-	default CPU_ALPHA_A21164
-
-unless ARCH_ALPHA suppress dependent alpha_type
-choices alpha_platform
-	PLAT_MIATA
-	PLAT_MULTIA
-	PLAT_TSUNAMI
-	default PLAT_MIATA
-
-unless ARCH_ALPHA suppress dependent alpha_platform
-
-unless n suppress PLAT_MULTIA
-#derive CPU_ALPHA_A21264  from PLAT_TSUNAMI
-#derive CPU_ALPHA_A21164  from PLAT_MIATA
-#derive CPU_ALPHA_A21064  from PLAT_MULTIA
-
-derive SWIZZLE_IO_ADDR	 from PLAT_TSUNAMI and ALPHA_ADDRESS_BITS == 43
-
-menu hardware_misc
-	ALPHA_ADDRESS_BITS%
-	ALPHA_CONSOLE_RESERVE@
-	USER_LOAD_PHYS
-
-default ALPHA_ADDRESS_BITS from 43 range 43 48
-default ALPHA_CONSOLE_RESERVE from 0x810000
-default USER_LOAD_PHYS from n
-unless ARCH_ALPHA suppress ALPHA_ADDRESS_BITS ALPHA_CONSOLE_RESERVE USER_LOAD_PHYS
-
-menu kernel
-	NO_CLOCK_IN_INT
-	ALPHA_PAL_IPC_FASTPATH
-
-unless ARCH_ALPHA suppress NO_CLOCK_IN_INT
-# awiggins (2004-07-21) Disabled until it is fixed up and tested again.
-unless n suppress ALPHA_PAL_IPC_FASTPATH
-unless ARCH_ALPHA suppress ALPHA_PAL_IPC_FASTPATH
-unless PLAT_TSUNAMI suppress ALPHA_PAL_IPC_FASTPATH
-
-
-default NO_CLOCK_IN_INT from y
-default ALPHA_PAL_IPC_FASTPATH from n
-
-# HACK
-derive ALPHA_FASTPATH from IPC_FASTPATH
-
diff --git a/kernel/config/arm.cml b/kernel/config/arm.cml
deleted file mode 100644
index 79cdf230..00000000
--- a/kernel/config/arm.cml
+++ /dev/null
@@ -1,107 +0,0 @@
-######################################################################
-#
-# Copyright (C) 1999, 2000, 2001,  Karlsruhe University
-#
-# File path:     config/arm.cml
-# Description:   rules for Pistachio's ARM CML2 configuration system
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in the
-#    documentation and/or other materials provided with the distribution.
-# 
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#
-# $Id: arm.cml,v 1.6 2004/12/02 21:55:06 cvansch Exp $
-#
-######################################################################
-
-symbols
-
-ARCH_ARM        'ARM'
-arm_type        'Processor Type'
-CPU_ARM_SA1100  'StrongARM SA-1100'
-CPU_ARM_XSCALE  'Intel XScale'
-#CPU_ARM_ARM926	'ARM 926-EJS'
-CPU_ARM_ARM920T	'ARM 920T'
-CPU_ARM_OMAP1510 'TI OMAP1510 ARM925T'
-
-arm_platform    'Platform'
-PLAT_PLEB       'PLEB'
-PLAT_PLEB2	'PLEB2 PXA255'
-#PLAT_INTEGRATOR	'Integrator'
-#PLAT_NOMADIK	'Nomadik'
-PLAT_IXDP425	'Intel IXDP425'
-PLAT_INNOVATOR	'OMAP1510 Innovator'
-PLAT_CSB337	'Cogent CSB337 AT91RM9200(ARM920T)'
-
-#nomadik_subplatform	'Nomadik platform'
-
-#SUBPLAT_NOMADIK_MEK0	'MEVK0'
-#SUBPLAT_NOMADIK_MEK1	'MEVK1'
-#SUBPLAT_NOMADIK_MEK2	'MEVK2'
-#SUBPLAT_NOMADIK_MEK3	'MEVK3'
-#SUBPLAT_NOMADIK_MEVKLITE 'MUPOC Lite'
-#SUBPLAT_NOMADIK_MEVKFULL 'MUPOC Full'
-
-ENABLE_FASS     'Whether or not to enable Fast Addresss Space Switching'
-
-choices arm_type
-        CPU_ARM_SA1100
-	CPU_ARM_XSCALE
-#	CPU_ARM_ARM926
-	CPU_ARM_ARM920T
-	CPU_ARM_OMAP1510
-        default CPU_ARM_SA1100
-
-unless ARCH_ARM suppress dependent arm_type
-
-choices arm_platform
-        PLAT_PLEB
-        PLAT_PLEB2
-#	PLAT_INTEGRATOR
-#	PLAT_NOMADIK
-	PLAT_IXDP425
-	PLAT_INNOVATOR
-	PLAT_CSB337
-        default PLAT_PLEB
-
-unless ARCH_ARM suppress dependent arm_platform
-
-unless CPU_ARM_SA1100 suppress dependent PLAT_PLEB
-unless CPU_ARM_XSCALE suppress dependent PLAT_PLEB2 PLAT_IXDP425
-unless CPU_ARM_ARM920T suppress dependent PLAT_CSB337
-unless CPU_ARM_OMAP1510 suppress dependent PLAT_INNOVATOR
-
-derive ARM_BIG_ENDIAN from PLAT_IXDP425
-
-#choices nomadik_subplatform
-#	SUBPLAT_NOMADIK_MEK0
-#	SUBPLAT_NOMADIK_MEK1
-#	SUBPLAT_NOMADIK_MEK2
-#	SUBPLAT_NOMADIK_MEK3
-#	SUBPLAT_NOMADIK_MEVKLITE
-#	SUBPLAT_NOMADIK_MEVKFULL
-#	default SUBPLAT_NOMADIK_MEK0
-
-#unless PLAT_NOMADIK suppress dependent nomadik_subplatform
-
-menu hardware_misc
-#	nomadik_subplatform
-        ENABLE_FASS
-
-unless ARCH_ARM suppress ENABLE_FASS
diff --git a/kernel/config/ia64.cml b/kernel/config/ia64.cml
deleted file mode 100644
index b6d29d71..00000000
--- a/kernel/config/ia64.cml
+++ /dev/null
@@ -1,93 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2003,  Karlsruhe University
-##                
-## File path:     config/ia64.cml
-## Description:   Rules for Pistachio's ia64 configuration system
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: ia64.cml,v 1.8 2004/02/24 01:46:46 cvansch Exp $
-##                
-######################################################################
-
-symbols
-
-ARCH_IA64		'IA-64'
-ia64_type		'IA-64 Processor Type'
-CPU_IA64_ITANIUM	'Itanium Processor'
-CPU_IA64_ITANIUM2	'Itanium2 Processor'
-CPU_IA64_SKI		'HP Simulator'
-ia64_platform		'IA-64 Platform'
-PLAT_EFI		'Extensible Firmware Interface (EFI)'
-KDB_CONS_SKI		'SKI (HP IA64 emulator)'
-PROFILE_INTERVAL 	'Number of intructions between samples'
-PROFILE_SIZE		'Number of entries in profile hash-table' text
-The size of the profiling hash-table must be large enough such that there
-is a very low percentage of instructions in both kernel and the user
-application whose virtual address hashes to the same hash bucket.
-.
-
-
-#
-# The IA-64 CPU menu
-#
-
-choices ia64_type
-	CPU_IA64_ITANIUM
-	CPU_IA64_ITANIUM2
-	CPU_IA64_SKI
-	default CPU_IA64_ITANIUM
-
-unless ARCH_IA64 suppress ia64_type
-
-#
-# The IA-64 platform menu
-#
-
-choices ia64_platform
-	PLAT_EFI
-	default PLAT_EFI
-
-unless ARCH_IA64 suppress ia64_platform
-
-
-#
-# Setting for the HP SKI emulator.
-#
-unless CPU_IA64_SKI suppress dependent KDB_CONS_SKI
-when CPU_IA64_SKI suppress KDB_CONS_COM KDB_CONS_KBD
-require CPU_IA64_SKI implies SMP==n and KDB_CONS_SKI==y
-
-
-#
-# IA-64 requires an I/O SAPIC
-#
-require ARCH_IA64 implies IOAPIC==y
-
-#
-# IA-64 profiling
-
-default PROFILE_INTERVAL from 10000
-default PROFILE_SIZE from 393241 
-unless ARCH_IA64 suppress PROFILE_INTERVAL PROFILE_SIZE
-
diff --git a/kernel/config/mips32.cml b/kernel/config/mips32.cml
deleted file mode 100644
index ad6091a4..00000000
--- a/kernel/config/mips32.cml
+++ /dev/null
@@ -1,54 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2006,  Karlsruhe University
-##                
-## File path:     config/mips32.cml
-## Description:   MIPS32 rules for CML2 configuration system
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: mips32.cml,v 1.1 2006/02/23 21:07:38 ud3 Exp $
-##                
-######################################################################
-
-symbols
-
-ARCH_MIPS32	'MIPS-32'
-mips32_type	'Processor Type'
-CPU_MIPS32_m4kc	"MIPS 4kc"
-
-
-mips32_platform	'Platform'
-PLAT_MALTA		"MIPS MALTA"
-
-choices mips32_type
-	CPU_MIPS32_m4kc
-	default CPU_MIPS32_m4kc
-
-unless ARCH_MIPS32 suppress dependent mips32_type
-
-
-choices mips32_platform
-	PLAT_MALTA
-	default PLAT_MALTA
-
-unless ARCH_MIPS32 suppress dependent mips32_platform
diff --git a/kernel/config/mips64.cml b/kernel/config/mips64.cml
deleted file mode 100644
index 2beab6ac..00000000
--- a/kernel/config/mips64.cml
+++ /dev/null
@@ -1,94 +0,0 @@
-######################################################################
-#		 
-# Copyright (C) 1999, 2000, 2001,  Karlsruhe University
-#		 
-# File path:	 config/mips64.cml
-# Description:	 rules for Pistachio's mips64 CML2 configuration system
-#		 
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in the
-#    documentation and/or other materials provided with the distribution.
-# 
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#		 
-# $Id: mips64.cml,v 1.12 2003/11/17 05:46:00 cvansch Exp $
-#		 
-######################################################################
-
-symbols
-
-ARCH_MIPS64	'MIPS-64'
-mips64_type	'Processor Type'
-CPU_MIPS64_R4X00	"MIPS-64 R4X00"
-CPU_MIPS64_RC64574	"IDT MIPS-64 R5000 (RC64T574)"
-CPU_MIPS64_SB1		"MIPS-64 Sibyte SB1 core"
-CPU_MIPS64_VR4121	"MIPS-64 NEC vr4121"
-CPU_MIPS64_VR4181	"MIPS-64 NEC vr4181"
-
-CPU_CLOCK_SPEED		"CPU Frequency (kHz)"
-
-mips64_platform	'Platform'
-PLAT_ERPCN01	"OpenFuel ERPCN01"
-PLAT_U4600	"U4600"
-PLAT_SB1	"Sibyte"
-PLAT_VR41XX	"vr41xx"
-
-MIPS64_LITTLE_ENDIAN 'Enable MIPS64 LITTLE ENDIAN mode'
-SB1_PASS1_WORKAROUNDS 'Enable SB1 Sibyte MIPS core pass 1 work arounds?' text
-If you enable this option, you may also need to use a version of binutils/gcc
-that also builds code with the appropriate work arounds.
-
-Answer yes to this option to enable the pass 1 work arounds.
-.
-
-
-choices mips64_type
-	CPU_MIPS64_R4X00
-	CPU_MIPS64_RC64574
-	CPU_MIPS64_SB1
-	CPU_MIPS64_VR4121
-	CPU_MIPS64_VR4181
-	default CPU_MIPS64_R4X00
-
-unless ARCH_MIPS64 suppress dependent mips64_type
-
-
-choices mips64_platform
-	PLAT_ERPCN01
-	PLAT_U4600
-	PLAT_SB1
-	PLAT_VR41XX
-	default PLAT_U4600
-
-unless ARCH_MIPS64 suppress dependent mips64_platform
-
-menu hardware_misc
-	MIPS64_LITTLE_ENDIAN
-	CPU_CLOCK_SPEED%
-	SB1_PASS1_WORKAROUNDS
-
-default MIPS64_LITTLE_ENDIAN from n
-default CPU_CLOCK_SPEED from 100000
-default SB1_PASS1_WORKAROUNDS from n
-
-unless ARCH_MIPS64 suppress MIPS64_LITTLE_ENDIAN
-unless ARCH_MIPS64 suppress CPU_CLOCK_SPEED
-unless CPU_MIPS64_SB1 suppress SB1_PASS1_WORKAROUNDS
-
-require PLAT_ERPCN01 implies MIPS64_LITTLE_ENDIAN==y
-require PLAT_VR41XX implies MIPS64_LITTLE_ENDIAN==y
diff --git a/kernel/config/rules.cml b/kernel/config/rules.cml
index 585c5cdd..74210bd0 100644
--- a/kernel/config/rules.cml
+++ b/kernel/config/rules.cml
@@ -62,14 +62,10 @@ SMP		'Multiprocessor Support'
 SMP_MAX_PROCS	'Maximum number of CPUs'
 SMP_IDLE_POLL	'Poll XCPU queue on idle'
 
-UNCACHED	'Run CPU uncached'
-
 IOAPIC		'Use APIC+IOAPIC'
 MAX_IOAPICS	'Maximum number of supported IO APICs'
 APIC_TIMER_TICK 'Timer tick length for APIC'
 
-MAX_NUM_ASIDS   'The maximum number of ASIDs'
-PREEMPT_ASIDS   'Whether or not to pre-empt ASIDs'
 BOOTMEM_PAGES	'The number of pages to reserve for the kernel' text
 
 The kernel reserves an ammount of physical memory to use for kernel
@@ -231,39 +227,21 @@ hardware_misc	'Miscellaneous'
 menu hardware
 	arch
 	ia32_type
-	ia64_type
-	alpha_type
-	mips64_type
-	mips32_type
-	arm_type
 	powerpc_type
 	amd64_type
 	x86_platform
-	ia64_platform
-	alpha_platform
-	mips64_platform
-	mips32_platform
-	arm_platform
 	powerpc_platform
 	powerpc64_platform
 	powerpc64_type
-	sparc64_platform
 	SMP { SMP_MAX_PROCS% SMP_IDLE_POLL}
-	UNCACHED
 	hardware_misc
 	
 
 choices arch    # Basic architecture
 	ARCH_IA32
-	ARCH_IA64
 	ARCH_POWERPC
 	ARCH_POWERPC64
 	ARCH_AMD64
-	ARCH_ALPHA
-	ARCH_MIPS64
-	ARCH_MIPS32
-	ARCH_ARM
-	ARCH_SPARC64
 	default ARCH_IA32
 
 choices powerpc_type
@@ -279,8 +257,7 @@ choices amd64_type
 
 unless ARCH_POWERPC suppress dependent powerpc_type
 unless ARCH_AMD64 suppress dependent amd64_type
-unless ARCH_IA64 or ARCH_IA32 or ARCH_POWERPC or CPU_MIPS64_SB1 or ARCH_AMD64 suppress dependent SMP
-unless ARCH_MIPS64 suppress dependent UNCACHED
+unless ARCH_IA32 or ARCH_POWERPC or ARCH_AMD64 suppress dependent SMP
 unless ARCH_IA32 and SMP suppress dependent SMP_IDLE_POLL
 
 
@@ -288,36 +265,27 @@ choices powerpc_platform
 	PLAT_OFPPC
 	default PLAT_OFPPC
 
-
 unless ARCH_POWERPC suppress dependent powerpc_platform
 
 choices x86_platform
 	PLAT_PC99
 	default PLAT_PC99
 
-
 unless ARCH_IA32 or ARCH_AMD64 suppress dependent x86_platform
 
 menu hardware_misc
 	IOAPIC { MAX_IOAPICS% APIC_TIMER_TICK% }
 	PPC_EXPOSE_OPIC
-	MAX_NUM_ASIDS%
-	PREEMPT_ASIDS
 	BOOTMEM_PAGES%
-	PROFILE_INTERVAL%
-	PROFILE_SIZE%
 	CPU_AMD64_SIMICS_SPEED%
 
 default MAX_IOAPICS from 2
 default APIC_TIMER_TICK from 1000
 default PPC_EXPOSE_OPIC from n
 unless ARCH_POWERPC suppress PPC_EXPOSE_OPIC
-when ARCH_POWERPC or ARCH_ALPHA or ARCH_MIPS64 or ARCH_ARM or ARCH_POWERPC64 or ARCH_SPARC64  suppress IOAPIC
-default MAX_NUM_ASIDS from 256
-default PREEMPT_ASIDS from n
+when ARCH_POWERPC or ARCH_POWERPC64 suppress IOAPIC
 default BOOTMEM_PAGES from 1024
-unless ARCH_MIPS64 or ARCH_ALPHA or ARCH_SPARC64  suppress MAX_NUM_ASIDS PREEMPT_ASIDS 
-unless ARCH_MIPS64 or ARCH_ALPHA or ARCH_SPARC64 or ARCH_POWERPC64 or ARCH_ARM suppress BOOTMEM_PAGES
+unless ARCH_POWERPC64 suppress BOOTMEM_PAGES
 default SMP_MAX_PROCS from 4
 default CPU_AMD64_SIMICS_SPEED from 100
 unless CPU_AMD64_SIMICS suppress CPU_AMD64_SIMICS_SPEED
@@ -351,9 +319,9 @@ default NEW_MDB from n
 unless EXPERIMENTAL suppress dependent experimental
 unless ARCH_POWERPC suppress PPC_BAT_SYSCALLS
 unless ARCH_POWERPC64 suppress PPC64_TRASH_OF
-unless CPU_IA32_I686 or CPU_IA32_P4 or CPU_IA32_K8 or ARCH_IA64 or ARCH_AMD64 suppress dependent PERFMON
-unless ARCH_IA64 or ARCH_POWERPC or ARCH_IA32 or ARCH_ALPHA or ARCH_MIPS64 or ARCH_AMD64 or ARCH_ARM suppress IPC_FASTPATH
-unless ARCH_ALPHA or ARCH_AMD64 or ARCH_IA32 or ARCH_IA64 or ARCH_SPARC64 suppress SPIN_WHEELS
+unless CPU_IA32_I686 or CPU_IA32_P4 or CPU_IA32_K8 or ARCH_AMD64 suppress dependent PERFMON
+unless ARCH_POWERPC or ARCH_IA32 or ARCH_AMD64 suppress IPC_FASTPATH
+unless ARCH_AMD64 or ARCH_IA32 suppress SPIN_WHEELS
 unless ARCH_IA32 or ARCH_AMD64 suppress NEW_MDB
 default K8_FLUSHFILTER from n
 unless CPU_AMD64_K8 or CPU_IA32_K8 suppress dependent K8_FLUSHFILTER
@@ -387,14 +355,12 @@ when ARCH_POWERPC64 suppress KDB_COMPORT KDB_COMSPEED
 unless ARCH_POWERPC suppress ppc_debug_consoles
 unless ARCH_POWERPC64 suppress ppc64_debug_consoles
 when ARCH_POWERPC64 suppress KDB_CONS_PSIM_COM
-when ARCH_MIPS64 or ARCH_ALPHA or ARCH_ARM or ARCH_SPARC64 suppress kdb_console KDB_COMPORT KDB_COMSPEED
-when ARCH_ALPHA or ARCH_ARM or ARCH_SPARC64 suppress KDB_DISAS
 default KDB_BREAKIN_ESCAPE from y
 default KDB_BREAKIN_BREAK from y
 unless PLAT_PC99 and KDB_BREAKIN and KDB_CONS_COM suppress dependent KDB_BREAKIN_BREAK KDB_BREAKIN_ESCAPE
 
 choices kdb_console
-	KDB_CONS_KBD KDB_CONS_COM KDB_CONS_SKI
+	KDB_CONS_KBD KDB_CONS_COM
 	default KDB_CONS_COM
 
 menu trace
@@ -430,14 +396,12 @@ menu main       # Configure the Pistachio kernel
 
 
 
-derive IS_32BIT from ARCH_IA32 or ARCH_POWERPC or ARCH_ARM or ARCH_MIPS32
-derive IS_64BIT from ARCH_IA64 or ARCH_ALPHA or ARCH_MIPS64 or ARCH_AMD64 or ARCH_POWERPC64 or ARCH_SPARC64
-derive BIGENDIAN from ARCH_POWERPC or ARCH_MIPS64 or ARCH_POWERPC64 or ARCH_SPARC64 or ARM_BIG_ENDIAN
-when MIPS64_LITTLE_ENDIAN suppress BIGENDIAN
+derive IS_32BIT from ARCH_IA32 or ARCH_POWERPC
+derive IS_64BIT from ARCH_AMD64 or ARCH_POWERPC64
+derive BIGENDIAN from ARCH_POWERPC or ARCH_POWERPC64
 derive CPU_K8 from CPU_AMD64_K8 or CPU_IA32_K8
 derive CPU_AMD64_EM64T from CPU_AMD64_P4
-derive ACPI from ARCH_IA64
-derive HAVE_MEMORY_CONTROL from ARCH_POWERPC64 or ARCH_MIPS64 or ARCH_ARM or ARCH_IA64
+derive HAVE_MEMORY_CONTROL from ARCH_POWERPC64
 require IO_FLEXPAGES implies IA32_SMALL_SPACES==n
 require IA32_SMALL_SPACES implies IO_FLEXPAGES==n
 derive FLUSHFILTER from CPU_K8 and K8_FLUSHFILTER
@@ -446,13 +410,7 @@ derive MULTI_ARCHITECTURE from ARCH_AMD64 and AMD64_COMPATIBILITY_MODE
 source "powerpc.cml"
 source "powerpc64.cml"
 source "ia32.cml"
-source "ia64.cml"
 source "amd64.cml"
-source "alpha.cml"
-source "mips64.cml"
-source "mips32.cml"
-source "arm.cml"
-source "sparc64.cml"
 
 #
 # here comes the real stuff
diff --git a/kernel/config/sparc64.cml b/kernel/config/sparc64.cml
deleted file mode 100644
index c2520298..00000000
--- a/kernel/config/sparc64.cml
+++ /dev/null
@@ -1,70 +0,0 @@
-######################################################################
-#		 
-# Copyright (C) 2003,  University of New South Wales
-#		 
-# File path:	 config/sparc64.cml
-# Description:	 Rules for Pistachio's SPARC v9 CML2 configuration system
-#		 
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions
-# are met:
-# 1. Redistributions of source code must retain the above copyright
-#    notice, this list of conditions and the following disclaimer.
-# 2. Redistributions in binary form must reproduce the above copyright
-#    notice, this list of conditions and the following disclaimer in the
-#    documentation and/or other materials provided with the distribution.
-# 
-# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-# ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-# SUCH DAMAGE.
-#		 
-# $Id: sparc64.cml,v 1.4 2004/06/28 07:10:42 philipd Exp $
-#		 
-######################################################################
-
-symbols
-
-ARCH_SPARC64		'SPARC v9'
-
-# Platform range
-
-sparc64_platform	'Platform'
-SPARC64_ULTRA1		'Sun Ultra 1 workstation'
-SPARC64_ULTRA10		'Sun Ultra 10 workstation'
-SPARC64_SUNFIRE		'Sun Enterprise 3500-6500 server'
-
-choices sparc64_platform
-	SPARC64_ULTRA1
-	SPARC64_ULTRA10
-	SPARC64_SUNFIRE
-	default SPARC64_ULTRA10
-
-unless ARCH_SPARC64 suppress dependent sparc64_platform
-
-# OpenBoot (Open Firmware std) platforms
-
-derive PLAT_OFSPARC64 from SPARC64_ULTRA1 or SPARC64_ULTRA10 or SPARC64_SUNFIRE
-
-# UltraSPARC CPUs
-
-derive SPARC64_ULTRASPARC2 from SPARC64_ULTRA10 or SPARC64_SUNFIRE
-derive SPARC64_ULTRASPARC1 from SPARC64_ULTRA1
-
-derive SPARC64_ULTRASPARC2I from SPARC64_ULTRA10
-
-# CPU types
-
-derive CPU_SPARC64_ULTRASPARC from SPARC64_ULTRASPARC1 or SPARC64_ULTRASPARC2 # or SPARC64_ULTRASPARC3
-
-# Serial port types
-derive SPARC64_SAB82532 from SPARC64_ULTRA10
-derive SPARC64_Z8530 from SPARC64_SUNFIRE
-
diff --git a/kernel/kdb/arch/alpha/Makeconf b/kernel/kdb/arch/alpha/Makeconf
deleted file mode 100644
index 17360553..00000000
--- a/kernel/kdb/arch/alpha/Makeconf
+++ /dev/null
@@ -1,2 +0,0 @@
-
-SOURCES += ${addprefix kdb/arch/alpha/, console.cc dispatch.S prepost.cc alpha.cc user.cc}
diff --git a/kernel/kdb/arch/alpha/alpha.cc b/kernel/kdb/arch/alpha/alpha.cc
deleted file mode 100644
index 1ce77735..00000000
--- a/kernel/kdb/arch/alpha/alpha.cc
+++ /dev/null
@@ -1,104 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     pistachio/cvs/kernel/kdb/arch/alpha/alpha.cc
- * Description:   Alpha specific debug functionality 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: alpha.cc,v 1.4 2004/06/02 08:41:41 sgoetz Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <linear_ptab.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-#include INC_ARCH(palcalls.h)
-#include INC_API(config.h)
-#include INC_API(space.h)
-#include INC_ARCH(pgent.h)
-#include INC_GLUE(intctrl.h)
-#include INC_API(tcb.h)
-
-
-DECLARE_CMD (cmd_halt, root, 'h', "halt", "halt system");
-
-CMD(cmd_halt, cg)
-{
-    PAL::halt();
-
-    return CMD_NOQUIT;
-}
-
-DECLARE_CMD (cmd_irq, arch, 'i', "irq", "Display IRQ status");
-
-CMD(cmd_irq, cg)
-{
-    get_interrupt_ctrl()->print_status();
-
-    return CMD_NOQUIT;    
-}
-
-DECLARE_CMD (cmd_frame, arch, 'f', "frame", "Display user exception frame");
-
-static void SECTION(SEC_KDEBUG) dump_frame(tcb_t *tcb)
-{
-    alpha_context_t *ctx = get_alpha_context(tcb);
-
-    printf("=== ID: %t =======================\n", tcb);
-    printf(" PS: %p     PC: %p     GP: %p\n", ctx->ps, ctx->pc, ctx->gp);  
-    printf(" a0: %p     a1: %p     a2: %p\n", ctx->a0, ctx->a1, ctx->a2);  
-}
-
-extern tcb_t *kdb_get_tcb();
-
-CMD(cmd_frame, cg)
-{
-    tcb_t * tcb = kdb_get_tcb();
-    if (tcb)
-	dump_frame(tcb);
-
-    return CMD_NOQUIT;    
-}
-
-DECLARE_CMD (cmd_pcb, arch, 'p', "pcb", "Display a thread's pcb.");
-
-static void SECTION(SEC_KDEBUG) dump_pcb(tcb_t *tcb)
-{
-    alpha_pcb_t *pcb = &tcb->get_arch()->pcb;
-
-    printf("=== ID: %p =======================\n", tcb);
-    printf(" KSP: %p     USP   : %p     PTBR  : %p\n", pcb->ksp, pcb->usp, pcb->ptbr); 
-    printf(" ASN: %d     Cycles: %d     Unique: %p\n", pcb->asn, pcb->pcc, pcb->unique);  
-    printf(" Flags: FP %s, PM %s\n", (pcb->flags & 0x1) ? "enabled" : "disabled", (pcb->flags & 0x1ull << 62) ? "enabled" : "disabled");
-}
-    
-CMD(cmd_pcb, cg)
-{
-    tcb_t * tcb = kdb_get_tcb();
-    if (tcb)
-	dump_pcb(tcb);
-
-    return CMD_NOQUIT;    
-}
diff --git a/kernel/kdb/arch/alpha/console.cc b/kernel/kdb/arch/alpha/console.cc
deleted file mode 100644
index 27be4ef2..00000000
--- a/kernel/kdb/arch/alpha/console.cc
+++ /dev/null
@@ -1,204 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     kdb/arch/alpha/console.cc
- * Description:   Console routine for Alpha systems  
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: console.cc,v 1.12 2004/03/17 19:13:23 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/cmd.h>
-#include <kdb/console.h>
-
-#include INC_ARCH(hwrpb.h)
-#include INC_ARCH(console.h)
-#include INC_ARCH(palcalls.h)
-#include INC_GLUE(config.h)
-
-
-static unsigned long cons_dev;
-
-unsigned long hwrpb_vaddr = HWRPB_VADDR;
-
-/* Takes a varied number of args */
-extern "C" unsigned long dispatch(word_t a0, word_t a1, word_t a2, word_t a3, struct hwrpb *hwrpb);
-
-static struct hwrpb *hwrpb_to_use = NULL;
-
-extern void halt(void);
-
-void halt(void)
-{
-    PAL::halt();
-}
-
-/* we use this so that we can do without the ctype library */
-#define is_digit(c)     ((c) >= '0' && (c) <= '9')
-#define is_xdigit(c) \
-  (is_digit(c) || ((c) >= 'A' && (c) <= 'F') || ((c) >= 'a' && (c) <= 'f'))
-#define is_lower(c)     (((c) >= 'a') && ((c) <= 'z'))
-#define to_upper(c)     ((c) + 'a' - 'A')
-
-unsigned long simple_strtoul(const char *cp, char **endp, unsigned int base)
-{
-        unsigned long result = 0, value;
-
-        if (!base) {
-                base = 10;
-                if (*cp == '0') {
-                        base = 8;
-                        cp++;
-                        if ((*cp == 'x') && is_xdigit(cp[1])) {
-                                cp++;
-                                base = 16;
-                        }
-                }
-        }
-        while (is_xdigit(*cp)
-               && (value =
-                   (is_digit(*cp)
-                    ? *cp - '0' : ((is_lower(*cp)
-                                    ? to_upper(*cp) : *cp) - 'A' + 10)))
-                   < base)
-        {
-                result = result*base + value;
-                cp++;
-        }
-        if (endp)
-                *endp = (char *)cp;
-        return result;
-}
-
-static long cons_puts(const char *str, long len)
-{
-	long remaining, written;
-	union ccb_stsdef {
-		long int l_sts;
-		struct {
-			int written;
-			unsigned discard : 29;
-			unsigned v_sts0  : 1;
-			unsigned v_sts1  : 1;
-			unsigned v_err   : 1;
-		} s;
-	} ccb_sts;
-	
-	for (remaining = len; remaining; remaining -= written) {
-		ccb_sts.l_sts = dispatch((word_t) CCB_PUTS, cons_dev, (word_t) str, remaining, hwrpb_to_use);
-		if (!ccb_sts.s.v_err) {
-			written = ccb_sts.s.written;
-			str += written;
-		} else {
-			if (ccb_sts.s.v_sts1)
-				halt();		/* This is a hard error */
-			written = 0;
-		}
-	}
-	return len;
-}
-
-void putc_srm(char c)
-{
-	char buf[2];
-
-	buf[0] = c;
-	buf[1] = 0;
-	cons_puts(buf,1);
-	if (c == '\n')
-	    putc_srm('\r');
-}
-
-long getc_srm_nonblock(void)
-{
-    return dispatch((word_t) CCB_GETC, cons_dev, 0, 0, hwrpb_to_use);
-}
-
-char getc_srm(bool block)
-{
-    long c;
-    
-    while ((c = getc_srm_nonblock()) < 0)
-	;
-    return c;
-}
-
-static long cons_getenv(long index, char *envval, long maxlen)
-{
-	long len = dispatch((word_t) CCB_GET_ENV, index, (word_t) envval, maxlen - 1, hwrpb_to_use);
-	return len;
-}
-
-#if 0
-static long cons_open(const char *devname)
-{
-	return dispatch((word_t) CCB_OPEN, devname, strlen(devname), 0, hwrpb_to_use);
-}
-
-static long cons_close(long dev)
-{
-	return dispatch((word_t) CCB_CLOSE, dev, 0, 0, hwrpb_to_use);
-}
-#endif
-
-#if defined(CONFIG_KDB_BREAKIN)
-void SECTION(".kdebug") kdebug_check_breakin(void)
-{
-    switch(getc_srm_nonblock()) {
-    case '\e': /* ESC*/
-	enter_kdebug("KDB Breakin");
-	return;
-	
-    default:
-    case -1:
-	return;
-    }	
-}
-#endif
-
-void init_srm(void)
-{
-	static char envval[256];
-
-	if(hwrpb_to_use == NULL) {
-	    hwrpb_to_use = INIT_HWRPB;
-
-	    if (cons_getenv(ENV_TTY_DEV, (char *) envval, sizeof(envval) * 8) < 0) {
-		halt();		/* better than random crash */
-	    }
-
-	    cons_dev = simple_strtoul((char *) envval, 0, 10);
-	} else {
-	    hwrpb_to_use = (struct hwrpb *) CONSOLE_AREA_START;
-	}
-}
-word_t kdb_current_console = 0;
-
-kdb_console_t kdb_consoles[] = {
-    { "SRM", &init_srm, &putc_srm, &getc_srm },
-    KDB_NULL_CONSOLE
-};
diff --git a/kernel/kdb/arch/alpha/dispatch.S b/kernel/kdb/arch/alpha/dispatch.S
deleted file mode 100644
index 09373dcf..00000000
--- a/kernel/kdb/arch/alpha/dispatch.S
+++ /dev/null
@@ -1,74 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     kdb/platform/dp264/dispatch.S
- * Description:   Dispatch routine.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: dispatch.S,v 1.4 2003/09/24 19:05:04 skoglund Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_GLUE(config.h)
-#include INC_ARCH(pal.h)
-		
-BEGIN_PROC(dispatch)
-	.prologue 0
-	subq	$30,80,$30
-	stq	$26,0($30)
-	stq	$29,8($30)
-
-	stq	$8,16($30)	/* OpenVMS save regs */
-	stq	$9,24($30)
-	stq	$10,32($30)
-	stq	$11,40($30)
-	stq	$12,48($30)
-	stq	$13,56($30)
-	stq	$14,64($30)
-	stq	$15,72($30)
-
-	mov	$20, $1         	/* HWRPB in a4 */	
-	ldq	$2,0xc0($1)		/* crb offset */
-	addq	$2,$1,$2		/* crb */
-	ldq	$27,0($2)		/* dispatch procedure value */
-	
-	ldq	$2,8($27)		/* dispatch call address */
-	jsr	$26,($2)		/* call it (weird VMS call seq) */
-
-	ldq	$26,0($30)
-	ldq	$29,8($30)
-
-	ldq	$8,16($30)
-	ldq	$9,24($30)
-	ldq	$10,32($30)
-	ldq	$11,40($30)
-	ldq	$12,48($30)
-	ldq	$13,56($30)
-	ldq	$14,64($30)
-	ldq	$15,72($30)
-
-	addq	$30,80,$30
-	ret	$31,($26)
-END_PROC(dispatch)
diff --git a/kernel/kdb/arch/alpha/prepost.cc b/kernel/kdb/arch/alpha/prepost.cc
deleted file mode 100644
index 746bc41c..00000000
--- a/kernel/kdb/arch/alpha/prepost.cc
+++ /dev/null
@@ -1,39 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     kdb/arch/alpha/prepost.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: prepost.cc,v 1.4 2003/09/24 19:05:04 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <kdb/kdb.h>
-#include INC_ARCH(palcalls.h)
-
-/* sjw (30/07/2002): This is stupid --- do something here! */
-bool kdb_t::pre() { PAL::swpipl(PAL::IPL_highest); return true; }
-void kdb_t::post() { }
-
diff --git a/kernel/kdb/arch/alpha/user.cc b/kernel/kdb/arch/alpha/user.cc
deleted file mode 100644
index 38223f30..00000000
--- a/kernel/kdb/arch/alpha/user.cc
+++ /dev/null
@@ -1,64 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2004,  University of New South Wales
- *                
- * File path:     kdb/arch/alpha/user.cc
- * Description:   User debugger support
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: user.cc,v 1.5 2004/03/17 19:12:23 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/console.h>
-
-/* sjw (26/08/2002): Put these somewhere decent */
-#define KDB_PUTC 0
-#define KDB_GETC 1
-#define KDB_ENTER 2
-
-/* this is invoked by the enterIF handler when the user does a gentrap palcall */
-word_t handle_user_trap(word_t type, word_t arg)
-{
-    word_t dummy;
-
-    switch(type) {
-    case KDB_PUTC:
-	putc(arg);
-	return 0;
-
-    case KDB_GETC:
-	return getc();
-
-    case KDB_ENTER:
-	printf("%s\n", arg);
-	kdebug_entry(&dummy);
-	return 0;
-	
-    default:
-	break;
-    }
-
-    return -1UL;
-}
diff --git a/kernel/kdb/arch/arm/Makeconf b/kernel/kdb/arch/arm/Makeconf
deleted file mode 100644
index 6691a36c..00000000
--- a/kernel/kdb/arch/arm/Makeconf
+++ /dev/null
@@ -1,4 +0,0 @@
-SOURCES += $(addprefix kdb/arch/$(ARCH)/, entry.S prepost.cc frame.cc )
-
-SOURCES +=	kdb/generic/linear_ptab_dump.cc \
-		kdb/generic/mapping.cc
diff --git a/kernel/kdb/arch/arm/entry.S b/kernel/kdb/arch/arm/entry.S
deleted file mode 100644
index 7492efd2..00000000
--- a/kernel/kdb/arch/arm/entry.S
+++ /dev/null
@@ -1,91 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     kdb/arch/arm/entry.S
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: entry.S,v 1.8 2004/09/07 20:12:40 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(thread.h)
-
-/**********************************************************************
-	kdebug entry
- **********************************************************************/
-	
-
-	.section .kdebug
-3:	.word	_Z12kdebug_entryPv
-
-	.globl	kern_kdebug_entry
-kern_kdebug_entry:
-	stmdb	sp, {r0-r14}^
-	nop
-	sub	sp, sp, #PT_SIZE
-	str	lr, [sp, #PT_PC]
-	mrs	lr, cpsr
-	str	lr, [sp, #PT_KLR]
-	mrs	lr, spsr
-	str	lr, [sp, #PT_CPSR]
-
-	adr	r0, _kdebug_str
-        bl      printf
-
-	mov	r0, sp
-	
-	/* use kdebug's own stack */
-	ldr	sp, _kdebug_stack
-	stmdb	sp!, {r0}
-	adr	lr, 1f
-	ldr	pc, 3b
-1:
-	ldr	sp, _kdebug_stack
-	ldr	sp, [sp, #-4]
-
-	ldr	lr, [sp, #PT_KLR]
-	msr	cpsr, lr
-	ldr	lr, [sp, #PT_CPSR]
-	msr	spsr, lr
-	add	sp, sp, #PT_SIZE
-	ldmdb	sp, {r0-r14}^
-	nop
-	ldr	lr, [sp, #PT_PC-PT_SIZE]
-	mov	pc, lr
-
-	.globl	_kdebug_stack
-_kdebug_stack:
-	.word	_kdebug_stack_top
-
-_kdebug_str:
-	.string	"--- KD# %s ---\n" 
-
-	/* alignment so that stack looks like a tcb. NB space_t field should be NULL */
-	.align	12
-	.globl	_kdebug_stack_bottom
-_kdebug_stack_bottom:
-	.space	1024
-_kdebug_stack_top:
-
diff --git a/kernel/kdb/arch/arm/frame.cc b/kernel/kdb/arch/arm/frame.cc
deleted file mode 100644
index 3ea757ab..00000000
--- a/kernel/kdb/arch/arm/frame.cc
+++ /dev/null
@@ -1,143 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  National ICT Australia (NICTA)
- *                
- * File path:     kdb/arch/arm/frame.cc
- * Description:   Exception frame dumping
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: frame.cc,v 1.3 2004/12/09 01:24:41 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_ARCH(thread.h)
-#include INC_API(tcb.h)
-
-extern tcb_t * kdb_get_tcb();
-
-void SECTION(SEC_KDEBUG) arm_dump_frame(arm_irq_context_t *context)
-{
-    printf ("== Stack frame: %p == \n", context);
-    printf ("cpsr = %8lx, pc = %8lx, sp  = %8lx, lr  = %8lx\n", context->cpsr, context->pc, context->sp, context->lr);
-    printf ("r0  = %8lx, r1  = %8lx, r2  = %8lx, r3  = %8lx, r4  = %8lx\n", context->r0, context->r1, context->r2, context->r3, context->r4);
-    printf ("r5  = %8lx, r6  = %8lx, r7  = %8lx, r8  = %8lx, r9  = %8lx\n", context->r5, context->r6, context->r7, context->r8, context->r9);
-    printf ("r10 = %8lx, r11 = %8lx, r12 = %8lx\n", context->r10, context->r11, context->r12);
-}
-
-/**
- * cmd_dump_current_frame: show exception frame of current thread
- */
-DECLARE_CMD (cmd_dump_current_frame, root, ' ', "frame",
-	     "show current user exception frame");
-
-CMD (cmd_dump_current_frame, cg)
-{
-    arm_irq_context_t *frame = (arm_irq_context_t *)(kdb.kdb_param);
-
-    arm_dump_frame(frame);
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * cmd_dump_frame: show exception frame
- */
-DECLARE_CMD (cmd_dump_frame, root, 'F', "dumpframe",
-	     "show exception frame");
-
-
-arm_irq_context_t SECTION(SEC_KDEBUG) * get_frame()
-{
-    space_t * space = get_current_space();
-    if (!space) space = get_kernel_space();
-    word_t val = get_hex("tcb/tid/addr", (word_t)space->get_tcb(kdb.kdb_param), "current");
-    arm_irq_context_t * frame;
-
-    if (val == ABORT_MAGIC)
-	return NULL;
-
-    if (!space->is_tcb_area((addr_t)val) &&
-	((val & (~0xffful)) != (word_t)get_idle_tcb()))
-    {
-	threadid_t tid;
-	tid.set_raw(val);
-	frame = (arm_irq_context_t *)((word_t)space->get_tcb(tid) + KTCB_SIZE);
-	frame --;
-    } else
-    {
-	frame = (arm_irq_context_t *)val;
-	if (frame == (arm_irq_context_t *) addr_to_tcb ((addr_t) val))
-	{
-	    frame = (arm_irq_context_t *)((word_t)frame + KTCB_SIZE);
-	    frame --;
-	}
-    }
-    return frame;
-
-}
-
-CMD (cmd_dump_frame, cg)
-{
-    arm_irq_context_t *frame = get_frame();
-
-    if (frame)
-	arm_dump_frame(frame);
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * cmd_find_frame: search for an exception frame
- */
-DECLARE_CMD (cmd_find_frame, root, 's', "findframe",
-	     "search for an exception frame");
-
-CMD (cmd_find_frame, cg)
-{
-    arm_irq_context_t *frame, *search;
-    word_t *addr;
-    tcb_t * tcb = kdb_get_tcb();
-
-    if (tcb)
-    {
-	tcb = (tcb_t *)((word_t)tcb + KTCB_SIZE);
-	frame = (arm_irq_context_t *) (tcb) - 1;
-
-	for (addr = (word_t *) frame; (word_t) addr >= (word_t) frame - 2048;
-			addr --)
-	{
-	   search = (arm_irq_context_t *)addr;
-	   if ((search->cpsr & 0x07ffffdf) == 0x00000010)
-		arm_dump_frame(search);
-	}
-    }
-
-    return CMD_NOQUIT;
-}
-
diff --git a/kernel/kdb/arch/arm/prepost.cc b/kernel/kdb/arch/arm/prepost.cc
deleted file mode 100644
index bee59393..00000000
--- a/kernel/kdb/arch/arm/prepost.cc
+++ /dev/null
@@ -1,44 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     kdb/arch/arm/prepost.cc
- * Description:   Entry and exit hooks for kernel debugger
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: prepost.cc,v 1.3 2004/02/23 03:39:27 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-bool kdb_t::pre (void)
-{
-    /* enter interactive mode */
-    return true;
-}
-
-void kdb_t::post (void)
-{
-
-}
diff --git a/kernel/kdb/arch/ia64/Makeconf b/kernel/kdb/arch/ia64/Makeconf
deleted file mode 100644
index dd342fe3..00000000
--- a/kernel/kdb/arch/ia64/Makeconf
+++ /dev/null
@@ -1,25 +0,0 @@
-SOURCES+=	kdb/arch/ia64/breakpoints.cc \
-		kdb/arch/ia64/cache.cc \
-		kdb/arch/ia64/ctrl.cc \
-		kdb/arch/ia64/cpuid.cc \
-		kdb/arch/ia64/frame.cc \
-		kdb/arch/ia64/interrupts.cc \
-		kdb/arch/ia64/io.cc \
-		kdb/arch/ia64/pkrs.cc \
-		kdb/arch/ia64/prepost.cc \
-		kdb/arch/ia64/rrs.cc \
-		kdb/arch/ia64/tlb.cc \
-		kdb/arch/ia64/singlestep.cc \
-		kdb/arch/ia64/sal.cc
-
-ifeq ("$(CONFIG_PERFMON)","y")
-SOURCES+=	kdb/arch/ia64/perf.cc
-endif
-
-ifeq ("$(CONFIG_KDB_DISAS)","y")
-SOURCES+=	kdb/arch/ia64/disas.cc kdb/arch/ia64/ia64-dis.c	\
-		kdb/generic/sprintf.cc	
-endif
-
-SOURCES+=	kdb/generic/linear_ptab_dump.cc \
-		kdb/generic/mapping.cc
diff --git a/kernel/kdb/arch/ia64/breakpoints.cc b/kernel/kdb/arch/ia64/breakpoints.cc
deleted file mode 100644
index 56ec3124..00000000
--- a/kernel/kdb/arch/ia64/breakpoints.cc
+++ /dev/null
@@ -1,287 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003, 2005,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/breakpoints.cc
- * Description:   IA-64 data and instruction breakpoints
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: breakpoints.cc,v 1.8 2005/06/06 16:01:07 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_ARCH(pal.h)
-#include INC_ARCH(breakpoint.h)
-#include INC_GLUE(context.h)
-#include INC_API(tcb.h)
-
-
-void set_psr_bits (threadid_t thread, bool db);
-
-static void init_numregs (void);
-static cmd_ret_t set_breakpoint (word_t type);
-static cmd_ret_t clr_breakpoint (word_t type);
-
-static word_t num_iregs = 0;
-static word_t num_dregs = 0;
-
-static bool global_bp = false;
-
-
-DECLARE_CMD_GROUP (breakpoints);
-
-
-/**
- * IA-64 breakpoint management.
- */
-DECLARE_CMD (cmd_breakpoints, root, 'b', "breakpoint",
-	     "breakpoint management");
-
-CMD (cmd_breakpoints, cg)
-{
-    return breakpoints.interact (cg, "breakpoint");
-}
-
-
-/**
- * Set data breakpoint.
- */
-DECLARE_CMD (cmd_dbr_set, breakpoints, 'd', "dset", "set data breakpoint");
-
-CMD (cmd_dbr_set, cg)
-{
-    return set_breakpoint ('d');
-}
-
-/**
- * Set instruction breakpoint.
- */
-DECLARE_CMD (cmd_ibr_set, breakpoints, 'i', "iset",
-	     "set instruction breakpoint");
-
-CMD (cmd_ibr_set, cg)
-{
-    return set_breakpoint ('i');
-}
-
-
-static cmd_ret_t set_breakpoint (word_t type)
-{
-    ia64_exception_context_t * frame = 
-	(ia64_exception_context_t *) kdb.kdb_param;
-
-    if (num_iregs == 0)
-	init_numregs ();
-
-    word_t regs = type == 'i' ? num_iregs : num_dregs;
-    word_t reg;
-
-    // Get breakpoint register number
-    do {
-	printf ("Number pair (%d-%d): ", 0, regs-1);
-	if ((reg = get_hex (NULL, regs, "")) == ABORT_MAGIC)
-	    return CMD_NOQUIT;
-    } while (reg >= regs);
-
-    // Get breakpoint trigger address
-    addr_t addr = (addr_t) get_hex ("Address", 0);
-    if ((word_t) addr == ABORT_MAGIC)
-	return CMD_NOQUIT;
-
-    // Get privilege level
-    breakpoint_t::priv_e priv = breakpoint_t::both;
-    switch (get_choice ("Privilege", "User/Kernel/Both", 'b'))
-    {
-    case 'u': priv = breakpoint_t::user;   break;
-    case 'k': priv = breakpoint_t::kernel; break;
-    case 'b': priv = breakpoint_t::both;   break;
-    }
-
-    // Enable breakpoints.
-    tcb_t * tcb = kdb.kdb_current;
-    if (get_choice ("Context", "All threads/Single thread", 'a') == 'a')
-    {
-	tcb->resources.enable_global_breakpoint (tcb);
-	global_bp = true;
-    }
-    else
-    {
-	tcb = get_thread ("Thread");
-	ia64_exception_context_t * user_frame =
-	    (ia64_exception_context_t *) tcb->get_stack_top () - 1;
-	ia64_switch_context_t * kernel_frame =
-	    (ia64_switch_context_t *) tcb->stack;
-
-	if (global_bp)
-	    tcb->resources.disable_global_breakpoint (tcb);
-	global_bp = false;
-
-	user_frame->ipsr.db = kernel_frame->psr.db = 1;
-
-    }
-
-    if (tcb == kdb.kdb_current)
-	frame->ipsr.db = 1;
-
-    // Set breakpoint registers
-    if (type == 'i')
-    {
-	instr_breakpoint_t ibr (addr, ~0UL, priv, true);
-	ibr.put (reg);
-    }
-    else
-    {
-	char acc = get_choice ("Access", "Read/Write/Both", 'b');
-	data_breakpoint_t dbr (addr, ~0UL, priv,
-			       acc == 'w' || acc == 'b',
-			       acc == 'r' || acc == 'b');
-	dbr.put (reg);
-    }
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * Disable data breakpoint.
- */
-DECLARE_CMD (cmd_dbr_clr, breakpoints, 'D', "dclr",
-	     "disable data breakpoint");
-
-CMD (cmd_dbr_clr, cg)
-{
-    return clr_breakpoint ('d');
-}
-
-/**
- * Disable instruction breakpoint.
- */
-DECLARE_CMD (cmd_ibr_clr, breakpoints, 'I', "iclr",
-	     "disable instruction breakpoint");
-
-CMD (cmd_ibr_clr, cg)
-{
-    return clr_breakpoint ('i');
-}
-
-static cmd_ret_t clr_breakpoint (word_t type)
-{
-    ia64_exception_context_t * frame = 
-	(ia64_exception_context_t *) kdb.kdb_param;
-    ia64_exception_context_t * user_frame =
-	(ia64_exception_context_t *) kdb.kdb_current->get_stack_top () - 1;
-
-    if (num_iregs == 0)
-	init_numregs ();
-
-    word_t regs = type == 'i' ? num_iregs : num_dregs;
-    word_t reg;
-
-    // Get breakpoint register number
-    do {
-	printf ("Number pair (%d-%d): ", 0, regs-1);
-	if ((reg = get_hex (NULL, regs, "")) == ABORT_MAGIC)
-	    return CMD_NOQUIT;
-    } while (reg >= regs);
-
-    // Disable breakpoint registers
-    if (type == 'i')
-    {
-	instr_breakpoint_t ibr = get_ibr (reg);
-	ibr.disable ();
-	ibr.put (reg);
-    }
-    else
-    {
-	data_breakpoint_t dbr = get_dbr (reg);
-	dbr.disable ();
-	dbr.put (reg);
-    }
-
-    if (global_bp)
-	kdb.kdb_current->resources.disable_global_breakpoint (kdb.kdb_current);
-    global_bp = false;
-
-    // Disable breakpoints
-    frame->ipsr.db = user_frame->ipsr.db = 0;
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * List all breakpoints
- */
-DECLARE_CMD (cmd_bp_list, breakpoints, 'l', "list", "list breakpoints");
-
-CMD (cmd_bp_list, cg)
-{
-    if (num_iregs == 0)
-	init_numregs ();
-
-    printf ("Instruction breakpoints:\n");
-    for (word_t i = 0; i < num_iregs; i++)
-    {
-	instr_breakpoint_t ibr = get_ibr (i);
-	printf ("  ibr[%d]%s = addr: %p,  mask: %p,  priv: %s  %s\n",
-		i, i >= 10 ? "" : " ",
-		ibr.get_address (), ibr.get_mask (),
-		ibr.get_priv () == breakpoint_t::kernel ? "kernel, " :
-		ibr.get_priv () == breakpoint_t::user ? "user,   " :
-		ibr.get_priv () == breakpoint_t::both ? "both,   " :
-		"unknown,",
-		ibr.is_active () ? "active" : "inactive");
-    }
-
-    printf ("Data breakpoints:\n");
-    for (word_t i = 0; i < num_dregs; i++)
-    {
-	data_breakpoint_t dbr = get_dbr (i);
-	printf ("  dbr[%d]%s = addr: %p,  mask: %p,  priv: %s  %s\n",
-		i, i >= 10 ? "" : " ",
-		dbr.get_address (), dbr.get_mask (),
-		dbr.get_priv () == breakpoint_t::kernel ? "kernel, " :
-		dbr.get_priv () == breakpoint_t::user ? "user,   " :
-		dbr.get_priv () == breakpoint_t::both ? "both,   " :
-		"unknown,",
-		dbr.is_active () ?
-		dbr.is_read_match () ? dbr.is_write_match () ?
-		"read/write" : "read" : "write" : "inactive");
-    }
-
-    return CMD_NOQUIT;
-}
-
-
-static void init_numregs (void)
-{
-    pal_status_e status;
-
-    if ((status = pal_debug_info (&num_iregs, &num_dregs)) != PAL_OK)
-    {
-	printf ("Error: PAL_DEBUG_INFO => %d\n", status);
-    }
-}
diff --git a/kernel/kdb/arch/ia64/cache.cc b/kernel/kdb/arch/ia64/cache.cc
deleted file mode 100644
index 89550cd2..00000000
--- a/kernel/kdb/arch/ia64/cache.cc
+++ /dev/null
@@ -1,147 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/cache.cc
- * Description:   IA-64 cache info/managemnt commands
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cache.cc,v 1.5 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/cmd.h>
-#include INC_ARCH(pal.h)
-
-
-
-DECLARE_CMD_GROUP (ia64_cache);
-
-
-/**
- * cmd_ia64_cache: IA-64 cache management
- */
-DECLARE_CMD (cmd_ia64_cache, arch, 'c', "cache", "cache management");
-
-CMD(cmd_ia64_cache, cg)
-{
-    return ia64_cache.interact (cg, "cache");
-}
-
-
-/**
- * cmd_ia64_cache_info: dump cache information
- */
-DECLARE_CMD (cmd_ia64_cache_info, ia64_cache, 'i', "info", "dump cache info");
-
-CMD(cmd_ia64_cache_info, cg)
-{
-    pal_cache_summary_t summary;
-    pal_cache_info_t info;
-    pal_status_e status;
-
-    if ((status = pal_cache_summary (&summary)) != PAL_OK)
-    {
-	printf ("Error: PAL_CACHE_SUMMARY => %d\n", status);
-	return CMD_NOQUIT;
-    }
-
-    printf ("Cache info:\n");
-    pal_cache_info_t::type_e type = pal_cache_info_t::code;
-
-    const static char *hints[] = {
-	"Temp L1", "Non-Temp L1", "bit2", "Non-Temp all levels",
-	"bit4", "bit5", "bit6", "bit7"
-    };
-
-
-    do {
-
-	for (word_t i = 0; i < summary.cache_levels; i++)
-	{
-	    if ((status = pal_cache_info (i, type, &info)) != PAL_OK)
-		continue;
-
-	    printf ("  L%d %c-Cache: ",
-		    i+1, info.unified ? 'U' :
-		    type == pal_cache_info_t::code ? 'I' : 'D');
-
-	    printf ("%3d%cB ",
-		    info.cache_size > GB (1) ? info.cache_size >> 30 :
-		    info.cache_size > MB (1) ? info.cache_size >> 20 :
-		    info.cache_size >> 10,
-		    info.cache_size > GB (1) ? 'G' :
-		    info.cache_size > MB (1) ? 'M' : 'K');
-
-	    if (info.associativity == 0)
-		printf ("fully assoc, ");
-	    else if (info.associativity == 1)
-		printf ("direct, ");
-	    else
-		printf ("%d-way, ", info.associativity);
-
-	    if (info.attributes == 0)
-		printf ("write-through, ");
-	    else if (info.attributes == 1)
-		printf ("write-back, ");
-
-	    printf ("line size: %d, ", (1UL << info.line_size));
-	    printf ("stride: %d, ", (1UL << info.stride));
-	    printf ("tag bits: %d-%d, ", info.tag_ls_bit, info.tag_ms_bit);
-	    printf ("alias boundary: %d", info.alias_boundary);
-
-	    printf ("\n                    ");
-
-	    printf ("[ld.latancy: %d, ld.hints:", info.load_latency);
-	    for (word_t k = 0; k < 8; k++)
-		if (info.load_hints & (1 << k))
-		    printf (" %s,", hints[k]);
-	    if (info.load_hints == 0)
-		printf (" none ");
-	    printf ("\b]  ");
-
-	    if (info.store_latency != 0xff)
-	    {
-		printf ("[st.latancy: %d, st.hints:", info.store_latency);
-		for (word_t k = 0; k < 8; k++)
-		    if (info.store_hints & (1 << k))
-			printf (" %s,", hints[k]);
-		if (info.store_hints == 0)
-		    printf (" none ");
-		printf ("\b]");
-	    }
-	    printf ("\n");
-	}
-
-	if (type == pal_cache_info_t::code)
-	    type = pal_cache_info_t::data;
-	else
-	    type = pal_cache_info_t::none;
-
-    } while (type != pal_cache_info_t::none);
-
-
-    return CMD_NOQUIT;
-}
-
diff --git a/kernel/kdb/arch/ia64/cpuid.cc b/kernel/kdb/arch/ia64/cpuid.cc
deleted file mode 100644
index a689cdb1..00000000
--- a/kernel/kdb/arch/ia64/cpuid.cc
+++ /dev/null
@@ -1,68 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/cpuid.cc
- * Description:   IA-64 CPUID
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cpuid.cc,v 1.3 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_ARCH(cpuid.h)
-
-
-/**
- * cmd_dpuid: dump CPU ID
- */
-DECLARE_CMD (cmd_cpuid, arch, 'C', "cpuid", "dump CPUID");
-
-CMD (cmd_cpuid, cg)
-{
-    printf ("CPUID:\n");
-    printf ("  Vendor:       %s\n"
-	    "  Serial num:   %p\n",
-	    cpuid_vendor_info (), cpuid_serial_number ());
-
-    cpuid_version_info_t info = cpuid_version_info ();
-
-    printf ("  Version:      %p "
-	    "[Stepping %c%d,  Model %d,  Family %d,  Archrev %d]\n",
-	    info.raw,
-	    (info.revision >> 1) + 'A' - 1, (info.revision & 0x1),
-	    info.model, info.family, info. archrev);
-
-
-    printf ("  cpuid[4]:     %p [%s]\n", cpuid_get (4),
-	    cpuid_get (4) & 1 ? "lb" : "");
-
-    for (word_t i = 5; i <= info.number; i++)
-    {
-	printf ("  cpuid[%d]:     %p\n", i, cpuid_get (i));
-    }
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/ia64/ctrl.cc b/kernel/kdb/arch/ia64/ctrl.cc
deleted file mode 100644
index d1fbb39f..00000000
--- a/kernel/kdb/arch/ia64/ctrl.cc
+++ /dev/null
@@ -1,198 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/ctrl.cc
- * Description:   Control register access
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ctrl.cc,v 1.8 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-
-#include INC_ARCH(psr.h)
-#include INC_ARCH(cr.h)
-#include INC_ARCH(ar.h)
-
-
-void ia64_dump_psr (psr_t psr);
-
-
-/**
- * cmd_ctrl_regs: dump control registers
- */
-DECLARE_CMD (cmd_ctrl_regs, arch, 'R', "ctrlregs", "dump control registers");
-
-CMD (cmd_ctrl_regs, cg)
-{
-    psr_t	psr  = get_psr ();
-    psr_t	ipsr = cr_get_ipsr ();
-    cr_dcr_t	dcr  = cr_get_dcr ();
-    cr_pta_t	pta  = cr_get_pta ();
-    cr_isr_t	isr  = cr_get_isr ();
-    cr_itir_t	itir = cr_get_itir ();
-    cr_ifs_t	ifs  = cr_get_ifs ();
-    cr_lid_t	lid  = cr_get_lid ();
-    cr_tpr_t	tpr  = cr_get_tpr ();
-    cr_ivec_t   itv  = cr_get_itv ();
-    cr_ivec_t   pmv  = cr_get_pmv ();
-    cr_ivec_t   cmcv = cr_get_cmcv ();
-    cr_ivec_t   lrr0 = cr_get_lrr0 ();
-    cr_ivec_t   lrr1 = cr_get_lrr1 ();
-
-    static char * delmode[] = {
-	"INT", "dm=1", "PMI", "dm=3", "NMI", "INIT", "dm=6", "ExtINT"
-    };
-
-    printf ("Processor Status Register:\n");
-    printf ("  psr:     %p ", psr); ia64_dump_psr (psr); printf ("\n");
-
-    printf ("\nControl Registers:\n");
-    printf ("  cr.ipsr: %p ", ipsr); ia64_dump_psr (ipsr); printf ("\n");
-    printf ("  cr.dcr:  %p [%s%s%s%s%s%s%s%s%s%s]\n",
-	    dcr.raw,
-	    dcr.pp ? "pp " : "", dcr.be ? "be " : "",
-	    dcr.lc ? "lc " : "", dcr.dm ? "dm " : "",
-	    dcr.dp ? "dp " : "", dcr.dk ? "dk " : "",
-	    dcr.dr ? "dr " : "", dcr.da ? "da " : "",
-	    dcr.dd ? "dd " : "", dcr.raw ? "\b" : "");
-    printf ("  ar.itc:  %p\n", ar_get_itc ());
-    printf ("  cr.itm:  %p\n", cr_get_itm ());
-    printf ("  cr.iva:  %p\n", cr_get_iva ());
-    printf ("  cr.pta:  %p [%s, format: %s, size: %dKB, base: %p]\n",
-	    pta.raw, pta.is_vhpt_enabled () ? "enabled" : "disabled",
-	    pta.format () == cr_pta_t::fmt_short ? "short" : "long",
-	    pta.size () >> 10, pta.base ());
-    printf ("  cr.isr:  %p [code: %4x, vec: %2x, slot: %d, acc: %c%c%c "
-	    "%s%s%s%s%s%s%s\b]\n",
-	    isr.raw, isr.code, isr.vector, isr.instruction_slot,
-	    isr.rwx & 4 ? 'r' : '~', isr.rwx & 2 ? 'w' : '~',
-	    isr.rwx & 1 ? 'x' : '~',
-	    isr.non_access ? "na " : "",
-	    isr.speculative_load ? "sp " : "",
-	    isr.register_stack ? "rs " : "",
-	    isr.incomplete_reg_frame ? "ir " : "",
-	    isr.nested_interruption ? "ni " : "",
-	    isr.supervisor_override ? "so " : "",
-	    isr.exception_deferral ? "ed " : "");
-    printf ("  cr.iip:  %p\n", cr_get_iip ());
-    printf ("  cr.ifa:  %p\n", cr_get_ifa ());
-    printf ("  cr.itir: %p [size: %d%cB, key: %5x]\n",
-	    itir.raw, itir.ps >= 30 ? itir.page_size () >> 30 :
-	    itir.ps >= 20 ? itir.page_size () >> 20 : itir.page_size () >> 10,
-	    itir.ps >= 30 ? 'G' : itir.ps >= 20 ? 'M' : 'K',
-	    itir.protection_key ());
-    printf ("  cr.iipa: %p\n", cr_get_iipa ()); 
-    printf ("  cr.ifs:  %p [%svalid, size: %d (%d+%d), rot: %d, "
-	    "rrb (gr: %d, fr: %d, pr: %d)]\n",
-	    ifs.raw, ifs.valid ? "" : "in",
-	    ifs.framesize (), ifs.locals (), ifs.outputs (), ifs.sor,
-	    ifs.rrb_gr, ifs.rrb_fr, ifs.rrb_pr);
-    printf ("  cr.iim:  %p\n", cr_get_iim ());
-    printf ("  cr.iha:  %p\n", cr_get_iha ());
-    printf ("  cr.lid:  %p [eid: %02x, id: %02x]\n", lid.raw, lid.eid, lid.id);
-    printf ("  cr.tpr:  %p [mic: %d, mask %s]\n",
-	    tpr.raw, tpr.mic, tpr.mmi ? "all" : "mic");
-    printf ("  cr.irr:  %p %p %p %p\n",
-	    cr_get_irr (3), cr_get_irr (2), cr_get_irr (1), cr_get_irr (0));
-    printf ("  cr.itv:  %p [vector: %d, %smasked]\n",
-	    itv.raw, itv.vector, itv.m ? "" : "not ");
-    printf ("  cr.pmv:  %p [vector: %d, %smasked]\n",
-	    pmv.raw, pmv.vector, pmv.m ? "" : "not ");
-    printf ("  cr.cmcv: %p [vector: %d, %smasked]\n",
-	    cmcv.raw, cmcv.vector, cmcv.m ? "" : "not ");
-    printf ("  cr.lrr0: %p [vector: %d, %s, active %s, %s triggered, "
-	    "%smasked]\n",
-	    lrr0.raw, lrr0.vector, delmode[lrr0.dm],
-	    lrr0.ipp == 0 ? "high" : "low",
-	    lrr0.dm == 0 ? "edge" : "level",
-	    lrr0.m ? "" : "not ");
-    printf ("  cr.lrr1: %p [vector: %d, %s, active %s, %s triggered, "
-	    "%smasked]\n",
-	    lrr1.raw, lrr1.vector, delmode[lrr1.dm],
-	    lrr1.ipp == 0 ? "high" : "low",
-	    lrr1.dm == 0 ? "edge" : "level",
-	    lrr1.m ? "" : "not ");
-
-    printf ("\nApplication Registers:\n");
-    word_t ar[8];
-    asm volatile (
-	"	mov %0 = ar.k0		\n"
-	"	mov %1 = ar.k1		\n"
-	"	mov %2 = ar.k2		\n"
-	"	mov %3 = ar.k3		\n"
-	"	mov %4 = ar.k4		\n"
-	"	mov %5 = ar.k5		\n"
-	"	mov %6 = ar.k6		\n"
-	"	mov %7 = ar.k7		\n"
-	:
-	"=r"(ar[0]), "=r"(ar[1]), "=r"(ar[2]), "=r"(ar[3]),
-	"=r"(ar[4]), "=r"(ar[5]), "=r"(ar[6]), "=r"(ar[7]));
-
-    for (word_t i = 0; i < 8; i++)
-	printf ("  ar.k%d:   %p\n", i, ar[i]);
-
-    return CMD_NOQUIT;
-}
-
-void ia64_dump_psr (psr_t psr)
-{
-    printf ("[%s%s%s%s%s%s%s%s%s%s",
-	    psr.be	? "be " : "",
-	    psr.up	? "up " : "",
-	    psr.ac	? "ac " : "",
-	    psr.mfl	? "mfl " : "",
-	    psr.mfh	? "mfh " : "",
-	    psr.ic	? "ic " : "",
-	    psr.i	? "i " : "",
-	    psr.pk	? "pk " : "",
-	    psr.dt	? "dt " : "",
-	    psr.dfl	? "dfl " : "");
-    printf ("%s%s%s%s%s%s%s%s%s%s",
-	    psr.dfh	? "dfh " : "",
-	    psr.sp	? "sp " : "",
-	    psr.pp	? "pp " : "",
-	    psr.di	? "di " : "",
-	    psr.si	? "si " : "",
-	    psr.db	? "db " : "",
-	    psr.lp	? "lp " : "",
-	    psr.tb	? "tb " : "",
-	    psr.rt	? "rt " : "",
-	    psr.is	? "is " : "");
-    printf ("%s%s%s%s%s%s%s%s%s%s",
-	    psr.mc	? "mc " : "",
-	    psr.it	? "it " : "",
-	    psr.id	? "id " : "",
-	    psr.da	? "da " : "",
-	    psr.dd	? "dd " : "",
-	    psr.ss	? "ss " : "",
-	    psr.ed	? "ed " : "",
-	    psr.bn	? "bn " : "",
-	    psr.ia	? "ia " : "",
-	    psr.raw & ~((3UL << 32) | (3UL << 41)) ? "\b" : "");
-    printf (" cpl=%d ri=%d]",
-	    psr.cpl, psr.ri);
-}
diff --git a/kernel/kdb/arch/ia64/disas.cc b/kernel/kdb/arch/ia64/disas.cc
deleted file mode 100644
index 9d0c5dd1..00000000
--- a/kernel/kdb/arch/ia64/disas.cc
+++ /dev/null
@@ -1,90 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/disas.cc
- * Description:   Disassembler wrapper for IA-32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: disas.cc,v 1.7 2003/11/06 18:49:19 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_ARCH(cr.h)
-#include INC_API(space.h)
-#include INC_API(tcb.h)
-
-extern "C" int disas (addr_t pc);
-
-DECLARE_CMD (cmd_disas, root, 'U', "disas", "disassemble");
-
-CMD (cmd_disas, cg)
-{
-    char c;
-    word_t pc;
-restart:
-    if ((pc = get_hex("IP", (word_t) cr_get_iip ())) == ABORT_MAGIC)
-	return CMD_NOQUIT;
-
-    do {
-	printf ("%p: ", pc);
-	pc += disas ((addr_t) pc);
-	printf ("\n");
-	c = get_choice (NULL, "c/u/q", 'c');
-    } while ((c != 'q') && (c != 'u'));
-    if (c == 'u')
-	goto restart;
-
-    return CMD_NOQUIT;
-}
-
-
-extern "C" int readmem (addr_t vaddr, addr_t contents, int size)
-{
-    word_t value;
-
-    if (vaddr < ia64_phys_to_rr (7, (addr_t) 0))
-    {
-	space_t * space = kdb.kdb_current->get_space ();
-
-	if (! space->readmem (vaddr, &value))
-	    return 0;
-
-	vaddr = (addr_t) &value;
-    }
-
-    switch (size)
-    {
-    case 1: *(u8_t *)  contents = *(u8_t *)  vaddr; break;
-    case 2: *(u16_t *) contents = *(u16_t *) vaddr; break;
-    case 4: *(u32_t *) contents = *(u32_t *) vaddr; break;
-    case 8: *(u64_t *) contents = *(u64_t *) vaddr; break;
-    default:
-	return 0;
-    }
-
-    return 1;
-}
diff --git a/kernel/kdb/arch/ia64/frame.cc b/kernel/kdb/arch/ia64/frame.cc
deleted file mode 100644
index 2e9e1317..00000000
--- a/kernel/kdb/arch/ia64/frame.cc
+++ /dev/null
@@ -1,224 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/frame.cc
- * Description:   Exception frame dumping
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: frame.cc,v 1.19 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_GLUE(context.h)
-#include INC_API(tcb.h)
-
-
-void ia64_dump_psr (psr_t psr);
-void ia64_dump_frame (ia64_exception_context_t * frame);
-
-
-/**
- * cmd_dump_current_frame: show exception frame of current thread
- */
-DECLARE_CMD (cmd_dump_current_frame, root, ' ', "frame",
-	     "show current exception frame");
-
-CMD (cmd_dump_current_frame, cg)
-{
-    ia64_dump_frame ((ia64_exception_context_t *) kdb.kdb_param);
-    return CMD_NOQUIT;
-}
-
-
-/**
- * cmd_dump_frame: show exception frame
- */
-DECLARE_CMD (cmd_dump_frame, root, 'F', "dumpframe",
-	     "show exception frame");
-
-CMD (cmd_dump_frame, cg)
-{
-    tcb_t * tcb = addr_to_tcb (kdb.kdb_param);
-    ia64_exception_context_t * f =
-	(ia64_exception_context_t *) tcb->get_stack_top () - 1;
-
-    word_t frame = get_hex ("Frame", (word_t) f, "current user frame");
-    ia64_dump_frame ((ia64_exception_context_t *) frame);
-    return CMD_NOQUIT;
-}
-
-
-word_t * next_nat_collection (word_t * addr)
-{
-    return (word_t *) (((word_t) (addr + 65) & ~0x1ff) - 8);
-}
-
-void ia64_dump_frame (ia64_exception_context_t * frame)
-{
-    word_t *rptr, i;
-
-    printf ("Exception %d, frame @ %p:\n", frame->exception_num, frame);
-
-    printf (" cr.iip:  %p  ar.ec:   %p  ar.lc:   %p\n"
-	    " cr.ifa:  %p  cr.iim:  %p  cr.iha:  %p\n"
-	    " ar.bsp:  %p  ar.unat: %p  ar.rnat: %p\n"
-	    " ar.ccv:  %p  ar.rsc:  %p  cr.iipa: %p\n",
-	    frame->iip, frame->ec, frame->lc,
-	    frame->ifa, frame->iim, frame->iha,
-	    frame->bspstore, frame->unat, frame->rnat,
-	    frame->ccv, frame->rsc, frame->iipa);
-    printf (" ar.fpsr: %p  [traps=%c%c%c%c%c%c  ",
-	    frame->fpsr.raw,
-	    frame->fpsr.traps_vd ? 'v' : '~',
-	    frame->fpsr.traps_dd ? 'd' : '~',
-	    frame->fpsr.traps_zd ? 'z' : '~',
-	    frame->fpsr.traps_od ? 'o' : '~',
-	    frame->fpsr.traps_ud ? 'u' : '~',
-	    frame->fpsr.traps_id ? 'i' : '~');
-    printf ("sf=(%03x %03x %03x %03x)]\n",
-	    frame->fpsr.sf0, frame->fpsr.sf1,
-	    frame->fpsr.sf2, frame->fpsr.sf3);
-    printf (" cr.ipsr: %p  ", frame->ipsr);
-    ia64_dump_psr (frame->ipsr);
-    printf ("\n");
-    printf (" cr.isr:  %p  [code: %4x, vec: %2x, slot: %d, acc: %c%c%c "
-	    "%s%s%s%s%s%s%s\b]\n",
-	    frame->isr.raw, frame->isr.code, frame->isr.vector,
-	    frame->isr.instruction_slot,
-	    frame->isr.rwx & 4 ? 'r' : '~', frame->isr.rwx & 2 ? 'w' : '~',
-	    frame->isr.rwx & 1 ? 'x' : '~',
-	    frame->isr.non_access ? "na " : "",
-	    frame->isr.speculative_load ? "sp " : "",
-	    frame->isr.register_stack ? "rs " : "",
-	    frame->isr.incomplete_reg_frame ? "ir " : "",
-	    frame->isr.nested_interruption ? "ni " : "",
-	    frame->isr.supervisor_override ? "so " : "",
-	    frame->isr.exception_deferral ? "ed " : "");
-    printf (" ar.pfs:  %p  [size: %d (%d+%d), rot: %d, "
-	    "rrb (gr: %d, fr: %d, pr: %d)]\n",
-	    frame->pfs.raw, frame->pfs.framesize (),
-	    frame->pfs.locals (), frame->pfs.outputs (), frame->pfs.sor,
-	    frame->pfs.rrb_gr, frame->pfs.rrb_fr, frame->pfs.rrb_pr);
-    printf (" cr.ifs:  %p  [size: %d (%d+%d), rot: %d, "
-	    "rrb (gr: %d, fr: %d, pr: %d)]\n",
-	    frame->ifs.raw, frame->ifs.framesize (),
-	    frame->ifs.locals (), frame->ifs.outputs (), frame->ifs.sor,
-	    frame->ifs.rrb_gr, frame->ifs.rrb_fr, frame->ifs.rrb_pr);
-    printf (" cr.tpr:  %p  [mic: %d, mask %s]\n",
-	    frame->tpr.raw, frame->tpr.mic, frame->tpr.mmi ? "all" : "mic");
-
-    printf ("\nPredicate registers:\n p0-p63:  ");
-    for (int i = 0; i <= 63; i++)
-    {
-	printf ("%d", frame->pr & (1UL << i) ? 1 : 0);
-	if ((i & 7) == 7)
-	    printf (" ");
-    }
-
-    printf ("\n\nBranch registers:\n");
-    rptr = (word_t *) &frame->b0;
-    for (i = 0; i <= 7; i++)
-    {
-	printf (" br%d: %p  ", i, *rptr++);
-	if ((i & 3) == 3)
-	    printf ("\n");
-    }
-
-    printf ("\nGeneral registers (num dirty = %d):\n", frame->num_dirty/8);
-    rptr = (word_t *) &frame->r1;
-    for (i = 0; i <= 31; i++)
-    {
-	word_t nat = frame->unat_kern & (1UL << (((word_t) rptr >> 3) & 0x3f));
-	word_t reg = (i == 0) ? 0 : (i == 12) ? (word_t) frame->r12 : *rptr++;
-
-	printf (" r%d%s %p%c ", i, i <= 9 ? ": " : ":", reg, nat ? '*' : ' ');
-	if ((i & 3) == 3)
-	    printf ("\n");
-    }
-
-    // Determine whether registers were dumped on empty kernel stack
-    // (i.e., user exception) or the existing kernel stack (kernel
-    // exceptions)
-    tcb_t * tcb = addr_to_tcb ((addr_t) frame);
-    if (frame->ipsr.cpl == 3 ||
-	get_current_space ()->is_user_area (frame->bspstore))
-	rptr = (word_t *) tcb->get_reg_stack_bottom ();
-    else
-	rptr = (word_t *) frame->bspstore;
-
-    // Skip dirty registers which are not part of stack frame
-    if (frame->num_dirty/8 > frame->ifs.framesize ())
-    {
-	word_t * tmp = rptr;
-	rptr += frame->num_dirty/8 - frame->ifs.framesize ();
-
-	// Adjust for NaT collection in dirty partition
-	if (next_nat_collection (tmp) < rptr + frame->ifs.framesize () &&
-	    next_nat_collection (tmp) >= rptr)
-	    rptr--;
-    }
-
-    // Determine NaT collection for lower registers
-    word_t rnat;
-    if (next_nat_collection (rptr) < frame->bspstore_kern)
-	rnat = *next_nat_collection (rptr);
-    else
-	rnat = frame->rnat_kern;
-
-    for (i = 0; i < frame->ifs.framesize (); i++, rptr++)
-    {
-	if (((word_t) rptr & 0x1f8) == 0x1f8)
-	{
-	    // Change NaT collection
-	    i--;
-	    rnat = frame->rnat_kern;
-	    continue;
-	}
-
-	word_t reg;
-	bool mapped = true;
-
-	if (get_current_space ()->is_user_area (rptr))
-	    mapped = get_current_space ()->readmem (rptr, &reg);
-	else
-	    reg = *rptr;
-
-	word_t nat = rnat & (1UL << (((word_t) rptr >> 3) & 0x3f));
-
-	if (mapped)
-	    printf (" r%d: %p%c ", i+32, reg, nat ? '*' : ' ');
-	else
-	    printf (" r%d: ################? ", i+32);
-
-	if ((i & 3) == 3)
-	    printf ("\n");
-    }
-    if ((--i & 3) != 3)
-	printf ("\n");
-}
-
diff --git a/kernel/kdb/arch/ia64/ia64-dis.c b/kernel/kdb/arch/ia64/ia64-dis.c
deleted file mode 100644
index a146bcd3..00000000
--- a/kernel/kdb/arch/ia64/ia64-dis.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/ia64-dis.c
- * Description:   Wrapper for IA-64 disassembler
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ia64-dis.c,v 1.8 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-
-#define SEC_KDEBUG ".kdebug"
-
-/* define stuff needed by the disassembler */
-
-#define PARAMS(x) x SECTION(SEC_KDEBUG)
-#define ATTRIBUTE_UNUSED 
-#define abort() do { } while (0)
-
-#define BFD_HOST_64_BIT u64_t
-#define BFD_HOST_U_64_BIT u64_t
-
-typedef u64_t	bfd_vma;
-typedef u8_t	bfd_byte;
-
-int printf(const char * format, ...);
-int sprintf(char* obuf, const char* format, ...);
-int fprintf(char* f, const char* format, ...);
-typedef int (*fprintf_ftype) (char*, const char*, ...);
-
-
-typedef struct disassemble_info {
-    void* stream;
-    int (*read_memory_func)(bfd_vma memaddr,
-			    bfd_byte *myaddr, word_t length,
-			    struct disassemble_info *info);
-    void (*memory_error_func)(int status,
-			      bfd_vma memaddr,
-			      struct disassemble_info *info);
-    int bytes_per_line;
-    int display_endian;
-    int endian;
-
-    fprintf_ftype fprintf_func;
-    void (*print_address_func)(bfd_vma addr, struct disassemble_info *info);
-} disassemble_info;
-
-
-
-
-
-
-
-/*
- * functions that the disassembler calls
- */
-
-/* load with enforced little endian */
-bfd_vma SECTION(SEC_KDEBUG) bfd_getl64 (bfd_byte* addr)
-{
-    return (((bfd_vma) addr[7] << 56) | ((bfd_vma) addr[6] << 48) |
-	    ((bfd_vma) addr[5] << 40) | ((bfd_vma) addr[4] << 32) |
-	    ((bfd_vma) addr[3] << 24) | ((bfd_vma) addr[2] << 16) |
-	    ((bfd_vma) addr[1] <<  8) | ((bfd_vma) addr[0]      ));
-}
-
-/* read memory */
-int SECTION(SEC_KDEBUG) rmf(bfd_vma memaddr,
-	bfd_byte *myaddr, word_t length,
-	struct disassemble_info *info)
-{
-    int readmem (addr_t vaddr, addr_t contents, word_t size);
-
-    char* d = (char*) myaddr;
-    char* s = (char*) memaddr;
-    int len = length;
-    while (len--)
-    {
-#if 1
-	if (! readmem ((addr_t) s, (addr_t) d, sizeof (char)))
-	    return 1;
-#else
-	*d = *s;
-#endif
-	d++; s++;
-    };
-    return 0;
-};
-
-/* respond to memory read error */
-void SECTION(SEC_KDEBUG) mef(int status,
-	 bfd_vma memaddr,
-	 struct disassemble_info *info)
-{
-    //printf("%s(%x,%x,%x)\n", __FUNCTION__, status, memaddr, info);
-    printf("##");
-};
-
-/* print address */
-void SECTION(SEC_KDEBUG) paf(bfd_vma addr, struct disassemble_info *info)
-{
-    printf("%p", addr);
-};
-
-
-
-char SECTION(SEC_KDEBUG) *strcpy(char *dest, const char *src)
-{
-    char* d = dest;
-    const char* s = src;
-    do { *d++ = *s; } while (*s++);
-    return dest;
-};
-
-char SECTION(SEC_KDEBUG) *strcat(char *dest, const char *src)
-{
-    char* d = dest;
-    char* s = (char*) src;
-    /* scan for trailing \0 */
-    while (*d)
-	d++;
-    /* copy until end of s, including the \0 */
-    while ( (*d++ = *s++) );
-    return dest;
-};
-
-
-
-
-
-int print_insn_ia64 (bfd_vma pc, disassemble_info *info) SECTION(SEC_KDEBUG);
-
-int SECTION(SEC_KDEBUG) disas(addr_t pc)
-{
-    disassemble_info info =
-    {
-	NULL,
-	rmf,
-	mef,
-	6,
-	0,
-	0,
-	fprintf,
-	paf
-    };
-    return print_insn_ia64((u64_t)pc, &info);
-}
-
-
-
-
-#include <../../contrib/disas/cpu-ia64-opc.c>
-#include <../../contrib/disas/ia64-dis.c>
-#undef PARAMS
-#define PARAMS(x) x SECTION(SEC_KDEBUG)
-#include <../../contrib/disas/ia64-opc.c>
diff --git a/kernel/kdb/arch/ia64/interrupts.cc b/kernel/kdb/arch/ia64/interrupts.cc
deleted file mode 100644
index b423bcf3..00000000
--- a/kernel/kdb/arch/ia64/interrupts.cc
+++ /dev/null
@@ -1,97 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/interrupts.cc
- * Description:   Interrupt information
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: interrupts.cc,v 1.4 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/cmd.h>
-
-#include INC_ARCH(cr.h)
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(context.h)
-
-
-/**
- * Dump pending/masked interrupts.
- */
-DECLARE_CMD (cmd_ia64_pending_ints, arch, 'I', "pendingints",
-	     "dump pending/masked interrupts");
-
-CMD (cmd_ia64_pending_ints, cg)
-{
-    ia64_exception_context_t * frame =
-	(ia64_exception_context_t *) kdb.kdb_param;
-    cr_tpr_t tpr = cr_get_tpr ();
-
-    printf ("Pending/masked interrupts (Global IRQ offset = %d):\n",
-	    INTERRUPT_VECTOR_OFFSET);
-    printf ("  psr.i=%d,  tpr.mmi=%d  %s\n",
-	    frame->ipsr.i, tpr.mmi,
-	    (frame->ipsr.i == 0 || tpr.mmi) ? "(All interrupts masked)" : "");
-
-    word_t max_irqs = get_interrupt_ctrl ()->get_number_irqs ();
-
-    for (word_t i = 0; i < 256;)
-    {
-	bool deliver_pending = false;
-	bool ack_pending = false;
-	bool masked = false;
-
-	if (i >= INTERRUPT_VECTOR_OFFSET &&
-	    i < INTERRUPT_VECTOR_OFFSET + max_irqs)
-	{
-	    // Interrupt delivered through I/O SAPIC.
-
-	    iosapic_redir_t ent = get_interrupt_ctrl ()->
-		get_redir (i - INTERRUPT_VECTOR_OFFSET);
-	    deliver_pending = ent.delivery_status != 0;
-	    ack_pending = ent.remote_irr != 0;
-	    masked = ent.mask != 0;
-	}
-
-	if ((i & 15) == 0)
-	    printf ("  %3d-%d%s  [", i, i+15, (i+15) > 99 ? "" : " ");
-
-	printf ("%c%c%c%c", deliver_pending ? 'd' : '~',
-		is_interrupt_pending (i) ? 'p' : '~',
-		ack_pending ? 'a' : '~', masked ? 'm' : '~');
-	i++;
-
-	if ((i & 15) == 0)
-	    printf ("] %c\n",
-		    ((i-1) < 16 || ((i-1) >> 4) > tpr.mic) ? ' ' : 'M');
-	else if ((i & 7) == 0)
-	    printf ("] [");
-	else
-	    printf ("|");
-    }
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/ia64/io.cc b/kernel/kdb/arch/ia64/io.cc
deleted file mode 100644
index e946996e..00000000
--- a/kernel/kdb/arch/ia64/io.cc
+++ /dev/null
@@ -1,487 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/io.cc
- * Description:   Console/serial I/O for IA-64 platforms
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: io.cc,v 1.18 2006/10/19 22:57:36 ud3 Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(ioport.h)
-#include INC_ARCH(ski.h)
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-#include INC_PLAT(system_table.h)
-#include INC_PLAT(hcdp.h)
-#include INC_GLUE(hwspace.h)
-#include <kdb/kdb.h>
-#include <kdb/cmd.h>
-#include <kdb/console.h>
-#include <debug.h>
-
-#if !defined(CONFIG_KDB_COMSPEED)
-#define CONFIG_KDB_COMSPEED 115200
-#endif
-
-#if !defined(CONFIG_KDB_COMPORT)
-#define CONFIG_KDB_COMPORT 0x3f8
-#endif
-
-
-#if !defined(CONFIG_KDB_CONS_SKI)
-static void init_serial (void) SECTION (".init");
-static void init_screen (void) SECTION (".init");
-static void putc_serial (char) SECTION (".kdebug");
-static char getc_serial (bool) SECTION (".kdebug");
-static void putc_screen (char) SECTION (".kdebug");
-static char getc_screen (bool) SECTION (".kdebug");
-
-kdb_console_t kdb_consoles[] = {
-    { "screen", &init_screen, &putc_screen, &getc_screen },
-    { "serial", &init_serial, &putc_serial, &getc_serial },
-    KDB_NULL_CONSOLE
-};
-    
-#if defined(CONFIG_KDB_CONS_COM)
-word_t kdb_current_console = 1;
-#else
-word_t kdb_current_console = 0;
-#endif
-
-
-/*
-**
-** Console I/O functions.
-**
-*/
-
-#define DISPLAY		phys_to_virt_uc ((char *) 0xb8000)
-#define NUM_LINES	(24)
-#define NUM_COLS	(80)
-
-static void init_screen (void)
-{
-    /*
-     * Map screen memory uncacheable.
-     */
-
-    if (! dtrmap.is_mapped (DISPLAY))
-    {
-	translation_t tr (1, translation_t::uncacheable, 1, 1, 0,
-			  translation_t::rwx, virt_to_phys (DISPLAY), 0);
-	dtrmap.add_map (tr, DISPLAY, HUGE_PGSIZE, 0);
-    }
-}
-
-static void putc_screen (char c)
-{
-    static unsigned cursor = 0;
-    static unsigned color = 7;
-    static unsigned new_color = 0;
-    static unsigned esc = 0;
-    static unsigned esc2 = 0;
-    static const unsigned col[] = { 0, 4, 2, 14, 1, 5, 3, 15 };
-
-    if (esc == 1)
-    {
-	if (c == '[')
-	{
-	    esc++;
-	    return;
-	}
-    }
-    else if (esc == 2)
-    {
-	switch (c)
-	{
-	case '0': case '1': case '2':
-	case '3': case '4': case '7':
-	    esc++;
-	    esc2 = c;
-	    return;
-	}
-    }
-    else if (esc == 3)
-    {
-	switch (c)
-	{
-	case '0': case '1': case '2': case '3':
-	case '4': case '5': case '6': case '7':
-	    if (esc2 == '3' || esc2 == '4')
-	    {
-		// New foreground or background color
-		new_color = col[c - '0'];
-		esc++;
-		return;
-	    }
-	    break;
-	case 'J':
-	    if (esc2 == '2')
-	    {
-		// Clear screen
-		for (int i = 0; i < NUM_COLS*NUM_LINES; i++)
-		    ((u16_t *) DISPLAY)[i] = (color << 8) + ' ';
-		cursor = 0;
-		esc = 0;
-		return;
-	    }
-	    break;
-	case 'm':
-	    switch (esc2)
-	    {
-	    case '0':
-		// Normal text
-		color = 7;
-		esc = 0;
-		return;
-	    case '1':
-		// Bright text
-		color = 15;
-		esc = 0;
-		return;
-	    case  '7':
-		// Reversed
-		color = (7 << 4);
-		esc = 0;
-		return;
-	    }
-	}
-    }
-    else if (esc == 4)
-    {
-	if (c == 'm' && esc2 == '3')
-	{
-	    // Foreground color
-	    color = (color & 0xf0) | new_color;
-	    esc = 0;
-	    return;
-	}
-	else if (c == 'm' && esc2 == '4')
-	{
-	    // Background color
-	    color = (color & 0x0f) | (new_color << 4);
-	    esc = 0;
-	    return;
-	}
-    }
-
-    switch(c) {
-    case '\e':
-	esc = 1;
-	return;
-    case '\r':
-        cursor -= (cursor % (NUM_COLS*2));
-	break;
-    case '\n':
-	cursor += ((NUM_COLS*2) - (cursor % (NUM_COLS*2)));
-	break;
-    case '\t':
-	cursor += (8 - (cursor % 8));
-	break;
-    case '\b':
-	cursor -= 2;
-	break;
-    default:
-	DISPLAY[cursor++] = c;
-	DISPLAY[cursor++] = color;
-    }
-
-    esc = 0;
-
-    if ((cursor / (NUM_COLS*2)) == NUM_LINES)
-    {
-	for (int i = NUM_COLS; i < NUM_COLS*NUM_LINES; i++)
-	    ((u16_t *) DISPLAY)[i - NUM_COLS] = ((u16_t *) DISPLAY)[i];
-	for (int i = 0; i < NUM_COLS; i++)
-	    ((u16_t * )DISPLAY)[NUM_COLS * (NUM_LINES-1) + i] = 0;
-	cursor -= (NUM_COLS*2);
-    }
-}
-
-#define KBD_STATUS_REG		0x64	
-#define KBD_CNTL_REG		0x64	
-#define KBD_DATA_REG		0x60	
-
-#define KBD_STAT_OBF 		0x01	/* Keyboard output buffer full */
-
-#define kbd_read_input() in_u8 (KBD_DATA_REG)
-#define kbd_read_status() in_u8 (KBD_STATUS_REG)
-
-static unsigned char keyb_layout[2][128] =
-{
-    "\000\0331234567890-=\010\t"			/* 0x00 - 0x0f */
-    "qwertyuiop[]\r\000as"				/* 0x10 - 0x1f */
-    "dfghjkl;'`\000\\zxcv"				/* 0x20 - 0x2f */
-    "bnm,./\000*\000 \000\201\202\203\204\205"		/* 0x30 - 0x3f */
-    "\206\207\210\211\212\000\000789-456+1"		/* 0x40 - 0x4f */
-    "230\177\000\000\213\214\000\000\000\000\000\000\000\000\000\000"
-    "\r\000/"						/* 0x60 - 0x6f */
-    ,
-    "\000\033!@#$%^&*()_+\010\t"			/* 0x00 - 0x0f */
-    "QWERTYUIOP{}\r\000AS"				/* 0x10 - 0x1f */
-    "DFGHJKL:\"`\000\\ZXCV"				/* 0x20 - 0x2f */
-    "BNM<>?\000*\000 \000\201\202\203\204\205"		/* 0x30 - 0x3f */
-    "\206\207\210\211\212\000\000789-456+1"		/* 0x40 - 0x4f */
-    "230\177\000\000\213\214\000\000\000\000\000\000\000\000\000\000"
-    "\r\000/"						/* 0x60 - 0x6f */
-};
-
-static char getc_screen (bool block)
-{
-    static u8_t last_key = 0;
-    static u8_t shift = 0;
-    char c;
-
-    for (;;)
-    {
-	unsigned char status = kbd_read_status ();
-	while (status & KBD_STAT_OBF)
-	{
-	    u8_t scancode;
-	    scancode = kbd_read_input ();
-
-	    // Check for SHIFT-keys
-	    if (((scancode & 0x7F) == 42) || ((scancode & 0x7F) == 54))
-	    {
-		shift = !(scancode & 0x80);
-		continue;
-	    }
-
-	    // Ignore all other RELEASED-codes
-	    if (scancode & 0x80)
-		last_key = 0;
-	    else if (last_key != scancode)
-	    {
-		last_key = scancode;
-		c = keyb_layout[shift][scancode];
-		if (c > 0)
-		    return c;
-	    }
-	}
-    }
-}
-
-
-
-/*
-**
-** Serial port I/O functions.
-**
-*/
-
-/* Comport register locations */
-#define DATA		0
-#define IER		1
-#define EIR		2
-#define LCR		3
-#define MCR		4
-#define LSR		5
-#define MSR		6
-#define DLLO		0
-#define DLHI		1
-
-/* LCR related constants */
-#define BITS_5          0
-#define BITS_6          1
-#define BITS_7          2
-#define BITS_8          3
-#define STOP_ONE	(0 << 2)
-#define STOP_TWO	(1 << 2)
-#define PARITY_NONE	(0 << 3)
-#define PARITY_ODD	(1 << 3)
-#define PARITY_EVEN	(3 << 3)
-#define PARITY_MARK	(6 << 3)
-#define PARITY_SPACE	(7 << 3)
-#define BREAK_CONTROL	(1 << 6)
-#define DLR_ON          (1 << 7)
-
-/* ISR related constants */
-#define RxRDY		(1 << 0)
-#define TBE		(1 << 5)
-
-/* Defaults, usually overridden from EFI HCDP table */
-static u64_t com_base = CONFIG_KDB_COMPORT;
-static u32_t com_baud = CONFIG_KDB_COMSPEED;
-static u8_t  com_mmio = 0;
-
-void find_serial (void)
-{
-    hcdp_table_t *hcdp_table;
-    hcdp_dev_t *hcdp_dev;
-
-    hcdp_table = (hcdp_table_t *)efi_config_table.find_table(HCDP_TABLE_GUID);
-    if (hcdp_table == NULL)
-	return;
-
-    hcdp_table = phys_to_virt(hcdp_table);
-    hcdp_dev = hcdp_table->find(HCDP_DEV_CONSOLE);
-    if (hcdp_dev == NULL)
-	return;
-
-    switch (hcdp_dev->base_addr.id)
-    {
-	case ACPI_MEM_SPACE:
-	    com_mmio = 1;
-	    break;
-	case ACPI_IO_SPACE:
-	    com_mmio = 0;
-	    break;
-	default:
-	    return; /* fall back to defaults */
-    }
-
-    com_base = hcdp_dev->base_addr.address ();
-    if (hcdp_dev->baud)
-	com_baud = hcdp_dev->baud;
-}
-
-static void com_out_u8 (u8_t port, u8_t data)
-{
-    if (com_mmio)
-	*(u8_t *)(com_base + port) = data;
-    else
-	out_u8(com_base + port, data);
-}
-
-static u8_t com_in_u8 (u8_t port)
-{
-    if (com_mmio)
-	return *(u8_t *)(com_base + port);
-    else
-	return in_u8(com_base + port);
-}
-
-static void init_serial (void)
-{
-    static bool initialized = false;
-    u16_t dll;
-
-    if (initialized)
-	return;
-    initialized = true;
-
-    find_serial();
-
-    if (com_mmio)
-    {
-	com_base = phys_to_virt_uc(com_base);
-	if (!dtrmap.is_mapped ((void *)com_base))
-	{
-	    translation_t tr (1, translation_t::uncacheable, 1, 1, 0,
-			      translation_t::rwx,
-			      virt_to_phys ((void *)com_base), 0);
-	    dtrmap.add_map (tr, (void *)com_base, HUGE_PGSIZE, 0);
-	}
-    }
-
-    /* 64-bit division otherwise we'd need __udivsi3 */
-    dll = 115200UL / com_baud;
-
-    com_out_u8 (LCR, DLR_ON);
-    com_out_u8 (DLLO, dll & 0xff);
-    com_out_u8 (DLHI, dll >> 8);
-    com_out_u8 (LCR, BITS_8 | PARITY_NONE | STOP_ONE); /* 8N1 */
-}
-
-void putc_serial (char c)
-{
-    while (! (com_in_u8 (LSR) & TBE))
-	;
-
-    com_out_u8 (DATA, c);
-
-    if (c == '\n')
-  	putc_serial ('\r');
-}
-
-char getc_serial (bool block)
-{
-    if (block)
-    {
-	while (! (com_in_u8 (LSR) & RxRDY))
-	    spin (70);
-	return com_in_u8 (DATA);
-    }
-    else
-    {
-	if (com_in_u8 (LSR) & RxRDY)
-	    return com_in_u8 (DATA);
-	else
-	    return -1;
-    }
-}
-
-#if defined(CONFIG_KDB_BREAKIN)
-void SECTION (".kdebug") kdebug_check_breakin (void)
-{
-    while (com_in_u8 (LSR) & RxRDY)
-	if (com_in_u8 (DATA) == 0x1b)
-	    enter_kdebug ("breakin");
-}
-#endif
-
-#else /* CONFIG_KDB_SKI */
-
-static void init_ski_console (void) SECTION (".init");
-static void putc_ski (char) SECTION (".kdebug");
-static char getc_ski (bool) SECTION (".kdebug");
-
-kdb_console_t kdb_consoles[] = {
-    { "SKI", &init_ski_console, &putc_ski, &getc_ski },
-    KDB_NULL_CONSOLE
-};
-    
-word_t kdb_current_console = 0;
-
-void init_ski_console (void)
-{
-//    ia64_ski_ssc (0, 0, 0, 0, IA64_SKI_SSC_CONSOLE_INIT);
-}
-
-char getc_ski (bool block)
-{
-    char c;
-    do {
-	c = (char)ia64_ski_ssc (0, 0, 0, 0, IA64_SKI_SSC_GETCHAR);
-    } while (c == '\0');
-    return c;
-}
-
-void putc_ski (char c)
-{
-    ia64_ski_ssc ((word_t)c, 0, 0, 0, IA64_SKI_SSC_PUTCHAR);
-    if (c == '\n')
-	putc_ski ('\r');
-}
-
-#if defined(CONFIG_KDB_BREAKIN)
-void SECTION (".kdebug") kdebug_check_breakin (void)
-{
-    if ( ia64_ski_ssc (0, 0, 0, 0, IA64_SKI_SSC_GETCHAR) == 0x1b)
-	enter_kdebug("breakin");
-}
-#endif
-
-#endif
diff --git a/kernel/kdb/arch/ia64/itanium/Makeconf b/kernel/kdb/arch/ia64/itanium/Makeconf
deleted file mode 100644
index a1ca7acc..00000000
--- a/kernel/kdb/arch/ia64/itanium/Makeconf
+++ /dev/null
@@ -1,6 +0,0 @@
-ifeq ("$(CONFIG_PERFMON)","y")
-SOURCES+=	kdb/arch/ia64/itanium/perf.cc \
-		kdb/arch/ia64/itanium/perf_branchtrace.cc \
-		kdb/arch/ia64/itanium/perf_events.cc \
-		kdb/arch/ia64/itanium/perf_profile.cc 
-endif
diff --git a/kernel/kdb/arch/ia64/itanium/perf.cc b/kernel/kdb/arch/ia64/itanium/perf.cc
deleted file mode 100644
index 11666f34..00000000
--- a/kernel/kdb/arch/ia64/itanium/perf.cc
+++ /dev/null
@@ -1,191 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/itanium/perf.cc
- * Description:   Itanium performance monitoring functionality
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: perf.cc,v 1.8 2004/04/30 03:42:41 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_ARCH(itanium_perf.h)
-#include INC_GLUE(context.h)
-#include INC_API(tcb.h)
-#include INC_API(schedule.h)
-
-#include <sync.h>
-
-
-bool kdb_get_perfctr (pmc_itanium_t * pmc, word_t * pmc_mask);
-
-
-/**
- * Set performance counter register.
- */
-DECLARE_CMD (cmd_ia64_perf_setreg, ia64_perfmon, 's', "setreg",
-	     "set performance register");
-
-CMD (cmd_ia64_perf_setreg, cg)
-{
-    ia64_exception_context_t * frame =
-	(ia64_exception_context_t *) kdb.kdb_param;
-     ia64_exception_context_t * user_frame =
-	(ia64_exception_context_t *) kdb.kdb_current->get_stack_top () - 1;
-
-    pmc_itanium_t pmc = 0;
-    word_t i, reg, pmc_mask;
-
-    if (! kdb_get_perfctr (&pmc, &pmc_mask))
-	return CMD_NOQUIT;
-
-    do {
-	for (i = 1, reg = 0; (i & pmc_mask) == 0; i <<= 1, reg++)
-	    ;
-	reg = get_dec ("Select register", reg);
-	if (reg == ABORT_MAGIC)
-	    return CMD_NOQUIT;
-
-    } while (((1UL << reg) & pmc_mask) == 0);
-
-    pmc.ev = 0;		// no external visibility
-    pmc.oi = 0;		// no overflow interrupt
-    pmc.pm = 1;		// allow user access
-    pmc.threshold = 0;	// sum up
-    pmc.ism = 0;	// monitor IA32 and IA64 instructions
-
-    printf("perfctr: es=%x, umask=%x, raw = %x\n", 
-	   pmc.es, pmc.umask, *(word_t *) &pmc);
-
-    switch (get_choice ("Priviledge level", "User/Kernel/All", 'a'))
-    {
-    case 'u': pmc.plm = pmc_t::user; break;
-    case 'k': pmc.plm = pmc_t::kernel; break;
-    case 'a': pmc.plm = pmc_t::both; break;
-    default:
-	return CMD_NOQUIT;
-    }
-
-    set_pmc (reg, pmc);
-    set_pmd (reg, 0);
-
-    frame->ipsr.pp = user_frame->ipsr.pp = 1;
-
-    return CMD_NOQUIT;
-}
-
-extern tcb_t * global_present_list UNIT("kdebug");
-extern spinlock_t present_list_lock;
-
-/**
- * Enable performance counters for all threads.
- */
-DECLARE_CMD (cmd_ia64_perf_enable_all, ia64_perfmon, 'E', "enableall",
-	     "set performance monitoring for all threads");
-
-CMD (cmd_ia64_perf_enable_all, cg)
-{
-    int abort = 1000000;
-    present_list_lock.lock();
-    scheduler_t * scheduler = get_current_scheduler();
-    printf("\n");
-
-    /* check whether we have something for this prio */
-    tcb_t* walk = global_present_list;
-    do {
-     	ia64_exception_context_t * frame =
-		(ia64_exception_context_t *) walk->get_stack_top () - 1;
-    	frame->ipsr.pp = 1;
-
-	printf(walk->queue_state.is_set(queue_state_t::ready) ? " %p" : "(%p)", walk);
-        printf("\n");
-        walk = walk->present_list.next;
-
-	if (abort-- == 0)
-	{
-	    // huha -- something fucked up?
-	    printf("present-list fucked???\n");
-	    return CMD_NOQUIT;
-	}
-
-    } while (walk != global_present_list);
-
-    present_list_lock.unlock();
-
-    cr_dcr_t dcr = cr_get_dcr ();
-
-    dcr.pp = 1;
-
-    __asm__ ("mov cr.dcr = %0 " :: "r" (dcr.raw));
-
-    return CMD_NOQUIT;
-}
-
-/**
- * Disable performance counters for all threads.
- */
-DECLARE_CMD (cmd_ia64_perf_disable_all, ia64_perfmon, 'D', "disableall",
-	     "disable performance monitoring for all threads");
-
-CMD (cmd_ia64_perf_disable_all, cg)
-{
-    int abort = 1000000;
-    present_list_lock.lock();
-    scheduler_t * scheduler = get_current_scheduler();
-    printf("\n");
-
-    /* check whether we have something for this prio */
-    tcb_t* walk = global_present_list;
-    do {
-     	ia64_exception_context_t * frame =
-		(ia64_exception_context_t *) walk->get_stack_top () - 1;
-    	frame->ipsr.pp = 0;
-
-	printf(walk->queue_state.is_set(queue_state_t::ready) ? " %p" : "(%p)", walk);
-        printf("\n");
-        walk = walk->present_list.next;
-
-	if (abort-- == 0)
-	{
-	    // huha -- something fucked up?
-	    printf("present-list fucked???\n");
-	    return CMD_NOQUIT;
-	}
-
-    } while (walk != global_present_list);
-
-    present_list_lock.unlock();
-
-    cr_dcr_t dcr = cr_get_dcr ();
-
-    dcr.pp = 0;
-
-    __asm__ ("mov cr.dcr = %0 " :: "r" (dcr.raw));
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/ia64/itanium/perf_branchtrace.cc b/kernel/kdb/arch/ia64/itanium/perf_branchtrace.cc
deleted file mode 100644
index c9017ab0..00000000
--- a/kernel/kdb/arch/ia64/itanium/perf_branchtrace.cc
+++ /dev/null
@@ -1,158 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/itanium/perf_branchtrace.cc
- * Description:   Itanium Branch Trace Buffer
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: perf_branchtrace.cc,v 1.4 2003/09/24 19:05:07 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_ARCH(itanium_perf_branchtrace.h)
-#include INC_GLUE(context.h)
-#include INC_API(tcb.h)
-
-
-#if defined(CONFIG_KDB_DISAS)
-extern "C" int disas (addr_t ip);
-#define DISAS(ip) disas (ip)
-#else
-#define DISAS(ip)
-#endif
-
-
-/**
- * Enable/disable the Itanium branch trace buffer.
- */
-DECLARE_CMD (cmd_ia64_perf_branchtrace, ia64_perfmon, 'B', "branchtrace",
-	     "configure branch tracing");
-
-CMD (cmd_ia64_perf_branchtrace, cg)
-{
-    pmc_branch_trace_config_t btc;
-
-    ia64_exception_context_t * frame =
-	(ia64_exception_context_t *) kdb.kdb_param;
-    ia64_exception_context_t * user_frame =
-	(ia64_exception_context_t *) kdb.kdb_current->get_stack_top () - 1;
-
-    if (get_choice ("Branch trace", "Enable/Disable", 'e') == 'd')
-    {
-	btc.disable ();
-	frame->ipsr.pp = user_frame->ipsr.pp = 0;
-	return CMD_NOQUIT;
-    }
-
-    btc.pm = 1;
-    btc.plm = pmc_t::both;
-
-    switch (get_choice ("Branch outcome", "Taken/Not taken/All", 't'))
-    {
-    case 't': btc.tm = pmc_branch_trace_config_t::taken; break;
-    case 'n': btc.tm = pmc_branch_trace_config_t::not_taken; break;
-    case 'a': btc.tm = pmc_branch_trace_config_t::all; break;
-    }
-
-    switch (get_choice ("Target predication",
-			"Predicted/Mispredicted/All", 'a'))
-    {
-    case 'p': btc.ptm = pmc_branch_trace_config_t::predicted_targets; break;
-    case 'm': btc.ptm = pmc_branch_trace_config_t::mispredicted_targets; break;
-    case 'a': btc.ptm = pmc_branch_trace_config_t::all_targets; break;
-    }
-
-    switch (get_choice ("Predicate predication",
-			"Predicted/Mispredicted/All", 'a'))
-    {
-    case 'p': btc.ppm = pmc_branch_trace_config_t::predicted_preds; break;
-    case 'm': btc.ppm = pmc_branch_trace_config_t::mispredicted_preds; break;
-    case 'a': btc.ppm = pmc_branch_trace_config_t::all_targets; break;
-    }
-
-    btc.tar = get_choice ("Capture TAR predictions", "y/n", 'y') == 'y';
-    btc.bpt = get_choice ("Capture TAC predictions", "y/n", 'y') == 'y';
-    btc.bac = get_choice ("Capture BAC predictions", "y/n", 'y') == 'y';
-
-    // Clear trace buffer
-    pmd_branch_trace_index_t bti;
-    bti.clear ();
-
-    // Enable tracing
-    btc.activate ();
-    frame->ipsr.pp = user_frame->ipsr.pp = 1;
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * Dump the branch trace buffer.
- */
-DECLARE_CMD (cmd_branches_show, ia64_perfmon, 'b', "dumpbranches",
-	     "dump last branches");
-
-CMD (cmd_branches_show, cg)
-{
-    pmd_branch_trace_index_t bti;
-    word_t n, k;
-
-    if (bti.num_entries () == 0)
-    {
-	printf ("No branch trace.\n");
-	return CMD_NOQUIT;
-    }
-
-    printf ("Branch trace (oldest first):\n");
-    for (n = bti.oldest_idx (), k = bti.num_entries ();
-	 k > 0;
-	 k--, n = bti.next_idx (n))
-    {
-	pmd_branch_trace_t bt (n);
-
-	if (bt.is_invalid ())
-	    continue;
-	else if (bt.is_target ())
-	{
-	    printf ("          ===>  %p ", bt.address ());
-	    DISAS (bt.canonical_address ());
-	    printf ("\n");
-	}
-	else
-	{
-	    printf ("%s  %p ",
-		    bt.is_predicted () ? "(predicted)   " : "(mispredicted)",
-		    bt.canonical_address ());
-	    DISAS (bt.canonical_address ());
-	    printf ("\n");
-	}
-    }
-
-    return CMD_NOQUIT;
-}
-
diff --git a/kernel/kdb/arch/ia64/itanium/perf_events.cc b/kernel/kdb/arch/ia64/itanium/perf_events.cc
deleted file mode 100644
index ff890460..00000000
--- a/kernel/kdb/arch/ia64/itanium/perf_events.cc
+++ /dev/null
@@ -1,315 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/itanium/perf_events.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: perf_events.cc,v 1.4 2003/09/24 19:05:07 skoglund Exp $
- *                
- ********************************************************************/
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-#include <debug.h>
-
-#include INC_ARCH(itanium_perf.h)
-
-#define PMC_45		((1 << 4) | (1 << 5))
-#define PMC_67		((1 << 6) | (1 << 7))
-#define PMC_4567	(PMC_45 | PMC_67)
-
-class ia64_perf_event_t
-{
-public:
-    class ia64_umask_t {
-    public:
-	char * name;
-	u8_t umask;
-    };
-
-
-    char *	name;
-    u8_t	event_selector;
-    word_t	pmc_mask;
-    ia64_umask_t umask[5];
-};
-
-ia64_perf_event_t perf_events[] =
-{
-    { "ALAT_REPLACEMENT", 0x38, PMC_4567,
-      { { "ALL", 3 }, { "FP", 2 }, { "INT", 1 } }
-    },
-    { "ALAT_INST_CHKA_LDC", 0x36, PMC_4567,
-      { { "ALL", 3 }, { "FP", 2 }, { "INT", 1 } }
-    },
-    { "ALAT_INST_FAILED_LDC", 0x37, PMC_4567,
-      { { "ALL", 3 }, { "FP", 2 }, { "INT", 1 } }
-    },
-    { "ALL_STOPS_DISPERSED", 0x2f, PMC_4567, { }
-    },
-    { "BRANCH_EVENT", 0x11, PMC_4567, { } },
-    { "BRANCH_MULTIWAY.ALL_PATHS", 0x0e, PMC_4567,
-      { { "ALL_PREDICTIONS", 0 },
-	{ "CORRECT_PREDICTIONS", 1 },
-	{ "WRONG_PATH", 2 },
-	{ "WRONG_TARGET", 3 } }
-    },
-    { "BRANCH_MULTIWAY.NOT_TAKEN", 0x0e, PMC_4567,
-      { { "ALL_PREDICTIONS", 0x8 },
-	{ "CORRECT_PREDICTIONS", 0x9 },
-	{ "WRONG_PATH", 0xa },
-	{ "WRONG_TARGET", 0xb } }
-    },
-    { "BRANCH_MULTIWAY.TAKEN", 0x0e, PMC_4567,
-      { { "ALL_PREDICTIONS", 0xc },
-	{ "CORRECT_PREDICTIONS", 0xd },
-	{ "WRONG_PATH", 0xe },
-	{ "WRONG_TARGET", 0xf } }
-    },
-    { "BRANCH_PATH.ALL", 0x0f, PMC_4567,
-      { { "NT_OUTCOMES_CORRECTLY_PREDICTED", 0x2 },
-	{ "TK_OUTCOMES_CORRECTLY_PREDICTED", 0x3 },
-	{ "NT_OUTCOMES_INCORRECTLY_PREDICTED", 0x0 },
-	{ "TK_OUTCOMES_CORRECTLY_PREDICTED", 0x1 } }
-    },
-    { "BRANCH_PATH.1ST_STAGE", 0x0f, PMC_4567,
-      { { "NT_OUTCOMES_CORRECTLY_PREDICTED", 0x6 },
-	{ "TK_OUTCOMES_CORRECTLY_PREDICTED", 0x7 },
-	{ "NT_OUTCOMES_INCORRECTLY_PREDICTED", 0x4 },
-	{ "TK_OUTCOMES_CORRECTLY_PREDICTED", 0x5 } }
-    },
-    { "BRANCH_PATH.2ND_STAGE", 0x0f, PMC_4567,
-      { { "NT_OUTCOMES_CORRECTLY_PREDICTED", 0xa },
-	{ "TK_OUTCOMES_CORRECTLY_PREDICTED", 0xb },
-	{ "NT_OUTCOMES_INCORRECTLY_PREDICTED", 0x8 },
-	{ "TK_OUTCOMES_CORRECTLY_PREDICTED", 0x9 } }
-    },
-    { "BRANCH_PATH.3RD_STAGE", 0x0f, PMC_4567,
-      { { "NT_OUTCOMES_CORRECTLY_PREDICTED", 0xe },
-	{ "TK_OUTCOMES_CORRECTLY_PREDICTED", 0xf },
-	{ "NT_OUTCOMES_INCORRECTLY_PREDICTED", 0xc },
-	{ "TK_OUTCOMES_CORRECTLY_PREDICTED", 0xd } }
-    },
-    { "BUS_MEMORY", 0x4a, PMC_4567,
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_PARTIAL", 0x48, PMC_4567,
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_ALL", 0x4b, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_DATA", 0x4c, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_HIT", 0x40, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_HITM", 0x41, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_INVAL", 0x4e, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_INVAL_BST", 0x4f, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_INVAL_HITM", 0x4e, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_INVAL_BST_HITM", 0x43, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_IO", 0x51, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_RD_PRTL", 0x4d, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_SNOOPS", 0x46, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_SNOOPS_HITM", 0x45, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_SNOOP_STALL_CYCLES", 0x55, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "BUS_SNOOPQ_REQ", 0x56, PMC_45, { } },
-    { "BUS_WR_WB", 0x52, PMC_4567, 
-      { { "ANY", 1 }, { "SELF", 2 }, { "IO", 4 } }
-    },
-    { "CPU_CPL_CHANGES", 0x34, PMC_4567, { } },
-    { "CPU_CYCLES", 0x12, PMC_4567, { } },
-
-    { "DATA_ACCESS_CYCLE", 0x03, PMC_4567, { } },
-    { "DATA_EAR_EVENTS", 0x67, PMC_4567, { } },
-    { "DATA_PREFERENCES_RETIRED", 0x63, PMC_4567, { } },
-    { "DEPENDENCY_ALL_CYCLE", 0x06, PMC_4567, { } },
-    { "DEPENDENCY_SCOREBOARD_CYCLE", 0x02, PMC_4567, { } },
-    { "DTC_MISSES", 0x60, PMC_4567, { } },
-    { "DTLB_INSERTS_HPW", 0x62, PMC_4567, { } },
-    { "DTLB_MISSES", 0x61, PMC_4567, { } },
-
-    { "EXPL_STOP_DISPERSED", 0x2e, PMC_4567, { } },
-    { "FP_OPS_RETIRED_HI", 0x0a, PMC_4567, { } },
-    { "FP_OPS_RETIRED_LO", 0x09, PMC_4567, { } },
-    { "FP_FLUSH_TO_ZERO", 0x0b, PMC_4567, { } },
-    { "FP_SIR_FLUSH", 0x0c, PMC_4567, { } },
-
-    { "IA32_INST_RETIRED", 0x15, PMC_4567, { } },
-    { "IA64_INST_RETIRED", 0x08, PMC_45, 
-      { { "ALL", 0 }, { "PMC8", 0x3}, { "PMC9", 0x2 } }
-    },
-    { "INST_ACCESS_CYCLE", 0x01, PMC_4567, { } },
-    { "INST_DISPERSED", 0x2d, PMC_45, { } },
-    { "INST_FAILED_CHKS_RETIRED", 0x35, PMC_4567, 
-      { { "ALL", 0x3}, { "FP", 0x2 }, { "INTEGER", 0x1 } }
-    },
-    { "INSTRUCTION_EAR_EVENTS", 0x23, PMC_4567, { } },
-    { "ISA_TRANSITIONS", 0x14, PMC_4567, { } },
-    { "ISB_LINES_IN", 0x26, PMC_4567, { } },
-    { "ITLB_INSERT_HPW", 0x28, PMC_4567, { } },
-    { "ITLB_MISSES_FETCH", 0x27, PMC_4567, { } },
-    { "L1_READ_FORCED_MISSES_RETIRED", 0x6b, PMC_4567, { } },
-    { "L1_READ_MISSES_RETIRED", 0x66, PMC_4567, { } },
-    { "L1_READS_RETIRED", 0x64, PMC_4567, { } },
-    { "L1_DEMAND_READS", 0x20, PMC_4567, { } },
-    { "L1I_FILLS", 0x21, PMC_4567, { } },
-    { "L1I_PREFETCH_READS", 0x24, PMC_4567, { } },
-    { "L2_DATA_REFERENCES", 0x69, PMC_4567, 
-      { { "ALL", 0x3 }, { "READS", 0x1 }, { "WRITES", 0x2 } }
-    },
-    { "L2_FLUSH_DETAILS", 0x77, PMC_4567, 
-      { { "ALL", 0x7 }, 
-	{ "L2_ST_BUFFER_FLUSH", 0x1 }, 
-	{ "L2_ADDR_CONFLICT", 0x2 },
-	{ "L2_BUS_REJECT", 0x4 }, 
-	{ "L2_FULL_FLUSH", 0x8 } }
-    },
-    { "L2_INST_DEMAND_READS", 0x22, PMC_4567, { } },
-    { "L2_INST_PREFETCH_READS", 0x25, PMC_4567, { } },
-    { "L2_MISSES", 0x6a, PMC_4567, { } },
-    { "L2_REFERENCES", 0x68, PMC_4567, { } },
-    { "L3_LINES_REPLACED", 0x7f, PMC_4567, { } },
-    { "L3_MISSES", 0x7c, PMC_4567, { } },
-    { "L3_READS.ALL_READS", 0x7d, PMC_4567, 
-      { { "ALL", 0xf }, { "HIT", 0xd }, { "MISS", 0xe } }
-    },
-    { "L3_READS.DATA_READS", 0x7d, PMC_4567, 
-      { { "ALL", 0xb }, { "HIT", 0x9 }, { "MISS", 0xa } }
-    },
-    { "L3_READS.INST_READS", 0x7d, PMC_4567, 
-      { { "ALL", 0x7 }, { "HIT", 0x5 }, { "MISS", 0x6 } }
-    },
-    { "L3_REFERENCES", 0x7b, PMC_4567, { } },
-    { "L3_WRITES.ALL_WRITES", 0x7e, PMC_4567, 
-      { { "ALL", 0xf }, { "HIT", 0xd }, { "MISS", 0xe } }
-    },
-    { "L3_WRITES.L2_WRITEBACK", 0x7e, PMC_4567, 
-      { { "ALL", 0xb }, { "HIT", 0x9 }, { "MISS", 0xa } }
-    },
-    { "L3_WRITES.DATA_WRITES", 0x7e, PMC_4567, 
-      { { "ALL", 0x7 }, { "HIT", 0x5 }, { "MISS", 0x6 } }
-    },
-    { "LOADS_RETIRED", 0x6c, PMC_4567, { } },
-    { "MEMORY_CYCLE", 0x07, PMC_4567, { } },
-    { "MISALIGNED_LOADS_RETIRED", 0x70, PMC_4567, { } },
-    { "MISALIGNED_STORES_RETIRED", 0x71, PMC_4567, { } },
-    { "NOPS_RETIRED", 0x30, PMC_45, { } },
-    { "PIPELINE_ALL_FLUSH_CYCLE", 0x4, PMC_4567, { } },
-    { "PIPELINE_BACKEND_FLUSH_CYCLE", 0x0, PMC_4567, { } },
-    { "PIPELINE_FLUSH", 0x33, PMC_4567, 
-      { { "ALL", 0xf }, 
-	{ "IEU_FLUSH", 0x8 },
-	{ "DTC_FLUSH", 0x4 },
-	{ "L1D_WAYMP_FLUSH", 0x2 },
-	{ "OTHER_FLUSH", 0x1 } }
-    },
-    { "PREDICATE_SQUASHED_RETIRED", 0x31, PMC_45, { } },
-    { "RSE_LOADS_RETIRED", 0x72, PMC_4567, { } },
-    { "RSE_REFERENCES_RETIRED", 0x65, PMC_4567, { } },
-    { "STORES_RETIRED", 0x6d, PMC_4567, { } },
-    { "UC_LOADS_RETIRED", 0x6e, PMC_4567, { } },
-    { "UC_STORES_RETIRED", 0x6f, PMC_4567, { } },
-    { "UNSTALLED_BACKEND_CYCLES", 0x05, PMC_4567, { } },
-};
-
-bool kdb_get_perfctr (pmc_itanium_t * pmc, word_t * pmc_mask)
-{
-
-    for (;;)
-    {
-	word_t ctr = get_dec ("Performance counter", ~0UL, "list");
-	if (ctr == ABORT_MAGIC)
-	    return false;
-
-	if (ctr == ~0UL)
-	{
-	    // List performance counters.
-	    word_t size = sizeof (perf_events) / sizeof (ia64_perf_event_t);
-	    for (word_t i = 1; i <= (size + 1) / 2; i++)
-	    {
-		printf ("%3d - %32s", i, perf_events[i-1].name);
-		if (i + ((size + 1) / 2) <= size)
-		    printf ("%3d - %32s", i + ((size + 1) / 2),
-			    perf_events[i + ((size + 1) / 2) - 1].name);
-		printf ("\n");
-	    }
-	}
-	else
-	{
-	    ctr--;
-
-	    ia64_perf_event_t * p = &perf_events[ctr];
-
-	    pmc->es = p->event_selector;
-	    pmc->umask = 0;
-	    *pmc_mask = p->pmc_mask;
-
-	    // Select umask.
-	    if (p->umask[0].name)
-	    {
-		word_t umask;
-		do {
-		    for (word_t i = 0; p->umask[i].name && i < 5; i++)
-			printf("%d=%s, ", i, perf_events[ctr].umask[i].name);
-
-		    umask = get_dec ("Select umask", 0, NULL);
-		    if (umask == ABORT_MAGIC)
-			return false;
-		} while (umask >= 4 || (! p->umask[umask].name));
-
-		pmc->umask = p->umask[umask].umask;
-		printf ("Perf counter: %s.%s\n",
-			p->name, p->umask[umask].name);
-	    }
-	    else
-		printf ("Perf counter: %s\n", p->name);
-
-	    return true;
-	}
-    } 
-}
-
diff --git a/kernel/kdb/arch/ia64/itanium/perf_profile.cc b/kernel/kdb/arch/ia64/itanium/perf_profile.cc
deleted file mode 100644
index b3ef6273..00000000
--- a/kernel/kdb/arch/ia64/itanium/perf_profile.cc
+++ /dev/null
@@ -1,221 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/itanium/perf_profile.cc
- * Description:   Continous profiling for Itanium
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: perf_profile.cc,v 1.6 2004/02/24 23:54:52 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_ARCH(itanium_perf.h)
-#include INC_GLUE(context.h)
-#include INC_GLUE(intctrl.h)
-#include INC_API(tcb.h)
-
-
-#define KNUTH_MAGIC		2654435761
-#define PROFILE_SIZE		( CONFIG_PROFILE_SIZE)
-#define PROFILE_INTERVAL	(-CONFIG_PROFILE_INTERVAL)
-
-
-bool kdb_get_perfctr (pmc_itanium_t * pmc, word_t * pmc_mask);
-
-static bool profiling_enabled = false;
-static word_t profiling_counter = 0;
-
-static word_t profile_table[PROFILE_SIZE];
-
-static void profile_handler (word_t irq, ia64_exception_context_t * frame);
-
-
-/**
- * Enable continous profiling.
- */
-DECLARE_CMD (cmd_ia64_perf_profile, ia64_perfmon, 'p', "profile",
-	     "enable continous profiling");
-
-CMD (cmd_ia64_perf_profile, cg)
-{
-    ia64_exception_context_t * frame =
-	(ia64_exception_context_t *) kdb.kdb_param;
-     ia64_exception_context_t * user_frame =
-	(ia64_exception_context_t *) kdb.kdb_current->get_stack_top () - 1;
-
-    pmc_itanium_t pmc = 0;
-    word_t i, reg, pmc_mask;
-
-    if (! kdb_get_perfctr (&pmc, &pmc_mask))
-	return CMD_NOQUIT;
-
-    do {
-	for (i = 1, reg = 0; (i & pmc_mask) == 0; i <<= 1, reg++)
-	    ;
-	reg = get_dec ("Select register", reg);
-	if (reg == ABORT_MAGIC)
-	    return CMD_NOQUIT;
-
-    } while (((1UL << reg) & pmc_mask) == 0);
-
-    pmc.ev = 0;		// no external visibility
-    pmc.oi = 1;		// enable overflow interrupt
-    pmc.pm = 1;		// allow user access
-    pmc.threshold = 0;	// sum up
-#ifdef CONFIG_CPU_IA64_ITANIUM2
-    pmc.enabled = 1;
-#endif
-    pmc.ism = 0;	// monitor IA32 and IA64 instructions
-
-    switch (get_choice ("Priviledge level", "User/Kernel/All", 'a'))
-    {
-    case 'u': pmc.plm = pmc_t::user; break;
-    case 'k': pmc.plm = pmc_t::kernel; break;
-    case 'a': pmc.plm = pmc_t::both; break;
-    default:
-	return CMD_NOQUIT;
-    }
-
-    if (profiling_enabled)
-    {
-	// Disable previous profiling counter.
-
-	pmc_t old_pmc = get_pmc (profiling_counter);
-	old_pmc.plm = pmc_t::none;
-	set_pmc (profiling_counter, old_pmc);
-    }
-
-    profiling_counter = reg;
-    profiling_enabled = true;
-
-    // Initalise profile table
-
-    for (i=0; i < PROFILE_SIZE; i++) {
-	profile_table[i] = 0;
-    }
-
-    // Enable interrupt vector
-
-    cr_ivec_t ivec;
-    ivec.raw = 0;
-    ivec.vector = IVEC_PERFMON;
-
-    cr_set_pmv (ivec);
-
-    get_interrupt_ctrl ()->register_handler (IVEC_PERFMON, profile_handler);
-
-    // Initialize performance monitoring registers.
-
-    set_pmc (reg, pmc);
-    set_pmd (reg, ((word_t)PROFILE_INTERVAL & PMD_MASK));
-
-#ifdef CONFIG_CPU_IA64_ITANIUM2
-    set_pmc (0, 0);
-#endif
-
-    frame->ipsr.pp = user_frame->ipsr.pp = 1;
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * Disable continous profiling.
- */
-DECLARE_CMD (cmd_ia64_perf_profile_disable, ia64_perfmon, 'P', "noprofile",
-	     "disable continous profiling");
-
-CMD (cmd_ia64_perf_profile_disable, cg)
-{
-    if (profiling_enabled)
-    {
-	// Disable previous profiling counter.
-
-	pmc_t old_pmc = get_pmc (profiling_counter);
-	old_pmc.plm = pmc_t::none;
-	set_pmc (profiling_counter, old_pmc);
-
-	// Disable profiling interrupt.
-
-	cr_ivec_t ivec;
-	ivec.raw = 0;
-	ivec.m = 1;
-
-	cr_set_pmv (ivec);
-    }
-    profiling_enabled = false;
-
-    return CMD_NOQUIT;
-}
-
-
-
-static void profile_handler (word_t irq, ia64_exception_context_t * frame)
-{
-    pmc_overflow_t overflow;
-    word_t hash;
-    // printf ("profile @ %p\n", frame->iip);
-
-    hash = ((word_t)frame->iip * KNUTH_MAGIC) % PROFILE_SIZE;
-
-    profile_table[hash] ++;
-
-    set_pmd (profiling_counter, ((word_t)PROFILE_INTERVAL & PMD_MASK));
-
-#ifdef CONFIG_CPU_IA64_ITANIUM2
-    set_pmc (0, 0); // clear freeze bit and overflow bit
-#endif
-
-    overflow.clr_freeze ();
-}
-
-
-/**
- * Dump profile
- */
-DECLARE_CMD (cmd_ia64_perf_profile_dump, ia64_perfmon, 'd', "dump",
-	     "dump profile");
-
-CMD (cmd_ia64_perf_profile_dump, cg)
-{
-    word_t i;
-
-    set_pmc(0, 1);  // set freeze bit
-
-    printf("Profile IP hash-table dump:\n");
-    printf("Bucket\tCount\n");
-    for (i=0; i < PROFILE_SIZE; i++) {
-	if (profile_table[i] > 0) {
-	    printf("%d\t%d\n", i, profile_table[i]);
-	}
-    }
-
-    set_pmc(0, 0);  // clear freeze bit
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/ia64/itanium2/Makeconf b/kernel/kdb/arch/ia64/itanium2/Makeconf
deleted file mode 100644
index c6ec3320..00000000
--- a/kernel/kdb/arch/ia64/itanium2/Makeconf
+++ /dev/null
@@ -1,37 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2003,  Karlsruhe University
-##                
-## File path:     kdb/arch/ia64/itanium2/Makeconf
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf,v 1.2 2003/09/24 19:05:07 skoglund Exp $
-##                
-######################################################################
-
-ifeq ("$(CONFIG_PERFMON)","y")
-SOURCES+=	kdb/arch/ia64/itanium/perf.cc \
-		kdb/arch/ia64/itanium/perf_branchtrace.cc \
-		kdb/arch/ia64/itanium/perf_events.cc \
-		kdb/arch/ia64/itanium/perf_profile.cc 
-endif
diff --git a/kernel/kdb/arch/ia64/perf.cc b/kernel/kdb/arch/ia64/perf.cc
deleted file mode 100644
index 4cea96ef..00000000
--- a/kernel/kdb/arch/ia64/perf.cc
+++ /dev/null
@@ -1,110 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/perf.cc
- * Description:   IA64 performance monitoring functionailty
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: perf.cc,v 1.5 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-
-#include INC_ARCH(pal.h)
-#include INC_ARCH(perf.h)
-
-
-/* 
- * We read the perfmon info and mask on first time entering the
- * perfmon submenu to avoid doing it on each function
- */
-pal_perf_mon_info_t perf_info;
-pal_perf_mon_masks_t perf_masks;
-
-
-/**
- * Command group for IA64 performance monitoring functionality.
- */
-DECLARE_CMD_GROUP (ia64_perfmon);
-
-
-/**
- * Enter IA64 performance monitoring menu.
- */
-DECLARE_CMD (cmd_ia64_perfmon, arch, 'p', "perfmon", "performance monitoring");
-
-CMD (cmd_ia64_perfmon, cg)
-{
-    static bool initialized = false;
-
-    if (! initialized)
-    {
-	pal_status_e status;
-	if ((status = pal_perf_mon_info (&perf_masks, &perf_info)) != PAL_OK)
-	{
-	    printf ("Error: PAL_PERF_MON_INFO => %d\n", (long) status);
-	    return CMD_NOQUIT;
-	}
-
-	initialized = true;
-    }
-
-    return ia64_perfmon.interact (cg, "perfmon");
-}
-
-
-/**
- * Dump all performance monitoring configuration and data registers.
- */
-DECLARE_CMD (cmd_dump_all_regs, ia64_perfmon, 'a', "dumpregs",
-	     "dump all registers");
-
-CMD (cmd_dump_all_regs, cg)
-{
-    printf ("Performance configuration registers:\n");
-    for (word_t i = 0; i < 256; i++)
-	if (perf_masks.is_pmc_implemented (i))
-	    printf ("  pmc[%d]%s = %p %s%s\n",
-		    i, i >= 100 ? "" : i >= 10 ? " " : "  ",
-		    (word_t) get_pmc (i),
-		    perf_masks.can_count_cycles (i) ? "(cycles) " : "",
-		    perf_masks.can_count_retired_bundles (i) ?
-		    "(retired bundles) " : "");
-
-    printf ("\nPerformance data registers:\n");
-    for (word_t i = 0; i < 256; i++)
-	if (perf_masks.is_pmd_implemented (i))
-	    printf ("  pmd[%d]%s = %p %s%s\n",
-		    i, i >= 100 ? "" : i >= 10 ? " " : "  ",
-		    (word_t) get_pmd (i),
-		    perf_masks.can_count_cycles (i) ? "(cycles) " : "",
-		    perf_masks.can_count_retired_bundles (i) ?
-		    "(retired bundles) " : "");
-
-    return CMD_NOQUIT;
-}
-
-
diff --git a/kernel/kdb/arch/ia64/pkrs.cc b/kernel/kdb/arch/ia64/pkrs.cc
deleted file mode 100644
index be7d9fd2..00000000
--- a/kernel/kdb/arch/ia64/pkrs.cc
+++ /dev/null
@@ -1,77 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/pkrs.cc
- * Description:   Protection key register access
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pkrs.cc,v 1.6 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include INC_ARCH(pkr.h)
-#include INC_ARCH(pal.h)
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-
-
-/**
- * cmd_pkrs: dump protection key registers
- */
-DECLARE_CMD (cmd_pkrs, arch, 'P', "pkrs", "dump protection key registers");
-
-CMD(cmd_pkrs, cg)
-{
-    pal_vm_summary_t info;
-    pal_status_e status;
-
-    /*
-     * Get number of implemented registers.
-     */
-
-    if ((status = pal_vm_summary (&info)) != PAL_OK)
-    {
-	printf ("Error: PAL_VM_SUMMARY => %d\n", status);
-	return CMD_NOQUIT;
-    }
-
-    int num_pkrs = info.max_pkr + 1;
-
-    static const char * rights[] = {
-	"no rights", "write-only", "read-only", "exec-only",
-	"read/write", "read/exec", "write/exec", "read/write/exec"
-    };
-
-    printf ("Protection key registers:\n");
-    for (int i = 0; i < num_pkrs; i++)
-    {
-	pkr_t pkr = get_pkr (i);
-	printf ("  pkr[%d]%s = %s  key: 0x%5x,  %s\n",
-		i, i < 10 ? " " : "",
-		pkr.is_valid () ? "valid,  " : "invalid,", pkr.key (),
-		rights[pkr.access_rights ()]);
-    }
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/ia64/prepost.cc b/kernel/kdb/arch/ia64/prepost.cc
deleted file mode 100644
index 6c59555a..00000000
--- a/kernel/kdb/arch/ia64/prepost.cc
+++ /dev/null
@@ -1,214 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/prepost.cc
- * Description:   Entry and exit stubs for kernel debugger
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: prepost.cc,v 1.25 2004/06/02 08:41:42 sgoetz Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/console.h>
-#include <linear_ptab.h>
-
-#include INC_ARCH(instr.h)
-#include INC_GLUE(context.h)
-#include INC_GLUE(registers.h)
-#include INC_API(tcb.h)
-
-
-#if defined(CONFIG_KDB_DISAS)
-
-extern "C" int disas (addr_t ip);
-#define DISAS(ip) do {				\
-    printf ("%p: ", ip);			\
-    disas (ip);					\
-    printf ("\n");				\
-} while (0)
-#define BSRC(ip) printf ("src - ")
-#define BDST(ip) printf ("dst - ")
-
-#else /* !CONFIG_KDB_DISAS */
-#define DISAS(ip)
-#define BSRC(ip) printf ("Branch %p ===> ", ip)
-#define BDST(ip) printf ("%p\n", ip)
-#endif
-
-
-bool kdb_t::pre (void)
-{
-    ia64_exception_context_t * frame = (ia64_exception_context_t *) kdb_param;
-    tcb_t * current = addr_to_tcb (frame);
-    space_t * space = current->get_space ();
-
-    ia64_instr_t i0, i1, i2;
-    ia64_bundle_t bundle;
-
-    if (frame->exception_num == 11)
-    {
-	if (space->is_user_area (frame->iip))
-	{
-	    // Instruction may not be mapped in the DTLB
-	    space->readmem (frame->iip, &bundle.raw64[0]);
-	    space->readmem (addr_offset (frame->iip, sizeof (word_t)),
-			    &bundle.raw64[1]);
-	}
-	else
-	{
-	    // Instruction should be mapped by kernel TR
-	    bundle.raw64[0] = ((word_t *) frame->iip)[0];
-	    bundle.raw64[1] = ((word_t *) frame->iip)[1];
-	}
-
-	i0 = bundle.slot (0);
-	i1 = bundle.slot (1);
-	i2 = bundle.slot (2);
-    }
-
-    /*
-     * Check for single step traps.
-     */
-    if (frame->exception_num == 35 || frame->exception_num == 36)
-    {
-	addr_t ip = addr_offset (frame->iipa,
-				 frame->isr.instruction_slot * 6);
-	if (frame->exception_num == 35)
-	    BSRC (ip);
-	DISAS (ip);
-	if (frame->exception_num == 35)
-	{
-	    ip = addr_offset (frame->iip, frame->ipsr.ri * 6);
-	    BDST (ip);
-	    DISAS (ip);
-	}
-	frame->ipsr.ss = 0;
-	frame->ipsr.tb = 0;
-	return true;
-    }
-
-    else if (frame->exception_num == 29)
-    {
-	addr_t ip = addr_offset (frame->iip, frame->ipsr.ri * 6);
-	if (frame->isr.rwx == 1)
-	    printf ("Debug exec fault @ %p [current=%t]\n", ip, current);
-	else
-	    printf ("Debug %s fault @ %p (data @ %p) [current=%t]\n",
-		    frame->isr.rwx == 2 ? "write" :
-		    frame->isr.rwx == 4 ? "read" : "read/write",
-		    ip, frame->ifa, current);
-	DISAS (ip);
-	return true;
-    }
-
-    /*
-     * Check if break instruction is a kdebug operation.  Kdebug
-     * operations have the following format:
-     *
-     *   { .mlx
-     *   (qp) break.m	<type>
-     *   (qp) movl	r0 = <arg> ;;
-     *   }
-     */
-    else if (frame->exception_num == 11 &&
-	     bundle.get_template () == ia64_bundle_t::mlx_s3 &&
-	     i0.m_nop.is_break () &&
-	     i2.x_movl.is_movl () && i2.x_movl.reg () == 0)
-    {
-	switch (i0.m_nop.immediate ())
-	{
-	case 3:
-	{
-	    //
-	    // enter_kdebug (string)
-	    //
-
-	    addr_t addr = (addr_t) i2.x_movl.immediate (i1);
-
-	    if (! space->is_user_area (addr) && frame->ipsr.cpl != 0)
-	    {
-		printf (TXT_BRIGHT "--- KD# [Invalid string @ %p] ---"
-			TXT_NORMAL "\n", addr);
-	    }
-	    else
-	    {
-		char c;
-		printf (TXT_BRIGHT "--- KD# ");
-		while (readmem (space, addr, &c) && (c != 0))
-		{
-		    putc (c);
-		    addr = addr_offset (addr, 1);
-		}
-		printf (" ---" TXT_NORMAL "\n");
-	    }
-
-	    return true;
-	}
-
-	case 1:
-	    //
-	    // PrintChar (r14)
-	    //
-	    printf ("%c", frame->r14);
-	    return false;
-
-	case 2:
-	    //
-	    // r14 = GetChar_Blocked ()
-	    //
-	    frame->r14 = getc (true);
-	    return false;
-
-	case 4:
-	    //
-	    // r14 = GetChar ()
-	    //
-	    frame->r14 = getc (false);
-	    return false;
-
-	default:
-	    printf (TXT_BRIGHT "--- Unknown KDB operation (%d) ---"
-		    TXT_NORMAL "\n", i0.m_nop.immediate ());
-	    return true;
-	}
-    }
-
-    return true;
-}
-
-
-void kdb_t::post (void)
-{
-    ia64_exception_context_t * frame = (ia64_exception_context_t *) kdb_param;
-
-    if (frame->exception_num == 29)
-    {
-	if (frame->isr.rwx == 1)
-	    frame->ipsr.id = 1;
-	else
-	    frame->ipsr.dd = 1;
-    }
-}
-
diff --git a/kernel/kdb/arch/ia64/rrs.cc b/kernel/kdb/arch/ia64/rrs.cc
deleted file mode 100644
index 8e58ad0b..00000000
--- a/kernel/kdb/arch/ia64/rrs.cc
+++ /dev/null
@@ -1,66 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/rrs.cc
- * Description:   Region register access
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: rrs.cc,v 1.5 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(rr.h)
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include <debug.h>
-
-
-/**
- * cmd_rrs: dump region registers
- */
-DECLARE_CMD (cmd_rrs, arch, 'r', "rrs", "dump region registers");
-
-CMD(cmd_rrs, cg)
-{
-    printf ("Region registers:\n");
-    for (int i = 0; i < 8; i++)
-    {
-	rr_t rr = get_rr (i);
-	word_t size = rr.page_size ();
-	char ss;
-
-	if (size >= GB (1))
-	    ss = 'G', size >>= 30;
-	else if (size >= MB (1))
-	    ss = 'M', size >>= 20;
-	else
-	    ss = 'K', size >>= 10;
-	
-	printf ("  rr[%d] = rid: 0x%5x,  page size: %3d%cB,  VHPT %s\n",
-		i, rr.region_id (), size, ss,
-		rr.is_vhpt_enabled () ? "enabled" : "disabled");
-    }
-
-    return CMD_NOQUIT;
-}
-
diff --git a/kernel/kdb/arch/ia64/sal.cc b/kernel/kdb/arch/ia64/sal.cc
deleted file mode 100644
index 045cf734..00000000
--- a/kernel/kdb/arch/ia64/sal.cc
+++ /dev/null
@@ -1,160 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/sal.cc
- * Description:   SAL table dumping
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sal.cc,v 1.3 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include INC_ARCH(sal.h)
-
-DECLARE_CMD (cmd_ia64_dumpsal, arch, 'S', "sal", "dump SAL table");
-
-CMD(cmd_ia64_dumpsal, cg)
-{
-    // declared in arch/ia64/sal.cc
-    extern sal_system_table_t * ia64_sal_table;
-
-    if (ia64_sal_table == NULL || !ia64_sal_table->is_valid())
-    {
-	printf("SAL table invalid (%p)\n", ia64_sal_table);
-	return CMD_NOQUIT;
-    }
-
-    printf("OEM id:     \"");
-    for (unsigned i = 0; i < 32; i++)
-    {
-	if (ia64_sal_table->oem_id[i] == 0) break;
-	printf("%c", ia64_sal_table->oem_id[i]);
-    }
-
-    printf("\"\nProduct id: \"");
-    for (unsigned i = 0; i < 32; i++)
-    {
-	if (ia64_sal_table->product_id[i] == 0) break;
-	printf("%c", ia64_sal_table->oem_id[i]);
-    }
-    printf("\"\n");
-
-    u8_t * entry = (u8_t *) ia64_sal_table + sizeof (*ia64_sal_table);
-    for (int i = 0; i < ia64_sal_table->entry_count; i++)
-    {
-	switch (*entry)
-	{
-	case 0:
-	{
-	    printf ("\nEntrypoint Descriptor:\n");
-	    sal_entrypoint_desc_t * ed = (sal_entrypoint_desc_t *) entry;
-		
-	    printf ("  PAL proc at %p\n"
-		    "  SAL proc at %p, gp at %p\n",
-		    ed->pal_proc, ed->sal_proc, ed->sal_global_data);
-	    entry += 48;
-	    break;
-	}
-
-	case 1:
-	{
-	    //printf ("Memory Descriptor:\n");
-	    entry += 32;
-	    break;
-	}
-		
-	case 2:
-	{
-	    printf ("\nPlatform Features Descriptor:\n");
-	    sal_feature_desc_t * fd = (sal_feature_desc_t *) entry;
-	    static const char * sal_features[] = {"bus lock", 
-						  "IRQ redirection hint", 
-						  "IPI redirection hint",
-						  "?", "?", "?", "?", "?" };
-	    printf("  Platform features: 0x%x [", fd->raw);
-	    for (word_t i = 0; i < 8; i++)
-		if (fd->raw & (1UL << i)) 
-		    printf ("%s%s", sal_features[i], 
-			    fd->raw >> (i + 1) ? ", " : "");
-	    printf ("]\n");
-	    entry += 16;
-	    break;
-	}
-
-	case 3:
-	{
-	    printf ("\nTranslation Register Descriptor:\n");
-	    sal_trans_reg_desc_t* reg = (sal_trans_reg_desc_t *) entry;
-	    
-	    printf ("  %s translation register # %d\n"
-		    "     Covered area: %p\n"
-		    "     Page size:    %d\n",
-		    reg->reg_type == 0 ? "Instruction" :
-		    reg->reg_type == 1 ? "Data" : "Unknown",
-		    reg->reg_num,
-		    reg->covered_area,
-		    reg->page_size);
-
-	    entry += 32;
-	    break;
-	}
-
-	case 4:
-	{
-	    printf ("\nPurge Translation Cache Coherence Descriptor:\n");
-	    sal_purge_tc_domain_desc_t * ptc = 
-		(sal_purge_tc_domain_desc_t *) entry;
-		
-	    printf ("  Translation cache coherency domains: %d\n"
-		    "  Domain info at %p\n",
-		    ptc->num_domains, ptc->domain_info);
-	    
-	    entry += 16;
-	    break;
-	}
-
-	case 5:
-	{
-	    printf ("\nAP Wakeup Descriptor:\n");
-	    sal_ap_wakeup_desc_t * wd = (sal_ap_wakeup_desc_t *) entry;
-	    printf ("  AP wakeup mechanism: %s (%x), IRQ vector: 0x%2x\n",
-		    wd->wakeup_mechanism == 0 ? "external interrupt" :
-		    "unknown", wd->wakeup_mechanism, 
-		    wd->irq_vector);
-	    entry += 16;
-	    break;
-	}
-	    
-	default:
-	    /*
-	     * Unknown SAL entries will always be located at end.
-	     */
-	    printf ("Unknown SAL entry: %d\n", *entry);
-	    break;
-	}
-    }
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/ia64/singlestep.cc b/kernel/kdb/arch/ia64/singlestep.cc
deleted file mode 100644
index afd1df9e..00000000
--- a/kernel/kdb/arch/ia64/singlestep.cc
+++ /dev/null
@@ -1,66 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/singlestep.cc
- * Description:   Single stepping for IA-64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: singlestep.cc,v 1.4 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <kdb/kdb.h>
-
-#include INC_GLUE(context.h)
-
-
-/**
- * cmd_singlestep: execute next instrucion in instruction stream
- */
-DECLARE_CMD (cmd_singlestep, root, 's', "singlestep",
-	     "single step instrucion");
-
-CMD (cmd_singlestep, cg)
-{
-    ia64_exception_context_t * frame =
-	(ia64_exception_context_t *) kdb.kdb_param;
-
-    frame->ipsr.ss = 1;
-    return CMD_QUIT;
-}
-
-
-/**
- * cmd_branchstep: execute instructions until next branch is taken
- */
-DECLARE_CMD (cmd_branchstep, root, 'S', "branchstep",
-	     "execute until next taken branch");
-
-CMD (cmd_branchstep, cg)
-{
-    ia64_exception_context_t * frame =
-	(ia64_exception_context_t *) kdb.kdb_param;
-
-    frame->ipsr.tb = 1;
-    return CMD_QUIT;
-}
diff --git a/kernel/kdb/arch/ia64/tlb.cc b/kernel/kdb/arch/ia64/tlb.cc
deleted file mode 100644
index c7572838..00000000
--- a/kernel/kdb/arch/ia64/tlb.cc
+++ /dev/null
@@ -1,274 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     kdb/arch/ia64/tlb.cc
- * Description:   TLB and TR management commands
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tlb.cc,v 1.11 2003/09/24 19:05:06 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include INC_ARCH(pal.h)
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-#include INC_ARCH(rr.h)
-
-
-static void dump_trs (word_t type);
-
-DECLARE_CMD_GROUP (ia64_tlb);
-
-
-/**
- * IA-64 TLB management.
- */
-DECLARE_CMD (cmd_ia64_tlb, arch, 't', "tlb", "TLB and TR management");
-
-CMD(cmd_ia64_tlb, cg)
-{
-    return ia64_tlb.interact (cg, "tlb");
-}
-
-
-/**
- * Dump IA-64 instruction TRs.
- */
-DECLARE_CMD (cmd_ia64_itrs, ia64_tlb, 'i', "itrs", "dump instruction TRs");
-
-CMD(cmd_ia64_itrs, cg)
-{
-    printf ("Instruction translation registers:\n");
-    dump_trs (0);
-    return CMD_NOQUIT;
-}
-
-/**
- * Dump in-memory ITR map.
- */
-DECLARE_CMD (cmd_ia64_itrmap, ia64_tlb, 'I', "itrmap",
-	     "dump in-memory ITR map");
-
-CMD(cmd_ia64_itrmap, cg)
-{
-    printf ("In-memory instruction translation mappings:\n");
-    itrmap.dump ();
-    return CMD_NOQUIT;
-}
-
-
-/**
- * Dump IA-64 data TRs.
- */
-DECLARE_CMD (cmd_ia64_dtrs, ia64_tlb, 'd', "dtrs", "dump data TRs");
-
-CMD(cmd_ia64_dtrs, cg)
-{
-    printf ("Data translation registers:\n");
-    dump_trs (1);
-    return CMD_NOQUIT;
-}
-
-/**
- * Dump in-memory DTR map.
- */
-DECLARE_CMD (cmd_ia64_dtrmap, ia64_tlb, 'D', "dtrmap",
-	     "dump in-memory DTR map");
-
-CMD(cmd_ia64_dtrmap, cg)
-{
-    printf ("In-memory data translation mappings:\n");
-    dtrmap.dump ();
-    return CMD_NOQUIT;
-}
-
-
-void SECTION(SEC_KDEBUG) dump_trs (word_t type)
-{
-    pal_vm_summary_t info;
-    pal_status_e status;
-
-    /*
-     * Get number of implemented registers.
-     */
-
-    if ((status = pal_vm_summary (&info)) != PAL_OK)
-    {
-	printf ("Error: PAL_VM_SUMMARY => %d\n", status);
-	return;
-    }
-
-    word_t max_entry = (type == 0) ? info.max_itr_entry : info.max_dtr_entry;
-
-    struct {
-	translation_t	tr;
-	word_t		itir;
-	word_t		ifa;
-	rr_t		rr;
-    } translation;
-    pal_vm_tr_read_t	valbits;
-
-    static const char * rights[] = {
-	"ro", "rx", "rw", "rwx",
-	"ro/rw", "rx/rwx", "rwx/rw", "xp/rx"
-    };
-
-    static const char * memattrib[] = {
-	"WB ", "~~~", "~~~", "~~~",
-	"UC ", "UCe", "WC ", "NaT"
-    };
-
-    /*
-     * Dump translations.
-     */
-
-    printf ("  %9s%16s    %16s  PAD  Priv  PSize  Key    RID    Mem  Access\n",
-	    "", "Virt", "Phys");
-
-    for (word_t i = 0; i <= max_entry; i++)
-    {
-	status = pal_vm_tr_read (i, type, &translation, &valbits);
-	if (status != PAL_OK)
-	{
-	    printf ("Error: PAL_VM_TR_READ => %d\n", status);
-	    continue;
-	}
-
-	word_t pgsz = (translation.itir & 0xff) >> 2;
-
-	printf ("  %ctr[%d]%s  %p => %p  %c%c%c  %4d  ",
-		(type == 0 ? 'i' : 'd'), i, (i < 10 ? " " : ""),
-		translation.ifa & ~((1 << 12) - 1),
-		translation.tr.phys_addr (),
-		translation.tr.is_present ()  ? 'p' : '~',
-		translation.tr.is_accessed () ? 'a' : '~',
-		translation.tr.is_dirty ()    ? 'd' : '~',
-		translation.tr.privilege_level ());
-	printf ("%3d%cB  %5x  %5x  %s  %s\n",
-		1 << (pgsz - ((pgsz >= 30) ? 30 : (pgsz >= 20) ? 20 : 10)),
-		((pgsz >= 30) ? 'G' : (pgsz >= 20) ? 'M' : 'K'),
-		(translation.itir >> 8) & 0xfffff,
-		translation.rr.region_id (),
-		(valbits.memory_attributes_valid ? 
-		 memattrib[translation.tr.memattrib ()] : "~~~"),
-		(valbits.access_right_valid ? 
-		 rights[translation.tr.access_rights ()] : "~"));
-    }
-
-}
-
-
-void print_size (word_t k) __attribute__ ((noinline));
-void print_size (word_t k)
-{
-    if (k >= 60)
-	printf ("%dbits ", k);
-    else
-	printf (" %d%c",
-		1UL << (k - ((k>=50) ? 50 : (k>=40) ? 40 : (k>=30) ? 30 :
-			     (k>=20) ? 20 : 10)),
-		(k>=50) ? 'P' : (k>=40) ? 'T' : (k>=30) ? 'G' :
-		(k>=20) ? 'M' : 'K');
-}
-
-
-/**
- * cmd_tlb_info: dump TLB information
- */
-DECLARE_CMD (cmd_tlb_info, ia64_tlb, 't', "info", "dump TLB information");
-
-CMD(cmd_tlb_info, cg)
-{
-    pal_vm_summary_t summary;
-    pal_vm_info_t info;
-    pal_status_e status;
-
-    if ((status = pal_vm_summary (&summary)) != PAL_OK)
-    {
-	printf ("Error: PAL_VM_SUMMARY => %d\n", status);
-	return CMD_NOQUIT;
-    }
-
-    printf ("TLB info:\n");
-    pal_vm_info_t::type_e type = pal_vm_info_t::code;
-
-    do {
-
-	for (word_t i = 0; i < summary.num_tc_levels; i++)
-	{
-	    if ((status = pal_vm_info (i, type, &info)) != PAL_OK)
-		continue;
-
-	    printf ("  %cTLB L%d: %4d entries ",
-		    type == pal_vm_info_t::code ? 'I' : 'D',
-		    i+1,  info.num_entries);
-
-	    if (info.num_ways == 1)
-		printf ("(direct)");
-	    else
-		printf ("(%d-way)", info.num_ways);
-
-	    if (info.unified)
-		printf (" UNIFIED");
-	    if (info.unified)
-		printf (" OPTIMIZED");
-
-	    printf (" (sizes:");
-	    for (word_t k = 12; k < 64; k++)
-		if (info.page_size_mask & (1UL << k))
-		    print_size (k);
-	    printf (")\n");
-	}
-
-	if (type == pal_vm_info_t::code)
-	    type = pal_vm_info_t::data;
-	else
-	    type = pal_vm_info_t::none;
-
-    } while (type != pal_vm_info_t::none);
-
-    printf ("\nTR info:\n");
-    printf ("  Num ITRs: %3d\n  Num DTRs: %3d\n",
-	    summary.max_itr_entry+1, summary.max_dtr_entry+1);
-
-    word_t insertable, purgeable;
-    if ((status = pal_vm_page_size (&insertable, &purgeable)) != PAL_OK)
-    {
-	printf ("Error: PAL_VM_PAGE_SIZE => %d\n", (long) status);
-	return CMD_NOQUIT;
-    }
-
-    printf ("\nPage size info:\n  Insertable:");
-    for (word_t k = 12; k < 64; k++)
-	if (insertable & (1UL << k))
-	    print_size (k);
-    printf ("\n  Purgeable: ");
-    for (word_t k = 12; k < 64; k++)
-	if (purgeable & (1UL << k))
-	    print_size (k);
-    printf ("\n");
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/mips32/Makeconf b/kernel/kdb/arch/mips32/Makeconf
deleted file mode 100644
index 8d58acda..00000000
--- a/kernel/kdb/arch/mips32/Makeconf
+++ /dev/null
@@ -1,41 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2006,  Karlsruhe University
-##                
-## File path:     kdb/arch/mips32/Makeconf
-## Description:   
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf,v 1.1 2006/02/23 21:07:42 ud3 Exp $
-##                
-######################################################################
-
-SOURCES += ${addprefix kdb/arch/mips32/, prepost.cc breakin.cc }
-
-SOURCES +=	kdb/generic/linear_ptab_dump.cc
-
-ifeq ("$(CONFIG_NEW_MDB)","y")
-SOURCES+=	kdb/generic/mdb.cc
-else
-SOURCES+=	kdb/generic/mapping.cc
-endif
diff --git a/kernel/kdb/arch/mips32/breakin.cc b/kernel/kdb/arch/mips32/breakin.cc
deleted file mode 100644
index 2e867034..00000000
--- a/kernel/kdb/arch/mips32/breakin.cc
+++ /dev/null
@@ -1,48 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     kdb/arch/mips32/breakin.cc
- * Description:   Asynchronous KDB entry check for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: breakin.cc,v 1.1 2006/02/23 21:07:42 ud3 Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/console.h>
-
-#if defined(CONFIG_KDB_BREAKIN)
-void SECTION(".kdebug") kdebug_check_breakin(void) {
-    switch( getc(false) ) {
-    case '\e':
-        enter_kdebug("KDB Breakin");
-        return;
-    default:
-        return;
-    }	
-}
-#endif
-
diff --git a/kernel/kdb/arch/mips32/prepost.cc b/kernel/kdb/arch/mips32/prepost.cc
deleted file mode 100644
index 37b47302..00000000
--- a/kernel/kdb/arch/mips32/prepost.cc
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     kdb/arch/mips32/prepost.cc
- * Description:   KDB entry/exit hooks for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: prepost.cc,v 1.1 2006/02/23 21:07:42 ud3 Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_ARCH(cp0regs.h)
-#include INC_API(tcb.h)
-
-bool kdb_t::pre() {
-    word_t entryhi = read_32bit_cp0_register(CP0_ENTRYHI);
-    word_t epc = read_32bit_cp0_register(CP0_EPC);
-    word_t badvaddr = read_32bit_cp0_register(CP0_BADVADDR);
-    printf ("\t-- asid = %d, epc = 0x%x, badvaddr = 0x%x  --\n", entryhi&0xFF, epc, badvaddr);
-    return true;
-}
-void kdb_t::post() { }
-
diff --git a/kernel/kdb/arch/mips64/Makeconf b/kernel/kdb/arch/mips64/Makeconf
deleted file mode 100644
index 34f74be6..00000000
--- a/kernel/kdb/arch/mips64/Makeconf
+++ /dev/null
@@ -1,9 +0,0 @@
-
-SOURCES += ${addprefix kdb/arch/mips64/, prepost.cc tlb.cc cpuid.cc reboot.cc cp0.cc watch.cc frame.cc}
-
-ifeq ("$(CONFIG_KDB_DISAS)","y")
-SOURCES+=	kdb/arch/mips64/disas.cc 
-endif
-
-SOURCES +=	kdb/generic/linear_ptab_dump.cc \
-		kdb/generic/mapping.cc
diff --git a/kernel/kdb/arch/mips64/cp0.cc b/kernel/kdb/arch/mips64/cp0.cc
deleted file mode 100644
index 08766223..00000000
--- a/kernel/kdb/arch/mips64/cp0.cc
+++ /dev/null
@@ -1,165 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     kdb/arch/mips64/cp0.cc
- * Description:   MIPS-64 CPUID
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cp0.cc,v 1.2 2003/09/24 19:05:08 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_ARCH(mips_cpu.h)
-#include INC_ARCH(cpu.h)
-
-/**
- * cmd_dpuid: dump CPU ID
- */
-DECLARE_CMD (cmd_cp0, arch, '0', "dumpcp0", "dump cp0 registers");
-
-typedef struct
-{
-    char    *name;
-    int	    num;
-    int	    word64;
-} cp0_reg;
-
-/* Coprocessor 0 register names */
-#define INDEX		0
-#define RANDOM		1
-#define ENTRYLO0	2
-#define ENTRYLO1	3
-#define CONTEXT		4
-#define PAGEMASK	5
-#define WIRED		6
-#define BADVADDR	8
-#define COUNT		9
-#define ENTRYHI		10
-#define COMPARE		11
-#define STATUS		12
-#define CAUSE		13
-#define EPC		14
-#define PRID		15
-#define CONFIG		16
-#define LLADDR		17
-#define WATCHLO		18
-#define WATCHHI		19
-#define XCONTEXT	20
-#define FRAMEMASK	21
-#define DIAGNOSTIC	22
-#define PERFORMANCE	25
-#define ECC		26
-#define CACHEERR	27
-#define TAGLO		28
-#define TAGHI		29
-#define ERROREPC	30
-
-static cp0_reg regs[] =
-{
-    { "BadVaddr",  BADVADDR, 1 },
-    { "CacheErr",  CACHEERR, 0 },
-    { "Cause",     CAUSE, 0 }, 
-    { "Compare",   COMPARE, 0 },
-    { "Config",    CONFIG, 0 },
-    { "Context",   CONTEXT, 1 },
-    { "Count",     COUNT, 0 },
-    { "ECC",       ECC, 0 },
-    { "EntryHi",   ENTRYHI, 1 },
-    { "EntryLo0",  ENTRYLO0, 1 },
-    { "EntryLo1",  ENTRYLO1, 1 },
-    { "EPC",       EPC, 1 },
-    { "ErrorEPC",  ERROREPC, 1 },
-    { "Index",     INDEX, 0 },
-    { "LLaddr",    LLADDR, 0 },
-    { "PageMask",  PAGEMASK, 0 },
-    { "PerfCount", PERFORMANCE, 0 },
-    { "PRID",      PRID, 0 },
-    { "Random",    RANDOM, 0 },
-    { "Status",    STATUS, 0 },
-    { "TagHi0",    TAGHI, 0 },
-    { "TagLo0",    TAGLO, 0 },
-    { "WatchHi",   WATCHHI, 0 },
-    { "WatchLo",   WATCHLO, 0 },
-    { "Wired",     WIRED, 0 },
-    { "XContext",  XCONTEXT, 1 },
-    { 0, 0, 0 }
-};
-
-word_t read_cp0_reg(word_t i)
-{
-    word_t ret;
-
-    switch (i) {
-    case INDEX:		ret = read_32bit_cp0_register($0 ); break;
-    case RANDOM:	ret = read_32bit_cp0_register($1 ); break;
-    case ENTRYLO0:	ret = read_64bit_cp0_register($2 ); break;
-    case ENTRYLO1:	ret = read_64bit_cp0_register($3 ); break;
-    case CONTEXT:	ret = read_64bit_cp0_register($4 ); break;
-    case PAGEMASK:	ret = read_32bit_cp0_register($5 ); break;
-    case WIRED:		ret = read_32bit_cp0_register($6 ); break;
-    case BADVADDR:	ret = read_64bit_cp0_register($8 ); break;
-    case COUNT:		ret = read_32bit_cp0_register($9 ); break;
-    case ENTRYHI:	ret = read_64bit_cp0_register($10); break;
-    case COMPARE:	ret = read_32bit_cp0_register($11); break;
-    case STATUS:	ret = read_32bit_cp0_register($12); break;
-    case CAUSE:		ret = read_32bit_cp0_register($13); break;
-    case EPC:		ret = read_64bit_cp0_register($14); break;
-    case PRID:		ret = read_32bit_cp0_register($15); break;
-    case CONFIG:	ret = read_32bit_cp0_register($16); break;
-    case LLADDR:	ret = read_32bit_cp0_register($17); break;
-    case WATCHLO:	ret = read_32bit_cp0_register($18); break;
-    case WATCHHI:	ret = read_32bit_cp0_register($19); break;
-    case XCONTEXT:	ret = read_64bit_cp0_register($20); break;
-    case FRAMEMASK:	ret = read_64bit_cp0_register($21); break;
-    case DIAGNOSTIC:	ret = read_64bit_cp0_register($22); break;
-    case PERFORMANCE:	ret = read_32bit_cp0_register($25); break;
-    case ECC:		ret = read_32bit_cp0_register($26); break;
-    case CACHEERR:	ret = read_32bit_cp0_register($27); break;
-    case TAGLO:		ret = read_32bit_cp0_register($28); break;
-    case TAGHI:		ret = read_32bit_cp0_register($29); break;
-    case ERROREPC:	ret = read_64bit_cp0_register($30); break;
-    default: ret = 0x0000deadbeef0000UL;
-    }
-    return ret;
-}
-
-CMD (cmd_cp0, cg)
-{
-    word_t x;
-
-    printf("Dumping Contents of CP0 Registers\n");
-    x = 0;
-    while (regs[x].name) {
-	if (regs[x].word64)
-	    printf("  %12s [%2d]  0x%016lx\n", regs[x].name,
-			    regs[x].num, read_cp0_reg(regs[x].num));
-	else
-	    printf("  %12s [%2d]          0x%08lx\n", regs[x].name,
-			    regs[x].num, read_cp0_reg(regs[x].num));
-	x++;
-    } 
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/mips64/cpuid.cc b/kernel/kdb/arch/mips64/cpuid.cc
deleted file mode 100644
index 5829de58..00000000
--- a/kernel/kdb/arch/mips64/cpuid.cc
+++ /dev/null
@@ -1,130 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     kdb/arch/mips64/cpuid.cc
- * Description:   MIPS-64 CPUID
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cpuid.cc,v 1.6 2003/11/18 02:03:27 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_ARCH(mips_cpu.h)
-#include INC_ARCH(cpu.h)
-
-/**
- * cmd_dpuid: dump CPU ID
- */
-DECLARE_CMD (cmd_cpuid, arch, 'C', "cpuid", "dump CPUID");
-
-CMD (cmd_cpuid, cg)
-{
-    word_t prid = read_32bit_cp0_register(CP0_PRID);
-    word_t config = read_32bit_cp0_register(CP0_CONFIG);
-    int icache_size, dcache_size, icache_width, dcache_width;
-    int icache_ways, dcache_ways;
-    static const char * pattern[] = {
-	    "D                 Doubleword every cycle",
-	    "DDxDDx            2 Doublewords every 3 cycles",
-	    "DDxxDDxx          2 Doublewords every 4 cycles",
-	    "DxDxDxDx          2 Doublewords every 4 cycles",
-	    "DDxxxDDxxx        2 Doublewords every 5 cycles",
-	    "DDxxxxDDxxxx      2 Doublewords every 6 cycles",
-	    "DxxDxxDxxDxx      2 Doublewords every 6 cycles",
-	    "DDxxxxxxDDxxxxxx  2 Doublewords every 8 cycles",
-	    "DxxxDxxxDxxxDxxx  2 Doublewords every 8 cycles",
-    };
-
-    printf ("CPUID: ");
-    switch (prid & MIPS_IMP_MASK)
-    {
-    case MIPS_IMP_SB1:
-	printf("Sibyte SB1, Rev %d\n", prid&0x00FF); break;
-    case MIPS_IMP_RC64574:
-	printf("IDT RC64574/2, Rev %d\n", prid&0x00FF); break;
-    case MIPS_IMP_R4700:
-	printf("R4700, Rev %d.%d\n", (prid&0x00F0)>>4, prid&0x000F); break;
-    case MIPS_IMP_VR41XX:
-	printf("NEC ");
-	switch (prid & MIPS_REV_MASK_VR)
-	{
-	    case MIPS_REV_VR4121:
-		printf("vr4121 rev %d\n", prid&0xf); break;
-	    case MIPS_REV_VR4181:
-		printf("vr4181 rev %d\n", prid&0xf); break;
-	    default:
-		printf("unknown\n");
-	}
-	break;
-    default:
-	printf("unknown CP0_PRID=%8x\n", prid);
-    }
-
-    switch (prid & MIPS_IMP_MASK)
-    {
-    case MIPS_IMP_VR41XX:
-	icache_width = 16 << ((config>>5)&1);
-	dcache_width = 16 << ((config>>4)&1);
-	icache_size = (1<<10) << ((config>>9)&7);
-	dcache_size = (1<<10) << ((config>>6)&7);
-	icache_ways = dcache_ways = 1;
-	break;
-    case MIPS_IMP_RC64574:
-    case MIPS_IMP_R4700:
-    default:
-	icache_width = 16 << ((config>>5)&1);
-	dcache_width = 16 << ((config>>4)&1);
-	icache_size = (1<<12) << ((config>>9)&7);
-	dcache_size = (1<<12) << ((config>>6)&7);
-	icache_ways = dcache_ways = 2;
-    }
-
-    switch (prid & MIPS_IMP_MASK)
-    {
-    case MIPS_IMP_VR41XX:
-	printf("MIPS16 is %s\n", (config>>20) ? "available" : "disabled");
-	break;
-    case MIPS_IMP_RC64574:
-	printf("Data transmit pattern: %s\n", pattern[(config>>24)&0xf]);
-	printf("System clock is CPU clock divided by %d\n", 2 + (config>>28) & 7);
-	printf("Fast Multiply is %s\n", (config>>31) ? "enabled" : "disabled");
-	break;
-    case MIPS_IMP_R4700:
-	printf("Data transmit pattern: %s\n", pattern[(config>>24)&0xf]);
-	printf("System clock is CPU clock divided by %d\n", 2 + (config>>28) & 7);
-	printf("Master-Checker Mode is %s\n", (config>>31) ? "enabled" : "disabled");
-	break;
-    default:;
-    }
-
-    /*XXX secondary cache probes */
-    printf("Detected cache: icache = %dk, %d bytes per line, %d way associative\n",
-		    icache_size/1024, icache_width, icache_ways);
-    printf("                dcache = %dk, %d bytes per line, %d way associative\n",
-		    dcache_size/1024, dcache_width, dcache_ways);
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/mips64/disas.cc b/kernel/kdb/arch/mips64/disas.cc
deleted file mode 100644
index c5935d5a..00000000
--- a/kernel/kdb/arch/mips64/disas.cc
+++ /dev/null
@@ -1,95 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003,  National ICT Australia (NICTA)
- *
- * File path:	kdb/arch/mips64/disas.cc
- * Description:	Mips disassembler support.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id$
- *
- ***************************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-/* This is an ugly hack to incorporate the disassembler.  It lives outside
- * the kernel tree in the contrib branch, so we have to 'include' it
- * in our source.
- */
-#ifndef PARAMS
-# define PARAMS(a) a
-#endif
-
-/* Undefine conflicting macros. */
-#undef MB
-
-#include "../../contrib/disas/mips.h"
-#include "../../contrib/disas/mips-opc.cc"
-#include "../../contrib/disas/mips-dis.cc"
-
-/* Undefine conflicting macros. */
-#undef MB
-
-#include INC_GLUE(context.h)
-
-DECLARE_CMD (cmd_disasm, arch, 'D', "disasm", "Disassemble");
-
-int print_insn( unsigned long memaddr, unsigned long insn )
-{
-  return print_insn_mips ( memaddr, insn, 0);
-}
-
-static void print_address( unsigned long addr )
-{
-    printf( "0x%016x", addr );
-}
-
-static void dbg_addr_disasm( word_t addr )
-{
-    u32_t insn = *(u32_t *)addr;
-    printf( "%016x:  %08x\t", addr, insn );
-
-    print_insn( addr, insn );
-    printf( "\n" );
-}
-
-CMD(cmd_disasm, cg)
-{
-    int i;
-    mips64_irq_context_t *frame = (mips64_irq_context_t *)(kdb.kdb_param);
-
-    // Ask for the start address.
-    word_t addr = get_hex( "Disassemble address", frame->epc );
-
-    // Until requested to quit, dump a page of disassembled code.
-    do {
-	for( i = 0; i < 24; i++ ) {
-	    dbg_addr_disasm( addr );
-	    addr += sizeof(u32_t);
-	}
-    } while( get_choice("continue?", "Continue/Quit", 'c') != 'q' );
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/mips64/frame.cc b/kernel/kdb/arch/mips64/frame.cc
deleted file mode 100644
index a386d73f..00000000
--- a/kernel/kdb/arch/mips64/frame.cc
+++ /dev/null
@@ -1,188 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     kdb/arch/mips64/frame.cc
- * Description:   Exception frame dumping
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: frame.cc,v 1.9 2004/01/06 01:12:36 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_GLUE(context.h)
-#include INC_API(tcb.h)
-
-extern tcb_t * kdb_get_tcb();
-
-void SECTION(SEC_KDEBUG) mips64_dump_frame(mips64_irq_context_t *context)
-{
-    printf ("== Stack frame: %p == \n", context);
-    printf ("== STATUS: %8x == CAUSE: %16lx == EPC: %16lx\n", context->status, context->cause, context->epc);
-    printf ("at = %16lx, v0 = %16lx, v1 = %16lx, sp = %16lx\n", context->at, context->v0, context->v1, context->sp);
-    printf ("a0 = %16lx, a1 = %16lx, a2 = %16lx, a3 = %16lx\n", context->a0, context->a1, context->a2, context->a3);
-    printf ("t0 = %16lx, t1 = %16lx, t2 = %16lx, t3 = %16lx\n", context->t0, context->t1, context->t2, context->t3);
-    printf ("t4 = %16lx, t5 = %16lx, t6 = %16lx, t7 = %16lx\n", context->t4, context->t5, context->t6, context->t7);
-    printf ("s0 = %16lx, s1 = %16lx, s2 = %16lx, s3 = %16lx\n", context->s0, context->s1, context->s2, context->s3);
-    printf ("s4 = %16lx, s5 = %16lx, s6 = %16lx, s7 = %16lx\n", context->s4, context->s5, context->s6, context->s7);
-    printf ("t8 = %16lx, t9 = %16lx, s8 = %16lx, gp = %16lx\n", context->t8, context->t9, context->s8, context->gp);
-    printf ("ra = %16lx, hi = %16lx, lo = %16lx\n", context->ra, context->hi, context->lo);
-}
-
-void SECTION(SEC_KDEBUG) dump_fprs( tcb_t *tcb )
-{
-    u64_t * fprs = (u64_t *)&tcb->resources;
-    for (int i = 0; i < 32; i++)
-	printf ("f%d\t= %16lx\n", i, fprs[i]);
-    printf("FPCSR\t= %16lx\n", fprs[32]);
-}
-
-
-/**
- * cmd_dump_current_frame: show exception frame of current thread
- */
-DECLARE_CMD (cmd_dump_current_frame, root, ' ', "frame",
-	     "show current user exception frame");
-
-CMD (cmd_dump_current_frame, cg)
-{
-    mips64_irq_context_t *frame = (mips64_irq_context_t *)(kdb.kdb_param);
-
-    mips64_dump_frame(frame);
-
-//    printf("tcb = %p\n", addr_to_tcb((addr_t)kdb.kdb_param));
-//    printf("stack = %p\n",addr_to_tcb((addr_t)kdb.kdb_param)->stack);
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * cmd_dump_frame: show exception frame
- */
-DECLARE_CMD (cmd_dump_frame, root, 'F', "dumpframe",
-	     "show exception frame");
-
-
-mips64_irq_context_t SECTION(SEC_KDEBUG) * get_frame()
-{
-    space_t * space = get_current_space();
-    if (!space) space = get_kernel_space();
-    word_t val = get_hex("tcb/tid/addr", (word_t)space->get_tcb(kdb.kdb_param), "current");
-    mips64_irq_context_t * frame;
-
-    if (val == ABORT_MAGIC)
-	return NULL;
-
-    if (!space->is_tcb_area((addr_t)val) &&
-	((val & (~0xffful)) != (word_t)get_idle_tcb()))
-    {
-	threadid_t tid;
-	tid.set_raw(val);
-	frame = (mips64_irq_context_t *)((word_t)space->get_tcb(tid) + MIPS64_PAGE_SIZE);
-	frame --;
-    } else
-    {
-	frame = (mips64_irq_context_t *)val;
-	if (frame == (mips64_irq_context_t *) addr_to_tcb ((addr_t) val))
-	{
-	    frame = (mips64_irq_context_t *)((word_t)frame + MIPS64_PAGE_SIZE);
-	    frame --;
-	}
-    }
-    return frame;
-
-}
-
-CMD (cmd_dump_frame, cg)
-{
-    mips64_irq_context_t *frame = get_frame();
-
-    if (frame)
-	mips64_dump_frame(frame);
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * cmd_find_frame: search for an exception frame
- */
-DECLARE_CMD (cmd_find_frame, root, 's', "findframe",
-	     "search for an exception frame");
-
-CMD (cmd_find_frame, cg)
-{
-    mips64_irq_context_t *frame, *search;
-    space_t * space = get_current_space();
-    word_t val = get_hex("tcb/tid/addr", (word_t)space->get_tcb(kdb.kdb_param), "current");
-    word_t *addr;
-
-    if (val == ABORT_MAGIC)
-	return CMD_NOQUIT;
-
-    if (!space->is_tcb_area((addr_t)val) &&
-	((val & (~(MIPS64_PAGE_SIZE-1))) != (word_t)get_idle_tcb()))
-    {
-	threadid_t tid;
-	tid.set_raw(val);
-	frame = (mips64_irq_context_t *)((word_t)space->get_tcb(tid) + MIPS64_PAGE_SIZE);
-	frame --;
-    } else
-    {
-	frame = (mips64_irq_context_t *) ((val & (~(MIPS64_PAGE_SIZE-1))) + MIPS64_PAGE_SIZE);
-	frame --;
-    }
-
-    for (addr = (word_t *) frame; (word_t) addr >= (word_t) frame - 2048; addr --) {
-    	search = (mips64_irq_context_t *)addr;
-    	if ((search->status & ~0x3ff1f) == 0x40000e0)
-    	    mips64_dump_frame(search);
-    }
-
-    return CMD_NOQUIT;
-}
-
-/**
- * cmd_dump_fprs: dump floating point registers
- */
-DECLARE_CMD (cmd_dump_fprs, root, 'f', "fpr",
-	     "show floating point registers");
-
-
-CMD (cmd_dump_fprs, cg)
-{
-    tcb_t * tcb = kdb_get_tcb();
-
-    if (tcb) {
-	tcb->resources.mips64_fpu_spill( tcb );
-	dump_fprs( tcb );
-    }
-
-    return CMD_NOQUIT;
-}
-
diff --git a/kernel/kdb/arch/mips64/prepost.cc b/kernel/kdb/arch/mips64/prepost.cc
deleted file mode 100644
index 0f955e1e..00000000
--- a/kernel/kdb/arch/mips64/prepost.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     kdb/arch/mips64/prepost.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: prepost.cc,v 1.5 2003/09/24 19:05:08 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-#include INC_ARCH(mipsregs.h)
-#include INC_API(tcb.h)
-
-bool kdb_t::pre()
-{
-    u32_t entryhi = read_32bit_cp0_register(CP0_ENTRYHI);
-    printf ("-- current ASID is %d, CPU %d --\n", entryhi&0xFF, get_current_cpu());
-    return true;
-}
-void kdb_t::post() { }
-
diff --git a/kernel/kdb/arch/mips64/reboot.cc b/kernel/kdb/arch/mips64/reboot.cc
deleted file mode 100644
index 5509b227..00000000
--- a/kernel/kdb/arch/mips64/reboot.cc
+++ /dev/null
@@ -1,57 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     kdb/arch/mips64/reboot.cc
- * Description:   MIPS-64 system reset
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: reboot.cc,v 1.4 2003/09/24 19:05:08 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_ARCH(mips_cpu.h)
-#include INC_ARCH(cpu.h)
-#include INC_API(smp.h)
-
-/*
- * Reboot the box
- */
-DECLARE_CMD (cmd_reboot, root, '6', "reset", "Reset system");
-
-CMD (cmd_reboot, cg)
-{
-    void (*mips64_reboot_cpu)(void) = (void (*)(void))0xffffffffbfc00000UL;
-
-#ifdef CONFIG_SMP
-    if (get_current_cpu() != 0)
-	xcpu_request (0,(xcpu_handler_t)0xffffffffbfc00000UL);
-    else
-#endif
-
-    mips64_reboot_cpu();
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/mips64/tlb.cc b/kernel/kdb/arch/mips64/tlb.cc
deleted file mode 100644
index b8bf1d44..00000000
--- a/kernel/kdb/arch/mips64/tlb.cc
+++ /dev/null
@@ -1,190 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     kdb/arch/mips64/tlb.cc
- * Description:   TLB management commands
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tlb.cc,v 1.5 2003/11/17 05:42:14 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include INC_ARCH(tlb.h)
-#include INC_PLAT(config.h)
-#include INC_ARCH(mipsregs.h)
-#include INC_GLUE(context.h)
-
-
-DECLARE_CMD_GROUP (mips64_tlb);
-
-
-/**
- * cmd_mips64_tlb: Mips64 TLB management.
- */
-DECLARE_CMD (cmd_mips64_tlb, arch, 't', "tlb", "TLB management");
-
-CMD(cmd_mips64_tlb, cg)
-{
-    return mips64_tlb.interact (cg, "tlb");
-}
-
-/**
- * cmd_mips64_dum: dump Mips64 TLB
- */
-DECLARE_CMD (cmd_mips64_dum, mips64_tlb, 'd', "dump", "dump hardware TLB");
-
-CMD(cmd_mips64_dum, cg)
-{
-    word_t i, save;
-    static const char * pagemask[] = {
-	"  4k", "  8k", " 16k", " 32k",
-	" 64k", "128k", "256k", "  1M",
-	"  2M", "  4M", "  8M", " 16M",
-	" 32M", " 64M", "128M", "256M",
-    };
-    static const char * cache[] = {
-	"Wthr ", "WthrA", "Off  ", "Wb   ",
-	"CoEx ", "CoCOW", "CoCUW", "Accel"
-    };
-
-    __asm__ __volatile__ (
-	"dmfc0   %0, "STR(CP0_ENTRYHI)"\n\t"
-	: "=r" (save)
-    );
-
-    printf ("Index           EntryHi  EntryLo0 (cache v d)  EntryLo1 (cache v d) | Size  ASID  Global\n");
-
-    for (i=0; i<CONFIG_MIPS64_TLB_SIZE; i++)
-    {
-	word_t hi, lo0, lo1, mask, size;
-	__asm__ __volatile__ (
-	    "mtc0 %4,"STR(CP0_INDEX)"\n\t"
-	    "nop;nop;nop;tlbr;nop;nop;nop;nop\n\t"
-	    "dmfc0 %0,"STR(CP0_ENTRYHI)"\n\t"
-	    "dmfc0 %1,"STR(CP0_ENTRYLO0)"\n\t"
-	    "dmfc0 %2,"STR(CP0_ENTRYLO1)"\n\t" 
-	    "mfc0 %3,"STR(CP0_PAGEMASK)"\n\t" 
-	    : "=r" (hi), "=r" (lo0), "=r" (lo1), "=r" (mask)
-	    : "r" (i)
-	);
-	size = 0;
-	mask >>= 13;
-	while (mask&1)
-	{
-	    mask >>= 1;
-	    size ++;
-	}
-	printf("%2d:    %p  %8lx (%s %d %d)  %8lx (%s %d %d) | %s   %3d     %s\n",
-			i, hi,
-			lo0, cache[(lo0&0x38)>>3], (lo0>>1)&1, (lo0>>2)&1,
-			lo1, cache[(lo1&0x38)>>3], (lo1>>1)&1, (lo1>>2)&1,
-			pagemask[size], hi&0xFF, lo0&1 ? "Yes" : " No");
-    }
-
-    __asm__ __volatile__ (
-	"dmtc0   %0, "STR(CP0_ENTRYHI)"\n\t"
-	: : "r" (save)
-    );
-
-    return CMD_NOQUIT;
-}
-
-
-/**
- * cmd_mips64_tran: translate Mips64 TLB
- */
-DECLARE_CMD (cmd_mips64_trans, mips64_tlb, 't', "translate", "translate TLB");
-
-CMD(cmd_mips64_trans, cg)
-{
-    word_t i, save;
-
-    __asm__ __volatile__ (
-	"dmfc0   %0, "STR(CP0_ENTRYHI)"\n\t"
-	: "=r" (save)
-    );
-
-    printf ("Index       (virt)   Even Page  (phys)      |      (virt)   Odd Page   (phys)       ASID\n");
-
-    for (i=0; i<CONFIG_MIPS64_TLB_SIZE; i++)
-    {
-	word_t hi, lo0, lo1, mask, size;
-	__asm__ __volatile__ (
-	    "mtc0 %4,"STR(CP0_INDEX)"\n\t"
-	    "nop;nop;nop;tlbr;nop;nop;nop;nop\n\t"
-	    "dmfc0 %0,"STR(CP0_ENTRYHI)"\n\t"
-	    "dmfc0 %1,"STR(CP0_ENTRYLO0)"\n\t"
-	    "dmfc0 %2,"STR(CP0_ENTRYLO1)"\n\t" 
-	    "dmfc0 %3,"STR(CP0_PAGEMASK)"\n\t" 
-	    : "=r" (hi), "=r" (lo0), "=r" (lo1), "=r" (mask)
-	    : "r" (i)
-	);
-	size = 0;
-	mask >>= 13;
-	while (mask&1)
-	{
-	    mask >>= 1;
-	    size ++;
-	}
-	printf("%2d:    ", i);
-
-	if (lo0&2)
-	    printf("%p -> %p", (hi&(~((1<<13)-1))), (lo0>>6)<<CONFIG_MIPS64_VPN_SHIFT);
-	else
-	    printf("------------------------------------");
-
-	printf(" | ");
-
-	if (lo1&2)
-	    printf("%p -> %p", (hi&(~((1<<13)-1)))+(1<<(size+12)), (lo1>>6)<<CONFIG_MIPS64_VPN_SHIFT);
-	else
-	    printf("------------------------------------");
-	if (lo0&1)
-	    printf("   all\n");
-	else
-	    printf("   %3d\n", hi&0xFF);
-    }
-
-    __asm__ __volatile__ (
-	"dmtc0   %0, "STR(CP0_ENTRYHI)"\n\t"
-	: : "r" (save)
-    );
-
-    return CMD_NOQUIT;
-}
-
-
-
-/**
- * cmd_tlb_info: dump TLB information
- */
-DECLARE_CMD (cmd_tlb_info, mips64_tlb, 'i', "info", "dump TLB information");
-
-CMD(cmd_tlb_info, cg)
-{
-    printf("tlb info\n");
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/arch/mips64/watch.cc b/kernel/kdb/arch/mips64/watch.cc
deleted file mode 100644
index 98020320..00000000
--- a/kernel/kdb/arch/mips64/watch.cc
+++ /dev/null
@@ -1,103 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     kdb/arch/mips64/watch.cc
- * Description:   MIPS WATCH point
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: watch.cc,v 1.3 2004/04/05 06:22:15 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/cmd.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-#include INC_ARCH(mipsregs.h)
-
-
-DECLARE_CMD_GROUP (watchpoint);
-
-
-/**
- * cmd_mips64_watch: Mips64 WATCH management.
- */
-DECLARE_CMD (cmd_mips64_watch, arch, 'w', "watch", "MIPS Watchpoint");
-
-CMD(cmd_mips64_watch, cg)
-{
-    return watchpoint.interact (cg, "watch");
-}
-
-/**
- * cmd_mips64_wshow: show current
- */
-DECLARE_CMD (cmd_mips64_wset, watchpoint, 's', "set", "set watch point");
-
-CMD(cmd_mips64_wset, cg)
-{
-    word_t addr = get_hex ("Phys Address", 0x0, NULL);
-
-    char r = get_choice ("Watch read access", "y/n", 'y');
-    char w = get_choice ("Watch write access", "y/n", 'y');
-
-    u32_t watchlo = (u32_t)addr & (~3);
-    u32_t watchhi = (addr>>32)&0xF;
-    if (r == 'y')
-	watchlo |= 2;
-    if (w == 'y')
-	watchlo |= 1;
-
-    write_32bit_cp0_register(CP0_WATCHLO, watchlo);
-    write_32bit_cp0_register(CP0_WATCHHI, watchhi);
-
-    return CMD_NOQUIT;
-}
-
-/**
- * cmd_mips64_wshow: show current
- */
-DECLARE_CMD (cmd_mips64_wshow, watchpoint, 'w', "show", "show watch status");
-
-CMD(cmd_mips64_wshow, cg)
-{
-    u32_t watchlo = read_32bit_cp0_register(CP0_WATCHLO);
-    u32_t watchhi = read_32bit_cp0_register(CP0_WATCHHI);
-
-    printf("watch status\n");
-    printf("  Watch is %s\n", watchlo & 3 ? "enabled" : "disabled");
-
-    if (watchlo & 3)
-    {
-	printf("Watching physical address: %p for", watchlo&(~3) | (((word_t)watchhi)<<32));
-	switch (watchlo & 3) {
-	case 1: printf("write access\n"); break;
-	case 2: printf("read access\n"); break;
-	case 3: printf("any access\n"); break;
-	default: ;
-	}
-    }
-
-    return CMD_NOQUIT;
-}
-
diff --git a/kernel/kdb/arch/sparc64/Makeconf b/kernel/kdb/arch/sparc64/Makeconf
deleted file mode 100644
index 422a6e01..00000000
--- a/kernel/kdb/arch/sparc64/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix kdb/arch/sparc64/, prepost.cc reboot.cc registers.cc)
\ No newline at end of file
diff --git a/kernel/kdb/arch/sparc64/prepost.cc b/kernel/kdb/arch/sparc64/prepost.cc
deleted file mode 100644
index 4c1304de..00000000
--- a/kernel/kdb/arch/sparc64/prepost.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     kdb/arch/sparc64/prepost.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: prepost.cc,v 1.3 2004/05/21 02:34:53 philipd Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-
-bool
-kdb_t::pre()
-{
-    return true;
-}
-
-void
-kdb_t::post()
-{
-}
diff --git a/kernel/kdb/arch/sparc64/reboot.cc b/kernel/kdb/arch/sparc64/reboot.cc
deleted file mode 100644
index e5872c40..00000000
--- a/kernel/kdb/arch/sparc64/reboot.cc
+++ /dev/null
@@ -1,49 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    kdb/arch/sparc64/reboot.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: reboot.cc,v 1.4 2004/05/21 02:34:54 philipd Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-
-/**
- *  Reboot the machine.
- *  Notes: Need to revisit this to make it work without any Open Firmware
- *  mappings in the TLB.
- */
-DECLARE_CMD(cmd_reboot, root, '6', "reset", "Reset system");
-
-CMD(cmd_reboot, cg)
-{
-    printf("Sorry you have to reset it yourself :)\n");
-
-#warning awiggins (17-09-03): Since we killed Open Firmware mappings sir does not work!
-    //asm("sir\t0\t! Software initiated reset\n");
-}
diff --git a/kernel/kdb/arch/sparc64/registers.cc b/kernel/kdb/arch/sparc64/registers.cc
deleted file mode 100644
index ad8cc8cf..00000000
--- a/kernel/kdb/arch/sparc64/registers.cc
+++ /dev/null
@@ -1,152 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    kdb/arch/sparc64/registers.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: registers.cc,v 1.3 2004/05/21 02:34:54 philipd Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_ARCH(registers.h)
-
-extern void putc(char);
-
-DECLARE_CMD(cmd_dump_version, arch, 'v',
-	    "version register", "Dump the version register");
-DECLARE_CMD(cmd_dump_pstate, arch, 's',
-	    "processor state registers", "Dump the processors state registers");
-DECLARE_CMD(cmd_dump_tstate, arch, 't',
-	    "trap state registers", "Dump the trap state registers, current");
-DECLARE_CMD(cmd_dump_tstate_all, arch, 'T',
-	    "trap state registers, all TLs",
-	    "Dump the trap state registers, all TLs");
-DECLARE_CMD(cmd_dump_wstate, arch, 'w',
-	    "register-window state registers",
-	    "Dump the register-window state registers");
-//DECLARE_CMD(?, arch, 'f',
-//	    "floating-point registers", "Dump the floating-point registers");
-//DECLARE_CMD(?, arch, 'g',
-//	    "global registers", "Dump the global registers");
-//DECLARE_CMD(?, arch, 'i',
-//	    "windowed registers", "Dump the windowed integer registers"); 
-
-CMD(cmd_dump_version, cg)
-{
-    ver_t ver;
-
-    ver.get();
-    ver.print();
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_version, cg)
-
-CMD(cmd_dump_pstate, cg)
-{
-    y_reg_t  y;
-    ccr_t    ccr;
-    asi_t    asi;
-    //fprs_t   fprs;
-    //tick_t   tick;
-    pstate_t pstate;
-    pil_t    pil;
-    tl_t     tl;
-
-    y.get();
-    ccr.get();
-    asi.get();
-    pstate.get();
-    pil.get();
-    tl.get();
-
-    pstate.print(), putc(' '), pil.print(), putc(' '), tl.print(), putc(' '),
-    ccr.print(), putc(' '), asi.print(), putc(' '), y.print(), putc('\n');
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_state, cg)
-
-CMD(cmd_dump_tstate, cg)
-{
-    tpc_t    tpc;
-    tnpc_t   tnpc;
-    tt_t     tt;
-    tstate_t tstate;
-
-    tpc.get();
-    tnpc.get();
-    tt.get();
-    tstate.get();
-    tpc.print(), putc(' '), tnpc.print(), putc(' '), tt.print(),
-    putc(' '), tstate.print();
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_tstate, cg)
-
-CMD(cmd_dump_tstate_all, cg)
-{
-    tl_t     tl_old;
-    tl_t     tl_new;
-    tpc_t    tpc;
-    tnpc_t   tnpc;
-    tt_t     tt;
-    tstate_t tstate;
-    ver_t    ver;
-
-    tl_old.get();                                     /* Save the current TL.   */
-    ver.get();                                        /* We need rev.maxtl.     */
-    for(u8_t i = 1; i <= ver.ver.maxtl; i++) {        /* For every TL.          */
-	tl_new.tl = i;                                  /* Set TL we want.        */
-	tl_new.set();
-	tpc.get();
-	tnpc.get();
-	tt.get();
-	tstate.get();                                   /* Get the trap state.    */
-	tl_new.print(), putc(' '), tpc.print(),         /* Print the results.     */
-	putc('\t'), tnpc.print(), putc('\t'),
-	tt.print(), putc(' '), tstate.print();
-    }
-    tl_old.set();                                     /* Restore original TL.   */
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_tstate_all, cg)
-
-CMD(cmd_dump_wstate, cg)
-{
-    reg_win_t reg_win;
-
-    reg_win.get();
-    reg_win.print();
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_wstate, cg)
diff --git a/kernel/kdb/arch/sparc64/ultrasparc/Makeconf b/kernel/kdb/arch/sparc64/ultrasparc/Makeconf
deleted file mode 100644
index c42ac362..00000000
--- a/kernel/kdb/arch/sparc64/ultrasparc/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix kdb/arch/sparc64/ultrasparc/, mmu.cc)
\ No newline at end of file
diff --git a/kernel/kdb/arch/sparc64/ultrasparc/mmu.cc b/kernel/kdb/arch/sparc64/ultrasparc/mmu.cc
deleted file mode 100644
index 97cb0461..00000000
--- a/kernel/kdb/arch/sparc64/ultrasparc/mmu.cc
+++ /dev/null
@@ -1,189 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    kdb/arch/sparc64/registers.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mmu.cc,v 1.4 2004/05/21 02:34:54 philipd Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/kdb.h>
-#include <kdb/input.h>
-
-#include INC_CPU(mmu.h)
-#include INC_CPU(tsb.h)
-
-DECLARE_CMD_GROUP(mmu);
-DECLARE_CMD(cmd_mmu, arch, 'm', "mmu", "mmu specifics");
-DECLARE_CMD(cmd_dump_state, mmu, 's', "MMU state", "Dump MMU state");
-DECLARE_CMD(cmd_dump_tlb, mmu, 't', "TLB entry", "Dump a TLB entry");
-DECLARE_CMD(cmd_dump_tlb_all, mmu, 'T', "TLB(s)", "Dump whole TLB");
-DECLARE_CMD(cmd_dump_tsb, mmu, 'h', "TSB (software TLB) entry",
-	    "Dump a TSB entry");
-DECLARE_CMD(cmd_dump_tsb_all, mmu, 'H', "TSB (software TLB)",
-	    "Dump whole TSB");
-
-CMD(cmd_mmu, cg)
-{
-    return mmu.interact (cg, "mmu");
-}
-
-CMD(cmd_dump_state, cg)
-{
-    mmu_t mmu;
-    tsb_t tsb;
-
-    mmu.print(sfsr_t::both, context_t::reserved);
-    tsb.print();
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_state, cg)
-
-CMD(cmd_dump_tlb, cg)
-{
-    u16_t entry;
-    char selection;
-    tlb_t::tlb_e tlb;
-
-    selection = get_choice("TLB to dump", "D-TLB/I-TLB", 'd');
-
-    switch (selection) {
-    case 'd':
-	tlb = tlb_t::d_tlb;
-	break;
-    case 'i':
-	tlb = tlb_t::i_tlb;
-	break;
-    default:
-	printf("Invalid selection '%c'\n", selection);
-
-	return CMD_NOQUIT;
-    }
-    entry = get_dec("Entry to dump [0..63]", 0, "0");
-    mmu_t::print(entry, tlb);
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_tlb, cg)
-
-CMD(cmd_dump_tlb_all, cg)
-{
-    char selection;
-    tlb_t::tlb_e tlb;
-
-    selection = get_choice("TLB to dump", "D-TLB/I-TLB/Both", 'd');
-
-    switch (selection) {
-    case 'd':
-	tlb = tlb_t::d_tlb;
-	break;
-    case 'i':
-	tlb = tlb_t::i_tlb;
-	break;
-    case 'b':
-	tlb = tlb_t::all_tlb;
-	break;
-    default:
-	printf("Invalid selection '%c'\n", selection);
-
-	return CMD_NOQUIT;
-    }
-    mmu_t::print(tlb);
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_tlb_all, cg)
-
-CMD(cmd_dump_tsb, cg)
-{
-    u16_t entry;
-    char selection;
-    tsb_t::tsb_e tsb;
-
-    selection = get_choice("TSB to dump",
-			   "D-TSB 8K 'd'/D-TSB 64K 'e'/"
-			   "I-TSB 8K 'i'/D-TSB64K 'j'", 'd');
-
-    switch (selection) {
-    case 'd':
-	tsb = tsb_t::d8k_tsb;
-	break;
-    case 'e':
-	tsb = tsb_t::d64k_tsb;
-	break;
-    case 'i':
-	tsb = tsb_t::i8k_tsb;
-	break;
-    case 'j':
-	tsb = tsb_t::i64k_tsb;
-	break;
-    default:
-	printf("Invalid selection '%c'\n", selection);
-
-	return CMD_NOQUIT;
-    }
-    entry = get_dec("Entry to dump [0..512]", 0, "0");
-    tsb_t::print(entry, tsb);
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_tsb, cg)
-
-CMD(cmd_dump_tsb_all, cg)
-{
-    char selection;
-    tsb_t::tsb_e tsb;
-
-    selection =
-	get_choice("TSB to dump",
-		   "D-TSB 8K 'd'/D-TSB 64K 'e'/I-TSB 8K 'i'/I-TSB 64K 'j'",
-		   'd');
-
-    switch (selection) {
-    case 'd':
-	tsb = tsb_t::d8k_tsb;
-	break;
-    case 'e':
-	tsb = tsb_t::d64k_tsb;
-	break;
-    case 'i':
-	tsb = tsb_t::i8k_tsb;
-	break;
-    case 'j':
-	tsb = tsb_t::i64k_tsb;
-	break;
-    default:
-	printf("Invalid selection '%c'\n", selection);
-
-	return CMD_NOQUIT;
-    }
-    tsb_t::print(tsb);
-
-    return CMD_NOQUIT;
-
-} // CMD(cmd_dump_tsb_all, cg)
diff --git a/kernel/kdb/platform/brutus/Makeconf b/kernel/kdb/platform/brutus/Makeconf
deleted file mode 100644
index f339615e..00000000
--- a/kernel/kdb/platform/brutus/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += kdb/platform/brutus/io.cc
diff --git a/kernel/kdb/platform/brutus/io.cc b/kernel/kdb/platform/brutus/io.cc
deleted file mode 100644
index 498ab815..00000000
--- a/kernel/kdb/platform/brutus/io.cc
+++ /dev/null
@@ -1,88 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2004,  Karlsruhe University
- *                
- * File path:     kdb/platform/brutus/io.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: io.cc,v 1.9 2004/03/17 19:13:24 skoglund Exp $
- *                
- ********************************************************************/
-
-#include "../sa1100/uart.h"
-
-#define BRD CONFIG_KDB_COMSPEED
-#define UART_VBASE 0xFF
-
-void init_console (void)
-{
-    u32_t enbl = 0;
-
-    enbl |= L4_UART_RXE;
-    enbl |= L4_UART_TXE;
-
-    L4_UART_UTCR3 = 0;			/* Diable UART */
-    L4_UART_UTSR0 = 0xf;		/* Clear pending interrupts */
-
-    L4_UART_UTCR0 = L4_UART_DSS;	/* No parity, 1 stop bit, 8 bit */
-    L4_UART_UTCR1 = BRD >> 8;		/* Set baudrate */
-    L4_UART_UTCR2 = BRD & 0xff;
-    L4_UART_UTCR3 = enbl;		/* Enable UART */
-
-}
-
-
-void putc(char chr)
-{
-    volatile u32_t tmp;
-
-    /*
-     * Wait till the transmit FIFO has a free slot.
-     */
-    do {
-	tmp = L4_UART_UTSR1;
-    } while ( !(tmp & L4_UART_TNF) );
-    
-    /*
-     * Add the character to the transmit FIFO.
-     */
-    L4_UART_UTDR = (u32_t) chr;
-}
-
-char getc(bool block)
-{
-    volatile u32_t tmp;
-
-    /*
-     * Wait till the receive FIFO has something in it.
-     */
-    do {
-	tmp = L4_UART_UTSR1;
-    } while ( !(tmp & L4_UART_RNE) );
-
-    /*
-     * Read a character from the receive FIFO.
-     */
-    return (char) L4_UART_UTDR;
-}
diff --git a/kernel/kdb/platform/csb337/Makeconf b/kernel/kdb/platform/csb337/Makeconf
deleted file mode 100644
index 63174e07..00000000
--- a/kernel/kdb/platform/csb337/Makeconf
+++ /dev/null
@@ -1,2 +0,0 @@
-SOURCES += $(addprefix kdb/platform/$(PLATFORM)/, console.cc reboot.cc )
-
diff --git a/kernel/kdb/platform/csb337/console.cc b/kernel/kdb/platform/csb337/console.cc
deleted file mode 100644
index a6a61a0e..00000000
--- a/kernel/kdb/platform/csb337/console.cc
+++ /dev/null
@@ -1,130 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:	platform/csb337/console.cc
- * Description:	Cogent CSB337 Console
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.cc,v 1.1 2004/08/12 12:00:34 cvansch Exp $
- *
- ***************************************************************************/
-
-#include <debug.h>
-
-#include INC_GLUE(config.h)
-#include INC_PLAT(console.h)
-#include <kdb/console.h>
-
-#define SERIAL_NAME	"serial"
-
-/****************************************************************************
- *
- *    Serial console support
- *    Atmel AT91RM9200
- *
- ****************************************************************************/
-
-struct serial_at91rm9200 {
-    word_t us_cr;	/* 0x00 Control Register			*/
-    word_t us_mr;	/* 0x04 Mode Register				*/
-    word_t us_ier;	/* 0x08 Interrupt Enable Register		*/
-    word_t us_idr;	/* 0x0c Interrupt Disable Register		*/
-    word_t us_imr;	/* 0x10 Interrupt Mask Register			*/
-    word_t us_csr;	/* 0x14 Channel Status Register			*/
-    word_t us_rhr;	/* 0x18 Receiver Holding Register		*/
-    word_t us_thr;	/* 0x1c Transmitter Holding Register		*/
-    word_t us_brgr;	/* 0x20 Baud Rate Generator Register		*/
-    word_t us_rtor;	/* 0x24 Receiver Time-out Register		*/
-    word_t us_rrgr;	/* 0x28 Transmitter Timeguard Register		*/
-    word_t res1[5];
-    word_t us_fidi;	/* 0x40 FI DI Ratio Register			*/
-    word_t us_ner;	/* 0x44 Number of Errors Register		*/
-    word_t res2;
-    word_t us_if;	/* 0x4c IrDA Filter Register			*/
-};
-
-#define	CSR_TXRDY	(1 << 1)
-#define CSR_RXRDY	(1 << 0)
-
-static volatile struct serial_at91rm9200 *serial_regs = 0;
-
-static void putc_serial( char c )
-{
-    if ( serial_regs )
-    {
-	while ((serial_regs->us_csr & CSR_TXRDY) == 0 );
-
-	serial_regs->us_thr = c;
-	if ( c == '\n' )
-	    putc_serial( '\r' );
-    }
-}
-
-static char getc_serial( bool block )
-{
-    if ( serial_regs )
-    {
-	if ((serial_regs->us_csr & CSR_RXRDY) == 0 )
-	{
-	    if (!block)
-		return (signed char)-1;
-
-	    while ((serial_regs->us_csr & CSR_RXRDY) == 0 );
-	}
-	return (serial_regs->us_rhr & 0xff);
-    }
-    return 0;
-}
-
-
-#if defined(CONFIG_KDB_BREAKIN)
-void kdebug_check_breakin (void)
-
-{
-    if (( serial_regs->us_csr & CSR_RXRDY) != 0 )
-    {
-	if ((serial_regs->us_rhr & 0xff) == 27)
-	    enter_kdebug("breakin");
-    }
-}
-#endif
-
-static void init(void) 
-{
-    serial_regs = (struct serial_at91rm9200*)(CONSOLE_VADDR);
-}
-
-/****************************************************************************
- *
- *    Console registration
- *
- ****************************************************************************/
-
-kdb_console_t kdb_consoles[] = {
-    { SERIAL_NAME, init, putc_serial, getc_serial},
-    KDB_NULL_CONSOLE
-};
-
-word_t kdb_current_console = 0;
-
diff --git a/kernel/kdb/platform/csb337/reboot.cc b/kernel/kdb/platform/csb337/reboot.cc
deleted file mode 100644
index 5169fbb3..00000000
--- a/kernel/kdb/platform/csb337/reboot.cc
+++ /dev/null
@@ -1,57 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     kdb/platform/csb337/reboot.cc
- * Description:   Cogent CSB337 system reset
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: reboot.cc,v 1.2 2004/08/21 13:37:52 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_API(space.h)
-#include INC_PLAT(timer.h)
-
-#define ST_OFFSET	0xd00
-#define ST_VADDR	(SYS_VADDR | ST_OFFSET)
-
-#define ST_WATCHDOG_CONTROL	*((volatile word_t *)(ST_VADDR + 0x00))
-#define ST_WATCHDOG_MODE	*((volatile word_t *)(ST_VADDR + 0x08))
-
-/*
- * Reboot the box
- */
-DECLARE_CMD (cmd_reboot, root, '6', "reset", "Reset system");
-
-CMD (cmd_reboot, cg)
-{
-    printf("\nReset...\n");
-
-    ST_WATCHDOG_MODE = 0x10 | (0x1ul<<16);	/* Short timeout + reset */
-    ST_WATCHDOG_CONTROL = 0x01;			/* Go! */
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/platform/erpcn01/Makeconf b/kernel/kdb/platform/erpcn01/Makeconf
deleted file mode 100644
index 3860b368..00000000
--- a/kernel/kdb/platform/erpcn01/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += kdb/platform/erpcn01/propane.cc kdb/platform/erpcn01/uart.cc
diff --git a/kernel/kdb/platform/erpcn01/propane.cc b/kernel/kdb/platform/erpcn01/propane.cc
deleted file mode 100644
index f91e48db..00000000
--- a/kernel/kdb/platform/erpcn01/propane.cc
+++ /dev/null
@@ -1,73 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     platform/erpcn01/propane.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: propane.cc,v 1.3 2003/09/24 19:05:18 skoglund Exp $
- *                
- ********************************************************************/
-
-#include INC_PLAT(gt64115.h)
-
-volatile unsigned int *propane;
-volatile unsigned int *propane_uart;
-
-/* Setup / Check for propane interface */
-int propane_init()
-{
-	int i;
-	volatile unsigned int *reg;
-
-	/* Auto detect FPGA Address for Propane */
-	propane = (unsigned int *)0x9000000000000000UL;   // Uncached
-
-	reg = (unsigned int *)(0x9000000000000000UL | 0x14000000 | GT_CS_2_0_LOW_DECODE_ADDRESS);
-	propane = (unsigned int *)((unsigned long)propane | (((unsigned int)(*reg)&0x7FF)<<21));
-
-	reg = (unsigned int *)(0x9000000000000000UL | 0x14000000 | GT_CS_1_LOW_DECODE_ADDRESS);
-	propane = (unsigned int *)((unsigned long)propane | (((unsigned int)(*reg)&0xFF)<<20));
-
-	if ((propane[0] & 0xF0000000) != 0xE0000000)
-		return -1;
-
-	if (((propane[0] & 0x0F000000) >> 24) == 0x1)
-	{
-		propane[2] = 0x0;		/* Disable interrupts */
-	}
-	else
-		return -1;
-
-	for (i=0; i<8; i++) {
-		if ((propane[0]&0xF) & (1<<i)) {
-			if ((propane[i<<18] & 0xF0000000) == 0xA0000000) {
-				propane_uart = &propane[i<<18];
-				break;
-			}
-		}
-	}
-
-	return 0;
-}
diff --git a/kernel/kdb/platform/erpcn01/uart.cc b/kernel/kdb/platform/erpcn01/uart.cc
deleted file mode 100644
index 9ec6458b..00000000
--- a/kernel/kdb/platform/erpcn01/uart.cc
+++ /dev/null
@@ -1,157 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2004,   University of New South Wales
- *                
- * File path:     kdb/platform/erpcn01/uart.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: uart.cc,v 1.10 2004/03/17 22:36:05 cvansch Exp $
- *                
- ********************************************************************/
-
-/* Talk to propane uart interface */
-
-#include <debug.h>
-#include INC_PLAT(serial.h)
-#include INC_PLAT(gt64115.h)
-#include INC_GLUE(schedule.h)
-#include <kdb/console.h>
-#include <debug.h>
-
-#define ECHO 1
-
-extern volatile unsigned int *propane_uart;
-
-extern volatile unsigned int *propane;
-
-/* Must be called first */
-static int puart_change_settings(unsigned int settings)
-{
-	unsigned int config, baud;
-
-	switch (settings & 0x00FF) {
-	case BAUDRATE_1200_BPS: baud = 3472; break;
-	case BAUDRATE_1800_BPS: baud = 2315; break;
-	case BAUDRATE_2400_BPS: baud = 1736; break;
-	case BAUDRATE_4800_BPS: baud = 868; break;
-	case BAUDRATE_7200_BPS: baud = 579; break;
-	case BAUDRATE_9600_BPS: baud = 434; break;
-	case BAUDRATE_14400_BPS: baud = 289; break;
-	case BAUDRATE_19200_BPS: baud = 217; break;
-	case BAUDRATE_38400_BPS: baud = 109; break;
-	case BAUDRATE_57600_BPS: baud = 72; break;
-	case BAUDRATE_115200_BPS: baud = 36; break;
-	case BAUDRATE_230400_BPS: baud = 18; break;
-	case BAUDRATE_460800_BPS: baud = 9; break;
-	case BAUDRATE_921600_BPS: baud = 5; break;	/* won't work */
-	default:
-		return -1;
-	}
-	config = baud << 8;
-	switch ((settings>>8) & 0x0F) {
-	case SERIAL_DATABITS_7: config |= 0x08; break;
-	case SERIAL_DATABITS_8: config |= 0x00; break;
-	default:
-		return -1;
-	}
-	switch ((settings>>12) & 0x0F) {
-	case SERIAL_PARITY_NONE:	config |= 0x00; break;
-	case SERIAL_PARITY_EVEN:	config |= 0x03; break;
-	case SERIAL_PARITY_ODD:		config |= 0x01; break;
-	default:
-		return -1;
-	}
-	switch ((settings>>16) & 0x0F) {
-	case SERIAL_STOPBITS_10:	config |= 0x00; break;
-	case SERIAL_STOPBITS_15:	config |= 0x04; break;
-	case SERIAL_STOPBITS_20:	config |= 0x04; break;
-	default:
-		return -1;
-	}
-	config |= 1 << 21;	 /* Enable */
-	propane_uart[0] = config;
-
-	return 0;
-}
-
-extern "C" void puart_write_char(char c)
-{
-	while ((propane_uart[2] & 0x0F) >= 0xD); /* fifo count */
-	propane_uart[1] = (unsigned char)c;
-}
-
-extern "C" int puart_read_char(int blocking)
-{
-    if (blocking) {
-	while ((propane_uart[2] & 0x200));
-    }
-    if (!(propane_uart[2] & 0x200))
-	return propane_uart[1];
-
-    return -1;
-}
-
-void putc_serial(char chr)
-{
-    puart_write_char(chr);
-    if (chr == '\n') puart_write_char('\r');
-}
-
-static char getc_serial(bool block)
-{
-    return puart_read_char(block);
-}
-
-extern int propane_init(void);
-
-static void init_serial (void)
-{
-    if (propane_init())
-	while(1);
-
-    puart_change_settings(BAUDRATE_57600_BPS | SERIAL_DATABITS_8 |
-			SERIAL_PARITY_NONE | SERIAL_STOPBITS_10);
-
-    printf("\e[2J\e[H---- ERPCN01 ---- L4 Pistachio ----- \n");
-    printf("(C) 2002, Carl van Schaik, University of New South Wales, OpenFuel\n\n");
-
-    printf("Detected PROPANE system interface at 0x%016lx\n", propane);
-    printf("  PROPANE UART at 0x%16lx\n", propane_uart);
-}
-
-word_t kdb_current_console = 0;
-
-kdb_console_t kdb_consoles[] = {
-    { "serial", &init_serial, &putc_serial, &getc_serial },
-    KDB_NULL_CONSOLE
-};
-
-
-#ifdef CONFIG_KDB_BREAKIN
-void SECTION(".kdebug") kdebug_check_breakin(void)
-{
-    if (puart_read_char(0) == 27)
-	enter_kdebug("breakin");
-}
-#endif
diff --git a/kernel/kdb/platform/innovator/Makeconf b/kernel/kdb/platform/innovator/Makeconf
deleted file mode 100644
index 63174e07..00000000
--- a/kernel/kdb/platform/innovator/Makeconf
+++ /dev/null
@@ -1,2 +0,0 @@
-SOURCES += $(addprefix kdb/platform/$(PLATFORM)/, console.cc reboot.cc )
-
diff --git a/kernel/kdb/platform/innovator/console.cc b/kernel/kdb/platform/innovator/console.cc
deleted file mode 100644
index 5b38bcf7..00000000
--- a/kernel/kdb/platform/innovator/console.cc
+++ /dev/null
@@ -1,132 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     kdb/arch/platform/innovator/console.cc
- * Description:
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.cc,v 1.2 2004/06/04 06:43:13 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include INC_GLUE(config.h)
-#include <kdb/console.h>
-#include INC_PLAT(reg.h)
-#include INC_PLAT(console.h)
-#include INC_CPU(io.h)
-
-/****************************************************************************
- *
- *    Serial console support
- *
- ****************************************************************************/
-static word_t UART_IOBASE = NULL;
-
-static char
-inreg_ser (word_t reg)
-{
-    char val;
-    val = *((volatile char *) (UART_IOBASE + (reg * SER_UART_REGDELTA)));
-    return val;
-}
-
-static void
-outreg_ser (word_t reg, char val)
-{
-    *((volatile char *) (UART_IOBASE + (reg * SER_UART_REGDELTA))) = val;
-}
-
-static bool
-is_ser_char ()
-{
-    if (inreg_ser (SER_LSR) & SER_LSR_DR)
-	return true;
-    else
-	return false;
-}
-
-static void
-putc_serial (char c)
-{
-    if (UART_IOBASE)
-    {
-	if ('\n' == c)
-	    putc_serial ('\r');
-
-	while (0 == (inreg_ser (SER_LSR) & SER_LSR_THRE))
-	{
-	}
-	outreg_ser (SER_THR, c);
-    }
-}
-
-static char
-getc_serial (bool block)
-{
-    if (UART_IOBASE)
-    {
-	if (is_ser_char ())
-	    return inreg_ser (SER_RBR);
-	else
-	{
-	    if (!block)
-		return 0xff;
-	    while (!is_ser_char ());
-	}
-	return inreg_ser (SER_RBR);
-    }
-    return 0xff;
-}
-
-
-
-#if defined(CONFIG_KDB_BREAKIN)
-void
-kdebug_check_breakin (void)
-{
-    if (is_ser_char ())
-    {
-	if (inreg_ser (SER_RBR) == 27)
-	    enter_kdebug ("breakin");
-    }
-}
-#endif
-
-static void
-init (void)
-{
-    UART_IOBASE = io_to_virt (CONSOLE_PADDR);
-
-//    printf("DPLL is %p, CKCTL is %p\n", \
-//      *((volatile word_t*) io_to_virt(0xfffecf00)), \
-//      *((volatile word_t*) io_to_virt(0xfffece00)));
-}
-
-word_t kdb_current_console = 0;
-
-kdb_console_t kdb_consoles[] = {
-    {"serial", &init, &putc_serial, &getc_serial},
-    KDB_NULL_CONSOLE
-};
diff --git a/kernel/kdb/platform/innovator/reboot.cc b/kernel/kdb/platform/innovator/reboot.cc
deleted file mode 100644
index 728988fc..00000000
--- a/kernel/kdb/platform/innovator/reboot.cc
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     kdb/platform/pleb/reboot.cc
- * Description:   SA1100 system reset
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: reboot.cc,v 1.2 2004/06/04 06:43:13 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_API(space.h)
-#include INC_API(tcb.h)
-#include INC_PLAT(reg.h)
-#include INC_CPU(io.h)
-
-/*
- * Reboot the box
- */
-DECLARE_CMD (cmd_reboot, root, '6', "reset", "Reset system");
-
-CMD (cmd_reboot, cg)
-{
-    tcb_t *tcb;
-    space_t *s = NULL;
-
-    tcb = s->get_tcb (kdb.kdb_param);
-    s = tcb->get_space ();
-
-    *((word_t *) io_to_virt (OMAP_ARM_RSTCT1)) = VAL_ARM_SW_RST;
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/platform/ixdp425/Makeconf b/kernel/kdb/platform/ixdp425/Makeconf
deleted file mode 100644
index 63174e07..00000000
--- a/kernel/kdb/platform/ixdp425/Makeconf
+++ /dev/null
@@ -1,2 +0,0 @@
-SOURCES += $(addprefix kdb/platform/$(PLATFORM)/, console.cc reboot.cc )
-
diff --git a/kernel/kdb/platform/ixdp425/console.cc b/kernel/kdb/platform/ixdp425/console.cc
deleted file mode 100644
index a9cb36f9..00000000
--- a/kernel/kdb/platform/ixdp425/console.cc
+++ /dev/null
@@ -1,134 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:	platform/ixdp425/console.cc
- * Description:	Intel XScale Console
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.cc,v 1.2 2004/06/04 06:43:13 cvansch Exp $
- *
- ***************************************************************************/
-
-#include <debug.h>
-
-#include INC_GLUE(config.h)
-#include INC_PLAT(console.h)
-#include <kdb/console.h>
-
-#define SERIAL_NAME	"serial"
-
-/****************************************************************************
- *
- *    Serial console support
- *
- ****************************************************************************/
-
-struct serial_xscalecon {
-    word_t rbr;  /* 0 */
-    word_t ier;  /* 4 */
-    word_t fcr;  /* 8 */
-    word_t lcr;  /* 12 */
-    word_t mcr;  /* 16 */
-    word_t lsr;  /* 20 */
-    word_t msr;  /* 24 */
-    word_t scr;  /* 28 */
-};
-
-#define thr rbr
-#define iir fcr
-#define dll rbr
-#define dlm ier
-#define dlab lcr
-
-#define LSR_DR		0x01	/* Data ready */
-#define LSR_OE		0x02	/* Overrun */
-#define LSR_PE		0x04	/* Parity error */
-#define LSR_FE		0x08	/* Framing error */
-#define LSR_BI		0x10	/* Break */
-#define LSR_THRE	0x20	/* Xmit holding register empty */
-#define LSR_TEMT	0x40	/* Xmitter empty */
-#define LSR_ERR		0x80	/* Error */
-
-static volatile struct serial_xscalecon *serial_regs = 0;
-
-
-static void putc_serial( char c )
-{
-    if ( serial_regs )
-    {
-	while (( serial_regs->lsr & LSR_THRE ) == 0 );
-
-	serial_regs->thr = c;
-	if ( c == '\n' )
-	    putc_serial( '\r' );
-    }
-}
-
-static char getc_serial( bool block )
-{
-    if ( serial_regs )
-    {
-	if (( serial_regs->lsr & LSR_DR ) == 0 )
-	{
-	    if (!block)
-		return (signed char)-1;
-
-	    while (( serial_regs->lsr & LSR_DR ) == 0 );
-	}
-	return serial_regs->rbr;
-    }
-    return 0;
-}
-
-
-#if defined(CONFIG_KDB_BREAKIN)
-void kdebug_check_breakin (void)
-
-{
-    if (( serial_regs->lsr & LSR_DR ) != 0 )
-    {
-	if (serial_regs->rbr == 27)
-	    enter_kdebug("breakin");
-    }
-}
-#endif
-
-static void init(void) 
-{
-    serial_regs = (struct serial_xscalecon*)(IODEVICE_VADDR + CONSOLE_OFFSET);
-}
-
-/****************************************************************************
- *
- *    Console registration
- *
- ****************************************************************************/
-
-kdb_console_t kdb_consoles[] = {
-    { SERIAL_NAME, init, putc_serial, getc_serial},
-    KDB_NULL_CONSOLE
-};
-
-word_t kdb_current_console = 0;
-
diff --git a/kernel/kdb/platform/ixdp425/reboot.cc b/kernel/kdb/platform/ixdp425/reboot.cc
deleted file mode 100644
index ff0fb053..00000000
--- a/kernel/kdb/platform/ixdp425/reboot.cc
+++ /dev/null
@@ -1,52 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     kdb/platform/ixdp425/reboot.cc
- * Description:   Intel IXDP425 system reset
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: reboot.cc,v 1.3 2004/08/12 12:01:43 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_API(space.h)
-#include INC_PLAT(timer.h)
-
-/*
- * Reboot the box
- */
-DECLARE_CMD (cmd_reboot, root, '6', "reset", "Reset system");
-
-CMD (cmd_reboot, cg)
-{
-    printf("\nReset...\n");
-
-    XSCALE_WATCHDOG_KEY	= 0x482E;	/* Write the Key */
-    XSCALE_WATCHDOG_TIMER = 0xA0000;	/* Set the timeout (1ms) */
-    XSCALE_WATCHDOG_EN = 0x05;		/* Enable reset watchdog */
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/platform/malta/Makeconf b/kernel/kdb/platform/malta/Makeconf
deleted file mode 100644
index 28604f83..00000000
--- a/kernel/kdb/platform/malta/Makeconf
+++ /dev/null
@@ -1,33 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2006,  Karlsruhe University
-##                
-## File path:     kdb/platform/malta/Makeconf
-## Description:   
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf,v 1.1 2006/02/23 21:07:44 ud3 Exp $
-##                
-######################################################################
-
-SOURCES += kdb/platform/malta/console.cc
diff --git a/kernel/kdb/platform/malta/console.cc b/kernel/kdb/platform/malta/console.cc
deleted file mode 100644
index 4927da22..00000000
--- a/kernel/kdb/platform/malta/console.cc
+++ /dev/null
@@ -1,129 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     kdb/platform/malta/console.cc
- * Description:   Serial console for the Malta platform
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: console.cc,v 1.1 2006/02/23 21:07:44 ud3 Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-
-#include <kdb/console.h>
-
-#include "uart16550.h"
-#include "pio.h"
-
-
-//static
-void putc_serial (char);
-static char getc_serial (bool);
-static void init_serial (void);
-
-kdb_console_t kdb_consoles[] = {
-    { "serial", &init_serial, &putc_serial, &getc_serial },
-    KDB_NULL_CONSOLE
-};
-
-word_t kdb_current_console = 0;
-
-// SEND
-
-static int _serial_tx_ready( unsigned int port ) {
-    return inb(port + USART_LSR) & LSR_THR_Empty;
-}
-
-static void _serial_tx_byte( unsigned int port, char c ) {
-    outb(port + USART_THR, c);
-}
-
-
-void putc_serial(char c) { // XXX
-    while( !_serial_tx_ready( USART_0_BASE ) );
-    _serial_tx_byte( USART_0_BASE, c );
-    if( c == '\n' ) {
-        putc_serial('\r');
-    }
-	
-}
-
-
-// RECEIVE
-
-static int _serial_rx_ready( unsigned int port ) {
-    return inb(port + USART_LSR) & LSR_Data_Ready;
-}
-
-static char _serial_rx_byte( unsigned int port ) {
-    return inb(port + USART_RBR);
-}
-
-
-static char getc_serial(bool block) { // XXX
-    if( block ) {
-        while( !_serial_rx_ready( USART_0_BASE ) );
-    }
-    else if( !_serial_rx_ready( USART_0_BASE ) ) {
-        return 0; // XXX
-    }
-    return( _serial_rx_byte( USART_0_BASE ) );
-}
-
-// INIT
-
-static void init_serial() {
-
-#define COMPORT USART_0_BASE
-#define out_u8 outb
-#define in_u8 inb
-
-#define RATE 115200
-
-#define IER	(COMPORT+1)
-#define EIR	(COMPORT+2)
-#define LCR	(COMPORT+3)
-#define MCR	(COMPORT+4)
-#define LSR	(COMPORT+5)
-#define MSR	(COMPORT+6)
-#define DLLO	(COMPORT+0)
-#define DLHI	(COMPORT+1)
-
-    __asm__ __volatile__ (" .word 0x24000000 ");
-
-    out_u8(LCR, 0x80);		/* select bank 1	*/
-    for (volatile int i = 10000000; i--; );
-    out_u8(DLLO, (((115200/RATE) >> 0) & 0x00FF));
-    out_u8(DLHI, (((115200/RATE) >> 8) & 0x00FF));
-    out_u8(LCR, 0x03);		/* set 8,N,1		*/
-    out_u8(IER, 0x00);		/* disable interrupts	*/
-    out_u8(EIR, 0x07);		/* enable FIFOs	*/
-    out_u8(IER, 0x01);		/* enable RX interrupts	*/
-    in_u8(IER);
-    in_u8(EIR);
-    in_u8(LCR);
-    in_u8(MCR);
-    in_u8(LSR);
-    in_u8(MSR);
-}
diff --git a/kernel/kdb/platform/malta/pio.h b/kernel/kdb/platform/malta/pio.h
deleted file mode 100644
index 763626c3..00000000
--- a/kernel/kdb/platform/malta/pio.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     kdb/platform/malta/pio.h
- * Description:   Malta platform I/O port access macros
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pio.h,v 1.1 2006/02/23 21:07:44 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __KDB__PLATFORM__MALTA__PIO_H__
-#define __KDB__PLATFORM__MALTA__PIO_H__
-
-#define inb( port )        (*((volatile unsigned char*)(port)))
-#define outb( port, data ) ((*((volatile unsigned char*)(port))) = data)
-
-#endif /* !__KDB__PLATFORM__MALTA__PIO_H__ */
diff --git a/kernel/kdb/platform/malta/uart16550.h b/kernel/kdb/platform/malta/uart16550.h
deleted file mode 100644
index 3d917d31..00000000
--- a/kernel/kdb/platform/malta/uart16550.h
+++ /dev/null
@@ -1,151 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     kdb/platform/malta/uart16550.h
- * Description:   Malta platform UART definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: uart16550.h,v 1.1 2006/02/23 21:07:44 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __KDB__PLATFORM__MALTA__UART16550_H__
-#define __KDB__PLATFORM__MALTA__UART16550_H__
-
-/*  USART ADDRESSES */
-#define USART_0_BASE    (0xb80003f8)                    /* reflects PC hardware */
-
-/* Handy shortforms, based on old system. Touch misleading: more status */
-#define USART_0_STATUS  (USART_0_BASE + USART_LSR)
-#define USART_0_DATA    (USART_0_BASE + USART_RBR)
-
-/*
- *      16550 IO register offsets - should be added to USART_n_BASE
- */
-#define USART_RBR              0  /* receive data register */
-#define USART_THR              0  /* transmit holding register */
-#define USART_IER              1  /* interrupt enable offset */
-#define USART_IIR              2  /* interupt identification register */
-#define USART_FCR              2  /* FIFO control register */
-#define USART_LCR              3  /* line control register */
-#define USART_MCR              4  /* modem control register */
-#define USART_LSR              5  /* line status register */
-#define USART_MSR              6  /* modem status register */
-
-/*
- *      The following constants are primarily for documentation purposes
- *      to show what the values sent to the 8250 Control Registers do to
- *      the chip.
- *
- *                     INTERRUPT ENABLE REGISTER
- */
-
-#define IER_Received_Data      1
-#define IER_Xmt_Hld_Reg_Empty  (1<<1)
-#define IER_Recv_Line_Status   (1<<2)
-#define IER_Modem_Status       (1<<3)
-#define IER_Not_Used           0xF0
-
-
-/*
- *                       LINE CONTROL REGISTER
- */
-
-#define LCR_Word_Length_Mask     3
-#define LCR_Stop_Bits            (1<<2)
-#define LCR_Parity_Enable        (1<<3)
-#define LCR_Even_Parity          (1<<4)
-#define LCR_Stick_Parity         (1<<5)
-#define LCR_Set_Break            (1<<6)
-#define LCR_Divisor_Latch_Access (1<<7)
-
-
-
-
-/* Divisor Latch - must be set to 1
- * to get to the divisor latches of
- * the baud rate generator - must
- * be set to 0 to access the
- * Receiver Buffer Register and
- * the Transmit Holding Register
- */
-#define LCR_DLAB                                LCR_Divisor_Latch_Access
-
-
-/*
- *                      MODEM CONTROL REGISTER
- */
-
-#define MCR_dtr          1
-#define MCR_rts          (1<<1)
-#define MCR_Out_1        (1<<2)
-#define MCR_Out_2        (1<<3) /* MUST BE ASSERTED TO ENABLE INTERRRUPTS */
-#define MCR_Loop_Back    (1<<4)
-#define MCR_Not_Used     (7<<1)
-
-
-
-
-/*
- *                        LINE STATUS REGISTER
- */
-
-#define LSR_Data_Ready      1
-#define LSR_Overrun_Error   (1<<1)
-#define LSR_Parity_Error    (1<<2)
-#define LSR_Framing_Error   (1<<3)
-#define LSR_Break_Interrupt (1<<4)
-#define LSR_THR_Empty       (1<<5)  /* Transmitter Holding Register */
-#define LSR_TSR_Empty       (1<<6)  /* Transmitter Shift Register */
-#define LSR_Not_Used        (1<<7)
-
-
-/*
- *                       MODEM STATUS REGISTER
- */
-
-#define MSR_Delta_CTS       1
-#define MSR_Delta_DSR       (1<<1)
-#define MSR_TERD            (1<<2)  /* Trailing Edge Ring Detect   */
-#define MSR_Delta_RLSD      (1<<3)  /* Received Line Signal Detect */
-#define MSR_CTS             (1<<4)  /* Clear to Send               */
-#define MSR_DSR             (1<<5)  /* Data Set Ready              */
-#define MSR_RD              (1<<6)  /* Ring Detect                 */
-#define MSR_RLSD            (1<<7)  /* Received Line Signal Detect */
-
-
-
-/*
- *   Fifo CONTROL REGISTER (Write only)
- */
-#define FCR_Fifo_Enable                         1       /* set to one to enable Fifos */
-#define FCR_Rcvr_Reset                          (1<<1)  /* set to clear receiver FIFO */
-#define FCR_Xmit_Reset                          (1<<2)  /* set to clear transmitter FIFO */
-#define FCR_DMA_Mode                            (1<<3)  /* no effect  */           
-#define FCR_Trigger_1                           (0<<6)  /* trigger IRQ on one byte */
-#define FCR_Trigger_4                           (1<<6)  /* 4 bytes in fifo */
-#define FCR_Trigger_8                           (2<<6)  /* 8 bytes */
-#define FCR_Trigger_14                          (3<<6)  /* 14 bytes before IRQ occurs */
-
-
-#endif /* !__KDB__PLATFORM__MALTA__UART16550_H__ */
diff --git a/kernel/kdb/platform/miata/Makeconf b/kernel/kdb/platform/miata/Makeconf
deleted file mode 100644
index b84ed7b4..00000000
--- a/kernel/kdb/platform/miata/Makeconf
+++ /dev/null
@@ -1,2 +0,0 @@
-
-SOURCES += ${addprefix kdb/platform/miata/,miata.cc}
diff --git a/kernel/kdb/platform/miata/miata.cc b/kernel/kdb/platform/miata/miata.cc
deleted file mode 100644
index 8d842b3f..00000000
--- a/kernel/kdb/platform/miata/miata.cc
+++ /dev/null
@@ -1,51 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2001, 2002,  Karlsruhe University
- *                
- * File path:     kdb/platform/pc99/io.cc
- * Description:   PC99 specific I/O functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: miata.cc,v 1.4 2003/12/10 02:01:47 benno Exp $
- *                
- ********************************************************************/
-#include <kdb/kdb.h>
-#include <kdb/init.h>
-#include <kdb/cmd.h>
-#include <kdb/console.h>
-#include <init.h>
-#include <debug.h>
-
-#define PYXIS_RESET (AS_KSEG_START + 0x8780000900ull)
-
-DECLARE_CMD (cmd_really_halt, root, '6', "superHalt", "Really halt system");
-
-CMD(cmd_really_halt, cg)
-{
-    volatile unsigned int *reset = (volatile unsigned int *) PYXIS_RESET;
-    printf("Goodbye, cruel world!\n\r");
-
-    *reset = 0x0000DEAD;
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/platform/ofsparc64/Makeconf b/kernel/kdb/platform/ofsparc64/Makeconf
deleted file mode 100644
index ce5c8a6f..00000000
--- a/kernel/kdb/platform/ofsparc64/Makeconf
+++ /dev/null
@@ -1,9 +0,0 @@
-SOURCES += kdb/platform/ofsparc64/console.cc
-
-ifeq ($(CONFIG_SPARC64_SAB82532),y)
-SOURCES += kdb/platform/ofsparc64/sab82532.cc
-endif
-
-ifeq ($(CONFIG_SPARC64_Z8530),y)
-SOURCES += kdb/platform/ofsparc64/z8530.cc
-endif
diff --git a/kernel/kdb/platform/ofsparc64/console.cc b/kernel/kdb/platform/ofsparc64/console.cc
deleted file mode 100644
index c366b658..00000000
--- a/kernel/kdb/platform/ofsparc64/console.cc
+++ /dev/null
@@ -1,67 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  University of New South Wales
- *                
- * File path:     kdb/platform/ofsparc64/console.cc
- * Description:   Console setup for SPARC v9 OpenBoot (Open Firmware)
- *                systems.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.cc,v 1.6 2004/06/04 05:23:05 philipd Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/console.h>
-
-#if CONFIG_SPARC64_SAB82532
-extern void serialB_init(void);
-extern void serialB_putc(char c);
-extern char serialB_getc(bool block);
-#endif
-#if CONFIG_SPARC64_Z8530
-extern void z8530_init(void);
-extern void z8530_putc(char c);
-extern char z8530_getc(bool block);
-#endif
-
-extern kdb_console_t serialB_console;
-
-word_t kdb_current_console = 0;
-
-kdb_console_t kdb_consoles[] = {
-#if CONFIG_SPARC64_SAB82532
-    {"Serial Port B", &serialB_init, &serialB_putc, &serialB_getc},//serialB_console,
-#elif CONFIG_SPARC64_Z8530
-    {"Serial Port A", &z8530_init, &z8530_putc, &z8530_getc},//z8530_console,
-#endif
-    KDB_NULL_CONSOLE
-};
-
-#if CONFIG_KDB_BREAKIN
-void kdebug_check_breakin(void) {
-    if(kdb_consoles[kdb_current_console].getc(false) == 27) {
-	enter_kdebug("KDB Breakin");
-    }
-}
-#endif
diff --git a/kernel/kdb/platform/ofsparc64/sab82532.cc b/kernel/kdb/platform/ofsparc64/sab82532.cc
deleted file mode 100644
index b86de81a..00000000
--- a/kernel/kdb/platform/ofsparc64/sab82532.cc
+++ /dev/null
@@ -1,203 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  University of New South Wales
- *                
- * File path:     kdb/platform/ofsparc64/sab82532.cc
- * Description:   Console SPARC v9 systems with a Siemens SAB82532
- *                enhanced serial communications controller. This is
- *                used on the following ofsparc64 platforms:
- *                - Sun Ultra 10 workstation.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sab82532.cc,v 1.5 2004/05/21 01:36:06 philipd Exp $
- *                
- ********************************************************************/
-
-#include <kdb/console.h>
-#include INC_ARCH(asi.h)
-
-#warning awiggins (22-08-03): SAB82532 should not be hardcoded here.
-/* Base address (physical) of SAB82532. */
-#define SAB82532_BASEPADDR 0x1FFF1400000
-
-/**************************
-* Registers in Async mode *
-**************************/
-
-/**
- *  Port A: Read-only registers.
- */
-
-/* Receive FIFOs. */
-#define SAB82532_A_RFIFO 0x00
-
-/* Status register. */
-#define SAB82532_A_STAR  0x20
-
-#define SAB82532_STAR_XDOV (1 << 7) /* Transmit data overflow.     */
-#define SAB82532_STAR_XFW  (1 << 6) /* Transmit FIFO write enable. */
-#define SAB82532_STAR_RFNE (1 << 5) /* RFIFO not empty.            */
-#define SAB82532_STAR_FCS  (1 << 4) /* Flow control status.        */
-#define SAB82532_STAR_TEC  (1 << 3) /* TIC executing.              */
-#define SAB82532_STAR_CEC  (1 << 2) /* Command Executing.          */
-#define SAB82532_STAR_CTS  (1 << 1) /* Clear to send state.        */
-
-/**
- *  Port A: Write-only registers.
- */
-
-/* Transmit FIFO. */
-#define SAB82532_A_XFIFO 0x00
-
-/* Command Register. */
-#define SAB82532_A_CMDR  0x20
-
-#define SAB82532_CMDR_RMC  (1 << 7) /* Receive message complete. */
-#define SAB82532_CMDR_RRES (1 << 6) /* Receiver reset.           */
-#define SAB82532_CMDR_RFRD (1 << 5) /* Receive FIFO read enable. */
-#define SAB82532_CMDR_STI  (1 << 4) /* Start timer.              */
-#define SAB82532_CMDR_XF   (1 << 3) /* Transmit frame.           */
-#define SAB82532_CMDR_XRES (1 << 0) /* Transmitter reset.        */
-
-/**
- *  Port B registers.
- */ 
-
-#define SAB82532_B_OFFSET 0x40
-
-#define SAB82532_B_RFIFO (SAB82532_A_RFIFO + SAB82532_B_OFFSET)
-#define SAB82532_B_STAR  (SAB82532_A_STAR  + SAB82532_B_OFFSET)
-#define SAB82532_B_XFIFO (SAB82532_A_XFIFO + SAB82532_B_OFFSET)
-#define SAB82532_B_CMDR  (SAB82532_A_CMDR  + SAB82532_B_OFFSET)
-
-/********************
-* Console functions * 
-********************/
-
-void
-serialB_putc(char c)
-{
-    u8_t star; /* Status register */
-
-    /* Check if SAB ready for next command and XFIFO has space. */ 
-    do {
-	__asm__ __volatile__(
-			     "lduba\t[%1 + %2] %3, %0\t! Load status register.\n"
-			     : "=r" (star)
-			     : "r" (SAB82532_BASEPADDR),      // %0
-			       "r" (SAB82532_B_STAR),         // %1
-			       "i" (ASI_PHYS_BYPASS_EC_E_L)); // %2
-
-    } while((star & SAB82532_STAR_CEC) || !(star & SAB82532_STAR_XFW));
-
-    /* Put character. */
-    __asm__ __volatile__(
-			 "stba\t%0, [%1 + %2] %3\t! Store charactor to XFIFO.\n"
-			 "stba\t%4, [%1 + %5] %3\t! Send frame command.\n"
-			 : /* no outputs */
-			 : "r" (c),                      // %0
-			   "r" (SAB82532_BASEPADDR),     // %1
-			   "r" (SAB82532_B_XFIFO),       // %2
-			   "i" (ASI_PHYS_BYPASS_EC_E_L), // %3
-			   "r" (SAB82532_CMDR_XF),       // %4
-			   "r" (SAB82532_B_CMDR));       // %5
-
-    if (c == '\n') {
-	serialB_putc('\r');
-    }
-
-} // serialB_putc()
-
-char
-serialB_getc(bool block)
-{
-    char c;
-    u8_t star; /* Status register.     */
-
-    /* Check if SAB ready for next command and RFIFO not empty. */ 
-    do {
-	__asm__ __volatile__(
-			     "lduba\t[%1 + %2] %3, %0\t! Load status register.\n"
-			     : "=r" (star)
-			     : "r" (SAB82532_BASEPADDR),      // %0
-			       "r" (SAB82532_B_STAR),         // %1
-			       "i" (ASI_PHYS_BYPASS_EC_E_L)); // %2
-
-    } while((star & SAB82532_STAR_CEC) || 
-	    (block && !(star & SAB82532_STAR_RFNE)));
-
-    if(!block && !(star & SAB82532_STAR_RFNE)) {
-	return -1;
-    }
-
-    /* Enable RFIFO read. */
-    __asm__ __volatile__(
-			 "stba\t%0, [%1 + %2] %3\t! Send frame command.\n"
-			 : /* no outputs */
-			 : "r" (SAB82532_CMDR_RFRD),      // %0
-			   "r" (SAB82532_BASEPADDR),      // %1
-			   "r" (SAB82532_B_CMDR),         // %2
-			   "i" (ASI_PHYS_BYPASS_EC_E_L)); // %3
-
-    /* Check if SAB ready for next command. */ 
-    do {
-	__asm__ __volatile__(
-			     "lduba\t[%1 + %2] %3, %0\t! Load status register.\n"
-			     : "=r" (star)
-			     : "r" (SAB82532_BASEPADDR),      // %0
-			       "r" (SAB82532_B_STAR),         // %1
-			       "i" (ASI_PHYS_BYPASS_EC_E_L)); // %2
-
-    } while(star & SAB82532_STAR_CEC);
-
-    /* Get character. */
-    __asm__ __volatile__(
-			 "lduba\t[%1 + %2] %3, %0\t! Load charactor from RFIFO.\n"
-			 : "=r" (c)                       // %0
-			 : "r" (SAB82532_BASEPADDR),      // %1
-			   "r" (SAB82532_B_RFIFO),        // %2
-			   "i" (ASI_PHYS_BYPASS_EC_E_L)); // %3
-
-    /* Signal receive completed. */
-    __asm__ __volatile__(
-			 "stba\t%0, [%1 + %2] %3\t! Send frame command.\n"
-			 : /* no outputs */
-			 : "r" (SAB82532_CMDR_RMC),       // %0
-			   "r" (SAB82532_BASEPADDR),      // %1
-			   "r" (SAB82532_B_CMDR),         // %2
-			   "i" (ASI_PHYS_BYPASS_EC_E_L)); // %3
-
-    return c;
-
-} // serialB_getc()
-
-void SECTION(".init")
-serialB_init(void)
-{
-    /* For now port is initialised by the firmware already. */
-    /* Add support for setting serial port speed later.     */
-
-} // serialB_init()
-
-kdb_console_t serialB_console =
-    {"Serial Port B", &serialB_init, &serialB_putc, &serialB_getc};
diff --git a/kernel/kdb/platform/ofsparc64/z8530.cc b/kernel/kdb/platform/ofsparc64/z8530.cc
deleted file mode 100644
index 6234db4b..00000000
--- a/kernel/kdb/platform/ofsparc64/z8530.cc
+++ /dev/null
@@ -1,245 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1997, 1998, 2003, 2004,  University of New South Wales
- *                
- * File path:     kdb/platform/ofsparc64/z8530.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: z8530.cc,v 1.1 2004/06/04 05:21:22 philipd Exp $
- *                
- ********************************************************************/
-#include "z8530.h"
-
-
-#define ZSCCCLK	14745600	 /* clock rate 14.7456 MHz */
-
-static const int zsccbrtc[] = {
-    -1,
-    BRTC (ZSCCCLK, 50),
-    BRTC (ZSCCCLK, 75),
-    BRTC (ZSCCCLK, 110),
-    BRTC (ZSCCCLK, 134),
-    BRTC (ZSCCCLK, 150),
-    BRTC (ZSCCCLK, 200),
-    BRTC (ZSCCCLK, 300),
-    BRTC (ZSCCCLK, 600),
-    BRTC (ZSCCCLK, 1200),
-    BRTC (ZSCCCLK, 1800),
-    BRTC (ZSCCCLK, 2400),
-    BRTC (ZSCCCLK, 4800),
-    BRTC (ZSCCCLK, 9600),
-    BRTC (ZSCCCLK, 19200),
-    BRTC (ZSCCCLK, 38400)};
-
-
-static void
-zsccputreg (addr_t base, unsigned char reg, unsigned char val)
-{
-    if (reg != zWR0) {
-	__asm__ __volatile__(
-			     "stba\t%0, [ %1 ] %2\t\n"
-			     :: "r" (zWR0_REG | reg),
-			        "r" ((char*)base + CMD),
-			        "i" (ASI_PHYS_BYPASS_EC_E_L));
-    }
-    __asm__ __volatile__(
-			 "stba\t%0, [ %1 ] %2\t\n"
-			 :: "r" (val),
-			    "r" ((char*)base + CMD),
-			    "i" (ASI_PHYS_BYPASS_EC_E_L));
-}
-
-static unsigned char
-zsccgetreg (addr_t base, unsigned char reg)
-{
-    unsigned char result;
-    if (reg != zRR0) {
-	__asm__ __volatile__(
-			     "stba\t%0, [ %1 ] %2\t\n"
-			     :: "r" (zWR0_REG | reg),
-			        "r" ((char*)base + CMD),
-			        "i" (ASI_PHYS_BYPASS_EC_E_L));
-    }
-    __asm__ __volatile__(
-			 "lduba\t[ %1 ] %2, %0\t\n"
-			 : "=r" (result)
-			 : "r" ((char*)base + CMD),
-			   "i" (ASI_PHYS_BYPASS_EC_E_L));
-
-    return result;
-}
-
-static int
-zsccinit (addr_t base)
-{
-    // Disable interrupts (everything else should be configured already)
-    zsccputreg(base, zWR9, 0);
-
-    return 0;
-}
-
-
-static void
-zsccflush (addr_t base)
-{
-    /* wait for Tx fifo to drain */
-    int timeout = 10;
-    while (!(zsccgetreg (base, zRR0) & zRR0_TXEMPTY))
-	if (--timeout == 0)
-	    break;
-}
-
-
-static int
-zsccprogram (addr_t base, int baudrate)
-{
-    zsccflush (base);
-
-    baudrate &= 17;
-    if (baudrate == 0)
-	return 1;
-
-    /*
-     * See the zscc manual for details.
-     */
-
-    zsccputreg(base, zWR4, zWR4_1STOPBIT | zWR4_CLK);
-    zsccputreg(base, zWR10, zWR10_NRZ);
-
-    zsccputreg(base, zWR14, zWR14_NOP); /* stop BRG */
-    zsccputreg(base, zWR11, zWR11_TRXCOUT| zWR11_TRXCBRG| zWR11_TCLKBRG | zWR11_RCLKBRG);
-    zsccputreg(base, zWR12,  zsccbrtc [baudrate] & 0xff);
-    zsccputreg(base, zWR13,  (zsccbrtc [baudrate] >> 8) & 0xff);
-
-    zsccputreg(base, zWR14, zWR14_BRGENABLE | zWR14_BRGSRC );
-
-    zsccputreg(base, zWR3, zWR3_RXENABLE | zWR3_RX8BITCHAR);
-    zsccputreg(base, zWR5, zWR5_TXENABLE| zWR5_RTS | zWR5_TX8BITCHAR | zWR5_DTR);
-    return 0;
-}
-
-
-int pzscc (int op, addr_t dat, int chan, int data)
-{
-    addr_t base = dat;
-
-    switch (op) {
-    case OP_INIT:
-	return zsccinit (base);
-    case OP_BAUD:
-	return zsccprogram (base, data);
-    case OP_TXRDY:
-	return (zsccgetreg(base, zRR0) & zRR0_TXEMPTY);
-    case OP_TX:
-	__asm__ __volatile__(
-			     "stba\t%0, [ %1 ] %2\t\n"
-			     :: "r" (data),
-				"r" ((char*)base + DATA),
-				"i" (ASI_PHYS_BYPASS_EC_E_L));
-	break;
-    case OP_RXRDY:
-	return (zsccgetreg(base, zRR0) & zRR0_RXAVAIL);
-    case OP_RX:
-	__asm__ __volatile__(
-			     "lduba\t[ %1 ] %2, %0\t\n"
-			     : "=r" (data)
-			     : "r" ((char*)base + DATA),
-			       "i" (ASI_PHYS_BYPASS_EC_E_L));
-	return data;
-    case OP_FLUSH:
-	zsccflush (base);
-	break;
-    case OP_RXSTOP:
-	/* rx flow control */
-	zsccputreg (base, zWR5, zWR5_TXENABLE| zWR5_TX8BITCHAR | zWR5_DTR | 
-		    (data ? 0 : zWR5_RTS));
-	break;
-    }
-    return 0;
-}
-
-#warning philipd (04/06/04): base should be obtained from open firmware
-#define FHC_BASE	0x1FFF8000000
-#define Z8530_BASE	(FHC_BASE | 0x902000)
-
-typedef struct ConfigEntry {
-    addr_t devinfo;
-    int chan;
-    int (*handler)(int,addr_t,int,int);
-    int rxqsize;
-    int brate;
-} ConfigEntry;
-
-ConfigEntry     ConfigTable[] =
-{
-    {(addr_t)(Z8530_BASE+4), 0, pzscc, 256, 17},
-    {(addr_t)(Z8530_BASE+0), 1, pzscc, 256, 17},
-    {0}
-};
-
-void
-z8530_putc(char c) {
-    ConfigEntry *q = &ConfigTable[0];
-
-    /* wait to transmit */
-    while(!(*q->handler) (OP_TXRDY, (char*)q->devinfo, 0, 0));
-	pzscc( OP_TX, (char*)q->devinfo, 0, c);
-    if (c == '\n')
-	z8530_putc('\r');
-}
-
-char
-z8530_getc(bool block)
-{
-    ConfigEntry *q = &ConfigTable[0];
-
-    /* Data ready? */
-    if (!(*q->handler) (OP_RXRDY, (char*)q->devinfo, 0, 0))
-    {
-	if (!block)
-	    return -1;
-	/* wait to receive */
-	while(!(*q->handler) (OP_RXRDY, (char*)q->devinfo, 0, 0));
-    }
-
-    return pzscc( OP_RX, (char*)q->devinfo, 0,0);
-}
-
-void
-z8530_init ()
-{
-    int             i, brate;
-    ConfigEntry    *q;
-
-    for (i = 0; ConfigTable[i].devinfo; i++) {
-	q = &ConfigTable[i];
-	if (q->chan == 0)
-	{
-	    (*q->handler) (OP_INIT, (char*)q->devinfo, 0, 0);
-	}
-	//brate = q->brate;
-	//(*q->handler) (OP_BAUD, (char*)q->devinfo, q->chan, brate);
-    }
-}
-
diff --git a/kernel/kdb/platform/ofsparc64/z8530.h b/kernel/kdb/platform/ofsparc64/z8530.h
deleted file mode 100644
index 456b9f59..00000000
--- a/kernel/kdb/platform/ofsparc64/z8530.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1997, 1998, 2003,  University of New South Wales
- *                
- * File path:     kdb/platform/ofsparc64/z8530.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: z8530.h,v 1.1 2004/06/04 05:21:22 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __KDB__PLATFORM__OFSPARC64__Z8530_H__
-#define __KDB__PLATFORM__OFSPARC64__Z8530_H__
-
-/****************************************************************************
- * Register definitions for z8530. See data book for more information
- ****************************************************************************/
-
-#ifndef ZSCCX
-#define ZSCCX 16		/* default to 16X clocking */
-#define zWR4_CLK  zWR4_X16CLK 
-#endif
-
-/* convert baudrate into a value for the BRG */
-#define BRTC(clk, brate) (((clk) / (2*(brate)*ZSCCX)) - 2)
-
-/* offsets from usart base for usart registers */
-#define CMD	0
-#define DATA	2
-
-#define zWR0    0               /* reg pointers and various init */
-#define zWR1    1               /* Tx and Rx int enables, WAIT/DMA */
-#define zWR2    2               /* interupt vectors */
-#define zWR3    3               /* Rx params and control modes */
-#define zWR4    4               /* Tx and Rx modes and params */
-#define zWR5    5               /* Tx params and control modes */
-#define zWR6    6               /* Sync Char or SDLC address */
-#define zWR7    7               /* Sync Char or SDLC flag */
-#define zWR8    8               /* Tx buffer */
-#define zWR9    9               /* Master Int control and reset commands */
-#define zWR10   10              /* Misc TX and RX control bits */
-#define zWR11   11              /* clock mode controls for RX and TX */
-#define zWR12   12              /* Low byte of baud rate gen */
-#define zWR13   13              /* high byte of baud rate gen */
-#define zWR14   14              /* Misc control bits */
-#define zWR15   15              /* External status int enable control */
-
-#define zRR0    0               /* Tx and Rx buffer stat and extern stat */
-#define zRR1    1               /* Special Rx Condition status */
-#define zRR2B   2               /* modified Int vector */
-#define zRR2A   2               /* unmodified int vector */
-#define zRR3A   3               /* Int pending bits */
-#define zRR4    4               /* WR4 */
-#define zRR5    5               /* WR5 */
-#define zRR6    6               /* SDLC FIFO count, lower byte */
-#define zRR7    7               /* SDLC FIFO count and status */
-#define zRR8    8               /* Rx buffer */
-#define zRR9    9               /* WR3 */
-#define zRR10   10              /* Misc status bits */
-#define zRR11   11              /* WR10 */
-#define zRR12   12              /* Lower byte of baud rate gen */
-#define zRR13   13              /* Upper byte of baud rate gen */
-#define zRR14   14              /* Extended feature and FIFO control */
-#define zRR15   15              /* External status int info */
-
-
-#define zWR0_NOP             0000
-#define zWR0_REG             0000
-#define zWR0_RESETTXLATCH    0300
-#define zWR0_RESETTXCRC      0200
-#define zWR0_RESETRXCRC      0100
-#define zWR0_RESETIUS        0070
-#define zWR0_ERRORRESET      0060
-#define zWR0_RESETTXINT      0050
-#define zWR0_INTNEXTCHAR     0040
-#define zWR0_SENDABORT       0030
-#define zWR0_RESETINT        0020
-#define zWR0_POINTHIGH       0010
-
-#define zWR3_RXENABLE        0001
-#define zWR3_SYNCINHIBIT     0002
-#define zWR3_ADDRMODE        0004
-#define zWR3_RXCRCENABLE     0010
-#define zWR3_HUNTMODE        0020
-#define zWR3_AUTOENABLE      0040
-#define zWR3_RX5BITCHAR      0000
-#define zWR3_RX6BITCHAR      0100
-#define zWR3_RX7BITCHAR      0200
-#define zWR3_RX8BITCHAR      0300
-
-#define zWR4_PARENABLE       0001
-#define zWR4_PAREVEN         0002
-#define zWR4_PARODD          0000
-#define zWR4_SYNCENABLE      0000
-#define zWR4_1STOPBIT        0004
-#define zWR4_15STOPBIT       0010
-#define zWR4_2STOPBIT        0014
-#define zWR4_8BITSYNC        0000
-#define zWR4_16BITSYNC       0020
-#define zWR4_SDLCMODE        0040
-#define zWR4_EXTSYNC         0060
-#define zWR4_X1CLK           0000
-#define zWR4_X16CLK          0100
-#define zWR4_X32CLK          0200
-#define zWR4_X64CLK          0300
-
-#define zWR5_TXCRC           0001
-#define zWR5_RTS             0002
-#define zWR5_SDLCCRC         0004
-#define zWR5_TXENABLE        0010
-#define zWR5_SENDBREAK       0020
-#define zWR5_TX5BITCHAR      0000
-#define zWR5_TX6BITCHAR      0040
-#define zWR5_TX7BITCHAR      0100
-#define zWR5_TX8BITCHAR      0140
-#define zWR5_DTR             0200
-
-#define zWR9_HARDRESET       0300
-#define zWR9_ARESET          0200
-#define zWR9_BRESET          0100
-#define zWR9_INTACK          0040
-#define zWR9_STATUS          0020
-#define zWR9_MIE             0010
-#define zWR9_DLC             0004
-#define zWR9_NV              0002
-#define zWR9_VIS             0001
-
-#define zWR10_8BITSYNC       0001
-#define zWR10_LOOPMODE       0002
-#define zWR10_ABORT          0004
-#define zWR10_MARK           0010
-#define zWR10_GOACTIVE       0020
-#define zWR10_NRZ            0000
-#define zWR10_NRZI           0040
-#define zWR10_FM1            0100
-#define zWR10_FM0            0140
-#define zWR10_CRCPRESET      0200
-
-#define zWR11_TRXCXTAL       0000
-#define zWR11_TRXCTCLK       0001
-#define zWR11_TRXCBRG        0002
-#define zWR11_TRXCDPLL       0003
-#define zWR11_TRXCOUT        0004
-#define zWR11_TCLKRTXC       0000
-#define zWR11_TCLKTRXC       0010
-#define zWR11_TCLKBRG        0020
-#define zWR11_TCLKDPLL       0030
-#define zWR11_RCLKRTXC       0000
-#define zWR11_RCLKTRXC       0040
-#define zWR11_RCLKBRG        0100
-#define zWR11_RCLKDPLL       0140
-#define zWR11_RTXCXTAL       0200
-
-#define zWR14_BRGENABLE      0001
-#define zWR14_BRGSRC         0002
-#define zWR14_DTRFUNC        0004
-#define zWR14_AUTOECHO       0010
-#define zWR14_LOOPBACK       0020
-#define zWR14_NOP            0000
-#define zWR14_SEARCH         0040
-#define zWR14_RESETCLOCK     0100
-#define zWR14_DISABLEDPLL    0140
-#define zWR14_SRCBRG         0200
-#define zWR14_SRCRTxC        0240
-#define zWR14_FMMODE         0300
-#define zWR14_NRZIMODE       0340
-
-#define zRR0_RXAVAIL         0001
-#define zRR0_ZEROCOUNT       0002
-#define zRR0_TXEMPTY         0004
-#define zRR0_DCD             0010
-#define zRR0_SYNCHUNT        0020
-#define zRR0_CTS             0040
-#define zRR0_TXUNDERRUN      0100
-#define zRR0_BREAKABORT      0200
-
-/* operation codes for device specific driver */
-#define OP_INIT         1
-#define OP_TX           2
-#define OP_RX           3
-#define OP_RXRDY        4
-#define OP_TXRDY        5
-#define OP_BAUD         6
-#define OP_RXSTOP       7
-#define OP_FLUSH        8
-#define OP_RESET        9
-#define OP_OPEN         10
-#define OP_CLOSE        11
-
-#endif /* !__KDB__PLATFORM__OFSPARC64__Z8530_H__ */
diff --git a/kernel/kdb/platform/pleb/Makeconf b/kernel/kdb/platform/pleb/Makeconf
deleted file mode 100644
index 63174e07..00000000
--- a/kernel/kdb/platform/pleb/Makeconf
+++ /dev/null
@@ -1,2 +0,0 @@
-SOURCES += $(addprefix kdb/platform/$(PLATFORM)/, console.cc reboot.cc )
-
diff --git a/kernel/kdb/platform/pleb/console.cc b/kernel/kdb/platform/pleb/console.cc
deleted file mode 100644
index 64d02755..00000000
--- a/kernel/kdb/platform/pleb/console.cc
+++ /dev/null
@@ -1,114 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     kdb/arch/arm/console.cc
- * Description:
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.cc,v 1.6 2004/12/09 01:21:41 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include INC_GLUE(config.h)
-#include INC_PLAT(console.h)
-#include <kdb/console.h>
-
-/****************************************************************************
- *
- *    Serial console support
- *
- ****************************************************************************/
-
-struct serial_uart3 {
-    /* this struct must be packed */
-    u32_t   UTCR0;
-    u32_t   UTCR1;
-    u32_t   UTCR2;
-    u32_t   UTCR3;
-    u32_t   res1;
-    u32_t   UTDR;
-    u32_t   res2;
-    u32_t   UTSR0;
-    u32_t   UTSR1;
-};
-
-
-// XXX FIXME - define
-
-static volatile struct serial_uart3 *serial_regs = NULL;
-
-static void putc_serial( char c )
-{
-    if ( serial_regs )
-    {
-	while (( serial_regs->UTSR1 & 0x04 ) == 0 );
-
-	serial_regs->UTDR = c;
-	if ( c == '\n' )
-	    putc_serial( '\r' );
-    }
-}
-
-static char getc_serial( bool block )
-{
-    if ( serial_regs )
-    {
-	char c;
-	if (( serial_regs->UTSR1 & 0x02) == 0 )
-	{
-	    if (!block)
-		return -1;
-	    while (( serial_regs->UTSR1 & 0x02) == 0 );
-	}
-	c = serial_regs->UTDR;
-	if (c == '\n') c = '\r';
-	return c;
-    }
-    return -1;
-}
-
-#if defined(CONFIG_KDB_BREAKIN)
-void kdebug_check_breakin (void)
-
-{
-    if (( serial_regs->UTSR1 & 0x02) != 0 )
-    {
-	if (serial_regs->UTDR == 27)
-	    enter_kdebug("breakin");
-    }
-}
-#endif
-
-static void init(void) 
-{
-    serial_regs = (struct serial_uart3 *)CONSOLE_VADDR;
-}
-
-word_t kdb_current_console = 0;
-
-kdb_console_t kdb_consoles[] = {
-        { "serial", &init, &putc_serial, &getc_serial},
-        KDB_NULL_CONSOLE
-};
diff --git a/kernel/kdb/platform/pleb/reboot.cc b/kernel/kdb/platform/pleb/reboot.cc
deleted file mode 100644
index 24836f1c..00000000
--- a/kernel/kdb/platform/pleb/reboot.cc
+++ /dev/null
@@ -1,60 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     kdb/platform/pleb/reboot.cc
- * Description:   SA1100 system reset
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: reboot.cc,v 1.2 2004/06/04 06:43:13 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_API(space.h)
-#include INC_API(tcb.h)
-
-/*
- * Reboot the box
- */
-DECLARE_CMD (cmd_reboot, root, '6', "reset", "Reset system");
-
-CMD (cmd_reboot, cg)
-{
-    tcb_t *tcb;
-    space_t *s = NULL;
-
-    tcb = s->get_tcb(kdb.kdb_param);
-    s = tcb->get_space();
-    if (!s)
-	s = get_kernel_space();
-
-    s->add_mapping( (addr_t)0xfffff000, (addr_t)0x90030000, pgent_t::size_4k,
-		    true, true, true );
-
-    *((word_t *)0xfffff000) = 1;
-    //0x90030004
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/platform/pleb2/Makeconf b/kernel/kdb/platform/pleb2/Makeconf
deleted file mode 100644
index 63174e07..00000000
--- a/kernel/kdb/platform/pleb2/Makeconf
+++ /dev/null
@@ -1,2 +0,0 @@
-SOURCES += $(addprefix kdb/platform/$(PLATFORM)/, console.cc reboot.cc )
-
diff --git a/kernel/kdb/platform/pleb2/console.cc b/kernel/kdb/platform/pleb2/console.cc
deleted file mode 100644
index 162330c2..00000000
--- a/kernel/kdb/platform/pleb2/console.cc
+++ /dev/null
@@ -1,134 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:	platform/pleb2/console.cc
- * Description:	Intel XScale Console
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.cc,v 1.2 2005/01/12 02:49:03 cvansch Exp $
- *
- ***************************************************************************/
-
-#include <debug.h>
-
-#include INC_GLUE(config.h)
-#include INC_PLAT(console.h)
-#include <kdb/console.h>
-
-#define SERIAL_NAME	"serial"
-
-/****************************************************************************
- *
- *    Serial console support
- *
- ****************************************************************************/
-
-struct serial_xscalecon {
-    word_t rbr;  /* 0 */
-    word_t ier;  /* 4 */
-    word_t fcr;  /* 8 */
-    word_t lcr;  /* 12 */
-    word_t mcr;  /* 16 */
-    word_t lsr;  /* 20 */
-    word_t msr;  /* 24 */
-    word_t scr;  /* 28 */
-};
-
-#define thr rbr
-#define iir fcr
-#define dll rbr
-#define dlm ier
-#define dlab lcr
-
-#define LSR_DR		0x01	/* Data ready */
-#define LSR_OE		0x02	/* Overrun */
-#define LSR_PE		0x04	/* Parity error */
-#define LSR_FE		0x08	/* Framing error */
-#define LSR_BI		0x10	/* Break */
-#define LSR_THRE	0x20	/* Xmit holding register empty */
-#define LSR_TEMT	0x40	/* Xmitter empty */
-#define LSR_ERR		0x80	/* Error */
-
-static volatile struct serial_xscalecon *serial_regs = 0;
-
-
-static void putc_serial( char c )
-{
-    if ( serial_regs )
-    {
-	while (( serial_regs->lsr & LSR_THRE ) == 0 );
-
-	serial_regs->thr = c;
-	if ( c == '\n' )
-	    putc_serial( '\r' );
-    }
-}
-
-static char getc_serial( bool block )
-{
-    if ( serial_regs )
-    {
-	if (( serial_regs->lsr & LSR_DR ) == 0 )
-	{
-	    if (!block)
-		return (signed char)-1;
-
-	    while (( serial_regs->lsr & LSR_DR ) == 0 );
-	}
-	return serial_regs->rbr;
-    }
-    return 0;
-}
-
-
-#if defined(CONFIG_KDB_BREAKIN)
-void kdebug_check_breakin (void)
-
-{
-    if (( serial_regs->lsr & LSR_DR ) != 0 )
-    {
-	if (serial_regs->rbr == 27)
-	    enter_kdebug("breakin");
-    }
-}
-#endif
-
-static void init(void) 
-{
-    serial_regs = (struct serial_xscalecon*)(IODEVICE_VADDR + CONSOLE_VOFFSET);
-}
-
-/****************************************************************************
- *
- *    Console registration
- *
- ****************************************************************************/
-
-kdb_console_t kdb_consoles[] = {
-    { SERIAL_NAME, init, putc_serial, getc_serial},
-    KDB_NULL_CONSOLE
-};
-
-word_t kdb_current_console = 0;
-
diff --git a/kernel/kdb/platform/pleb2/reboot.cc b/kernel/kdb/platform/pleb2/reboot.cc
deleted file mode 100644
index 2d7a4126..00000000
--- a/kernel/kdb/platform/pleb2/reboot.cc
+++ /dev/null
@@ -1,52 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     kdb/platform/pleb2/reboot.cc
- * Description:   PLEB2 system reset
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: reboot.cc,v 1.1 2004/12/02 22:04:08 cvansch Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/kdb.h>
-
-#include INC_API(space.h)
-#include INC_PLAT(timer.h)
-
-/*
- * Reboot the box
- */
-DECLARE_CMD (cmd_reboot, root, '6', "reset", "Reset system");
-
-CMD (cmd_reboot, cg)
-{
-    printf("\nReset...\n");
-
-    XSCALE_OS_TIMER_MR3 = 0x1000;	/* Set watchdog timeout */
-    XSCALE_OS_TIMER_WMER = 0x1;		/* Enable watchdog */
-    XSCALE_OS_TIMER_TCR = 0x0;		/* Reset timer */
-
-    return CMD_NOQUIT;
-}
diff --git a/kernel/kdb/platform/sa1100/uart.h b/kernel/kdb/platform/sa1100/uart.h
deleted file mode 100644
index b6d7f27a..00000000
--- a/kernel/kdb/platform/sa1100/uart.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1999-2002,  Karlsruhe University
- *                
- * File path:     platform/sa1100/uart.h
- * Description:   Definitions for the SA-1100 UART
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: uart.h,v 1.2 2003/09/24 19:05:22 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__SA1100__UART_H__
-#define __PLATFORM__SA1100__UART_H__
-
-/*
- * Base address of UART
- */
-#define L4_UART_PBASE	0x80050000
-#define L4_UART_BASE	UART_VBASE	/* location in virtual space */
-
-/* Control registers */
-#define L4_UART_UTCR0	*((volatile u32_t *) (L4_UART_BASE + 0x00))
-#define L4_UART_UTCR1	*((volatile u32_t *) (L4_UART_BASE + 0x04))
-#define L4_UART_UTCR2	*((volatile u32_t *) (L4_UART_BASE + 0x08))
-#define L4_UART_UTCR3	*((volatile u32_t *) (L4_UART_BASE + 0x0c))
-
-/* Data register */
-#define L4_UART_UTDR	*((volatile u32_t *) (L4_UART_BASE + 0x14))
-
-/* Status registers */
-#define L4_UART_UTSR0	*((volatile u32_t *) (L4_UART_BASE + 0x1c))
-#define L4_UART_UTSR1	*((volatile u32_t *) (L4_UART_BASE + 0x20))
-
-
-
-/*
- * Bits defined in control register 0.
- */
-#define L4_UART_PE	(1 << 0)	/* Parity enable */
-#define L4_UART_OES	(1 << 1)	/* Odd/even parity select */
-#define L4_UART_SBS	(1 << 2)	/* Stop bit select */
-#define L4_UART_DSS	(1 << 3)	/* Data size select */
-#define L4_UART_SCE	(1 << 4)	/* Sample clock rate enable */
-#define L4_UART_RCE	(1 << 5)	/* Receive clk. rate edge select */
-#define L4_UART_TCE	(1 << 6)	/* Transmit clk. rate edge select */
-
-
-/*
- * Bits defined in control register 3.
- */
-#define L4_UART_RXE	(1 << 0)	/* Receiver enable */
-#define L4_UART_TXE	(1 << 1)	/* Transmitter enable */
-#define L4_UART_BRK	(1 << 2)	/* Break */
-#define L4_UART_RIO	(1 << 3)	/* Receive FIFO interrupt enable */
-#define L4_UART_TIE	(1 << 4)	/* Transmit FIFO interrupt enable */
-#define L4_UART_LBM	(1 << 5)	/* Loopback mode */
-
-
-/*
- * Baud rate devisror (contained in control registers 1 and 2).
- */
-#define L4_UART_GET_BRD() 				\
-    ( (((u32_t) L4_UART_UTCR1 & 0x0f) << 8) + 		\
-      (u8_t) L4_UART_UTCR2 )
-
-#define L4_UART_SET_BRD(brd) 				\
-    ( *(u32_t *) L4_UART_UTCR1 = brd & 0xff,		\
-      *(u32_t *) L4_UART_UTCR2 = (brd >> 8) & 0x0f )	\
-
-#define L4_BRD_TO_BAUDRATE(brd)		(3686400 / ((brd+1) << 4))
-#define L4_BAUDRATE_TO_BRD(rate)	(3686400 / (rate << 4) - 1)
-
-
-/*
- * Bits defined in status register 0.
- */
-#define L4_UART_TFS	(1 << 0)	/* Transmit FIFO service req. */
-#define L4_UART_RFS	(1 << 1)	/* Receive FIFO service req. */
-#define L4_UART_RID	(1 << 2)	/* Receiver idle */
-#define L4_UART_RBB	(1 << 3)	/* Receiver begin of break */
-#define L4_UART_REB	(1 << 4)	/* Receiver end of break */
-#define L4_UART_EIF	(1 << 5)	/* Error in FIFO */
-
-
-/*
- * Bits defined in status register 0.
- */
-#define L4_UART_TBY	(1 << 0)	/* Transmitter busy flag */
-#define L4_UART_RNE	(1 << 1)	/* Receiver FIFO not empty */
-#define L4_UART_TNF	(1 << 2)	/* Transmitter FIFO not full */
-#define L4_UART_PRE	(1 << 3)	/* Parity error */
-#define L4_UART_FRE	(1 << 4)	/* Framing error */
-#define L4_UART_ROR	(1 << 5)	/* Receive FIFO overrun */
-
-
-#endif /* !__PLATFORM__SA1100__UART_H__ */
diff --git a/kernel/kdb/platform/sb1/Makeconf b/kernel/kdb/platform/sb1/Makeconf
deleted file mode 100644
index 41a62052..00000000
--- a/kernel/kdb/platform/sb1/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += kdb/platform/sb1/io.cc
diff --git a/kernel/kdb/platform/sb1/io.cc b/kernel/kdb/platform/sb1/io.cc
deleted file mode 100644
index ad646e94..00000000
--- a/kernel/kdb/platform/sb1/io.cc
+++ /dev/null
@@ -1,125 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2004,  University of New South Wales
- *                
- * File path:     kdb/platform/sb1/io.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: io.cc,v 1.7 2004/03/17 22:36:04 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_PLAT(sb1250_uart.h)
-
-#include <kdb/console.h>
-#include <debug.h>
-
-#define CKSEG1      0xffffffffa0000000
-#define PHYS_TO_CKSEG1(n)     (CKSEG1 | (n))
-
-#ifndef BAUD_RATE
-#define	BAUD_RATE		115200
-#endif
-
-#define	CLK_DIVISOR		DUART_BAUD_RATE(BAUD_RATE)
-#define	DATA_BITS		DUART_BITS_PER_CHAR_8
-#define	PARITY			DUART_PARITY_MODE_NONE
-#define	STOP_BITS		DUART_STOP_BIT_LEN_1
-
-static void putc_serial (char);
-static char getc_serial (bool);
-static void init_serial (void);
-
-kdb_console_t kdb_consoles[] = {
-    { "serial", &init_serial, &putc_serial, &getc_serial },
-    KDB_NULL_CONSOLE
-};
-
-word_t kdb_current_console = 0;
-
-static void 
-duart_out(unsigned long reg, unsigned long val)
-{
-    *((volatile unsigned long *)PHYS_TO_CKSEG1(DUART_REG_PHYS(0,reg))) = val;
-}
-
-static unsigned long 
-duart_in(unsigned long reg) 
-{
-    return *((volatile unsigned long *)PHYS_TO_CKSEG1(DUART_REG_PHYS(0,reg)));
-}
-
-static void init_serial (void)
-{
-    /* Initialise duart */
-    /* FIXME -- check/test this code */
-
-#if 1
-    (*(volatile unsigned long *)PHYS_TO_CKSEG1(0x10020098)) = 0x0;
-    __asm__("sync\n");
-    (*(volatile unsigned long *)PHYS_TO_CKSEG1(0x10020098)) = 0x2;
-    __asm__("sync\n");
-    (*(volatile unsigned long *)PHYS_TO_CKSEG1(0x10020078)) = ~(0ULL);
-    __asm__("sync\n");
-    (*(volatile unsigned long *)PHYS_TO_CKSEG1(0x10020098)) = 0x3;
-    __asm__("sync\n");
-    
-    duart_out(DUART_MODE_REG_1, DATA_BITS | PARITY);
-    duart_out(DUART_MODE_REG_2, STOP_BITS);
-    duart_out(DUART_CLK_SEL, CLK_DIVISOR);
-
-    duart_out(DUART_CMD, DUART_RX_EN | DUART_TX_EN);
-#endif    
-}
-
-static void putc_serial(char chr)
-{
-    while ((duart_in(DUART_STATUS) & DUART_TX_RDY) == 0);
-    duart_out(DUART_TX_HOLD, chr);
-
-    if (chr == '\n')
-	    putc_serial('\r');
-
-}
-
-static char getc_serial(bool block)
-{
-    if ((duart_in(DUART_STATUS) & DUART_RX_RDY) == 0)
-    {
-	if (!block)
-	    return -1;
-	while ((duart_in(DUART_STATUS) & DUART_RX_RDY) == 0) ;
-    }
-    return duart_in(DUART_RX_HOLD);
-}
-
-
-#if defined(CONFIG_KDB_BREAKIN)
-void kdebug_check_breakin (void)
-{
-    if ((duart_in(DUART_STATUS) & DUART_RX_RDY) != 0)
-	if ((char)duart_in(DUART_RX_HOLD) == 27)
-	    enter_kdebug("breakin");
-}
-#endif
diff --git a/kernel/kdb/platform/u4600/Makeconf b/kernel/kdb/platform/u4600/Makeconf
deleted file mode 100644
index f181f7be..00000000
--- a/kernel/kdb/platform/u4600/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += kdb/platform/u4600/serial.cc kdb/platform/u4600/z85230.cc
diff --git a/kernel/kdb/platform/u4600/serial.cc b/kernel/kdb/platform/u4600/serial.cc
deleted file mode 100644
index 8e8d9a49..00000000
--- a/kernel/kdb/platform/u4600/serial.cc
+++ /dev/null
@@ -1,139 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1997, 1998, 2003-2004,  University of New South Wales
- *                
- * File path:     kdb/platform/u4600/serial.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: serial.cc,v 1.9 2004/03/17 22:36:04 cvansch Exp $
- *                
- ********************************************************************/
-#include "z85230.h"
-#include INC_ARCH(addrspace.h)
-#include INC_GLUE(schedule.h)
-
-#include <kdb/console.h>
-#include <debug.h>
-
-extern int  pzscc(int,char*,int,int);
-int devinit();
-
-//static
-void putc_serial (char);
-static char getc_serial (bool);
-static void init_serial (void);
-# if defined(CONFIG_KDB_BREAKIN)
-void kdebug_check_breakin (void);
-#endif
-
-kdb_console_t kdb_consoles[] = {
-    { "serial", &init_serial, &putc_serial, &getc_serial },
-    KDB_NULL_CONSOLE
-};
-
-word_t kdb_current_console = 0;
-
-#define CS1_BASE	0x1c800000
-#define Z85230_BASE	(CS1_BASE | 0x30)
-#define MPSC_BASE	Z85230_BASE
-
-#define PHYS_TO_CKSEG1(n)    (CKSEG1 | (n))
-#define PHYS_TO_K1(x) PHYS_TO_CKSEG1(x)
-
-typedef struct ConfigEntry {
-    addr_t devinfo;
-    int chan;
-    int (*handler)(int,char*,int,int);
-    int rxqsize;
-    int brate;
-} ConfigEntry;
-
-ConfigEntry     ConfigTable[] =
-{
-    /* p4000 has swapped mpsc ports */
-    {(addr_t)PHYS_TO_K1(MPSC_BASE+2), 0, pzscc, 256, 17},
-    {(addr_t)PHYS_TO_K1(MPSC_BASE+0), 1, pzscc, 256, 17},
-    {0}
-};
-
-//static
-void putc_serial(char c)
-{
-    ConfigEntry *q = &ConfigTable[0];
-
-    /* wait to transmit */
-    while(!(*q->handler) (OP_TXRDY, (char*)q->devinfo, 0, 0));
-	pzscc( OP_TX, (char*)q->devinfo, 0, c);
-    if (c == '\n')
-	putc_serial('\r');
-}
-
-static char getc_serial(bool block)
-{
-    ConfigEntry *q = &ConfigTable[0];
-
-    /* Data ready? */
-    if (!(*q->handler) (OP_RXRDY, (char*)q->devinfo, 0, 0))
-    {
-	if (!block)
-	    return -1;
-	/* wait to receive */
-	while(!(*q->handler) (OP_RXRDY, (char*)q->devinfo, 0, 0));
-    }
-
-    return pzscc( OP_RX, (char*)q->devinfo, 0,0);
-}
-
-static void init_serial ()
-{
-/*
-    int             i, brate;
-    ConfigEntry    *q;
-
-    asm("break;\n\t");
-
-    for (i = 0; ConfigTable[i].devinfo; i++) {
-	q = &ConfigTable[i];
-	if (q->chan == 0)
-	{
-	    (*q->handler) (OP_INIT, (char*)q->devinfo, 0, 0);
-	}
-	brate = q->brate;
-	(*q->handler) (OP_BAUD, (char*)q->devinfo, q->chan, brate);
-    }
-    return (0);*/
-}
-
-#if defined(CONFIG_KDB_BREAKIN)
-void kdebug_check_breakin (void)
-
-{
-    ConfigEntry    *q;
-    q = &ConfigTable[0];
-
-    if ((*q->handler) (OP_RXRDY, (char*)q->devinfo, 0, 0))
-	if (pzscc( OP_RX, (char*)q->devinfo, 0,0) == 27)
-	    enter_kdebug("breakin");
-}
-#endif
diff --git a/kernel/kdb/platform/u4600/z85230.cc b/kernel/kdb/platform/u4600/z85230.cc
deleted file mode 100644
index 068ee94b..00000000
--- a/kernel/kdb/platform/u4600/z85230.cc
+++ /dev/null
@@ -1,170 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1997, 1998, 2003,  University of New South Wales
- *                
- * File path:     kdb/platform/u4600/z85230.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: z85230.cc,v 1.3 2003/09/24 19:05:23 skoglund Exp $
- *                
- ********************************************************************/
-#include "z85230.h"
-
-typedef struct zsccdev *zsccdp;
-
-#define ZSCCCLK	14745600	 /* clock rate 14.7456 MHz */
-
-void wbflush(void)
-{
-    asm ("sync;\n\t");
-}
-
-static const int zsccbrtc[] = {
-    -1,
-    BRTC (ZSCCCLK, 50),
-    BRTC (ZSCCCLK, 75),
-    BRTC (ZSCCCLK, 110),
-    BRTC (ZSCCCLK, 134),
-    BRTC (ZSCCCLK, 150),
-    BRTC (ZSCCCLK, 200),
-    BRTC (ZSCCCLK, 300),
-    BRTC (ZSCCCLK, 600),
-    BRTC (ZSCCCLK, 1200),
-    BRTC (ZSCCCLK, 1800),
-    BRTC (ZSCCCLK, 2400),
-    BRTC (ZSCCCLK, 4800),
-    BRTC (ZSCCCLK, 9600),
-    BRTC (ZSCCCLK, 19200),
-    BRTC (ZSCCCLK, 38400)};
-
-
-static void
-zsccputreg (volatile zsccdp dp, unsigned char reg, unsigned char val)
-{
-  if (reg != zWR0) {
-      dp->ucmd = zWR0_REG | reg; 
-      wbflush ();
-  }
-  dp->ucmd = val;
-  wbflush ();
-}
-
-static unsigned char
-zsccgetreg (volatile zsccdp dp, unsigned char reg)
-{
-  if (reg != zRR0) {
-    dp->ucmd = zWR0_REG | reg;
-    wbflush ();
-  }
-  return (dp->ucmd);
-}
-
-static int
-zsccinit (volatile zsccdp dp)
-{
-    volatile zsccdp dpa, dpb;
-
-    dpa = dp; dpb = dpa - 1;
-
-    /* single read to get in known state */
-    (void) dpa->ucmd;
-    (void) dpb->ucmd;
-
-    /* global initialisation */
-    
-    zsccputreg(dpa, zWR9, zWR9_HARDRESET);
-
-    return 0;
-}
-
-
-static void
-zsccflush (volatile zsccdp dp)
-{
-    /* wait for Tx fifo to drain */
-    int timeout = 10;
-    while (!(zsccgetreg (dp, zRR0) & zRR0_TXEMPTY))
-	if (--timeout == 0)
-	    break;
-}
-
-
-static int
-zsccprogram (volatile zsccdp dp, int baudrate)
-{
-    zsccflush (dp);
-
-    baudrate &= 17;
-    if (baudrate == 0)
-      return 1;
-    
-    /*
-     * See the zscc manual for details.
-     */
-
-    zsccputreg(dp, zWR4, zWR4_1STOPBIT | zWR4_CLK);
-    zsccputreg(dp, zWR10, zWR10_NRZ);
-    
-    zsccputreg(dp, zWR14, zWR14_NOP); /* stop BRG */
-    zsccputreg(dp, zWR11, zWR11_TRXCOUT| zWR11_TRXCBRG| zWR11_TCLKBRG | zWR11_RCLKBRG);
-    zsccputreg(dp, zWR12,  zsccbrtc [baudrate] & 0xff);
-    zsccputreg(dp, zWR13,  (zsccbrtc [baudrate] >> 8) & 0xff);
-    
-    zsccputreg(dp, zWR14, zWR14_BRGENABLE | zWR14_BRGSRC );
-    
-    zsccputreg(dp, zWR3, zWR3_RXENABLE | zWR3_RX8BITCHAR);
-    zsccputreg(dp, zWR5, zWR5_TXENABLE| zWR5_RTS | zWR5_TX8BITCHAR | zWR5_DTR);
-    return 0;
-}
-
-
-int pzscc (int op, char *dat, int chan, int data)
-{
-    volatile zsccdp dp = (zsccdp) dat;
-
-    switch (op) {
-    case OP_INIT:
-	return zsccinit (dp);
-    case OP_BAUD:
-	return zsccprogram (dp, data);
-    case OP_TXRDY:
-	return (dp->ucmd & zRR0_TXEMPTY);
-    case OP_TX:
-	dp->udata = data; wbflush ();
-	break;
-    case OP_RXRDY:
-	return (dp->ucmd & zRR0_RXAVAIL);
-    case OP_RX:
-	return (dp->udata ); 
-    case OP_FLUSH:
-	zsccflush (dp);
-	break;
-    case OP_RXSTOP:
-	/* rx flow control */
-	zsccputreg (dp, zWR5, zWR5_TXENABLE| zWR5_TX8BITCHAR | zWR5_DTR | 
-		    (data ? 0 : zWR5_RTS));
-	break;
-    }
-    return 0;
-}
diff --git a/kernel/kdb/platform/u4600/z85230.h b/kernel/kdb/platform/u4600/z85230.h
deleted file mode 100644
index 57a0beb4..00000000
--- a/kernel/kdb/platform/u4600/z85230.h
+++ /dev/null
@@ -1,223 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1997, 1998, 2003,  University of New South Wales
- *                
- * File path:     kdb/platform/u4600/z85230.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: z85230.h,v 1.3 2003/09/24 19:05:23 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __KDB__PLATFORM__U4600__Z85230_H__
-#define __KDB__PLATFORM__U4600__Z85230_H__
-
-/****************************************************************************
- * Register definitions for z85230. See data book for more information
- ****************************************************************************/
-
-#ifndef __ASSEMBLER__
-struct zsccdev {
-  volatile unsigned char		ucmd;
-  volatile unsigned char		udata;
-};
-#endif
-
-#ifndef ZSCCX
-#define ZSCCX 16		/* default to 16X clocking */
-#define zWR4_CLK  zWR4_X16CLK 
-#endif
-
-/* convert baudrate into a value for the BRG */
-#define BRTC(clk, brate) (((clk) / (2*(brate)*ZSCCX)) - 2)
-
-#ifdef __ASSEMBLER__
-/* offsets from usart base for usart registers */
-#define CMD	0
-#define DATA	1
-#endif
-
-
-#define zWR0    0               /* reg pointers and various init */
-#define zWR1    1               /* Tx and Rx int enables, WAIT/DMA */
-#define zWR2    2               /* interupt vectors */
-#define zWR3    3               /* Rx params and control modes */
-#define zWR4    4               /* Tx and Rx modes and params */
-#define zWR5    5               /* Tx params and control modes */
-#define zWR6    6               /* Sync Char or SDLC address */
-#define zWR7    7               /* Sync Char or SDLC flag */
-#define zWR7p   7               /* Extended Feature and FIFO control */
-#define zWR8    8               /* Tx buffer */
-#define zWR9    9               /* Master Int control and reset commands */
-#define zWR10   10              /* Misc TX and RX control bits */
-#define zWR11   11              /* clock mode controls for RX and TX */
-#define zWR12   12              /* Low byte of baud rate gen */
-#define zWR13   13              /* high byte of baud rate gen */
-#define zWR14   14              /* Misc control bits */
-#define zWR15   15              /* External status int enable control */
-
-#define zRR0    0               /* Tx and Rx buffer stat and extern stat */
-#define zRR1    1               /* Special Rx Condition status */
-#define zRR2B   2               /* modified Int vector */
-#define zRR2A   2               /* unmodified int vector */
-#define zRR3A   3               /* Int pending bits */
-#define zRR4    4               /* WR4 */
-#define zRR5    5               /* WR5 */
-#define zRR6    6               /* SDLC FIFO count, lower byte */
-#define zRR7    7               /* SDLC FIFO count and status */
-#define zRR8    8               /* Rx buffer */
-#define zRR9    9               /* WR3 */
-#define zRR10   10              /* Misc status bits */
-#define zRR11   11              /* WR10 */
-#define zRR12   12              /* Lower byte of baud rate gen */
-#define zRR13   13              /* Upper byte of baud rate gen */
-#define zRR14   14              /* Extended feature and FIFO control */
-#define zRR15   15              /* External status int info */
-
-
-#define zWR0_NOP             0000
-#define zWR0_REG             0000
-#define zWR0_RESETTXLATCH    0300
-#define zWR0_RESETTXCRC      0200
-#define zWR0_RESETRXCRC      0100
-#define zWR0_RESETIUS        0070
-#define zWR0_ERRORRESET      0060
-#define zWR0_RESETTXINT      0050
-#define zWR0_INTNEXTCHAR     0040
-#define zWR0_SENDABORT       0030
-#define zWR0_RESETINT        0020
-#define zWR0_POINTHIGH       0010
-
-#define zWR3_RXENABLE        0001
-#define zWR3_SYNCINHIBIT     0002
-#define zWR3_ADDRMODE        0004
-#define zWR3_RXCRCENABLE     0010
-#define zWR3_HUNTMODE        0020
-#define zWR3_AUTOENABLE      0040
-#define zWR3_RX5BITCHAR      0000
-#define zWR3_RX6BITCHAR      0100
-#define zWR3_RX7BITCHAR      0200
-#define zWR3_RX8BITCHAR      0300
-
-#define zWR4_PARENABLE       0001
-#define zWR4_PAREVEN         0002
-#define zWR4_PARODD          0000
-#define zWR4_SYNCENABLE      0000
-#define zWR4_1STOPBIT        0004
-#define zWR4_15STOPBIT       0010
-#define zWR4_2STOPBIT        0014
-#define zWR4_8BITSYNC        0000
-#define zWR4_16BITSYNC       0020
-#define zWR4_SDLCMODE        0040
-#define zWR4_EXTSYNC         0060
-#define zWR4_X1CLK           0000
-#define zWR4_X16CLK          0100
-#define zWR4_X32CLK          0200
-#define zWR4_X64CLK          0300
-
-#define zWR5_TXCRC           0001
-#define zWR5_RTS             0002
-#define zWR5_SDLCCRC         0004
-#define zWR5_TXENABLE        0010
-#define zWR5_SENDBREAK       0020
-#define zWR5_TX5BITCHAR      0000
-#define zWR5_TX6BITCHAR      0040
-#define zWR5_TX7BITCHAR      0100
-#define zWR5_TX8BITCHAR      0140
-#define zWR5_DTR             0200
-
-#define zWR9_HARDRESET       0300
-#define zWR9_ARESET          0200
-#define zWR9_BRESET          0100
-#define zWR9_INTACK          0040
-#define zWR9_STATUS          0020
-#define zWR9_MIE             0010
-#define zWR9_DLC             0004
-#define zWR9_NV              0002
-#define zWR9_VIS             0001
-
-#define zWR10_8BITSYNC       0001
-#define zWR10_LOOPMODE       0002
-#define zWR10_ABORT          0004
-#define zWR10_MARK           0010
-#define zWR10_GOACTIVE       0020
-#define zWR10_NRZ            0000
-#define zWR10_NRZI           0040
-#define zWR10_FM1            0100
-#define zWR10_FM0            0140
-#define zWR10_CRCPRESET      0200
-
-#define zWR11_TRXCXTAL       0000
-#define zWR11_TRXCTCLK       0001
-#define zWR11_TRXCBRG        0002
-#define zWR11_TRXCDPLL       0003
-#define zWR11_TRXCOUT        0004
-#define zWR11_TCLKRTXC       0000
-#define zWR11_TCLKTRXC       0010
-#define zWR11_TCLKBRG        0020
-#define zWR11_TCLKDPLL       0030
-#define zWR11_RCLKRTXC       0000
-#define zWR11_RCLKTRXC       0040
-#define zWR11_RCLKBRG        0100
-#define zWR11_RCLKDPLL       0140
-#define zWR11_RTXCXTAL       0200
-
-#define zWR14_BRGENABLE      0001
-#define zWR14_BRGSRC         0002
-#define zWR14_DTRFUNC        0004
-#define zWR14_AUTOECHO       0010
-#define zWR14_LOOPBACK       0020
-#define zWR14_NOP            0000
-#define zWR14_SEARCH         0040
-#define zWR14_RESETCLOCK     0100
-#define zWR14_DISABLEDPLL    0140
-#define zWR14_SRCBRG         0200
-#define zWR14_SRCRTxC        0240
-#define zWR14_FMMODE         0300
-#define zWR14_NRZIMODE       0340
-
-#define zRR0_RXAVAIL         0001
-#define zRR0_ZEROCOUNT       0002
-#define zRR0_TXEMPTY         0004
-#define zRR0_DCD             0010
-#define zRR0_SYNCHUNT        0020
-#define zRR0_CTS             0040
-#define zRR0_TXUNDERRUN      0100
-#define zRR0_BREAKABORT      0200
-
-/* operation codes for device specific driver */
-/* operation codes for device specific driver */
-#define OP_INIT         1
-#define OP_TX           2
-#define OP_RX           3
-#define OP_RXRDY        4
-#define OP_TXRDY        5
-#define OP_BAUD         6
-#define OP_RXSTOP       7
-#define OP_FLUSH        8
-#define OP_RESET        9
-#define OP_OPEN         10
-#define OP_CLOSE        11
-
-#endif /* !__KDB__PLATFORM__U4600__Z85230_H__ */
diff --git a/kernel/kdb/platform/vr41xx/Makeconf b/kernel/kdb/platform/vr41xx/Makeconf
deleted file mode 100644
index e9255ef2..00000000
--- a/kernel/kdb/platform/vr41xx/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += kdb/platform/vr41xx/serial.cc
diff --git a/kernel/kdb/platform/vr41xx/serial.cc b/kernel/kdb/platform/vr41xx/serial.cc
deleted file mode 100644
index 35259adc..00000000
--- a/kernel/kdb/platform/vr41xx/serial.cc
+++ /dev/null
@@ -1,142 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     kdb/platform/vr41xx/serial.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: serial.cc,v 1.4 2004/06/04 06:43:14 cvansch Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/console.h>
-
-#define CKSEG1          0xffffffffa0000000
-
-#define SIU_BASE	0x0c000010      /* serial i/o unit */
-
-#define SERIAL_NAME	"serial"
-
-/****************************************************************************
- *
- *    Serial console support
- *
- ****************************************************************************/
-
-struct serial_ns16550 {
-    /* this struct must be packed */
-    unsigned char rbr;  /* 0 */
-    unsigned char ier;  /* 1 */
-    unsigned char fcr;  /* 2 */
-    unsigned char lcr;  /* 3 */
-    unsigned char mcr;  /* 4 */
-    unsigned char lsr;  /* 5 */
-    unsigned char msr;  /* 6 */
-    unsigned char scr;  /* 7 */
-};
-
-#define thr rbr
-#define iir fcr
-#define dll rbr
-#define dlm ier
-#define dlab lcr
-
-#define LSR_DR		0x01	/* Data ready */
-#define LSR_OE		0x02	/* Overrun */
-#define LSR_PE		0x04	/* Parity error */
-#define LSR_FE		0x08	/* Framing error */
-#define LSR_BI		0x10	/* Break */
-#define LSR_THRE	0x20	/* Xmit holding register empty */
-#define LSR_TEMT	0x40	/* Xmitter empty */
-#define LSR_ERR		0x80	/* Error */
-
-static volatile struct serial_ns16550 *serial_regs;
-
-void init_serial_console()
-{
-    serial_regs = (struct serial_ns16550 *)(CKSEG1 | SIU_BASE);
-
-#if 0
-    serial_regs->lcr = 0x00;
-    serial_regs->ier = 0xFF;
-    serial_regs->ier = 0x00;
-    serial_regs->lcr = 0x80;	/* Access baud rate */
-    serial_regs->dll = 12;  	/* 1 = 115200,  2 = 57600, 3 = 38400, 12 = 9600 baud */
-    serial_regs->dlm = 0;   	/* dll >> 8 which should be zero for fast rates; */
-#endif
-
-    printf( "Opened serial port at %p\n", serial_regs );
-}
-
-static void putc_serial( char c )
-{
-    if ( serial_regs )
-    {
-	while (( serial_regs->lsr & LSR_THRE ) == 0 );
-
-	serial_regs->thr = c;
-	if ( c == '\n' )
-	    putc_serial( '\r' );
-    }
-}
-
-static char getc_serial( bool block )
-{
-    if ( serial_regs )
-    {
-	if ((( serial_regs->lsr & LSR_DR ) == 0 ) && (!block) )
-	    return -1;
-
-	while (( serial_regs->lsr & LSR_DR ) == 0 );
-	return serial_regs->rbr;
-    }
-    return 0;
-}
-
-
-#if defined(CONFIG_KDB_BREAKIN)
-void kdebug_check_breakin (void)
-
-{
-    if (( serial_regs->lsr & LSR_DR ) != 0 )
-    {
-	if (serial_regs->rbr == 27)
-	    enter_kdebug("breakin");
-    }
-}
-#endif
-
-/****************************************************************************
- *
- *    Console registration
- *
- ****************************************************************************/
-
-kdb_console_t kdb_consoles[] = {
-    { SERIAL_NAME, &init_serial_console, &putc_serial, &getc_serial},
-    KDB_NULL_CONSOLE
-};
-
-word_t kdb_current_console = 0;
diff --git a/kernel/src/arch/alpha/Makeconf b/kernel/src/arch/alpha/Makeconf
deleted file mode 100644
index 7044cb90..00000000
--- a/kernel/src/arch/alpha/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/arch/alpha/, switch.S alpha-divrem.S head.S console.cc)
diff --git a/kernel/src/arch/alpha/alpha-divrem.S b/kernel/src/arch/alpha/alpha-divrem.S
deleted file mode 100644
index 06e614ef..00000000
--- a/kernel/src/arch/alpha/alpha-divrem.S
+++ /dev/null
@@ -1,598 +0,0 @@
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-#include INC_ARCH(pal.h)
-	
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * __divqu		name of function to generate
- * div		div=div: t10 / t11 -> t12; div=rem: t10 % t11 -> t12
- * false		false=true: signed; false=false: unsigned
- * 64	total number of bits
- */
-	
-/*
- * LEAF
- *      Declare a global leaf function.
- *      A leaf function does not call other functions AND does not
- *      use any register that is callee-saved AND does not modify
- *      the stack pointer.
- */
-#define LEAF(_name_,_n_args_)                                   \
-        .globl  _name_;                                         \
-        .ent    _name_ 0;                                       \
-_name_:;                                                        \
-        .frame  sp,0,ra
-
-/*
- * END
- *      Function delimiter
- */
-#define END(_name_)                                             \
-	.end    _name_
-
-#define ra $26
-#define sp $30
-#define a0 $16
-#define t0 $1
-#define t1 $2
-#define t2 $3
-#define t3 $4		
-#define t9 $23	
-#define t10 $24	
-#define t11 $25
-#define t12 $27
-#define zero $31
-
-LEAF(__divqu, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	t0, 0(sp)
-	stq	t1, 8(sp)
-	stq	t2, 16(sp)
-	stq	t3, 24(sp)
-
-	stq	t10, 40(sp)
-	stq	t11, 48(sp)
-	mov	zero, t12			/* Initialize result to zero */
-
-
-
-
-	/* kill the special cases. */
-	beq	t11, L0dotrap			/* division by zero! */
-
-	cmpult	t10, t11, t2			/* t10 < t11? */
-	/* t12 is already zero, from above.  t10 is untouched. */
-	bne	t2, L0ret_result
-
-	cmpeq	t10, t11, t2			/* t10 == t11? */
-	cmovne	t2, 1, t12
-	cmovne	t2, zero, t10
-	bne	t2, L0ret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-L0Bbits:
-	ldiq	t3, 1				/* t1 = 0; t0 = 1<<64-1 */
-	mov	zero, t1
-	sll	t3, 64-1, t0
-L0Bloop:
-	and	t11, t0, t2			/* if bit in t11 is set, done. */
-	bne	t2, L0Abits
-	addq	t1, 1, t1				/* increment t1,  bit */
-	srl	t0, 1, t0
-	cmplt	t1, 64-1, t2		/* if t1 leaves one bit, done. */
-	bne	t2, L0Bloop
-
-L0Abits:
-	beq	t1, L0dodiv			/* If t1 = 0, divide now.  */
-	ldiq	t3, 1				/* t0 = 1<<64-1 */
-	sll	t3, 64-1, t0
-
-L0Aloop:
-	and	t10, t0, t2			/* if bit in t10 is set, done. */
-	bne	t2, L0dodiv
-	subq	t1, 1, t1				/* decrement t1,  bit */
-	srl     t0, 1, t0 
-	bne	t1, L0Aloop			/* If t1 != 0, loop again */
-
-L0dodiv:
-	sll	t11, t1, t11				/* t11 <<= i */
-	ldiq	t3, 1
-	sll	t3, t1, t0
-
-L0divloop:
-	cmpult	t10, t11, t2
-	or	t12, t0, t3
-	cmoveq	t2, t3, t12
-	subq	t10, t11, t3
-	cmoveq	t2, t3, t10
-	srl	t0, 1, t0	
-	srl	t11, 1, t11
-	beq	t10, L0ret_result
-	bne	t0, L0divloop
-
-L0ret_result:
-
-
-
-	ldq	t0, 0(sp)
-	ldq	t1, 8(sp)
-	ldq	t2, 16(sp)
-	ldq	t3, 24(sp)
-
-	ldq	t10, 40(sp)
-	ldq	t11, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-L0dotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-
-	br	zero, L0ret_result
-
-END(__divqu)
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * __divlu		name of function to generate
- * div		div=div: t10 / t11 -> t12; div=rem: t10 % t11 -> t12
- * false		false=true: signed; false=false: unsigned
- * 32	total number of bits
- */
-
-LEAF(__divlu, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	t0, 0(sp)
-	stq	t1, 8(sp)
-	stq	t2, 16(sp)
-	stq	t3, 24(sp)
-
-	stq	t10, 40(sp)
-	stq	t11, 48(sp)
-	mov	zero, t12			/* Initialize result to zero */
-
-
-
-	/*
-	 * Clear the top 32 bits of each operand, as they may
-	 * sign extension (if negated above), or random junk.
-	 */
-	zap	t10, 0xf0, t10
-	zap	t11, 0xf0, t11
-
-
-	/* kill the special cases. */
-	beq	t11, L1dotrap			/* division by zero! */
-
-	cmpult	t10, t11, t2			/* t10 < t11? */
-	/* t12 is already zero, from above.  t10 is untouched. */
-	bne	t2, L1ret_result
-
-	cmpeq	t10, t11, t2			/* t10 == t11? */
-	cmovne	t2, 1, t12
-	cmovne	t2, zero, t10
-	bne	t2, L1ret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-L1Bbits:
-	ldiq	t3, 1				/* t1 = 0; t0 = 1<<32-1 */
-	mov	zero, t1
-	sll	t3, 32-1, t0
-L1Bloop:
-	and	t11, t0, t2			/* if bit in t11 is set, done. */
-	bne	t2, L1Abits
-	addq	t1, 1, t1				/* increment t1,  bit */
-	srl	t0, 1, t0
-	cmplt	t1, 32-1, t2		/* if t1 leaves one bit, done. */
-	bne	t2, L1Bloop
-
-L1Abits:
-	beq	t1, L1dodiv			/* If t1 = 0, divide now.  */
-	ldiq	t3, 1				/* t0 = 1<<32-1 */
-	sll	t3, 32-1, t0
-
-L1Aloop:
-	and	t10, t0, t2			/* if bit in t10 is set, done. */
-	bne	t2, L1dodiv
-	subq	t1, 1, t1				/* decrement t1,  bit */
-	srl     t0, 1, t0 
-	bne	t1, L1Aloop			/* If t1 != 0, loop again */
-
-L1dodiv:
-	sll	t11, t1, t11				/* t11 <<= i */
-	ldiq	t3, 1
-	sll	t3, t1, t0
-
-L1divloop:
-	cmpult	t10, t11, t2
-	or	t12, t0, t3
-	cmoveq	t2, t3, t12
-	subq	t10, t11, t3
-	cmoveq	t2, t3, t10
-	srl	t0, 1, t0	
-	srl	t11, 1, t11
-	beq	t10, L1ret_result
-	bne	t0, L1divloop
-
-L1ret_result:
-
-
-
-	ldq	t0, 0(sp)
-	ldq	t1, 8(sp)
-	ldq	t2, 16(sp)
-	ldq	t3, 24(sp)
-
-	ldq	t10, 40(sp)
-	ldq	t11, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-L1dotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-
-	br	zero, L1ret_result
-
-END(__divlu)
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * __remlu		name of function to generate
- * rem		rem=div: t10 / t11 -> t12; rem=rem: t10 % t11 -> t12
- * false		false=true: signed; false=false: unsigned
- * 32	total number of bits
- */
-
-LEAF(__remlu, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	t0, 0(sp)
-	stq	t1, 8(sp)
-	stq	t2, 16(sp)
-	stq	t3, 24(sp)
-
-	stq	t10, 40(sp)
-	stq	t11, 48(sp)
-	mov	zero, t12			/* Initialize result to zero */
-
-
-
-	/*
-	 * Clear the top 32 bits of each operand, as they may
-	 * sign extension (if negated above), or random junk.
-	 */
-	zap	t10, 0xf0, t10
-	zap	t11, 0xf0, t11
-
-
-	/* kill the special cases. */
-	beq	t11, L2dotrap			/* division by zero! */
-
-	cmpult	t10, t11, t2			/* t10 < t11? */
-	/* t12 is already zero, from above.  t10 is untouched. */
-	bne	t2, L2ret_result
-
-	cmpeq	t10, t11, t2			/* t10 == t11? */
-	cmovne	t2, 1, t12
-	cmovne	t2, zero, t10
-	bne	t2, L2ret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-L2Bbits:
-	ldiq	t3, 1				/* t1 = 0; t0 = 1<<32-1 */
-	mov	zero, t1
-	sll	t3, 32-1, t0
-L2Bloop:
-	and	t11, t0, t2			/* if bit in t11 is set, done. */
-	bne	t2, L2Abits
-	addq	t1, 1, t1				/* increment t1,  bit */
-	srl	t0, 1, t0
-	cmplt	t1, 32-1, t2		/* if t1 leaves one bit, done. */
-	bne	t2, L2Bloop
-
-L2Abits:
-	beq	t1, L2dodiv			/* If t1 = 0, divide now.  */
-	ldiq	t3, 1				/* t0 = 1<<32-1 */
-	sll	t3, 32-1, t0
-
-L2Aloop:
-	and	t10, t0, t2			/* if bit in t10 is set, done. */
-	bne	t2, L2dodiv
-	subq	t1, 1, t1				/* decrement t1,  bit */
-	srl     t0, 1, t0 
-	bne	t1, L2Aloop			/* If t1 != 0, loop again */
-
-L2dodiv:
-	sll	t11, t1, t11				/* t11 <<= i */
-	ldiq	t3, 1
-	sll	t3, t1, t0
-
-L2divloop:
-	cmpult	t10, t11, t2
-	or	t12, t0, t3
-	cmoveq	t2, t3, t12
-	subq	t10, t11, t3
-	cmoveq	t2, t3, t10
-	srl	t0, 1, t0	
-	srl	t11, 1, t11
-	beq	t10, L2ret_result
-	bne	t0, L2divloop
-
-L2ret_result:
-	mov	t10, t12
-
-
-
-	ldq	t0, 0(sp)
-	ldq	t1, 8(sp)
-	ldq	t2, 16(sp)
-	ldq	t3, 24(sp)
-
-	ldq	t10, 40(sp)
-	ldq	t11, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-L2dotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-	mov	zero, t10			/* so that zero will be returned */
-
-	br	zero, L2ret_result
-
-END(__remlu)
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * __remqu		name of function to generate
- * rem		rem=div: t10 / t11 -> t12; rem=rem: t10 % t11 -> t12
- * false		false=true: signed; false=false: unsigned
- * 64	total number of bits
- */
-
-
-LEAF(__remqu, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	t0, 0(sp)
-	stq	t1, 8(sp)
-	stq	t2, 16(sp)
-	stq	t3, 24(sp)
-
-	stq	t10, 40(sp)
-	stq	t11, 48(sp)
-	mov	zero, t12			/* Initialize result to zero */
-
-
-
-
-	/* kill the special cases. */
-	beq	t11, L3dotrap			/* division by zero! */
-
-	cmpult	t10, t11, t2			/* t10 < t11? */
-	/* t12 is already zero, from above.  t10 is untouched. */
-	bne	t2, L3ret_result
-
-	cmpeq	t10, t11, t2			/* t10 == t11? */
-	cmovne	t2, 1, t12
-	cmovne	t2, zero, t10
-	bne	t2, L3ret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-L3Bbits:
-	ldiq	t3, 1				/* t1 = 0; t0 = 1<<64-1 */
-	mov	zero, t1
-	sll	t3, 64-1, t0
-L3Bloop:
-	and	t11, t0, t2			/* if bit in t11 is set, done. */
-	bne	t2, L3Abits
-	addq	t1, 1, t1				/* increment t1,  bit */
-	srl	t0, 1, t0
-	cmplt	t1, 64-1, t2		/* if t1 leaves one bit, done. */
-	bne	t2, L3Bloop
-
-L3Abits:
-	beq	t1, L3dodiv			/* If t1 = 0, divide now.  */
-	ldiq	t3, 1				/* t0 = 1<<64-1 */
-	sll	t3, 64-1, t0
-
-L3Aloop:
-	and	t10, t0, t2			/* if bit in t10 is set, done. */
-	bne	t2, L3dodiv
-	subq	t1, 1, t1				/* decrement t1,  bit */
-	srl     t0, 1, t0 
-	bne	t1, L3Aloop			/* If t1 != 0, loop again */
-
-L3dodiv:
-	sll	t11, t1, t11				/* t11 <<= i */
-	ldiq	t3, 1
-	sll	t3, t1, t0
-
-L3divloop:
-	cmpult	t10, t11, t2
-	or	t12, t0, t3
-	cmoveq	t2, t3, t12
-	subq	t10, t11, t3
-	cmoveq	t2, t3, t10
-	srl	t0, 1, t0	
-	srl	t11, 1, t11
-	beq	t10, L3ret_result
-	bne	t0, L3divloop
-
-L3ret_result:
-	mov	t10, t12
-
-
-
-	ldq	t0, 0(sp)
-	ldq	t1, 8(sp)
-	ldq	t2, 16(sp)
-	ldq	t3, 24(sp)
-
-	ldq	t10, 40(sp)
-	ldq	t11, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-L3dotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-	mov	zero, t10			/* so that zero will be returned */
-
-	br	zero, L3ret_result
-
-END(__remqu)
diff --git a/kernel/src/arch/alpha/asm.h b/kernel/src/arch/alpha/asm.h
deleted file mode 100644
index 8019878e..00000000
--- a/kernel/src/arch/alpha/asm.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     arch/alpha/asm.h
- * Created:       23/07/2002 17:48:20 by Simon Winwood (sjw)
- * Description:   Assembler macros etc. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.7 2004/06/04 02:14:22 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__ASM_H__
-#define __ARCH__ALPHA__ASM_H__
-
-#include INC_ARCH(pal.h)
-	
-#define BEGIN_PROC(name)			\
-    .global name;				\
-    .align 3;					\
-    .ent name;					\
-name:
-
-#define END_PROC(name)				\
-    .end name
-
-
-/* This defines the normal saved register layout.
- *
- * regs 9-15 preserved by C code
- * regs 16-18 saved by PAL-code
- * regs 29-30 saved and set up by PAL-code
- */
-
-#define INTERRUPT_STACK_SIZE  (8 * 26)
-
-#define SAVE_ALL				\
-	subq	$30, INTERRUPT_STACK_SIZE, $30;	\
-        stq     $0, 0($30);			\
-        stq     $1, 8($30);			\
-        stq     $2, 16($30);			\
-        stq     $3, 24($30);			\
-        stq     $4, 32($30);			\
-        stq     $5, 40($30);			\
-        stq     $6, 48($30);			\
-        stq     $7, 56($30);			\
-        stq     $8, 64($30);			\
-        stq     $9, 72($30);			\
-        stq     $10, 80($30);			\
-        stq     $11, 88($30);			\
-        stq     $12, 96($30);			\
-        stq     $13, 104($30);			\
-        stq     $14, 112($30);			\
-        stq     $15, 120($30);			\
-        stq     $19, 128($30);			\
-        stq     $20, 136($30);			\
-        stq     $21, 144($30);			\
-        stq     $22, 152($30);			\
-        stq     $23, 160($30);			\
-        stq     $24, 168($30);			\
-        stq     $25, 176($30);			\
-        stq     $26, 184($30);			\
-        stq     $27, 192($30);			\
-        stq     $28, 200($30);
-	
-#define RESTORE_ALL				\
-        ldq     $0, 0($30);			\
-        ldq     $1, 8($30);			\
-        ldq     $2, 16($30);			\
-        ldq     $3, 24($30);			\
-        ldq     $4, 32($30);			\
-        ldq     $5, 40($30);			\
-        ldq     $6, 48($30);			\
-        ldq     $7, 56($30);			\
-        ldq     $8, 64($30);			\
-        ldq     $9, 72($30);			\
-        ldq     $10, 80($30);			\
-        ldq     $11, 88($30);			\
-        ldq     $12, 96($30);			\
-        ldq     $13, 104($30);			\
-        ldq     $14, 112($30);			\
-        ldq     $15, 120($30);			\
-        ldq     $19, 128($30);			\
-        ldq     $20, 136($30);			\
-        ldq     $21, 144($30);			\
-        ldq     $22, 152($30);			\
-        ldq     $23, 160($30);			\
-        ldq     $24, 168($30);			\
-        ldq     $25, 176($30);			\
-        ldq     $26, 184($30);			\
-        ldq     $27, 192($30);			\
-        ldq     $28, 200($30);			\
-	addq	$30, INTERRUPT_STACK_SIZE, $30
-
-/* Use 6 rather than 7 here as we want correctable errors */
-#define DISABLE_INT(tmp1, tmp2) 		\
-	mov	$16, tmp1;			\
-	mov	$0, tmp2;			\
-	lda	$16, 6;				\
-	call_pal	PAL_swpipl;		\
-	mov	tmp1, $16;			\
-	mov	tmp2, $0
-
-#define DISABLE_INT_NOSAVE			\
-	lda	$16, 6;				\
-	call_pal	PAL_swpipl
-
-#endif /* __ARCH__ALPHA__ASM_H__ */
diff --git a/kernel/src/arch/alpha/console.cc b/kernel/src/arch/alpha/console.cc
deleted file mode 100644
index 5c8056ab..00000000
--- a/kernel/src/arch/alpha/console.cc
+++ /dev/null
@@ -1,96 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/console.cc
- * Description:   Console remapping routines 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: console.cc,v 1.7 2004/08/25 07:11:21 awiggins Exp $
- *                
- ********************************************************************/
-
-#include INC_API(types.h)
-#include INC_API(space.h)
-#include INC_ARCH(hwrpb.h)
-#include INC_ARCH(pgent.h)
-#include INC_ARCH(console.h)
-
-#define INIT_TEXT  SECTION(".init.text")
-
-
-extern "C" void fixup(word_t base_va, word_t hwrpb_va);
-
-void update_hwrpb_checksum(struct hwrpb *hwrpb)
-{
-    word_t *p, sum;
-    unsigned int i;
-
-    for (i = 0, p = (word_t *) hwrpb, sum = 0;
-	 i < (offsetof(struct hwrpb, rpb_checksum) / sizeof (word_t));
-	 i++, p++)
-	sum += *p;
-
-    hwrpb->rpb_checksum = sum;
-}
-
-
-/* Insert mappings into the kernel's page table to cover the console area.  Note
- * that we are still in the initial AS.
- */
-void INIT_TEXT remap_console(void)
-{
-    struct vf_map *vf;
-    word_t base_va = CONSOLE_AREA_START + ALPHA_PAGE_SIZE;
-
-    /* Move HWRPB and CRB */
-    PAL::wrfen(1); // Required for M5 simulators console.
-    fixup(base_va, CONSOLE_AREA_START); 
-    PAL::wrfen(0);
-
-    /* Map HWRPB */
-    get_kernel_space()->add_mapping((addr_t) CONSOLE_AREA_START, (addr_t) INIT_HWRPB->rpb_phys, pgent_t::size_base, true, true);
-    struct crb *crb = (struct crb *) phys_to_virt((addr_t) (INIT_HWRPB->rpb_phys + INIT_HWRPB->rpb_crb_off));
-    /* Map CRB after HWRPB */
-    word_t va = base_va;
-
-    for(unsigned int i = 0; i < crb->crb_map_cnt; i++) {
-	vf = &crb->map[i];
-	vf->va = (word_t) va;
-	for(unsigned int j = 0; j < vf->count; j++) {
-	    get_kernel_space()->add_mapping((addr_t) va, (addr_t) (vf->pa + (j << ALPHA_PAGE_BITS)), pgent_t::size_base, true, true);
-	    va += ALPHA_PAGE_SIZE;
-	}
-    }
-
-    /* Update DISPATCH and FIXUP */
-    vf = &crb->map[0];
-    crb->crb_v_dispatch = (struct crd *) ((word_t) crb->crb_p_dispatch - vf->pa + vf->va);
-    
-    crb->crb_v_fixup = (struct crd *) ((word_t) crb->crb_p_fixup - vf->pa + vf->va);
-
-    /* Update VPTB */
-    INIT_HWRPB->rpb_vptb = VLPT_AREA_START;
-    update_hwrpb_checksum(INIT_HWRPB);
-
-}
diff --git a/kernel/src/arch/alpha/console.h b/kernel/src/arch/alpha/console.h
deleted file mode 100644
index 8692e0ad..00000000
--- a/kernel/src/arch/alpha/console.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     arch/alpha/console.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: console.h,v 1.4 2003/09/24 19:04:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__CONSOLE_H__
-#define __ARCH__ALPHA__CONSOLE_H__
-
-/*
- * Console callback routine numbers
- */
-#define CCB_GETC		0x01
-#define CCB_PUTS		0x02
-#define CCB_RESET_TERM		0x03
-#define CCB_SET_TERM_INT	0x04
-#define CCB_SET_TERM_CTL	0x05
-#define CCB_PROCESS_KEYCODE	0x06
-
-#define CCB_OPEN		0x10
-#define CCB_CLOSE		0x11
-#define CCB_IOCTL		0x12
-#define CCB_READ		0x13
-#define CCB_WRITE		0x14
-
-#define CCB_SET_ENV		0x20
-#define CCB_RESET_ENV		0x21
-#define CCB_GET_ENV		0x22
-#define CCB_SAVE_ENV		0x23
-
-#define CCB_PSWITCH		0x30
-#define CCB_BIOS_EMUL		0x32
-/*
- * Environment variable numbers
- */
-#define ENV_AUTO_ACTION		0x01
-#define ENV_BOOT_DEV		0x02
-#define ENV_BOOTDEF_DEV		0x03
-#define ENV_BOOTED_DEV		0x04
-#define ENV_BOOT_FILE		0x05
-#define ENV_BOOTED_FILE		0x06
-#define ENV_BOOT_OSFLAGS	0x07
-#define ENV_BOOTED_OSFLAGS	0x08
-#define ENV_BOOT_RESET		0x09
-#define ENV_DUMP_DEV		0x0A
-#define ENV_ENABLE_AUDIT	0x0B
-#define ENV_LICENSE		0x0C
-#define ENV_CHAR_SET		0x0D
-#define ENV_LANGUAGE		0x0E
-#define ENV_TTY_DEV		0x0F
-
-#define NO_SRM_CONSOLE		-1L
-
-/* this isn't in the kernel for some reason */
-#define CTB_TYPE_NONE     0
-#define CTB_TYPE_DETACHED 1
-#define CTB_TYPE_SERIAL   2
-#define CTB_TYPE_GRAPHICS 3
-#define CTB_TYPE_MULTI    4
-
-struct ctb_struct {
-	unsigned long type;
-	unsigned long id;
-	unsigned long reserved;
-	unsigned long dsd_len;
-	char dsd[0];
-};
-
-void remap_console(void);
-
-#endif /* __ARCH__ALPHA__CONSOLE_H__ */
diff --git a/kernel/src/arch/alpha/debug.h b/kernel/src/arch/alpha/debug.h
deleted file mode 100644
index cd3ebca1..00000000
--- a/kernel/src/arch/alpha/debug.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2004,  University of New South Wales
- *                
- * File path:     arch/alpha/debug.h
- * Created:       24/07/2002 23:35:25 by Simon Winwood (sjw)
- * Description:   Debug support 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: debug.h,v 1.15 2004/02/04 02:45:02 sgoetz Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__DEBUG_H__
-#define __ARCH__ALPHA__DEBUG_H__
-
-#include INC_GLUE(config.h)
-#include INC_ARCH(palcalls.h)
-#include INC_ARCH(page.h)
-#include INC_PLAT(devspace.h)
-
-INLINE int spin_forever(int pos = 0)
-{
-    PAL::halt();
-    return 0;
-}
-
-#define SPIN_INTERRUPT  15 
-#define SPIN_IDLE       30
-#define SPIN_YIELD      45
-#define SPIN_TIMER_INT  60
-#define SPIN_IPC        75
-
-#define POS_TO_ADDR(pos) (0xb8000 + 2 * (pos))
-
-INLINE void spin(int pos = 0, int cpu = 0)
-{
-#if defined(CONFIG_SPIN_WHEELS)
-    const char spin[] = {'|', '/', '-', '\\'};
-    char next, current;
-
-    current = devspace_t::dense_read8(POS_TO_ADDR(pos));
-    next = spin[0];
-    for(unsigned int i = 0; i < sizeof(spin); i++)
-	if(current == spin[i]) {
-	    next = spin[ (i + 1) % sizeof(spin) ];
-	    break;
-	}
-
-    devspace_t::dense_write8(POS_TO_ADDR(pos), next);
-#endif
-}
-
-INLINE void video_print_string(char *str, int pos) 
-{
-#if  defined(CONFIG_SPIN_WHEELS)
-    for(char *c = str; *c; c++) {
-	devspace_t::dense_write8(POS_TO_ADDR(pos++), *c);	
-    }
-#endif
-}
-
-INLINE void video_print_hex(word_t val, int pos) 
-{
-#if  defined(CONFIG_SPIN_WHEELS)
-    int p = pos + 16;
-    unsigned long mask = 0xf;
-    int shift = 0;
-
-    for(int i = 0; i < 16; i++, mask <<= 4, shift += 4) {
-	u8_t c =  (((val & mask) >> shift) & 0xf);
-	c += (c > 9) ? 'a' - 10 : '0';
-	devspace_t::dense_write8(POS_TO_ADDR(p--), c);
-    }
-#endif
-}
-
-#define enter_kdebug(x) PAL::gentrap(0x2, (word_t) (x))
-
-#define HERE()               printf("Here %s:%d\n", __PRETTY_FUNCTION__, __LINE__)
-
-extern word_t handle_user_trap(word_t type, word_t arg);
-
-#endif /* __ARCH__ALPHA__DEBUG_H__ */
diff --git a/kernel/src/arch/alpha/devspace.h b/kernel/src/arch/alpha/devspace.h
deleted file mode 100644
index f01329d7..00000000
--- a/kernel/src/arch/alpha/devspace.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     arch/alpha/devspace.h
- * Description:   thread resource management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: devspace.h,v 1.3 2003/09/24 19:04:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH_DEVSPACE_H__
-#define __ARCH_DEVSPACE_H__
-
-#include INC_PLAT(devspace.h)
-
-#endif /* __ARCH_DEVSPACE_H__ */
diff --git a/kernel/src/arch/alpha/head.S b/kernel/src/arch/alpha/head.S
deleted file mode 100644
index e5165aa1..00000000
--- a/kernel/src/arch/alpha/head.S
+++ /dev/null
@@ -1,102 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/head.S
- * Description:    The kernels entry point 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: head.S,v 1.7 2003/09/24 19:05:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(pal.h)
-
-	.lcomm bootstrap_pcb, 64
-
-/* This function expects the current PTBR in a0 ($16) */
-/* sjw (04/08/2002): This is majorly hacky ;( */
-BEGIN_PROC(_start)
-	br	$27, 1f
-1:	ldgp	$29, 0($27)
-
-	lda	$1, bootstrap_pcb
-	lda	$2, _bootstack_top 
-	stq	$2,   0($1)    /* KSP */
-	stq	$16, 16($1)    /* PTBR */
-	
-	extll	$1, 0, $16
-	call_pal PAL_swpctx
-	
-	br	$27, 2f
-2:	ldgp	$29, 0($27)
-			
-	lda	$27, startup_system
-	jsr	$26, ($27)
-
-	call_pal PAL_halt
-END_PROC(_start)
-
-#define INIT_HWRPB 0x10000000
-	
-BEGIN_PROC(fixup)
-	.prologue 0
-	subq	$30,80,$30
-	stq	$26,0($30)
-	stq	$29,8($30)
-
-	stq	$8,16($30)	/* OpenVMS save regs */
-	stq	$9,24($30)
-	stq	$10,32($30)
-	stq	$11,40($30)
-	stq	$12,48($30)
-	stq	$13,56($30)
-	stq	$14,64($30)
-	stq	$15,72($30)
-
-	lda	$1, INIT_HWRPB
-	ldq	$2,0xc0($1)		/* crb offset */
-	addq	$2,$1,$2		/* crb */
-	ldq	$27,16($2)		/* fixup procedure value */
-
-	ldq	$2,8($27)		/* fixup call address */
-	jsr	$26,($2)		/* call it (weird VMS call seq) */
-
-	ldq	$26,0($30)
-	ldq	$29,8($30)
-
-	ldq	$8,16($30)
-	ldq	$9,24($30)
-	ldq	$10,32($30)
-	ldq	$11,40($30)
-	ldq	$12,48($30)
-	ldq	$13,56($30)
-	ldq	$14,64($30)
-	ldq	$15,72($30)
-
-	addq	$30,80,$30
-	ret	$31,($26)
-END_PROC(fixup)
-
-	
diff --git a/kernel/src/arch/alpha/hwrpb.h b/kernel/src/arch/alpha/hwrpb.h
deleted file mode 100644
index f8db1175..00000000
--- a/kernel/src/arch/alpha/hwrpb.h
+++ /dev/null
@@ -1,501 +0,0 @@
-/* $NetBSD: rpb.h,v 1.38 2000/07/06 23:29:13 thorpej Exp $ */
-
-/*
- * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Keith Bostic, Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-#ifndef __ARCH__ALPHA__HWRPB_H_
-#define __ARCH__ALPHA__HWRPB_H_
-
-#include INC_ARCH(types.h)
-
-/*
- * From DEC 3000 300/400/500/600/700/800/900 System Programmer's Manual,
- * EK-D3SYS-PM.B01.
- */
-
-/*
- * HWRPB (Hardware Restart Parameter Block).
- */
-#define	HWRPB_ADDR	0x10000000		/* virtual address, at boot */
-
-#ifndef	ASSEMBLER
-
-#define INIT_HWRPB        ((struct hwrpb *) HWRPB_ADDR)
-#define INITIAL_VPT       (0x0000000200000000UL)
-
-struct hwrpb {
-	word_t	rpb_phys;		/*   0: HWRPB phys. address. */
-	char		rpb_magic[8];		/*   8: "HWRPB" (in ASCII) */
-	word_t	rpb_version;		/*  10 */
-	word_t	rpb_size;		/*  18: HWRPB size in bytes */
-	word_t	rpb_primary_cpu_id;	/*  20 */
-	word_t	rpb_page_size;		/*  28: (8192) */
-	u32_t	rpb_phys_addr_size;	/*  30: physical address size */
-	u32_t	rpb_extended_va_size;	/*  34: extended VA size (4L) */
-	word_t	rpb_max_asn;		/*  38:   (16) */
-	char		rpb_ssn[16];		/*  40: only first 10 valid */
-
-#define	ST_ADU			1		/* Alpha Demo. Unit (?) */
-#define	ST_DEC_4000		2		/* "Cobra" */
-#define	ST_DEC_7000		3		/* "Ruby" */
-#define	ST_DEC_3000_500		4		/* "Flamingo" family (TC) */
-#define	ST_DEC_2000_300		6		/* "Jensen" (EISA/ISA) */
-#define	ST_DEC_3000_300		7		/* "Pelican" (TC) */
-#define	ST_AVALON_A12		8		/* XXX Avalon Multicomputer */
-#define	ST_DEC_2100_A500	9		/* "Sable" */
-#define	ST_DEC_APXVME_64	10		/* "AXPvme" (VME) */
-#define	ST_DEC_AXPPCI_33	11		/* "NoName" (PCI/ISA) */
-#define	ST_DEC_21000		12		/* "TurboLaser" (PCI/EISA) */
-#define	ST_DEC_2100_A50		13		/* "Avanti" (PCI/ISA) */
-#define	ST_DEC_MUSTANG		14		/* "Mustang" */
-#define	ST_DEC_KN20AA		15		/* kn20aa (PCI/EISA) */
-#define	ST_DEC_1000		17		/* "Mikasa" (PCI/EISA) */
-#define	ST_EB66			19		/* EB66 (PCI/ISA?) */
-#define	ST_EB64P		20		/* EB64+ (PCI/ISA?) */
-#define	ST_ALPHABOOK1		21		/* Alphabook1 */
-#define	ST_DEC_4100		22		/* "Rawhide" (PCI/EISA) */
-#define	ST_DEC_EV45_PBP		23		/* "Lego" K2 Passive SBC */
-#define	ST_DEC_2100A_A500	24		/* "Lynx" */
-#define	ST_EB164		26		/* EB164 (PCI/ISA) */
-#define	ST_DEC_1000A		27		/* "Noritake" (PCI/EISA)*/
-#define	ST_DEC_ALPHAVME_224	28		/* "Cortex" */
-#define	ST_DEC_550		30		/* "Miata" (PCI/ISA) */
-#define	ST_DEC_EV56_PBP		32		/* "Takara" */
-#define	ST_DEC_ALPHAVME_320	33		/* "Yukon" (VME) */
-#define	ST_DEC_6600		34		/* EV6-Tsunami based systems */
-#define	ST_DEC_WILDFIRE		35		/* "Wildfire" */
-#define	ST_DEC_CUSCO		36		/* "CUSCO" */
-#define	ST_DEC_EIGER		37		/* "Eiger" */
-
-	/* Alpha Processor, Inc. systypes */
-#define	ST_API_NAUTILUS		201		/* EV6-AMD 751 UP1000 */
-
-	word_t	rpb_type;		/*  50: */
-
-#define	SV_MPCAP		0x00000001	/* multiprocessor capable */
-
-#define	SV_CONSOLE		0x0000001e	/* console hardware mask */
-#define	SV_CONSOLE_DETACHED	0x00000002
-#define	SV_CONSOLE_EMBEDDED	0x00000004
-
-#define	SV_POWERFAIL		0x000000e0	/* powerfail mask */
-#define	SV_PF_UNITED		0x00000020
-#define	SV_PF_SEPARATE		0x00000040
-#define	SV_PF_BBACKUP		0x00000060
-#define	SV_PF_ACTION		0x00000100	/* powerfail restart */
-
-#define	SV_GRAPHICS		0x00000200	/* graphic engine present */
-
-#define	SV_ST_MASK		0x0000fc00	/* system type mask */
-#define	SV_ST_RESERVED		0x00000000	/* RESERVED */
-
-/*
- * System types for the DEC 3000/500 (Flamingo) Family
- */
-#define	SV_ST_SANDPIPER		0x00000400	/* Sandpiper;	3000/400 */
-#define	SV_ST_FLAMINGO		0x00000800	/* Flamingo;	3000/500 */
-#define	SV_ST_HOTPINK		0x00000c00	/* "Hot Pink";	3000/500X */
-#define	SV_ST_FLAMINGOPLUS	0x00001000	/* Flamingo+;	3000/800 */
-#define	SV_ST_ULTRA		0x00001400	/* "Ultra", aka Flamingo+ */
-#define	SV_ST_SANDPLUS		0x00001800	/* Sandpiper+;	3000/600 */
-#define	SV_ST_SANDPIPER45	0x00001c00	/* Sandpiper45;	3000/700 */
-#define	SV_ST_FLAMINGO45	0x00002000	/* Flamingo45;	3000/900 */
-
-/*
- * System types for ???
- */
-#define	SV_ST_SABLE		0x00000400	/* Sable (???) */
-
-/*
- * System types for the DEC 3000/300 (Pelican) Family
- */
-#define	SV_ST_PELICAN		0x00000000	/* Pelican;	 3000/300 */
-#define	SV_ST_PELICA		0x00000400	/* Pelica;	 3000/300L */
-#define	SV_ST_PELICANPLUS	0x00000800	/* Pelican+;	 3000/300X */
-#define	SV_ST_PELICAPLUS	0x00000c00	/* Pelica+;	 3000/300LX */
-
-/*
- * System types for the AlphaStation Family
- */
-#define	SV_ST_AVANTI		0x00000000	/* Avanti;	400 4/233 */
-#define	SV_ST_MUSTANG2_4_166	0x00000800	/* Mustang II;	200 4/166 */
-#define	SV_ST_MUSTANG2_4_233	0x00001000	/* Mustang II;	200 4/233 */
-#define	SV_ST_AVANTI_XXX	0x00001400	/* also Avanti;	400 4/233 */
-#define	SV_ST_AVANTI_4_266	0x00002000
-#define	SV_ST_MUSTANG2_4_100	0x00002400	/* Mustang II;	200 4/100 */
-#define	SV_ST_AVANTI_4_233	0x0000a800	/* AlphaStation 255/233 */
-
-#define	SV_ST_KN20AA		0x00000400	/* AlphaStation 500/600 */
-
-/*
- * System types for the AXPvme Family
- */
-#define	SV_ST_AXPVME_64		0x00000000	/* 21068, 64MHz */
-#define	SV_ST_AXPVME_160	0x00000400	/* 21066, 160MHz */
-#define	SV_ST_AXPVME_100	0x00000c00	/* 21066A, 99MHz */
-#define	SV_ST_AXPVME_230	0x00001000	/* 21066A, 231MHz */
-#define	SV_ST_AXPVME_66		0x00001400	/* 21066A, 66MHz */
-#define	SV_ST_AXPVME_166	0x00001800	/* 21066A, 165MHz */
-#define	SV_ST_AXPVME_264	0x00001c00	/* 21066A, 264MHz */
-
-/*
- * System types for the EB164 Family
- */
-#define	SV_ST_EB164_266		0x00000400	/* EB164, 266MHz */
-#define	SV_ST_EB164_300		0x00000800	/* EB164, 300MHz */
-#define	SV_ST_ALPHAPC164_366	0x00000c00	/* AlphaPC164, 366MHz */
-#define	SV_ST_ALPHAPC164_400	0x00001000	/* AlphaPC164, 400MHz */
-#define	SV_ST_ALPHAPC164_433	0x00001400	/* AlphaPC164, 433MHz */
-#define	SV_ST_ALPHAPC164_466	0x00001800	/* AlphaPC164, 466MHz */
-#define	SV_ST_ALPHAPC164_500	0x00001c00	/* AlphaPC164, 500MHz */
-#define	SV_ST_ALPHAPC164LX_400	0x00002000	/* AlphaPC164LX, 400MHz */
-#define	SV_ST_ALPHAPC164LX_466	0x00002400	/* AlphaPC164LX, 466MHz */
-#define	SV_ST_ALPHAPC164LX_533	0x00002800	/* AlphaPC164LX, 533MHz */
-#define	SV_ST_ALPHAPC164LX_600	0x00002c00	/* AlphaPC164LX, 600MHz */
-#define	SV_ST_ALPHAPC164SX_400	0x00003000	/* AlphaPC164SX, 400MHz */
-#define	SV_ST_ALPHAPC164SX_466	0x00003400	/* AlphaPC164SX, 433MHz */
-#define	SV_ST_ALPHAPC164SX_533	0x00003800	/* AlphaPC164SX, 533MHz */
-#define	SV_ST_ALPHAPC164SX_600	0x00003c00	/* AlphaPC164SX, 600MHz */
-
-/*
- * System types for the Digital Personal Workstation (Miata) Family
- * XXX These are not very complete!
- */
-#define	SV_ST_MIATA_1_5		0x00004c00	/* Miata 1.5 */
-
-	word_t	rpb_variation;		/*  58 */
-
-	char		rpb_revision[8];	/*  60; only first 4 valid */
-	word_t	rpb_intr_freq;		/*  68; scaled by 4096 */
-	word_t	rpb_cc_freq;		/*  70: cycle cntr frequency */
-	word_t		rpb_vptb;		/*  78: */
-	word_t	rpb_reserved_arch;	/*  80: */
-	word_t		rpb_tbhint_off;		/*  88: */
-	word_t	rpb_pcs_cnt;		/*  90: */
-	word_t	rpb_pcs_size;		/*  98; pcs size in bytes */
-	word_t		rpb_pcs_off;		/*  A0: offset to pcs info */ 
-	word_t	rpb_ctb_cnt;		/*  A8: console terminal */
-	word_t	rpb_ctb_size;		/*  B0: ctb size in bytes */
-	word_t		rpb_ctb_off;		/*  B8: offset to ctb */
-	word_t		rpb_crb_off;		/*  C0: offset to crb */
-	word_t		rpb_memdat_off;		/*  C8: memory data offset */
-	word_t		rpb_condat_off;		/*  D0: config data offset */
-	word_t		rpb_fru_off;		/*  D8: FRU table offset */
-	word_t	rpb_save_term;		/*  E0: terminal save */
-	word_t	rpb_save_term_val;	/*  E8: */
-	word_t	rpb_rest_term;		/*  F0: terminal restore */
-	word_t	rpb_rest_term_val;	/*  F8: */
-	word_t	rpb_restart;		/* 100: restart */
-	word_t	rpb_restart_val;	/* 108: */
-	word_t	rpb_reserve_os;		/* 110: */
-	word_t	rpb_reserve_hw;		/* 118: */
-	word_t	rpb_checksum;		/* 120: HWRPB checksum */
-	word_t	rpb_rxrdy;		/* 128: receive ready */
-	word_t	rpb_txrdy;		/* 130: transmit ready */
-	word_t		rpb_dsrdb_off;		/* 138: HWRPB + DSRDB offset */
-	word_t	rpb_tbhint[8];		/* 149: TB hint block */
-};
-
-#define	LOCATE_PCS(h,cpunumber) ((struct pcs *)	\
-	((char *)(h) + (h)->rpb_pcs_off + ((cpunumber) * (h)->rpb_pcs_size)))
-
-/*
- * PCS: Per-CPU information.
- */
-struct pcs {
-    u8_t	pcs_hwpcb[128];		/*   0: PAL dependent */
-
-#define	PCS_BIP			0x000001	/* boot in progress */
-#define	PCS_RC			0x000002	/* restart possible */
-#define	PCS_PA			0x000004	/* processor available */
-#define	PCS_PP			0x000008	/* processor present */
-#define	PCS_OH			0x000010	/* user halted */
-#define	PCS_CV			0x000020	/* context valid */
-#define	PCS_PV			0x000040	/* PALcode valid */
-#define	PCS_PMV			0x000080	/* PALcode memory valid */
-#define	PCS_PL			0x000100	/* PALcode loaded */
-
-#define	PCS_HALT_REQ		0xff0000	/* halt request mask */
-#define	PCS_HALT_DEFAULT	0x000000
-#define	PCS_HALT_SAVE_EXIT	0x010000
-#define	PCS_HALT_COLD_BOOT	0x020000
-#define	PCS_HALT_WARM_BOOT	0x030000
-#define	PCS_HALT_STAY_HALTED	0x040000
-#define	PCS_mbz	      0xffffffffff000000	/* 24:63 -- must be zero */
-	word_t	pcs_flags;		/*  80: */
-
-	word_t	pcs_pal_memsize;	/*  88: PAL memory size */
-	word_t	pcs_pal_scrsize;	/*  90: PAL scratch size */
-	word_t		pcs_pal_memaddr;	/*  98: PAL memory addr */	
-	word_t		pcs_pal_scraddr;	/*  A0: PAL scratch addr */
-	struct {
-		word_t
-			minorrev	: 8,	/* alphabetic char 'a' - 'z' */
-			majorrev	: 8,	/* alphabetic char 'a' - 'z' */
-#define	PAL_TYPE_STANDARD	0
-#define	PAL_TYPE_VMS		1
-#define	PAL_TYPE_OSF1		2
-			pal_type	: 8,	/* PALcode type:
-						 * 0 == standard
-						 * 1 == OpenVMS
-						 * 2 == OSF/1
-						 * 3-127 DIGITAL reserv.
-						 * 128-255 non-DIGITAL reserv.
-						 */
-			sbz1		: 8,
-			compatibility	: 16,	/* Compatibility revision */
-			proc_cnt	: 16;	/* Processor count */
-	} pcs_pal_rev;				/*  A8: */
-#define pcs_minorrev	pcs_pal_rev.minorrev	
-#define pcs_majorrev	pcs_pal_rev.majorrev	
-#define pcs_pal_type	pcs_pal_rev.pal_type
-#define pcs_compatibility	pcs_pal_rev.compatibility
-#define pcs_proc_cnt	pcs_pal_rev.proc_cnt
-
-	word_t	pcs_proc_type;		/*  B0: processor type */
-
-#define	PCS_PROC_EV3		1			/* EV3 */
-#define	PCS_PROC_EV4		2			/* EV4: 21064 */
-#define	PCS_PROC_SIMULATION	3			/* Simulation */
-#define	PCS_PROC_LCA4		4			/* LCA4: 2106[68] */
-#define	PCS_PROC_EV5		5			/* EV5: 21164 */
-#define	PCS_PROC_EV45		6			/* EV45: 21064A */
-#define	PCS_PROC_EV56		7			/* EV56: 21164A */
-#define	PCS_PROC_EV6		8			/* EV6: 21264 */
-#define	PCS_PROC_PCA56		9			/* PCA56: 21164PC */
-#define	PCS_PROC_PCA57		10			/* PCA57: 21164?? */
-#define	PCS_PROC_EV67		11			/* EV67: 21246A */
-
-#define	PCS_CPU_MAJORTYPE(p) ((p)->pcs_proc_type & 0xffffffff)
-#define	PCS_CPU_MINORTYPE(p) ((p)->pcs_proc_type >> 32)
-
-	/* Minor number interpretation is processor specific.  See cpu.c. */
-
-	word_t	pcs_proc_var;		/* B8: processor variation. */
-
-#define	PCS_VAR_VAXFP		0x0000000000000001	/* VAX FP support */
-#define	PCS_VAR_IEEEFP		0x0000000000000002	/* IEEE FP support */
-#define	PCS_VAR_PE		0x0000000000000004	/* Primary Eligible */
-#define	PCS_VAR_RESERVED	0xfffffffffffffff8	/* Reserved */
-
-	char		pcs_proc_revision[8];	/*  C0: only first 4 valid */
-	char		pcs_proc_sn[16];	/*  C8: only first 10 valid */
-	word_t		pcs_machcheck;		/*  D8: mach chk phys addr. */
-	word_t	pcs_machcheck_len;	/*  E0: length in bytes */
-	word_t		pcs_halt_pcbb;		/*  E8: phys addr of halt PCB */
-	word_t		pcs_halt_pc;		/*  F0: halt PC */
-	word_t	pcs_halt_ps;		/*  F8: halt PS */
-	word_t	pcs_halt_r25;		/* 100: halt argument list */
-	word_t	pcs_halt_r26;		/* 108: halt return addr list */
-	word_t	pcs_halt_r27;		/* 110: halt procedure value */
-
-#define	PCS_HALT_RESERVED		0
-#define	PCS_HALT_POWERUP		1
-#define	PCS_HALT_CONSOLE_HALT		2
-#define	PCS_HALT_CONSOLE_CRASH		3
-#define	PCS_HALT_KERNEL_MODE		4
-#define	PCS_HALT_KERNEL_STACK_INVALID	5
-#define	PCS_HALT_DOUBLE_ERROR_ABORT	6
-#define	PCS_HALT_SCBB			7
-#define	PCS_HALT_PTBR			8	/* 9-FF: reserved */
-	word_t	pcs_halt_reason;	/* 118: */
-
-	word_t	pcs_reserved_soft;	/* 120: preserved software */
-
-	struct {				/* 128: inter-console buffers */
-		u32_t	iccb_rxlen;
-		u32_t	iccb_txlen;
-		char	iccb_rxbuf[80];
-		char	iccb_txbuf[80];
-	} pcs_iccb;
-
-#define	PALvar_reserved	0
-#define	PALvar_OpenVMS	1
-#define	PALvar_OSF1	2
-	word_t	pcs_palrevisions[16];	/* 1D0: PALcode revisions */
-
-	word_t	pcs_reserved_arch[6];	/* 250: reserved arch */
-};
-
-/*
- * CTB: Console Terminal Block
- */
-struct ctb {
-	word_t	ctb_type;		/*   0: CTB type */
-	word_t	ctb_unit;		/*   8: */
-	word_t	ctb_reserved;		/*  16: */
-	word_t	ctb_len;		/*  24: bytes of info */
-	word_t	ctb_ipl;		/*  32: console ipl level */
-	word_t		ctb_tintr_vec;		/*  40: transmit vec (0x800) */
-	word_t		ctb_rintr_vec;		/*  48: receive vec (0x800) */
-
-#define	CTB_NONE		0x00		/* no console present */
-#define	CTB_SERVICE		0x01		/* service processor */
-#define	CTB_PRINTERPORT		0x02		/* printer port on the SCC */
-#define	CTB_GRAPHICS		0x03		/* graphics device */
-#define	CTB_TYPE4		0x04		/* type 4 CTB */
-#define	CTB_NETWORK		0xC0		/* network device */
-	word_t	ctb_term_type;		/*  56: terminal type */
-
-	word_t	ctb_keybd_type;		/*  64: keyboard nationality */
-	word_t		ctb_keybd_trans;	/*  72: trans. table addr */
-	word_t		ctb_keybd_map;		/*  80: map table addr */
-	word_t	ctb_keybd_state;	/*  88: keyboard flags */
-	word_t	ctb_keybd_last;		/*  96: last key entered */
-	word_t		ctb_font_us;		/* 104: US font table addr */
-	word_t		ctb_font_mcs;		/* 112: MCS font table addr */
-	word_t	ctb_font_width;		/* 120: font width, height */
-	word_t	ctb_font_height;	/* 128:		in pixels */
-	word_t	ctb_mon_width;		/* 136: monitor width, height */
-	word_t	ctb_mon_height;		/* 144:		in pixels */
-	word_t	ctb_dpi;		/* 152: monitor dots per inch */
-	word_t	ctb_planes;		/* 160: # of planes */
-	word_t	ctb_cur_width;		/* 168: cursor width, height */
-	word_t	ctb_cur_height;		/* 176:		in pixels */
-	word_t	ctb_head_cnt;		/* 184: # of heads */
-	word_t	ctb_opwindow;		/* 192: opwindow on screen */
-	word_t		ctb_head_offset;	/* 200: offset to head info */
-	word_t		ctb_putchar;		/* 208: output char to TURBO */
-	word_t	ctb_io_state;		/* 216: I/O flags */
-	word_t	ctb_listen_state;	/* 224: listener flags */
-	word_t		ctb_xaddr;		/* 232: extended info addr */
-	word_t	ctb_turboslot;		/* 248: TURBOchannel slot # */
-	word_t	ctb_server_off;		/* 256: offset to server info */
-	word_t	ctb_line_off;		/* 264: line parameter offset */
-	u8_t	ctb_csd;		/* 272: console specific data */
-};
-
-struct ctb_tt {
-	word_t	ctb_type;		/*   0: CTB type */
-	word_t	ctb_unit;		/*   8: console unit */
-	word_t	ctb_reserved;		/*  16: reserved */
-	word_t	ctb_length;		/*  24: length */
-	word_t	ctb_csr;		/*  32: address */
-	word_t	ctb_tivec;		/*  40: Tx intr vector */
-	word_t	ctb_rivec;		/*  48: Rx intr vector */
-	word_t	ctb_baud;		/*  56: baud rate */
-	word_t	ctb_put_sts;		/*  64: PUTS status */
-	word_t	ctb_get_sts;		/*  72: GETS status */
-	word_t	ctb_reserved0;		/*  80: reserved */
-};
-
-/*
- * Format of the Console Terminal Block Type 4 `turboslot' field:
- *
- *  63                   40 39       32 31     24 23      16 15   8 7    0
- *  |      reserved        |  channel  |  hose   | bus type |  bus | slot|
- */
-#define	CTB_TURBOSLOT_CHANNEL(x)	(((x) >> 32) & 0xff)
-#define	CTB_TURBOSLOT_HOSE(x)		(((x) >> 24) & 0xff)
-#define	CTB_TURBOSLOT_TYPE(x)		(((x) >> 16) & 0xff)
-#define	CTB_TURBOSLOT_BUS(x)		(((x) >> 8) & 0xff)
-#define	CTB_TURBOSLOT_SLOT(x)		((x) & 0xff)
-
-#define	CTB_TURBOSLOT_TYPE_TC		0	/* TURBOchannel */
-#define	CTB_TURBOSLOT_TYPE_ISA		1	/* ISA */
-#define	CTB_TURBOSLOT_TYPE_EISA		2	/* EISA */
-#define	CTB_TURBOSLOT_TYPE_PCI		3	/* PCI */
-
-/* 
- * CRD: Console Routine Descriptor
- */
-struct crd {
-	s64_t		descriptor;
-	word_t	entry_va;
-};
-
-
-struct vf_map {
-    word_t va;
-    word_t pa;
-    word_t count;
-};
-
-/*
- * CRB: Console Routine Block
- */
-struct crb {
-	struct crd	*crb_v_dispatch;	/*   0: virtual dispatch addr */
-	word_t		 crb_p_dispatch;	/*   8: phys dispatch addr */
-	struct crd	*crb_v_fixup;		/*  10: virtual fixup addr */
-	word_t		 crb_p_fixup;		/*  18: phys fixup addr */
-	word_t	 crb_map_cnt;		/*  20: phys/virt map entries */
-	word_t	 crb_page_cnt;		/*  28: pages to be mapped */
-    struct vf_map map[0];
-};
-
-/*
- * MDDT: Memory Data Descriptor Table
- */
-struct mddt {
-	s64_t	 	mddt_cksum;		/*   0: 7-N checksum */
-	word_t		mddt_physaddr;		/*   8: bank config addr
-						 * IMPLEMENTATION SPECIFIC
-						 */
-	word_t	mddt_cluster_cnt;	/*  10: memory cluster count */
-	struct mddt_cluster {
-		word_t		mddt_pfn;	/*   0: starting PFN */
-		word_t	mddt_pg_cnt;	/*   8: 8KB page count */
-		word_t	mddt_pg_test;	/*  10: tested page count */
-		word_t		mddt_v_bitaddr;	/*  18: bitmap virt addr */
-		word_t		mddt_p_bitaddr;	/*  20: bitmap phys addr */
-		s64_t		mddt_bit_cksum;	/*  28: bitmap checksum */
-
-#define	MDDT_NONVOLATILE		0x10	/* cluster is non-volatile */
-#define	MDDT_PALCODE			0x01	/* console and PAL only */
-#define	MDDT_SYSTEM			0x00	/* system software only */
-#define	MDDT_mbz	  0xfffffffffffffffc	/* 2:63 -- must be zero */
-		s64_t		mddt_usage;	/*  30: bitmap permissions */
-	} mddt_clusters[1];			/* variable length array */
-};
-
-/*
- * DSR: Dynamic System Recognition.  We're interested in the sysname
- * offset.  The data pointed to by sysname is:
- *
- *	[8 bytes: length of system name][N bytes: system name string]
- *
- * The system name string is NUL-terminated.
- */
-struct dsrdb {
-	s64_t		dsr_smm;		/*  0: SMM number */
-	word_t	dsr_lurt_off;		/*  8: LURT table offset */
-	word_t	dsr_sysname_off;	/* 16: offset to sysname */
-};
-
-/*
- * The DSR appeared in version 5 of the HWRPB.
- */
-#define	HWRPB_DSRDB_MINVERS	5
-
-#ifdef	_KERNEL
-extern int cputype;
-extern struct rpb *hwrpb;
-#endif
-
-#endif /* ASSEMBLER */
-#endif /* __ARCH__ALPHA__HWRPB_H_ */
diff --git a/kernel/src/arch/alpha/intctrl.h b/kernel/src/arch/alpha/intctrl.h
deleted file mode 100644
index f126ec78..00000000
--- a/kernel/src/arch/alpha/intctrl.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales 
- *                
- * File path:     glue/v4-alpha/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.3 2003/09/24 19:04:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__INTCTRL_H__
-#define __ARCH__INTCTRL_H__
-
-#include <intctrl.h>
-
-class alpha_intctrl_t : public generic_intctrl_t {
- public:
-
-    /* This method decodes the IRQ handed off by PAL */
-    word_t decode_irq(word_t irq);
-    void print_status();
-};
-
-#endif /* __ARCH__INTCTRL_H__ */
diff --git a/kernel/src/arch/alpha/linker.lds b/kernel/src/arch/alpha/linker.lds
deleted file mode 100644
index 92042a07..00000000
--- a/kernel/src/arch/alpha/linker.lds
+++ /dev/null
@@ -1,87 +0,0 @@
-/* check ALIGN(4K) before use !!! */
-
-OUTPUT_FORMAT("elf64-alpha")
-
-#include INC_GLUE(offsets.h)
-
-ENTRY(_start)
-
-_start_text = (KERNEL_OFFSET + CONFIG_ALPHA_CONSOLE_RESERVE);
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-	.got : AT (ADDR(.got) - KERNEL_OFFSET)
-	{
-		*(.got)
-	}
-	. = ALIGN(8K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(4K);
-		*(.user.*)
-	}
-	. = ALIGN(8K);
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-        _memory_descriptors_size =
-                (8K - ((memory_descriptors - kip) & (8K-1))) / 16;
-
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.sbss) 
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(8K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-	_start_text_phys = _start_text - KERNEL_OFFSET;
-	. = ALIGN(8K);
-
-	.init _end_text : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-	}
-
-	. = ALIGN(8K);
-	_bootstack_bottom = .;
-	. = . + 8K;
-	_bootstack_top = .;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K) - KERNEL_OFFSET;
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/arch/alpha/page.h b/kernel/src/arch/alpha/page.h
deleted file mode 100644
index d15751bd..00000000
--- a/kernel/src/arch/alpha/page.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/page.h
- * Created:       27/07/2002 20:35:30 by Simon Winwood (sjw)
- * Description:   Alpha specific MM 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: page.h,v 1.8 2003/09/24 19:04:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__PAGE_H__
-#define __ARCH__ALPHA__PAGE_H__
-
-#include <config.h>
-
-
-/* If we are using a 43 bit AS we stick space_t in the kseg mapping area (which is unused), 
- * the first 256 entries in the second half of the L1 PT.  In a 48 bit AS, we stick space_t in the
- * same spot.
- */
-#if CONFIG_ALPHA_ADDRESS_BITS == 43
-/* We are using a 3 level PT */
-#define ALPHA_PT_LEVELS         3
-#define TOPLEVEL_PT_BITS        33
-
-#define PTBR_SPACE_OFFSET       (512 * 8)
-
-#define HW_PGSHIFTS            { 13, 16, 19, 22, 23, 33, 43}
-#define NUM_HW_PGSHIFTS         7
-
-#elif CONFIG_ALPHA_ADDRESS_BITS == 48
-/* We are using a 4 level PT */
-#define ALPHA_PT_LEVELS         4
-#define TOPLEVEL_PT_BITS        43
-
-#define PTBR_SPACE_OFFSET       (512 * 8)
-
-#define HW_PGSHIFTS            { 13, 16, 19, 22, 23, 33, 43, 48}
-#define NUM_HW_PGSHIFTS         8
-#else
-#error We only support 43 and 48 bit address spaces!
-#endif /* CONFIG_ALPHA_ADDRESS_BITS */
-
-/* Basic page sizes etc. */
-
-#define ALPHA_PAGE_BITS         13
-#define ALPHA_PAGE_SIZE         (1UL << ALPHA_PAGE_BITS)
-#define ALPHA_PAGE_MASK         (~(ALPHA_PAGE_SIZE - 1))
-#define ALPHA_OFFSET_MASK       (~ALPHA_PAGE_MASK)
-
-/* sjw (17/09/2002): FIXME --- CPU specific? */
-#define ALPHA_CACHE_LINE_SIZE   64
-
-/* sjw (17/09/2002): Correct? */
-#define HW_VALID_PGSIZES       ((1 << 13) | (1 << 16) | (1 << 19) | (1 << 22))
-
-
-/* Address space layout */
-
-/* The basic AS layout is defined by OSF PAL.  It consists of 3 segments (for a 43 bit AS):
- *
- *  seg0:                    0 ... (0x40000000000 - 1)
- *  kseg:   0xfffffc0000000000 ... (0xfffffd0000000000 - 1)
- *  seg1:   0xfffffd0000000000 ... 0xffffffffffffffff
- */
-
-#define AS_SEG0_START           (0)
-#define AS_SEG0_SIZE            (1UL << (CONFIG_ALPHA_ADDRESS_BITS - 1))
-#define AS_SEG0_END             (AS_SEG0_START + AS_SEG0_SIZE)
-
-#define AS_KSEG_START           (-1UL << (CONFIG_ALPHA_ADDRESS_BITS - 1))
-#define AS_KSEG_SIZE            (1UL << (CONFIG_ALPHA_ADDRESS_BITS - 2))
-#define AS_KSEG_END             (AS_KSEG_START + AS_KSEG_SIZE)
-
-#define AS_SEG1_START           (-1UL << (CONFIG_ALPHA_ADDRESS_BITS - 2))
-#define AS_SEG1_SIZE            (1UL << (CONFIG_ALPHA_ADDRESS_BITS - 2))
-#define AS_SEG1_END             (AS_SEG1_START + AS_SEG1_SIZE)
-
-/* #define KERNEL_OFFSET           (AS_KSEG_START + CONFIG_ALPHA_CONSOLE_RESERVE) */
-
-#endif /* __ARCH__ALPHA__PAGE_H__ */
diff --git a/kernel/src/arch/alpha/pagebits.h b/kernel/src/arch/alpha/pagebits.h
deleted file mode 100644
index 5785a8cf..00000000
--- a/kernel/src/arch/alpha/pagebits.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/pagebits.h
- * Created:       27/08/2002 13:16:50 by Simon Winwood (sjw)
- * Description:   Global page size macros 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pagebits.h,v 1.2 2003/09/24 19:04:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__PAGEBITS_H__
-#define __ARCH__ALPHA__PAGEBITS_H__
-
-#define PAGE_BITS         (13)
-#define PAGE_SIZE         (1UL << PAGE_BITS)
-#define PAGE_MASK         (~(PAGE_SIZE - 1))
-
-#endif /* __ARCH__ALPHA__PAGEBITS_H__ */
diff --git a/kernel/src/arch/alpha/pal.h b/kernel/src/arch/alpha/pal.h
deleted file mode 100644
index db4a5bd1..00000000
--- a/kernel/src/arch/alpha/pal.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/pal.h
- * Created:       23/07/2002 18:08:44 by Simon Winwood (sjw)
- * Description:   PAL definitions (for asm and C) 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pal.h,v 1.4 2003/09/24 19:04:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__PAL_H__
-#define __ARCH__ALPHA__PAL_H__
-
-/* Interrupt types */
-#define PAL_INT_IPI      0
-#define PAL_INT_CLOCK    1
-#define PAL_INT_ERR      2
-#define PAL_INT_MCHK     2
-#define PAL_INT_DEV      3
-#define PAL_INT_PERF     4
-
-/* entIF reasons */
-#define PAL_IF_BPT       0
-#define PAL_IF_BUGCHK    1
-#define PAL_IF_GENTRAP   2
-#define PAL_IF_FEN       3
-#define PAL_IF_OPDEC     4
-
-/* PAL calls, unprivileged */
-#define PAL_bpt          128  /* Breakpoint trap: Kernel and user */
-#define PAL_bugchk       129  /* Bugcheck trap: Kernel and user */
-#define PAL_callsys      131  /* System call: User */
-/* #define PAL_clrfen = ?         Clear floating-point enable: User */
-#define PAL_gentrap      170  /* Generate trap: Kernel and user */
-#define PAL_imb          134  /* I-stream memory barrier: Kernel and user */
-#define PAL_rdunique     158  /* Read unique: Kernel and user */
-/* #define  PAL_urti = ?           Return from user mode trap: User mode */
-#define PAL_wrunique     159  /* Write Unique: Kernel and user */    
-
-
-/* PAL calls, privileged */
-#define PAL_cflush       1  /* Cache flush */ 
-#define PAL_cserve       9  /* Console Service */
-#define PAL_draina       2  /* Drain aborts */
-#define PAL_halt         0  /* Halt the processor */
-/* PAL_jtopal = 46 */
-/* PAL_nphalt = 190 */
-#define PAL_rdmces       16  /* Read machine check error summary register */
-#define PAL_rdps         54  /* Read processor status */       
-#define PAL_rdusp        58  /* Read user stack pointer */
-#define PAL_rdval        50  /* Read system value */         
-#define PAL_retsys       61  /* Return from syscall */
-#define PAL_rti          63  /* Return from trap, fault, or interrupt */
-#define PAL_swpctx       48  /* Swap process context */
-#define PAL_swpipl       53  /* Swap IPL */
-#define PAL_tbi          51  /* TB invalidate */
-#define PAL_whami        60  /* Who am I */
-#define PAL_wrent        52  /* Write system entry address */
-#define PAL_wrfen        43  /* Write floating point enable */
-#define PAL_wripir       13  /* Write interprocessor interrupt request */
-#define PAL_wrkgp        55  /* Write kernel global pointer */
-#define PAL_wrmces       17  /* Write machine check error summary register */
-#define PAL_wrperfmon    57  /* Performance monitoring function */
-#define PAL_wrusp        56  /* Write user stack pointer */
-#define PAL_wrval        49  /* Write system value */
-#define PAL_wrvptptr     45     /* Write virtual page table pointer */
-/* PAL_wtint = ?          Wait for interrupt */
-
-/* MMCSR values */
-#define PAL_MMCSR_INVALID 0
-#define PAL_MMCSR_ACCESS  1
-#define PAL_MMCSR_FOR     2
-#define PAL_MMCSR_FOE     3
-#define PAL_MMCSR_FOW     4
-
-#define PAL_PS_USER       (1 << 3)
-
-#endif /* __ARCH__ALPHA__PAL_H__ */
diff --git a/kernel/src/arch/alpha/palcalls.h b/kernel/src/arch/alpha/palcalls.h
deleted file mode 100644
index 83794508..00000000
--- a/kernel/src/arch/alpha/palcalls.h
+++ /dev/null
@@ -1,163 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/palcalls.h
- * Created:       15/07/2002 17:29:59 by Simon Winwood (sjw)
- * Description:   Kernel PAL calls 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: palcalls.h,v 1.12 2004/11/08 23:54:19 awiggins Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__PALCALLS_H__
-#define __ARCH__ALPHA__PALCALLS_H__
-
-#include INC_ARCH(pal.h)
-
-/* return value is in v0 */
-/* sjw (15/07/2002): Not all pal will use v0 ... */
-#define syscall0(name, scratch...)						\
-static inline u64_t name (void) {						\
-	u64_t register v0 __asm__("$0");					\
-										\
-	asm volatile ("call_pal %1" : "=r" (v0) : "i" (PAL_##name) : scratch);	\
-										\
-	return v0;								\
-}
-
-#define syscall1(name, arg1, scratch...)							\
-static inline u64_t name (u64_t arg1) {								\
-	u64_t register v0 __asm__("$0");							\
-	u64_t register a0 __asm__("$16") = arg1;						\
-												\
-	asm volatile ("call_pal %1" : "=r" (v0) : "i" (PAL_##name), "r"(a0) : scratch);	\
-												\
-	return v0;										\
-}
-
-#define syscall2(name, arg1, arg2, scratch...)			\
-static inline u64_t name (u64_t arg1, u64_t arg2) {		\
-	u64_t register v0 __asm__("$0");			\
-	u64_t register a0 __asm__("$16") = arg1;		\
-	u64_t register a1 __asm__("$17") = arg2;		\
-								\
-	asm volatile ("call_pal %1" : "=r" (v0) 		\
-		      : "i" (PAL_##name), "r"(a0), "r"(a1) 	\
-		      : scratch);				\
-								\
-	return v0;						\
-}
-
-/* This class holds all the PAL specific stuff that we require */
-class PAL {
- public:
-    /* Interrupt stuff */
-    enum entry_addresses_e {
-	entInt = 0,
-	entArith = 1,
-	entMM = 2,
-	entIF = 3,
-	entUna = 4,
-	entSys = 5
-    };
-
-    /* TLB stuff */
-    enum tbi_param_e {
-	flush_tbisi = 1,
-	flush_tbisd = 2,
-	flush_tbis = 3,
-	flush_tbiap = -1,
-	flush_tbia = -2
-    };
-
-    enum IPL_levels_e {
-	IPL_all = 0,
-	IPL_highest = 7
-    };
-
-#define pal_scratch "$1", "$22", "$23", "$24", "$25"
-
-    /* Unprivileged */
-
-    syscall0(bpt, "memory");
-    syscall0(bugchk, "memory");
-    /* Ignore callsys */
-    /* Ignore clrfen */
-    syscall2(gentrap, arg0, arg1, "memory");
-    syscall0(imb, "memory");
-    syscall0(rdunique, "memory");
-    /* Ignore urti */
-    syscall1(wrunique, unique, "memory");
-
-    /* Priveleged */
-    syscall1(cflush, pfn, "memory");
-    syscall0(cserve, "memory");
-    syscall0(draina, "memory");
-    syscall0(halt, "memory");
-    syscall0(rdmces, pal_scratch);
-    syscall0(rdps, pal_scratch);
-    syscall0(rdusp, pal_scratch);
-    syscall0(rdval, pal_scratch);
-    /* These two will probably be called from asm anyway */ 
-    syscall0(retsys, pal_scratch);
-    syscall0(rti, pal_scratch);
-
-    syscall1(swpctx, new_pcbb, pal_scratch);
-    syscall1(swpipl, ipl, pal_scratch);
-    /* Ignore swappal */
-    syscall2(tbi, type, addr, pal_scratch);
-    syscall0(whami, pal_scratch);
-    syscall2(wrent, addr, type, pal_scratch);
-    syscall1(wrfen, fen, pal_scratch);
-    syscall1(wripir, ipir, pal_scratch);
-    syscall1(wrkgp, kgp, pal_scratch);
-    syscall1(wrmces, mces, pal_scratch);
-    syscall2(wrperfmon, data1, data2, pal_scratch);
-    syscall1(wrusp, usp, pal_scratch);
-    syscall1(wrval, val, pal_scratch);
-    syscall1(wrvptptr, ptr, pal_scratch);
-    /* Ignore wtint */
-
-#undef pal_scratch
-    
-    /* wrapper functions */
-    static void tbisi(word_t va) 
-	{ tbi(flush_tbisi, va); }
-
-    static void tbisd(word_t va) 
-	{ tbi(flush_tbisd, va); }
-	
-    static void tbis(word_t va) 
-	{ tbi(flush_tbis, va); }
-
-    static void tbiap() 
-	{ tbi((word_t) flush_tbiap, 0); }
-
-    static void tbia() 
-	{ tbi((word_t) flush_tbia, 0); }
-
-};
-
-#endif /* __ARCH__ALPHA__PALCALLS_H__ */
diff --git a/kernel/src/arch/alpha/pgent.h b/kernel/src/arch/alpha/pgent.h
deleted file mode 100644
index bf1bc721..00000000
--- a/kernel/src/arch/alpha/pgent.h
+++ /dev/null
@@ -1,338 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,   University of New South Wales
- *                
- * File path:     arch/alpha/pgent.h
- * Description:   Generic page table manipluation for Alpha
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pgent.h,v 1.21 2004/04/26 17:40:17 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__ALPHA__PGENT_H__
-#define __ARCH__ALPHA__PGENT_H__
-
-#include <kmemory.h>
-#include <debug.h>
-
-#include INC_GLUE(config.h)
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(page.h)
-
-#define MDB_PGSHIFTS           HW_PGSHIFTS
-/* sjw (12/09/2002): ????  */
-#define MDB_NUM_PGSIZES        (NUM_HW_PGSHIFTS - 1)
-
-EXTERN_KMEM_GROUP (kmem_pgtab);
-
-class space_t;
-class mapnode_t;
-
-extern word_t hw_pgshifts[];
-
-class pgent_t
-{
-public:
-    enum pgsize_e {
-	/* PAL supported (in L3) */
-	size_8k = 0,
-	size_64k = 1,
-	size_512k = 2,
-	size_4m = 3,
-
-	size_8m, /* 23 bits */
-	size_8g, /* 33 bits */
-	size_8t, /* 43 bits */
-
-	size_bottomlevel = size_8m,
-/* sjw (30/07/2002): Yuck */
-#if CONFIG_ALPHA_ADDRESS_BITS == 43
-	size_all = size_8t, 
-	size_max = size_8g,
-#else
-	size_256t,
-	size_all = size_256t,
-	size_max = size_8t,
-#endif /* CONFIG_ALPHA_ADDRESS_BITS */
-
-	size_base = size_8k,
-    };
-
-private:
-    union {
-	word_t raw;
-	struct {
-	    unsigned valid           :1;
-	    unsigned fault_on_read   :1;
-	    unsigned fault_on_write  :1;
-	    unsigned fault_on_exec   :1;
-	    unsigned as_match        :1; /* Doubles as the kernel flag */
-	    unsigned granularity     :2; /* pgsize_e, <= size_4m */
-	    unsigned rsv2            :1;
-	    unsigned kre             :1; /* ure <=> kre */
-	    unsigned ure             :1;
-	    unsigned rsv1            :2;
-	    unsigned kwe             :1; /* uwe <=> kwe */
-	    unsigned uwe             :1;
-	    unsigned rsv0            :2;
-	    /* 16 bits reserved for software */
-	    unsigned subtree         :8; /* Makes lookups faster --- can use extb commands */
-	    unsigned unused          :8;
-	    unsigned pfn             :32;
-	} pgent;
-    };
-
-private:
-    // Linknode access 
-
-    /* sjw (30/07/2002):  This will _really_ break if we dont use kseg pte addresses! */
-    u64_t get_linknode (void)
-	{ return *(u64_t *) ((word_t) this + ALPHA_PAGE_SIZE); }
-
-    void set_linknode (u64_t val)
-	{ *(u64_t *) ((word_t) this + ALPHA_PAGE_SIZE) = val; }
-
-    addr_t get_page(void) 
-	{ return (addr_t) ((word_t) pgent.pfn << ALPHA_PAGE_BITS); }
-
-public:
-
-    // Predicates
-    /* sjw (02/08/2002): I think */
-    bool is_valid (space_t * s, pgsize_e pgsize)
-	{ return pgent.valid || (pgent.subtree && pgent.granularity < (word_t) pgsize); }
-    
-    bool is_writable (space_t * s, pgsize_e pgsize)
-	{ return pgent.kwe; }
-    
-    bool is_readable (space_t * s, pgsize_e pgsize)
-	{ return pgent.kre; }
-    
-    bool is_executable (space_t * s, pgsize_e pgsize)
-	{ return pgent.kre; }
-
-    bool is_subtree (space_t * s, pgsize_e pgsize)
-	{ 
-	    /* sjw (02/08/2002): ??? */
-	    if(pgsize >= size_bottomlevel) 
-		return pgent.subtree; 
-	    else
-		return pgent.granularity < (word_t) pgsize;
-	}
-
-    bool is_kernel (space_t * s, pgsize_e pgsize)
-	{ return pgent.as_match; }
-
-    // Retrieval
-    addr_t address (space_t * s, pgsize_e pgsize)
-	{ return addr_mask(get_page(),
-			   ~((1UL << hw_pgshifts[pgsize]) - 1));}
-	
-    pgent_t * subtree (space_t * s, pgsize_e pgsize)
-	{ 
-	    if(pgsize >= size_bottomlevel) 
-		return (pgent_t *) phys_to_virt(get_page()); 
-	    else
-		return (pgent_t *) this;
-	}
-
-    mapnode_t * mapnode (space_t * s, pgsize_e pgsize, addr_t vaddr)
-	{ return (mapnode_t *) (get_linknode() ^ (word_t) vaddr); }
-
-    addr_t vaddr (space_t * s, pgsize_e pgsize, mapnode_t * map)
-	{ return (addr_t) (get_linknode() ^ (word_t) map); }
-
-    word_t reference_bits (space_t * s, pgsize_e pgsize, addr_t vaddr)
-	{
-	    /* sjw (28/07/2002): Note that PAL doesn't touch the page table, so just improvise.  I will
-	     *  use the fault-on-read etc. to implement these later.
-	     */
-	    word_t rwx = 0;
-	    if(pgent.kwe) 
-		rwx = 6;
-	    else if(pgent.kre) 
-		rwx = 4;
-		
-	    return rwx;
-	}
-
-    void update_reference_bits (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    // XXX: Implement me
-	}
-    
-    // Modification
-    void clear (space_t * s, pgsize_e pgsize, bool kernel,  addr_t vaddr)
-	{
-	    raw = 0UL;
-	    if (!kernel)
-		set_linknode(0);
-	}
-
-    void flush (space_t * s, pgsize_e pgsize, bool kernel,  addr_t vaddr)
-	{
-	}
-
-    /* Creates a private PTE */
-    pgent_t create_entry(space_t *s, pgsize_e pgsize, addr_t paddr, bool readable, 
-			 bool writable, bool executable, bool kernel, bool leaf)
-	{
-	    pgent_t tmp;
-	    tmp.raw = 0;
-
-#if defined(CONFIG_SWIZZLE_IO_ADDR)
-	    // Allow bit 40 to select I/O space
-	    if (((word_t)paddr >> 40) & 1)
-		paddr = (addr_t)((word_t)paddr | (1UL << 43));
-#endif
-
-	    tmp.pgent.pfn = (word_t) paddr >> ALPHA_PAGE_BITS;
-	    if(readable) 
-		tmp.pgent.kre = 1;
-
-	    if(writable) 
-		tmp.pgent.kwe = 1;
-
-	    /* Ignore executable */
-	    if(!kernel) {
-		if(leaf) {
-		    tmp.pgent.uwe = tmp.pgent.kwe;
-		    tmp.pgent.ure = tmp.pgent.kre;
-		}
-	    } else {
-		tmp.pgent.as_match = 1;
-	    }
-
-	    /* sjw (02/08/2002): Ugly */
-	    if(leaf) {
-		tmp.pgent.granularity = (word_t) pgsize;
-		tmp.pgent.valid = 1;
-	    } else {
-		if(pgsize < size_bottomlevel)
-		    tmp.pgent.granularity = (word_t) pgsize - 1;
-		else
-		    tmp.pgent.valid = 1;
-
-		tmp.pgent.subtree = true;
-	    }
-
-	    return tmp;
-	}
-
-    void make_subtree (space_t * s, pgsize_e pgsize, bool kernel)
-	{
-	    addr_t page = 0;
-
-	    if(pgsize >= size_bottomlevel) {
-		page = kmem.alloc(kmem_pgtab, kernel ? ALPHA_PAGE_SIZE :
-					 ALPHA_PAGE_SIZE * 2);
-		page = virt_to_phys(page);
-	    }
-	    
-	    raw = create_entry(s, pgsize, page, true, true, false, kernel, false).raw;
-	}
-
-    void remove_subtree (space_t * s, pgsize_e pgsize, bool kernel)
-	{
-	    if(pgsize >= size_bottomlevel) {
-		addr_t ptab = get_page();
-		kmem.free (kmem_pgtab, phys_to_virt(ptab),
-			   kernel ? ALPHA_PAGE_SIZE : ALPHA_PAGE_SIZE * 2);
-	    }
-	    raw = 0;
-	}
-
-    /* This is technically an assignment operator */
-    void set_entry(space_t *space, pgsize_e pgsize, pgent_t pgent)
-	{
-	    raw = pgent.raw;
-	}
-
-    void set_entry (space_t * s, pgsize_e pgsize,
-			   addr_t paddr, bool readable, 
-			   bool writable, bool executable, bool kernel)
-	{
-	    pgent_t tmp, *ptr;
-	    int count;
-
-	    tmp = create_entry(s, pgsize, paddr, readable, writable, executable, kernel, true);
-	    
-	    count = 1 << (pgsize * 3);
-	    
-	    /* Set all entries in the superpage */
-	    for(ptr = this; count > 0; --count) 
-		ptr->raw = tmp.raw;
-	}
-
-    void revoke_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{ if (rwx & 2) { pgent.uwe = pgent.kwe = 0; } }
-
-    /* sjw (28/07/2002):  Do we only update user mappings? */
-    void update_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{ if (rwx & 2) { pgent.kwe = 1; pgent.uwe = 1;} }
-
-    void reset_reference_bits (space_t * s, pgsize_e pgsize)
-	{ /* Do nothing */ }
-
-    void set_linknode (space_t * s, pgsize_e pgsize,
-		       mapnode_t * map, addr_t vaddr)
-	{ set_linknode ((word_t) map ^ (word_t) vaddr); }
-
-    // Movement
-
-    pgent_t * next (space_t * s, pgsize_e pgsize, word_t num)
-	{ 
-	    switch(pgsize) {
-	    case size_64k:
-		return this + 8 * num;
-	    case size_512k:
-		return this + 64 * num;
-	    case size_4m:
-		return this + 512 * num;
-	    case size_8k:
-	    default:
-		return this + num;
-	    }
-	}
-
-    // Debug
-    
-    void print(space_t *s, pgsize_e pgsize, word_t va) 
-	{
-	    printf("0x%lx -> 0x%lx (%d): %d %c%c %s %s %s\n", va, get_page(), pgsize, pgent.granularity, 
-		   pgent.kre ? 'r' : '-',
-		   pgent.kwe ? 'w' : '-',
-		   pgent.valid ? "valid" : "invalid", 
-		   pgent.as_match ? "kernel" : "user", 
-		   pgent.subtree ? "subtree" : "leaf");
-   
-
-	}
-
-    void dump_misc (space_t * s, pgsize_e pgsize)
-	{
-	}
-};
-
-
-#endif /* !__ARCH__ALPHA__PGENT_H__ */
diff --git a/kernel/src/arch/alpha/switch.S b/kernel/src/arch/alpha/switch.S
deleted file mode 100644
index aeac0caf..00000000
--- a/kernel/src/arch/alpha/switch.S
+++ /dev/null
@@ -1,93 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/switch.S
- * Description:   Thread switch asm stubs 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: switch.S,v 1.5 2003/09/24 19:05:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(pal.h)
-
-#define ALPHA_SWITCH_STACK_SIZE (8*8)
-	
-/* sjw (29/07/2002): If this changes, change thread.h as well! */
-#define SAVE_SWITCH_STACK					\
-	/* Need to save S registers (r9 .. r15) and ra (r26) */	\
-	subq	$30, ALPHA_SWITCH_STACK_SIZE, $30;		\
-	stq	$9, 0($30);					\
-	stq	$10, 8($30);					\
-	stq	$11, 16($30);					\
-	stq	$12, 24($30);					\
-	stq	$13, 32($30);					\
-	stq	$14, 40($30);					\
-	stq	$15, 48($30);					\
-	stq	$26, 56($30)
-
-#define RESTORE_SWITCH_STACK				\
-	ldq	$9, 0($30);				\
-	ldq	$10, 8($30);				\
-	ldq	$11, 16($30);				\
-	ldq	$12, 24($30);				\
-	ldq	$13, 32($30);				\
-	ldq	$14, 40($30);				\
-	ldq	$15, 48($30);				\
-	ldq	$26, 56($30);				\
-	addq	$30, ALPHA_SWITCH_STACK_SIZE, $30
-	
-BEGIN_PROC(alpha_switch_to)
-	SAVE_SWITCH_STACK	
-	
-	call_pal PAL_swpctx
-	unop		/* Why have this here? */
-
-	RESTORE_SWITCH_STACK
-	ret	$31, ($26), 1
-END_PROC(alpha_switch_to)
-
-	
-/* So r14 is the func, r15 is the arg.  We can't trash $0 either */ 
-BEGIN_PROC(alpha_return_from_notify)
-	mov	$0, $9		/* Save the pcb in an s reg. */
-	mov	$15, $27	
-	mov	$14, $16
-	mov	$13, $17
-	
-	jsr	$26, ($27), 0
-	
-	mov	$9, $0
-	RESTORE_SWITCH_STACK
-	ret	$31, ($26)		
-END_PROC(alpha_return_from_notify)
-
-/* Just return from the interrupt */
-BEGIN_PROC(alpha_return_to_user)
-	call_pal	PAL_rti
-	unop
-	unop
-	unop
-END_PROC(alpha_return_to_user)
\ No newline at end of file
diff --git a/kernel/src/arch/alpha/thread.h b/kernel/src/arch/alpha/thread.h
deleted file mode 100644
index 3043c566..00000000
--- a/kernel/src/arch/alpha/thread.h
+++ /dev/null
@@ -1,139 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     arch/alpha/thread.h
- * Created:       29/07/2002 17:42:50 by Simon Winwood (sjw)
- * Description:   Generic thread functions 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: thread.h,v 1.9 2005/02/09 11:30:00 ud3 Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__THREAD_H__
-#define __ARCH__ALPHA__THREAD_H__
-
-#include INC_ARCH(types.h)
-
-class alpha_switch_stack_t {
-public:
-    u64_t r9;
-    u64_t r10;
-    u64_t r11;
-    u64_t r12;
-    u64_t r13;
-    u64_t r14;
-    u64_t r15;
-    u64_t ra;
-};
-
-/**
- * Interrupt context of a thread
- *
- * This class contains the interrupt context of a thread which is
- * pushed on the stack.
- **/
-class alpha_context_t {
-public:
-    u64_t ps;
-    u64_t pc;
-    u64_t gp;
-    u64_t a0;
-    u64_t a1;
-    u64_t a2;
-    /* Then the gprs ... see traps.S */
-};
-
-/**
- * Process Control Block
- *
- * This class contains the interrupt context of a thread which is
- * pushed on the stack.
- **/
-class alpha_pcb_t {
-public:
-    u64_t ksp;
-    u64_t usp;
-    u64_t ptbr;
-    u32_t pcc;
-    u32_t asn;
-    u64_t unique;
-    u64_t flags;
-    u64_t reserved1;
-    u64_t reserved2;
-
- public:
-    void clear_fen(void) {
-	this->flags &= ~(1ull);
-    }
-    
-    void set_fen(void) {
-	this->flags |= (1ull);
-    }
-};
-/**
- * Exception Saved registers
- *
- **/
-
-class alpha_savedregs_t {
- public:
-    u64_t r0;
-    u64_t r1;
-    u64_t r2;
-    u64_t r3;
-    u64_t r4;
-    u64_t r5;
-    u64_t r6;
-    u64_t r7;
-    u64_t r8;
-    u64_t r9;
-    u64_t r10;
-    u64_t r11;
-    u64_t r12;
-    u64_t r13;
-    u64_t r14;
-    u64_t r15;
-    u64_t r19;
-    u64_t r20;
-    u64_t r21;
-    u64_t r22;
-    u64_t r23;
-    u64_t r24;
-    u64_t r25;
-    u64_t r26;
-    u64_t r27;
-    u64_t r28;
-};
-
-
-
-/* These functions deal with switching to a thread (and saving its context), and
- * the associated notification functions */
-
-extern "C" word_t alpha_switch_to(word_t pcb_paddr);
-extern "C" void alpha_return_from_notify(void);
-extern "C" void alpha_return_to_user(void);
-
-#endif /* __ARCH__ALPHA__THREAD_H__ */
diff --git a/kernel/src/arch/alpha/types.h b/kernel/src/arch/alpha/types.h
deleted file mode 100644
index 95dc7d89..00000000
--- a/kernel/src/arch/alpha/types.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/types.h
- * Created:       15/07/2002 20:02:58 by Simon Winwood (sjw)
- * Description:   types for alpha 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.2 2003/09/24 19:04:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__TYPES_H__
-#define __ARCH__ALPHA__TYPES_H__
-
-#define L4_64BIT
-#undef  L4_32BIT
-
-typedef unsigned long           u64_t;
-typedef unsigned int		u32_t;
-typedef unsigned short		u16_t;
-typedef unsigned char		u8_t;
-
-typedef signed long             s64_t;
-typedef signed int		s32_t;
-typedef signed short		s16_t;
-typedef signed char		s8_t;
-
-
-/**
- * word_t: machine word wide unsigned int
- */
-typedef u64_t			word_t;
-
-#endif /* __ARCH__ALPHA__TYPES_H__ */
diff --git a/kernel/src/arch/arm/Makeconf b/kernel/src/arch/arm/Makeconf
deleted file mode 100644
index 8281cdbf..00000000
--- a/kernel/src/arch/arm/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/arch/arm/, head.S notify.S fass.cc divsi3.S string.cc)
diff --git a/kernel/src/arch/arm/arm920t/cache.h b/kernel/src/arch/arm/arm920t/cache.h
deleted file mode 100644
index b1d1d03c..00000000
--- a/kernel/src/arch/arm/arm920t/cache.h
+++ /dev/null
@@ -1,140 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arm/arm920t/cache.h
- * Description:   Functions which manipulate the ARM920T cache
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cache.h,v 1.1 2004/08/12 10:58:53 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__ARM__ARM920T__CACHE_H_
-#define __PLATFORM__ARM__ARM920T__CACHE_H_
-
-#include <debug.h>
-
-
-#define CACHE_SIZE	    16386
-#define CACHE_LINE_SIZE	    32
-#define CACHE_SETS	    8
-#define CACHE_WAYS	    64
-
-class arm_cache
-{
-public:
-    /* ARM920T dcache is 16KB,
-     * with 64-way associativity, 8 words per cache line. */
-    static inline void cache_flush(void)
-    {
-    	word_t sets, ways, index;
-	for (sets = 0; sets < CACHE_SETS; sets++)
-	{
-	    for (ways = 0; ways < CACHE_WAYS; ways++)
-	    {
-		index = (sets << 5) | (ways << 26);
-		/* clean and invalidate D cache */
-		__asm__ __volatile (
-		    "   mcr	    p15, 0, %0, c7, c14, 2	\n"
-		    :: "r" (index)
-		);
-	    }
-	}
-
-	__asm__ __volatile__ (
-	    "	mov	r0,	#0		\n"
-	    "	mcr	p15, 0, r0, c7, c5, 0	\n" /* invalidate I caches */
-	    "	mcr	p15, 0, r0, c7, c10, 4	\n" /* drain write buffer */
-	    ::: "r0"
-	);
-    }
-
-    static inline void cache_flush_debug(void)
-    {
-        printf("About to cache flush... ");
-        cache_flush();
-        printf("done.\n");
-    }
-
-    static inline void tlb_flush(void)
-    {
-        __asm__ __volatile__ (
-	    "	 mov	r0,	#0		\n"
-            "    mcr	p15, 0, r0, c8, c7, 0	\n"
-	    ::: "r0"
-	); 
-    }
-
-    static inline void tlb_flush_ent(addr_t vaddr, word_t log2size)
-    {
-	word_t a = (word_t)vaddr;
-
-        __asm__ __volatile__ (
-	    "	mov	r0,	#0		\n"
-	    "	mcr     p15, 0, r0, c8, c5, 0	\n"	/* Invalidate I TLB */
-	    ::: "r0"
-	); 
-	for (word_t i=0; i < (1ul << log2size); i += ARM_PAGE_SIZE)
-	{
-	    __asm__ __volatile__ (
-		"   mcr	p15, 0, %0, c8, c6, 1    \n"	/* Invalidate D TLB entry */
-		:: "r" (a)
-	    );
-	    a += ARM_PAGE_SIZE;
-	}
-    }
-
-    static inline void tlb_flush_debug(void)
-    {
-        printf("About to TLB flush... ");
-        tlb_flush();
-        printf("done.\n");
-    }
-
-    static inline void cache_invalidate(word_t target)
-    {
-        __asm__ __volatile__ (
-            "mcr p15, 0, %0, c7, c6, 1 \n"
-	    :: "r" (target)
-	);
-    }
-
-    static inline void cache_invalidate_d()
-    {
-        __asm__ __volatile__ (
-            "mcr p15, 0, r0, c7, c6, 0 \n"
-        ::: "r0"
-	);
-    }
-
-    static inline void cache_clean(word_t target)
-    {
-        __asm__ __volatile__ (
-            "mcr p15, 0, %0, c7, c10, 1 \n"
-	    :: "r" (target)
-	);
-    }
-};
-
-#endif /* __PLATFORM__ARM__ARM920T__CACHE_H_ */
diff --git a/kernel/src/arch/arm/arm920t/cpu.h b/kernel/src/arch/arm/arm920t/cpu.h
deleted file mode 100644
index 95e5e704..00000000
--- a/kernel/src/arch/arm/arm920t/cpu.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/arm920t/cpu.h
- * Description:   ARM920T CPU control functions
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cpu.h,v 1.1 2004/08/12 10:58:53 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__ARM920T__CPU_H_
-#define __ARCH__ARM__ARM920T__CPU_H_
-
-class arm_cpu
-{
-public:
-    static inline void cli(void)
-    {
-	__asm__  __volatile__ (
-	    "        mrs     r0,     cpsr          \n"
-	    "        orr     r0,     r0,     #0xd0 \n"
-	    "        msr     cpsr_c, r0            \n"
-	::: "r0");
-    }
-
-    static inline void sti(void)
-    {
-	__asm__  __volatile__ (
-	    "        mrs     r0,     cpsr          \n"
-	    "        and     r0,     r0,     #0x1f \n"
-	    "        msr     cpsr_c, r0            \n"
-	::: "r0");
-    }
-
-    static inline void sleep(void)
-    {
-	/* Issue Wait-Interrupt instruction */
-        __asm__ __volatile__ (
-	    "	 mov	r0,	#0		\n"
-            "    mcr	p15, 0, r0, c7, c0, 4	\n"
-	    ::: "r0"
-	); 
-    }
-};
-
-#endif /* __ARCH__ARM__ARM920T__CPU_H_ */
diff --git a/kernel/src/arch/arm/arm920t/syscon.h b/kernel/src/arch/arm/arm920t/syscon.h
deleted file mode 100644
index 00660f0d..00000000
--- a/kernel/src/arch/arm/arm920t/syscon.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     arch/arm/omap1510/syscon.h
- * Description:   TI OMAP1510 coprocessor-15 definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscon.h,v 1.1 2004/08/12 10:58:53 cvansch Exp $
- *                
- ********************************************************************/
-
-
-#ifndef _ARCH_ARM_SA1100_SYSCON_H_
-#define _ARCH_ARM_SA1100_SYSCON_H_
-
-/* Coprocessor 15 */
-#define CP15			p15
-
-/* Primary CP15 registers (CRn) */
-#define C15_id			c0
-#define C15_control		c1
-#define C15_ttbase		c2
-#define C15_domain		c3
-#define C15_fault_status	c5
-#define C15_fault_addr		c6
-#define C15_cache_con		c7
-#define C15_tlb			c8
-#define C15_read_buf		c9
-#define C15_pid			c13
-#define C15_breakpoints		c14
-#define C15_function		c15
-
-/* Default secondary register (CRm) */
-#define C15_CRm_default		c0
-/* Default opcode2 register (opcode2) */
-#define C15_OP2_default		0
-
-/* CP15 - Control Register */
-#define C15_CONTROL_FIXED	0x0070
-#define C15_CONTROL_M		0x0001			/* Memory management enable	*/
-#define C15_CONTROL_A		0x0002			/* Alignment fault enable	*/
-#define C15_CONTROL_C		0x0004			/* Data cache enable		*/
-#define C15_CONTROL_B		0x0080			/* Big endian enable		*/
-#define C15_CONTROL_S		0x0100			/* System access checks in MMU	*/
-#define C15_CONTROL_R		0x0200			/* ROM access checks in MMU	*/
-#define C15_CONTROL_I		0x1000			/* Instruction cache enable	*/
-#define C15_CONTROL_X		0x2000			/* Remap interrupt vector	*/
-#define C15_CONTROL_RR		0x4000			/* Round Robin Replacement	*/
-#define C15_CONTROL_CK_FB	0x00000000		/* Clocking: Fast Bus		*/
-#define C15_CONTROL_CK_Sync	0x40000000		/* Clocking: Synchronous	*/
-#define C15_CONTROL_CK_ASync	0xc0000000		/* Clocking: Asynchronous	*/
-
-/* Default to little endian */
-#define C15_CONTROL_INIT	(C15_CONTROL_FIXED)
-/* Kernel mode - little endian, cached, write buffer, remap to 0xffff0000 */
-#define C15_CONTROL_KERNEL	(C15_CONTROL_FIXED | C15_CONTROL_M | C15_CONTROL_C | \
-				 C15_CONTROL_S | C15_CONTROL_I | C15_CONTROL_X | C15_CONTROL_CK_FB)
-
-#if !defined(ASSEMBLY)
-
-#define _INS_(x) #x
-#define STR(x) _INS_(x)
-
-/* Read from coprocessor 15 register */
-#define read_cp15_register(CRn, CRm, op2)	\
-({ word_t _read;				\
-    __asm__ __volatile__ (			\
-    "mrc    p15, 0, %0,"STR(CRn)",			\
-    "STR(CRm)","STR(op2)";\n"			\
-    : "=r" (_read));				\
-    _read;})
-
-/* Write to coprocessor 15 register */
-#define write_cp15_register(CRn, CRm, op2, val)	\
-    __asm__ __volatile__ (			\
-    "mcr    p15, 0, %0,"STR(CRn)",			\
-    "STR(CRm)","STR(op2)";\n"			\
-    :: "r" (val));				\
-
-#endif
-
-#define CPWAIT
-
-#endif /*_ARCH_ARM_SA1100_SYSCON_H_*/
diff --git a/kernel/src/arch/arm/asm.h b/kernel/src/arch/arm/asm.h
deleted file mode 100644
index 9dca743f..00000000
--- a/kernel/src/arch/arm/asm.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     arch/arm/asm.h
- * Description:   Assembler macros etc. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.4 2004/12/02 00:15:07 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ARM__ASM_H__
-#define __ARCH__ARM__ASM_H__
-
-#define BEGIN_PROC(name)			\
-    .global name; 				\
-    .align;					\
-name:
-
-#define END_PROC(name)				\
-    ;
-
-#define CHECK_ARG(a, b)				\
-	"   .ifnc " a ", " b "	\n"		\
-	"   .err		\n"		\
-	"   .endif		\n"		\
-
-#endif /* __ARCH__ARM__ASM_H__ */
diff --git a/kernel/src/arch/arm/bootdesc.h b/kernel/src/arch/arm/bootdesc.h
deleted file mode 100644
index e867666b..00000000
--- a/kernel/src/arch/arm/bootdesc.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/bootdesc.h
- * Description:   Arm boot memory descriptors
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: bootdesc.h,v 1.1 2004/08/13 10:49:24 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__BOOTDESC_H__
-#define __ARCH__ARM__BOOTDESC_H__
-
-/*
- * ARM bootup memory descriptors.
- * Last entry should have type == 0
- */
-struct arm_bootdesc {
-    word_t start;
-    word_t end;
-    word_t type;
-};
-
-#endif /* __ARCH__ARM__BOOTDESC_H__ */
diff --git a/kernel/src/arch/arm/debug.h b/kernel/src/arch/arm/debug.h
deleted file mode 100644
index 8d2bb9d9..00000000
--- a/kernel/src/arch/arm/debug.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     arch/arm/debug.h
- * Description:   Debug support
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: debug.h,v 1.7 2004/06/04 02:14:22 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ARM__DEBUG_H__
-#define __ARCH__ARM__DEBUG_H__
-
-#include INC_GLUE(syscalls.h)
-#include INC_GLUE(debug.h)
-
-
-INLINE int spin_forever(int pos = 0)
-{
-    while(1) { asm ("mov        r0, r0          \n"); }
-    return 0;
-}
-
-INLINE void spin(int pos = 0, int cpu = 0)
-{
-}
-
-
-#define HERE()               printf("Here %s:%d\n", __PRETTY_FUNCTION__, __LINE__)
-
-#endif /* __ARCH__ARM__DEBUG_H__ */
diff --git a/kernel/src/arch/arm/divsi3.S b/kernel/src/arch/arm/divsi3.S
deleted file mode 100644
index e2dedfe6..00000000
--- a/kernel/src/arch/arm/divsi3.S
+++ /dev/null
@@ -1,403 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     arch/arm/divsi3.S
- * Description:   integer divide functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: divsi3.S,v 1.2 2004/06/04 03:30:02 cvansch Exp $
- *                
- ********************************************************************/
-
-/*	NetBSD: divsi3.S,v 1.6 1999/09/21 09:43:39 is Exp 	*/
-
-/*
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include INC_ARCH(asm.h)
-
-BEGIN_PROC(__umodsi3)
-	stmfd	sp!, {lr}
-	bl	L_udivide
-	mov	r0, r1
-	ldmfd	sp!, {pc}
-
-BEGIN_PROC(__modsi3)
-	stmfd	sp!, {lr}
-	bl	L_divide
-	mov	r0, r1
-	ldmfd	sp!, {pc}
-
-L_overflow:
-	/* XXX should cause a fatal error */
-	mvn	r0, #0
-	mov	pc, lr
-
-BEGIN_PROC(__udivsi3)
-L_udivide:				/* r0 = r0 / r1; r1 = r0 % r1 */
-	eor     r0, r1, r0 
-	eor     r1, r0, r1 
-	eor     r0, r1, r0 
-					/* r0 = r1 / r0; r1 = r1 % r0 */
-	cmp	r0, #1
-	bcc	L_overflow
-	beq	L_divide_l0
-	mov	ip, #0
-	movs	r1, r1
-	bpl	L_divide_l1
-	orr	ip, ip, #0x20000000	/* ip bit 0x20000000 = -ve r1 */
-	movs	r1, r1, lsr #1
-	orrcs	ip, ip, #0x10000000	/* ip bit 0x10000000 = bit 0 of r1 */
-	b	L_divide_l1
-
-L_divide_l0:				/* r0 == 1 */
-	mov	r0, r1
-	mov	r1, #0
-	mov	pc, lr
-
-BEGIN_PROC(__divsi3)
-L_divide:				/* r0 = r0 / r1; r1 = r0 % r1 */
-	eor     r0, r1, r0 
-	eor     r1, r0, r1 
-	eor     r0, r1, r0 
-					/* r0 = r1 / r0; r1 = r1 % r0 */
-	cmp	r0, #1
-	bcc	L_overflow
-	beq	L_divide_l0
-	ands	ip, r0, #0x80000000
-	rsbmi	r0, r0, #0
-	ands	r2, r1, #0x80000000
-	eor	ip, ip, r2
-	rsbmi	r1, r1, #0
-	orr	ip, r2, ip, lsr #1	/* ip bit 0x40000000 = -ve division */
-					/* ip bit 0x80000000 = -ve remainder */
-
-L_divide_l1:
-	mov	r2, #1
-	mov	r3, #0
-
-	/*
-	 * If the highest bit of the dividend is set, we have to be
-	 * careful when shifting the divisor. Test this. 
-	 */
-	movs	r1,r1
-	bpl	L_old_code
-
-	/*
-	 * At this point, the highest bit of r1 is known to be set.
-	 * We abuse this below in the tst instructions.
-	 */
-	tst	r1, r0 /*, lsl #0 */
-	bmi	L_divide_b1
-	tst	r1, r0, lsl #1
-	bmi	L_divide_b2
-	tst	r1, r0, lsl #2
-	bmi	L_divide_b3
-	tst	r1, r0, lsl #3
-	bmi	L_divide_b4
-	tst	r1, r0, lsl #4
-	bmi	L_divide_b5
-	tst	r1, r0, lsl #5
-	bmi	L_divide_b6
-	tst	r1, r0, lsl #6
-	bmi	L_divide_b7
-	tst	r1, r0, lsl #7
-	bmi	L_divide_b8
-	tst	r1, r0, lsl #8
-	bmi	L_divide_b9
-	tst	r1, r0, lsl #9
-	bmi	L_divide_b10
-	tst	r1, r0, lsl #10
-	bmi	L_divide_b11
-	tst	r1, r0, lsl #11
-	bmi	L_divide_b12
-	tst	r1, r0, lsl #12
-	bmi	L_divide_b13
-	tst	r1, r0, lsl #13
-	bmi	L_divide_b14
-	tst	r1, r0, lsl #14
-	bmi	L_divide_b15
-	tst	r1, r0, lsl #15
-	bmi	L_divide_b16
-	tst	r1, r0, lsl #16
-	bmi	L_divide_b17
-	tst	r1, r0, lsl #17
-	bmi	L_divide_b18
-	tst	r1, r0, lsl #18
-	bmi	L_divide_b19
-	tst	r1, r0, lsl #19
-	bmi	L_divide_b20
-	tst	r1, r0, lsl #20
-	bmi	L_divide_b21
-	tst	r1, r0, lsl #21
-	bmi	L_divide_b22
-	tst	r1, r0, lsl #22
-	bmi	L_divide_b23
-	tst	r1, r0, lsl #23
-	bmi	L_divide_b24
-	tst	r1, r0, lsl #24
-	bmi	L_divide_b25
-	tst	r1, r0, lsl #25
-	bmi	L_divide_b26
-	tst	r1, r0, lsl #26
-	bmi	L_divide_b27
-	tst	r1, r0, lsl #27
-	bmi	L_divide_b28
-	tst	r1, r0, lsl #28
-	bmi	L_divide_b29
-	tst	r1, r0, lsl #29
-	bmi	L_divide_b30
-	tst	r1, r0, lsl #30
-	bmi	L_divide_b31
-/*
- * instead of:
- *	tst	r1, r0, lsl #31
- *	bmi	L_divide_b32
- */
-	b	L_divide_b32
-
-L_old_code:
-	cmp	r1, r0
-	bcc	L_divide_b0
-	cmp	r1, r0, lsl #1
-	bcc	L_divide_b1
-	cmp	r1, r0, lsl #2
-	bcc	L_divide_b2
-	cmp	r1, r0, lsl #3
-	bcc	L_divide_b3
-	cmp	r1, r0, lsl #4
-	bcc	L_divide_b4
-	cmp	r1, r0, lsl #5
-	bcc	L_divide_b5
-	cmp	r1, r0, lsl #6
-	bcc	L_divide_b6
-	cmp	r1, r0, lsl #7
-	bcc	L_divide_b7
-	cmp	r1, r0, lsl #8
-	bcc	L_divide_b8
-	cmp	r1, r0, lsl #9
-	bcc	L_divide_b9
-	cmp	r1, r0, lsl #10
-	bcc	L_divide_b10
-	cmp	r1, r0, lsl #11
-	bcc	L_divide_b11
-	cmp	r1, r0, lsl #12
-	bcc	L_divide_b12
-	cmp	r1, r0, lsl #13
-	bcc	L_divide_b13
-	cmp	r1, r0, lsl #14
-	bcc	L_divide_b14
-	cmp	r1, r0, lsl #15
-	bcc	L_divide_b15
-	cmp	r1, r0, lsl #16
-	bcc	L_divide_b16
-	cmp	r1, r0, lsl #17
-	bcc	L_divide_b17
-	cmp	r1, r0, lsl #18
-	bcc	L_divide_b18
-	cmp	r1, r0, lsl #19
-	bcc	L_divide_b19
-	cmp	r1, r0, lsl #20
-	bcc	L_divide_b20
-	cmp	r1, r0, lsl #21
-	bcc	L_divide_b21
-	cmp	r1, r0, lsl #22
-	bcc	L_divide_b22
-	cmp	r1, r0, lsl #23
-	bcc	L_divide_b23
-	cmp	r1, r0, lsl #24
-	bcc	L_divide_b24
-	cmp	r1, r0, lsl #25
-	bcc	L_divide_b25
-	cmp	r1, r0, lsl #26
-	bcc	L_divide_b26
-	cmp	r1, r0, lsl #27
-	bcc	L_divide_b27
-	cmp	r1, r0, lsl #28
-	bcc	L_divide_b28
-	cmp	r1, r0, lsl #29
-	bcc	L_divide_b29
-	cmp	r1, r0, lsl #30
-	bcc	L_divide_b30
-L_divide_b32:
-	cmp	r1, r0, lsl #31
-	subhs	r1, r1,r0, lsl #31
-	addhs	r3, r3,r2, lsl #31
-L_divide_b31:
-	cmp	r1, r0, lsl #30
-	subhs	r1, r1,r0, lsl #30
-	addhs	r3, r3,r2, lsl #30
-L_divide_b30:
-	cmp	r1, r0, lsl #29
-	subhs	r1, r1,r0, lsl #29
-	addhs	r3, r3,r2, lsl #29
-L_divide_b29:
-	cmp	r1, r0, lsl #28
-	subhs	r1, r1,r0, lsl #28
-	addhs	r3, r3,r2, lsl #28
-L_divide_b28:
-	cmp	r1, r0, lsl #27
-	subhs	r1, r1,r0, lsl #27
-	addhs	r3, r3,r2, lsl #27
-L_divide_b27:
-	cmp	r1, r0, lsl #26
-	subhs	r1, r1,r0, lsl #26
-	addhs	r3, r3,r2, lsl #26
-L_divide_b26:
-	cmp	r1, r0, lsl #25
-	subhs	r1, r1,r0, lsl #25
-	addhs	r3, r3,r2, lsl #25
-L_divide_b25:
-	cmp	r1, r0, lsl #24
-	subhs	r1, r1,r0, lsl #24
-	addhs	r3, r3,r2, lsl #24
-L_divide_b24:
-	cmp	r1, r0, lsl #23
-	subhs	r1, r1,r0, lsl #23
-	addhs	r3, r3,r2, lsl #23
-L_divide_b23:
-	cmp	r1, r0, lsl #22
-	subhs	r1, r1,r0, lsl #22
-	addhs	r3, r3,r2, lsl #22
-L_divide_b22:
-	cmp	r1, r0, lsl #21
-	subhs	r1, r1,r0, lsl #21
-	addhs	r3, r3,r2, lsl #21
-L_divide_b21:
-	cmp	r1, r0, lsl #20
-	subhs	r1, r1,r0, lsl #20
-	addhs	r3, r3,r2, lsl #20
-L_divide_b20:
-	cmp	r1, r0, lsl #19
-	subhs	r1, r1,r0, lsl #19
-	addhs	r3, r3,r2, lsl #19
-L_divide_b19:
-	cmp	r1, r0, lsl #18
-	subhs	r1, r1,r0, lsl #18
-	addhs	r3, r3,r2, lsl #18
-L_divide_b18:
-	cmp	r1, r0, lsl #17
-	subhs	r1, r1,r0, lsl #17
-	addhs	r3, r3,r2, lsl #17
-L_divide_b17:
-	cmp	r1, r0, lsl #16
-	subhs	r1, r1,r0, lsl #16
-	addhs	r3, r3,r2, lsl #16
-L_divide_b16:
-	cmp	r1, r0, lsl #15
-	subhs	r1, r1,r0, lsl #15
-	addhs	r3, r3,r2, lsl #15
-L_divide_b15:
-	cmp	r1, r0, lsl #14
-	subhs	r1, r1,r0, lsl #14
-	addhs	r3, r3,r2, lsl #14
-L_divide_b14:
-	cmp	r1, r0, lsl #13
-	subhs	r1, r1,r0, lsl #13
-	addhs	r3, r3,r2, lsl #13
-L_divide_b13:
-	cmp	r1, r0, lsl #12
-	subhs	r1, r1,r0, lsl #12
-	addhs	r3, r3,r2, lsl #12
-L_divide_b12:
-	cmp	r1, r0, lsl #11
-	subhs	r1, r1,r0, lsl #11
-	addhs	r3, r3,r2, lsl #11
-L_divide_b11:
-	cmp	r1, r0, lsl #10
-	subhs	r1, r1,r0, lsl #10
-	addhs	r3, r3,r2, lsl #10
-L_divide_b10:
-	cmp	r1, r0, lsl #9
-	subhs	r1, r1,r0, lsl #9
-	addhs	r3, r3,r2, lsl #9
-L_divide_b9:
-	cmp	r1, r0, lsl #8
-	subhs	r1, r1,r0, lsl #8
-	addhs	r3, r3,r2, lsl #8
-L_divide_b8:
-	cmp	r1, r0, lsl #7
-	subhs	r1, r1,r0, lsl #7
-	addhs	r3, r3,r2, lsl #7
-L_divide_b7:
-	cmp	r1, r0, lsl #6
-	subhs	r1, r1,r0, lsl #6
-	addhs	r3, r3,r2, lsl #6
-L_divide_b6:
-	cmp	r1, r0, lsl #5
-	subhs	r1, r1,r0, lsl #5
-	addhs	r3, r3,r2, lsl #5
-L_divide_b5:
-	cmp	r1, r0, lsl #4
-	subhs	r1, r1,r0, lsl #4
-	addhs	r3, r3,r2, lsl #4
-L_divide_b4:
-	cmp	r1, r0, lsl #3
-	subhs	r1, r1,r0, lsl #3
-	addhs	r3, r3,r2, lsl #3
-L_divide_b3:
-	cmp	r1, r0, lsl #2
-	subhs	r1, r1,r0, lsl #2
-	addhs	r3, r3,r2, lsl #2
-L_divide_b2:
-	cmp	r1, r0, lsl #1
-	subhs	r1, r1,r0, lsl #1
-	addhs	r3, r3,r2, lsl #1
-L_divide_b1:
-	cmp	r1, r0
-	subhs	r1, r1, r0
-	addhs	r3, r3, r2
-L_divide_b0:
-
-	tst	ip, #0x20000000
-	bne	L_udivide_l1
-	mov	r0, r3
-	cmp	ip, #0
-	rsbmi	r1, r1, #0
-	movs	ip, ip, lsl #1
-	bicmi	r0, r0, #0x80000000	/* Fix incase we divided 0x80000000 */
-	rsbmi	r0, r0, #0
-	mov	pc, lr
-
-L_udivide_l1:
-	tst	ip, #0x10000000
-	mov	r1, r1, lsl #1
-	orrne	r1, r1, #1
-	mov	r3, r3, lsl #1
-	cmp	r1, r0
-	subhs	r1, r1, r0
-	addhs	r3, r3, r2
-	mov	r0, r3
-	mov	pc, lr
diff --git a/kernel/src/arch/arm/fass.cc b/kernel/src/arch/arm/fass.cc
deleted file mode 100644
index 8f9d7ff1..00000000
--- a/kernel/src/arch/arm/fass.cc
+++ /dev/null
@@ -1,151 +0,0 @@
-/********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/fass.c
- * Description:   FASS functionality
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: fass.cc,v 1.13 2004/09/08 08:35:25 cvansch Exp $
- *
- ********************************************************************/
-
-#ifdef CONFIG_ENABLE_FASS
-
-#include INC_API(space.h)
-#include INC_ARCH(fass.h)
-#include INC_API(tcb.h)
-#include <kdb/tracepoints.h>
-
-DECLARE_TRACEPOINT(ARM_FASS_RECYCLE);
-
-arm_fass_t arm_fass;
-
-void arm_fass_t::init(void)
-{
-    arm_fass.domain_space[0] = get_kernel_space();
-    get_kernel_space()->set_domain(0);
-    next_rr = 1;
-}
-
-void arm_fass_t::add_set(arm_domain_t domain, word_t section)
-{
-    ASSERT(domain < ARM_DOMAINS);
-
-    cpd_set[domain][CPD_BITFIELD_POS(section)] |= 
-            (1 << CPD_BITFIELD_OFFSET(section));
-}
-
-void arm_fass_t::remove_set(arm_domain_t domain, word_t section)
-{
-    ASSERT(domain < ARM_DOMAINS);
-
-    cpd_set[domain][CPD_BITFIELD_POS(section)] &= 
-            ~(1 << CPD_BITFIELD_OFFSET(section));
-}
-
-void arm_fass_t::clean_all(void)
-{
-    domain_dirty = utcb_dirty = 0;
-
-    arm_cache::cache_flush();
-    arm_cache::tlb_flush();
-}
-
-/* Chose a domain to replace - select a clean domain if available, otherwise
- * use round-robin. Should consider using a more sophisticated selection if
- * it will buy anything (for example, consider the number of CPD slots used by
- * the domains). Also, should consider moving this to user-level.
- */ 
-int arm_fass_t::replacement_domain(void)
-{
-    unsigned int i;
-
-    for (i = 1; i < ARM_DOMAINS; ++i)
-        if (!TEST_BIT_WORD(domain_dirty, i))
-            return i;
-
-    do {
-	i = next_rr;
-
-	next_rr = (next_rr + 1) % ARM_DOMAINS;
-	next_rr = next_rr ? next_rr : 1;	/* Can't use domain 0 */
-    } while (i == current_domain);
-
-    return i;
-}
-
-arm_domain_t arm_fass_t::domain_recycle(space_t *space)
-{
-    arm_domain_t target;
-
-    TRACEPOINT(ARM_FASS_RECYCLE,
-        printf("Recycling domain for %x\n", space));
-
-    target = replacement_domain();
-
-    if (domain_space[target])
-        domain_space[target]->set_domain(INVALID_DOMAIN);
-
-    space->set_domain(target);
-
-    domain_space[target] = space;
-
-    /* Remove the elements in the CPD belonging to the domain to be
-     * recycled.
-     */
-    for (unsigned int i = 0, j; i < CPD_BITFIELD_ARRAY_SIZE; ++i) {
-        if ((j = cpd_set[target][i]))
-            for (unsigned int k = 0; k < CPD_BITFIELD_WORD_SIZE; ++k)
-                if (j & (1 << k)) {
-                    word_t section = i * CPD_BITFIELD_WORD_SIZE + k;
-
-                    cpd->pt.pdir[section].clear(cpd, pgent_t::size_1m, true);
-                }
-
-        cpd_set[target][i] = 0;
-    }
-
-    if (TEST_BIT_WORD(domain_dirty, target))
-        clean_all();
-
-    return target;
-}
-
-space_t *arm_fass_t::get_space(arm_domain_t domain)
-{
-    if (domain == INVALID_DOMAIN)
-        return NULL;
-
-    return domain_space[domain];
-}
-
-void arm_fass_t::set_space(arm_domain_t domain, space_t *space)
-{
-    if (domain != INVALID_DOMAIN)
-        domain_space[domain] = space;
-}
-
-
-
-#endif /* CONFIG_ENABLE_FASS */
diff --git a/kernel/src/arch/arm/fass.h b/kernel/src/arch/arm/fass.h
deleted file mode 100644
index c392b33c..00000000
--- a/kernel/src/arch/arm/fass.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/fass.h
- * Description:   FASS functions and defines
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: fass.h,v 1.10 2004/09/08 08:38:58 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__FASS_H__
-#define __ARCH__ARM__FASS_H__
-
-#define ARM_DOMAINS    16
-
-#define KERNEL_DOMAIN  0
-#define INVALID_DOMAIN ARM_DOMAINS
-
-#if !defined(ASSEMBLY)
-
-typedef unsigned int arm_domain_t;
-typedef unsigned char arm_pid_t;
-
-class space_t;
-extern space_t *cpd;
-
-#define SET_BIT_WORD(w,n)  ((w) = (w) | (1 << (n)))
-#define TEST_BIT_WORD(w,n) ((w) & (1 << (n)))
-
-extern unsigned int utcb_dirty;
-extern unsigned int domain_dirty;
-extern unsigned int current_domain;
-extern unsigned int current_pid;
-
-typedef unsigned int cpd_bitfield_t;
-
-#define CPD_BITFIELD_WORD_SIZE (8*sizeof(cpd_bitfield_t))
-#define CPD_BITFIELD_ARRAY_SIZE ((1 << ARM_SECTION_BITS) /  \
-        CPD_BITFIELD_WORD_SIZE)
-
-#define CPD_BITFIELD_POS(section) (section / CPD_BITFIELD_WORD_SIZE)
-#define CPD_BITFIELD_OFFSET(section) (section % CPD_BITFIELD_WORD_SIZE)
-
-class arm_fass_t {
-public:
-    void init(void);
-    void clean_all(void);
-    void add_set(arm_domain_t domain, word_t section);
-    void remove_set(arm_domain_t domain, word_t section);
-    int set_member(arm_domain_t domain, word_t section);
-    void activate_domain(space_t *space);
-    space_t *get_space(arm_domain_t domain);
-    void set_space(arm_domain_t domain, space_t *space);
-
-private:
-    int replacement_domain(void);
-    arm_domain_t domain_recycle(space_t *space);
-
-private:
-    cpd_bitfield_t cpd_set[ARM_DOMAINS][CPD_BITFIELD_ARRAY_SIZE];
-    space_t *domain_space[ARM_DOMAINS];
-    unsigned int next_rr;
-};
-
-extern arm_fass_t arm_fass;
-#endif
-
-#endif /* __ARCH__ARM__FASS_H__ */
diff --git a/kernel/src/arch/arm/fass_inline.h b/kernel/src/arch/arm/fass_inline.h
deleted file mode 100644
index 7c6f8b38..00000000
--- a/kernel/src/arch/arm/fass_inline.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/fass_inline.h
- * Description:   FASS inline functions (needed to break circular dependency)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: fass_inline.h,v 1.4 2004/06/04 02:14:22 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__FASS_INLINE_H__
-#define __ARCH__ARM__FASS_INLINE_H__
-
-#ifdef CONFIG_ENABLE_FASS
-
-#include INC_ARCH(fass.h)
-#include INC_API(space.h)
-
-INLINE int arm_fass_t::set_member(arm_domain_t domain, word_t section)
-{
-    return cpd_set[domain][CPD_BITFIELD_POS(section)] &
-            (1 << CPD_BITFIELD_OFFSET(section));
-}
-
-INLINE void arm_fass_t::activate_domain(space_t *space)
-{
-    /* Don't need to switch domains as we're still inside the kernel if
-     * !space.
-     */
-    if (EXPECT_FALSE(space == NULL)) {
-        current_domain = KERNEL_DOMAIN;
-        return;
-    }
-
-    arm_domain_t target = space->get_domain();
-
-    if (EXPECT_FALSE(target == INVALID_DOMAIN)) 
-        target = domain_recycle(space);
-
-    SET_BIT_WORD(domain_dirty, target);
-    current_domain = target;
-    current_pid = space->get_pid();
-}
-
-#endif
-
-#endif /* __ARCH__ARM__FASS_INLINE_H__ */
diff --git a/kernel/src/arch/arm/head.S b/kernel/src/arch/arm/head.S
deleted file mode 100644
index 6a65147f..00000000
--- a/kernel/src/arch/arm/head.S
+++ /dev/null
@@ -1,60 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:      arch/arm/head.S
- * Description:    The kernels entry point
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: head.S,v 1.9 2004/12/02 22:02:16 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_CPU(syscon.h)
-
-/* This is the entry point of the L4Ka::Pistachio ARM architecture.
- * The boot loader must call _start with the processor in privileged
- * mode and translation disabled.
- */
-	.section .init.head
-BEGIN_PROC(_start)
-	/* Setup status register for supervisor mode, interrupts disabled */
-	msr	cpsr,	#0xd3
-
-	/* Setup the CP15 control register to a known initial state */
-	ldr	r0,	=C15_CONTROL_INIT
-	mcr	CP15, 0, r0, C15_control, c0
-
-	/* Setup boot stack (physical address) */
-	ldr	sp,	_kernel_init_stack
-
-	/* Jump	to startup_system */
-	bl	startup_system
-
-	/* NOT REACHED */
-1:
-	b	1b
- 
-_kernel_init_stack:
-	.word	_bootstack_top_phys
diff --git a/kernel/src/arch/arm/notify.S b/kernel/src/arch/arm/notify.S
deleted file mode 100644
index 2e456ad2..00000000
--- a/kernel/src/arch/arm/notify.S
+++ /dev/null
@@ -1,62 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:      arch/arm/notify.S
- * Description:    Thread notify function helper
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: notify.S,v 1.3 2004/06/04 03:30:02 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_ARCH(thread.h)
-#include INC_GLUE(syscalls.h)
-#include INC_ARCH(asm.h)
-
-.global arm_return_from_notify0
-.global arm_return_from_notify1
-.global arm_return_from_notify2
-.align 4
-
-BEGIN_PROC(arm_return_from_notify2)
-    mov     r1,     r11
-BEGIN_PROC(arm_return_from_notify1)
-    mov     r0,     r5
-BEGIN_PROC(arm_return_from_notify0)
-    mov     lr,     pc
-    mov     pc,     r4
-   
-    /* Restore switch stack */ 
-    ldmfd   sp!,    {r4, r5, r11, pc} 
-
-END_PROC(arm_return_from_notify0);
-END_PROC(arm_return_from_notify1);
-END_PROC(arm_return_from_notify2);
-
-/* Initial jump to a user thread */
-BEGIN_PROC(arm_initial_to_user)
-        SET_USER_DACR
-        RESTORE_ALL 
-        movs    pc,     lr
-END_PROC(arm_initial_to_user)
diff --git a/kernel/src/arch/arm/omap1510/cache.h b/kernel/src/arch/arm/omap1510/cache.h
deleted file mode 100644
index 801c011c..00000000
--- a/kernel/src/arch/arm/omap1510/cache.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arm/omap1510/cache.h
- * Description:   Functions which manipulate the OMAP1510 cache
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cache.h,v 1.2 2004/06/04 02:14:23 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__ARM__OMAP1510__CACHE_H_
-#define __PLATFORM__ARM__OMAP1510__CACHE_H_
-
-#include <debug.h>
-
-
-#define CACHE_SIZE	    8192
-#define CACHE_LINE_SIZE	    16
-
-class arm_cache
-{
-public:
-    /* OMAP1510 dcache is 8KB write back, no lock-down, Harvard cache,
-     * with 2-way associativity, 4 words per cache line. */
-    static inline void cache_flush(void)
-    {
-
-    	word_t index;
-	for (index = 0; index < CACHE_SIZE; index += CACHE_LINE_SIZE)
-	{
-	    /* clean and invalidate D cache */
-	    __asm__ __volatile (
-		"   mcr	    p15, 0, %0, c7, c14, 2	\n"
-		:: "r" (index)
-	    );
-	}
-
-	__asm__ __volatile__ (
-	    "	mov	r0,	#0		\n"
-	    "	mcr	p15, 0, r0, c7, c5, 0	\n" /* invalidate I caches */
-	    "	mcr	p15, 0, r0, c7, c10, 4	\n" /* drain write buffer */
-	    ::: "r0"
-	);
-    }
-
-    static inline void cache_flush_debug(void)
-    {
-        printf("About to cache flush... ");
-        cache_flush();
-        printf("done.\n");
-    }
-
-    static inline void tlb_flush(void)
-    {
-        __asm__ __volatile__ (
-	    "	 mov	r0,	#0		\n"
-            "    mcr     p15, 0, r0, c8, c7, 0	\n"
-	    ::: "r0"
-	); 
-    }
-
-    static inline void tlb_flush_ent(addr_t vaddr, word_t log2size)
-    {
-	word_t a = (word_t)vaddr;
-
-        __asm__ __volatile__ (
-	    "	mov	r0,	#0		\n"
-	    "	mcr     p15, 0, r0, c8, c5, 0	\n"	/* Invalidate I TLB */
-	    ::: "r0"
-	); 
-	for (word_t i=0; i < (1ul << log2size); i += ARM_PAGE_SIZE)
-	{
-	    __asm__ __volatile__ (
-		"   mcr	p15, 0, %0, c8, c6, 1    \n"	/* Invalidate D TLB entry */
-		:: "r" (a)
-	    );
-	    a += ARM_PAGE_SIZE;
-	}
-    }
-
-    static inline void tlb_flush_debug(void)
-    {
-        printf("About to TLB flush... ");
-        tlb_flush();
-        printf("done.\n");
-    }
-
-    static inline void cache_invalidate(word_t target)
-    {
-        __asm__ __volatile__ (
-            "mcr p15, 0, %0, c7, c6, 1 \n"
-	    :: "r" (target)
-	);
-    }
-
-    static inline void cache_clean(word_t target)
-    {
-        __asm__ __volatile__ (
-            "mcr p15, 0, %0, c7, c10, 1 \n"
-	    :: "r" (target)
-	);
-    }
-};
-
-#endif /* __PLATFORM__ARM__OMAP1510__CACHE_H_ */
diff --git a/kernel/src/arch/arm/omap1510/cpu.h b/kernel/src/arch/arm/omap1510/cpu.h
deleted file mode 100644
index 0cbb9533..00000000
--- a/kernel/src/arch/arm/omap1510/cpu.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/omap1510/cpu.h
- * Description:   TI OMAP1510 CPU control functions
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cpu.h,v 1.2 2004/06/04 02:14:23 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__OMPA1510__CPU_H_
-#define __ARCH__ARM__OMPA1510__CPU_H_
-
-class arm_cpu
-{
-public:
-    static inline void cli(void)
-    {
-	__asm__  __volatile__ (
-	    "        mrs     r0,     cpsr          \n"
-	    "        orr     r0,     r0,     #0xd0 \n"
-	    "        msr     cpsr_c, r0            \n"
-	::: "r0");
-    }
-
-    static inline void sti(void)
-    {
-	__asm__  __volatile__ (
-	    "        mrs     r0,     cpsr          \n"
-	    "        and     r0,     r0,     #0x1f \n"
-	    "        msr     cpsr_c, r0            \n"
-	::: "r0");
-    }
-
-    static inline void sleep(void)
-    {
-	/* Can maybe execute idle instructions here to save power */
-	for (int i = 0; i < 10000; ++i)
-	    __asm__ __volatile__ ("nop");
-    }
-};
-
-#endif /* __ARCH__ARM__OMPA1510__CPU_H_ */
diff --git a/kernel/src/arch/arm/omap1510/intctrl.h b/kernel/src/arch/arm/omap1510/intctrl.h
deleted file mode 100644
index 9b49d4f5..00000000
--- a/kernel/src/arch/arm/omap1510/intctrl.h
+++ /dev/null
@@ -1,134 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/omap1510/intctrl.h
- * Description:   Functions which manipulate the OMAP1510 interrupt controller
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: intctrl.h,v 1.3 2004/08/12 11:54:52 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__INNOVATOR__INTCTRL_H_
-#define __PLATFORM__INNOVATOR__INTCTRL_H_
-
-#include <intctrl.h>
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(thread.h)
-#include INC_API(space.h)
-#include INC_CPU(io.h)
-
-#define IRQS	    64
-
-#define	REG_ARM_IRQHDL1_BASE	0xFFFECB00
-#define	REG_ARM_IRQHDL2_BASE	0xFFFE0000
-#define IRQHDL_ITR		0x0
-#define	IRQHDL_MIR		0x4
-#define IRQHDL_IRQ_CODE		0x10
-#define IRQHDL_FIQ_CODE		0x14
-#define IRQHDL_CTL_REG		0x18
-#define	ILR_BASE		0x1C
-
-
-#define REG_IRQHDL1_MIR *((volatile word_t*)((io_to_virt(REG_ARM_IRQHDL1_BASE)) + IRQHDL_MIR))
-#define REG_IRQHDL2_MIR	*((volatile word_t*)((io_to_virt(REG_ARM_IRQHDL2_BASE)) + IRQHDL_MIR))
-#define REG_IRQHDL2_CTL	*((volatile word_t*)((io_to_virt(REG_ARM_IRQHDL2_BASE)) + IRQHDL_CTL_REG))
-
-#define REG_IRQHDL_IRQ_CODE(base)   *((volatile word_t*) ((base) + IRQHDL_IRQ_CODE))
-#define REG_IRQHDL_ITR(base)	*((volatile word_t*) ((base) + IRQHDL_ITR))
-#define REG_IRQHDL_CTL(base)	*((volatile word_t*) ((base) + IRQHDL_CTL_REG))
-
-extern word_t arm_high_vector; 
-extern word_t interrupt_handlers[IRQS];
-
-class intctrl_t : public generic_intctrl_t {
-
-public:
-    void init_arch();
-    void init_cpu();
-
-    word_t get_number_irqs(void)
-    {
-        return IRQS;
-    }
-
-    void register_interrupt_handler (word_t vector, void (*handler)(word_t,
-            arm_irq_context_t *))
-    {
-        ASSERT(vector >= 0 && vector < IRQS);
-        interrupt_handlers[vector] = (word_t) handler;
-        TRACE_INIT("interrupt vector[%d] = %p\n", vector, 
-                interrupt_handlers[vector]);
-    }
-
-    static inline void mask(word_t irq)
-    {
-        ASSERT(irq >=0 && irq < IRQS);
-	
-	if (irq > 31)
-	    REG_IRQHDL2_MIR |= (1 << (irq - 32));
-	else
-	    REG_IRQHDL1_MIR |= (1 << irq);
-
-    }
-
-    static inline bool unmask(word_t irq)
-    {
-        ASSERT(irq < IRQS);
-
-	if (irq > 31)
-	    REG_IRQHDL2_MIR &= ~(1<<(irq - 32));
-	else
-	    REG_IRQHDL1_MIR &= ~(1<<irq);
-
-        return false;
-    }
-
-    static inline void disable(word_t irq)
-    {  
-        mask(irq);
-    }
-
-    static inline bool enable(word_t irq)
-    {
-        return unmask(irq);
-    }
-
-    void disable_fiq(void)
-    {
-      	/* No fiq control on interrupt handler,
-	 * this should be done by setting CP15.
-	 */
-    }
-
-    bool is_irq_available(int irq)
-    {
-	/* irq0 is used by indicating 2nd level irq. */
-	return irq >= 0 && irq < IRQS;
-    }
-
-    void set_cpu(word_t irq, word_t cpu) {}
-}; 
-
-#endif /* __PLATFORM__INNOVATOR__INTCTRL_H_ */
diff --git a/kernel/src/arch/arm/omap1510/io.h b/kernel/src/arch/arm/omap1510/io.h
deleted file mode 100644
index 5642deef..00000000
--- a/kernel/src/arch/arm/omap1510/io.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/omap1510/io.h
- * Description:   Functions which manipulate the OMAP1510 OS timer
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: io.h,v 1.2 2004/06/04 02:14:23 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM_OMAP1510__IO_H_
-#define __ARCH__ARM_OMAP1510__IO_H_
-
-#define IODEVICE_VADDR		(IO_AREA0_VADDR)
-#define PHYS_CTL_REG_BASE	0xfff00000
-
-INLINE word_t io_to_virt(word_t ph)
-{
-    return IODEVICE_VADDR + ph - PHYS_CTL_REG_BASE;
-} 
-
-INLINE word_t virt_to_io(word_t vt)
-{
-    return PHYS_CTL_REG_BASE + vt - IODEVICE_VADDR;
-}
-
-#endif /* __ARCH__ARM_OMAP1510__IO_H_*/
diff --git a/kernel/src/arch/arm/omap1510/syscon.h b/kernel/src/arch/arm/omap1510/syscon.h
deleted file mode 100644
index 51486c99..00000000
--- a/kernel/src/arch/arm/omap1510/syscon.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     arch/arm/omap1510/syscon.h
- * Description:   TI OMAP1510 coprocessor-15 definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscon.h,v 1.2 2004/06/04 02:14:23 cvansch Exp $
- *                
- ********************************************************************/
-
-
-#ifndef _ARCH_ARM_SA1100_SYSCON_H_
-#define _ARCH_ARM_SA1100_SYSCON_H_
-
-/* Coprocessor 15 */
-#define CP15			p15
-
-/* Primary CP15 registers (CRn) */
-#define C15_id			c0
-#define C15_control		c1
-#define C15_ttbase		c2
-#define C15_domain		c3
-#define C15_fault_status	c5
-#define C15_fault_addr		c6
-#define C15_cache_con		c7
-#define C15_tlb			c8
-#define C15_read_buf		c9
-#define C15_pid			c13
-#define C15_breakpoints		c14
-#define C15_function		c15
-
-/* Default secondary register (CRm) */
-#define C15_CRm_default		c0
-/* Default opcode2 register (opcode2) */
-#define C15_OP2_default		0
-
-/* CP15 - Control Register */
-#define C15_CONTROL_FIXED	0x0070
-#define C15_CONTROL_M		0x0001			/* Memory management enable	*/
-#define C15_CONTROL_A		0x0002			/* Alignment fault enable	*/
-#define C15_CONTROL_C		0x0004			/* Data cache enable		*/
-#define C15_CONTROL_W		0x0008			/* Write buffer enable		*/
-#define C15_CONTROL_B		0x0080			/* Big endian enable		*/
-#define C15_CONTROL_S		0x0100			/* System access checks in MMU	*/
-#define C15_CONTROL_R		0x0200			/* ROM access checks in MMU	*/
-#define C15_CONTROL_I		0x1000			/* Instruction cache enable	*/
-#define C15_CONTROL_X		0x2000			/* Remap interrupt vector	*/
-
-/* Default to little endian */
-#define C15_CONTROL_INIT	(C15_CONTROL_FIXED)
-/* Kernel mode - little endian, cached, write buffer, remap to 0xffff0000 */
-#define C15_CONTROL_KERNEL	(C15_CONTROL_FIXED | C15_CONTROL_M | C15_CONTROL_C | C15_CONTROL_W | \
-				 C15_CONTROL_S | C15_CONTROL_I | C15_CONTROL_X)
-
-#if !defined(ASSEMBLY)
-
-#define _INS_(x) #x
-#define STR(x) _INS_(x)
-
-/* Read from coprocessor 15 register */
-#define read_cp15_register(CRn, CRm, op2)	\
-({ word_t _read;				\
-    __asm__ __volatile__ (			\
-    "mrc    p15, 0, %0,"STR(CRn)",			\
-    "STR(CRm)","STR(op2)";\n"			\
-    : "=r" (_read));				\
-    _read;})
-
-/* Write to coprocessor 15 register */
-#define write_cp15_register(CRn, CRm, op2, val)	\
-    __asm__ __volatile__ (			\
-    "mcr    p15, 0, %0,"STR(CRn)",			\
-    "STR(CRm)","STR(op2)";\n"			\
-    :: "r" (val));				\
-
-#endif
-
-#define CPWAIT
-
-#endif /*_ARCH_ARM_SA1100_SYSCON_H_*/
diff --git a/kernel/src/arch/arm/omap1510/timer.h b/kernel/src/arch/arm/omap1510/timer.h
deleted file mode 100644
index 659e7732..00000000
--- a/kernel/src/arch/arm/omap1510/timer.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/omap1510/timer.h
- * Description:   Functions which manipulate the OMAP1510 OS timer
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.h,v 1.3 2004/08/12 11:54:52 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__OMAP1510__TIMER_H_
-#define __ARCH__ARM__OMAP1510__TIMER_H_
-
-#define TIMER_TICK_LENGTH	10000
-
-#define TIMER1_BASE	0xFFFEC500
-#define TIMER2_BASE	0xFFFEC600
-#define TIMER3_BASE	0xFFFEC700
-
-#define TIMER_CRTL	0x0
-#define TIMER_LOAD	0x4
-#define TIMER_READ	0x8
-
-#define TIMER1_IRQ	26
-#define TIMER2_IRQ	30
-#define TIMER3_IRQ	16
-
-#define VIRT_TIMER_BASE ((word_t) io_to_virt (TIMER1_BASE))
-
-#define REG_TIMER_CTRL	*((volatile word_t *) (VIRT_TIMER_BASE + TIMER_CRTL)) 
-#define REG_TIMER_LOAD	*((volatile word_t *) (VIRT_TIMER_BASE + TIMER_LOAD))
-
-#endif /* __ARCH__ARM__OMAP1510__TIMER_H_*/
diff --git a/kernel/src/arch/arm/page.h b/kernel/src/arch/arm/page.h
deleted file mode 100644
index 82db1c5d..00000000
--- a/kernel/src/arch/arm/page.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/page.h
- * Description:   ARM specific MM
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: page.h,v 1.7 2004/09/02 22:43:01 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__PAGE_H__
-#define __ARCH__ARM__PAGE_H__
-
-/*
- * Supported Page Sizes: 
- * - 1k ("tiny" pages) ** do we really want to support these? (shans) **
- * - 4k
- * - 64k
- * - 1M ("sections")
- */
-#define ARM_SECTION_BITS	12
-#define ARM_SECTION_SIZE	(1ul << (32 - ARM_SECTION_BITS))
-#define ARM_NUM_SECTIONS	(1ul << ARM_SECTION_BITS)
-
-#if defined(CONFIG_ARM_TINY_PAGES)
- #define ARM_PAGE_SIZE		PAGE_SIZE_1K
- #define ARM_PAGE_BITS		PAGE_BITS_1K
- #define TINY_PAGE		(1<<10) |
- #define HW_PGSHIFTS		{ 10, 12, 16, 20, 32 }
- #define MDB_NUM_PGSIZES	(4)
-#else
- #define ARM_PAGE_SIZE		PAGE_SIZE_4K
- #define ARM_PAGE_BITS		PAGE_BITS_4K
- #define TINY_PAGE
- #define HW_PGSHIFTS		{ 12, 16, 20, 32 }
- #define MDB_NUM_PGSIZES	(3)
-#endif
-
-#define MDB_PGSHIFTS		HW_PGSHIFTS
-
-#define	HW_VALID_PGSIZES (	\
-		TINY_PAGE	\
-		(1<<12) |	\
-		(1<<16) |	\
-		(1<<20))
-
-#define PAGE_SIZE_1K		(1ul << 10)
-#define PAGE_SIZE_4K		(1ul << 12)
-#define PAGE_SIZE_64K		(1ul << 16)
-#define PAGE_SIZE_1M		(1ul << 20)
-
-#define PAGE_BITS_1K		(10)
-#define PAGE_BITS_4K		(12)
-#define PAGE_BITS_64K		(16)
-#define PAGE_BITS_1M		(20)
-
-#define PAGE_MASK_1K		(~(PAGE_SIZE_1K - 1))
-#define PAGE_MASK_4K		(~(PAGE_SIZE_4K - 1))
-#define PAGE_MASK_64K		(~(PAGE_SIZE_64K -1))
-#define PAGE_MASK_1M		(~(PAGE_SIZE_1M - 1))
-
-#endif /* __ARCH__ARM__PAGE_H__ */
diff --git a/kernel/src/arch/arm/pgent.h b/kernel/src/arch/arm/pgent.h
deleted file mode 100644
index 6cb93d4f..00000000
--- a/kernel/src/arch/arm/pgent.h
+++ /dev/null
@@ -1,619 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004, 2006, Karlsruhe University
- *                
- * File path:     arch/arm/pgent.h
- * Description:   Generic page table manipluation for ARM
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pgent.h,v 1.25 2006/11/17 17:18:25 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__ARM__PGENT_H__
-#define __ARCH__ARM__PGENT_H__
-
-#include <kmemory.h>
-#include INC_ARCH(fass.h)
-#include INC_ARCH(page.h)
-#include INC_ARCH(ptab.h)
-#include INC_GLUE(hwspace.h)	/* virt<->phys	*/
-#include INC_CPU(cache.h)
-
-#if defined(CONFIG_ARM_TINY_PAGES)
-#error Tiny pages not working
-#endif
-
-EXTERN_KMEM_GROUP (kmem_pgtab);
-
-class mapnode_t;
-class space_t;
-
-template<typename T> INLINE T phys_to_page_table(T x)
-{
-    return (T) ((u32_t) x + UNCACHED_OFFSET);
-}
-
-template<typename T> INLINE T virt_to_page_table(T x)
-{
-    return (T) ((u32_t) x - KERNEL_OFFSET + UNCACHED_OFFSET);
-}
-
-template<typename T> INLINE T page_table_to_virt(T x)
-{
-    return (T) ((u32_t) x - UNCACHED_OFFSET + KERNEL_OFFSET);
-}
-
-template<typename T> INLINE T page_table_to_phys(T x)
-{
-    return (T) ((u32_t) x - UNCACHED_OFFSET);
-}
-
-INLINE bool has_tiny_pages (space_t * space)
-{
-#if defined(CONFIG_ARM_TINY_PAGES)
-    return true;
-#else
-    return false;
-#endif
-}
-
-INLINE word_t arm_l2_ptab_size (space_t * space)
-{
-    return has_tiny_pages (space) ? ARM_L2_SIZE_TINY : ARM_L2_SIZE_NORMAL;
-}
-
-
-class pgent_t
-{
-public:
-    union {
-	arm_l1_desc_t	l1;
-	arm_l2_desc_t	l2;
-	u32_t		raw;
-    };
-
-public:
-    enum pgsize_e {
-#if defined(CONFIG_ARM_TINY_PAGES)
-	size_1k,
-#endif
-	size_4k,
-	size_64k,
-	size_1m,
-	size_4g,
-	size_max = size_1m,
-#if !defined(CONFIG_ARM_TINY_PAGES)
-	size_1k = size_4g + 1,
-#endif
-    };
-
-
-private:
-
-
-    void sync_64k (space_t * s)
-	{
-	    for (word_t i = 1; i < (arm_l2_ptab_size (s) >> 6); i++)
-		((u32_t *) this)[i] = raw;
-	}
-
-    void sync_4k (space_t * s)
-	{
-	    if (has_tiny_pages (s))
-		for (word_t i = 1; i < 4; i++)
-		    ((u32_t *) this)[i] = raw;
-	}
-
-    // Linknode access 
-
-    u32_t get_linknode (space_t * s, pgsize_e pgsize)
-	{
-	    switch (pgsize)
-	    {
-	    case size_1m:
-		return *page_table_to_virt((u32_t *) ((word_t) this + ARM_L1_SIZE));
-	    case size_64k:
-	    case size_4k:
-	    case size_1k:
-		return *page_table_to_virt((u32_t *) ((word_t) this + arm_l2_ptab_size (s)));
-	    default:
-		return 0;
-	    }
-	}
-    
-    void set_linknode (space_t * s, pgsize_e pgsize, u32_t val)
-	{
-	    switch (pgsize)
-	    {
-	    case size_1m:
-		*page_table_to_virt((u32_t *) ((word_t) this + ARM_L1_SIZE)) = val;
-		break;
-	    case size_64k:
-	    case size_4k:
-	    case size_1k:
-		*page_table_to_virt((u32_t *) ((word_t) this + arm_l2_ptab_size (s))) = val;
-	    default:
-		break;
-	    }
-	}
-
-public:
-
-    // Predicates
-
-    bool is_valid (space_t * s, pgsize_e pgsize)
-	{
-	    switch (pgsize)
-	    {
-	    case size_1m:
-	    case size_64k:
-		return (raw != 0);
-	    case size_4k:
-		if (has_tiny_pages(s)) {
-		    return (raw != 0);
-		} else {
-		    return (l2.small.two == 2);
-		}
-	    case size_1k:
-		return (l2.tiny.three == 3);
-	    default:
-		return false;
-	    }
-	}
-    
-    bool is_writable (space_t * s, pgsize_e pgsize)
-	{
-	    return pgsize == size_1m ?
-		    l1.section.ap == arm_l1_desc_t::rw :
-		    l2.small.ap0 == arm_l1_desc_t::rw;
-	}
-    
-    bool is_readable (space_t * s, pgsize_e pgsize)
-	{ return l1.section.ap >= arm_l1_desc_t::ro; }
-    
-    bool is_executable (space_t * s, pgsize_e pgsize)
-	{ return l1.section.ap >= arm_l1_desc_t::ro; }
-
-    bool is_subtree (space_t * s, pgsize_e pgsize)
-	{
-	    switch (pgsize)
-	    {
-	    case size_1m:
-		return (l1.section.two != 2) && (l1.fault.zero != 0);
-	    case size_64k:
-		return (l2.large.one != 1) && (raw != 0);
-	    case size_4k:
-		if (has_tiny_pages(s)) {
-		    return (l2.small.two != 2) && (raw != 0);
-		}
-	    default:
-		return false;
-	    }
-	}
-
-    bool is_kernel (space_t * s, pgsize_e pgsize)
-	{ return l1.section.ap <= arm_l1_desc_t::none; }
-
-    // Retrieval
-
-    arm_domain_t get_domain(void)
-        {
-            return l1.section.domain;
-        } 
-
-    addr_t address (space_t * s, pgsize_e pgsize)
-	{
-	    switch (pgsize)
-	    {
-	    case size_1m:  return l1.address_section();
-	    case size_64k: return l2.address_large();
-	    case size_4k:  return l2.address_small();
-	    case size_1k:  return l2.address_tiny();
-	    default: return 0;
-	    }
-	}
-	
-    pgent_t * subtree (space_t * s, pgsize_e pgsize)
-	{
-	    if (pgsize == size_1m)
-	    {
-		if (has_tiny_pages (s))
-		    return (pgent_t *) phys_to_page_table(l1.address_finetable());
-		else
-		    return (pgent_t *) phys_to_page_table(l1.address_coarsetable());
-	    }
-	    else
-		return this;
-	}
-
-    mapnode_t * mapnode (space_t * s, pgsize_e pgsize, addr_t vaddr)
-	{ return (mapnode_t *) (get_linknode (s, pgsize) ^ (u32_t) vaddr); }
-
-    addr_t vaddr (space_t * s, pgsize_e pgsize, mapnode_t * map)
-	{ return (addr_t) (get_linknode (s, pgsize) ^ (u32_t) map); }
-
-    word_t reference_bits (space_t * s, pgsize_e pgsize, addr_t vaddr)
-	{ return 7; }
-
-    // Modification
-
-private:
-
-    void cpd_sync (space_t * s, pgsize_e pgsize)
-	{
-	    if (pgsize == size_1m) 
-	    {
- 		word_t offset = ((word_t)this & 0xffff);
-		pgent_t *cpd_entry = (pgent_t *)((word_t)cpd + offset);
-		arm_domain_t n = get_domain();
-	
-		if (arm_fass.get_space(n) == s && cpd_entry->get_domain() == n) 
-		    cpd_entry->raw = raw;
-	    }
-	}
-
-public:
-
-    void set_domain(arm_domain_t domain)
-        {
-            l1.section.domain = domain;
-        } 
-
-    void clear (space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr)
-        {
-            clear(s, pgsize, kernel); 
-        }
-
-    void clear (space_t * s, pgsize_e pgsize, bool kernel )
-	{
-	    raw = 0;
-	    switch (pgsize)
-	    {
-	    case size_64k:
-		sync_64k (s);
-		break;
-	    case size_4k:
-		sync_4k (s);
-		break;
-	    case size_1k:
-	    case size_1m:
-	    default:
-		break;
-	    }
-
-	    if (! kernel)
-		set_linknode (s, pgsize, 0);
-
-#ifdef CONFIG_ENABLE_FASS
-	    cpd_sync(s, pgsize);
-#endif
-	}
-
-    void flush (space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr)
-	{
-	}
-
-    void make_subtree (space_t * s, pgsize_e pgsize, bool kernel)
-	{
-	    switch (pgsize)
-	    {
-	    case size_1m:
-		if (has_tiny_pages (s))
-		{
-		    addr_t base = kmem.alloc (kmem_pgtab, ARM_L2_SIZE_TINY * 2);
-		    l1.raw = 0;
-		    l1.fine_table.three = 3;
-		    l1.fine_table.base_address = (word_t)
-			virt_to_phys (base) >> 12;
-		    arm_cache::flush_dcache_ent(base, 12);
-		}
-		else
-		{
-		    addr_t base = kmem.alloc (kmem_pgtab, ARM_L2_SIZE_NORMAL * 2);
-		    l1.raw = 0;
-		    l1.coarse_table.one = 1;
-		    l1.coarse_table.base_address = (word_t)
-			virt_to_phys (base) >> 10;
-		    arm_cache::flush_dcache_ent(base, 10);
-		}
-		break;
-
-	    case size_64k:
-	    case size_4k:
-		if (!l2.is_valid())
-		    raw = (pgsize << 16);
-
-	    default:
-		break;
-	    }
-
-#ifdef CONFIG_ENABLE_FASS
-	    cpd_sync(s, pgsize);
-#endif
-	}
-
-    void remove_subtree (space_t * s, pgsize_e pgsize, bool kernel)
-	{
-	    switch (pgsize)
-	    {
-	    case size_1m:
-		if (has_tiny_pages (s))
-		    kmem.free (kmem_pgtab, phys_to_virt (
-			       (addr_t) (l1.fine_table.base_address << 12)),
-			       ARM_L2_SIZE_TINY * 2);
-		else
-		    kmem.free (kmem_pgtab, phys_to_virt (
-			       (addr_t) (l1.coarse_table.base_address << 10)),
-			       ARM_L2_SIZE_NORMAL * 2);
-		break;
-	    case size_64k:
-	    case size_4k:
-	    default:
-		break;
-	    }
-
-	    clear (s, pgsize, kernel);
-	}
-
-
-
-    void set_entry (space_t * s, pgsize_e pgsize, addr_t paddr,
-		    word_t rwx, word_t attrib, bool kernel)
-	{
-	    word_t ap;
-
-	    if (kernel)
-		ap = rwx & 2 ? arm_l1_desc_t::none : arm_l1_desc_t::special;
-	    else
-		ap = rwx & 2 ? arm_l1_desc_t::rw : arm_l1_desc_t::ro;
-
-	    switch (pgsize)
-	    {
-	    case size_1m:
-		l1.raw = 0;
-		l1.section.two = 2;
-		l1.section.b = l1.section.c = (attrib == 0);
-		l1.section.domain = 0;
-		l1.section.ap = ap;
-		l1.section.base_address = (word_t) paddr >> 20;
-		break;
-
-	    case size_64k:
-		l2.raw = 0;
-		l2.large.one = 1;
-		l2.large.b = l2.large.c = (attrib == 0);
-		l2.large.ap0 = l2.large.ap1 = l2.large.ap2 = l2.large.ap3 = ap;
-		l2.large.base_address = (word_t) paddr >> 16;
-		sync_64k (s);
-		break;
-
-	    case size_4k:
-		l2.raw = 0;
-		l2.small.two = 2;
-		l2.small.b = l2.small.c = (attrib == 0);
-		l2.small.ap0 = l2.small.ap1 = l2.small.ap2 = l2.small.ap3 = ap;
-		l2.small.base_address = (word_t) paddr >> 12;
-		sync_4k (s);
-		break;
-
-	    case size_1k:
-		l2.raw = 0;
-		l2.tiny.three = 3;
-		l2.tiny.b = l2.tiny.c = (attrib == 0);
-		l2.tiny.ap = ap;
-		l2.tiny.base_address = (word_t) paddr >> 10;
-		break;
-
-	    default:
-		break;
-	    }
-
-#ifdef CONFIG_ENABLE_FASS
-	    cpd_sync(s, pgsize);
-#endif
-	}
-
-    /* For init code, must be inline. Sets kernel and cached */
-    inline void set_entry_1m (space_t * s, addr_t paddr, bool readable,
-                           bool writable, bool executable, bool attrib )
-	{
-	    word_t ap;
-
-	    ap = writable ? arm_l1_desc_t::none : arm_l1_desc_t::special;
-
-	    l1.raw = 0;
-	    l1.section.two = 2;
-	    l1.section.b = l1.section.c = (attrib == 0);
-	    l1.section.domain = 0;
-	    l1.section.ap = ap;
-	    l1.section.base_address = (word_t) paddr >> 20;
-	}
-
-    inline void set_entry (space_t * s, pgsize_e pgsize, addr_t paddr,
-			   word_t rwx, bool kernel)
-       {
-           set_entry(s, pgsize, paddr, readable, rwx, 0, kernel);
-       }
-
-    void revoke_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    word_t ap = pgsize == size_1m ? l1.section.ap : l2.tiny.ap;
-
-	    if ((rwx & 2) && ap == arm_l1_desc_t::rw)
-	    {
-		ap = arm_l1_desc_t::ro;
-
-		switch (pgsize)
-		{
-		case size_1m:
-		    l1.section.ap = ap;
-		    break;
-		case size_64k:
-		    l2.large.ap0 = l2.large.ap1 = l2.large.ap2 =
-			l2.large.ap3 = ap;
-		    sync_64k (s);
-		    break;
-		case size_4k:
-		    l2.small.ap0 = l2.small.ap1 = l2.small.ap2 =
-			l2.small.ap3 = ap;
-		    sync_4k (s);
-		    break;
-		case size_1k:
-		    l2.tiny.ap = ap;
-		    break;
-		default:
-		    break;
-		}
-	    }
-
-#ifdef CONFIG_ENABLE_FASS
-	    cpd_sync(s, pgsize);
-#endif
-	}
-
-    word_t attributes (space_t * s, pgsize_e pgsize)
-        {
-	    switch (pgsize) {
-	    case size_1m:
-		return !l1.section.c;
-	    case size_64k:
-		return !l2.large.c;
-	    case size_4k:
-		return !l2.small.c;
-	    case size_1k:
-		return !l2.tiny.c;
-	    default:
-		return 0;
-	    }
-        }
-
-
-    void update_cacheable(space_t * s, pgsize_e pgsize, bool cacheable)
-	{
-	    switch (pgsize) {
-	    case size_1m:
-		l1.section.b = l1.section.c = cacheable ? 1 : 0;
-		break;
-	    case size_64k:
-		l2.large.b = l2.large.c = cacheable ? 1 : 0;
-		sync_64k (s);
-		break;
-	    case size_4k:
-		l2.small.b = l2.small.c = cacheable ? 1 : 0;
-		sync_4k (s);
-		break;
-	    case size_1k:
-		l2.tiny.b = l2.tiny.c = cacheable ? 1 : 0;
-		break;
-	    default:
-		break;
-	    }
-
-#ifdef CONFIG_ENABLE_FASS
-	    cpd_sync(s, pgsize);
-#endif
-	}
-
-    void set_attributes (space_t * s, pgsize_e pgsize, word_t attrib)
-	{ update_cacheable (s, pgsize, attrib); }
-
-    void update_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    word_t ap = pgsize == size_1m ? l1.section.ap : l2.tiny.ap;
-
-	    if ((rwx & 2) && ap == arm_l1_desc_t::ro)
-	    {
-		ap = arm_l1_desc_t::rw;
-
-		switch (pgsize)
-		{
-		case size_1m:
-		    l1.section.ap = ap;
-		    break;
-		case size_64k:
-		    l2.large.ap0 = l2.large.ap1 = l2.large.ap2 =
-			l2.large.ap3 = ap;
-		    sync_64k (s);
-		    break;
-		case size_4k:
-		    l2.small.ap0 = l2.small.ap1 = l2.small.ap2 =
-			l2.small.ap3 = ap;
-		    sync_4k (s);
-		    break;
-		case size_1k:
-		    l2.tiny.ap = ap;
-		    break;
-		default:
-		    break;
-		}
-	    }
-
-#ifdef CONFIG_ENABLE_FASS
-	    cpd_sync(s, pgsize);
-#endif
-	}
-
-    void reset_reference_bits (space_t * s, pgsize_e pgsize)
-	{ }
-
-    void update_reference_bits (space_t * s, pgsize_e pgsize, word_t rwx)
-	{ }
-
-    void set_linknode (space_t * s, pgsize_e pgsize,
-		       mapnode_t * map, addr_t vaddr)
-	{ set_linknode (s, pgsize, (u32_t) map ^ (u32_t) vaddr); }
-
-    // Movement
-
-    pgent_t * next (space_t * s, pgsize_e pgsize, word_t num)
-	{
-	    switch (pgsize)
-	    {
-	    case size_64k:
-		return this + (num * (arm_l2_ptab_size (s) >> 6));
-	    case size_4k:
-		if (has_tiny_pages (s))
-		    return this + (num * 4);
-	    case size_1m:
-	    case size_1k:
-		return this + num;
-	    default:
-		return this;
-	    }
-	}
-
-    // Operators
-
-    bool operator != (const pgent_t rhs)
-	{
-	    return this->raw != rhs.raw;
-	}
-
-    // Debug
-
-    void dump_misc (space_t * s, pgsize_e pgsize)
-	{
-	}
-};
-
-#endif /* !__ARCH__ARM__PGENT_H__ */
diff --git a/kernel/src/arch/arm/ptab.h b/kernel/src/arch/arm/ptab.h
deleted file mode 100644
index 78efc87e..00000000
--- a/kernel/src/arch/arm/ptab.h
+++ /dev/null
@@ -1,202 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *
- * File path:     arch/arm/ptab.h
- * Description:   ARM page table structures
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ptab.h,v 1.6 2004/06/04 02:14:22 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__ARM__PTAB_H__
-#define __ARCH__ARM__PTAB_H__
-
-class arm_l2_desc_t
-{
-public:
-    enum ap_e {
-	special	= 0,
-	none	= 1,
-	ro	= 2,
-	rw	= 3,
-    };
-
-    union {
-	struct {
-	    BITFIELD2(word_t,
-		zero		: 2,
-		ign		: 30
-	    )
-	} fault;
-
-	struct {
-	    BITFIELD9(word_t,
-		one		: 2,
-		b		: 1,
-		c		: 1,
-		ap0		: 2,
-		ap1		: 2,
-		ap2		: 2,
-		ap3		: 2,
-		sbz		: 4,
-		base_address	: 16
-	    )
-	} large;
-
-	struct {
-	    BITFIELD8(word_t,
-		two		: 2,
-		b		: 1,
-		c		: 1,
-		ap0		: 2,
-		ap1		: 2,
-		ap2		: 2,
-		ap3		: 2,
-		base_address	: 20
-	    )
-	} small;
-
-	struct {
-	    BITFIELD6(word_t,
-		three		: 2,
-		b		: 1,
-		c		: 1,
-		ap		: 2,
-		sbz		: 4,
-		base_address	: 22
-	    )
-	} tiny;
-
-	u32_t raw;
-    };
-
-    // Predicates
-
-    bool is_valid (void)
-	{ return fault.zero != 0; }
-
-    bool is_cacheable (void)
-	{ return large.c; }
-
-    bool is_bufferable (void)
-	{ return large.b; }
-
-    void clear()
-	{ raw = 0; }
-
-    addr_t address_large()
-	{ return (addr_t)(large.base_address << 16); }
-
-    addr_t address_small()
-	{ return (addr_t)(small.base_address << 12); }
-
-    addr_t address_tiny()
-	{ return (addr_t)(tiny.base_address << 10); }
-};
-
-
-class arm_l1_desc_t
-{
-public:
-    enum ap_e {
-	special	= 0,
-	none	= 1,
-	ro	= 2,
-	rw	= 3,
-    };
-
-    union {
-	struct {
-	    BITFIELD2(word_t,
-		zero		: 2,
-		ign		: 30
-	    )
-	} fault;
-
-	struct {
-	    BITFIELD5(word_t,
-		one		: 2,
-		imp		: 3,
-		domain		: 4,
-		sbz		: 1,
-		base_address	: 22
-	    )
-	} coarse_table;
-
-	struct {
-	    BITFIELD9(word_t,
-		two		: 2,
-		b		: 1,
-		c		: 1,
-		imp		: 1,
-		domain		: 4,
-		sbz1		: 1,
-		ap		: 2,
-		sbz2		: 8,
-		base_address	: 12
-	    )
-	} section;
-
-	struct {
-	    BITFIELD5(word_t,
-		three		: 2,
-		imp		: 3,
-		domain		: 4,
-		sbz		: 3,
-		base_address	: 20
-	    )
-	} fine_table;
-
-	u32_t raw;
-    };
-   
-    // Predicates
-
-    bool is_valid (void)
-	{ return fault.zero != 0; }
-
-    bool is_cacheable (void)
-	{ return section.c; }
-
-    bool is_bufferable (void)
-	{ return section.b; }
-
-    void clear()
-	{ raw = 0; }
-
-    addr_t address_section()
-	{ return (addr_t)(section.base_address << 20); }
-
-    word_t address_finetable()
-	{ return (fine_table.base_address << 12); }
-
-    word_t address_coarsetable()
-	{ return (coarse_table.base_address << 10); }
-};
-
-#define ARM_L1_SIZE		((1 << ARM_SECTION_BITS) << 2)
-#define ARM_L2_SIZE_NORMAL	((1 << (32 - ARM_SECTION_BITS - PAGE_BITS_4K)) << 2)
-#define ARM_L2_SIZE_TINY	((1 << (32 - ARM_SECTION_BITS - PAGE_BITS_1K)) << 2)
-
-#endif /* !__ARCH__ARM__PTAB_H__ */
diff --git a/kernel/src/arch/arm/sa1100/cache.h b/kernel/src/arch/arm/sa1100/cache.h
deleted file mode 100644
index 31843eaf..00000000
--- a/kernel/src/arch/arm/sa1100/cache.h
+++ /dev/null
@@ -1,201 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     arm/sa1100/cache.h
- * Description:   Functions which manipulate the SA-1100 cache
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cache.h,v 1.8 2005/01/12 02:52:40 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__ARM__SA1100_CACHE_H_
-#define __PLATFORM__ARM__SA1100_CACHE_H_
-
-#include <debug.h>
-
-#define ZERO_BANK_VADDR		(IO_AREA1_VADDR)
-
-class arm_cache
-{
-public:
-
-    static inline void cache_flush(void)
-    {
-	__asm__ __volatile__ (
-	    "	mov	r0,	#0		\n"
-	    "	mcr	p15, 0, r0, c7, c5, 0	\n" /* Invalidate I-cache */
-	    "					\n" /* clean cache routine */
-	    "	add	r1,	%0, #8192	\n" /* taken from sa1100   */
-	    "1:					\n" /* reference manual    */
-	    "	ldr	r2,	[%0], #32	\n" /* page 58 (sect 6.2.3)*/
-	    "	teq	r1,	%0		\n"
-	    "	bne	1b			\n"
-	    "					\n"
-	    /* Should probably also flush mini-D cache here if used */
-	    "					\n"
-	    "	mcr	p15, 0, r0, c7, c10, 4	\n" /* drain write buffer */
-	    "					\n"
-	    :: "r" (ZERO_BANK_VADDR)
-	    : "r0", "r1", "r2", "memory");
-    }
-
-    static inline void cache_flushd(void)
-    {
-	__asm__ __volatile__ (
-	    "					\n" /* clean cache routine */
-	    "	add	r1,	%0, #8192	\n" /* taken from sa1100   */
-	    "1:					\n" /* reference manual    */
-	    "	ldr	r2,	[%0], #32	\n" /* page 58 (sect 6.2.3)*/
-	    "	teq	r1,	%0		\n"
-	    "	bne	1b			\n"
-	    "	mov	r1,	#0		\n"
-	    /* Should probably also flush mini-D cache here if used */
-	    "					\n"
-	    "	mcr	p15, 0, r1, c7, c10, 4	\n" /* drain write buffer */
-	    "					\n"
-	    :: "r" (ZERO_BANK_VADDR)
-	    : "r1", "r2", "memory");
-    }
-
-    static inline void flush_icache_ent(addr_t vaddr, word_t log2size)
-    {
-	__asm__ __volatile__ (
-	    "	mov	r0,	#0		\n"
-	    "	mcr	p15, 0, r0, c7, c5, 0	\n" /* flush I cache */
-	    "					\n"
-	    ::
-	    : "r0", "memory"); 
-    }
-
-    static inline void flush_dcache_ent(addr_t vaddr, word_t log2size)
-    {
-	if (log2size >= 15) {	/* for >32k, whole flush is better */
-	    cache_flushd();
-	    return;
-	}
-	word_t size = size = 1ul << log2size;
-
-	__asm__ __volatile__ (
-	    "					\n"
-	    "	add	r0,	%0,	%1	\n"
-	    "1:					\n"
-	    "	mcr	p15, 0, %0, c7, c10, 1	\n" /* clean D cache line */
-	    "	mcr	p15, 0, %0, c7, c6, 1	\n" /* flush D cache line */
-	    "	add	%0,	%0,    #32	\n"
-	    "	teq	r0,	%0		\n"
-	    "	bne	1b			\n"
-	    "	mov	r0,	#0		\n"
-	    "					\n"
-	    /* Should probably also flush mini-D cache here if used */
-	    "					\n"
-	    "	mcr	p15, 0, r0, c7, c10, 4	\n" /* drain write buffer */
-	    "					\n"
-	    : "+r" (vaddr)
-	    : "r" (size)
-	    : "r0", "memory");
-    }
-
-    static inline void flush_ent(addr_t vaddr, word_t log2size)
-    {
-	if (log2size >= 15) {	/* for >32k, whole flush is better */
-	    cache_flush();
-	    return;
-	}
-	word_t size = 1ul << log2size;
-
-	__asm__ __volatile__ (
-	    "	mov	r0,	#0		\n"
-	    "	mcr	p15, 0, r0, c7, c5, 0	\n" /* flush I cache */
-	    "	add	r0,	%0,	%1	\n"
-	    "1:					\n"
-	    "	mcr	p15, 0, %0, c7, c10, 1	\n" /* clean D cache line */
-	    "	mcr	p15, 0, %0, c7, c6, 1	\n" /* flush D cache line */
-	    "	add	%0,	%0,	#32	\n"
-	    "	teq	r0,	%0		\n"
-	    "	bne	1b			\n"
-	    "	mov	r0,	#0		\n"
-	    "					\n"
-	    /* Should probably also flush mini-D cache here if used */
-	    "					\n"
-	    "    mcr     p15, 0, r0, c7, c10, 4	\n" /* drain write buffer */
-	    "					\n"
-	    : "+r" (vaddr)
-	    : "r" (size)
-	    : "r0", "memory");
-    }
-
-    static inline void cache_flush_debug(void)
-    {
-	printf("About to cache flush... ");
-	cache_flush();
-	printf("done.\n");
-    }
-
-    static inline void tlb_flush(void)
-    {
-	__asm__ __volatile__ (
-	    "	mcr	p15, 0, r0, c8, c7, 0	\n"
-	::); 
-    }
-
-    static inline void tlb_flush_ent(addr_t vaddr, word_t log2size)
-    {
-	word_t a = (word_t)vaddr;
-
-        __asm__ __volatile__ (
-	    "	mcr	p15, 0, r0, c8, c5, 0	\n"	/* Invalidate I TLB */
-        ::); 
-	for (word_t i=0; i < (1ul << log2size); i += ARM_PAGE_SIZE)
-	{
-	    __asm__ __volatile__ (
-		"   mcr	    p15, 0, %0, c8, c6, 1   \n"	/* Invalidate D TLB entry */
-	    :: "r" (a));
-	    a += ARM_PAGE_SIZE;
-	}
-    }
-
-    static inline void tlb_flush_debug(void)
-    {
-        printf("About to TLB flush... ");
-        tlb_flush();
-        printf("done.\n");
-    }
-
-    static inline void cache_invalidate(word_t target)
-    {
-        __asm__ __volatile__ (
-	    "	mcr	p15, 0, %0, c7, c6, 1 \n"
-        :: "r" (target));
-    }
-
-    static inline void cache_clean(word_t target)
-    {
-        __asm__ __volatile__ (
-	    "	mcr	p15, 0, %0, c7, c10, 1 \n"
-        :: "r" (target));
-    }
-};
-
-#endif /* __PLATFORM__ARM__SA1100_CACHE_H_ */
diff --git a/kernel/src/arch/arm/sa1100/cpu.h b/kernel/src/arch/arm/sa1100/cpu.h
deleted file mode 100644
index a5ee467e..00000000
--- a/kernel/src/arch/arm/sa1100/cpu.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003,  National ICT Australia (NICTA)
- *
- * File path:     arch/sa1100/cpu.h
- * Description:   StrongARM SA-1100 CPU control functions
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cpu.h,v 1.5 2005/01/12 02:51:18 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__SA1100__CPU_H_
-#define __ARCH__ARM__SA1100__CPU_H_
-
-class arm_cpu
-{
-public:
-    static inline void cli(void)
-    {
-	__asm__  __volatile__ (
-	    "	    mrs	    r0,	    cpsr	    \n"
-	    "	    orr	    r0,	    r0,	    #0xd0   \n"
-	    "	    msr	    cpsr_c, r0		    \n"
-	::: "r0");
-    }
-
-    static inline void sti(void)
-    {
-	__asm__  __volatile__ (
-	    "	    mrs	    r0,	    cpsr	    \n"
-	    "	    and	    r0,	    r0,	    #0x1f   \n"
-	    "	    msr	    cpsr_c, r0		    \n"
-	::: "r0");
-    }
-
-    static inline void sleep(void)
-    {
-	/* Enter idle here to save power */
-	__asm__  __volatile__ (
-	    "	    mov	    r1,	    %0		    \n"
-	    "	    .align  5			    \n"
-	    "	    mcr	    p15, 0, r0, c15, c2, 2  \n"
-	    "	    ldr	    r0,	    [r1]	    \n"
-	    "	    mcr	    p15, 0, r0, c15, c8, 2  \n"
-	    "	    mcr	    p15, 0, r0, c15, c1, 2  \n"
-	:: "i" (UNCACHE_AREA_START)
-	: "r0", "r1");
-    }
-};
-
-#endif /* __ARCH__ARM__SA1100__CPU_H_ */
diff --git a/kernel/src/arch/arm/sa1100/intctrl.h b/kernel/src/arch/arm/sa1100/intctrl.h
deleted file mode 100644
index 0e8bab48..00000000
--- a/kernel/src/arch/arm/sa1100/intctrl.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb/intctrl.h
- * Description:   Functions which manipulate the SA-1100 interrupt controller
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: intctrl.h,v 1.5 2004/12/09 01:04:19 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__PLEB__INTCTRL_H_
-#define __PLATFORM__PLEB__INTCTRL_H_
-
-#include <intctrl.h>
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(thread.h)
-#include INC_API(space.h)
-#include INC_PLAT(timer.h)
-
-#define IRQS           32
-
-#define SA1100_IRQ_OS_TIMER_0 26
-
-#define SA1100_IBASE		(0x00050000UL + SA1100_OS_TIMER_BASE)
-#define SA1100_ICIP		(*(volatile word_t *)(SA1100_IBASE + 0x00))
-#define SA1100_ICMR		(*(volatile word_t *)(SA1100_IBASE + 0x04))
-#define SA1100_ICLR		(*(volatile word_t *)(SA1100_IBASE + 0x08))
-#define SA1100_ICFP		(*(volatile word_t *)(SA1100_IBASE + 0x10))
-#define SA1100_ICPR		(*(volatile word_t *)(SA1100_IBASE + 0x20))
-#define SA1100_ICCR		(*(volatile word_t *)(SA1100_IBASE + 0x0c))
-
-extern word_t arm_high_vector; 
-extern word_t interrupt_handlers[IRQS];
-
-class intctrl_t : public generic_intctrl_t {
-
-public:
-    void init_arch();
-    void init_cpu();
-
-    word_t get_number_irqs(void)
-    {
-        return IRQS;
-    }
-
-    void register_interrupt_handler (word_t vector, void (*handler)(word_t,
-            arm_irq_context_t *))
-    {
-        ASSERT(vector < IRQS);
-        interrupt_handlers[vector] = (word_t) handler;
-        TRACE_INIT("interrupt vector[%d] = %p\n", vector, 
-                interrupt_handlers[vector]);
-    }
-
-    static inline void mask(word_t irq)
-    {
-        if (irq >= IRQS) printf("irq = %d\n", irq);
-        ASSERT(irq < IRQS);
-        SA1100_ICMR &= ~(1 << irq);
-    }
-
-    static inline bool unmask(word_t irq)
-    {
-        ASSERT(irq < IRQS);
-        SA1100_ICMR |= (1 << irq);
-        return false;
-    }
-
-    static inline void disable(word_t irq)
-    {  
-        mask(irq);
-    }
-
-    static inline bool enable(word_t irq)
-    {
-        return unmask(irq);
-    }
-
-
-    void disable_fiq(void)
-    {
-	SA1100_ICLR = 0x0; /* No FIQs for now */
-    }
-
-    bool is_irq_available(int irq)
-    { 
-        return irq >= 0 && irq < IRQS && irq != SA1100_IRQ_OS_TIMER_0;  
-    }
-
-    void set_cpu(word_t irq, word_t cpu) {}
-
-
-}; 
-
-#endif /* __PLATFORM__PLEB__INTCTRL_H_ */
diff --git a/kernel/src/arch/arm/sa1100/sa1100.h b/kernel/src/arch/arm/sa1100/sa1100.h
deleted file mode 100644
index 2b32ce7c..00000000
--- a/kernel/src/arch/arm/sa1100/sa1100.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     arch/arm/sa1100.h
- * Description:   Intel StrongARM SA1100 definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sa1100.h,v 1.2 2004/06/04 02:14:23 cvansch Exp $
- *                
- ********************************************************************/
-
-
diff --git a/kernel/src/arch/arm/sa1100/syscon.h b/kernel/src/arch/arm/sa1100/syscon.h
deleted file mode 100644
index 8e513054..00000000
--- a/kernel/src/arch/arm/sa1100/syscon.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     arch/arm/sa1100/syscon.h
- * Description:   Intel StrongARM SA1100 coprocessor-15 definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscon.h,v 1.3 2004/06/04 02:14:23 cvansch Exp $
- *                
- ********************************************************************/
-
-
-#ifndef _ARCH_ARM_SA1100_SYSCON_H_
-#define _ARCH_ARM_SA1100_SYSCON_H_
-
-#define CPWAIT
-
-/* Coprocessor 15 */
-#define CP15			p15
-
-/* Primary CP15 registers (CRn) */
-#define C15_id			c0
-#define C15_control		c1
-#define C15_ttbase		c2
-#define C15_domain		c3
-#define C15_fault_status	c5
-#define C15_fault_addr		c6
-#define C15_cache_con		c7
-#define C15_tlb			c8
-#define C15_read_buf		c9
-#define C15_pid			c13
-#define C15_breakpoints		c14
-#define C15_function		c15
-
-/* Default secondary register (CRm) */
-#define C15_CRm_default		c0
-/* Default opcode2 register (opcode2) */
-#define C15_OP2_default		0
-
-/* CP15 - Control Register */
-#define C15_CONTROL_FIXED	0x0070
-#define C15_CONTROL_M		0x0001			/* Memory management enable	*/
-#define C15_CONTROL_A		0x0002			/* Alignment fault enable	*/
-#define C15_CONTROL_C		0x0004			/* Data cache enable		*/
-#define C15_CONTROL_W		0x0008			/* Write buffer enable		*/
-#define C15_CONTROL_B		0x0080			/* Big endian enable		*/
-#define C15_CONTROL_S		0x0100			/* System access checks in MMU	*/
-#define C15_CONTROL_R		0x0200			/* ROM access checks in MMU	*/
-#define C15_CONTROL_I		0x1000			/* Instruction cache enable	*/
-#define C15_CONTROL_X		0x2000			/* Remap interrupt vector	*/
-
-/* Default to little endian */
-#define C15_CONTROL_INIT	(C15_CONTROL_FIXED)
-/* Kernel mode - little endian, cached, write buffer, remap to 0xffff0000 */
-#define C15_CONTROL_KERNEL	(C15_CONTROL_FIXED | C15_CONTROL_M | C15_CONTROL_C | C15_CONTROL_W |	\
-				 C15_CONTROL_S | C15_CONTROL_I | C15_CONTROL_X)
-
-#if !defined(ASSEMBLY)
-
-#define _INS_(x) #x
-#define STR(x) _INS_(x)
-
-/* Read from coprocessor 15 register */
-#define read_cp15_register(CRn, CRm, op2)	\
-({ word_t _read;				\
-    __asm__ __volatile__ (			\
-    "mrc    p15, 0, %0,"STR(CRn)",			\
-    "STR(CRm)","STR(op2)";\n"			\
-    : "=r" (_read));				\
-    _read;})
-
-/* Write to coprocessor 15 register */
-#define write_cp15_register(CRn, CRm, op2, val)	\
-    __asm__ __volatile__ (			\
-    "mcr    p15, 0, %0,"STR(CRn)",			\
-    "STR(CRm)","STR(op2)";\n"			\
-    :: "r" (val));				\
-
-#endif
-
-#endif /*_ARCH_ARM_SA1100_SYSCON_H_*/
diff --git a/kernel/src/arch/arm/sa1100/timer.h b/kernel/src/arch/arm/sa1100/timer.h
deleted file mode 100644
index ac51e0e0..00000000
--- a/kernel/src/arch/arm/sa1100/timer.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/sa1100/timer.h
- * Description:   Functions which manipulate the SA-1100 OS timer
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.h,v 1.8 2005/01/12 02:51:18 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__SA1100__TIMER_H_
-#define __ARCH__ARM__SA1100__TIMER_H_
-
-#define SA1100_TIMER_PHYS	0x90000000ul
-#define SA1100_POWER_PHYS	0x90020000ul
-
-#define	TIMER_TICK_LENGTH	10000 /* usec */
-#define TIMER_MAX_RATE          3686400
-#define TIMER_PERIOD            (TIMER_MAX_RATE/100)
-
-#define SA1100_OS_TIMER_BASE	(IO_AREA2_VADDR)
-#define SA1100_OS_TIMER_OSMR0	(*(volatile word_t *)(SA1100_OS_TIMER_BASE + 0x00))
-#define SA1100_OS_TIMER_OSMR1	(*(volatile word_t *)(SA1100_OS_TIMER_BASE + 0x04))
-#define SA1100_OS_TIMER_OSMR2	(*(volatile word_t *)(SA1100_OS_TIMER_BASE + 0x08))
-#define SA1100_OS_TIMER_OSMR3	(*(volatile word_t *)(SA1100_OS_TIMER_BASE + 0x0c))
-#define SA1100_OS_TIMER_OSCR	(*(volatile word_t *)(SA1100_OS_TIMER_BASE + 0x10))
-#define SA1100_OS_TIMER_OSSR	(*(volatile word_t *)(SA1100_OS_TIMER_BASE + 0x14))
-#define SA1100_OS_TIMER_OWER	(*(volatile word_t *)(SA1100_OS_TIMER_BASE + 0x18))
-#define SA1100_OS_TIMER_OIER	(*(volatile word_t *)(SA1100_OS_TIMER_BASE + 0x1c))
-
-#define SA1100_POWER_BASE	(IO_AREA2_VADDR + 0x20000ul)
-#define SA1000_POWER_PMCR	(*(volatile word_t *)(SA1100_POWER_BASE + 0x00))    /* Power manager control register		*/
-#define SA1000_POWER_PSSR	(*(volatile word_t *)(SA1100_POWER_BASE + 0x04))    /* Power manager sleep status register	*/
-#define SA1000_POWER_PSPR	(*(volatile word_t *)(SA1100_POWER_BASE + 0x08))    /* Power manager scratchpad register	*/
-#define SA1000_POWER_PWER	(*(volatile word_t *)(SA1100_POWER_BASE + 0x0c))    /* Power manager wakeup enable register	*/
-#define SA1000_POWER_PCFR	(*(volatile word_t *)(SA1100_POWER_BASE + 0x10))    /* Power manager configuration register	*/
-#define SA1000_POWER_PPCR	(*(volatile word_t *)(SA1100_POWER_BASE + 0x14))    /* Power manager PLL configuration register	*/
-#define SA1000_POWER_PGSR	(*(volatile word_t *)(SA1100_POWER_BASE + 0x18))    /* Power manager GPIO sleep state register	*/
-#define SA1000_POWER_POSR	(*(volatile word_t *)(SA1100_POWER_BASE + 0x1c))    /* Power manager oscillator status register	*/
-
-#endif /* __ARCH__ARM__SA1100__TIMER_H_*/
diff --git a/kernel/src/arch/arm/string.cc b/kernel/src/arch/arm/string.cc
deleted file mode 100644
index d576d34a..00000000
--- a/kernel/src/arch/arm/string.cc
+++ /dev/null
@@ -1,64 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:      arch/arm/string.cc
- * Description:    ARM optimised string operations
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: string.cc,v 1.1 2004/12/09 01:31:22 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-
-extern "C" void * memcpy (void * dst, const void * src, unsigned int len)
-{
-    if (EXPECT_FALSE( ((word_t)dst & 3) || ((word_t)src & 3) || (len & 3)))
-    {
-	u8_t *d = (u8_t *) dst;
-	u8_t *s = (u8_t *) src;
-
-	while (len-- > 0)
-	    *d++ = *s++;
-    } else {
-	u32_t *d = (u32_t *) dst;
-	u32_t *s = (u32_t *) src;
-	len = len / 4;
-
-	while (len-- > 0)
-	    *d++ = *s++;
-    }
-    return dst;
-}
-
-extern "C" void * memset (void * dst, unsigned int c, unsigned int len)
-{
-    u8_t *s = (u8_t *) dst;
-
-    while (len-- > 0)
-	*s++ = c;
-
-    return dst;
-}
-
diff --git a/kernel/src/arch/arm/thread.h b/kernel/src/arch/arm/thread.h
deleted file mode 100644
index d3732b76..00000000
--- a/kernel/src/arch/arm/thread.h
+++ /dev/null
@@ -1,169 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/arm/thread.h
- * Description:   Thread switch and interrupt stack frames
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: thread.h,v 1.15 2004/12/02 00:13:52 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__THREAD_H__
-#define __ARCH__ARM__THREAD_H__
-
-#define ARM_IPC_STACK_SIZE    12
-#define ARM_USER_FLAGS_MASK   0xf0000000UL
-
-
-#if !defined(__ASSEMBLER__)
-
-class arm_switch_stack_t {
-    public:
-	u32_t r4;   /* -0 - */
-	u32_t r5;   /*  4   */
-	u32_t r11;  /*  8   */
-	u32_t lr;   /*  12  */
-};
-#endif
-
-#define SS_R4	0
-#define SS_R5	4
-#define SS_R11	8
-#define SS_LR	12
-
-#if !defined(__ASSEMBLER__)
-
-
-/* Must match #defines below */
-class arm_irq_context_t {
-    public:
-        u32_t klr;    /*  0   */
-        u32_t cpsr;   /*  4   */
-        u32_t r0;     /* -8-  */
-        u32_t r1;     /*  12  */
-        u32_t r2;     /*  16  */
-        u32_t r3;     /*  20  */
-        u32_t r4;     /* -24- */
-        u32_t r5;     /*  28  */
-        u32_t r6;     /*  32  */
-        u32_t r7;     /*  36  */
-        u32_t r8;     /* -40- */
-        u32_t r9;     /*  44  */
-        u32_t r10;    /*  48  */
-        u32_t r11;    /*  52  */
-        u32_t r12;    /* -56- */
-        u32_t lr;     /*  60  */
-        u32_t sp;     /*  64  */
-        u32_t pc;     /*  68  */
-};
-#endif
-
-#define PT_KLR      0
-#define PT_CPSR     4
-#define PT_R0       8 
-#define PT_R1       12
-#define PT_R2       16
-#define PT_R3       20
-#define PT_R4       24
-#define PT_R5       28
-#define PT_R6       32
-#define PT_R7       36
-#define PT_R8       40
-#define PT_R9       44
-#define PT_R10      48
-#define PT_R11      52
-#define PT_R12      56
-#define PT_LR       60
-#define PT_SP       64
-#define PT_PC       68
-
-#define PT_SIZE     72
-
-#define SAVE_ALL_INT			\
-    stmdb   sp!,    {lr};		\
-    stmdb   sp,	    {r13}^;		\
-    nop;				\
-    sub     sp,     sp,     #(4);	\
-    stmdb   sp,	    {r0-r12, r14}^;	\
-    nop;				\
-    sub     sp,     sp,     #(PT_SIZE-8);
-
-#define SAVE_CPSR_MRS			\
-    mrs     lr,     spsr;		\
-    str     lr,     [sp, #PT_CPSR];
-
-#define SAVE_CPSR_TMP			\
-    ldr     lr,     tmp_spsr_abt;	\
-    str     lr,     [sp, #PT_CPSR];
-
-#define RESTORE_ALL			\
-    ldr     r0,     [sp, #PT_CPSR];	\
-    msr     spsr,   r0;			\
-    add     sp,     sp,     #(PT_SIZE-8);	\
-    ldmdb   sp,     {r0-r12, r14}^;	\
-    nop;				\
-    add     sp,     sp,     #(4);	\
-    ldmdb   sp,     {r13}^;		\
-    nop;				\
-    ldmia   sp!,    {lr};
-
-#ifdef CONFIG_ENABLE_FASS 
-#define SET_KERNEL_DACR                \
-        ldr     ip,     =0x55555555;   \
-        mcr     p15, 0, ip, c3, c0;    \
-        mov     ip,     #0;            \
-        mcr     p15, 0, ip, c13, c0;
-#else
-#define SET_KERNEL_DACR
-#endif
-
-// dacr = (0x00000001 | (1 << (2 * current_domain)));
-#ifdef CONFIG_ENABLE_FASS             
-#define SET_USER_DACR                    \
-        ldr     ip,     =current_domain; \
-        ldr     ip,     [ip];            \
-        mov     ip,     ip, lsl #1;      \
-        mov     lr,     #1;              \
-        orr     lr,     lr, lr, lsl ip;  \
-        mcr     p15, 0, lr, c3, c0;      \
-        ldr     ip,     =current_pid;    \
-        ldr     ip,     [ip];            \
-        mcr     p15, 0, ip, c13, c0;
-
-/* If inside the kernel, don't modify DACR */
-#define SET_USER_DACR_K                \
-        ldr     ip,     [sp, #PT_CPSR];\
-        and     ip,     ip,     #0x1f; \
-        cmp     ip,     #0x10;         \
-        bne     1f;                    \
-        SET_USER_DACR                  \
-1:  
-
-#else
-#define SET_USER_DACR
-#define SET_USER_DACR_K
-#endif
-
-#endif /* __ARCH__ARM__THREAD_H__ */
diff --git a/kernel/src/arch/arm/types.h b/kernel/src/arch/arm/types.h
deleted file mode 100644
index b25e768f..00000000
--- a/kernel/src/arch/arm/types.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/arm/types.h
- * Description:   ARM-specific basic data types
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.2 2003/09/24 19:04:27 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__ARM__TYPES_H__
-#define __ARCH__ARM__TYPES_H__
-
-
-#define L4_32BIT
-#undef  L4_64BIT
-
-
-typedef unsigned int __attribute__((__mode__(__DI__))) u64_t;
-typedef unsigned int		u32_t;
-typedef unsigned short		u16_t;
-typedef unsigned char		u8_t;
-
-typedef signed int __attribute__((__mode__(__DI__))) s64_t;
-typedef signed int		s32_t;
-typedef signed short		s16_t;
-typedef signed char		s8_t;
-
-/**
- *	word_t - machine word wide unsigned int
- */
-typedef u32_t			word_t;
-
-#endif /* !__ARCH__ARM__TYPES_H__ */
diff --git a/kernel/src/arch/arm/xscale/cache.h b/kernel/src/arch/arm/xscale/cache.h
deleted file mode 100644
index ddb7c2ad..00000000
--- a/kernel/src/arch/arm/xscale/cache.h
+++ /dev/null
@@ -1,233 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arm/xscale/cache.h
- * Description:   Functions which manipulate the XScale cache
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cache.h,v 1.6 2005/01/12 02:52:39 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__XSCALE_CACHE_H_
-#define __ARCH__ARM__XSCALE_CACHE_H_
-
-#include <debug.h>
-#include INC_CPU(syscon.h)
-#include INC_PLAT(cache.h)	/* Get cache size */
-
-class arm_cache
-{
-public:
-
-    static inline void cache_flush(void)
-    {
-	word_t vstart = VAR_AREA_START;
-	/* Use unmapped VAR_AREA */
-	__asm__ __volatile__ (
-	    "	add	r0,	%0,	%1	\n"
-	    "1:					\n"
-	    "	mcr	p15, 0, %0, c7, c2, 5	\n"	    /* Allocate Line */
-	    "	add	%0,	%0,	%2	\n"
-	    "	mcr	p15, 0, %0, c7, c2, 5	\n"	    /* Allocate Line */
-	    "	add	%0,	%0,	%2	\n"
-	    "	mcr	p15, 0, %0, c7, c2, 5	\n"	    /* Allocate Line */
-	    "	add	%0,	%0,	%2	\n"
-	    "	mcr	p15, 0, %0, c7, c2, 5	\n"	    /* Allocate Line */
-	    "	add	%0,	%0,	%2	\n"
-	    "	teq	r0,	%0		\n"
-	    "	bne	1b			\n"
-	    : "+r" (vstart)
-	    : "i" (CACHE_SIZE), "i" (CACHE_LINE_SIZE)
-	    : "r0"
-	);
-
-        __asm__ __volatile__ (
-	    "	mov	r0,	#0		\n"
-            "	mcr	p15, 0, r0, c7, c5, 0	\n"	/* Flush I cache / BTB */
-            "	mcr	p15, 0, r0, c7, c10, 4	\n"	/* Drain Write buffer */
-	    ::: "r0"
-        );
-
-    }
-
-    static inline void flush_icache_ent(addr_t vaddr, word_t log2size)
-    {
-	if (log2size >= 15) {
-		cache_flush();
-		return;
-	}
-	word_t size = 1ul << log2size;
-
-	__asm__ __volatile__ (
-	    "					\n"
-	    "    add     r1,     %0,	%1	\n"
-	    "1:					\n"
-	    "    mcr     p15, 0, %0, c7, c5, 1	\n" /* flush I cache line */
-	    "    add     %0,     %0,    %2	\n"
-	    "    teq     r1,     %0		\n"
-	    "    bne     1b			\n"
-	    "    mov     %0,     #0		\n"
-	    "					\n"
-	    "    mcr     p15, 0, %0, c7, c5, 6	\n" /* flush BTB */
-	    "					\n"
-	    : "+r" (vaddr)
-	    : "r" (size), "i" (CACHE_LINE_SIZE)
-	    : "r1", "memory");
-    }
-
-    static inline void flush_dcache_ent(addr_t vaddr, word_t log2size)
-    {
-	if (log2size >= 15) {
-		cache_flush();
-		return;
-	}
-	word_t size = 1ul << log2size;
-
-	__asm__ __volatile__ (
-	    "					\n"
-	    "    add     r1,     %0,	%1	\n"
-	    "1:					\n"
-	    "    mcr     p15, 0, %0, c7, c10, 1	\n" /* clean D cache line */
-	    "    mcr     p15, 0, %0, c7, c6, 1	\n" /* flush D cache line */
-	    "    add     %0,     %0,    %2	\n"
-	    "    teq     r1,     %0		\n"
-	    "    bne     1b			\n"
-	    "    mov     %0,     #0		\n"
-	    "					\n"
-	    /* Should probably also flush mini-D cache here if used */
-	    "					\n"
-	    "    mcr     p15, 0, %0, c7, c10, 4	\n" /* drain write buffer */
-	    "					\n"
-	    : "+r" (vaddr)
-	    : "r" (size), "i" (CACHE_LINE_SIZE)
-	    : "r1", "memory");
-    }
-
-    static inline void  flush_ent(addr_t vaddr, word_t log2size)
-    {
-	if (log2size >= 15) {
-		cache_flush();
-		return;
-	}
-	word_t size = 1ul << log2size;
-
-	__asm__ __volatile__ (
-	    "					\n"
-	    "    add     r1,     %0,	%1	\n"
-	    "1:					\n"
-	    "    mcr     p15, 0, %0, c7, c10, 1	\n" /* clean D cache line */
-	    "    mcr     p15, 0, %0, c7, c6, 1	\n" /* flush D cache line */
-	    "    mcr     p15, 0, %0, c7, c5, 1	\n" /* flush I cache line */
-	    "    add     %0,     %0,    %2	\n"
-	    "    teq     r1,     %0		\n"
-	    "    bne     1b			\n"
-	    "    mov     %0,     #0		\n"
-	    "					\n"
-	    /* Should probably also flush mini-D cache here if used */
-	    "					\n"
-	    "    mcr     p15, 0, %0, c7, c10, 4	\n" /* drain write buffer */
-	    "    mcr     p15, 0, %0, c7, c5, 6	\n" /* flush BTB */
-	    "					\n"
-	    : "+r" (vaddr)
-	    : "r" (size), "i" (CACHE_LINE_SIZE)
-	    : "r1", "memory");
-    }
-
-    static inline void cache_flush_debug(void)
-    {
-        printf("About to cache flush... ");
-        cache_flush();
-        printf("done.\n");
-    }
-
-    static inline void tlb_flush(void)
-    {
-	/* Flush I&D TLB */
-        __asm__ __volatile__ (
-            "mcr    p15, 0, r0, c8, c7, 0    \n"
-        ::); 
-	CPWAIT;
-    }
-
-    static inline void tlb_flush_ent(addr_t vaddr, word_t log2size)
-    {
-	word_t a = (word_t)vaddr;
-
-	for (word_t i=0; i < (1ul << log2size); i += ARM_PAGE_SIZE)
-	{
-	    __asm__ __volatile__ (
-		"    mcr     p15, 0, %0, c8, c5, 1    \n"	/* Invalidate I TLB entry */
-		"    mcr     p15, 0, %0, c8, c6, 1    \n"	/* Invalidate D TLB entry */
-	    :: "r" (a));
-	    a += ARM_PAGE_SIZE;
-	}
-    }
-
-    static inline void tlb_flush_debug(void)
-    {
-        printf("About to TLB flush... ");
-        tlb_flush();
-        printf("done.\n");
-    }
-
-    static inline void cache_enable()
-    {
-        __asm__ __volatile__ (
-            "mcr    p15, 0, r0, c7, c10, 4  \n"	// Drain the pending operations
-            "mrc    p15, 0, r0, c1, c0, 0   \n"	// Get the control register
-	    "orr    r0, r0, #0x1004	    \n"	// Set bit 12 - the I & D bit
-            "mcr    p15, 0, r0, c1, c0, 0   \n"	// Set the control register
-	    ::: "r0"
-        );
-	CPWAIT;
-    }
-
-    static inline void cache_invalidate_d_line(word_t target)
-    {
-        __asm__ __volatile__ (
-            "mcr p15, 0, %0, c7, c6, 1 \n"
-        :: "r" (target));
-	CPWAIT;
-    }
-
-    static inline void cache_invalidate_d()
-    {
-        __asm__ __volatile__ (
-            "mcr p15, 0, r0, c7, c6, 0 \n"
-        ::: "r0"
-	);
-	CPWAIT;
-    }
-
-    static inline void cache_clean(word_t target)
-    {
-        __asm__ __volatile__ (
-            "mcr p15, 0, %0, c7, c10, 1 \n"
-        :: "r" (target));
-	CPWAIT;
-    }
-};
-
-#endif /* __ARCH__ARM__XSCALE_CACHE_H_ */
diff --git a/kernel/src/arch/arm/xscale/cpu.h b/kernel/src/arch/arm/xscale/cpu.h
deleted file mode 100644
index e5e4cae7..00000000
--- a/kernel/src/arch/arm/xscale/cpu.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     arch/xscale/cpu.h
- * Description:   Intel XScale CPU control functions
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cpu.h,v 1.3 2004/12/02 21:58:55 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __ARCH__ARM__XSCALE__CPU_H_
-#define __ARCH__ARM__XSCALE__CPU_H_
-
-#define IODEVICE_VADDR		IO_AREA0_VADDR
-
-class arm_cpu
-{
-public:
-    static inline void cli(void)
-    {
-	__asm__  __volatile__ (
-	    "        mrs     r0,     cpsr          \n"
-	    "        orr     r0,     r0,     #0xd0 \n"
-	    "        msr     cpsr_c, r0            \n"
-	::: "r0");
-    }
-
-    static inline void sti(void)
-    {
-	__asm__  __volatile__ (
-	    "        mrs     r0,     cpsr          \n"
-	    "        and     r0,     r0,     #0x1f \n"
-	    "        msr     cpsr_c, r0            \n"
-	::: "r0");
-    }
-
-    static inline void sleep(void)
-    {
-	/* Can maybe execute idle instructions here to save power */
-	for (int i = 0; i < 10000; ++i)
-	    __asm__ __volatile__ ("nop");
-    }
-};
-
-#endif /* __ARCH__ARM__XSCALE__CPU_H_ */
diff --git a/kernel/src/arch/arm/xscale/syscon.h b/kernel/src/arch/arm/xscale/syscon.h
deleted file mode 100644
index d2ad9c22..00000000
--- a/kernel/src/arch/arm/xscale/syscon.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     arch/arm/xscale/syscon.h
- * Description:   Intel XScale coprocessor-15 definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscon.h,v 1.2 2004/06/04 02:14:24 cvansch Exp $
- *                
- ********************************************************************/
-
-
-#ifndef _ARCH_ARM_SA1100_SYSCON_H_
-#define _ARCH_ARM_SA1100_SYSCON_H_
-
-/* Coprocessor 15 */
-#define CP15			p15
-
-/* Primary CP15 registers (CRn) */
-#define C15_id			c0
-#define C15_control		c1
-#define C15_ttbase		c2
-#define C15_domain		c3
-#define C15_fault_status	c5
-#define C15_fault_addr		c6
-#define C15_cache_con		c7
-#define C15_tlb			c8
-#define C15_cache_lock		c9
-#define C15_tlb_lock		c10
-#define C15_pid			c13
-#define C15_breakpoints		c14
-#define C15_coprocessor		c15
-
-/* Default secondary register (CRm) */
-#define C15_CRm_default		c0
-/* Default opcode2 register (opcode2) */
-#define C15_OP2_default		0
-
-/* CP15 - Control Register */
-#define C15_CONTROL_FIXED	0x0078
-#define C15_CONTROL_M		0x0001			/* Memory management enable	*/
-#define C15_CONTROL_A		0x0002			/* Alignment fault enable	*/
-#define C15_CONTROL_C		0x0004			/* Data cache enable		*/
-//#define C15_CONTROL_W		0x0008			/* Write buffer enable		*/
-#define C15_CONTROL_B		0x0080			/* Big endian enable		*/
-#define C15_CONTROL_S		0x0100			/* System access checks in MMU	*/
-#define C15_CONTROL_R		0x0200			/* ROM access checks in MMU	*/
-#define C15_CONTROL_Z		0x0800			/* Branch Target Buffer Enable	*/
-#define C15_CONTROL_I		0x1000			/* Instruction cache enable	*/
-#define C15_CONTROL_X		0x2000			/* Remap interrupt vector	*/
-
-#if defined(CONFIG_BIGENDIAN)
-#define	    ARM_ENDIAN		C15_CONTROL_B
-#else
-#define	    ARM_ENDIAN		0
-#endif
-
-#define C15_CONTROL_INIT	(C15_CONTROL_FIXED | ARM_ENDIAN)
-
-/* Kernel mode - little endian, cached, write buffer, remap to 0xffff0000 */
-#define C15_CONTROL_KERNEL	(C15_CONTROL_FIXED | C15_CONTROL_M | C15_CONTROL_C |	\
-				 ARM_ENDIAN | C15_CONTROL_S | C15_CONTROL_Z |		\
-				 C15_CONTROL_I | C15_CONTROL_X)
-
-#if !defined(ASSEMBLY)
-
-#define _INS_(x) #x
-#define STR(x) _INS_(x)
-
-/* Read from coprocessor 15 register */
-#define read_cp15_register(CRn, CRm, op2)	\
-({ word_t _read;				\
-    __asm__ __volatile__ (			\
-    "mrc    p15, 0, %0,"STR(CRn)",			\
-    "STR(CRm)","STR(op2)";\n"			\
-    : "=r" (_read));				\
-    _read;})
-
-/* Write to coprocessor 15 register */
-#define write_cp15_register(CRn, CRm, op2, val)	\
-    __asm__ __volatile__ (			\
-    "mcr    p15, 0, %0,"STR(CRn)",		\
-    "STR(CRm)","STR(op2)";\n"			\
-    :: "r" (val));				\
-
-/* CPWAIT - Wait for CP15 Update */
-#define CPWAIT					\
-    __asm__ __volatile__ (			\
-    "mrc    p15, 0, r0, c2, c0, 0;  \n"		\
-    "mov    r0, r0;		    \n"		\
-    "sub    pc, pc, #4;		    \n"		\
-    ::: "r0")
-   
-
-#endif
-
-#endif /*_ARCH_ARM_SA1100_SYSCON_H_*/
diff --git a/kernel/src/arch/ia64/Makeconf b/kernel/src/arch/ia64/Makeconf
deleted file mode 100644
index 8415b654..00000000
--- a/kernel/src/arch/ia64/Makeconf
+++ /dev/null
@@ -1,8 +0,0 @@
-SOURCES+=	src/arch/ia64/efi.cc \
-		src/arch/ia64/itc_timer.cc \
-		src/arch/ia64/memory.cc \
-		src/arch/ia64/pal.cc \
-		src/arch/ia64/sal.cc \
-		src/arch/ia64/subr_asm.S \
-		src/arch/ia64/subr_init.cc
-
diff --git a/kernel/src/arch/ia64/ar.h b/kernel/src/arch/ia64/ar.h
deleted file mode 100644
index b9139613..00000000
--- a/kernel/src/arch/ia64/ar.h
+++ /dev/null
@@ -1,147 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/ar.h
- * Description:   IA64 application registers
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ar.h,v 1.7 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__AR_H__
-#define __ARCH__IA64__AR_H__
-
-
-#define FRAME_MARKER(input, local, output) \
-    (((input + local) << 7) + (input + local + output))
-
-#if !defined(ASSEMBLY)
-
-class ar_pfs_t
-{
-public:
-    union {
-	struct {
-	    word_t sof			: 7;
-	    word_t sol			: 7;
-	    word_t sor			: 4;
-	    word_t rrb_gr		: 7;
-	    word_t rrb_fr		: 7;
-	    word_t rrb_pr		: 6;
-	    word_t __rv1		: 14;
-	    word_t previous_ec		: 6;
-	    word_t __rv2		: 4;
-	    word_t previous_priv	: 2;
-	};
-	u64_t raw;
-    };
-
-    word_t locals (void)
-	{ return sol; }
-
-    word_t outputs (void)
-	{ return sof - sol; }
-
-    word_t framesize (void)
-	{ return sof; }
-};
-
-class ar_fpsr_t
-{
-public:
-    union {
-	struct {
-	    word_t traps_vd	: 1;
-	    word_t traps_dd	: 1;
-	    word_t traps_zd	: 1;
-	    word_t traps_od	: 1;
-	    word_t traps_ud	: 1;
-	    word_t traps_id	: 1;
-
-	    word_t sf0		: 13;
-	    word_t sf1		: 13;
-	    word_t sf2		: 13;
-	    word_t sf3		: 13;
-	    word_t __rv		: 6;
-	};
-	u64_t raw;
-    };
-
-    enum ctrl_e {
-	ftz		= (1 << 0),
-	wre		= (1 << 1),
-	pc_0		= (0 << 2),
-	pc_1		= (1 << 2),
-	pc_2		= (2 << 2),
-	pc_3		= (3 << 2),
-	rc_zero		= (0 << 4),
-	rc_up		= (1 << 4),
-	rc_down		= (2 << 4),
-	rc_nearest	= (2 << 4),
-	td		= (1 << 6)
-    };
-
-    enum flags_e {
-	v = (1 << 7),
-	d = (1 << 8),
-	z = (1 << 9),
-	o = (1 << 10),
-	u = (1 << 11),
-	i = (1 << 12)
-    };
-
-    void enable_all_traps (void)
-	{
-	    traps_vd = traps_dd = traps_zd = traps_od =
-		traps_ud = traps_id = 0;
-	}
-
-    void disable_all_traps (void)
-	{
-	    traps_vd = traps_dd = traps_zd = traps_od =
-		traps_ud = traps_id = 1;
-	}
-
-    void set_sf0 (word_t sf) { sf0 = sf; }
-    void set_sf1 (word_t sf) { sf1 = sf; }
-    void set_sf2 (word_t sf) { sf2 = sf; }
-    void set_sf3 (word_t sf) { sf3 = sf; }
-};
-
-
-INLINE word_t ar_get_itc (void)
-{
-    word_t itc;
-    __asm__ __volatile__ ("mov %0 = ar.itc" :"=r" (itc));
-    return itc;
-}
-
-INLINE void ar_set_itc (word_t count)
-{
-    __asm__ __volatile__ ("mov ar.itc = %0" ::"r" (count));
-}
-
-#endif /* !ASSEMBLY */
-
-#endif /* !__ARCH__IA64__AR_H__ */
diff --git a/kernel/src/arch/ia64/asm.h b/kernel/src/arch/ia64/asm.h
deleted file mode 100644
index 5d5530f8..00000000
--- a/kernel/src/arch/ia64/asm.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/asm.h
- * Description:   Assembler specific macros
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.5 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__ASM_H__
-#define __ARCH__IA64__ASM_H__
-
-#if defined(ASSEMBLY)
-
-#define BEG_PROC(func)			 \
-	.globl	func			;\
-	.align	16			;\
-	.proc	func			;\
-func:
-
-
-#define END_PROC(func)			\
-	.endp	func
-
-
-#if 0
-#define ITANIUM_A_STEP_BSW	nop.i 0x0 ;; nop.i 0x0 ;; nop.i 0x0 ;;
-#else
-#define ITANIUM_A_STEP_BSW
-#endif
-
-#define enter_kdebug(text)			\
-{ .mlx						;\
-	break.m 0x3				;\
-	movl	r0 = 1f ;;			;\
-}						;\
-	.rodata					;\
-1:	stringz text				;\
-	.previous
-
-
-#endif /* ASSEMBLY */
-
-#endif /* !__ARCH__IA64__ASM_H__ */
diff --git a/kernel/src/arch/ia64/breakpoint.h b/kernel/src/arch/ia64/breakpoint.h
deleted file mode 100644
index 5607eadb..00000000
--- a/kernel/src/arch/ia64/breakpoint.h
+++ /dev/null
@@ -1,260 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003, 2005,  Karlsruhe University
- *                
- * File path:     arch/ia64/breakpoint.h
- * Description:   IA-64 breakpoints
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: breakpoint.h,v 1.5 2005/10/19 16:19:32 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__BREAKPOINT_H__
-#define __ARCH__IA64__BREAKPOINT_H__
-
-
-/**
- * Generic IA-64 instruction/data breakpoint
- */
-class breakpoint_t
-{
-protected:
-    union {
-	struct {
-	    word_t address	: 64;
-	    word_t mask		: 56;
-	    word_t plm		: 4;
-	    word_t __ig		: 2;
-	    word_t w		: 1;
-	    word_t rx		: 1;
-	};
-	u64_t raw[2];
-    };
-
-public:
-    enum priv_e {
-	kernel	= 1,
-	user	= 8,
-	both	= 9
-    };
-
-    // Constructors
-
-    breakpoint_t (void) {}
-
-    // Modification
-
-    void enable (void)
-	{ w = 1; rx = 1; }
-
-    void disable (void)
-	{ w = 0; rx = 0; }
-
-    // Retrieval
-
-    word_t get_address (void)
-	{ return address; }
-
-    word_t get_mask (void)
-	{ return mask | ~((1UL << 55) - 1); }
-
-    priv_e get_priv (void)
-	{ return (priv_e) plm; }
-};
-
-
-
-/**
- * IA-64 data breakpoint
- */
-class data_breakpoint_t : public breakpoint_t
-{
-public:
-    // Constructors
-
-    data_breakpoint_t (void) {}
-
-    data_breakpoint_t (addr_t addr, word_t mask, priv_e p, bool w, bool r)
-	{
-	    this->address = (word_t) addr;
-	    this->mask = mask;
-	    this->plm = (word_t) p;
-	    this->w = w;
-	    this->rx = r;
-	}
-
-    // Retrieval
-
-    bool is_active (void)
-	{ return w || rx; }
-
-    bool is_read_match (void)
-	{ return rx; }
-
-    bool is_write_match (void)
-	{ return w; }
-
-    // Register access
-
-    void put (word_t num);
-    void get (word_t num);
-};
-
-
-/**
- * Put breakpoint value into data breakpoint registers.
- * @param num		register pair number
- */
-INLINE void data_breakpoint_t::put (word_t num)
-{
-    __asm__ __volatile__ (
-	"	;;			\n"
-	"	.reg.val %0,0		\n"
-	"	mov dbr[%0] = %2	\n"
-	"	.reg.val %1,1		\n"
-	"	mov dbr[%1] = %3	\n"
-	"	;;			\n"
-	"	srlz.d			\n"
-	"	;;			\n"
-	:
-	:
-	"r" (num*2),    "r" ((num*2) + 1),
-	"r" (raw[0]), "r" (raw[1]));
-}
-
-
-/**
- * Read breakpoint value from data breakpoint registers.
- * @param num		register pair number
- */
-INLINE void data_breakpoint_t::get (word_t num)
-{
-    __asm__ __volatile__ (
-	"	mov %0 = dbr[%2]	\n"
-	"	mov %1 = dbr[%3]	\n"
-	"	;;			\n"
-	:
-	"=&r" (raw[0]), "=r" (raw[1])
-	:
-	"r" (num*2), "r" ((num*2) + 1));
-}
-
-
-/**
- * Read data breakpoint register pair.
- * @param num		register pair number
- * @return the indicated data breakpoint register pair
- */
-INLINE data_breakpoint_t get_dbr (word_t num)
-{
-    data_breakpoint_t dbr;
-    dbr.get (num);
-    return dbr;
-}
-
-
-
-
-/**
- * IA-64 instruction breakpoint
- */
-class instr_breakpoint_t : public breakpoint_t
-{
-public:
-    // Constructors
-
-    instr_breakpoint_t (void) {}
-
-    instr_breakpoint_t (addr_t addr, word_t mask, priv_e p, bool x)
-	{
-	    this->address = (word_t) addr;
-	    this->mask = mask;
-	    this->plm = (word_t) p;
-	    this->rx = x;
-	}
-
-    // Retrieval
-
-    bool is_active (void)
-	{ return rx; }
-
-    // Register access
-
-    void put (word_t num);
-    void get (word_t num);
-};
-
-
-/**
- * Put breakpoint value into instruction breakpoint registers.
- * @param num		register pair number
- */
-INLINE void instr_breakpoint_t::put (word_t num)
-{
-    __asm__ __volatile__ (
-	"	;;			\n"
-	"	.reg.val %0,0		\n"
-	"	mov ibr[%0] = %2	\n"
-	"	.reg.val %1,1		\n"
-	"	mov ibr[%1] = %3	\n"
-	"	;;			\n"
-	"	srlz.i			\n"
-	"	;;			\n"
-	:
-	:
-	"r" (num*2),    "r" ((num*2) + 1),
-	"r" (raw[0]), "r" (raw[1]));
-}
-
-
-/**
- * Read breakpoint value from instruction breakpoint registers.
- * @param num		register pair number
- */
-INLINE void instr_breakpoint_t::get (word_t num)
-{
-    __asm__ __volatile__ (
-	"	mov %0 = ibr[%2]	\n"
-	"	mov %1 = ibr[%3]	\n"
-	"	;;			\n"
-	:
-	"=&r" (raw[0]), "=r" (raw[1])
-	:
-	"r" (num*2), "r" ((num*2) + 1));
-}
-
-
-/**
- * Read instruction breakpoint register pair.
- * @param num		register pair number
- * @return the indicated instruction breakpoint register pair
- */
-INLINE instr_breakpoint_t get_ibr (word_t num)
-{
-    instr_breakpoint_t ibr;
-    ibr.get (num);
-    return ibr;
-}
-
-
-#endif /* !__ARCH__IA64__BREAKPOINT_H__ */
diff --git a/kernel/src/arch/ia64/config.h b/kernel/src/arch/ia64/config.h
deleted file mode 100644
index 24ff5e33..00000000
--- a/kernel/src/arch/ia64/config.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/config.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__CONFIG_H__
-#define __ARCH__IA64__CONFIG_H__
-
-#define IA64_CACHE_LINE_SIZE		32
-
-#endif /* !__ARCH__IA64__CONFIG_H__ */
diff --git a/kernel/src/arch/ia64/cpuid.h b/kernel/src/arch/ia64/cpuid.h
deleted file mode 100644
index 9d88081f..00000000
--- a/kernel/src/arch/ia64/cpuid.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/cpuid.h
- * Description:   IA-64 CPUID access
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cpuid.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__CPUID_H__
-#define __ARCH__IA64__CPUID_H__
-
-// Can not be declared static inside the inline function
-static union {
-    char	string[12];
-    u64_t	raw[3];
-} __cpuid_vendor_info;
-
-
-INLINE u64_t cpuid_get (word_t num)
-{
-    u64_t reg;
-    __asm__ ("mov %0 = cpuid[%1]" :"=r" (reg) :"r" (num));
-    return reg;
-}
-
-INLINE char * cpuid_vendor_info (void)
-{
-    __cpuid_vendor_info.raw[0] = cpuid_get (0);
-    __cpuid_vendor_info.raw[1] = cpuid_get (1);
-    __cpuid_vendor_info.string[16] = '\0';
-
-    return __cpuid_vendor_info.string;
-}
-
-INLINE u64_t cpuid_serial_number (void)
-{
-    return cpuid_get (2);
-}
-
-class cpuid_version_info_t
-{
-public:
-    union {
-	struct {
-	    word_t number	: 8;
-	    word_t revision	: 8;
-	    word_t model	: 8;
-	    word_t family	: 8;
-	    word_t archrev	: 8;
-	};
-	u64_t raw;
-    };
-};
-
-INLINE cpuid_version_info_t cpuid_version_info (void)
-{
-    cpuid_version_info_t version;
-    version.raw = cpuid_get (3);
-    return version;
-}
-
-
-
-#endif /* !__ARCH__IA64__CPUID_H__ */
diff --git a/kernel/src/arch/ia64/cr.h b/kernel/src/arch/ia64/cr.h
deleted file mode 100644
index 23d88df3..00000000
--- a/kernel/src/arch/ia64/cr.h
+++ /dev/null
@@ -1,485 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/cr.h
- * Description:   IA64 control registers
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cr.h,v 1.12 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__CR_H__
-#define __ARCH__IA64__CR_H__
-
-#include INC_ARCH(psr.h)
-
-class cr_dcr_t
-{
-public:
-    union {
-	struct {
-	    word_t pp			: 1;
-	    word_t be			: 1;
-	    word_t lc			: 1;
-	    word_t __rv1		: 5;
-	    word_t dm			: 1;
-	    word_t dp			: 1;
-	    word_t dk			: 1;
-	    word_t dr			: 1;
-	    word_t da			: 1;
-	    word_t dd			: 1;
-	    word_t __rv2		: 49;
-	};
-	u64_t raw;
-    };
-};
-
-class cr_pta_t
-{
-public:
-    enum format_e {
-	fmt_short = 0,
-	fmt_long = 1
-    };
-
-    union {
-	struct {
-	    word_t vhpt_enable		: 1;
-	    word_t __rv1		: 1;
-	    word_t vhpt_size		: 6;
-	    word_t vhpt_format		: 1;
-	    word_t __rv2		: 6;
-	    word_t vhpt_base		: 49;
-	};
-	u64_t raw;
-    };
-
-    inline bool is_vhpt_enabled (void)
-	{ return vhpt_enable; };
-
-    inline word_t size (void)
-	{ return (1UL << vhpt_size); };
-
-    inline format_e format (void)
-	{ return (format_e) vhpt_format; }
-
-    inline addr_t base (void)
-	{ return (addr_t) (vhpt_base << 49); }
-};
-
-class cr_isr_t
-{
-public:
-    union {
-	struct {
-	    word_t code			: 16;
-	    word_t vector		: 8;
-	    word_t __rv1		: 8;
-	    word_t rwx			: 3;
-	    word_t non_access		: 1;
-	    word_t speculative_load	: 1;
-	    word_t register_stack	: 1;
-	    word_t incomplete_reg_frame	: 1;
-	    word_t nested_interruption	: 1;
-	    word_t supervisor_override	: 1;
-	    word_t instruction_slot	: 2;
-	    word_t exception_deferral	: 1;
-	    word_t __rv2		: 20;
-	};
-	u64_t raw;
-    };
-};
-
-class cr_itir_t
-{
-public:
-    union {
-	struct {
-	    word_t __rv1		: 2;
-	    word_t ps			: 6;
-	    word_t key			: 24;
-	    word_t __rv2		: 32;
-	};
-	u64_t raw;
-    };
-
-    inline word_t page_size (void)
-	{ return (1UL << ps); }
-
-    inline word_t protection_key (void)
-	{ return key; }
-};
-
-class cr_ifs_t
-{
-public:
-    union {
-	struct {
-	    word_t sof			: 7;
-	    word_t sol			: 7;
-	    word_t sor			: 4;
-	    word_t rrb_gr		: 7;
-	    word_t rrb_fr		: 7;
-	    word_t rrb_pr		: 6;
-	    word_t __rv			: 25;
-	    word_t valid		: 1;
-	};
-	u64_t raw;
-    };
-
-    inline word_t locals (void)
-	{ return sol; }
-
-    inline word_t outputs (void)
-	{ return sof - sol; }
-
-    inline word_t framesize (void)
-	{ return sof; }
-};
-
-class cr_lid_t
-{
-public:
-    union {
-	struct {
-	    word_t __rv			: 16;
-	    word_t eid			: 8;
-	    word_t id			: 8;
-	    word_t __ig			: 32;
-	};
-	u64_t raw;
-    };
-};
-
-class cr_tpr_t
-{
-public:
-    union {
-	struct {
-	    word_t __ig1		: 4;
-	    word_t mic			: 4;
-	    word_t __rv			: 8;
-	    word_t mmi			: 1;
-	    word_t __ig2		: 47;
-	};
-	u64_t raw;
-    };
-
-    static cr_tpr_t all_enabled (void)
-	{
-	    cr_tpr_t tpr;
-	    tpr.raw = 0;
-	    return tpr;
-	}
-
-    static cr_tpr_t some_enabled (word_t int_class)
-	{
-	    cr_tpr_t tpr;
-	    tpr.raw = 0;
-	    tpr.mic = int_class;
-	    return tpr;
-	}
-};
-
-class cr_ivec_t
-{
-public:
-    union {
-	struct {
-	    word_t vector		: 8;
-	    word_t dm			: 3;
-	    word_t __rv1		: 1;
-	    word_t __ig1		: 1;
-	    word_t ipp			: 1;
-	    word_t __rv2		: 1;
-	    word_t tm			: 1;
-	    word_t m			: 1;
-	    word_t __ig2		: 47;
-	};
-	u64_t raw;
-    };
-
-    cr_ivec_t (void) {}
-    cr_ivec_t (word_t w) { raw = w; }
-};
-
-
-INLINE cr_dcr_t cr_get_dcr (void)
-{
-    cr_dcr_t dcr;
-    __asm__ ("mov %0 = cr.dcr" :"=r" (dcr.raw));
-    return dcr;
-}
-
-INLINE word_t cr_get_itm (void)
-{
-    word_t itm;
-    __asm__ ("mov %0 = cr.itm" :"=r" (itm));
-    return itm;
-}
-
-INLINE void cr_set_itm (word_t value)
-{
-    __asm__ ("mov cr.itm = %0" ::"r" (value));
-}
-
-INLINE addr_t cr_get_iva (void)
-{
-    addr_t iva;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.iva		\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (iva));
-    return iva;
-}
-
-INLINE cr_pta_t cr_get_pta (void)
-{
-    cr_pta_t pta;
-    __asm__ ("mov %0 = cr.pta" :"=r" (pta.raw));
-    return pta;
-}
-
-INLINE psr_t cr_get_ipsr (void)
-{
-    psr_t ipsr;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.ipsr	\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (ipsr.raw));
-    return ipsr;
-}
-
-INLINE cr_isr_t cr_get_isr (void)
-{
-    cr_isr_t isr;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.isr		\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (isr.raw));
-    return isr;
-}
-
-INLINE addr_t cr_get_iip (void)
-{
-    addr_t iip;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.iip		\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (iip));
-    return iip;
-}
-
-INLINE addr_t cr_get_ifa (void)
-{
-    addr_t ifa;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.ifa		\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (ifa));
-    return ifa;
-}
-
-INLINE cr_itir_t cr_get_itir (void)
-{
-    cr_itir_t itir;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.itir	\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (itir.raw));
-    return itir;
-}
-
-INLINE addr_t cr_get_iipa (void)
-{
-    addr_t iipa;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.iipa	\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (iipa));
-    return iipa;
-}
-
-INLINE cr_ifs_t cr_get_ifs (void)
-{
-    cr_ifs_t ifs;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.ifs		\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (ifs.raw));
-    return ifs;
-}
-
-INLINE word_t cr_get_iim (void)
-{
-    word_t iim;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.iim		\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (iim));
-    return iim;
-}
-
-INLINE addr_t cr_get_iha (void)
-{
-    addr_t iha;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.iha		\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (iha));
-    return iha;
-}
-
-INLINE cr_lid_t cr_get_lid (void)
-{
-    cr_lid_t lid;
-    __asm__ ("	rsm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     "	mov %0 = cr.lid		\n"
-	     "	ssm psr.ic ;;		\n"
-	     "	srlz.i ;; 		\n"
-	     :"=r" (lid));
-    return lid;
-}
-
-INLINE word_t cr_get_ivr (void)
-{
-    word_t ivr;
-    __asm__ ("mov %0 = cr.ivr" :"=r" (ivr));
-    return ivr;
-}
-
-INLINE cr_tpr_t cr_get_tpr (void)
-{
-    cr_tpr_t tpr;
-    __asm__ ("mov %0 = cr.tpr" :"=r" (tpr));
-    return tpr;
-}
-
-INLINE void cr_set_tpr (cr_tpr_t tpr)
-{
-    __asm__ ("mov cr.tpr = %0" ::"r" (tpr));
-}
-
-INLINE word_t cr_get_irr (word_t n)
-{
-    word_t irr;
-    switch (n)
-    {
-    case 0: __asm__ ("mov %0 = cr.irr0" :"=r" (irr)); break;
-    case 1: __asm__ ("mov %0 = cr.irr1" :"=r" (irr)); break;
-    case 2: __asm__ ("mov %0 = cr.irr2" :"=r" (irr)); break;
-    case 3: __asm__ ("mov %0 = cr.irr3" :"=r" (irr)); break;
-    default: irr = 0;
-    }
-    return irr;
-}
-
-INLINE bool is_interrupt_pending (word_t n)
-{
-    word_t irr = cr_get_irr (n / 64);
-    return (irr & (1UL << (n & 63)));
-}
-
-INLINE cr_ivec_t cr_get_itv (void)
-{
-    cr_ivec_t itv;
-    __asm__ ("mov %0 = cr.itv" :"=r" (itv));
-    return itv;
-}
-
-INLINE void cr_set_itv (cr_ivec_t itv)
-{
-    __asm__ ("mov cr.itv = %0" ::"r" (itv));
-}
-
-INLINE cr_ivec_t cr_get_pmv (void)
-{
-    cr_ivec_t pmv;
-    __asm__ ("mov %0 = cr.pmv" :"=r" (pmv));
-    return pmv;
-}
-
-INLINE void cr_set_pmv (cr_ivec_t pmv)
-{
-    __asm__ ("mov cr.pmv = %0" ::"r" (pmv));
-}
-
-INLINE cr_ivec_t cr_get_cmcv (void)
-{
-    cr_ivec_t cmcv;
-    __asm__ ("mov %0 = cr.cmcv" :"=r" (cmcv));
-    return cmcv;
-}
-
-INLINE void cr_set_cmcv (cr_ivec_t cmcv)
-{
-    __asm__ ("mov cr.cmcv = %0" ::"r" (cmcv));
-}
-
-INLINE cr_ivec_t cr_get_lrr0 (void)
-{
-    cr_ivec_t lrr;
-    __asm__ ("mov %0 = cr.lrr0" :"=r" (lrr));
-    return lrr;
-}
-
-INLINE void cr_set_lrr0 (cr_ivec_t lrr)
-{
-    __asm__ ("mov cr.lrr0 = %0" ::"r" (lrr));
-}
-
-INLINE cr_ivec_t cr_get_lrr1 (void)
-{
-    cr_ivec_t lrr;
-    __asm__ ("mov %0 = cr.lrr1" :"=r" (lrr));
-    return lrr;
-}
-
-INLINE void cr_set_lrr1 (cr_ivec_t lrr)
-{
-    __asm__ ("mov cr.lrr1 = %0" ::"r" (lrr));
-}
-
-#endif /* !__ARCH__IA64__CR_H__ */
diff --git a/kernel/src/arch/ia64/debug.h b/kernel/src/arch/ia64/debug.h
deleted file mode 100644
index 38d89b7e..00000000
--- a/kernel/src/arch/ia64/debug.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     arch/ia64/debug.h
- * Description:   IA-64 specific debug functionality
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: debug.h,v 1.11 2006/10/19 22:57:35 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__DEBUG_H__
-#define __ARCH__IA64__DEBUG_H__
-
-#include INC_ARCH(rr.h)
-#include INC_GLUE(hwspace.h)
-
-#if !defined(CONFIG_CPU_IA64_SKI)
-INLINE u16_t * __ia64_screen_addr (int pos)
-{
-    return (u16_t *) phys_to_virt_uc ((word_t) (0xb8000 + pos*2));
-}
-
-INLINE void spin (int pos, int cpu = 0)
-{
-#if defined(CONFIG_SPIN_WHEELS)
-    volatile u8_t * addr = (u8_t *) __ia64_screen_addr (pos + cpu * 80);
-    switch (addr[0])
-    {
-    default:
-    case '-':  addr[0] = '\\'; break;
-    case '\\': addr[0] = '|';  break;
-    case '|':  addr[0] = '/';  break;
-    case '/':  addr[0] = '-';  break;
-    }
-    addr[1] = 7;
-#endif /* defined(CONFIG_SPIN_WHEELS) */
-}
-
-INLINE void spin_forever (int pos = 0, int cpu = 0)
-{
-    for (;;)
-	spin (pos, cpu);
-}
-
-#else
-INLINE void spin_forever (int pos = 0)
-{
-    for (;;);
-}
-INLINE void spin (int pos, int cpu = 0)
-{
-}
-#endif
-
-#if 1
-#define enter_kdebug(x)						\
-do {								\
-    __asm__ __volatile__ (					\
-	"// Put into separate bundle		\n"		\
-	"{ .mlx					\n"		\
-	"	break.m	0x3			\n"		\
-	"	movl	r0 = 1f ;;		\n"		\
-	"}					\n"		\
-	"					\n"		\
-	"	.rodata				\n"		\
-	"1:	stringz " #x "			\n"		\
-	"	.previous			\n"		\
-	:							\
-	:							\
-	:							\
-	"memory");						\
-} while (0)
-#else
-#define enter_kdebug(x) _enter_kdebug(x)
-#endif
-
-
-#endif /* !__ARCH__IA64__DEBUG_H__ */
diff --git a/kernel/src/arch/ia64/efi.cc b/kernel/src/arch/ia64/efi.cc
deleted file mode 100644
index 5864182e..00000000
--- a/kernel/src/arch/ia64/efi.cc
+++ /dev/null
@@ -1,190 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/efi.cc
- * Description:   IA-64 specific EFI initialization
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: efi.cc,v 1.11 2003/09/24 19:05:27 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-
-#include INC_PLAT(runtime_services.h)
-#include INC_PLAT(memory_map.h)
-#include INC_PLAT(system_table.h)
-
-#include INC_ARCH(ioport.h)
-#include INC_ARCH(pal.h)
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-
-
-/*
- * Memory map given to us by the EFI loader.
- */
-
-efi_memory_map_t efi_memmap;
-
-
-/*
- * Location of the EFI system table.
- */
-
-efi_system_table_t * efi_systab;
-
-
-/*
- * Location of EFI runtime services table.
- */
-
-efi_runtime_services_t * efi_runtime_services;
-
-
-/*
- * EFI configuration tables
- */
-
-efi_config_table_ptr_t efi_config_table;
-
-
-
-void ipanic (const char * str);
-
-
-/**
- * init_efi: EFI specific initialization
- * @param memmap_addr		Virtual address of loader provided memory map
- * @param memmap_size		Size of loader provided memory map
- * @param memdesc_size		Size of a single memory map descriptor
- * @param memdesc_version	Version information for memory map descriptor
- * @param systab_addr		Physical address of EFI system table
- */
-void SECTION (".init")
-init_efi (addr_t memmap_addr,
-	  word_t memmap_size,
-	  word_t memdesc_size,
-	  u32_t memdesc_version,
-	  addr_t systab_addr)
-{
-    if (memdesc_version != EFI_MEMORY_DESC_VERSION)
-	ipanic ("Invalid EFI memory descriptor version\n");
-
-    /*
-     * Map EFI memory map.
-     */
-
-    if (! dtrmap.is_mapped (memmap_addr))
-    {
-	translation_t tr (1, translation_t::write_back, 1, 1, 0,
-			  translation_t::rwx, virt_to_phys (memmap_addr), 0);
-	dtrmap.add_map (tr, memmap_addr, HUGE_PGSIZE, 0);
-    }
-   
-    efi_memmap.init (memmap_addr, (word_t) memmap_size, (word_t) memdesc_size);
-
-    /*
-     * Get location of various memory regions (in particular the I/O
-     * port space needed for doing printfs).
-     */
-
-    efi_memory_desc_t * desc;
-    efi_memmap.reset ();
-    while ((desc = efi_memmap.next ()) != NULL)
-    {
-	switch (desc->type ())
-	{
-	case EFI_MEMORY_MAPPED_IO_PORT_SPACE:
-	    ia64_io_port_base = desc->physical_start ();
-	    asm volatile ("mov ar.k0 = %0" :: "r" (ia64_io_port_base));
-	    break;
-	case EFI_PAL_CODE:
-	    ia64_pal_code = desc->physical_start ();
-	    break;
-	default:
-	    break;
-	}
-
-	/*
-	 * Relocate virtual address to the kernel region.  Make sure
-	 * that cacheability attributes are preserved.
-	 */
-	desc->set_virtual_start (desc->attribute () & EFI_MEMORY_WB ?
-				 phys_to_virt (desc->physical_start ()) :
-				 phys_to_virt_uc (desc->physical_start ()));
-    }
-
-    /*
-     * Map I/O ports.
-     */
-
-    if (ia64_io_port_base == 0)
-	ipanic ("No I/O port base\n");
-
-    ia64_io_port_base = phys_to_virt_uc (ia64_io_port_base);
-    if (! dtrmap.is_mapped (ia64_io_port_base))
-    {
-	translation_t tr (1, translation_t::uncacheable, 1, 1,
-			  0, translation_t::rwx,
-			  virt_to_phys (ia64_io_port_base), 0);
-	dtrmap.add_map (tr, ia64_io_port_base, HUGE_PGSIZE, 0);
-    }
-
-    /*
-     * Map EFI system table.
-     */
-
-    efi_systab = (efi_system_table_t *) systab_addr;
-    if (! dtrmap.is_mapped (efi_systab))
-    {
-	translation_t tr (1, translation_t::write_back, 1, 1, 0,
-			  translation_t::rwx, virt_to_phys (systab_addr), 0);
-	dtrmap.add_map (tr, efi_systab, HUGE_PGSIZE, 0);
-    }
-
-    /*
-     * EFI Spec v1.10 says SetVirtualAddressMap translates all
-     * pointers for us, but it seems that some old versions of EFI
-     * don't.  So we take copies of the needed pointers before
-     * SetVirtualAddressMap and translate ourselves.
-     */
-
-    efi_runtime_services = phys_to_virt (efi_systab->runtime_services);
-    efi_config_table = efi_systab->config_table;
-    efi_config_table.config_table =
-	phys_to_virt (efi_config_table.config_table);
-
-    /*
-     * Notify EFI firmware about virtual locations of memory regions
-     * so that we can invoke EFI functions in virtual mode.
-     */
-
-    word_t status = call_efi_physical
-	((word_t) efi_runtime_services->set_virtual_address_map_f,
-	 memmap_size, memdesc_size, memdesc_version,
-	 virt_to_phys ((word_t) memmap_addr), 0);
-
-    if (status != efi_runtime_services_t::success)
-	ipanic ("efi_set_virtual_address_map() failed\n");
-}
diff --git a/kernel/src/arch/ia64/fp.h b/kernel/src/arch/ia64/fp.h
deleted file mode 100644
index 2ed09533..00000000
--- a/kernel/src/arch/ia64/fp.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/fp.h
- * Description:   Handling of IA-65 floating-point registers
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fp.h,v 1.1 2003/11/03 16:24:00 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__FP_H__
-#define __ARCH__IA64__FP_H__
-
-#include INC_ARCH(psr.h)
-
-
-/*
- * Implemented in arch/ia64/subr_asm.S
- */
-extern "C" void ia64_save_highfp (void * buf);
-extern "C" void ia64_restore_highfp (void * buf);
-
-
-/**
- * Container class for holding the upper (f32--f127) spilled floating
- * point registers.
- */
-class high_fp_t
-{
-    // Each spilled fp register occupies 16 bytes.
-    u64_t registers[96*2];
-
-public:
-
-    /**
-     * Save high floating-point registers to memory.
-     */
-    void save (void)
-	{ ia64_save_highfp ((void *) registers); }
-
-    /**
-     * Restore high floating-point registers from memory.
-     */
-    void restore (void)
-	{ ia64_restore_highfp ((void *) registers); }
-};    
-
-
-/**
- * Enable high floating-point registers.
- */
-INLINE void ia64_enable_fphigh (void)
-{
-    __asm__ __volatile__ ("rsm psr.dfh");
-}
-
-
-/**
- * Disable high floating-point registers.
- */
-INLINE void ia64_disable_fphigh (void)
-{
-    __asm__ __volatile__ ("ssm psr.dfh");
-}
-
-
-#endif /* !__ARCH__IA64__FP_H__ */
diff --git a/kernel/src/arch/ia64/ia64.h b/kernel/src/arch/ia64/ia64.h
deleted file mode 100644
index 6f57d8c7..00000000
--- a/kernel/src/arch/ia64/ia64.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/ia64.h
- * Description:   Some IA-64 specific CPU functions/definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ia64.h,v 1.5 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__IA64_H__
-#define __ARCH__IA64__IA64_H__
-
-#if !defined(ASSEMBLY)
-
-INLINE void ia64_srlz_d (void)
-{
-    __asm__ __volatile__ ("srlz.d;;");
-}
-
-INLINE void ia64_srlz_i (void)
-{
-    __asm__ __volatile__ ("srlz.i;;");
-}
-
-INLINE void ia64_mf (void)
-{
-    __asm__ __volatile__ ("mf;;");
-}
-
-INLINE void ia64_mf_a (void)
-{
-    __asm__ __volatile__ ("mf.a;;");
-}
-
-INLINE bool ia64_cmpxchg (word_t * ptr, word_t old_val, word_t new_val)
-{
-    word_t stored_val;
-
-    __asm__ __volatile__ (
-	"	mov	ar.ccv = %2				\n"
-	"	;;						\n"
-	"	cmpxchg8.acq %0 = [%1], %3, ar.ccv		\n"
-	:
-	"=r" (stored_val)
-	:
-	"r" (ptr), "r" (old_val), "r" (new_val));
-
-    return stored_val == old_val;
-}
-
-#endif /* !ASSEMBLY */
-
-#endif /* !__ARCH__IA64__IA64_H__ */
diff --git a/kernel/src/arch/ia64/instr.h b/kernel/src/arch/ia64/instr.h
deleted file mode 100644
index 80d6dba3..00000000
--- a/kernel/src/arch/ia64/instr.h
+++ /dev/null
@@ -1,197 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/instr.h
- * Description:   IA64 instruction encodings
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: instr.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__INSTR_H__
-#define __ARCH__IA64__INSTR_H__
-
-
-/**
- * ia64_instr_t: single IA-64 instruction
- */
-class ia64_instr_t
-{
-public:
-    union {
-	//
-	// Raw access to instruction
-	//
-	struct {
-	    word_t raw		: 41;
-
-	    inline word_t get (void)
-		{ return raw; }
-	} raw;
-
-	//
-	// (qp) break.m imm21
-	// (qp) nop.m   imm21
-	//
-	struct {
-	    word_t qp		: 6;
-	    word_t imm20a	: 20;
-	    word_t __ig		: 1;
-	    word_t x4		: 4;
-	    word_t x2		: 2;
-	    word_t x3		: 3;
-	    word_t imm		: 1;
-	    word_t opcode	: 4;
-
-	    inline bool is_break (void)
-		{ return opcode == 0 && x3 == 0 && x4 == 0 && x2 == 0; }
-
-	    inline bool is_nop (void)
-		{ return opcode == 0 && x3 == 0 && x4 == 1 && x2 == 1; }
-
-	    inline word_t immediate (void)
-		{ return (imm << 20) + imm20a; }
-	} m_nop;
-
-	//
-	// (qp) movl r1 = imm64
-	//
-	struct {
-	    word_t qp		: 6;
-	    word_t r1		: 7;
-	    word_t imm7b	: 7;
-	    word_t vc		: 1;
-	    word_t ic		: 1;
-	    word_t imm5c	: 5;
-	    word_t imm9d	: 9;
-	    word_t imm		: 1;
-	    word_t opcode	: 4;
-
-	    inline bool is_movl (void)
-		{ return opcode == 6 && vc == 0; }
-
-	    inline word_t immediate (ia64_instr_t lslot)
-		{
-		    return (imm << 63) + (lslot.raw.get () << 22) +
-			(ic << 21) + (imm5c << 16) + (imm9d << 7) + imm7b;
-		}
-
-	    inline word_t reg (void)
-		{ return r1; }
-	} x_movl;
-    };
-
-} __attribute__ ((packed));
-
-
-
-/**
- * ia64_bundle_t: bundle of three IA64 instructions, including template
- */
-class ia64_bundle_t
-{
-public:
-    enum template_e {
-	mii 	= 0x00,
-	mii_s3	= 0x01,
-	mii_s2	= 0x02,
-	mii_s23	= 0x03,
-	mlx	= 0x04,
-	mlx_s3	= 0x05,
-	mmi	= 0x08,
-	mmi_s3	= 0x09,
-	mmi_s1	= 0x0a,
-	mii_s13	= 0x0b,
-	mfi	= 0x0c,
-	mfi_s3	= 0x0d,
-	mmf	= 0x0e,
-	mmf_s3	= 0x0f,
-	mib	= 0x10,
-	mib_s3	= 0x11,
-	mbb	= 0x12,
-	mbb_s3	= 0x13,
-	bbb	= 0x16,
-	bbb_s3	= 0x17,
-	mmb	= 0x18,
-	mmb_s3	= 0x19,
-	mfb	= 0x1c,
-	mbf_s3	= 0x1d
-    };
-
-    union {
-	u8_t	raw8[16];
-	u64_t	raw64[2];
-	unsigned int __attribute__ ((__mode__(__TI__))) raw128;
-    };
-
-    inline template_e get_template (void)
-	{ return (template_e) (raw8[0] & 0x01f); }
-
-    inline ia64_instr_t slot (word_t num)
-	{
-	    ia64_instr_t ret;
-#if 0
-	    u64_t t0, t1;
-	    t0 = (word_t) raw8[0] + (((word_t) raw8[1]) << 8) +
-		(((word_t) raw8[2]) << 16) + (((word_t) raw8[3]) << 24) +
-		(((word_t) raw8[4]) << 32) + (((word_t) raw8[5]) << 40) +
-		(((word_t) raw8[6]) << 48) + (((word_t) raw8[7]) << 56);
-	    t1 = (word_t) raw8[8] + (((word_t) raw8[9]) << 8) +
-		(((word_t) raw8[10]) << 16) + (((word_t) raw8[11]) << 24) +
-		(((word_t) raw8[12]) << 32) + (((word_t) raw8[13]) << 40) +
-		(((word_t) raw8[14]) << 48) + (((word_t) raw8[15]) << 56);
-	    switch (num) {
-	    case 0:
-		ret.raw.raw = ((t0 >> 5) & 0x1ffffffffffUL);
-		break;
-	    case 1:
-		ret.raw.raw = (((t0 >> 46) & 0x3ffff) +
-			       ((t1 & 0x7fffffUL) << 18));
-		break;
-	    case 2:
-		ret.raw.raw = ((t1 >> 23) & 0x1ffffffffffUL);
-		break;
-	    };
-#else
-	    switch (num) {
-	    case 0:
-		ret.raw.raw = ((raw64[0] >> 5) & 0x1ffffffffffUL);
-		break;
-	    case 1:
-		ret.raw.raw = ((raw128 >> 46)  & 0x1ffffffffffUL);
-		break;
-	    case 2:
-		ret.raw.raw = ((raw128 >> 87)  & 0x1ffffffffffUL);
-		break;
-	    };
-#endif
-	    return ret;
-	}
-
-} __attribute__ ((aligned (16)));
-
-
-
-
-#endif /* !__ARCH__IA64__INSTR_H__ */
diff --git a/kernel/src/arch/ia64/ioport.h b/kernel/src/arch/ia64/ioport.h
deleted file mode 100644
index 40d14b9e..00000000
--- a/kernel/src/arch/ia64/ioport.h
+++ /dev/null
@@ -1,111 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/ioport.h
- * Description:   I/O port access functions.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ioport.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__IOPORT_H__
-#define __ARCH__IA64__IOPORT_H__
-
-
-extern addr_t ia64_io_port_base;
-
-
-INLINE addr_t
-__ia64_port_address (const u16_t port)
-{
-    return (addr_t) ((word_t) ia64_io_port_base
-		     | ((port >> 2) << 12)
-		     | (port & ((1 << 12) - 1)));
-}
-
-
-INLINE void
-out_u8 (const u16_t port, const u8_t value)
-{
-    __asm__ __volatile__ (
-	"/* out_u8() */			\n"
-	"	st1.rel	[%0] = %1	\n"
-	"	mf.a			\n"
-	"	mf			\n"
-	:
-	:
-	"r" (__ia64_port_address (port)), "r" (value));
-}
-
-INLINE u8_t
-in_u8 (const u16_t port)
-{
-    u8_t result;
-
-    __asm__ __volatile__ (
-	"/* in_u8() */			\n"
-	"	ld1.acq	%0 = [%1]	\n"
-	"	mf.a			\n"
-	"	mf			\n"
-	:
-	"=r" (result)
-	:
-	"r" (__ia64_port_address (port)));
-
-    return result;
-}
-
-INLINE void
-out_u16 (const u16_t port, const u16_t value)
-{
-    __asm__ __volatile__ (
-	"/* out_u16() */		\n"
-	"	st2.rel	[%0] = %1	\n"
-	"	mf.a			\n"
-	"	mf			\n"
-	:
-	:
-	"r" (__ia64_port_address (port)), "r" (value));
-}
-
-INLINE u16_t
-in_u16 (const u16_t port)
-{
-    u8_t result;
-
-    __asm__ __volatile__ (
-	"/* in_u16() */			\n"
-	"	ld2.acq	%0 = [%1]	\n"
-	"	mf.a			\n"
-	"	mf			\n"
-	:
-	"=r" (result)
-	:
-	"r" (__ia64_port_address (port)));
-
-    return result;
-}
-
-
-#endif /* !__ARCH__IA64__IOPORT_H__ */
diff --git a/kernel/src/arch/ia64/iosapic.h b/kernel/src/arch/ia64/iosapic.h
deleted file mode 100644
index 45cb36a1..00000000
--- a/kernel/src/arch/ia64/iosapic.h
+++ /dev/null
@@ -1,225 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  Karlsruhe University
- *                
- * File path:     arch/ia64/iosapic.h
- * Description:   Access to the ia64 I/O SAPIC
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: iosapic.h,v 1.5 2004/04/22 17:40:44 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__IOSAPIC_H__
-#define __ARCH__IA64__IOSAPIC_H__
-
-#include INC_ARCH(ia64.h)
-
-typedef union {
-    struct {
-	u32_t version	: 8;
-	u32_t		: 8;
-	u32_t max_redir	: 8;
-	u32_t reserved0	: 8;
-    } __attribute__ ((packed));
-    u32_t raw;
-} iosapic_version_t;
-    
-class iosapic_redir_t
-{
-public:
-    enum trigger_mode_e {
-	edge		= 0,
-	level		= 1
-    };
-
-    enum pin_polarity_e {
-	high_active	= 0,
-	low_active	= 1
-    };
-
-    enum delivery_status_e {
-	idle		= 0,
-	pending		= 1
-    };
-
-    enum delivery_mode_e {
-	INT		= 0,
-	INT_redir	= 1,
-	PMI		= 2,
-	NMI		= 4,
-	INIT		= 5,
-	ExtINT		= 7
-    };
-
-
-    union {
-	struct {
-	    u64_t vector		:  8;	//  0
-	    u64_t delivery_mode		:  3;	//  8
-	    u64_t 			:  1;	// 11
-	    u64_t delivery_status	:  1;	// 12
-	    u64_t pin_polarity		:  1;	// 13
-	    u64_t remote_irr		:  1;	// 14
-	    u64_t trigger_mode		:  1;	// 15
-	    u64_t mask			:  1;	// 16
-	    u64_t			: 31;	// 17
-	    union {
-		struct {
-		    u8_t dest_eid	:  8;	// 48
-		    u8_t dest_id	:  8;	// 56
-		};
-		u16_t dest_id_eid	: 16;
-	    };
-	};
-
-	u64_t raw64;
-	u32_t raw32[2];
-    };
-
-    void set (word_t vec, pin_polarity_e pol, trigger_mode_e trig,
-	      bool masked, word_t id_eid)
-	{
-	    vector = vec;
-	    delivery_mode = INT;
-	    pin_polarity = pol;
-	    trigger_mode = trig;
-	    mask = masked ? 1 : 0;
-	    dest_id_eid = id_eid;
-	}
-
-    void set_cpu (word_t id_eid)
-	{ dest_id_eid = id_eid; }
-
-    void mask_irq (void)
-	{ mask = 1; }
-
-    void unmask_irq (void)
-	{ mask = 0; }
-
-    bool is_edge_triggered (void) 
-	{ return trigger_mode == edge; }
-
-} __attribute__ ((packed));
-
-
-class iosapic_t
-{
-    enum reg_off_e {
-	io_select		= 0x00,
-	io_window		= 0x10,
-	irq_assert		= 0x20,
-	io_eoi			= 0x40,
-    };
-
-    enum reg_idx_e {
-	reg_id			= 0x00,
-	reg_version		= 0x01,
-	reg_regdir_base		= 0x10,
-    };
-
-    u32_t get (int reg)
-	{
-	    *(volatile u32_t *) this = reg;
-	    ia64_mf ();
-	    return *(volatile u32_t *) ((u64_t) this + io_window);
-	}
-
-    void set (int reg, u32_t val)
-	{
-	    *(volatile u32_t *) this = reg;
-	    ia64_mf ();
-	    *(volatile u32_t *) ((u64_t) this + io_window) = val;
-	    ia64_mf ();
-	}
-
-public:
-
-    /**
-     * Get redirection table entry for I/O SAPIC.
-     * @param which		index for redirection table
-     * @return redirection entry
-     */
-    iosapic_redir_t get_redir (int which)
-	{
-	    iosapic_redir_t ret;
-	    ret.raw32[0] = get (reg_regdir_base + 2 * which);
-	    ret.raw32[1] = get (reg_regdir_base + 2 * which + 1);
-	    return ret;
-	}
-
-    /**
-     * Set redirection table entry for I/O SAPIC.
-     * @param which		index for redirection table
-     * @param redir		new redirection entry
-     * @param low_only		only set lower part of entry
-     */
-    void set_redir (int which, iosapic_redir_t redir, bool low_only = false)
-	{
-	    set (reg_regdir_base + 2 * which, redir.raw32[0]);
-	    if (! low_only)
-		set (reg_regdir_base + 2 * which + 1, redir.raw32[1]);
-	}
-
-    /**
-     * Signal end-of-interrupt (EOI) to I/O SAPIC.
-     * @param vector		vector to signal EOI on
-     */
-    void eoi (int vector)
-	{
-	    *(volatile u32_t *) ((u64_t) this + io_eoi) = vector;
-	    ia64_mf ();
-	}
-
-    /**
-     * Generate interrupt on I/O SAPIC.
-     * @param vector		interrupt vector to assert
-     */
-    void assert (int vector)
-	{
-	    *(volatile u32_t *) ((u64_t) this + irq_assert) = vector;
-	    ia64_mf ();
-	}
-
-    /**
-     * Get version information for I/O SAPIC.
-     * @return version info for I/O SAPIC
-     */
-    iosapic_version_t get_version (void)
-	{
-	    iosapic_version_t ver;
-	    ver.raw = get (reg_version);
-	    return ver;
-	}
-
-    /**
-     * Get identifier for I/O SAPIC.
-     * @return identifier for I/O SAPIC
-     */
-    u16_t get_id (void)
-	{
-	    return get (reg_id);
-	}
-};
-
-
-#endif /* !__ARCH__IA64__IOSAPIC_H__ */
diff --git a/kernel/src/arch/ia64/itanium/Makeconf b/kernel/src/arch/ia64/itanium/Makeconf
deleted file mode 100644
index ba42b583..00000000
--- a/kernel/src/arch/ia64/itanium/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES+=	src/arch/ia64/itanium/startup.S
diff --git a/kernel/src/arch/ia64/itanium/startup.S b/kernel/src/arch/ia64/itanium/startup.S
deleted file mode 100644
index 1eeba2ab..00000000
--- a/kernel/src/arch/ia64/itanium/startup.S
+++ /dev/null
@@ -1,168 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/itanium/startup.S
- * Description:   Itanium startup code
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: startup.S,v 1.16 2003/09/26 19:47:33 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(asm.h)
-#include INC_ARCH(psr.h)
-
-	.section .init.data
-
-	.globl	_initial_register_stack
-	.globl	_initial_stack
-
-	.align	8192
-_initial_register_stack:
-	.space	8192-16
-_initial_stack:
-	.space	16
-	.text
-
-BEG_PROC (_start)
-
-bootinfo = r8
-
-	movl	r9 = ia64_vector_table
-	;;
-	mov	cr.iva = r9
-	movl	gp = __gp
-	movl	r9 = _initial_register_stack
-	movl	sp = _initial_stack
-	movl	r10 = CONFIG_IA64_PHYSMEM_OFFSET
-	mov	ar.rsc = 0
-	;;
-	dep	r9 = 0, r9, 61, 3	// translate to phys addr
-	dep	sp = 0, sp, 61, 3
-	dep	gp = 0, gp, 61, 3
-	;;
-	sub	r9 = r9, r10
-	sub	sp = sp, r10
-	sub	gp = gp, r10
-	;;
-	mov	ar.bspstore = r9
-	;;
-	loadrs				// invalidate regs
-	;;
-	mov	ar.rsc = 3		// turn rse back on
-	mov	ar.fpsr = 0x3f		// disable fp traps
-	;;
-	alloc	r9 = ar.pfs,0,1,1,0
-	mov	loc0 = bootinfo
-	ssm	psr.ic
-	bsw.1
-	;;
-	srlz.i
-
-	movl	out0 = initial_stack_lock ;;
-	dep	out0 = 0, out0, 61, 3 ;;
-	sub	out0 = out0, r10
-	br.call.sptk.many rp = ia64_acquire_spinlock
-1:	// Force new bundle
-
-	movl	r8 = startup_system
-	movl	r9 = CONFIG_IA64_PHYSMEM_OFFSET
-	mov	out0 = loc0
-	;;
-	dep	r8 = 0, r8, 61, 3	// translate to phys addr
-	;;
-	sub	r8 = r8, r9
-	;;
-	mov	b1 = r8
-
-	br.call.sptk.many rp = b1
-	/* NOTREACHED */
-
-END_PROC (_start)
-
-
-#if defined(CONFIG_SMP)
-
-	.section .init.data
-	.globl	_ap_cpuid
-_ap_cpuid:
-	.long	0
-	.text
-
-BEG_PROC (_start_ap)
-
-	movl	r9 = ia64_vector_table
-	;;
-	mov	cr.iva = r9
-	movl	gp = __gp
-	movl	r9 = _initial_register_stack
-	movl	sp = _initial_stack
-	movl	r10 = CONFIG_IA64_PHYSMEM_OFFSET
-	mov	ar.rsc = 0
-	;;
-	dep	r9 = 0, r9, 61, 3	// translate to phys addr
-	dep	sp = 0, sp, 61, 3
-	dep	gp = 0, gp, 61, 3
-	;;
-	sub	r9 = r9, r10
-	sub	sp = sp, r10
-	sub	gp = gp, r10
-	;;
-	mov	ar.bspstore = r9
-	;;
-	loadrs				// invalidate regs
-	;;
-	mov	ar.rsc = 3		// turn rse back on
-	mov	ar.fpsr = 0x3f		// disable fp traps
-	;;
-	alloc	r9 = ar.pfs,0,0,1,0
-	ssm	psr.ic
-	bsw.1
-	;;
-	srlz.i
-
-	movl	out0 = initial_stack_lock ;;
-	dep	out0 = 0, out0, 61, 3 ;;
-	sub	out0 = out0, r10
-	br.call.sptk.many rp = ia64_acquire_spinlock
-1:	// Force new bundle
-
-	movl	r10 = CONFIG_IA64_PHYSMEM_OFFSET
-	movl	r8 = startup_ap
-	movl	r9 = _ap_cpuid
-	 ;;
-	dep	r8 = 0, r8, 61, 3
-	dep	r9 = 0, r9, 61, 3
-	 ;;
-	sub	r8 = r8, r10
-	sub	r9 = r9, r10
-	;;
-	ld8	out0 = [r9]
-	mov	b1 = r8
-
-	br.call.sptk.many rp = b1
-	/* NOTREACHED */
-
-END_PROC (_start_ap)
-
-#endif /* CONFIG_SMP */
diff --git a/kernel/src/arch/ia64/itanium2/Makeconf b/kernel/src/arch/ia64/itanium2/Makeconf
deleted file mode 100644
index 19c8aa84..00000000
--- a/kernel/src/arch/ia64/itanium2/Makeconf
+++ /dev/null
@@ -1,32 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2003,  Karlsruhe University
-##                
-## File path:     arch/ia64/itanium2/Makeconf
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf,v 1.2 2003/09/24 19:05:28 skoglund Exp $
-##                
-######################################################################
-
-SOURCES+=	src/arch/ia64/itanium/startup.S
diff --git a/kernel/src/arch/ia64/itanium_perf.h b/kernel/src/arch/ia64/itanium_perf.h
deleted file mode 100644
index 4eccaa36..00000000
--- a/kernel/src/arch/ia64/itanium_perf.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/itanium_perf.h
- * Description:   Performance monitor functionality for Itanium
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: itanium_perf.h,v 1.7 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__ITANIUM__PERF_H__
-#define __ARCH__IA64__ITANIUM__PERF_H__
-
-#include INC_ARCH(perf.h)
-
-
-/**
- * Generic performance monitor configuration register for the Itanium.
- */
-class pmc_itanium_t
-{
-    union {
-	struct {
-	    word_t plm		: 4;
-	    word_t ev		: 1;
-	    word_t oi		: 1;
-	    word_t pm		: 1;
-	    word_t __ig1	: 1;
-	    word_t es		: 8;	// Only 7 bits on Itanium 1
-	    word_t umask	: 4;
-	    word_t threshold	: 3;
-	    word_t enabled	: 1;	// Ignored for Itanium 1
-	    word_t ism		: 2;
-	    word_t zeros	: 2;	// Ignored for Itanium 1
-	    word_t __ig3	: 36;
-	};
-	word_t raw;
-    };
-
-public:
-
-    enum ism_e {
-	mon_all		= 0,
-	mon_ia32	= 1,
-	mon_ia64	= 2,
-	mon_disabled	= 3,
-    };
-
-    // Construction
-
-    pmc_itanium_t (void) {}
-    pmc_itanium_t (word_t w) { raw = w; }
-
-    // Conversion
-    
-    operator word_t (void) { return raw; }
-    operator pmc_t (void) { pmc_t pmc = raw; return pmc; }
-};
-
-
-/**
- * Wrapper class for accessing the Itanium instruction address range
- * check register.
- */
-class pmc_instr_range_t
-{
-public:
-    bool is_all_tagged (void)
-	{ return get_pmc (13) & 1; }
-
-    void tag_all (void)
-	{ set_pmc (13, 1); }
-
-    void tag_range (void)
-	{ set_pmc (13, 0); }
-};
-
-
-
-
-#endif /* !__ARCH__IA64__ITANIUM__PERF_H__ */
diff --git a/kernel/src/arch/ia64/itanium_perf_branchtrace.h b/kernel/src/arch/ia64/itanium_perf_branchtrace.h
deleted file mode 100644
index d8786295..00000000
--- a/kernel/src/arch/ia64/itanium_perf_branchtrace.h
+++ /dev/null
@@ -1,225 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/itanium/perf_branchtrace.h
- * Description:   Itanium Branch Trace Buffer support
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: itanium_perf_branchtrace.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__ITANIUM__PERF_BRANCHTRACE_H__
-#define __ARCH__IA64__ITANIUM__PERF_BRANCHTRACE_H__
-
-#include INC_ARCH(perf.h)
-
-
-/**
- * Wrapper class for accessing the Itanium branch trace buffer
- * configuration register.
- */
-class pmc_branch_trace_config_t
-{
-
-    union {
-	struct {
-	    word_t plm		: 4;
-	    word_t __ig1	: 2;
-	    word_t pm		: 1;
-	    word_t tar		: 1;
-	    word_t tm		: 2;
-	    word_t ptm		: 2;
-	    word_t ppm		: 2;
-	    word_t bpt		: 1;
-	    word_t bac		: 1;
-	    word_t __ig2	: 48;
-	};
-	word_t raw;
-    };
-
-public:
-
-    enum taken_e {
-	none		= 0,
-	not_taken	= 1,
-	taken		= 2,
-	all		= 3,
-    };
-
-    enum predicted_target_e {
-	no_targets		= 0,
-	mispredicted_targets 	= 1,
-	predicted_targets	= 2,
-	all_targets		= 3,
-    };
-
-    enum predicted_pred_e {
-	no_preds		= 0,
-	mispredicted_preds 	= 1,
-	predicted_preds		= 2,
-	all_preds		= 3,
-    };
-
-    pmc_branch_trace_config_t (void)
-	{ raw = get_pmc (12); }
-
-    pmc_branch_trace_config_t (pmc_t::priv_e priv,
-			       bool priv_mon,
-			       bool target_addr,
-			       taken_e taken_mask,
-			       predicted_target_e predicted_target_mask,
-			       predicted_pred_e predicted_pred_mask,
-			       bool tac_predictions,
-			       bool bac_predictions)
-	{
-	    plm		= (word_t) priv;
-	    pm		= priv_mon;
-	    tar		= target_addr;
-	    tm		= (word_t) taken_mask;
-	    ptm		= (word_t) predicted_target_mask;
-	    ppm		= (word_t) predicted_pred_mask;
-	    bpt		= tac_predictions;
-	    bac		= bac_predictions;
-	}
-
-    void disable (void)
-	{ plm = 0; set_pmc (12, raw); }
-    
-    void activate (void)
-	{ set_pmc (12, raw); }
-};
-
-
-/**
- * Wrapper class for accessing the Itanium branch trace buffer
- * registers.
- */
-class pmd_branch_trace_t
-{
-    union {
-	struct {
-	    word_t b		: 1;
-	    word_t mp		: 1;
-	    word_t tr_slot	: 2;
-	    word_t tr_address	: 60;
-	};
-	word_t raw;
-    };
-
-public:
-
-    /**
-     * Initialize a branch trace value with the indicated register
-     * number.
-     * @param n PMD register number
-     */
-    pmd_branch_trace_t (word_t n)
-	{ raw = get_pmd (n); }
-
-    /**
-     * @return true if branch trace is invalid, false otherwiswe
-     */
-    bool is_invalid (void)
-	{ return b == 0 && mp == 0; }
-
-    /**
-     * @return true if branch trace is a mispredicted branch, false
-     * otherwise
-     */
-    bool is_mispredicted (void)
-	{ return b == 1 && mp == 1; }
-
-    /**
-     * @return true if branch trace is a correctly predicted branch,
-     * false otherwise
-     */
-    bool is_predicted (void)
-	{ return b == 1 && mp == 0; }
-
-    /**
-     * @return true if branch trace is a branch target, false otherwise
-     */
-    bool is_target (void)
-	{ return b == 0 && mp == 1; }
-
-    /**
-     * @return address of branch instruction (or branch target)
-     */
-    addr_t address (void)
-	{ return (addr_t) (tr_address << 4); }
-
-    /**
-     * @return slot number of branch instruction, or 0 if branch trace
-     * is a target
-     */
-    word_t slot (void)
-	{ return tr_slot; }
-
-    /**
-     * @return canonical address of branch instruction or branch
-     * target (i.e., instruction address as seen in objdump)
-     */
-    addr_t canonical_address (void)
-	{ return (addr_t) ((tr_address << 4) + (tr_slot * 6)); }
-};
-
-
-/**
- * Wrapper class for accessing the Itanium branch trace buffer index
- * register.
- */
-class pmd_branch_trace_index_t
-{
-    union {
-	struct {
-	    word_t bbi		: 3;
-	    word_t full		: 1;
-	    word_t __ig		: 60;
-	};
-	word_t raw;
-    };
-
-public:
-
-    pmd_branch_trace_index_t (void)
-	{ raw = get_pmd (16); }
-
-    void clear (void)
-	{ raw = 0; set_pmd (16, 0); }
-
-    word_t num_entries (void)
-	{ return full ? 8 : bbi; }
-
-    word_t oldest_idx (void)
-	{ return full ? 8 + bbi: 8; }
-
-    word_t newest_idx (void)
-	{ return 8 + (((8 * full) + (bbi - 1)) & 7); }
-
-    word_t next_idx (word_t n)
-	{ return 8 + ((n + 1) & 7); }
-};
-
-
-#endif /* !__ARCH__IA64__ITANIUM__PERF_BRANCHTRACE_H__ */
diff --git a/kernel/src/arch/ia64/itc_timer.cc b/kernel/src/arch/ia64/itc_timer.cc
deleted file mode 100644
index cbe95804..00000000
--- a/kernel/src/arch/ia64/itc_timer.cc
+++ /dev/null
@@ -1,49 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/itc_timer.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: itc_timer.cc,v 1.2 2003/09/24 19:05:27 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(itc_timer.h)
-#include INC_ARCH(cr.h)
-#include INC_ARCH(ar.h)
-
-void itc_ptimer_t::setup (word_t rate)
-{
-    _rate = rate;
-    cr_set_itm (rate);
-    ar_set_itc (0);
-}
-
-void itc_ptimer_t::init_cpulocal (word_t vector)
-{
-    cr_ivec_t itv;
-    itv.raw = 0;
-    itv.vector = vector;
-    cr_set_itv (itv);
-}
diff --git a/kernel/src/arch/ia64/itc_timer.h b/kernel/src/arch/ia64/itc_timer.h
deleted file mode 100644
index 4908528b..00000000
--- a/kernel/src/arch/ia64/itc_timer.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/itc_timer.h
- * Description:   ITC based timer
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: itc_timer.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__ITC_TIMER_H__
-#define __GLUE__V4_IA64__ITC_TIMER_H__
-
-#include <timer.h>
-
-class itc_ptimer_t : public generic_periodic_timer_t
-{
-    word_t _rate;
-
-public:
-    void setup (word_t rate);
-    void init_cpulocal (word_t vector);
-    void init_global (word_t vector);
-    word_t get_rate (void) { return _rate; }
-};
-
-INLINE itc_ptimer_t * get_itc_ptimer (void)
-{
-    extern itc_ptimer_t itc_ptimer;
-    return &itc_ptimer;
-}
-
-
-#endif /* !__GLUE__V4_IA64__ITC_TIMER_H__ */
diff --git a/kernel/src/arch/ia64/mc.h b/kernel/src/arch/ia64/mc.h
deleted file mode 100644
index 074526c4..00000000
--- a/kernel/src/arch/ia64/mc.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/mc.h
- * Description:   ia64 Machine Check support
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mc.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__MC_H__
-#define __ARCH__IA64__MC_H__
-
-
-class processor_state_t
-{
-public:
-    enum op_e {
-	unkown		= 0,
-	load		= 1,
-	store		= 2,
-	instr_fetch	= 3,
-	data_prefetch	= 4,
-	other_mem	= 5,
-    };
-
-    union {
-	struct {
-	    word_t __reserved1		: 2;
-	    word_t rz			: 1;
-	    word_t ra			: 1;
-	    word_t me			: 1;
-	    word_t mn			: 1;
-	    word_t sy			: 1;
-	    word_t co			: 1;
-
-	    word_t ci			: 1;
-	    word_t us			: 1;
-	    word_t hd			: 1;
-	    word_t tl			: 1;
-	    word_t mi			: 1;
-	    word_t pi	     		: 1;
-	    word_t pm			: 1;
-	    word_t dy			: 1;
-
-	    word_t in			: 1;
-	    word_t rs			: 1;
-	    word_t cm			: 1;
-	    word_t ex			: 1;
-	    word_t cr			: 1;
-	    word_t pc			: 1;
-	    word_t dr			: 1;
-	    word_t tr			: 1;
-
-	    word_t rr			: 1;
-	    word_t ar			: 1;
-	    word_t br			: 1;
-	    word_t pr			: 1;
-	    word_t fp			: 1;
-	    word_t b1			: 1;
-	    word_t b0			: 1;
-	    word_t gr			: 1;
-
-	    word_t dsize		: 16;
-	    word_t __reserved2		: 12;
-	    word_t cc			: 1;
-	    word_t tc			: 1;
-	    word_t bc			: 1;
-	    word_t uc			: 1;
-	};
-	word_t raw;
-    };
-};
-
-
-#endif /* !__ARCH__IA64__MC_H__ */
diff --git a/kernel/src/arch/ia64/memory.cc b/kernel/src/arch/ia64/memory.cc
deleted file mode 100644
index e8a6c986..00000000
--- a/kernel/src/arch/ia64/memory.cc
+++ /dev/null
@@ -1,48 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/memory.cc
- * Description:   IA-64 memory/cache/TLB management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: memory.cc,v 1.4 2003/09/24 19:05:27 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-
-
-/*
- * Structures keeping track of existing TR mappings.
- */
-
-itr_map_t itrmap;
-dtr_map_t dtrmap;
-
-
-/**
- * ia64_io_port_base: location of I/O port space
- */
-addr_t ia64_io_port_base;
diff --git a/kernel/src/arch/ia64/pal.cc b/kernel/src/arch/ia64/pal.cc
deleted file mode 100644
index ecd6c145..00000000
--- a/kernel/src/arch/ia64/pal.cc
+++ /dev/null
@@ -1,71 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/pal.cc
- * Description:   IA-64 PAL management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pal.cc,v 1.6 2003/09/24 19:05:27 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-#include INC_ARCH(pal.h)
-
-
-/**
- * ia64_pal_code: physical location of IA-64 PAL functions
- */
-addr_t ia64_pal_code;
-
-
-/**
- * ia64_pal_entry: physical location of IA-64 PAL entry point
- */
-addr_t ia64_pal_entry;
-
-
-void SECTION (".init")
-init_pal (void)
-{
-    addr_t pal_code = phys_to_virt (ia64_pal_code);
-
-    /*
-     * Ensure that both PAL data and instruction is mapped.
-     */
-    
-    if ((! dtrmap.is_mapped (pal_code)) || (! itrmap.is_mapped (pal_code)))
-    {
-	translation_t tr (1, translation_t::write_back, 1, 1, 0,
-			  translation_t::rwx,
-			  ia64_pal_code, 0);
-    
-	if (! dtrmap.is_mapped (pal_code))
-	    dtrmap.add_map (tr, pal_code, HUGE_PGSIZE, 0);
-
-	if (! itrmap.is_mapped (pal_code))
-	    itrmap.add_map (tr, pal_code, HUGE_PGSIZE, 0);
-    }
-}
diff --git a/kernel/src/arch/ia64/pal.h b/kernel/src/arch/ia64/pal.h
deleted file mode 100644
index cca1fc98..00000000
--- a/kernel/src/arch/ia64/pal.h
+++ /dev/null
@@ -1,596 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/pal.h
- * Description:   PAL call wrapper functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pal.h,v 1.13 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__PAL_H__
-#define __ARCH__IA64__PAL_H__
-
-#include INC_ARCH(rr.h)
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(mc.h)
-
-extern addr_t ia64_pal_code;
-extern addr_t ia64_pal_entry;
-
-
-/**
- * Index values to identify PAL procedures
- */
-enum pal_idx_e {
-    PAL_CACHE_INFO	= 2,
-    PAL_CACHE_SUMMARY	= 4,
-    PAL_DEBUG_INFO	= 11,
-    PAL_FREQ_BASE	= 13,
-    PAL_FREQ_RATIOS	= 14,
-    PAL_HALT		= 28,
-    PAL_HALT_LIGHT	= 29,
-    PAL_HALT_INFO	= 257,
-    PAL_MC_CLEAR_LOG	= 21,
-    PAL_MC_ERROR_INFO	= 25,
-    PAL_MC_REGISTER_MEM	= 27,
-    PAL_PERF_MON_INFO	= 15,
-    PAL_PTCE_INFO	= 6,
-    PAL_SHUTDOWN	= 40,
-    PAL_VM_INFO		= 7,
-    PAL_VM_PAGE_SIZE	= 34,
-    PAL_VM_SUMMARY	= 8,
-    PAL_VM_TR_READ	= 261,
-};
-
-
-/**
- * pal_status_e: return status of PAL calls
- */
-enum pal_status_e {
-    PAL_OK		=  0,
-    PAL_UNIMPLEMENTED	= -1,
-    PAL_INVALID_ARG	= -2,
-    PAL_ERROR		= -3
-};
-
-
-/**
- * pal_return_t: four word structure containing return values of PAL calls
- */
-class pal_return_t
-{
-public:
-    union {
-	pal_status_e status;
-	word_t raw[4];
-    };
-};
-
-
-extern "C" pal_return_t
-call_pal_static (pal_idx_e idx, word_t a1, word_t a2, word_t a3);
-
-extern "C" pal_return_t
-call_pal_stacked (pal_idx_e idx, word_t a1, word_t a2, word_t a3);
-
-extern "C" pal_return_t
-call_pal_static_phys (pal_idx_e idx, word_t a1, word_t a2, word_t a3);
-
-extern "C" pal_return_t
-call_pal_stacked_phys (pal_idx_e idx, word_t a1, word_t a2, word_t a3);
-
-
-
-/*
- * PAL_CACHE_INFO
- */
-
-class pal_cache_info_t
-{
-public:
-    enum type_e {
-	none	= 0,
-	code	= 1,
-	data	= 2
-    };
-
-    union {
-	struct {
-	    word_t unified		: 1;
-	    word_t attributes		: 2;
-	    word_t __rsv1 		: 5;
-	    word_t associativity	: 8;
-	    word_t line_size		: 8;
-	    word_t stride		: 8;
-	    word_t store_latency	: 8;
-	    word_t load_latency		: 8;
-	    word_t store_hints		: 8;
-	    word_t load_hints		: 8;
-
-	    word_t cache_size		: 32;
-	    word_t alias_boundary	: 8;
-	    word_t tag_ls_bit		: 8;
-	    word_t tag_ms_bit		: 8;
-	    word_t __rsv2 		: 8;
-	};
-	word_t raw[2];
-    };
-};
-
-INLINE pal_status_e pal_cache_info (word_t level,
-				    pal_cache_info_t::type_e type,
-				    pal_cache_info_t * info)
-{
-    pal_return_t ret = call_pal_static (PAL_CACHE_INFO,
-					level, (word_t) type, 0);
-    info->raw[0] = ret.raw[1];
-    info->raw[1] = ret.raw[2];
-    return ret.status;
-}
-
-
-/*
- * PAL_CACHE_SUMMARY
- */
-
-class pal_cache_summary_t
-{
-public:
-    union {
-	struct {
-	    u64_t cache_levels;
-	    u64_t unique_caches;
-	};
-	word_t raw[2];
-    };
-};
-
-INLINE pal_status_e pal_cache_summary (pal_cache_summary_t * summary)
-{
-    pal_return_t ret = call_pal_static (PAL_CACHE_SUMMARY, 0, 0, 0);
-    summary->raw[0] = ret.raw[1];
-    summary->raw[1] = ret.raw[2];
-    return ret.status;
-}
-
-
-/*
- * PAL_DEBUG_INFO
- */
-
-INLINE pal_status_e pal_debug_info (word_t * iregs, word_t * dregs)
-{
-    pal_return_t ret = call_pal_static (PAL_DEBUG_INFO, 0, 0, 0);
-    *iregs = ret.raw[1];
-    *dregs = ret.raw[2];
-    return ret.status;
-}
-
-
-/*
- * PAL_FREQ_BASE
- */
-
-INLINE pal_status_e pal_freq_base (word_t * base_freq)
-{
-    pal_return_t ret = call_pal_static (PAL_FREQ_BASE, 0, 0, 0);
-    *base_freq = ret.raw[1];
-    return ret.status;
-}
-
-
-/*
- * PAL_FREQ_RATIOS
- */
-
-INLINE pal_status_e pal_freq_ratios (word_t * proc_ratio, word_t * bus_ratio,
-				     word_t * itc_ratio)
-{
-    pal_return_t ret = call_pal_static (PAL_FREQ_RATIOS, 0, 0, 0);
-    *proc_ratio = ret.raw[1];
-    *bus_ratio  = ret.raw[2];
-    *itc_ratio  = ret.raw[3];
-    return ret.status;
-}
-
-
-/*
- * PAL_HALT_INFO
- */
-
-class pal_power_info_t
-{
-public:
-    class power_state_t
-    {
-    public:
-	word_t exit_latency			: 16;
-	word_t entry_latency			: 16;
-	word_t power_consumption		: 28;
-	word_t implemented			: 1;
-	word_t coherent				: 1;
-	word_t __reserved			: 2;
-    };
-
-    power_state_t get_power_state(word_t state)
-	{
-	    return power_state[state];
-	}
-
-private:
-    power_state_t power_state[8];
-};
-
-INLINE pal_status_e pal_halt_info (pal_power_info_t * power_info)
-{
-    pal_return_t ret = call_pal_stacked (PAL_HALT_INFO, 
-					 (word_t) power_info,
-					 0, 0);
-    return ret.status;
-}
-
-
-/*
- * PAL_MC_CLEAR_LOG
- */
-
-INLINE pal_status_e pal_mc_clear_log (bool * pend_mc = NULL,
-				      bool * pend_init = NULL)
-{
-    pal_return_t ret = call_pal_static (PAL_MC_CLEAR_LOG, 0, 0, 0);
-    if (pend_mc)
-	*pend_mc = (ret.raw[1] & 1);
-    if (pend_init)
-	*pend_init = (ret.raw[1] & 2);
-    return ret.status;
-}
-
-
-/*
- * PAL_MC_ERROR_INFO
- */
-
-class pal_mc_level_index_t
-{
-public:
-    union {
-	struct {
-	    word_t cid			: 4;
-	    word_t tid			: 4;
-	    word_t eic			: 4;
-	    word_t edc			: 4;
-	    word_t eit			: 4;
-	    word_t edt			: 4;
-	    word_t ebh			: 4;
-	    word_t erf			: 4;
-	    word_t ems			: 16;
-	    word_t __reserved		: 16;
-	};
-	word_t raw;
-    };
-};
-
-class pal_mc_tlb_check_t
-{
-public:
-    union {
-	struct {
-	    word_t tr_slot		: 8;
-	    word_t __reserved1		: 8;
-	    word_t dtr			: 1;
-	    word_t itr			: 1;
-	    word_t dtc			: 1;
-	    word_t itc			: 1;
-	    word_t mc			: 1;
-	    word_t __reserved2		: 43;
-	};
-	word_t raw;
-    };
-};
-
-INLINE pal_status_e pal_mc_error_info_errmap (pal_mc_level_index_t * errmap)
-{
-    pal_return_t ret = call_pal_static (PAL_MC_ERROR_INFO, 0, 0, 0);
-    errmap->raw = ret.raw[1];
-    return ret.status;
-}
-
-INLINE pal_status_e pal_mc_error_info_status (processor_state_t * state)
-{
-    pal_return_t ret = call_pal_static (PAL_MC_ERROR_INFO, 1, 0, 0);
-    state->raw = ret.raw[1];
-    return ret.status;
-}
-
-INLINE pal_status_e pal_mc_error_info (pal_mc_level_index_t level_idx,
-				       bool * more,
-				       word_t * info,
-				       addr_t * target_addr,
-				       word_t * requestor,
-				       word_t * responder,
-				       addr_t * ip)
-{
-    pal_return_t ret;
-
-    ret = call_pal_static (PAL_MC_ERROR_INFO, 2, level_idx.raw, 0);
-    *info = ret.raw[1];
-    ret = call_pal_static (PAL_MC_ERROR_INFO, 2, level_idx.raw, 1);
-    *target_addr = (addr_t) ret.raw[1];
-    ret = call_pal_static (PAL_MC_ERROR_INFO, 2, level_idx.raw, 2);
-    *requestor = ret.raw[1];
-    ret = call_pal_static (PAL_MC_ERROR_INFO, 2, level_idx.raw, 3);
-    *responder = ret.raw[1];
-    ret = call_pal_static (PAL_MC_ERROR_INFO, 2, level_idx.raw, 4);
-    *ip = (addr_t) ret.raw[1];
-
-    *more = (ret.raw[2] != 0);
-    return ret.status;
-}
-
-INLINE pal_status_e pal_mc_error_info_itlb (word_t idx, bool * more,
-					    pal_mc_tlb_check_t * info,
-					    addr_t * target_addr,
-					    word_t * requestor,
-					    word_t * responder,
-					    addr_t * ip)
-{
-    pal_mc_level_index_t level_idx;
-    level_idx.raw = 0;
-    level_idx.eit = idx;
-    return pal_mc_error_info (level_idx, more, &info->raw, target_addr,
-			      requestor, responder, ip);
-}
-
-INLINE pal_status_e pal_mc_error_info_dtlb (word_t idx, bool * more,
-					    pal_mc_tlb_check_t * info,
-					    addr_t * target_addr,
-					    word_t * requestor,
-					    word_t * responder,
-					    addr_t * ip)
-{
-    pal_mc_level_index_t level_idx;
-    level_idx.raw = 0;
-    level_idx.edt = idx;
-    return pal_mc_error_info (level_idx, more, &info->raw, target_addr,
-			      requestor, responder, ip);
-}
-
-
-/*
- * PAL_MC_REGISTER_MEM
- */
-
-INLINE pal_status_e pal_mc_register_mem (addr_t addr)
-{
-    pal_return_t ret = call_pal_static_phys (PAL_MC_REGISTER_MEM,
-					     (word_t) addr, 0, 0);
-    return ret.status;
-}
-
-
-/*
- * PAL_HALT_LIGHT
- */
-
-INLINE pal_status_e pal_halt_light (void)
-{
-    pal_return_t ret = call_pal_stacked (PAL_HALT_LIGHT, 0, 0, 0);
-    return ret.status;
-}
-
-
-/*
- * PAL_PERF_MON_INFO
- */
-
-class pal_perf_mon_info_t
-{
-public:
-    union {
-	struct {
-	    word_t generic		: 8;
-	    word_t width		: 8;
-	    word_t cycles		: 8;
-	    word_t retired		: 8;
-	    word_t __pad		: 32;
-	};
-	word_t raw;
-    };
-};
-
-class pal_perf_mon_masks_t
-{
-    u64_t implemented_pmc_mask[4];
-    u64_t implemented_pmd_mask[4];
-    u64_t count_cycles_mask[4];
-    u64_t count_bundles_mask[4];
-
-public:
-
-    bool is_pmc_implemented (word_t n)
-	{ return implemented_pmc_mask[n / 64] & (1UL << (n & 63)); }
-
-    bool is_pmd_implemented (word_t n)
-	{ return implemented_pmd_mask[n / 64] & (1UL << (n & 63)); }
-
-    bool can_count_cycles (word_t n)
-	{ return count_cycles_mask[n / 64] & (1UL << (n & 63)); }
-
-    bool can_count_retired_bundles (word_t n)
-	{ return count_bundles_mask[n / 64] & (1UL << (n & 63)); }
-};
-
-INLINE pal_status_e pal_perf_mon_info (pal_perf_mon_masks_t * mask,
-				       pal_perf_mon_info_t * info)
-{
-    pal_return_t ret = call_pal_static (PAL_PERF_MON_INFO,
-					(word_t) mask, 0, 0);
-    info->raw = ret.raw[1];
-    return ret.status;
-}
-
-
-/*
- * PAL_PTCE_INFO
- */
-
-class pal_ptce_info_t
-{
-public:
-    union {
-	struct {
-	    u64_t	base;
-	    u32_t	count1;
-	    u32_t	count2;
-	    u32_t	stride1;
-	    u32_t	stride2;
-	};
-	u64_t raw[3];
-    };
-};
-
-INLINE pal_status_e pal_ptce_info (pal_ptce_info_t * info)
-{
-    pal_return_t ret = call_pal_static (PAL_PTCE_INFO, 0, 0, 0);
-    info->raw[0] = ret.raw[1];
-    info->raw[1] = ret.raw[2];
-    info->raw[2] = ret.raw[3];
-    return ret.status;
-}
-
-
-/*
- * PAL_VM_INFO
- */
-
-class pal_vm_info_t
-{
-public:
-    enum type_e {
-	none = 0,
-	code = 1,
-	data = 2
-    };
-
-    union {
-	struct {
-	    word_t num_sets		: 8;
-	    word_t num_ways		: 8;
-	    word_t num_entries		: 16;
-	    word_t preferred_size	: 1;
-	    word_t unified		: 1;
-	    word_t tr			: 1;
-	    word_t __pad		: 29;
-	    word_t page_size_mask	: 64;
-	};
-	word_t raw[2];
-    };
-};
-
-INLINE pal_status_e pal_vm_info (word_t tc_level, pal_vm_info_t::type_e type,
-				 pal_vm_info_t * info)
-{
-    pal_return_t ret = call_pal_static (PAL_VM_INFO, tc_level,
-					(word_t) type, 0);
-    info->raw[0] = ret.raw[1];
-    info->raw[1] = ret.raw[2];
-    return ret.status;
-}
-
-
-/*
- * PAL_VM_PAGE_SIZE
- */
-INLINE pal_status_e pal_vm_page_size (word_t * insertable, word_t * purgeable)
-{
-    pal_return_t ret = call_pal_static (PAL_VM_PAGE_SIZE, 0, 0, 0);
-    *insertable = ret.raw[1];
-    *purgeable = ret.raw[2];
-    return ret.status;
-}
-
-
-/*
- * PAL_VM_SUMMARY
- */
-
-class pal_vm_summary_t
-{
-public:
-    union {
-	struct {
-	    word_t walker_present			: 1;
-	    word_t phys_address_bits_implemented	: 7;
-	    word_t protection_key_size			: 8;
-	    word_t max_pkr				: 8;
-	    word_t hash_tag_id				: 8;
-	    word_t max_dtr_entry			: 8;
-	    word_t max_itr_entry			: 8;
-	    word_t max_unique_tcs			: 8;
-	    word_t num_tc_levels			: 8;
-	    word_t impl_virtual_addtress_msb		: 8;
-	    word_t rid_size				: 8;
-	};
-	word_t raw[2];
-    };
-};
-
-INLINE pal_status_e pal_vm_summary (pal_vm_summary_t * summary)
-{
-    pal_return_t ret = call_pal_static (PAL_VM_SUMMARY, 0, 0, 0);
-    summary->raw[0] = ret.raw[1];
-    summary->raw[1] = ret.raw[2];
-    return ret.status;
-}
-
-
-/*
- * PAL_VM_TR_READ
- */
-
-class pal_vm_tr_read_t
-{
-public:
-    union {
-	struct {
-	    word_t access_right_valid		: 1;
-	    word_t privilege_level_valid	: 1;
-	    word_t dirty_bit_valid		: 1;
-	    word_t memory_attributes_valid	: 1;
-	};
-	word_t raw;
-    };
-};
-
-INLINE pal_status_e pal_vm_tr_read (word_t reg_num, word_t type,
-				    addr_t buffer, pal_vm_tr_read_t * tr_valid)
-{
-    pal_return_t ret = call_pal_stacked_phys (PAL_VM_TR_READ, reg_num, type,
-					      virt_to_phys ((word_t) buffer));
-    tr_valid->raw = ret.raw[1];
-    return ret.status;
-}
-
-#endif /* !__ARCH__IA64__PAL_H__ */
diff --git a/kernel/src/arch/ia64/perf.h b/kernel/src/arch/ia64/perf.h
deleted file mode 100644
index 4672535f..00000000
--- a/kernel/src/arch/ia64/perf.h
+++ /dev/null
@@ -1,169 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/perf.h
- * Description:   Performance monitor functionality for IA64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: perf.h,v 1.6 2004/02/24 23:56:25 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__PERF_H__
-#define __ARCH__IA64__PERF_H__
-
-
-/**
- * Generic performance monitor configuration register for ia64.
- */
-class pmc_t
-{
-public:
-    enum priv_e {
-	none	= 0,
-	user	= (1 << 0),
-	kernel	= (1 << 3),
-	both	= (1 << 0) | (1 << 3)
-    };
-
-    union {
-	struct {
-	    word_t plm		: 4;
-	    word_t ev		: 1;
-	    word_t oi		: 1;
-	    word_t pm		: 1;
-	    word_t __ig1	: 1;
-	    word_t es		: 8;
-	    word_t __impl	: 48;
-	};
-	word_t raw;
-    };
-
-    // Construction
-
-    pmc_t (void) {}
-    pmc_t (word_t w) { raw = w; }
-    
-    // Conversion
-
-    operator word_t (void) { return raw; }
-};
-
-
-
-/**
- * Generic performance monitor data register for ia64
- */
-class pmd_t
-{
-public:
-    word_t raw;
-
-    // Construction
-
-    pmd_t (void) {}
-    pmd_t (word_t w) { raw = w; }
-
-    // Conversion
-
-    operator word_t (void) { return raw; }
-};
-
-#define PMD_MASK ((word_t)0x00007fffffffffffull)
-
-/**
- * Read performance monitor configuration register.
- * @param n		register number
- * @returns value of register
- */
-INLINE pmc_t get_pmc (word_t n)
-{
-    pmc_t ret;
-    __asm__ __volatile__ ("mov %0 = pmc[%1]" :"=r" (ret.raw) :"r" (n));
-    return ret;
-}
-
-/**
- * Read performance monitor data register.
- * @param n		register number
- * @returns value of register
- */
-INLINE pmd_t get_pmd (word_t n)
-{
-    pmd_t ret;
-    __asm__ __volatile__ ("mov %0 = pmd[%1]" :"=r" (ret.raw) :"r" (n));
-    return ret;
-}
-
-/**
- * Write performance monitor configuration register.
- * @param n		register number
- * @param value		value to be written
- */
-INLINE void set_pmc (word_t n, pmc_t value)
-{
-    __asm__ __volatile__ (";;mov pmc[%0] = %1; ;;" ::"r" (n), "r" (value.raw));
-}
-
-/**
- * Write performance monitor data register.
- * @param n		register number
- * @param value		value to be written
- */
-INLINE void set_pmd (word_t n, pmd_t value)
-{
-    __asm__ __volatile__ ("mov pmd[%0] = %1" ::"r" (n), "r" (value.raw));
-}
-
-
-/**
- * Wrapper class to access the performance monitor overflow status
- * registers.
- */
-class pmc_overflow_t
-{
-public:
-    bool is_overflowed (word_t n)
-	{ return get_pmc (n / 64) & (1UL << (n & 63)); }
-
-    void clr_overflow (word_t n)
-	{ set_pmc (n / 64, get_pmc (n / 64) & ~(1UL << (n & 63))); }
-
-    void clr_overflow (void)
-	{
-	    set_pmc (0, get_pmc (0) & 1);
-	    set_pmc (1, 0); set_pmc (2, 0); set_pmc (3, 0);
-	}
-
-    bool is_frozen (void)
-	{ return get_pmc (0) & 1; }
-
-    void clr_freeze (void)
-	{ set_pmc (0, get_pmc (0) & ~1UL); }
-
-    void set_freeze (void)
-	{ set_pmc (0, get_pmc (0) | 1); }
-};
-
-
-#endif /* !__ARCH__IA64__PERF_H__ */
diff --git a/kernel/src/arch/ia64/pgent.h b/kernel/src/arch/ia64/pgent.h
deleted file mode 100644
index 455431fa..00000000
--- a/kernel/src/arch/ia64/pgent.h
+++ /dev/null
@@ -1,355 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2006,  Karlsruhe University
- *                
- * File path:     arch/ia64/pgent.h
- * Description:   Generic page table manipluation for IA-64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pgent.h,v 1.24 2006/11/17 17:08:42 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__PGENT_H__
-#define __ARCH__IA64__PGENT_H__
-
-#include <kmemory.h>
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(tlb.h)
-
-#define IA64_PTAB_SIZE		((1 << 10) * sizeof (u64_t))
-#define IA64_USER_PRIV		3
-#define IA64_KERNEL_PRIV	0	
-
-
-#define HW_PGSHIFTS		{12,13,14,16,18,20,22,24,26,28,32,42,52}
-#define HW_VALID_PGSIZES	((1 << 12) | (1 << 13) | \
-				 (1 << 14) | (1 << 16) | \
-				 (1 << 18) | (1 << 20) | \
-				 (1 << 22) | (1 << 24) | \
-				 (1 << 26) | (1 << 28))
-
-#define MDB_BUFLIST_SIZES	{ {24}, {16}, {32}, {8192}, {128}, {0} }
-#define MDB_PGSHIFTS		{12,13,14,16,18,20,22,24,26,28,32,42,52}
-#define MDB_NUM_PGSIZES		(12)
-
-
-EXTERN_KMEM_GROUP (kmem_pgtab);
-
-extern word_t hw_pgshifts[];
-
-class mapnode_t;
-class space_t;
-
-class pgent_t
-{
-public:
-    union {
-	struct {
-	    word_t	subtree		: 61;	// Pointer to subtree
-	    word_t	__pad		: 1;
-	    word_t	is_subtree	: 1;	// 1 if valid subtree
-	    word_t	is_valid	: 1;	// 0 for subtrees
-	} tree;
-	struct {
-	    word_t	__rv		: 53;	// Defined by translation
-	    word_t	pgsize		: 4;	// pgsize_e
-	    word_t	__pad		: 4;
-	    word_t	executed	: 1;
-	    word_t	is_subtree	: 1;	// 0 for mapping
-	    word_t	is_valid	: 1;	// 1 if valid mapping
-	} map;
-	u64_t		raw;
-    };
-
-    enum pgsize_e {
-	size_4k = 0,
-	size_8k,   // 1
-	size_16k,  // 2
-	size_64k,  // 3
-	size_256k, // 4 
-	size_1m,   // 5
-	size_4m,   // 6
-	size_16m,  // 7
-	size_64m,  // 8
-	size_256m, // 9
-	size_4g,   // 10
-	size_4t,   // 11
-	size_4p,   // 12 	// We only allow for 4PB virtual space
-	size_max = size_4t
-    };
-
-private:
-
-    // Linknode access 
-
-    u64_t get_linknode (void)
-	{ return *(u64_t *) ((word_t) this + IA64_PTAB_SIZE); }
-
-    void set_linknode (u64_t val)
-	{ *(u64_t *) ((word_t) this + IA64_PTAB_SIZE) = val; }
-
-public:
-
-    translation_t * translation (void)
-	{ return (translation_t *) this; }
-
-    void set_referenced (void)
-	{ translation ()->set_accessed (); }
-
-    void set_written (void)
-	{ translation ()->set_dirty (); }
-
-    void set_executed (void)
-	{ map.executed = 1; }
-
-
-    // Predicates
-
-    bool is_valid (space_t * s, pgsize_e pgsize)
-	{
-	    return map.is_valid || (map.is_subtree &&
-				    map.pgsize < (word_t) pgsize);
-	}
-
-    bool is_subtree (space_t * s, pgsize_e pgsize)
-	{
-	    if (pgsize == size_4t || pgsize == size_4g || pgsize == size_4m)
-		return map.is_subtree;
-	    else
-		return map.pgsize < (word_t) pgsize;
-	}
-
-    bool is_readable (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->access_rights () != translation_t::xp_rx;
-	}
-
-    bool is_writable (space_t * s, pgsize_e pgsize)
-	{
-	    return (translation ()->access_rights () & 0x02) &&
-	      (translation ()->access_rights () != translation_t::xp_rx);
-	}
-
-    bool is_executable (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->access_rights () & 0x01;
-	}
-
-    bool is_kernel (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->privilege_level () == IA64_KERNEL_PRIV;
-	}
-
-    // Retrieval
-
-    addr_t address (space_t * s, pgsize_e pgsize)
-	{
-	    return addr_mask (translation ()->phys_addr (),
-			      ~((1UL << hw_pgshifts[pgsize]) - 1));
-	}
-	
-    pgent_t * subtree (space_t * s, pgsize_e pgsize)
-	{
-	    if (pgsize == size_4t || pgsize == size_4g || pgsize == size_4m)
-		return (pgent_t *) phys_to_virt (tree.subtree);
-	    else
-		return (pgent_t *) this;
-	}
-
-    mapnode_t * mapnode (space_t * s, pgsize_e pgsize, addr_t vaddr)
-	{ return (mapnode_t *) (get_linknode () ^ (u64_t) vaddr); }
-
-    addr_t vaddr (space_t * s, pgsize_e pgsize, mapnode_t * map)
-	{ return (addr_t) (get_linknode () ^ (u64_t) map); }
-
-    word_t reference_bits (space_t * s, pgsize_e pgsize, addr_t vaddr)
-	{
-	    word_t rwx = 0;
-	    if (translation ()->is_dirty ())
-		rwx = 6;
-	    else if (translation ()->is_accessed ())
-		rwx = 4;
-	    if (map.executed)
-		rwx |= 5;
-	    return rwx;
-	}
-
-    word_t attributes (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->memattrib();
-	}
-
-    // Modification
-
-    void clear (space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr)
-	{
-	    switch (pgsize)
-	    {
-	    case size_4m: case size_4g: case size_4t: case size_4p:
-		raw = 0;
-		break;
-	    default:
-		tree.is_valid = 0;
-		tree.is_subtree = 1;
-		break;
-	    }
-	    if (! kernel)
-		set_linknode (0);
-	}
-
-    void flush (space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr)
-	{
-	}
-
-    void make_subtree (space_t * s, pgsize_e pgsize, bool kernel)
-	{
-	    switch (pgsize) {
-	    case size_4t: case size_4g: case size_4m:
-		tree.subtree = (word_t) virt_to_phys
-		    (kmem.alloc (kmem_pgtab, kernel
-				 ? IA64_PTAB_SIZE : IA64_PTAB_SIZE * 2));
-		tree.is_valid = 0;
-		tree.is_subtree = 1;
-		break;
-	    default:
-		map.is_valid = 0;
-		map.is_subtree = 1;
-		map.pgsize = pgsize - 1;
-		break;
-	    }
-	}
-
-    void remove_subtree (space_t * s, pgsize_e pgsize, bool kernel)
-	{
-	    switch (pgsize) {
-	    case size_4p: case size_4t: case size_4g: case size_4m:
-	    {
-		addr_t ptab = (addr_t) phys_to_virt (tree.subtree);
-		raw = 0;
-		kmem.free (kmem_pgtab,
-			   ptab, kernel ? IA64_PTAB_SIZE : IA64_PTAB_SIZE * 2);
-		break;
-	    }
-	    default:
-		map.is_subtree = 1;
-		map.is_valid = 0;
-		map.pgsize = pgsize + 1;
-		break;
-	    }
-	}
-
-    void set_entry (space_t * s, pgsize_e pgsize, addr_t paddr,
-		    word_t rwx, word_t attrib, bool kernel)
-	{
-	    translation_t newtr (true, (translation_t::memattrib_e) attrib,
-				 kernel, kernel,
-				 kernel ? IA64_KERNEL_PRIV : IA64_USER_PRIV,
-				 (translation_t::access_rights_e) (rwx & 3),
-				 paddr, true);
-	    raw = newtr.get_raw ();
-	    map.is_valid = 1;
-	    map.is_subtree = 0;
-	    map.executed = 0;
-	    map.pgsize = pgsize;
-	}
-
-    void set_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    rwx &= 3;
-	    translation ()->set_access_rights
-		((translation_t::access_rights_e) rwx);
-	}
-
-    void revoke_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    translation_t * tr = translation ();
-	    word_t rights = (word_t) tr->access_rights ();
-	    if (rights & 4)
-		return;
-	    if (rwx & 1) rights &= ~1UL;
-	    if (rwx & 2) rights &= ~2UL;
-	    tr->set_access_rights ((translation_t::access_rights_e) rights);
-	}
-
-    void update_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    translation_t * tr = translation ();
-	    word_t rights = (word_t) tr->access_rights ();
-	    if (rights & 4)
-		return;
-	    if (rwx & 1) rights |= 1;
-	    if (rwx & 2) rights |= 2;
-	    tr->set_access_rights ((translation_t::access_rights_e) rights);
-	}
-
-    void reset_reference_bits (space_t * s, pgsize_e pgsize)
-	{ translation ()->reset_reference_bits (); map.executed = 0; }
-
-    void update_reference_bits (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    if (rwx) translation ()->set_accessed ();
-	    if (rwx & 0x2) translation ()->set_dirty ();
-	    if (rwx & 0x1) map.executed = 1;
-	}
-
-    void set_attributes (space_t * s, pgsize_e pgsize, word_t attrib)
-	{
-	    translation ()->set_memattrib
-		((translation_t::memattrib_e) attrib);
-	}
-
-    void set_linknode (space_t * s, pgsize_e pgsize,
-			      mapnode_t * map, addr_t vaddr)
-	{ set_linknode ((u64_t) map ^ (u64_t) vaddr); }
-
-    // Movement
-
-    pgent_t * next (space_t * s, pgsize_e pgsize, word_t num)
-	{
-	    switch (pgsize) {
-	    default:
-	    case size_4p: case size_4t: case size_4g:
-	    case size_4m: case size_4k:
-		return this + num;
-	    case size_8k:
-		return this + 2*num;
-	    case size_16k: case size_16m:
-		return this + 4*num;
-	    case size_64k: case size_64m:
-		return this + 16*num;
-	    case size_256k: case size_256m:
-		return this + 64*num;
-	    case size_1m:
-		return this + 256*num;
-	    }
-	}
-
-    // Debug
-
-    void dump_misc (space_t * s, pgsize_e pgsize)
-	{
-	}
-};
-
-
-#endif /* !__ARCH__IA64__PGENT_H__ */
diff --git a/kernel/src/arch/ia64/pib.h b/kernel/src/arch/ia64/pib.h
deleted file mode 100644
index b8ba3bab..00000000
--- a/kernel/src/arch/ia64/pib.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     arch/ia64/pib.h
- * Description:   Processor Interrupt Block
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pib.h,v 1.4 2004/04/22 17:42:54 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__PIB_H__
-#define __ARCH__IA64__PIB_H__
-
-
-/**
- * Default location of the Processor Interrupt Block.
- */
-#define IA64_DEFAULT_PIB_ADDR	(0xfee00000UL)
-
-
-class xtp_t
-{
-    union {
-	struct {
-	    u8_t priority	: 4;
-	    u8_t		: 3;
-	    u8_t disable	: 1;
-	};
-	u8_t raw;
-    };
-};
-
-
-/**
- * An Interrupt Processor Block.  The ib_base specifies the base
- * address of the block.
- */
-template<u64_t ib_base> class pib_t
-{
-public:
-
-    enum type_e {
-	INT	= 0,
-	PMI	= 2,
-	NMI	= 4,
-	INIT	= 5,
-	ExtINT	= 7
-    };
-
-    /**
-     * Send IPI to indicated CPU.
-     * @param id_eid	id/eid style id for destination CPU
-     * @param vector	vector to invoke IPI on
-     * @param redirect	allow IPI to be redirected by platform
-     * @param type	type of interrupt to generate on destination CPU
-     */
-    void ipi (u16_t id_eid, u8_t vector,
-	      bool redirect = false, type_e type = INT)
-	{
-	    ((volatile word_t *) ib_base)
-		[((word_t) id_eid << 1) + (redirect ? 1 : 0)] = 
-		(word_t) vector + ((word_t) type << 7);
-	}
-
-    /**
-     * Send IPI to indicated CPU.
-     * @param id	id for destination CPU  (as taken from in cr.lid)
-     * @param eid	eid for destination CPU (as taken from in cr.lid)
-     * @param vector	vector to invoke IPI on
-     * @param redirect	allow IPI to be redirected by platform
-     * @param type	type of interrupt to generate on destination CPU
-     */
-    void ipi (u8_t id, u8_t eid, u8_t vector,
-	      bool redirect = false, type_e type = INT)
-	{
-	    ipi (((u16_t) id << 8) + eid, vector, redirect, type);
-	}
-
-    /**
-     * Set the external task priority (XTP) for current CPU.
-     * @param xtp	new xtp value
-     */
-    void set_xtp (xtp_t xtp)
-	{
-	    ((volatile u8_t *) ib_base)[0x1e0008] = xtp.raw;
-	}
-
-    /**
-     * Retrieve the interrupt vector when interrupt is generated by an
-     * 8529A-compatible interrupt controlled.
-     * @return interrupt vector
-     */
-    u8_t get_inta (void)
-	{
-	    return ((volatile u8_t *) ib_base)[0x1e0000];
-	}
-};
-
-
-#endif /* !__ARCH__IA64__PIB_H__ */
diff --git a/kernel/src/arch/ia64/pkr.h b/kernel/src/arch/ia64/pkr.h
deleted file mode 100644
index e21c4475..00000000
--- a/kernel/src/arch/ia64/pkr.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/pkr.h
- * Description:   Handling of protection key registers.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pkr.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__PKR_H__
-#define __ARCH__IA64__PKR_H__
-
-
-class pkr_t
-{
-public:
-    enum access_rights_e {
-	norights = 0,
-	wo	= 1,
-	ro	= 2,
-	xo	= 4,
-	rw	= 5,
-	wx	= 6,
-	rwx	= 7
-    };
-
-    union {
-	struct {
-	    word_t valid		: 1;
-	    word_t wrx_disable		: 3;
-	    word_t __rv1		: 4;
-	    word_t key			: 24;
-	    word_t __rv2		: 32;
-	} x;
-	word_t raw;
-    };
-
-    // Retrieval
-
-    inline bool is_valid (void)
-	{ return x.valid; }
-
-    inline bool is_writable (void)
-	{ return ! (x.wrx_disable & 1); }
-
-    inline bool is_readable (void)
-	{ return ! (x.wrx_disable & 2); }
-
-    inline bool is_executable (void)
-	{ return ! (x.wrx_disable & 4); }
-
-    inline access_rights_e access_rights (void)
-	{ return (access_rights_e) x.wrx_disable; }
-
-    inline word_t key (void)
-	{ return x.key; }
-
-    // Modification
-
-    inline void validate (void)
-	{ x.valid = 1; }
-
-    inline void invalidate (void)
-	{ x.valid = 0; }
-
-    inline void set (bool valid, access_rights_e rights, word_t key);
-
-    // Register access
-
-    inline void get (word_t num);
-    inline void put (word_t num);
-};
-
-
-/**
- * pkr_t::pkr_set: Initialize the values of a protection key strcuture.
- * The valid bit is automatically set.
- */
-INLINE void pkr_t::set (bool valid, access_rights_e rights, word_t key)
-{
-    x.valid = valid;
-    x.wrx_disable = ~rights;
-    x.key = key;
-}
-
-/**
- * pkr_t::pkr_get: Load pkr_t values from the indicated PKR.
- */
-INLINE void pkr_t::get (word_t pkr_num)
-{
-    __asm__ __volatile__ (
-	"	mov	%0 = pkr[%1]	\n"
-	:
-	"=r" (raw)
-	:
-	"r" (pkr_num));
-}
-
-/**
- * pkr_t::put: Store pkr_t values into the indicated PKR.
- */
-INLINE void pkr_t::put (word_t pkr_num)
-{
-    __asm__ __volatile__ (
-	"	mov	pkr[%1] = %0	\n"
-	:
-	:
-	"r" (raw),
-	"r" (pkr_num));
-}
-
-/**
- * get_pkr: Return value of indicated PKR.
- */
-INLINE pkr_t get_pkr (word_t pkr_num)
-{
-    pkr_t ret;
-
-    __asm__ __volatile__ (
-	"	mov	%0 = pkr[%1]	\n"
-	:
-	"=r" (ret.raw)
-	:
-	"r" (pkr_num));
-
-    return ret;
-}
-
-
-#endif /* !__ARCH__IA64__PKR_H__ */
diff --git a/kernel/src/arch/ia64/psr.h b/kernel/src/arch/ia64/psr.h
deleted file mode 100644
index d73cd407..00000000
--- a/kernel/src/arch/ia64/psr.h
+++ /dev/null
@@ -1,277 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/psr.h
- * Description:   Processor status register
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: psr.h,v 1.8 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__PSR_H__
-#define __ARCH__IA64__PSR_H__
-
-#if defined(ASSEMBLY)
-#define __UL(x) x
-#else
-#define __UL(x) x##UL
-#endif
-
-/*
- * Bit field definitions for PSR.
- */
-
-#define PSR_BIG_ENDIAN				(__UL(1) << 1)
-#define PSR_USER_PERFMON			(__UL(1) << 2)
-#define PSR_ALIGNMENT_CHECK			(__UL(1) << 3)
-#define PSR_LOWER_FP_USED			(__UL(1) << 4)
-#define PSR_UPPER_FP_USED			(__UL(1) << 5)
-#define PSR_INT_COLLECTION			(__UL(1) << 13)
-#define PSR_INT_ENABLE				(__UL(1) << 14)
-#define PSR_PROTECTION_KEY_ENABLE		(__UL(1) << 15)
-#define PSR_DATA_TRANSLATION			(__UL(1) << 17)
-#define PSR_LOWER_FP_DISABLE			(__UL(1) << 18)
-#define PSR_UPPER_FP_DISABLE			(__UL(1) << 19)
-#define PSR_SECURE_PERFMON			(__UL(1) << 20)
-#define PSR_PRIV_PERFMON_ENABLE			(__UL(1) << 21)
-#define PSR_INSTR_SET_TRANSITION		(__UL(1) << 22)
-#define PSR_SECURE_INTERVAL_TIMER		(__UL(1) << 23)
-#define PSR_DEBUG_BREAKPOINT			(__UL(1) << 24)
-#define PSR_LOWER_PRIV_TRANSFER_TRAP		(__UL(1) << 25)
-#define PSR_TAKEN_BRANCH_TRAP			(__UL(1) << 26)
-#define PSR_REGISTER_STACK_TRANSLATION		(__UL(1) << 27)
-#define PSR_CURRENT_PRIVILEGE_0			(__UL(0) << 32)
-#define PSR_CURRENT_PRIVILEGE_3			(__UL(3) << 32)
-#define PSR_INSTRUCTION_SET			(__UL(1) << 34)
-#define PSR_MACHINE_CHECK_ABORT_MASK		(__UL(1) << 35)
-#define PSR_INSTRUCTION_TRANSLATION		(__UL(1) << 36)
-#define PSR_INSTRUCTION_DEBUG_DISABLE		(__UL(1) << 37)
-#define PSR_DATA_ACCESS_FAULTS			(__UL(1) << 38)
-#define PSR_DATA_DEBUG_FAULTS_DISABLE		(__UL(1) << 39)
-#define PSR_SINGLE_STEP_ENABLE			(__UL(1) << 40)
-#define PSR_EXCEPTION_DEFERRAL			(__UL(1) << 43)
-#define PSR_REGISTER_BANK_0			(__UL(0) << 44)
-#define PSR_REGISTER_BANK_1			(__UL(1) << 44)
-#define PSR_INSTRUCTION_ACCESS_FAULT_DISABLE	(__UL(1) << 45)
-
-
-
-#if !defined(ASSEMBLY)
-
-/**
- * psr_t: the IA-64 processor status register
- */
-class psr_t
-{
-public:
-    union {
-	struct {
-	    word_t __rv1	: 1;
-	    word_t be		: 1;
-	    word_t up		: 1;
-	    word_t ac		: 1;
-	    word_t mfl		: 1;
-	    word_t mfh		: 1;
-	    word_t __rv2	: 7;
-	    word_t ic		: 1;
-	    word_t i		: 1;
-	    word_t pk		: 1;
-
-	    word_t __rv3	: 1;
-	    word_t dt		: 1;
-	    word_t dfl		: 1;
-	    word_t dfh		: 1;
-	    word_t sp		: 1;
-	    word_t pp		: 1;
-	    word_t di		: 1;
-	    word_t si		: 1;
-	    word_t db		: 1;
-	    word_t lp		: 1;
-	    word_t tb		: 1;
-	    word_t rt		: 1;
-	    word_t __rv4	: 4;
-
-	    word_t cpl		: 2;
-	    word_t is		: 1;
-	    word_t mc		: 1;
-	    word_t it		: 1;
-	    word_t id		: 1;
-	    word_t da		: 1;
-	    word_t dd		: 1;
-	    word_t ss		: 1;
-	    word_t ri		: 2;
-	    word_t ed		: 1;
-	    word_t bn		: 1;
-	    word_t ia		: 1;
-	    word_t __rv5	: 18;
-	};
-	word_t raw;
-    };
-};
-
-
-/**
- * Read processor status register and return it.
- */
-INLINE psr_t get_psr (void)
-{
-    psr_t ret;
-    __asm__ __volatile__ ("mov %0 = psr" : "=r" (ret));
-    return ret;
-}
-
-INLINE void set_psr (psr_t psr)
-{
-	__asm__ __volatile__ (
-	    "1:	mov	r15 = ip		\n"
-	    "	mov	r14 = %[psr]		\n"
-	    "	;;				\n"
-	    "	add	r15 = 2f-1b,r15		\n"
-	    "	rsm	psr.ic			\n"
-	    "	;;				\n"
-	    "	srlz.d 		 		\n"
-	    "	;;				\n"
-	    "	mov	cr.ipsr = r14		\n"
-	    "	mov	cr.iip = r15		\n"
-	    "	mov	cr.ifs = r0		\n"
-	    "	;;				\n"
-	    "	rfi				\n"
-	    "2:					\n"
-	    :
-	    :
-	    [psr] "r" (psr.raw)
-	    :
-	    "r14", "r15");
-}
-
-INLINE void set_psr_low (psr_t psr)
-{
-    __asm__ __volatile__ ("mov psr.l = %0" :: "r" (psr));
-}
-
-INLINE void disable_interrupts (void)
-{
-    __asm__ __volatile__ ("rsm psr.i");
-}
-
-INLINE void enable_interrupts (void)
-{
-    __asm__ __volatile__ ("ssm psr.i ;; srlz.d ;;");
-}
-
-INLINE void psr_clrbits_low (word_t mask)
-{
-    __asm__ __volatile__ (
-	"	mov	r14 = psr		\n"
-	"	;;				\n"
-	"	andcm	r14 = r14, %0		\n"
-	"	;;				\n"
-	"	mov	psr.l = r14		\n"
-	:
-	:
-	"r" (mask)
-	:
-	"r14");
-}
-
-INLINE void psr_clrbits (word_t mask)
-{
-    if (EXPECT_TRUE ((mask >> 32) == 0))
-	psr_clrbits_low (mask);
-    else
-    {
-	__asm__ __volatile__ (
-	    "1:	mov	r15 = ip		\n"
-	    "	mov	r14 = psr		\n"
-	    "	;;				\n"
-	    "	add	r15 = 2f-1b,r15		\n"
-	    "	andcm	r14 = r14, %0		\n"
-	    "	rsm	psr.ic			\n"
-	    "	;;				\n"
-	    "	or	r14 = r14, %1		\n"
-	    "	srlz.i 		 		\n"
-	    "	;;				\n"
-	    "	mov	cr.ipsr = r14		\n"
-	    "	mov	cr.iip = r15		\n"
-	    "	mov	cr.ifs = r0		\n"
-	    "	;;				\n"
-	    "					\n"
-	    "2:					\n"
-	    :
-	    :
-	    "r" (mask), "r" (PSR_CURRENT_PRIVILEGE_0 | PSR_REGISTER_BANK_1)
-	    :
-	    "r14", "r15");
-    }
-}
-
-INLINE void psr_setbits_low (word_t mask)
-{
-    __asm__ __volatile__ (
-	"	mov	r14 = psr		\n"
-	"	;;				\n"
-	"	or	r14 = r14, %0		\n"
-	"	;;				\n"
-	"	mov	psr.l = r14		\n"
-	:
-	:
-	"r" (mask)
-	:
-	"r14");
-}
-
-INLINE void psr_setbits (word_t mask)
-{
-    if (EXPECT_TRUE ((mask >> 32) == 0))
-	psr_setbits_low (mask);
-    else
-    {
-	__asm__ __volatile__ (
-	    "1:	mov	r15 = ip		\n"
-	    "	mov	r14 = psr		\n"
-	    "	;;				\n"
-	    "	add	r15 = 2f-1b,r15		\n"
-	    "	or	r14 = r14, %0		\n"
-	    "	rsm	psr.ic			\n"
-	    "	;;				\n"
-	    "	or	r14 = r14, %1		\n"
-	    "	srlz.i 		 		\n"
-	    "	;;				\n"
-	    "	mov	cr.ipsr = r14		\n"
-	    "	mov	cr.iip = r15		\n"
-	    "	mov	cr.ifs = r0		\n"
-	    "	;;				\n"
-	    "	rfi				\n"
-	    "2:					\n"
-	    :
-	    :
-	    "r" (mask), "r" (PSR_CURRENT_PRIVILEGE_0 | PSR_REGISTER_BANK_1)
-	    :
-	    "r14", "r15");
-    }
-}
-
-#endif /* !ASSEMBY */
-
-#endif /* !__ARCH__IA64__PSR_H__ */
diff --git a/kernel/src/arch/ia64/rr.h b/kernel/src/arch/ia64/rr.h
deleted file mode 100644
index aa81b34c..00000000
--- a/kernel/src/arch/ia64/rr.h
+++ /dev/null
@@ -1,233 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/rr.h
- * Description:   Handling of region registers.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: rr.h,v 1.8 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__RR_H__
-#define __ARCH__IA64__RR_H__
-
-
-
-#define IA64_RR_BASE(rr)	(((word_t) (rr)) << 61)
-#define IA64_RR_MASK(addr)	((word_t) (addr) & ((1L << 61) - 1))
-#define IA64_RR_NUM(addr)	(((word_t) (addr)) >> 61)
-
-/**
- * Turn physical address into region specific address.
- *
- * @param rr		region number
- * @param addr		physical address
- *
- * @return address translated into indicated region.
- */
-INLINE addr_t ia64_phys_to_rr (int rr, addr_t addr)
-{
-    return (addr_t) (IA64_RR_BASE (rr) + (word_t) IA64_RR_MASK (addr));
-}
-
-
-/**
- * Layout for region registers
- */
-class rr_t
-{
-    union {
-	struct {
-	    word_t _vhpt_enable		: 1;
-	    word_t __rv1		: 1;
-	    word_t _page_size		: 6;
-	    word_t _region_id		: 24;
-	    word_t __rv			: 32;
-	};
-	word_t raw;
-    };
-
-public:
-
-    //
-    // Retrieval
-    //
-
-    /**
-     * @return true if VHPT is enabled; false otherwise.
-     */
-    inline bool is_vhpt_enabled (void)
-	{ return _vhpt_enable; }
-
-    /**
-     * @return preferred page size (log2) for region.
-     */
-    inline word_t page_size_log2 (void)
-	{ return _page_size; }
-
-    /**
-     * @return preferred page size (in bytes) for region.
-     */
-    inline word_t page_size (void)
-	{ return 1UL << _page_size; }
-
-    /**
-     * @return region id.
-     */
-    inline word_t region_id (void)
-	{ return _region_id; }
-
-    /**
-     * @return actual bit-contents of region register.
-     */
-    operator word_t (void)
-	{ return raw; }
-
-
-    //
-    // Modification
-    //
-
-    /**
-     * Enable VHPT walker for region.
-     */
-    inline void enable_vhpt (void)	
-	{ _vhpt_enable = 1; }
-
-    /**
-     * Disable VHPT walker for region.
-     */
-    inline void disable_vhpt (void)	
-	{ _vhpt_enable = 0; }
-
-    /**
-     * Set preferred page size for region.
-     * @param size_log2		new preferred page size (log2)
-     */
-    inline void set_page_size (word_t size_log2)
-	{ _page_size = size_log2; }
-
-    /**
-     * Set region id.
-     * @param rid		new region id
-     */
-    inline void set_region_id (word_t rid)
-	{ _region_id = rid; }
-
-    /**
-     * Initialize region register contents.
-     * @param vhpt_enabled	enable VHPT walker for region
-     * @param rid		region id
-     * @param size_log2		preferred page size (log2)
-     */
-    void set (bool vhpt_enabled, word_t rid, word_t size_log2)
-	{ 
-	    raw = 0;
-	    _region_id = rid;
-	    _vhpt_enable = vhpt_enabled ? 1 : 0;
-	    _page_size = size_log2;
-	}
-
-
-    //
-    // Creation
-    //
-
-    /**
-     * Create new region register with undefined contents.
-     */
-    rr_t (void) {}
-
-    /**
-     * Create an initialized region register.
-     * @param vhpt_enabled	enable VHPT walker for region
-     * @param rid		region id
-     * @param size_log2		preferred page size (log2)
-     */
-    rr_t (bool vhpt_enabled, word_t rid, word_t size_log2)
-	{ 
-	    raw = 0;
-	    _region_id = rid;
-	    _vhpt_enable = vhpt_enabled ? 1 : 0;
-	    _page_size = size_log2;
-	}
-
-
-    //
-    // Register access
-    //
-
-    inline void get (word_t rr_num);
-    inline void put (word_t rr_num);
-};
-
-/**
- * Load values from indicated region register.
- * @param rr_num	region register to read
- */
-INLINE void rr_t::get (word_t rr_num)
-{
-    __asm__ __volatile__ (
-	"	mov	%0 = rr[%1]	\n"
-	:
-	"=r" (raw)
-	:
-	"r" (IA64_RR_BASE (rr_num)));
-}
-
-/**
- * Store values into indicated region register.
- * @param rr_num	region register to modify
- */
-INLINE void rr_t::put (word_t rr_num)
-{
-    __asm__ __volatile__ (
-	"	mov	rr[%1] = %0	\n"
-	:
-	:
-	"r" (raw),
-	"r" (IA64_RR_BASE (rr_num)));
-}
-
-/**
- * Read values from indicated region register.
- * @param rr_num	region register to read
- * @return value of indicated region register.
- */
-INLINE rr_t get_rr (word_t rr_num)
-{
-    rr_t ret;
-
-    __asm__ __volatile__ (
-	"	mov	%0 = rr[%1]	\n"
-	:
-	"=r" (ret)
-	:
-	"r" (IA64_RR_BASE (rr_num)));
-
-    return ret;
-}
-
-
-#endif /* !__ARCH__IA64__RR_H__ */
diff --git a/kernel/src/arch/ia64/runconv.h b/kernel/src/arch/ia64/runconv.h
deleted file mode 100644
index 13b06394..00000000
--- a/kernel/src/arch/ia64/runconv.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/runconv.h
- * Description:   IA-64 runtime convention definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: runconv.h,v 1.5 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__RUNCONV_H__
-#define __ARCH__IA64__RUNCONV_H__
-
-
-#define CALLER_SAVED_GENERAL_REGS 					\
-    "r2",  "r3",							\
-    "r8",  "r9",  "r10", "r11",						\
-    "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21", "r22",	\
-    "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",	\
-    "out0",  "out1",  "out2",  "out3",  "out4",				\
-    "out5",  "out6",  "out7"
-
-#define CALLER_SAVED_FP_REGS						  \
-    "f6",  "f7",  "f8",  "f9",  "f11", "f12", "f13", "f14", "f15",	  \
-    "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",		  \
-    "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \
-    "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \
-    "f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \
-    "f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \
-    "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \
-    "f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \
-    "f100", "f101", "f102", "f103", "f104",				  \
-    "f105", "f106", "f107", "f108", "f109",				  \
-    "f110", "f111", "f112", "f113", "f114",				  \
-    "f115", "f116", "f117", "f118", "f119",				  \
-    "f120", "f121", "f122", "f123", "f124",				  \
-    "f125", "f126", "f127"
-
-#define CALLER_SAVED_PREDICATE_REGS \
-    "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15"
-
-#define CALLER_SAVED_BRANCH_REGS \
-    "b0", "b6", "b7"
-
-#define CALLER_SAVED_APPLICATION_REGS \
-    "ar.ccv", "ar.pfs"
-
-#define CALLER_SAVED_REGS					\
-    CALLER_SAVED_GENERAL_REGS, CALLER_SAVED_FP_REGS,		\
-    CALLER_SAVED_PREDICATE_REGS, CALLER_SAVED_BRANCH_REGS,	\
-    CALLER_SAVED_APPLICATION_REGS
-
-#define CALLEE_SAVED_GENERAL_REGS \
-    "r4", "r5", "r6", "r7"
-
-#define CALLEE_SAVED_FP_REGS					\
-    "f2", "f3", "f4", "f5",					\
-    "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",	\
-    "f23", "f24", "f25", "f26", "f27", "f29", "f30", "f31"
-
-#define CALLEE_SAVED_PREDICATE_REGS					  \
-    "p16", "p17", "p18", "p19", 					  \
-    "p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \
-    "p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \
-    "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \
-    "p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \
-    "p60", "p61", "p62", "p63"
-
-#define CALLEE_SAVED_BRANCH_REGS \
-    "b1", "b2", "b3", "b4", "b5"
-
-#define CALLEE_SAVED_APPLICATION_REGS \
-    "ar.unat", "ar.lc"
-
-#define CALLEE_SAVED_REGS					\
-    CALLEE_SAVED_GENERAL_REGS, CALLEE_SAVED_FP_REGS,		\
-    CALLEE_SAVED_PREDICATE_REGS, CALLEE_SAVED_BRANCH_REGS,	\
-    CALLEE_SAVED_APPLICATION_REGS
-
-#endif /* !__ARCH__IA64__RUNCONV_H__ */
diff --git a/kernel/src/arch/ia64/sal.cc b/kernel/src/arch/ia64/sal.cc
deleted file mode 100644
index a21995cd..00000000
--- a/kernel/src/arch/ia64/sal.cc
+++ /dev/null
@@ -1,169 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/sal.cc
- * Description:   IA-64 SAL management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sal.cc,v 1.13 2003/09/24 19:05:27 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include INC_ARCH(sal.h)
-#include INC_ARCH(pal.h)
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-#include INC_PLAT(system_table.h)
-
-
-sal_system_table_t * ia64_sal_table = NULL;
-
-static addr_t __ia64_sal_entry[2];
-
-/**
- * Entry point for SAL procedure calls.
- */
-ia64_sal_func_t ia64_sal_entry = (ia64_sal_func_t) &__ia64_sal_entry;
-
-
-
-void SECTION (".init")
-init_sal (void)
-{
-    /*
-     * Locate the SAL table.
-     */
-
-    ia64_sal_table = (sal_system_table_t *)
-	efi_config_table.find_table (SAL_SYSTEM_TABLE_GUID);
-    ia64_sal_table = phys_to_virt (ia64_sal_table);
-
-    /*
-     * Map SAL table if not already mapped.
-     */
-
-    if (! dtrmap.is_mapped ((addr_t) ia64_sal_table))
-    {
-	translation_t tr (1, translation_t::write_back, 1, 1, 0,
-			  translation_t::rwx,
-			  virt_to_phys (ia64_sal_table), 0);
-	dtrmap.add_map (tr, ia64_sal_table, HUGE_PGSIZE, 0);
-    }
-
-    /*
-     * Sanity check.
-     */
-
-    if (! ia64_sal_table->is_valid ())
-    {
-	printf ("SAL table not valid.\n");
-	enter_kdebug ("no sal");
-    }
-
-    /*
-     * Extract the needed SAL table entries.
-     */
-
-    u8_t * entry = (u8_t *) ia64_sal_table + sizeof (*ia64_sal_table);
-    for (int i = 0; i < ia64_sal_table->entry_count; i++)
-    {
-	switch (*entry)
-	{
-	case 0:
-	{
-	    sal_entrypoint_desc_t * ed = (sal_entrypoint_desc_t *) entry;
-
-	    TRACE_INIT ("PAL proc at %p\n"
-			"SAL proc at %p, gp at %p\n",
-			ed->pal_proc, ed->sal_proc, ed->sal_global_data);
-
-	    ia64_pal_entry = ed->pal_proc;
-	    __ia64_sal_entry[0] = phys_to_virt ((addr_t) ed->sal_proc);
-	    __ia64_sal_entry[1] = phys_to_virt ((addr_t) ed->sal_global_data);
-
-
-	    /*
-	     * Map SAL code and data.
-	     */
-
-	    if (! itrmap.is_mapped (__ia64_sal_entry[0]))
-	    {
-		translation_t tr (1, translation_t::write_back, 1, 1, 0,
-				  translation_t::rwx, ed->sal_proc, 0);
-		itrmap.add_map (tr, __ia64_sal_entry[0], HUGE_PGSIZE, 0);
-	    }
-	    if (! dtrmap.is_mapped (__ia64_sal_entry[1]))
-	    {
-		translation_t tr (1, translation_t::write_back, 1, 1, 0,
-				  translation_t::rwx, ed->sal_global_data, 0);
-		dtrmap.add_map (tr, __ia64_sal_entry[1], HUGE_PGSIZE, 0);
-	    }
-
-	    entry += 48;
-	    break;
-	}
-
-	case 1:
-	    entry += 32;
-	    break;
-
-	case 2:
-	    entry += 16;
-	    break;
-	case 3:
-	    entry += 32;
-	    break;
-	case 4:
-	    entry += 16;
-	    break;
-	case 5:
-	{
-#if defined(CONFIG_SMP)
-	    extern word_t ap_wakeup_vector;
-	    sal_ap_wakeup_desc_t * wd = (sal_ap_wakeup_desc_t*) entry;
-	    TRACE_INIT("AP wakeup mechanism: %s (%x), IRQ vector: 0x%2x\n",
-		       wd->wakeup_mechanism == 0 ? "external interrupt" :
-		       "unknown", wd->wakeup_mechanism, 
-		       wd->irq_vector);
-	    ap_wakeup_vector = wd->irq_vector;
-#endif
-	    entry += 16;
-	    break;
-	}
-
-	default:
-	    /*
-	     * Unknown SAL entries will always be located at end.
-	     */
-	    printf ("Unknown SAL entry: %d\n", *entry);
-	    break;
-	}
-    }
-
-    if (! ia64_pal_entry)
-	panic ("PAL proc not found\n");
-
-    if (! __ia64_sal_entry[0])
-	panic ("SAL proc not found\n");
-}
diff --git a/kernel/src/arch/ia64/sal.h b/kernel/src/arch/ia64/sal.h
deleted file mode 100644
index d4229bfe..00000000
--- a/kernel/src/arch/ia64/sal.h
+++ /dev/null
@@ -1,301 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/sal.h
- * Description:   IA-64 System Abstraction Layer
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sal.h,v 1.7 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__SAL_H__
-#define __ARCH__IA64__SAL_H__
-
-
-/**
- * sal_system_table_t: header for SAL system table
- */
-class sal_system_table_t
-{
-public:
-    union {
-	u32_t		raw;
-	char		string[4];
-    } signature;
-
-    u32_t		total_table_length;
-
-    union {
-	u16_t		raw;
-	struct {
-	    u8_t 	minor;
-	    u8_t	major;
-	} x;
-    } sal_revision;
-
-    u16_t		entry_count;
-
-    u8_t		checksum;
-    u8_t		__reserved1[7];
-
-    union {
-	u16_t		raw;
-	struct {
-	    u8_t 	minor;
-	    u8_t	major;
-	} x;
-    } sal_a_version;
-
-    union {
-	u16_t		raw;
-	struct {
-	    u8_t 	minor;
-	    u8_t	major;
-	} x;
-    } sal_b_version;
-
-    char		oem_id[32];
-    char		product_id[32];
-    u8_t		__reserved2[8];
-
-    inline bool is_valid (void)
-	{ return signature.string[0] == 'S' && signature.string[1] == 'S' &&
-	      signature.string[2] == 'T' && signature.string[3] == '_'; }
-
-};
-
-
-/**
- * sal_entrypoint_desc_t: SAL table entry containing entrypoints
- */
-class sal_entrypoint_desc_t
-{
-public:
-    u8_t		type;
-    u8_t		__reserved1[7];
-    addr_t		pal_proc;
-    addr_t		sal_proc;
-    addr_t		sal_global_data;
-    u8_t		__reserved2[16];
-};
-
-/**
- * Translation Register Descriptor
- */
-class sal_trans_reg_desc_t
-{
-public:
-    u8_t		type;
-    u8_t		reg_type;
-    u8_t		reg_num;
-    u8_t		__reserved1[5];
-    u64_t		covered_area;
-    u64_t		page_size;
-    u8_t		__reserved2[8];
-};
-
-
-/**
- * Platform feature descriptor entry
- */
-class sal_feature_desc_t
-{
-public:
-    u8_t	type;
-    union {
-	u8_t raw;
-	BITFIELD4 (	u8_t,
-			bus_lock		: 1,
-			irq_redirection_hint	: 1,
-			ipi_redirection_hint	: 1,
-			__reserved1		: 5);
-    };
-    u8_t	__reserved2[2];
-
-    bool has_buslock() 
-	{ return bus_lock == 1; }
-
-    bool has_irq_redirection_hint()
-	{ return irq_redirection_hint == 1; }
-
-    bool has_ipi_redirection_hint()
-	{ return ipi_redirection_hint == 1; }
-};
-
-/**
- * Purge translation cache coherency domain entry
- */
-class sal_coherency_domain_info_t
-{
-public:
-    u64_t		num_processors;
-    word_t *		processor_ids;
-};
-
-class sal_purge_tc_domain_desc_t
-{
-public:
-    u8_t				type;
-    u8_t				__reserved[3];
-    u32_t				num_domains;
-    sal_coherency_domain_info_t *	domain_info;
-};
-
-/** 
- * Application processor wakeup entry
- */
-class sal_ap_wakeup_desc_t 
-{
-public:
-    u8_t		type;
-    u8_t		wakeup_mechanism;
-    u8_t		__reserved[6];
-    u64_t		irq_vector;
-};
-
-
-extern sal_system_table_t * ia64_sal_table;
-
-
-/**
- * Function identifiers for SAL procedures.
- */
-enum sal_function_id_e {
-    SAL_SET_VECTORS		= 0x01000000,
-    SAL_GET_STATE_INFO		= 0x01000001,
-    SAL_GET_STATE_INFO_SIZE	= 0x01000002,
-    SAL_CLEAR_STATE_INFO	= 0x01000003,
-    SAL_MC_RENDEZ		= 0x01000004,
-    SAL_MC_SET_PARAMS		= 0x01000005,
-    SAL_REGISTER_PHYSICAL_ADDR	= 0x01000006,
-    SAL_CACHE_FLUSH		= 0x01000008,
-    SAL_CACHE_INIT		= 0x01000009,
-    SAL_PCI_CONFIG_READ		= 0x01000010,
-    SAL_PCI_CONFIG_WRITE	= 0x01000011,
-    SAL_FREQ_BASE		= 0x01000012,
-    SAL_UPDATE_PAL		= 0x01000020,
-};
-
-
-/**
- * Return status of SAL calls
- */
-enum sal_status_e {
-    SAL_OK		=  0,
-    SAL_UNIMPLEMENTED	= -1,
-    SAL_INVALID_ARG	= -2,
-    SAL_ERROR		= -3,
-    SAL_VADDR_NOTREG	= -4,
-};
-
-
-/**
- * Four word structure containing return values of SAL calls.
- */
-class sal_return_t
-{
-public:
-    union {
-	sal_status_e status;
-	word_t raw[4];
-    };
-};
-
-typedef sal_return_t (*ia64_sal_func_t)
-    (sal_function_id_e id, word_t a1, word_t a2, word_t a3,
-     word_t a4, word_t a5, word_t a6, word_t a7);
-
-extern ia64_sal_func_t ia64_sal_entry;
-
-
-/*
- * SAL_FREQ_BASE
- */
-
-class sal_freq_base_t
-{
-public:
-    enum type_e {
-	platform	= 0,
-	itc		= 1,
-	rtc		= 2
-    };
-};
-
-INLINE sal_status_e sal_freq_base (sal_freq_base_t::type_e type,
-				   word_t * clock_freq, word_t * drift_info)
-{
-    sal_return_t ret = ia64_sal_entry (SAL_FREQ_BASE, (word_t) type,
-				       0, 0, 0, 0, 0, 0);
-
-    *clock_freq = ret.raw[1];
-    *drift_info = ret.raw[2];
-    return ret.status;
-}
-
-/* 
- * SAL_SET_VECTORS
- */
-class sal_vector_t
-{
-public:
-    enum type_e {
-	machine_check	= 0,
-	init		= 1,
-	boot_rendez	= 2
-    };
-};
-
-INLINE sal_status_e sal_set_vectors (sal_vector_t::type_e type,
-				     addr_t phys_addr_1, addr_t gp_1,
-				     u32_t length_1,
-				     addr_t phys_addr_2, addr_t gp_2,
-				     u32_t length_2)
-{
-    sal_return_t ret = ia64_sal_entry (SAL_SET_VECTORS, type,
-				       (word_t) phys_addr_1, (word_t) gp_1,
-				       (word_t) length_1,
-				       (word_t) phys_addr_2, (word_t) gp_2,
-				       (word_t) length_2);
-    return ret.status;
-}
-
-/**
- * Set the rendezvous point for application processors.
- * @param rendez_func		rendevous function
- * @param length		length of rendevous procedure
- */
-INLINE sal_status_e sal_set_boot_rendez (void (*rendez_func)(),
-					 u32_t length)
-{
-    addr_t ip = (addr_t) ((word_t *) rendez_func)[0];
-    addr_t gp = (addr_t) ((word_t *) rendez_func)[1];
-
-    return sal_set_vectors (sal_vector_t::boot_rendez,
-			    ip, gp, length, 0, 0, 0);
-}
-				    
-
-
-#endif /* !__ARCH__IA64__SAL_H__ */
diff --git a/kernel/src/arch/ia64/ski.h b/kernel/src/arch/ia64/ski.h
deleted file mode 100644
index fb58f8fb..00000000
--- a/kernel/src/arch/ia64/ski.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/ski.h
- * Description:   SKI (HP simulator) specific functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ski.h,v 1.2 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__SKI_H__
-#define __ARCH__IA64__SKI_H__
-
-#define IA64_SKI_SSC_CONSOLE_INIT	20
-#define IA64_SKI_SSC_GETCHAR		21
-#define IA64_SKI_SSC_PUTCHAR		31
-#define IA64_SKI_SSC_GET_RTC		65
-#define IA64_SKI_SSC_EXIT		66
-
-extern word_t ia64_ski_ssc(word_t in0, word_t in1, 
-			   word_t in2, word_t in3, 
-			   word_t func);
-
-#endif /* !__ARCH__IA64__SKI_H__ */
diff --git a/kernel/src/arch/ia64/ski/Makeconf b/kernel/src/arch/ia64/ski/Makeconf
deleted file mode 100644
index ba3a10e3..00000000
--- a/kernel/src/arch/ia64/ski/Makeconf
+++ /dev/null
@@ -1,5 +0,0 @@
-SOURCES+=	src/arch/ia64/ski/startup.S \
-		src/arch/ia64/ski/efi.cc \
-		src/arch/ia64/ski/ski.cc \
-		src/arch/ia64/ski/palemu.S \
-		src/arch/ia64/ski/salemu.cc
diff --git a/kernel/src/arch/ia64/ski/efi.cc b/kernel/src/arch/ia64/ski/efi.cc
deleted file mode 100644
index 8e073d8d..00000000
--- a/kernel/src/arch/ia64/ski/efi.cc
+++ /dev/null
@@ -1,235 +0,0 @@
- /*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/ski/efi.cc
- * Description:   efi emulation for SKI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: efi.cc,v 1.11 2005/01/10 05:47:47 cgray Exp $
- *                
- ********************************************************************/
-#include <types.h>
-#include INC_PLAT(bootinfo.h)
-#include INC_PLAT(system_table.h)
-#include INC_PLAT(runtime_services.h)
-#include INC_PLAT(memory_map.h)
-#include INC_ARCH(sal.h)
-#include INC_ARCH(ski.h)
-#include INC_GLUE(hwspace.h)
-
-#if defined(__GNUC__)
-#if (__GNUC__ < 3) || (__GNUC__ >= 3 && __GNUC_MINOR__ < 3)
-#error Ski support only works with gcc version >= 3.3
-#endif
-#endif
-
-extern "C" void pal_emulator (unsigned long index, unsigned long arg1,
-			      unsigned long arg2, unsigned long arg3);
-extern "C" long sal_emulator (long index, 
-			      unsigned long in1, unsigned long in2,
-			      unsigned long in3, unsigned long in4, 
-			      unsigned long in5, unsigned long in6, 
-			      unsigned long in7);
-
-
-#define EFI_SYSTEM_TABLE_SIGNATURE	0x5453595320494249
-#define EFI_SYSTEM_TABLE_REVISION	((1 << 16) | 00)
-#define EFI_RUNTIME_SERVICES_SIGNATURE	0x5652453544e5552
-#define EFI_RUNTIME_SERVICES_REVISION	0x00010000
-
-#define NUM_MEM_DESCS	4
-
-static efi_bootinfo_t bootinfo_ski;
-static efi_system_table_t efi_system_table_ski;
-static efi_runtime_services_t efi_runtime_services_ski;
-static efi_config_table_t efi_config_table_ski;
-static struct {
-    sal_system_table_t sal_system_table;
-    sal_entrypoint_desc_t sal_entrypoint_desc;
-} sal_tabs;
-static efi_memory_desc_t efi_memory_desc[NUM_MEM_DESCS];
-
-#define EFI_FUNC(rettype, name, args...)				\
-static word_t __##name[2];						\
-static rettype name (args)
-
-#define SET_EFI_FUNC_PHYS(entry, func)					\
-do {									\
-    efi_runtime_services_ski.entry =  (efi_func_t) &__##func;		\
-    word_t * fptr_n = &__##func[0];					\
-    word_t * fptr_o = virt_to_phys ((word_t *) &func);			\
-    fptr_n[0] = virt_to_phys (fptr_o[0]);				\
-    fptr_n[1] = virt_to_phys (fptr_o[1]);				\
-} while (0)
-
-
-EFI_FUNC (void, efi_reset_system,
-	  efi_runtime_services_t::reset_type_e reset_type,
-	  efi_runtime_services_t::status_e reset_status,
-	  word_t data_size,
-	  char16 * reset_data)
-{
-    ia64_ski_ssc(reset_status, 0, 0, 0, IA64_SKI_SSC_EXIT);
-}
-
-EFI_FUNC (word_t, efi_unimplemented,
-	  word_t, word_t, word_t, word_t, word_t)
-{
-    return efi_runtime_services_t::unsupported;
-}
-
-EFI_FUNC (word_t, efi_set_virtual_address_map,
-	  word_t memmap_size, word_t memdesc_size,
-	  word_t memdesc_version, word_t memmap_addr, word_t)
-{
-    return efi_runtime_services_t::success;
-}
-
-
-static void strcpy(char * dest, const char * src)
-{
-    while(*src)
-	*dest++ = *src++;
-}
-
-extern "C" efi_bootinfo_t * init_efi_ski (void)
-{
-    /* Initialize the system tables */
-    efi_system_table_t * st = &efi_system_table_ski;
-
-    st->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE;
-    st->hdr.revisions  = EFI_SYSTEM_TABLE_REVISION;
-    st->hdr.header_size = sizeof (efi_table_header_t);
-    st->firmware_vendor = (char16 *)
-	"H\0e\0w\0l\0e\0t\0t\0-\0P\0a\0c\0k\0a\0r\0d\0\0";
-    st->firmware_revision = 1;
-    st->runtime_services = &efi_runtime_services_ski;
-    st->config_table.number_of_table_entries = 1;
-    st->config_table.config_table = &efi_config_table_ski;
-
-    /* Configure runtime services */
-    efi_runtime_services_t * rts = &efi_runtime_services_ski;
-
-    rts->hdr.signature = EFI_RUNTIME_SERVICES_SIGNATURE;
-    rts->hdr.revisions = EFI_RUNTIME_SERVICES_REVISION;
-    rts->hdr.header_size = sizeof (efi_table_header_t);
-
-    SET_EFI_FUNC_PHYS (get_time_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (set_time_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (get_wakeup_time_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (set_wakeup_time_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (set_virtual_address_map_f, efi_set_virtual_address_map);
-    SET_EFI_FUNC_PHYS (convert_pointer_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (get_variable_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (get_next_variable_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (set_variable_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (get_next_high_monotinic_count_f, efi_unimplemented);
-    SET_EFI_FUNC_PHYS (reset_system_f, efi_reset_system);
-
-    /* Configure config tables */
-    efi_config_table_t * ct = &efi_config_table_ski;
-
-    ct->vendor_guid = SAL_SYSTEM_TABLE_GUID;
-    ct->vendor_table = &sal_tabs.sal_system_table;
-
-    /* Fill in the SAL system table */
-    sal_system_table_t * sal_st = &sal_tabs.sal_system_table;
-    sal_entrypoint_desc_t * sal_ed = &sal_tabs.sal_entrypoint_desc;
-
-    sal_st->signature.string[0] = 'S';
-    sal_st->signature.string[1] = 'S';
-    sal_st->signature.string[2] = 'T';
-    sal_st->signature.string[3] = '_';
-    sal_st->total_table_length = sizeof (sal_system_table_t);
-    sal_st->sal_a_version.x.major = 0;
-    sal_st->sal_a_version.x.minor = 1;
-    sal_st->entry_count = 1;
-    strcpy (sal_st->oem_id, "Hewlett-Packard");
-    strcpy (sal_st->product_id, "HP-simulator");
-    sal_ed->type = 0; // entry point descriptor
-
-    /* Fixup of IA-64 style function pointers */
-    word_t * pal_desc = virt_to_phys ((word_t *) &pal_emulator);
-    word_t * sal_desc = virt_to_phys ((word_t *) &sal_emulator);
-
-    sal_ed->pal_proc = virt_to_phys ((addr_t) pal_desc[0]);
-    sal_ed->sal_proc = virt_to_phys ((addr_t) sal_desc[0]);
-    sal_ed->sal_global_data = virt_to_phys ((addr_t) sal_desc[1]);
-
-    unsigned char checksum = 0;
-    for (unsigned char * cp = (unsigned char *) &sal_tabs;
-	 cp < (unsigned char *) (&sal_tabs + 1);
-	 ++cp)
-	checksum += *cp;
-    sal_st->checksum = -checksum;
-
-    /* Simulate free memory at physical address zero */
-    efi_memory_desc_t * md = &efi_memory_desc[0];
-
-    md[0].set (EFI_BOOT_SERVICES_DATA, 
-	       (addr_t) MB (0),
-	       (addr_t) MB (0), 
-	       MB (1) >> 12, EFI_MEMORY_WB);
-
-    md[1].set (EFI_CONVENTIONAL_MEMORY, 
-	       (addr_t) MB(2),
-	       (addr_t) 0, 
-	       MB (128) >> 12, EFI_MEMORY_WB);
-
-    md[2].set (EFI_PAL_CODE, 
-	       addr_mask ((addr_t) &pal_emulator, ~((1 << 20) - 1)), 
-	       (addr_t) MB (1), 
-	       MB (1) >> 12, EFI_MEMORY_WB);
-
-    md[3].set (EFI_MEMORY_MAPPED_IO_PORT_SPACE, 
-	       (addr_t) 0xb8000,
-	       (addr_t) 0,
-	       MB (8) >> 12, EFI_MEMORY_UC);
-
-    /*
-     * Initialize bootinfo structure
-     */
-    efi_bootinfo_t * bi = &bootinfo_ski;
-
-    /* this stops the compiler loading the full virtual address of
-     * a string before we have translation on.
-     */
-    bi->magic.string[0] = 'L';
-    bi->magic.string[1] = '4';
-    bi->magic.string[2] = 'K';
-    bi->magic.string[3] = 'a';
-    bi->magic.string[4] = ' ';
-    bi->magic.string[5] = 'l';
-    bi->magic.string[6] = 'd';
-    bi->magic.string[7] = 'r';
-
-    bi->version = EFI_BOOTINFO_VERSION;
-    bi->systab = (word_t) &efi_system_table_ski;
-    bi->memmap = (word_t) &efi_memory_desc[0];
-    bi->memmap_size = NUM_MEM_DESCS * sizeof (efi_memory_desc_t);
-    bi->memdesc_size = sizeof (efi_memory_desc_t);
-    bi->memdesc_version = EFI_MEMORY_DESC_VERSION;
-
-    return bi;
-}
diff --git a/kernel/src/arch/ia64/ski/palemu.S b/kernel/src/arch/ia64/ski/palemu.S
deleted file mode 100644
index 1579d51e..00000000
--- a/kernel/src/arch/ia64/ski/palemu.S
+++ /dev/null
@@ -1,193 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/ski/palemu.S
- * Description:   PAL emulation for HP's SKI emulator
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: palemu.S,v 1.2 2003/09/24 19:05:29 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(asm.h)
-
-#define PALPROC(func, idx)			\
-						;\
-9:	cmp.ne	p6,p0 = idx, index		;\
-(p6)	br.sptk.few 9f				;\
-						;\
-	.global	func				;\
-func:	
-
-
-BEG_PROC (pal_emulator)
-
-index	= r28
-arg1	= r29
-arg2	= r30
-arg3	= r31
-
-	// Determine procedure type
-	mov	r14 = 256
-	mov	r15 = 512
-	;;
-	cmp.ltu	p6,p0 = index, r14
-	cmp.ltu	p7,p0 = index, r15
-(p6)	br.sptk.few	static
-(p7)	br.sptk.few	stacked
-	;;
-	mov	r14 = 768
-	mov	r15 = 1024
-	;;
-	cmp.ltu	p6,p0 = index, r14
-	cmp.ltu	p7,p0 = index, r15
-(p6)	br.sptk.few	static
-(p7)	br.sptk.few	stacked
-
-	// Reserved index
-	mov	ret0 = -1
-	mov	ret1 = 0
-	mov	ret2 = 0
-	mov	ret3 = 0
-	br.sptk.many rp
-
-
-	//
-	// Static procedure calls
-	//
-
-static:
-
-PALPROC (pal_ptce_info, 6)
-	mov	ret0 = 0			// OK
-	movl	ret1 = 0x100000000		// tc_base
-	movl	ret2 = 0x0000000200000003	// count0, count1
-	movl	ret3 = 0x1000000000002000	// stride0, stride1
-	br.sptk.many rp
-
-PALPROC (pal_freq_ratios, 14)
-    	mov	ret0 = 0			// OK
-    	movl	ret1 = 0x100000064		// proc_ratio (1/100)
-    	movl	ret2 = 0x100000100		// bus_ratio  (1/256)
-    	movl	ret3 = 0x100000064		// itc_ratio (1/100)
-	br.sptk.many rp
-
-PALPROC (pal_vm_summary, 8)
-    	mov	ret0 = 0			// OK
-    	movl	ret1 = 0x003f000000000000	// 63 bits physical
-    	movl	ret2 = 0x000000000000003f	// 63 bits virtual
-    	movl	ret3 = 0
-	br.sptk.many rp
-
-PALPROC (pal_rse_info, 19)
-    	mov	ret0 = 0			// OK
-    	movl	ret1 = 96			// Number of stacked regs
-    	movl	ret2 = 0			// No hints
-    	movl	ret3 = 0
-	br.sptk.many rp
-
-PALPROC (pal_cache_flush, 1)
-	mov	r14 = ar.lc
-	movl	r15 = 0x80000			// 512k mill cache lines (16MB)
-	;;
-	mov	ar.lc = r15
-	movl	r15 = 0xe000000000000000
-	;;
-1:	fc	r15
-	add	r15 = 32, r15
-	br.cloop.sptk.few 1b
-	sync.i
-	;;
-	srlz.i
-	;;
-	mov	ar.lc = r14
-	mov	ret0 = 0			// OK
-	mov	ret3 = 0
-	br.sptk.many rp
-
-PALPROC (pal_perf_mon_info, 15)
-	mov	ret0 = 0			// OK
-	movl	ret1 = 0x12082004		// generic=4, width=32,
-						// cycles=18, retired=8
-    	movl	ret2 = 0
-    	movl	ret3 = 0
-
-	mov	r14 = 0xffff			// Implelemted PMCs
-	mov	r15 = 0xffff			// Implemented PMDs
-	add	arg2 = 8, arg1
-	;;
-	// Bitmask for implemented PMCs
-	st8	[arg1] = r14, 16
-	st8	[arg2] = r0, 16
-	;;
-	st8	[arg1] = r0, 16
-	st8	[arg2] = r0, 16
-	;;
-	// Bitmask for implemented PMDs
-	st8	[arg1] = r15, 16
-	st8	[arg2] = r0, 16
-	;;
-	st8	[arg1] = r0, 16
-	st8	[arg2] = r0, 16
-	mov	r14 = 0xf0			// Cycle count PMCs
-	mov	r15 = 0x10			// Retired bundles PMCs
-	;;
-	// Bitmask for cycle count capable PMCs
-	st8	[arg1] = r14, 16
-	st8	[arg2] = r0, 16
-	;;
-	st8	[arg1] = r0, 16
-	st8	[arg2] = r0, 16
-	;;
-	// Bitmask for retired bundles capable PMCs
-	st8	[arg1] = r15, 16
-	st8	[arg2] = r0, 16
-	;;
-	st8	[arg1] = r0
-	st8	[arg2] = r0
-	;;
-	br.sptk.many rp
-
-9:	// Unimplemented call
-	mov	ret0 = -1
-	mov	ret1 = 0
-	mov	ret2 = 0
-	mov	ret3 = 0
-	br.sptk.many rp
-
-
-
-	//
-	// Stacked procedure calls
-	//
-
-stacked:
-
-9:	// Unimplemented call
-	mov	ret0 = -1
-	mov	ret1 = 0
-	mov	ret2 = 0
-	mov	ret3 = 0
-	br.ret.sptk.many rp
-
-END_PROC (pal_emulator)
diff --git a/kernel/src/arch/ia64/ski/salemu.cc b/kernel/src/arch/ia64/ski/salemu.cc
deleted file mode 100644
index d937d9f3..00000000
--- a/kernel/src/arch/ia64/ski/salemu.cc
+++ /dev/null
@@ -1,94 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/ski/salemu.cc
- * Description:   SAL emulation for HP's SKI emulator
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: salemu.cc,v 1.3 2003/09/24 19:05:29 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(sal.h)
-
-extern "C" long
-sal_emulator (long index, unsigned long in1, unsigned long in2,
-	      unsigned long in3, unsigned long in4, unsigned long in5,
-	      unsigned long in6, unsigned long in7)
-{
-    register long r9 asm ("r9") = 0;
-    register long r10 asm ("r10") = 0;
-    register long r11 asm ("r11") = 0;
-    long status;
-
-    /*
-     * Don't do a "switch" here since that gives us code that
-     * isn't self-relocatable.
-     */
-    status = 0;
-    if (index == SAL_FREQ_BASE) {
-	switch (in1) {
-	case sal_freq_base_t::platform:
-	    r9 = 200000000;
-	    break;
-
-	case sal_freq_base_t::itc:
-	    /*
-	     * Is this supposed to be the cr.itc frequency
-	     * or something platform specific?  The SAL
-	     * doc ain't exactly clear on this...
-	     */
-	    r9 = 700000000;
-	    break;
-
-	case sal_freq_base_t::rtc:
-	    r9 = 1;
-	    break;
-	default:
-	    status = -1;
-	    break;
-	}
-    } else if (index == SAL_SET_VECTORS) {
-	;
-    } else if (index == SAL_GET_STATE_INFO) {
-	;
-    } else if (index == SAL_GET_STATE_INFO_SIZE) {
-	;
-    } else if (index == SAL_CLEAR_STATE_INFO) {
-	;
-    } else if (index == SAL_MC_RENDEZ) {
-	;
-    } else if (index == SAL_MC_SET_PARAMS) {
-	;
-    } else if (index == SAL_CACHE_FLUSH) {
-	;
-    } else if (index == SAL_CACHE_INIT) {
-	;
-    } else if (index == SAL_UPDATE_PAL) {
-	;
-    } else {
-	status = -1;
-    }
-    asm volatile ("" :: "r"(r9), "r"(r10), "r"(r11));
-    return status;
-}
diff --git a/kernel/src/arch/ia64/ski/ski.cc b/kernel/src/arch/ia64/ski/ski.cc
deleted file mode 100644
index 177fc7b3..00000000
--- a/kernel/src/arch/ia64/ski/ski.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/ski/ski.cc
- * Description:   Simualtor functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ski.cc,v 1.2 2003/09/24 19:05:29 skoglund Exp $
- *                
- ********************************************************************/
-
-/*
- * Simulator system call.
- */
-word_t ia64_ski_ssc(word_t in0, word_t in1, word_t in2, word_t in3, word_t func)
-{
-    register long r8 asm ("r8");
-
-    asm volatile ("mov r15=%1\n\t"
-		  "break 0x80001"
-		  : "=r"(r8)
-		  : "r"(func), "r"(in0), "r"(in1), "r"(in2), "r"(in3));
-    return r8;
-}
diff --git a/kernel/src/arch/ia64/ski/startup.S b/kernel/src/arch/ia64/ski/startup.S
deleted file mode 100644
index a3f2a1f9..00000000
--- a/kernel/src/arch/ia64/ski/startup.S
+++ /dev/null
@@ -1,85 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/ski/startup.S
- * Description:   Itanium startup code
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: startup.S,v 1.5 2003/09/24 19:05:29 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(asm.h)
-#include INC_ARCH(psr.h)
-
-	.section .init.data
-
-	.globl	_initial_register_stack
-	.globl	_initial_stack
-
-	.align	8192
-_initial_register_stack:
-	.space	8192-16
-_initial_stack:
-	.space	16
-	.text
-
-BEG_PROC(_start)
-
-	movl	r9 = ia64_vector_table
-	;;
-	mov	cr.iva = r9
-	movl	gp = __gp
-	movl	r9 = _initial_register_stack
-	movl	sp = _initial_stack
-	movl	r10 = CONFIG_IA64_PHYSMEM_OFFSET
-	mov	ar.rsc = 0
-	;;
-	dep	r9 = 0, r9, 61, 3	// translate to phys addr
-	dep	sp = 0, sp, 61, 3
-	dep	gp = 0, gp, 61, 3
-	;;
-	sub	r9 = r9, r10
-	sub	sp = sp, r10
-	sub	gp = gp, r10
-	;;
-	mov	ar.bspstore = r9
-	;;
-	loadrs				// invalidate regs
-	;;
-	mov	ar.rsc = 3		// turn rse back on
-	mov	ar.fpsr = 0x3f		// disable fp traps
-	;;
-	alloc	r9 = ar.pfs,0,0,1,0
-	ssm	psr.ic
-	bsw.1
-	;;
-	srlz.i
-
-	br.call.sptk.many rp = init_efi_ski	// returns bootinfo structure
- 	
-	mov	out0 = r8
-	br.call.sptk.many rp = startup_system
-	/* NOTREACHED */
-
-END_PROC(_start)
diff --git a/kernel/src/arch/ia64/subr_asm.S b/kernel/src/arch/ia64/subr_asm.S
deleted file mode 100644
index 114cf1af..00000000
--- a/kernel/src/arch/ia64/subr_asm.S
+++ /dev/null
@@ -1,1053 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/subr_asm.S
- * Description:   Various IA-64 helper functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: subr_asm.S,v 1.15 2003/11/03 16:27:30 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(asm.h)
-#include INC_ARCH(psr.h)
-
-
-/*
- * PSR bits for PAL calls.
- */
-
-#define CLR_BITS_PAL	       (PSR_INT_ENABLE				| \
-				PSR_LOWER_FP_DISABLE			| \
-				PSR_DEBUG_BREAKPOINT			| \
-				PSR_LOWER_PRIV_TRANSFER_TRAP		| \
-				PSR_TAKEN_BRANCH_TRAP			| \
-				PSR_INSTRUCTION_SET			| \
-				PSR_INSTRUCTION_DEBUG_DISABLE		| \
-				PSR_DATA_ACCESS_FAULTS			| \
-				PSR_DATA_DEBUG_FAULTS_DISABLE		| \
-				PSR_SINGLE_STEP_ENABLE			| \
-				PSR_EXCEPTION_DEFERRAL			| \
-				PSR_INSTRUCTION_ACCESS_FAULT_DISABLE)
-
-#define SET_BITS_PAL	       (PSR_REGISTER_BANK_1)
-
-#define CLR_BITS_PAL_PHYS      (CLR_BITS_PAL				| \
-				PSR_DATA_TRANSLATION			| \
-				PSR_REGISTER_STACK_TRANSLATION		| \
-				PSR_INSTRUCTION_TRANSLATION)
-				
-/*
- * PSR bits for EFI calls.
- */
-				
-#define CLR_BITS_EFI	       (PSR_INSTRUCTION_SET			| \
-				PSR_DATA_ACCESS_FAULTS			| \
-				PSR_DATA_DEBUG_FAULTS_DISABLE		| \
-				PSR_SINGLE_STEP_ENABLE			| \
-				PSR_EXCEPTION_DEFERRAL			| \
-				PSR_INSTRUCTION_ACCESS_FAULT_DISABLE)
-
-#define CLR_BITS_EFI_PHYS      (CLR_BITS_EFI				| \
-				PSR_DATA_TRANSLATION			| \
-				PSR_REGISTER_STACK_TRANSLATION		| \
-				PSR_INSTRUCTION_TRANSLATION)
-
-#define SET_BITS_EFI	       (PSR_REGISTER_BANK_1)
-
-
-/*
- * PSR bits for determining addressing mode.
- */
-
-#define PSR_ADDR_MODE_BITS	(PSR_DATA_TRANSLATION			| \
-				 PSR_REGISTER_STACK_TRANSLATION		| \
-				 PSR_INSTRUCTION_TRANSLATION)
-
-/**
- * Switch addressing mode.  Stack pointers, ip and gp are converted so
- * that they are still valid.
- *
- * @param region	Region to switch to.  If region equals 0, also
- *			turn off address translation
- */
-BEG_PROC (ia64_switch_mode)
-	.regstk	1,9,0,0
-
-region		= in0
-saved_pfs	= loc0
-saved_rsc	= loc1
-saved_rnat	= loc2
-new_ip		= loc3
-new_bsp		= loc4
-new_rp		= loc5
-new_psr		= loc6
-mode_bits	= loc7
-phys_offset	= loc8
-
-	mov	new_psr = psr
-	rsm	psr.i | psr.ic
-	mov	saved_rsc = ar.rsc
-	cmp.eq	p6,p7 = 0,region		// determine mode
-	;;
-	mov	ar.rsc = 0
-	flushrs					// spill all dirty regs
-	srlz.i
-	;;
-1:	mov	new_ip  = ip
-	mov	new_bsp = ar.bsp
-	mov	new_rp  = rp
-	mov	saved_rnat = ar.rnat
-	dep	new_psr = -1,new_psr,44,1	// register bank 1
-	movl	mode_bits = PSR_ADDR_MODE_BITS
-	.pred.rel "mutex",p6,p7
-(p6)	movl	phys_offset = -CONFIG_IA64_PHYSMEM_OFFSET
-(p7)	movl	phys_offset = CONFIG_IA64_PHYSMEM_OFFSET
-	;;
-	dep	new_bsp = region,new_bsp,61,3	// relocate bsp
-	dep	new_rp  = region, new_rp,61,3	// relocate rp
-	dep	sp      = region,     sp,61,3	// relocate sp
-	dep	gp      = region,     gp,61,3	// relocate gp
-	dep	new_ip  = region, new_ip,61,3	// relocate ip
-	.pred.rel "mutex",p6,p7
-(p6)	andcm	new_psr = new_psr, mode_bits
-(p7)	or	new_psr = new_psr, mode_bits
-	;;
-	add	new_bsp = phys_offset, new_bsp
-	add	new_rp  = phys_offset, new_rp
-	add	sp      = phys_offset, sp
-	add	gp      = phys_offset, gp
-	add	new_ip  = phys_offset, new_ip
-	;;
-	mov	ar.bspstore = new_bsp
-	mov	rp = new_rp
-	add	new_ip = 2f-1b,new_ip		// calculate rfi return
-	;;
-	mov	ar.rnat = saved_rnat
-	mov	cr.ipsr = new_psr
-	mov	cr.iip = new_ip
-	mov	cr.ifs = r0
-	;;
-	rfi
-	;;	
-2:	mov	ar.rsc = saved_rsc
-	br.ret.sptk.few rp
-
-END_PROC (ia64_switch_mode)
-
-
-/**
- * Switch to physical addressing mode.  Convert stack pointers, ip, and
- * gp to virtual pointers.
- */
-BEG_PROC (ia64_switch_to_phys)
-	alloc	loc0 = ar.pfs,1,9,0,0
-	mov	in0 = 0
-	br.sptk.few ia64_switch_mode
-END_PROC (ia64_switch_to_phys)
-
-
-/**
- * Switch to virtual addressing mode.  Convert stack pointers, ip, and
- * gp to virtual pointers.
- */
-BEG_PROC (ia64_switch_to_virt)
-	alloc	loc0 = ar.pfs,1,9,0,0
-	mov	in0 = 7
-	br.sptk.few ia64_switch_mode
-END_PROC (ia64_switch_to_virt)
-
-
-
-
-/**
- * Changes addressing mode according to new PSR value (passed in through
- * r14).  Relocate stack pointer and register stack pointer according to
- * the new mode.
- *
- * @param new_psr	new value for PSR (in r14)
- *
- * Clobbers:	r15-r21, p6-p7
- * Clears:	psr.i, psr.ic
- */
-BEG_PROC (ia64_set_addressing_mode)
-
-new_psr		= r14
-saved_rsc	= r15	// below r16 in case of bank switching
-region		= r16
-new_bsp		= r17
-new_rp		= r18
-new_ip		= r19
-saved_rnat	= r20
-phys_offset	= r21
-
-	rsm	psr.i | psr.ic
-	mov	saved_rsc = ar.rsc
-	tbit.nz	p6,p7 = new_psr,17		// determine mode
-	;;
-	mov	ar.rsc = 0
-(p6)	mov	region = 7			// virtual addresses
-(p7)	mov	region = 0			// physical addresses
-(p6)	movl	phys_offset = CONFIG_IA64_PHYSMEM_OFFSET
-(p7)	movl	phys_offset = -CONFIG_IA64_PHYSMEM_OFFSET
-	flushrs					// spill all dirty regs
-	srlz.i
-	;;
-1:	mov	new_ip = ip
-	mov	new_bsp = ar.bsp
-	mov	new_rp = rp
-	mov	saved_rnat = ar.rnat
-	;;
-	dep	new_bsp = region,new_bsp,61,3	// relocate bsp
-	dep	new_rp  = region, new_rp,61,3	// relocate rp
-	dep	sp      = region,     sp,61,3	// relocate sp
-	dep	new_ip  = region, new_ip,61,3	// relocate ip
-	;;
-	add	new_bsp = phys_offset, new_bsp
-	add	new_rp  = phys_offset, new_rp
-	add	sp      = phys_offset, sp
-	add	new_ip	= phys_offset, new_ip
-	;;
-	mov	ar.bspstore = new_bsp
-	mov	rp = new_rp
-	add	new_ip = 2f-1b,new_ip		// calculate rfi return
-	;;
-	mov	ar.rnat = saved_rnat
-	mov	cr.ipsr = new_psr
-	mov	cr.iip = new_ip
-	mov	cr.ifs = r0
-	;;
-	rfi
-	;;	
-2:	mov	ar.rsc = saved_rsc
-	br.ret.sptk.few rp
-	
-END_PROC (ia64_set_addressing_mode)
-
-
-/**
- * Switch to physcical mode and invoke the indicated EFI function.
- *
- * @param function	physical address of function pointer
- * @param arg1		1st arg to EFI function
- * @param arg2		2nd arg to EFI function
- * @param arg3		3rd arg to EFI function
- * @param arg4		4th arg to EFI function
- * @param arg5		5th arg to EFI function
- *
- */
-BEG_PROC (call_efi_physical)
-	.regstk	6,5,5,0
-
-saved_pfs	= loc0
-saved_rp	= loc1
-saved_gp	= loc2
-func_ip		= loc3
-func_gp		= loc4
-
-	alloc	saved_pfs = ar.pfs,6,5,5,0
-	mov	saved_rp = rp
-	mov	saved_gp = gp
-	;;
-	br.call.sptk.few rp = ia64_switch_to_phys
-
-	ld8	func_ip = [in0], 8 ;;
-	ld8	func_gp = [in0]
-	;;
-	dep	func_ip = 0,func_ip,61,3
-	dep	func_gp = 0,func_gp,61,3
-	;;
-	mov	b6 = func_ip
-	mov	gp = func_gp
-	mov	out0 = in1
-	mov	out1 = in2
-	mov	out2 = in3
-	mov	out3 = in4
-	mov	out4 = in5
-
-	br.call.sptk.many rp = b6
-	;;
-	br.call.sptk.few rp = ia64_switch_to_virt
-
-	mov	gp = saved_gp
-	mov	rp = saved_rp
-	mov	ar.pfs = saved_pfs
-	;;
-	br.ret.sptk.many rp
-
-END_PROC (call_efi_physical)
-
-
-/**
- * Invoke the indicated EFI function.  Needed because kernel is
- * compiled -mno-pic and can therefore not handle function pointers
- * properly.
- *
- * @param function	virtual address of function pointer
- * @param arg1		1st arg to EFI function
- * @param arg2		2nd arg to EFI function
- * @param arg3		3rd arg to EFI function
- * @param arg4		4th arg to EFI function
- * @param arg5		5th arg to EFI function
- *
- */
-BEG_PROC (call_efi)
-	.regstk 6,3,5,0
-
-saved_pfs	= loc0
-saved_gp	= loc1
-saved_rp	= loc2
-
-	alloc	saved_pfs = ar.pfs,6,3,5,0
-	mov	saved_gp = gp
-	mov	saved_rp = rp
-	ld8	r14 = [in0], 8		// EFI function entry point	
-	;;
-	mov	out0 = in1
-	mov	out1 = in2
-	mov	out2 = in3
-	mov	out3 = in4
-	mov	out4 = in5
-	mov	b6 = r14
-	ld8	gp = [in0]		// EFI function's global pointer
-	;;
-	br.call.sptk.many rp = b6
-	mov	rp = saved_rp
-	mov	ar.pfs = saved_pfs
-	;;
-	br.ret.sptk.many rp
-
-END_PROC (call_efi)
-
-
-/**
- * Makes a static PAL call in virtual mode.  Return four words (in
- * ret0-ret3) as specified by the IA-64 Software Developer's Manual.
- *
- * @param idx		index of PAL procedure
- * @param a1		1st argument to PAL
- * @param a2		2nd argument to PAL
- * @param a3		3rd argument to PAL
- *
- */
-BEG_PROC (call_pal_static)
-	.regstk 4,6,0,0	
-
-saved_pfs	= loc0
-saved_rp	= loc1
-saved_psr	= loc2
-entry		= loc3
-return_ip	= loc4
-phys_offset	= loc5
-
-	{
-1:	alloc	saved_pfs = ar.pfs,4,6,0,0	
-	mov	return_ip = ip
-	mov	saved_rp = rp
-	}
-	movl	entry = @gprel(ia64_pal_entry)
-	mov	saved_psr = psr
-	movl	phys_offset = CONFIG_IA64_PHYSMEM_OFFSET
-	;;
-	add	entry = entry,gp
-	mov	r28 = in0		// procedure number
-	;;
-	ld8	entry = [entry]		// get entry point
-	mov	r29 = in1
-	mov	r30 = in2
-	mov	r31 = in3
-	;;
-	dep	entry = -1,entry,61,3	// relocate to virtual address
-	add	return_ip = 2f-1b,return_ip // calculate return address
-	;;
-	add	entry = phys_offset, entry
-	;;
-	mov	b6 = entry
-	mov	b0 = return_ip
-	rsm	psr.i			// disble interrupts
-	;;
-	br.cond.sptk b6			// call PAL
-2:	mov	psr.l = saved_psr
-	mov	rp = saved_rp
-	mov	ar.pfs = saved_pfs
-	bsw.1
-	;;
-	srlz.d
-	br.ret.sptk rp
-
-END_PROC (call_pal_static)
-
-
-/**
- * Makes a static PAL call in physical mode.  Return four words (in
- * ret0-ret3) as specified by the IA-64 Software Developer's Manual.
- *
- * @param idx		index of PAL procedure
- * @param a1		1st argument to PAL
- * @param a2		2nd argument to PAL
- * @param a3		3rd argument to PAL
- *
- */
-BEG_PROC (call_pal_static_phys)
-	.regstk 4,6,0,0	
-
-saved_pfs	= loc0
-saved_rp	= loc1
-saved_psr	= loc2
-entry		= loc3
-return_ip	= loc4
-phys_offset	= loc5
-
-	alloc	saved_pfs = ar.pfs,4,6,0,0	
-	mov	return_ip = ip
-	mov	saved_rp = rp
-
-	movl	entry = @gprel(ia64_pal_entry)
-	mov	saved_psr = psr
-	movl	phys_offset = CONFIG_IA64_PHYSMEM_OFFSET
-	;;
-	add	entry = entry,gp
-	mov	r28 = in0		// procedure number
-	;;
-	ld8	entry = [entry]		// get entry point
-	mov	r29 = in1
-	mov	r30 = in2
-	mov	r31 = in3
-	br.call.sptk rp = ia64_switch_to_phys
-	;;
-1:	mov	return_ip = ip
-	;;
-	add	return_ip = 2f-1b,return_ip // calculate return address
-	;;
-	mov	b6 = entry
-	mov	b0 = return_ip
-	rsm	psr.i			// disble interrupts
-	;;
-	br.cond.sptk b6			// call PAL
-	;;
-2:	br.call.sptk.few rp = ia64_switch_to_virt
-	;;
-	mov	psr.l = saved_psr
-	mov	rp = saved_rp
-	mov	ar.pfs = saved_pfs
-	bsw.1
-	;;
-	srlz.d
-	br.ret.sptk rp
-
-END_PROC (call_pal_static_phys)
-
-
-/**
- * Makes a stacked PAL call in virtual mode.  Return four words (in
- * ret0-ret3) as specified by the IA-64 Software Developer's Manual.
- *
- * @param idx		index of PAL procedure
- * @param a1		1st argument to PAL
- * @param a2		2nd argument to PAL
- * @param a3		3rd argument to PAL
- *
- */
-BEG_PROC (call_pal_stacked)
-	.regstk 4,5,4,0	
-
-saved_pfs	= loc0
-saved_rp	= loc1
-saved_psr	= loc2
-entry		= loc3
-phys_offset	= loc4
-
-	alloc	saved_pfs = ar.pfs,4,5,4,0	
-	mov	saved_rp = rp
-	mov	saved_psr = psr
-	movl	entry = @gprel(ia64_pal_entry)
-	movl	phys_offset = CONFIG_IA64_PHYSMEM_OFFSET
-	;;
-	add	entry = entry,gp
-	mov	out0 = in0		// procedure number
-	mov	r28 = in0
-	;;
-	ld8	entry = [entry]		// get entry point
-	mov	out1 = in1
-	mov	out2 = in2
-	mov	out3 = in3
-	;;
-	dep	entry = -1,entry,61,3	// relocate to virtual address
-	;;
-	add	entry = phys_offset, entry
-	;;
-	mov	b6 = entry
-	rsm	psr.i			// disble interrupts
-	;;
-	br.call.sptk.many rp = b6	// call PAL
-	mov	psr.l = saved_psr
-	mov	rp = saved_rp
-	mov	ar.pfs = saved_pfs
-	bsw.1
-	;;
-	srlz.d
-	br.ret.sptk rp
-
-END_PROC (call_pal_stacked)
-
-
-/**
- * Makes a stacked PAL call in physical mode.  Return four words (in
- * ret0-ret3) as specified by the IA-64 Software Developer's Manual.
- *
- * @param idx		index of PAL procedure
- * @param a1		1st argument to PAL
- * @param a2		2nd argument to PAL
- * @param a3		3rd argument to PAL
- *
- */
-BEG_PROC (call_pal_stacked_phys)
-	.regstk 4,5,4,0	
-
-saved_pfs	= loc0
-saved_rp	= loc1
-saved_psr	= loc2
-entry		= loc3
-return_ip	= loc4
-
-	alloc	saved_pfs = ar.pfs,4,5,4,0	
-	mov	saved_psr = psr
-	movl	r14 = CLR_BITS_PAL_PHYS
-	mov	saved_rp = rp
-	movl	entry = @gprel(ia64_pal_entry)
-	;;
-	add	entry = entry,gp
-	movl	r15 = SET_BITS_PAL
-	andcm	r14 = saved_psr, r14
-	;;
-	or	r14 = r14, r15
-	ld8	entry = [entry]		// get entry point
-	;;
-	br.call.sptk.many rp = ia64_set_addressing_mode
-	;;
-	mov	r28 = in0		// copy arguments
-	mov	out0 = in0
-	mov	out1 = in1
-	mov	out2 = in2
-	mov	out3 = in3
-	mov	b6 = entry
-	;;
-	br.call.sptk.many rp = b6	// call PAL
-	mov	r14 = saved_psr
-	;;
-	br.call.sptk.many rp = ia64_set_addressing_mode
-	bsw.1
-	;;
-	mov	rp = saved_rp
-	mov	ar.pfs = saved_pfs
-	;;
-	srlz.d
-	br.ret.sptk.many rp
-
-END_PROC (call_pal_stacked_phys)
-
-
-/**
- * Stub invoked when there is contention on a spinlock.
- *
- * r30:		IP of spinlock code
- * r31:		Location of spinlock variable
- * p15, b7:	Scratch registers
- *
- */
-BEG_PROC (ia64_spinlock_contention)
-	mov	b7 = r30
-1:	ld8	r30 = [r31]
-	;;
-	cmp.ne	p15,p0 = r30, r0
-	;;
-(p15)	br.spnt.few 1b	
-	br.sptk.many b7
-END_PROC (ia64_spinlock_contention)
-
-
-/**
- * Acquire spinlock.
- * @param lock		location of spinlock
- */
-BEG_PROC (ia64_acquire_spinlock)
-	alloc	r14 = ar.pfs,1,0,0,0
-	mov	r31 = in0
-1:	mov	r30 = ip
-	mov	r29 = 1
-	mov	ar.ccv = r0
-	;;
-	cmpxchg8.acq r29 = [r31], r29, ar.ccv
-	;;
-	cmp.ne	p15,p0 = r29, r0
-	;;
-(p15)	br.spnt.few ia64_spinlock_contention
-	br.ret.sptk.many b0
-END_PROC (ia64_acquire_spinlock)
-
-
-/**
- * Release spinlock.
- * @param lock		location of spinlock
- */
-BEG_PROC (ia64_release_spinlock)
-	alloc	r14 = ar.pfs,1,0,0,0
-	st8.rel	[in0] = r0
-	;;
-	br.ret.sptk.many b0
-END_PROC (ia64_release_spinlock)
-
-
-/**
- * Spin wheel.
- * @param pos		position of spin wheel
- */
-BEG_PROC (spin_wheel)
-	alloc	loc0 = ar.pfs,1,3,0,0
-	movl	loc1 = (6 << 61) + (0xb8000) + CONFIG_IA64_PHYSMEM_OFFSET
-	;;
-	shladd	loc1 =  in0, 1, loc1
-	;;
-	ld1	loc2 = [loc1]
-	;;
-	cmp.eq	p6,p0 = 0x2d, loc2
-	cmp.eq	p7,p0 = 0x5c, loc2
-	cmp.eq	p8,p0 = 0x7c, loc2
-	mov	loc2 = 0x2d
-	;;
-	.pred.rel "mutex",p6,p7
-	.pred.rel "mutex",p6,p8
-	.pred.rel "mutex",p7,p8
-(p6)	mov	loc2 = 0x5c
-(p7)	mov	loc2 = 0x7c
-(p8)	mov	loc2 = 0x2f
-	;;
-	st1	[loc1] = loc2, 1
-	mov	loc2 = 7
-	;;
-	st1	[loc1] = loc2
-	br.ret.sptk.many rp
-END_PROC (spin_wheel)
-
-
-BEG_PROC (__udivdi3)
-	.regstk 2,0,0,0
-	// Transfer inputs to FP registers.
-	setf.sig f8 = in0
-	setf.sig f9 = in1
-	;;
-	// Convert the inputs to FP, to avoid FP software-assist faults.
-	fcvt.xuf.s1 f8 = f8
-	fcvt.xuf.s1 f9 = f9
-	;;
-	// Compute the reciprocal approximation.
-	frcpa.s1 f10, p6 = f8, f9
-	;;
-	// 3 Newton-Raphson iterations.
-(p6)	fnma.s1 f11 = f9, f10, f1
-(p6)	fmpy.s1 f12 = f8, f10
-	;;
-(p6)	fmpy.s1 f13 = f11, f11
-(p6)	fma.s1 f12 = f11, f12, f12
-	;;
-(p6)	fma.s1 f10 = f11, f10, f10
-(p6)	fma.s1 f11 = f13, f12, f12
-	;;
-(p6)	fma.s1 f10 = f13, f10, f10
-(p6)	fnma.s1 f12 = f9, f11, f8
-	;;
-(p6)	fma.s1 f10 = f12, f10, f11
-	;;
-	// Round quotient to an unsigned integer.
-	fcvt.fxu.trunc.s1 f10 = f10
-	;;
-	// Transfer result to GP registers.
-	getf.sig ret0 = f10
-	br.ret.sptk rp
-	;;
-END_PROC (__udivdi3)
-
-BEG_PROC (__divdi3)
-
-	.regstk 2,0,0,0
-	// Transfer inputs to FP registers.
-	setf.sig f8 = in0
-	setf.sig f9 = in1
-	;;
-	// Convert the inputs to FP, so that they won't be treated as unsigned.
-	fcvt.xf f8 = f8
-	fcvt.xf f9 = f9
-	;;
-	// Compute the reciprocal approximation.
-	frcpa.s1 f10, p6 = f8, f9
-	;;
-	// 3 Newton-Raphson iterations.
-(p6)	fnma.s1 f11 = f9, f10, f1
-(p6)	fmpy.s1 f12 = f8, f10
-	;;
-(p6)	fmpy.s1 f13 = f11, f11
-(p6)	fma.s1 f12 = f11, f12, f12
-	;;
-(p6)	fma.s1 f10 = f11, f10, f10
-(p6)	fma.s1 f11 = f13, f12, f12
-	;;
-(p6)	fma.s1 f10 = f13, f10, f10
-(p6)	fnma.s1 f12 = f9, f11, f8
-	;;
-(p6)	fma.s1 f10 = f12, f10, f11
-	;;
-	// Round quotient to an integer.
-	fcvt.fx.trunc.s1 f10 = f10
-	;;
-	// Transfer result to GP registers.
-	getf.sig ret0 = f10
-	br.ret.sptk rp
-	;;
-
-END_PROC (__divdi3)
-
-
-/**
- * Save upper floating-point registers (f32--f127).
- *
- * @param buf		location to store registers (1536 bytes)
- */
-BEG_PROC (ia64_save_highfp)
-
-	.regstk 1,0,0,0
-
-ptr0	= in0
-ptr1	= r14
-
-	add	ptr1 = 16, in0
-	;;
-	stf.spill [ptr0] = f32, 32
-	stf.spill [ptr1] = f33, 32
-	;; 
-	stf.spill [ptr0] = f34, 32
-	stf.spill [ptr1] = f35, 32
-	;; 
-	stf.spill [ptr0] = f36, 32
-	stf.spill [ptr1] = f37, 32
-	;;
-	stf.spill [ptr0] = f38, 32
-	stf.spill [ptr1] = f39, 32
-	;;
-	stf.spill [ptr0] = f40, 32
-	stf.spill [ptr1] = f41, 32
-	;;
-	stf.spill [ptr0] = f42, 32
-	stf.spill [ptr1] = f43, 32
-	;; 
-	stf.spill [ptr0] = f44, 32
-	stf.spill [ptr1] = f45, 32
-	;; 
-	stf.spill [ptr0] = f46, 32
-	stf.spill [ptr1] = f47, 32
-	;; 
-	stf.spill [ptr0] = f48, 32
-	stf.spill [ptr1] = f49, 32
-	;; 
-	stf.spill [ptr0] = f50, 32
-	stf.spill [ptr1] = f51, 32
-	;; 
-	stf.spill [ptr0] = f52, 32
-	stf.spill [ptr1] = f53, 32
-	;; 
-	stf.spill [ptr0] = f54, 32
-	stf.spill [ptr1] = f55, 32
-	;; 
-	stf.spill [ptr0] = f56, 32
-	stf.spill [ptr1] = f57, 32
-	;; 
-	stf.spill [ptr0] = f58, 32
-	stf.spill [ptr1] = f59, 32
-	;; 
-	stf.spill [ptr0] = f60, 32
-	stf.spill [ptr1] = f61, 32
-	;; 
-	stf.spill [ptr0] = f62, 32
-	stf.spill [ptr1] = f63, 32
-	;; 
-	stf.spill [ptr0] = f64, 32
-	stf.spill [ptr1] = f65, 32
-	;; 
-	stf.spill [ptr0] = f66, 32
-	stf.spill [ptr1] = f67, 32
-	;; 
-	stf.spill [ptr0] = f68, 32
-	stf.spill [ptr1] = f69, 32
-	;; 
-	stf.spill [ptr0] = f70, 32
-	stf.spill [ptr1] = f71, 32
-	;; 
-	stf.spill [ptr0] = f72, 32
-	stf.spill [ptr1] = f73, 32
-	;; 
-	stf.spill [ptr0] = f74, 32
-	stf.spill [ptr1] = f75, 32
-	;; 
-	stf.spill [ptr0] = f76, 32
-	stf.spill [ptr1] = f77, 32
-	;; 
-	stf.spill [ptr0] = f78, 32
-	stf.spill [ptr1] = f79, 32
-	;; 
-	stf.spill [ptr0] = f80, 32
-	stf.spill [ptr1] = f81, 32
-	;; 
-	stf.spill [ptr0] = f82, 32
-	stf.spill [ptr1] = f83, 32
-	;; 
-	stf.spill [ptr0] = f84, 32
-	stf.spill [ptr1] = f85, 32
-	;; 
-	stf.spill [ptr0] = f86, 32
-	stf.spill [ptr1] = f87, 32
-	;; 
-	stf.spill [ptr0] = f88, 32
-	stf.spill [ptr1] = f89, 32
-	;; 
-	stf.spill [ptr0] = f90, 32
-	stf.spill [ptr1] = f91, 32
-	;; 
-	stf.spill [ptr0] = f92, 32
-	stf.spill [ptr1] = f93, 32
-	;; 
-	stf.spill [ptr0] = f94, 32
-	stf.spill [ptr1] = f95, 32
-	;; 
-	stf.spill [ptr0] = f96, 32
-	stf.spill [ptr1] = f97, 32
-	;; 
-	stf.spill [ptr0] = f98, 32
-	stf.spill [ptr1] = f99, 32
-	;; 
-	stf.spill [ptr0] = f100, 32
-	stf.spill [ptr1] = f101, 32
-	;; 
-	stf.spill [ptr0] = f102, 32
-	stf.spill [ptr1] = f103, 32
-	;; 
-	stf.spill [ptr0] = f104, 32
-	stf.spill [ptr1] = f105, 32
-	;; 
-	stf.spill [ptr0] = f106, 32
-	stf.spill [ptr1] = f107, 32
-	;; 
-	stf.spill [ptr0] = f108, 32
-	stf.spill [ptr1] = f109, 32
-	;; 
-	stf.spill [ptr0] = f110, 32
-	stf.spill [ptr1] = f111, 32
-	;; 
-	stf.spill [ptr0] = f112, 32
-	stf.spill [ptr1] = f113, 32
-	;; 
-	stf.spill [ptr0] = f114, 32
-	stf.spill [ptr1] = f115, 32
-	;; 
-	stf.spill [ptr0] = f116, 32
-	stf.spill [ptr1] = f117, 32
-	;; 
-	stf.spill [ptr0] = f118, 32
-	stf.spill [ptr1] = f119, 32
-	;; 
-	stf.spill [ptr0] = f120, 32
-	stf.spill [ptr1] = f121, 32
-	;; 
-	stf.spill [ptr0] = f122, 32
-	stf.spill [ptr1] = f123, 32
-	;; 
-	stf.spill [ptr0] = f124, 32
-	stf.spill [ptr1] = f125, 32
-	;; 
-	stf.spill [ptr0] = f126
-	stf.spill [ptr1] = f127
-	;; 
-	br.ret.sptk.few rp
-
-END_PROC (ia64_save_highfp)
-
-
-/**
- * Restore upper floating-point registers (f32--f127).
- *
- * @param buf		location where registers are stored (1536 bytes)
- */
-BEG_PROC (ia64_restore_highfp)
-	
-	.regstk 1,0,0,0
-
-ptr0	= in0
-ptr1	= r14
-
-	add	ptr1 = 16, in0
-	;;
-	ldf.fill f32 = [ptr0], 32
-	ldf.fill f33 = [ptr1], 32
-	;; 
-	ldf.fill f34 = [ptr0], 32
-	ldf.fill f35 = [ptr1], 32
-	;; 
-	ldf.fill f36 = [ptr0], 32
-	ldf.fill f37 = [ptr1], 32
-	;; 
-	ldf.fill f38 = [ptr0], 32
-	ldf.fill f39 = [ptr1], 32
-	;; 
-	ldf.fill f40 = [ptr0], 32
-	ldf.fill f41 = [ptr1], 32
-	;; 
-	ldf.fill f42 = [ptr0], 32
-	ldf.fill f43 = [ptr1], 32
-	;; 
-	ldf.fill f44 = [ptr0], 32
-	ldf.fill f45 = [ptr1], 32
-	;; 
-	ldf.fill f46 = [ptr0], 32
-	ldf.fill f47 = [ptr1], 32
-	;; 
-	ldf.fill f48 = [ptr0], 32
-	ldf.fill f49 = [ptr1], 32
-	;; 
-	ldf.fill f50 = [ptr0], 32
-	ldf.fill f51 = [ptr1], 32
-	;; 
-	ldf.fill f52 = [ptr0], 32
-	ldf.fill f53 = [ptr1], 32
-	;; 
-	ldf.fill f54 = [ptr0], 32
-	ldf.fill f55 = [ptr1], 32
-	;; 
-	ldf.fill f56 = [ptr0], 32
-	ldf.fill f57 = [ptr1], 32
-	;; 
-	ldf.fill f58 = [ptr0], 32
-	ldf.fill f59 = [ptr1], 32
-	;; 
-	ldf.fill f60 = [ptr0], 32
-	ldf.fill f61 = [ptr1], 32
-	;; 
-	ldf.fill f62 = [ptr0], 32
-	ldf.fill f63 = [ptr1], 32
-	;; 
-	ldf.fill f64 = [ptr0], 32
-	ldf.fill f65 = [ptr1], 32
-	;; 
-	ldf.fill f66 = [ptr0], 32
-	ldf.fill f67 = [ptr1], 32
-	;; 
-	ldf.fill f68 = [ptr0], 32
-	ldf.fill f69 = [ptr1], 32
-	;; 
-	ldf.fill f70 = [ptr0], 32
-	ldf.fill f71 = [ptr1], 32
-	;; 
-	ldf.fill f72 = [ptr0], 32
-	ldf.fill f73 = [ptr1], 32
-	;; 
-	ldf.fill f74 = [ptr0], 32
-	ldf.fill f75 = [ptr1], 32
-	;; 
-	ldf.fill f76 = [ptr0], 32
-	ldf.fill f77 = [ptr1], 32
-	;; 
-	ldf.fill f78 = [ptr0], 32
-	ldf.fill f79 = [ptr1], 32
-	;; 
-	ldf.fill f80 = [ptr0], 32
-	ldf.fill f81 = [ptr1], 32
-	;; 
-	ldf.fill f82 = [ptr0], 32
-	ldf.fill f83 = [ptr1], 32
-	;; 
-	ldf.fill f84 = [ptr0], 32
-	ldf.fill f85 = [ptr1], 32
-	;; 
-	ldf.fill f86 = [ptr0], 32
-	ldf.fill f87 = [ptr1], 32
-	;; 
-	ldf.fill f88 = [ptr0], 32
-	ldf.fill f89 = [ptr1], 32
-	;; 
-	ldf.fill f90 = [ptr0], 32
-	ldf.fill f91 = [ptr1], 32
-	;; 
-	ldf.fill f92 = [ptr0], 32
-	ldf.fill f93 = [ptr1], 32
-	;; 
-	ldf.fill f94 = [ptr0], 32
-	ldf.fill f95 = [ptr1], 32
-	;; 
-	ldf.fill f96 = [ptr0], 32
-	ldf.fill f97 = [ptr1], 32
-	;; 
-	ldf.fill f98 = [ptr0], 32
-	ldf.fill f99 = [ptr1], 32
-	;; 
-	ldf.fill f100 = [ptr0], 32
-	ldf.fill f101 = [ptr1], 32
-	;; 
-	ldf.fill f102 = [ptr0], 32
-	ldf.fill f103 = [ptr1], 32
-	;; 
-	ldf.fill f104 = [ptr0], 32
-	ldf.fill f105 = [ptr1], 32
-	;; 
-	ldf.fill f106 = [ptr0], 32
-	ldf.fill f107 = [ptr1], 32
-	;; 
-	ldf.fill f108 = [ptr0], 32
-	ldf.fill f109 = [ptr1], 32
-	;; 
-	ldf.fill f110 = [ptr0], 32
-	ldf.fill f111 = [ptr1], 32
-	;; 
-	ldf.fill f112 = [ptr0], 32
-	ldf.fill f113 = [ptr1], 32
-	;; 
-	ldf.fill f114 = [ptr0], 32
-	ldf.fill f115 = [ptr1], 32
-	;; 
-	ldf.fill f116 = [ptr0], 32
-	ldf.fill f117 = [ptr1], 32
-	;; 
-	ldf.fill f118 = [ptr0], 32
-	ldf.fill f119 = [ptr1], 32
-	;; 
-	ldf.fill f120 = [ptr0], 32
-	ldf.fill f121 = [ptr1], 32
-	;; 
-	ldf.fill f122 = [ptr0], 32
-	ldf.fill f123 = [ptr1], 32
-	;; 
-	ldf.fill f124 = [ptr0], 32
-	ldf.fill f125 = [ptr1], 32
-	;; 
-	ldf.fill f126 = [ptr0]
-	ldf.fill f127 = [ptr1]
-	;; 
-	br.ret.sptk.few rp
-
-END_PROC (ia64_restore_highfp)
diff --git a/kernel/src/arch/ia64/subr_init.cc b/kernel/src/arch/ia64/subr_init.cc
deleted file mode 100644
index 35407278..00000000
--- a/kernel/src/arch/ia64/subr_init.cc
+++ /dev/null
@@ -1,113 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/subr_init.cc
- * Description:   Various helper function for initialization
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: subr_init.cc,v 1.6 2003/09/30 17:23:59 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(psr.h)
-#include INC_ARCH(pal.h)
-#include INC_ARCH(ia64.h)
-
-
-/**
- * Switch to physical mode, print string to console and enter infinite
- * loop.  Used for printing diagnostic messages if something goes
- * wrong before system is fully initialized.
- * 
- * @param str	String to print onto console
- */
-void SECTION (".init")
-ipanic (const char * str)
-{
-    psr_t psr = get_psr ();
-
-    if (psr.it)
-	ia64_switch_to_phys ();
-
-    char * screen = (char *) ((1UL << 63) + 0xb8000);
-    word_t cursor = 0;
-
-    // Clear screen
-    for (word_t i = 0; i < 24*160; i += 2)
-    {
-	screen[i] = ' ';
-	screen[i+1] = 7;
-    }
-
-    // Output string
-    for (char * s = (char *) (psr.it ? virt_to_phys (str) : str); *s; s++)
-    {
-	switch (*s)
-	{
-	case '\r':
-	    cursor -= (cursor % 160);
-	    break;
-	case '\n':
-	    cursor += (160 - (cursor % 160));
-	    break;
-	case '\t':
-	    cursor += (8 - (cursor % 8));
-	    break;
-	case '\b':
-	    cursor -= 2;
-	    break;
-	default:
-	    screen[cursor++] = *s;
-	    screen[cursor++] = 7;
-	}
-    }
-
-    for (;;);
-}
-
-void SECTION (".init")
-purge_complete_tc (void)
-{
-    pal_status_e status;
-    pal_ptce_info_t info;
-
-    if ((status = pal_ptce_info (&info)) != PAL_OK)
-    {
-	printf ("Error: PAL_PTCE_INFO => %d\n", (long) status);
-	return;
-    }
-
-    word_t addr = info.base;
-    for (word_t i = 0; i < info.count1; i++)
-    {
-	for (word_t j = 0; j < info.count2; j++)
-	{
-	    asm volatile ("ptc.e %0" :: "r" (addr));
-	    ia64_srlz_d ();
-	    addr += info.stride1;
-	}
-	addr += info.stride1;
-    }
-}
diff --git a/kernel/src/arch/ia64/sync.h b/kernel/src/arch/ia64/sync.h
deleted file mode 100644
index c3ae9f0b..00000000
--- a/kernel/src/arch/ia64/sync.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/sync.h
- * Description:   IA64 sychronization primitives
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sync.h,v 1.4 2003/09/25 16:59:57 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__SYNC_H__
-#define __ARCH__IA64__SYNC_H__
-
-#include <debug.h>
-
-class spinlock_t 
-{
-public:
-    void init (word_t val = 0)
-	{ this->_lock= val; }
-    void lock (void);
-    void unlock (void);
-    
-public: // to allow initializers
-    volatile word_t _lock;
-};
-
-#define DECLARE_SPINLOCK(name) extern spinlock_t name;
-#define DEFINE_SPINLOCK(name) spinlock_t name = {_lock: 0}
-
-DECLARE_SPINLOCK(printf_spin_lock);
-
-INLINE void spinlock_t::lock (void)
-{
-#if 0
-    if (this != (&printf_spin_lock) && _lock)
-	printf ("spinlock %p locked\n", this);
-#endif
-    volatile register word_t * lock_addr asm ("r31") = &this->_lock;
-
-    __asm__ __volatile__ (
-	"1:	mov	r30 = 1					\n"
-	"	mov	ar.ccv = r0				\n"
-	"	;;						\n"
-	"	cmpxchg8.acq r30 = [%0], r30, ar.ccv		\n"
-	"	;;						\n"
-	"	cmp.ne	p15,p0 = r30, r0			\n"
-	"	;;						\n"
-	"(p15)	movl	r30 = 1b				\n"
-	"(p15)	br.spnt.few ia64_spinlock_contention		\n"
-	:
-	: "r" (lock_addr)
-	: "ar.ccv", "p15", "b7", "r30", "memory");
-}
-
-INLINE void spinlock_t::unlock (void)
-{
-    __asm__ __volatile__ (
-	"	st8.rel	[%0] = r0				\n"
-	"	;;						\n"
-	:
-	: "r" (&this->_lock));
-}
-
-
-#endif /* !__ARCH__IA64__SYNC_H__ */
diff --git a/kernel/src/arch/ia64/tlb.h b/kernel/src/arch/ia64/tlb.h
deleted file mode 100644
index b65cd7cd..00000000
--- a/kernel/src/arch/ia64/tlb.h
+++ /dev/null
@@ -1,552 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     arch/ia64/tlb.h
- * Description:   TLB and TR management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tlb.h,v 1.20 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__TLB_H__
-#define __ARCH__IA64__TLB_H__
-
-/**
- * A huge page size supported by the architecture.
- */
-#define HUGE_PGSIZE		(28)
-
-
-/**
- * A translation specifying a mapping to a physical address, including
- * page access rights, memory attributes, etc.  Virtual address, page
- * size, and so on are specified when inserting the translation into
- * the TLB or a translation register.
- */
-class translation_t
-{
-    union {
-	struct {
-	    word_t present		: 1;
-	    word_t __rv1		: 1;
-	    word_t memory_attrib	: 3;
-	    word_t allow_access		: 1;
-	    word_t allow_modification	: 1;
-	    word_t privilege_level	: 2;
-	    word_t access_rights	: 3;
-	    word_t phys_addr		: 38;
-	    word_t __rv2		: 2;
-	    word_t defer_exceptions	: 1;
-	    word_t __ig			: 11;
-	} x;
-	word_t raw;
-    };
-
-public:
-
-    enum memattrib_e {
-	write_back		= 0,
-	write_coalescing	= 6,
-	uncacheable		= 4,
-	uncacheable_exported	= 5,
-	nat_page		= 7
-    };
-
-    enum access_rights_e {
-	ro	= 0,
-	rx	= 1,
-	rw	= 2,
-	rwx	= 3,
-	ro_rw	= 4,
-	rx_rwx	= 5,
-	rwx_rw	= 6,
-	xp_rx	= 7
-    };
-
-    enum type_e {
-	code	= 1,
-	data	= 2,
-	both	= 3
-    };
-
-
-    //
-    // Retrieval
-    //
-
-    /**
-     * @return true if page is present
-     */
-    bool is_present (void)
-	{ return raw & (1 << 0); }
-
-    /**
-     * @return true if page has been accessed
-     */
-    bool is_accessed (void)
-	{ return raw & (1 << 5); }
-
-    /**
-     * set accessed bit for page
-     */
-    void set_accessed (void)
-	{ raw |= (1 << 5); }
-
-    /**
-     * @return true if page has been modified
-     */
-    bool is_dirty (void)
-	{ return raw & (1 << 6); }
-
-    /**
-     * set dirty bit for page
-     */
-    void set_dirty (void)
-	{ raw |= (1 << 6); }
-
-    /**
-     * reset accessed and dirty bit for page
-     */
-    void reset_reference_bits (void)
-	{ raw &= ~((1UL << 5) | (1UL << 6)); }
-
-    /**
-     * @return true if exceptions on page is deferred
-     */
-    bool is_defer_exceptions (void)
-	{ return raw & (1L << 52); }
-
-    /**
-     * @return memory attributes for page
-     */
-    memattrib_e memattrib (void)
-	{ return (memattrib_e) x.memory_attrib; }
-
-    /**
-     * @return privilege level of mapping
-     */
-    word_t privilege_level (void)
-	{ return x.privilege_level; }
-
-    /**
-     * @return access rights for mapping
-     */
-    access_rights_e access_rights (void)
-	{ return (access_rights_e) x.access_rights; }
-
-    /**
-     * @return physical address of mapping
-     */
-    addr_t phys_addr (void)
-	{ return (addr_t) (x.phys_addr << 12); }
-
-    /**
-     * @return raw contents of translation
-     */
-    u64_t get_raw (void)
-	{ return raw; }
-
-
-    //
-    // Modification
-    //
-
-    /**
-     * Set access rights of translation.
-     * @param rights	new access rights
-     */
-    void set_access_rights (access_rights_e rights)
-	{ x.access_rights = rights; }
-
-    /**
-     * Set memory attributes of translation.
-     * @param attr	new memeory attributes
-     */
-    void set_memattrib (memattrib_e attr)
-	{ x.memory_attrib = attr; }
-
-    /**
-     * Make translation writable.
-     * @return true if operation succeeded, false otherwise
-     */
-    bool set_writable (void)
-	{
-	    if ((access_rights_e) x.access_rights == rx_rwx)
-		return false;
-	    x.access_rights |= 2;
-	    return true;
-	}
-
-    /**
-     * Make translation writable.
-     * @return true if operation succeeded, false otherwise
-     */
-    bool set_execable (void)
-	{
-	    if ((access_rights_e) x.access_rights == rwx_rw)
-		return false;
-	    x.access_rights |= 1;
-	    return true;
-	}
-
-    void set_phys_addr(addr_t phys_addr)
-	{
-	    x.phys_addr = (word_t) phys_addr >> 12;
-	}
-
-    void set (bool present,
-	      memattrib_e memattrib,
-	      bool allow_access,
-	      bool allow_modify,
-	      word_t privilege_level,
-	      access_rights_e access_rights,
-	      addr_t phys_addr,
-	      bool defer_exceptions);
-
-
-    //
-    // Creation
-    //
-
-    /**
-     * Create new translation with undefined contents.
-     */
-    translation_t (void) {}
-
-    /**
-     * Create new translation with the given raw contents.
-     * @param x		raw contenents of new translation
-     */
-    translation_t (word_t x) { raw = x; }
-
-    translation_t (bool present,
-		   memattrib_e memattrib,
-		   bool allow_access,
-		   bool allow_modify,
-		   word_t privilege_level,
-		   access_rights_e access_rights,
-		   addr_t phys_addr,
-		   bool defer_exeptions);
-
-    //
-    // Translation register access
-    //
-
-    void put_itr (word_t num, addr_t vaddr, word_t page_size, word_t key);
-    void put_dtr (word_t num, addr_t vaddr, word_t page_size, word_t key);
-
-    //
-    // Translation cache access
-    //
-
-    void put_tc (type_e type, addr_t vaddr, word_t page_size, word_t key);
-};
-
-
-/**
- * Create new translation and set initialize it according to input
- * parameters.
- *
- * @param present		is page present or not
- * @param memattrib		memory attribute for mapping
- * @param allow_access		allow accesses on mapped page
- * @param allow_modify		allow modifications on mapped page
- * @param privilege_level	privilege level of mapping
- * @param access_rights		access rights for mapping
- * @param phys_addr		physical address
- * @param defer_exceptions	shoule exception in page be deferred
- */
-INLINE
-translation_t::translation_t (bool present,
-			      memattrib_e memattrib,
-			      bool allow_access,
-			      bool allow_modify,
-			      word_t privilege_level,
-			      access_rights_e access_rights,
-			      addr_t phys_addr,
-			      bool defer_exceptions)
-{
-    raw = 			0;
-    x.present = 		present;
-    x.memory_attrib = 		(word_t) memattrib;
-    x.allow_access =		allow_access;
-    x.allow_modification =	allow_modify;
-    x.privilege_level =		privilege_level;
-    x.access_rights =		(word_t) access_rights;
-    x.phys_addr =		(word_t) phys_addr >> 12;
-    x.defer_exceptions =	defer_exceptions;
-}
-
-
-/**
- * Set translation according to input parameters.
- *
- * @param present		is page present or not
- * @param memattrib		memory attribute for mapping
- * @param allow_access		allow accesses on mapped page
- * @param allow_modify		allow modifications on mapped page
- * @param privilege_level	privilege level of mapping
- * @param access_rights		access rights for mapping
- * @param phys_addr		physical address
- * @param defer_exceptions	shoule exception in page be deferred
- */
-INLINE void
-translation_t::set (bool present,
-		    memattrib_e memattrib,
-		    bool allow_access,
-		    bool allow_modify,
-		    word_t privilege_level,
-		    access_rights_e access_rights,
-		    addr_t phys_addr,
-		    bool defer_exceptions)
-{
-    x.__rv1 = x.__rv2 =		0;
-    x.present = 		present;
-    x.memory_attrib = 		(word_t) memattrib;
-    x.allow_access =		allow_access;
-    x.allow_modification =	allow_modify;
-    x.privilege_level =		privilege_level;
-    x.access_rights =		(word_t) access_rights;
-    x.phys_addr =		(word_t) phys_addr >> 12;
-    x.defer_exceptions =	defer_exceptions;
-}
-
-
-/**
- * Insert a new instruction translation into the inidcated translation
- * register.
- *
- * @param num		registers number
- * @param vaddr		virtual address
- * @param page_size	page size (log2)
- * @param key		protection key
- */
-INLINE void
-translation_t::put_itr (word_t num,
-			addr_t vaddr,
-			word_t page_size,
-			word_t key)
-{
-    __asm__ __volatile__ (
-	"	mov	r14 = psr ;;		\n"
-	"	rsm	psr.ic|psr.i ;;		\n"
-	"	srlz.i ;;			\n"
-	"	mov	cr.ifa = %[vaddr]	\n"
-	"	mov	cr.itir = %[itir]	\n"
-	"	srlz.i ;;			\n"
-	"	itr.i	itr[%[num]] = %[tr] ;;	\n"
-	"	srlz.i ;;			\n"
-	"	mov	psr.l = r14 ;;		\n"
-	"	srlz.i ;;			\n"
-	:
-	:
-	[num]	"r" (num),
-	[tr]	"r" (raw),
-	[vaddr]	"r" (vaddr),
-	[itir]	"r" ((key << 8) + (page_size << 2))
-	:
-	"r14");
-}
-
-
-/**
- * Insert a new data translation into the inidcated translation
- * register.
- *
- * @param num		registers number
- * @param vaddr		virtual address
- * @param page_size	page size (log2)
- * @param key		protection key
- */
-INLINE void
-translation_t::put_dtr (word_t num,
-			addr_t vaddr,
-			word_t page_size,
-			word_t key)
-{
-    __asm__ __volatile__ (
-	"	mov	r14 = psr ;;		\n"
-	"	rsm	psr.ic|psr.i ;;		\n"
-	"	srlz.i ;;			\n"
-	"	mov	cr.ifa = %2		\n"
-	"	mov	cr.itir = %3		\n"
-	"	srlz.i ;;			\n"
-	"	itr.d	dtr[%0] = %1 ;;		\n"
-	"	srlz.d				\n"
-	"	mov	psr.l = r14 ;;		\n"
-	"	srlz.i ;;			\n"
-	:
-	:
-	"r" (num),
-	"r" (raw),
-	"r" (vaddr),
-	"r" ((key << 8) + (page_size << 2))
-	:
-	"r14");
-}
-
-
-/**
- * Insert code and/or data translation into translation cache.
- *
- * @param type		type (code and/or data)
- * @param vaddr		virtual address
- * @param page_size	page size (log2)
- * @param key		protection key
- */
-INLINE void
-translation_t::put_tc (type_e type, addr_t vaddr,
-		       word_t page_size, word_t key)
-{
-    __asm__ __volatile__ (
-	"	mov	pr = %[type], (3 << 6)	\n"
-	"	mov	r14 = psr ;;		\n"
-	"	rsm	psr.ic|psr.i ;;		\n"
-	"	srlz.d ;;			\n"
-	"	mov	cr.ifa = %[vaddr]	\n"
-	"	mov	cr.itir = %[itir]	\n"
-	"	srlz.i ;;			\n"
-	"(p6)	itc.i	%[tr] ;;		\n"
-	"(p7)	itc.d	%[tr] ;;		\n"
-	"	srlz.i ;;			\n"
-	"	mov	psr.l = r14 ;;		\n"
-	"	srlz.d ;;			\n"
-	:
-	:
-	[type]	"r" ((word_t) type << 6),
-	[tr]	"r" (raw),
-	[vaddr]	"r" (vaddr),
-	[itir]	"r" ((key << 8) + (page_size << 2))
-	:
-	"p6", "p7", "r14");
-}
-
-
-/**
- * Purge all instruction translation registers containing a
- * translation overlapping (partly or completely) with the indicated
- * virtual memory region.
- *
- * @param vaddr		virtual address to purge
- * @param page_size	size of region to purge (log2)
- */
-INLINE void purge_itr (addr_t vaddr, word_t page_size)
-{
-    __asm__ __volatile__ (
-	"	ptr.i	%0, %1 ;;		\n"
-	"	srlz.i ;;			\n"
-	:
-	:
-	"r" (vaddr),
-	"r" (page_size << 2));
-}
-
-
-/**
- * Purge all data translation registers containing a translation
- * overlapping (partly or completely) with the indicated virtual
- * memory region.
- *
- * @param vaddr		virtual address to purge
- * @param page_size	size of region to purge (log2)
- */
-INLINE void purge_dtr (addr_t vaddr, word_t page_size)
-{
-    __asm__ __volatile__ (
-	"	ptr.d	%0, %1 ;;		\n"
-	"	srlz.d ;;			\n"
-	:
-	:
-	"r" (vaddr),
-	"r" (page_size << 2));
-}
-
-
-/**
- * Purge all data and instruction translations in the translation
- * cache containing a translation overlapping (partly or completely)
- * with the indicated virtual memory region.
- *
- * @param vaddr		virtual address to purge
- * @param page_size	size of region to purge (log2)
- * @param rid		region id to purge
- */
-INLINE void purge_tc (addr_t vaddr, word_t page_size, word_t rid)
-{
-    __asm__ __volatile__ (
-	"	mov	r14 = rr[%[addr]]		\n"
-	"	;;					\n"
-	"	mov	rr[%[addr]] = %[rid]		\n"
-	"	;;					\n"
-	"	srlz.d					\n"
-	"	;;					\n"
-	"	ptc.g	%[addr], %[pgsize]		\n"
-	"	;;					\n"
-	"	mov	rr[%[addr]] = r14		\n"
-	"	;;					\n"
-	"	srlz.i					\n"
-	"	srlz.d					\n"
-	"	;;					\n"
-	:
-	:
-	[addr]   "r" (vaddr),
-	[pgsize] "r" (page_size << 2),
-	[rid]	 "r" ((rid << 8) + (12 << 2))
-	:
-	"r14");
-}
-
-
-/**
- * Number of virtual address bits implemented by the CPU.  This number
- * is initialized by a PAL_VM_SUMMARY call.
- */
-extern word_t ia64_num_vaddr_bits;
-
-
-/**
- * Round up to nearest valid page size.
- * @param size		size to match against
- * @return size of next page size (log2) which is larger or equal than
- * given size
- */
-INLINE word_t matching_pgsize (word_t size)
-{
-    word_t valid_sizes = (1 << 12) | (1 << 13) | (1 << 14) | (1 << 16) |
-	(1 << 18) | (1 << 20) | (1 << 22) | (1 << 24) | (1 << 28);
-    word_t pgsize = 12;
-
-    for (word_t mask = 1 << 12;
-	 (mask < size) || ! (mask & valid_sizes);
-	 mask <<= 1, pgsize++)
-    {
-	if (pgsize > 28)
-	    return 0;
-    }
-
-    return pgsize;
-}
-
-
-#endif /* !__ARCH__IA64__TLB_H__ */
diff --git a/kernel/src/arch/ia64/trmap.h b/kernel/src/arch/ia64/trmap.h
deleted file mode 100644
index 67bab7fd..00000000
--- a/kernel/src/arch/ia64/trmap.h
+++ /dev/null
@@ -1,220 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  Karlsruhe University
- *                
- * File path:     arch/ia64/trmap.h
- * Description:   Strcutures for keeping track of TR mappings
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: trmap.h,v 1.6 2004/06/04 19:40:05 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__TRMAP_H__
-#define __ARCH__IA64__TRMAP_H__
-
-#include INC_ARCH(tlb.h)
-#include <debug.h>
-
-
-/**
- * A list of all present mappings in kernel TRs.
- *
- * @param is_itr	true if map is for ITRs, false otherwise
- * @param num_trs	number of TRs in map
- */
-template<bool is_itr, word_t num_trs> class tr_map_t
-{
-public:
-    word_t	vaddr[num_trs];
-    word_t	size[num_trs];
-    bool	is_free[num_trs];
-    translation_t tr[num_trs];
-
-    void init (void)
-	{ for (word_t i = 0; i < num_trs; i++) is_free[i] = true; }
-
-    word_t num_entries (void)
-	{ return num_trs; }
-
-    bool match (int i, addr_t addr);
-    bool is_mapped (addr_t addr);
-    int add_map (translation_t tr, addr_t addr,
-		 word_t page_size, word_t key, bool do_map = true);
-    bool free_map (addr_t addr);
-
-    void put (word_t n, word_t key)
-	{
-	    if (is_itr)
-		tr[n].put_itr (n, (addr_t) vaddr[n], size[n], key);
-	    else
-		tr[n].put_dtr (n, (addr_t) vaddr[n], size[n], key);
-	}
-
-    void dump (void);
-};
-
-
-/**
- * Check if indicated TR is mapped at indicated address.
- *
- * @param i		TR index
- * @param addr		virtual address
- *
- * @return true if TR is mapped, false otherwise
- */
-template<bool is_itr, word_t num_trs>
-INLINE bool tr_map_t<is_itr, num_trs>::match (int i, addr_t addr)
-{
-    return (! is_free[i]) &&
-	(vaddr[i] >> size[i]) == ((word_t) addr >> size[i]);
-}
-
-
-/**
- * Query whether given address is already backed by a kernel TR.
- *
- * @param addr		virtual address
- *
- * @return true if address is backed by TR, false otherwise
- */
-template<bool is_itr, word_t num_trs>
-INLINE bool tr_map_t<is_itr, num_trs>::is_mapped (addr_t addr)
-{
-    for (word_t i = 0; i < num_trs; i++)
-	if (match (i, addr))
-	    return true;
-    return false;
-}
-
-
-/**
- * Allocate a new TR and map it.
- *
- * @param tr		translation entry
- * @param addr		virtual address
- * @param page_size	page size of new mapping (log2)
- * @param key		protection key for new mapping
- * @param do_map	whether to add mapping to TR or not
- *
- * @return number of the allocated TR, or -1 if map was full
- */
-template<bool is_itr, word_t num_trs>
-INLINE int tr_map_t<is_itr, num_trs>::add_map (translation_t tr, addr_t addr,
-					       word_t page_size, word_t key,
-					       bool do_map)
-{
-    for (word_t i = 0; i < num_trs; i++)
-    {
-	if (! is_free[i])
-	    continue;
-
-	vaddr[i] = (word_t) addr;
-	size[i] = page_size;
-	is_free[i] = false;
-	this->tr[i] = tr;
-
-	if (do_map)
-	{
-	    if (is_itr)
-		tr.put_itr (i, addr, page_size, key);
-	    else
-		tr.put_dtr (i, addr, page_size, key);
-	}
-
-	return i;
-    }
-
-    return -1;
-}
-
-
-/**
- * Remove indicated mapping from TR map.
- *
- * @param addr		virtual address to free
- *
- * @return true if mapping removed, false otherwise
- */
-template<bool is_itr, word_t num_trs>
-INLINE bool tr_map_t<is_itr, num_trs>::free_map (addr_t addr)
-{
-    for (word_t i = 0; i < num_trs; i++)
-    {
-	if (match(i, addr))
-	{
-	    is_free[i] = true;
-	    if (is_itr)
-		purge_itr (addr, size[i]);
-	    else
-		purge_dtr (addr, size[i]);
-	    return true;
-	}
-    }
-    return false;
-}
-
-
-/**
- * Dump TR map.
- */
-template<bool is_itr, word_t num_trs>
-INLINE void tr_map_t<is_itr, num_trs>::dump (void)
-{
-    for (word_t i = 0; i < num_trs; i++)
-    {
-	if (is_free[i])
-	    printf ("  %ctr[%d]%s (free)\n",
-		    is_itr ? 'i' : 'd', i, i < 10 ? " " : "");
-	else
-	{
-	    word_t sz = size[i];
-	    char xB;
-
-	    if (sz >= 30)	sz = (1UL << (sz-30)), xB = 'G';
-	    else if (sz >= 20)	sz = (1UL << (sz-20)), xB = 'M';
-	    else		sz = (1UL << (sz-10)), xB = 'K';
-
-	    printf ("  %ctr[%d]%s vaddr=%p  paddr=%p  size=%d%cB\n",
-		    is_itr ? 'i' : 'd', i, i < 10 ? " " : "",
-		    vaddr[i], tr[i].phys_addr (), sz, xB);
-	}
-    }
-}
-
-
-typedef tr_map_t<true, 8>	itr_map_t;
-typedef tr_map_t<false, 16>	dtr_map_t;
-
-
-/**
- * Mappings for instruction translation registers.
- */
-extern itr_map_t itrmap;
-
-/**
- * Mappings for data translation registers.
- */
-extern dtr_map_t dtrmap;
-
-
-#endif /* !__ARCH__IA64__TRMAP_H__ */
diff --git a/kernel/src/arch/ia64/types.h b/kernel/src/arch/ia64/types.h
deleted file mode 100644
index 84a8a4f4..00000000
--- a/kernel/src/arch/ia64/types.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/ia64/types.h
- * Description:   IA-64 specific types
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.3 2003/09/24 19:04:28 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__IA64__TYPES_H__
-#define __ARCH__IA64__TYPES_H__
-
-#define L4_64BIT
-#undef  L4_32BIT
-
-typedef unsigned int __attribute__ ((__mode__(__DI__))) u64_t;
-typedef unsigned int		u32_t;
-typedef unsigned short		u16_t;
-typedef unsigned char		u8_t;
-
-typedef signed int __attribute__ ((__mode__(__DI__))) s64_t;
-typedef signed int		s32_t;
-typedef signed short		s16_t;
-typedef signed char		s8_t;
-
-
-/**
- * word_t: machine word wide unsigned int
- */
-typedef u64_t			word_t;
-
-
-#endif /* !__ARCH__IA64__TYPES_H__ */
diff --git a/kernel/src/arch/mips32/Makeconf b/kernel/src/arch/mips32/Makeconf
deleted file mode 100644
index 5baa775a..00000000
--- a/kernel/src/arch/mips32/Makeconf
+++ /dev/null
@@ -1,41 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2006,  Karlsruhe University
-##                
-## File path:     arch/mips32/Makeconf
-## Description:   
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf,v 1.1 2006/02/23 21:07:45 ud3 Exp $
-##                
-######################################################################
-
-SOURCES+=	src/arch/mips32/startup.S 
-SOURCES+=	src/arch/mips32/cache.cc 
-SOURCES+=	src/arch/mips32/tlb.cc 
-SOURCES+=	src/arch/mips32/notify.S 
-SOURCES+=	src/arch/mips32/mips_cpu.cc 
-
-
-
-
diff --git a/kernel/src/arch/mips32/asm.h b/kernel/src/arch/mips32/asm.h
deleted file mode 100644
index 1dae2af6..00000000
--- a/kernel/src/arch/mips32/asm.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/asm.h
- * Description:   Common assembly macros for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.1 2006/02/23 21:07:39 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__ASM_H__
-#define __ARCH__MIPS32__ASM_H__
-
-#define BEGIN_PROC(name)			\
-    .global name;				\
-    .align 3;					\
-    .ent name;					\
-name:
-
-#define END_PROC(name)				\
-    .end name
-
-/*
- * EXPORT - export definition of symbol
- */
-#define EXPORT(symbol)				\
-    .globl  symbol;				\
-symbol:
-
-#endif /* !__ARCH__MIPS32__ASM_H__ */
diff --git a/kernel/src/arch/mips32/cache.cc b/kernel/src/arch/mips32/cache.cc
deleted file mode 100644
index 9b2a9bcd..00000000
--- a/kernel/src/arch/mips32/cache.cc
+++ /dev/null
@@ -1,178 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/cache.cc
- * Description:   Cache controller implementation for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cache.cc,v 1.1 2006/02/23 21:07:45 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(cache.h)
-#include INC_ARCH(cp0regs.h)
-#include INC_ARCH(mips_cpu.h)
-
-#include INC_GLUE(config.h)
-
-#include <debug.h>
-
-static word_t icache_ls;
-static word_t dcache_ls;
-static word_t dcache_size;
-static word_t icache_size;
-
-#warning The cache functionality has never been tested as Simics/Mips does not implement caches as of yet
-
-
-static void init_dcache() {
-    unsigned long start = KSEG0_BASE;
-    unsigned long end = (start + dcache_size);
-
-    while( start < end ) {
-        __asm__ __volatile__ (
-            "cache  %1, 0(%0)"
-            : : "r" (start), "i" (Index_Invalidate_I)
-            );
-        start += dcache_ls;
-    }
-}
-
-
-static void init_icache() {
-
-    unsigned long start = KSEG0_BASE;
-    unsigned long end = (start + icache_size);
-
-    while( start < end ) {
-        __asm__ __volatile__ (
-            "cache  %1, 0(%0)"
-            : : "r" (start), "i" (Index_Invalidate_D)
-            );
-        start += icache_ls;
-    }
-}
-
-
-void init_cache() {
-
-    word_t icache_spw;
-    word_t dcache_spw;
-
-    word_t icache_assoc;
-    word_t dcache_assoc;	
-
-    // get cache line size
-    switch( get_mips_cpu()->get_icache_ls() ) {
-    case mips_cpu_t::size_16_bytes:
-        icache_ls = 16;
-        break;
-    default:
-        ASSERT( !"init_cache: Cound not determine cache line size" );
-        break;
-    }
-    switch( get_mips_cpu()->get_dcache_ls() ) {
-    case mips_cpu_t::size_16_bytes:
-        dcache_ls = 16;
-        break;
-    default:
-        ASSERT( !"init_cache: Cound not determine cache line size" );
-        break;
-    }
-	  
-    // get cache sets per way
-    switch( get_mips_cpu()->get_icache_spw() ) {
-    case mips_cpu_t::spw_64:
-        icache_spw = 64;
-        break;
-    case mips_cpu_t::spw_128:
-        icache_spw = 128;
-        break;
-    case mips_cpu_t::spw_256:
-        icache_spw = 256;
-        break;
-    default:
-        ASSERT( !"init_cache: Cound not determine number of sets per way" );
-        break;
-    }
-    switch( get_mips_cpu()->get_dcache_spw() ) {
-    case mips_cpu_t::spw_64:
-        dcache_spw = 64;
-        break;
-    case mips_cpu_t::spw_128:
-        dcache_spw = 128;
-        break;
-    case mips_cpu_t::spw_256:
-        dcache_spw = 256;
-        break;
-    default:
-        ASSERT( !"init_cache: Cound not determine number of sets per way" );
-        break;
-    }
-
-    // get cache assocciativity
-    switch( get_mips_cpu()->get_icache_assoc() ) {
-    case mips_cpu_t::assoc_dm:
-        icache_assoc = 1;		
-        break;
-    case mips_cpu_t::assoc_2_way:
-        icache_assoc = 2;		
-        break;
-    case mips_cpu_t::assoc_3_way:
-        icache_assoc = 3;		
-        break;
-    case mips_cpu_t::assoc_4_way:
-        icache_assoc = 4;		
-        break;
-    default:
-        ASSERT( !"init_cache: Cound not determine cache assoc" );
-        break;
-    }
-    switch( get_mips_cpu()->get_dcache_assoc() ) {
-    case mips_cpu_t::assoc_dm:
-        dcache_assoc = 1;		
-        break;
-    case mips_cpu_t::assoc_2_way:
-        dcache_assoc = 2;		
-        break;
-    case mips_cpu_t::assoc_3_way:
-        dcache_assoc = 3;		
-        break;
-    case mips_cpu_t::assoc_4_way:
-        dcache_assoc = 4;		
-        break;
-    default:
-        ASSERT( !"init_cache: Cound not determine cache assoc" );
-        break;
-    }
-
-
-    icache_size = icache_ls * icache_spw * icache_spw;
-    icache_size = dcache_ls * dcache_spw * dcache_spw;
-	
-	
-    /* Important that these inline! */
-    init_dcache();
-    init_icache();
-}
diff --git a/kernel/src/arch/mips32/cache.h b/kernel/src/arch/mips32/cache.h
deleted file mode 100644
index fae0411e..00000000
--- a/kernel/src/arch/mips32/cache.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/cache.h
- * Description:   Cache controller for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cache.h,v 1.1 2006/02/23 21:07:39 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__CACHE_H__
-#define __ARCH__MIPS32__CACHE_H__
-
-/*
- * Cache Operation on MIPS32-4K processors ( see user manual p.129 )
- * Note: ErrCtl[WST,SPR] must be cleared
- */
-
-#define Index_Invalidate_I      0x00 // 000 00
-#define Index_Invalidate_D      0x01 // 000 01
-
-#define Index_LoadTag_I		0x04 // 001 00
-#define Index_LoadTag_D		0x05 // 001 01
-
-#define Index_StoreTag_I	0x08 // 010 00
-#define Index_StoreTag_D	0x09 // 010 01
-
-#define Index_HitInvalidate_I   0x10 // 100 00
-#define Index_HitInvalidate_D   0x11 // 100 01
-
-#define Index_Fill_I		0x14 // 101 00
-
-#define Index_FetchAndLook_I	0x1C // 111 00
-#define Index_FetchAndLook_D	0x1D // 111 01
-
-
-void init_cache();
-
-
-#endif /* !__ARCH__MIPS32__CACHE_H__ */
diff --git a/kernel/src/arch/mips32/cp0regs.h b/kernel/src/arch/mips32/cp0regs.h
deleted file mode 100644
index f2f98de5..00000000
--- a/kernel/src/arch/mips32/cp0regs.h
+++ /dev/null
@@ -1,257 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/cp0regs.h
- * Description:   MIPS32 CP0 macros
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cp0regs.h,v 1.1 2006/02/23 21:07:39 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__CP0REGS_H__
-#define __ARCH__MIPS32__CP0REGS_H__
-
-/*
- * Coprocessor 0 register names
- */
-#define CP0_INDEX       $0
-#define CP0_RANDOM      $1
-#define CP0_ENTRYLO0    $2
-#define CP0_ENTRYLO1    $3
-#define CP0_CONF        $3
-#define CP0_CONTEXT     $4
-#define CP0_PAGEMASK    $5
-#define CP0_WIRED       $6
-#define CP0_INFO        $7
-#define CP0_BADVADDR    $8
-#define CP0_COUNT       $9
-#define CP0_ENTRYHI     $10
-#define CP0_COMPARE     $11
-#define CP0_STATUS      $12
-#define CP0_CAUSE       $13
-#define CP0_EPC         $14
-#define CP0_PRID        $15
-#define CP0_CONFIG      $16
-#define CP0_LLADDR      $17
-#define CP0_WATCHLO     $18
-#define CP0_WATCHHI     $19
-#define CP0_XCONTEXT    $20
-#define CP0_FRAMEMASK   $21
-#define CP0_DIAGNOSTIC  $22
-#define CP0_DEBUG       $23
-#define CP0_DEPC        $24
-#define CP0_PERFORMANCE $25
-#define CP0_ECC         $26
-#define CP0_CACHEERR    $27
-#define CP0_TAGLO       $28
-#define CP0_TAGHI       $29
-#define CP0_ERROREPC    $30
-#define CP0_DESAVE      $31
-
-
-/* Interupt Enable/Cause Bits */
-//#define INT_SW0     (1<<8)
-//#define INT_SW1     (1<<9)
-//#define INT_IRQ0    (1<<10)
-//#define INT_IRQ1    (1<<11)
-//#define INT_IRQ2    (1<<12)
-//#define INT_IRQ3    (1<<13)
-//#define INT_IRQ4    (1<<14)
-//#define INT_IRQ5    (1<<15)
-
-/* Status register bits */
-#define ST_IE		(1<<0)
-#define ST_EXL		(1<<1)
-#define ST_ERL		(1<<2)	
-#define ST_UM		(1<<4)
-#define ST_IM		(0xff<<8)
-#define ST_NMI		(1<<19)
-#define ST_SR		(1<<20)
-#define ST_TS		(1<<21)
-#define ST_BEV		(1<<22)
-#define ST_RE		(1<<25)
-#define ST_R		(1<<26)
-#define ST_RP		(1<<27)
-#define ST_CU		(0xf<<28)
-#define ST_CU0		(0x1<<28)
-#define ST_CU1		(0x2<<28)
-#define ST_CU2		(0x4<<28)
-#define ST_CU3		(0x8<<28)
-#define ST_XX		(0x8<<28)
-
-/* Cause register */
-#define CAUSE_EXCCODE	(31<<2)
-#define CAUSE_EXCCODE_NUM(x)	((x>>2) & 31)
-//#define CAUSE_IP	(255<<8)
-//#define CAUSE_IP0	(1<<8)
-//#define CAUSE_IP1	(1<<9)
-//#define CAUSE_IP2	(1<<10)
-//#define CAUSE_IP3	(1<<11)
-//#define CAUSE_IP4	(1<<12)
-//#define CAUSE_IP5	(1<<13)
-//#define CAUSE_IP6	(1<<14)
-//#define CAUSE_IP7	(1<<15)
-//#define CAUSE_IV	(1<<23)
-//#define CAUSE_CE	(3<<28)
-//#define CAUSE_CE_NUM(x)	((x>>28) & 3)
-//#define CAUSE_BD	(1<<31)
-
-
-
-
-
-/*
- * The following macros are especially useful for __asm__
- * inline assembler.
- */
-#ifndef __STR
-#define __STR(x) #x
-#endif
-#ifndef STR
-#define STR(x) __STR(x)
-#endif
-
-/*
- *  Configure language
- */
-#ifdef __ASSEMBLY__
-#define _ULCAST_
-#else
-#define _ULCAST_ (unsigned long)
-#endif
-
-/* Read from CP0 register */
-#define read_32bit_cp0_register(reg)	\
-({ unsigned int _rd_data;		\
-        __asm__ __volatile__(		\
-        "mfc0 %0,"STR(reg)		\
-        : "=r" (_rd_data));		\
-        _rd_data;})
-
-
-#define write_32bit_cp0_register(reg,value) \
-        __asm__ __volatile__(		\
-        "mtc0\t%0,"STR(reg)		\
-        : : "r" (value));
-
-/* Interupt Enable/Cause Bits */
-#define INT_SW0     (1<<8)
-#define INT_SW1     (1<<9)
-#define INT_IRQ0    (1<<10)
-#define INT_IRQ1    (1<<11)
-#define INT_IRQ2    (1<<12)
-#define INT_IRQ3    (1<<13)
-#define INT_IRQ4    (1<<14)
-#define INT_IRQ5    (1<<15)
-
-
-/*
- * Macros to access the system control coprocessor
- */
-
-#define __read_32bit_c0_register(source, sel)                           \
-({ int __res;                                                           \
-        if (sel == 0)                                                   \
-                __asm__ __volatile__(                                   \
-                        "mfc0\t%0, " #source "\n\t"                     \
-                        : "=r" (__res));                                \
-        else                                                            \
-                __asm__ __volatile__(                                   \
-                        ".set\tmips32\n\t"                              \
-                        "mfc0\t%0, " #source ", " #sel "\n\t"           \
-                        ".set\tmips0\n\t"                               \
-                        : "=r" (__res));                                \
-        __res;                                                          \
-})
-
-#define __write_32bit_c0_register(register, sel, value)                 \
-do {                                                                    \
-        if (sel == 0)                                                   \
-                __asm__ __volatile__(                                   \
-                        "mtc0\t%z0, " #register "\n\t"                  \
-                        : : "Jr" ((unsigned int)value));                \
-        else                                                            \
-                __asm__ __volatile__(                                   \
-                        ".set\tmips32\n\t"                              \
-                        "mtc0\t%z0, " #register ", " #sel "\n\t"        \
-                        ".set\tmips0"                                   \
-                        : : "Jr" ((unsigned int)value));                \
-} while (0)
-
-
-#define read_c0_index()         __read_32bit_c0_register($0, 0)
-#define write_c0_index(val)     __write_32bit_c0_register($0, 0, val)
-
-#define read_c0_entrylo0()      __read_ulong_c0_register($2, 0)
-#define write_c0_entrylo0(val)  __write_ulong_c0_register($2, 0, val)
-
-#define read_c0_entrylo1()      __read_ulong_c0_register($3, 0)
-#define write_c0_entrylo1(val)  __write_ulong_c0_register($3, 0, val)
-
-#define read_c0_conf()          __read_32bit_c0_register($3, 0)
-#define write_c0_conf(val)      __write_32bit_c0_register($3, 0, val)
-
-#define read_c0_context()       __read_ulong_c0_register($4, 0)
-#define write_c0_context(val)   __write_ulong_c0_register($4, 0, val)
-
-#define read_c0_pagemask()      __read_32bit_c0_register($5, 0)
-#define write_c0_pagemask(val)  __write_32bit_c0_register($5, 0, val)
-
-#define read_c0_wired()         __read_32bit_c0_register($6, 0)
-#define write_c0_wired(val)     __write_32bit_c0_register($6, 0, val)
-
-#define read_c0_info()          __read_32bit_c0_register($7, 0)
-
-#define read_c0_cache()         __read_32bit_c0_register($7, 0) /* TX39xx */
-#define write_c0_cache(val)     __write_32bit_c0_register($7, 0, val)
-
-#define read_c0_count()         __read_32bit_c0_register($9, 0)
-#define write_c0_count(val)     __write_32bit_c0_register($9, 0, val)
-
-#define read_c0_entryhi()       __read_ulong_c0_register($10, 0)
-#define write_c0_entryhi(val)   __write_ulong_c0_register($10, 0, val)
-
-#define read_c0_compare()       __read_32bit_c0_register($11, 0)
-#define write_c0_compare(val)   __write_32bit_c0_register($11, 0, val)
-
-#define read_c0_status()        __read_32bit_c0_register($12, 0)
-#define write_c0_status(val)    __write_32bit_c0_register($12, 0, val)
-
-#define read_c0_cause()         __read_32bit_c0_register($13, 0)
-#define write_c0_cause(val)     __write_32bit_c0_register($13, 0, val)
-
-#define read_c0_epc()           __read_ulong_c0_register($14, 0)
-#define write_c0_epc(val)       __write_ulong_c0_register($14, 0, val)
-
-#define read_c0_prid()          __read_32bit_c0_register($15, 0)
-
-#define read_c0_config()        __read_32bit_c0_register($16, 0)
-#define read_c0_config1()       __read_32bit_c0_register($16, 1)
-
-#define write_c0_config(val)    __write_32bit_c0_register($16, 0, val)
-#define write_c0_config1(val)   __write_32bit_c0_register($16, 1, val)
-
-
-
-#endif /* !__ARCH__MIPS32__CP0REGS_H__ */
diff --git a/kernel/src/arch/mips32/debug.h b/kernel/src/arch/mips32/debug.h
deleted file mode 100644
index 30893262..00000000
--- a/kernel/src/arch/mips32/debug.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/debug.h
- * Description:   Debug definitions for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: debug.h,v 1.1 2006/02/23 21:07:39 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__DEBUG_H__
-#define __ARCH__MIPS32__DEBUG_H__
-
-#include INC_GLUE(syscalls.h)
-
-#define enter_kdebug(x) \
-do { \
-    __asm__ __volatile__ ( \
-		".set	noat		\n\t" \
-		"li	$1, %0			\n\t" \
-		"la	$2, 1f			\n\t" \
-		"break			    \n\t" \
-		".set	at			\n\t" \
-		"	.data		    \n\t" \
-		"1:	.string " #x "  \n\t" \
-		"	.previous	    \n\t" \
-		: : "i" (L4_TRAP_KDEBUG) : "memory", "$1", "$2"	\
-    ); \
-} while (0)
-
-
-INLINE int spin_forever(int pos = 0)  {
-    while(1)
-        ; // XXX
-    return 0;
-}
-
-INLINE void spin(int pos = 0, int cpu = 0) {
-    // XXX
-}
-
-#endif /* !__ARCH__MIPS32__DEBUG_H__ */
diff --git a/kernel/src/arch/mips32/mips_cpu.cc b/kernel/src/arch/mips32/mips_cpu.cc
deleted file mode 100644
index 63f57d15..00000000
--- a/kernel/src/arch/mips32/mips_cpu.cc
+++ /dev/null
@@ -1,310 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/mips_cpu.cc
- * Description:   Basic MIPS32 CPU management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips_cpu.cc,v 1.1 2006/02/23 21:07:45 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(mips_cpu.h)
-#include INC_ARCH(cp0regs.h)
-
-#include <debug.h>
-
-mips_cpu_t mips_cpu;
-
-
-void mips_cpu_t::cli (void) {
-	
-    __asm__ __volatile__ (
-        ".set	push		\n"
-        ".set	reorder		\n"
-        ".set	noat		\n"
-        "mfc0	$1,$12		\n"
-        "ori	$1,1		\n"
-        "xori	$1,1		\n"
-        ".set	noreorder	\n"
-        "mtc0	$1,$12		\n"
-        "sll	$0, $0, 1;	# nop\n"
-        "sll	$0, $0, 1;	# nop\n"
-        "sll	$0, $0, 1;	# nop\n"
-        ".set	pop;\n\t"
-        ::: "$1", "memory"
-	);
-
-}
-
-
-void mips_cpu_t::restore_mask (unsigned int mask) {
-	
-    word_t temp = ~(0x00ff00ul);
-    __asm__ __volatile__ (
-        ".set	push		\n"
-        ".set	reorder		\n"
-        ".set	noat		\n"
-        "mfc0	$1,$12		\n"
-        "and	$1, $1, %[temp]		\n"
-        "sll	%0, %0, 8		\n"
-        "or	$1, $1, %0		\n"
-        "mtc0	$1, $12			\n"
-        "sll	$0, $0, 1;	# nop\n"
-        "sll	$0, $0, 1;	# nop\n"
-        "sll	$0, $0, 1;	# nop\n"
-        ".set	pop;\n\t"
-        :: "r" (mask), [temp] "r" (temp) : "$1", "memory"
-        );
-
-}
-
-
-void mips_cpu_t::sti (void) {
-	
-    __asm__ __volatile__ (
-        ".set	push	    \n"
-        ".set	reorder	    \n"
-        ".set	noat	    \n"
-        "mfc0	$1,$12	    \n"
-        "ori	$1,0x01	    \n"
-        "mtc0	$1,$12	    \n"
-        ".set	pop	    \n"
-        ::: "$1"
-	);
-
-}
-
-
-void mips_cpu_t::sleep (void) {
-
-    __asm__ __volatile__ (
-        ".set push		\n\t"
-        ".set noreorder	\n\t"
-        "nop			\n\t"
-        "wait			\n\t"
-        "nop			\n\t"
-        ".set reorder	\n\t"
-        ".set pop		\n\t"
-	);
-}
-
-
-unsigned int mips_cpu_t::save_flags (void) {
-	
-    ASSERT( !"mips_cpu_t::save_flags() not implemented" );
-    return 0;
-	
-#if 0
-    unsigned int temp;
-    
-    __asm__ __volatile__ (
-        ".set\tpush\n\t"
-        ".set\treorder\n\t"
-        "mfc0\t\\temp, $12\n\t"
-        ".set\tpop\n\t"
-        );
-    return temp;
-#endif
-}
-
-void mips_cpu_t::restore_flags (unsigned int flags) {
-
-    ASSERT( !"mips_cpu_t::restore_flags() not implemented" );
-
-#if 0
-    __asm__ __volatile__ (
-    	".set\tnoreorder\n\t"
-    	".set\tnoat\n\t"
-    	"mfc0\t$1, $12\n\t"
-    	"andi\t\\flags, 1\n\t"
-    	"ori\t$1, 1\n\t"
-    	"xori\t$1, 1\n\t"
-    	"or\t\\flags, $1\n\t"
-    	"mtc0\t\\flags, $12\n\t"
-    	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-    	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-    	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-    	".set\tat\n\t"
-    	".set\treorder\n\t"
-        );
-#endif
-}
-
-
-#define __BUILD_SET_CP0(name,register)					                \
-unsigned int mips_cpu_t::set_cp0_##name (unsigned int set)		                \
-{									                \
-    unsigned int res;							                \
-									                \
-    res = read_32bit_cp0_register(register);				                \
-    res |= set;								                \
-    write_32bit_cp0_register(register, res);				                \
-									                \
-    return res;								                \
-}									                \
-									                \
-unsigned int mips_cpu_t::clear_cp0_##name (unsigned int clear)		                \
-{									                \
-    unsigned int res;							                \
-									                \
-    res = read_32bit_cp0_register(register);				                \
-    res &= ~clear;							                \
-    write_32bit_cp0_register(register, res);                                            \
-                                                                                        \
-    return res;										\
-}											\
-											\
-unsigned int mips_cpu_t::change_cp0_##name (unsigned int mask, unsigned int newbits)	\
-{											\
-    unsigned int res;									\
-											\
-    res = read_32bit_cp0_register(register);						\
-    res &= ~mask;									\
-    res |= (mask & newbits);								\
-    write_32bit_cp0_register(register, res);						\
-											\
-    return res;										\
-}
-
-
-__BUILD_SET_CP0(status,CP0_STATUS)
-__BUILD_SET_CP0(cause,CP0_CAUSE)
-__BUILD_SET_CP0(config,CP0_CONFIG)
-
-
-
-void mips_cpu_t::enable_fpu (void) {
-
-    set_cp0_status(ST_CU1);
-    asm("nop;nop;nop;nop"); 
-}
-
-
-void mips_cpu_t::disable_fpu (void) {
-
-    clear_cp0_status(ST_CU1);
-}
-
-
-
-void mips_cpu_t::set_tlb_size( word_t size ) {
-
-    this->tlb_size = size;
-}
-
-
-word_t mips_cpu_t::get_tlb_size() {
-
-    return( this->tlb_size );
-}
-
-
-
-void mips_cpu_t::set_procid( procid_e id ) {
-
-    this->procid = id;
-}
-
-mips_cpu_t::procid_e mips_cpu_t::get_procid() {
-    
-    return( this->procid );
-}
-
-
-
-
-void mips_cpu_t::set_icache_spw( mips_cpu_t::cache_spw_e sets ) {
-
-    this->icache_spw = sets;
-}
-
-
-mips_cpu_t::cache_spw_e mips_cpu_t::get_icache_spw() {
-
-    return( this->icache_spw );
-}
-
-
-void mips_cpu_t::set_dcache_spw( mips_cpu_t::cache_spw_e sets ) {
-
-    this->dcache_spw = sets;
-}
-
-
-mips_cpu_t::cache_spw_e mips_cpu_t::get_dcache_spw() {
-
-    return( this->dcache_spw );
-}
-
-
-
-void mips_cpu_t::set_icache_ls( mips_cpu_t::cache_ls_e size ) {
-
-    this->icache_ls = size;
-}
-
-
-mips_cpu_t::cache_ls_e mips_cpu_t::get_icache_ls() {
-
-    return( this->icache_ls );
-}
-
-
-void mips_cpu_t::set_dcache_ls( mips_cpu_t::cache_ls_e size ) {
-
-    this->dcache_ls = size;
-}
-
-
-mips_cpu_t::cache_ls_e mips_cpu_t::get_dcache_ls() {
-
-    return( this->dcache_ls );
-}
-
-
-
-void mips_cpu_t::set_icache_assoc( mips_cpu_t::cache_assoc_e assoc ) {
-    this->icache_assoc = assoc;
-}
-
-
-mips_cpu_t::cache_assoc_e mips_cpu_t::get_icache_assoc() {
-
-    return( this->icache_assoc );
-}
-
-
-void mips_cpu_t::set_dcache_assoc( mips_cpu_t::cache_assoc_e assoc ) {
-
-    this->dcache_assoc = assoc;
-}
-
-
-mips_cpu_t::cache_assoc_e mips_cpu_t::get_dcache_assoc() {
-
-    return( this->dcache_assoc );
-}
-
-
diff --git a/kernel/src/arch/mips32/mips_cpu.h b/kernel/src/arch/mips32/mips_cpu.h
deleted file mode 100644
index a48eb084..00000000
--- a/kernel/src/arch/mips32/mips_cpu.h
+++ /dev/null
@@ -1,190 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/mips_cpu.h
- * Description:   Basic MIPS32 CPU management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips_cpu.h,v 1.1 2006/02/23 21:07:39 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__MIPS_CPU_H__
-#define __ARCH__MIPS32__MIPS_CPU_H__
-
-#ifdef CONFIG_SMP
-# error "SMP is not supported" 
-#endif
-
-class mips_cpu_t {
-	
-public:
-    void cli (void);
-    void restore_mask (unsigned int mask);
-    void sti (void);
-    void sleep (void);
-    unsigned int save_flags (void);
-    void restore_flags (unsigned int flags);
-
-public:
-    unsigned int set_cp0_status (unsigned int set);
-    unsigned int clear_cp0_status (unsigned int clear);
-    unsigned int change_cp0_status (unsigned int mask, unsigned int newbits);
-    
-    unsigned int set_cp0_cause (unsigned int set);
-    unsigned int clear_cp0_cause (unsigned int clear);
-    unsigned int change_cp0_cause (unsigned int mask, unsigned int newbits);
-    
-    unsigned int set_cp0_config (unsigned int set);
-    unsigned int clear_cp0_config (unsigned int clear);
-    unsigned int change_cp0_config (unsigned int mask, unsigned int newbits);
-
-public:
-    void enable_fpu (void);
-    void disable_fpu (void);
-
-public:
-
-    // -- processor id
-    enum procid_e {
-        mips_unknown = 0x0,
-        mips_4Kc	 = 0x80,
-        mips_4Kp	 = 0x83,
-        mips_4Km	 = 0x83
-    };
-
-    // -- cache associativity
-    enum cache_assoc_e {
-        assoc_dm      = 0x0,
-        assoc_2_way   = 0x1,
-        assoc_3_way   = 0x2,
-        assoc_4_way   = 0x3,
-        assoc_unknown = 0xffff
-    };
-
-    // -- cache line size
-    enum cache_ls_e {
-        size_not_present = 0x0,
-        size_16_bytes    = 0x3,
-        size_unknown     = 0xffff
-    };
-
-    // -- cache sets per way
-    enum cache_spw_e {
-        spw_64	= 0x0,
-        spw_128 = 0x1,
-        spw_256 = 0x2
-    };
-	
-private:
-	
-    word_t tlb_size;
-	
-    procid_e procid;
-	
-    cache_spw_e icache_spw;
-    cache_spw_e dcache_spw;
-	
-    cache_ls_e icache_ls;
-    cache_ls_e dcache_ls;
-	
-    cache_assoc_e icache_assoc;
-    cache_assoc_e dcache_assoc;
-	
-public:
-
-    void set_tlb_size( word_t size );
-    word_t get_tlb_size();
-
-    void set_procid( procid_e id );
-    procid_e get_procid();
-
-    void set_icache_spw( cache_spw_e sets );
-    cache_spw_e get_icache_spw();
-    void set_dcache_spw( cache_spw_e sets );
-    cache_spw_e get_dcache_spw();
-
-    void set_icache_ls( cache_ls_e size );
-    cache_ls_e get_icache_ls();
-    void set_dcache_ls( cache_ls_e size );
-    cache_ls_e get_dcache_ls();
-
-
-    void set_icache_assoc( cache_assoc_e assoc );
-    cache_assoc_e get_icache_assoc();
-    void set_dcache_assoc( cache_assoc_e assoc );
-    cache_assoc_e get_dcache_assoc();
-
-
-};
-
-
-INLINE mips_cpu_t* get_mips_cpu() {
-    extern mips_cpu_t mips_cpu;
-    return( &mips_cpu );
-}
-
-
-/*
- * send the current processor to sleep
- */
-INLINE void processor_sleep() {
-
-#if 1
-
-#warning workaround for wait instruction that does not work on SIMICS
-    extern unsigned timer_interrupt;
-	
-    // enable interrupts
-    __asm__ __volatile__(
-        "mfc0 $8, $12	\n\t"
-        "nop;nop;nop	\n\t"
-        "ori  $8, 1		\n\t"
-        "mtc0 $8, $12   \n\t"
-        ::: "$8"
-	);
-	
-    while(timer_interrupt == 0)
-        ;
-    timer_interrupt = 0;
-	
-    // disable interrupts	
-    __asm__ __volatile__(
-        "mfc0 $8, $12				\n\t"
-        "nop;nop;nop				\n\t"
-        "and  $8, 0xfffffffe		\n\t"
-        "mtc0 $8, $12				\n\t"
-        ::: "$8"
-	);
-
-#else
-
-    get_mips_cpu()->sti();
-    get_mips_cpu()->sleep();
-    get_mips_cpu()->cli();
-    get_mips_cpu()->restore_mask(get_idle_tcb()->arch.int_mask);
-
-#endif
-}
-
-#endif /* !__ARCH__MIPS32__MIPS_CPU_H__ */
diff --git a/kernel/src/arch/mips32/notify.S b/kernel/src/arch/mips32/notify.S
deleted file mode 100644
index f8b7d9a2..00000000
--- a/kernel/src/arch/mips32/notify.S
+++ /dev/null
@@ -1,76 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/notify.S
- * Description:   MIPS32 notify return stubs
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: notify.S,v 1.1 2006/02/23 21:07:45 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_GLUE(context.h)
-/* #include <asmsyms.h> */
-
-#define BEGIN_NOALIGN(name)			\
-    .global name;				\
-    .align 2;					\
-    .ent name;					\
-name:
-
-
-
-/******** s0 is the func, s1 is the arg1, s2 is the arg2. ********/ 
-BEGIN_PROC(mips32_return_from_notify2)
-
-        move    a1, s1
-        /* fall through */
-END_PROC(mips32_return_from_notify2)
-
-
-	
-/******** So s0 is the func, s1 is the arg. ********/ 
-BEGIN_NOALIGN(mips32_return_from_notify1)
-
-        /* fall through */
-END_PROC(mips32_return_from_notify1)
-
-
-	
-/******* s0 is the func. ********/ 
-BEGIN_NOALIGN(mips32_return_from_notify0)
-
-        move    a0, s0	/* assembler will do branch delay */
-        subu	sp, sp, 0x10
-        jal     s8
-        nop
-        addu	sp, sp, 0x10
-        /* XXX: should not return here after switch to user thread ??? */
-
-RESTORE_SWITCH_STACK
-        jr	ra
-        nop
-
-END_PROC(mips32_return_from_notify0)
diff --git a/kernel/src/arch/mips32/pgent.h b/kernel/src/arch/mips32/pgent.h
deleted file mode 100644
index c404858d..00000000
--- a/kernel/src/arch/mips32/pgent.h
+++ /dev/null
@@ -1,268 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/pgent.h
- * Description:   Generic page table manipulation for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pgent.h,v 1.3 2006/11/18 11:04:53 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__PGENT_H__
-#define __ARCH__MIPS32__PGENT_H__
-
-#include <types.h>
-#include <kmemory.h>
-#include <debug.h>
-
-#include INC_GLUE(config.h)
-
-#define NUM_PTAB_ENTRIES 1024 
-
-#define PTAB_SIZE NUM_PTAB_ENTRIES * sizeof( pgent_t )
-
-#define PAGEBITS 12
-
-
-EXTERN_KMEM_GROUP( kmem_pgtab );
-
-
-class mapnode_t;
-class space_t;
-
-
-class pgent_t {
-	
-	
-public:
-
-    union {
-
-        // page directory entry
-        struct {
-            word_t address		: 28; // must be 16byte aligned to fit into
-            word_t is_subtree	: 1;
-            word_t is_kernel	: 1;
-            word_t reserved		: 2;
-        } pdent;
-		
-        // page table entry
-        struct {
-            word_t is_global	: 1;
-            word_t is_valid		: 1;
-            word_t is_writable	: 1;
-            word_t cattr		: 3;
-            word_t pfn		: 20;
-            word_t padding		: 2;
-            word_t is_subtree	: 1;
-            word_t is_kernel	: 1;
-            word_t reserved		: 2;
-        } ptent;
-
-        word_t raw;
-    };
-
-
-    enum pgsize_e {
-        size_4k = 0,
-        size_4m = 1,		
-        size_max = size_4m 
-    };
-
-    enum cattr_e {
-        uncached	= 0x0,
-        cacheable	= 0x3
-    };
-
-	
-    // -- linknode access
-
-    void set_linknode (pgsize_e pgsize, u32_t val) {
-        ASSERT( pdent.is_subtree == 0 && "pgent_t::set_linknode() should not be called on pdir" );
-        *(u32_t*)((word_t)this + PTAB_SIZE ) = val;
-    }
-	
-    void set_linknode (space_t * s, pgsize_e pgsize, mapnode_t * map, addr_t vaddr) {
-        set_linknode( pgsize,  (u32_t)map^(u32_t)vaddr ); 
-    }
-
-    u32_t get_linknode (pgsize_e pgsize) { 
-        ASSERT( pdent.is_subtree == 0 && "pgent_t::get_linknode() should not be called on pdir" );
-        return( *(u32_t *)((word_t)this + PTAB_SIZE) ); 
-    }
-   
-
-    // -- predicated
-	
-    bool is_valid (space_t * s, pgsize_e pgsize) {
-        return( raw != 0 );
-    }
-
-    bool is_readable (space_t * s, pgsize_e pgsize) {
-        return( ptent.is_valid == 1 );
-    }
-
-    bool is_writable (space_t * s, pgsize_e pgsize) {
-        return( ptent.is_writable == 1 );
-    }
-
-    bool is_executable (space_t * s, pgsize_e pgsize) {
-        return( ptent.is_valid == 1 );
-    }
-
-    bool is_subtree (space_t * s, pgsize_e pgsize) {
-        return( pdent.is_subtree == 1 );	
-    }
-
-    bool is_kernel( space_t * s, pgsize_e pgsize ) {
-        return( pdent.is_kernel == 1 );	
-    }
-	
-
-    // -- retrieval
-	
-    addr_t address (space_t * s, pgsize_e pgsize) {
-        return( (addr_t)(ptent.pfn << 12) );
-    }
-	
-    pgent_t* subtree (space_t * s, pgsize_e pgsize) {
-        ASSERT( pdent.is_subtree == 1 && "pgent_t::subtree() called on ptab entry" );
-        return( (pgent_t*)(pdent.address << 4) );
-    }
-
-    mapnode_t* mapnode (space_t * s, pgsize_e pgsize, addr_t vaddr) {
-        return( (mapnode_t *) (get_linknode(pgsize) ^ (u32_t)vaddr) ); 
-    }
-	
-    addr_t vaddr( space_t* s, pgsize_e pgsize, mapnode_t* map ) {
-        return( (addr_t)(get_linknode(pgsize) ^ (u32_t) map) );
-    }
-
-    word_t reference_bits (space_t * s, pgsize_e pgsize, addr_t vaddr) {
-		
-        ASSERT( pdent.is_subtree == 0 && "pgent_t::reference_bits() called on pdir entry" );
-        // XXX this does not always return the correct result (there is no hardware reference bit)	
-        if( !ptent.is_valid ) {
-            return( 0 );
-        }
-        else if( ptent.is_writable ) {
-            return( 6 );
-        }
-        else {
-            return( 4 );
-        }
-    }
-
-    word_t attributes (space_t * s, pgsize_e pgsize) {
-	return 0;
-    }
-
-    // -- modification
-
-    void clear (space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr) {
-        ASSERT( pdent.is_subtree == 0 && "pgent_t::clear() should not be called on pdir" );
-        this->raw = 0;
-        if( !kernel ) set_linknode( pgsize, 0 );
-    }
-	
-    void flush (space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr) {
-        ASSERT(!"pgent_t::flush is not implemented");
-        // XXX
-    }
-
-    void make_subtree (space_t * s, pgsize_e pgsize, bool kernel) {
-		
-        void* mem = (void*)kmem.alloc( kmem_pgtab, kernel ? PTAB_SIZE : 2 * PTAB_SIZE );
-        ASSERT( ((word_t)mem & 0xf) == 0 && "pgent_t::make_subtree(): memory is not 16 byte aligned" );
-
-        pdent.address = ((word_t)mem) >> 4;
-        pdent.is_subtree = 1;
-    }
-
-    void remove_subtree (space_t * s, pgsize_e pgsize, bool kernel) {
-        ASSERT( pdent.is_subtree == 1 && "pgent_t::remove_subtree() should not be called on ptab entry" );
-
-        kmem.free( kmem_pgtab, (void*)(pdent.address << 4), kernel ? PTAB_SIZE : 2 * PTAB_SIZE );
-        raw = 0;
-    }
-
-    void set_entry (space_t * s, pgsize_e pgsize, addr_t paddr, word_t rwx, word_t attrib, bool kernel) {
-        ptent.is_valid = 1;
-        ptent.is_writable = writable;
-        ptent.pfn = ((word_t)paddr >> PAGEBITS);
-        ptent.is_subtree = 0;
-        ptent.is_kernel = kernel;
-        ptent.cattr = attrib;
-    }
-
-    void set_entry (space_t * s, pgsize_e pgsize, addr_t paddr, word_t rwx, bool kernel) {
-	set_entry( s, pgsize, paddr, rwx, cattr_e::uncached, kernel);
-    }
-
-    void set_global (space_t * s, pgsize_e pgsize, bool value) {
-        ASSERT( pdent.is_subtree == 0 && "pgent_t::set_global() should not be called on pdir" );
-        ptent.is_global = ( value ? 1 : 0 );
-    }	
-
-    void set_entry (space_t * s, pgsize_e pgsize, pgent_t pgent) {
-        raw = pgent.raw;
-    }
-
-    void set_attributes (space_t * s, pgsize_e pgsize, word_t attrib) {
-        ptent.cattr = attrib;
-    }
-
-    void revoke_rights (space_t * s, pgsize_e pgsize, word_t rwx) {
-        ASSERT( !"pgent_t::revoke_rights not implemented" ); 
-        // XXX
-    }
-
-    void update_rights (space_t * s, pgsize_e pgsize, word_t rwx) {
-        ptent.is_writable = (rwx & 2) ? 1 : 0;
-        ptent.is_valid = (rwx & 4 ) ? 1 : 0;
-    }
-
-    void reset_reference_bits (space_t * s, pgsize_e pgsize) {
-        // there is not real reference bit
-    }
-   	
-    void update_reference_bits (space_t * s, pgsize_e pgsize, word_t rwx) {
-        // there is not real reference bit
-    }
-
-
-    // -- movement
-
-    pgent_t* next (space_t* s, pgsize_e pgsize, word_t num) {
-        return( this + num );
-    }
-
-    // -- debug
-
-    void dump_misc (space_t * s, pgsize_e pgsize)
-	{
-	}
-};
-
-#endif /* !__ARCH__MIPS32__PGENT_H__ */
diff --git a/kernel/src/arch/mips32/regdef.h b/kernel/src/arch/mips32/regdef.h
deleted file mode 100644
index 729bbe11..00000000
--- a/kernel/src/arch/mips32/regdef.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/regdef.h
- * Description:   Pretty MIPS32 general purpose register names
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: regdef.h,v 1.1 2006/02/23 21:07:39 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__REGDEF_H__
-#define __ARCH__MIPS32__REGDEF_H__
-
-#define zero    $0
-#define AT      $1
-#define v0      $2
-#define v1      $3
-#define a0      $4
-#define a1      $5
-#define a2      $6
-#define a3      $7
-#define t0      $8
-#define t1      $9
-#define t2      $10
-#define t3      $11
-#define t4      $12
-#define t5      $13
-#define t6      $14
-#define t7      $15
-#define s0      $16
-#define s1      $17
-#define s2      $18
-#define s3      $19
-#define s4      $20
-#define s5      $21
-#define s6      $22
-#define s7      $23
-#define t8      $24
-#define t9      $25
-#define jp      $25
-#define k0      $26
-#define k1      $27
-#define gp      $28
-#define sp      $29
-#define fp      $30
-#define s8	$30
-#define ra      $31
-
-#endif /* !__ARCH__MIPS32__REGDEF_H__ */
diff --git a/kernel/src/arch/mips32/startup.S b/kernel/src/arch/mips32/startup.S
deleted file mode 100644
index c5419a43..00000000
--- a/kernel/src/arch/mips32/startup.S
+++ /dev/null
@@ -1,105 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/startup.S
- * Description:   Kernel entry point for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: startup.S,v 1.1 2006/02/23 21:07:45 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(regdef.h)
-#include INC_ARCH(cp0regs.h)
-
-
-# -------------------------------------------------------------------------
-# Data segment
-# -------------------------------------------------------------------------
-
-.section .base
-
-	.globl K_STACK_BOTTOM
-	.globl K_TEMP0
-	.globl K_TEMP1
-	.globl K_TEMP2
-	.globl K_TEMP3
-	.globl K_TEMP4
-	
-	
-K_STACK_BOTTOM:	.word	0
-
-K_TEMP0: .word 0
-K_TEMP1: .word 0
-K_TEMP2: .word 0
-K_TEMP3: .word 0
-K_TEMP4: .word 0
-
-# -------------------------------------------------------------------------
-# Code segment
-# -------------------------------------------------------------------------
- 
-
-.section .text.startup
-.set nomove
- 
-.globl	_start
-
-.globl init_cpu 
-
-_start:
-
-	la      gp, 0x80000000
- 	la      sp, _bootstack_top 
-	sw      sp, K_STACK_BOTTOM
-	
- 	jal     startup_system
-	nop
-
-init_cpu:
-
-	# status register: disable interrupts, clear EXL, IM, ERL, BEV
-
-	mfc0    v0, CP0_STATUS		
- 	and     v0, v0, 0xFFBF00E0
- 	or      v0, v0, 0x10000000
- 	mtc0    v0, CP0_STATUS
-
-	# config register: enable caching in user segment
-
-	mfc0    v0, CP0_CONFIG		
- 	and     v0, v0, 0xFFFFFFF8
- 	or      v0, v0, 0x00000005
- 	mtc0    v0, CP0_CONFIG
-
-	# clear cause register
-	mtc0    zero, CP0_CAUSE
-
-	# clear tag registers
-	mtc0    zero, CP0_TAGLO
-	mtc0    zero, CP0_TAGHI
-
-	j       ra
-
-	 
diff --git a/kernel/src/arch/mips32/tlb.cc b/kernel/src/arch/mips32/tlb.cc
deleted file mode 100644
index ca5ea483..00000000
--- a/kernel/src/arch/mips32/tlb.cc
+++ /dev/null
@@ -1,326 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/tlb.cc
- * Description:   MIPS32 TLB management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tlb.cc,v 1.1 2006/02/23 21:07:45 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(cp0regs.h)
-#include INC_ARCH(mips_cpu.h)
-#include <debug.h>
-
-tlb_t tlb;
-
-static word_t tlb_size;
-
-void SECTION(".init") tlb_t::init() {
-
-    tlb_size = get_mips_cpu()->get_tlb_size();
-    ASSERT( tlb_size == 16  && "set mips_cpu_t::tlb_size properly before calling any tlb functions" );
-	
-    unsigned pagemask = 0x0; // 4k pages
-    unsigned wired   = 0;  // kernel stack
-
-    __asm__ __volatile__("mtc0 %0, "STR(CP0_PAGEMASK)"\n\t"
-                         "mtc0 %1, "STR(CP0_WIRED)""
-                         :
-                         : "r"(pagemask), "r"(wired)
-	);
-	
-    for( unsigned i = 0; i < tlb_size; i++ ) {
-		
-        __asm__ __volatile__(
-            "mtc0	%0, "STR(CP0_INDEX)"	\n\t"
-            "mtc0	%1, "STR(CP0_ENTRYHI)"	\n\t"
-            "mtc0	$0, "STR(CP0_ENTRYLO0)"	\n\t"
-            "mtc0	$0, "STR(CP0_ENTRYLO1)"	\n\t"
-            "nop;nop						\n\t"
-            "tlbwi"
-            :
-            : "r"( i ), "r"( get_invalid() )
-            );
-
-    }
-}
-
-
-word_t tlb_t::get_invalid() {
-
-    static word_t invalid = KSEG0_BASE;
-    invalid += 0x2000;
-    if( EXPECT_FALSE(invalid >= KSEG1_BASE) ) invalid = KSEG0_BASE;
-    return( invalid );
-}
-
-
-/* flush all asid-tagged tlb entries */
-void tlb_t::flush( word_t asid, word_t vaddr, word_t page_size ) {
-    
-    ASSERT(page_size == 12);
-    
-    word_t entryhi, entryhi_bak;
-    word_t index;
-    word_t global = 0x1;
-    
-    __asm__ __volatile__ (
-        "mfc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-        : "=r" (entryhi_bak)
-        );
-
-    entryhi = ( vaddr & 0xffffe000 ) | asid;
-
-    __asm__ __volatile__ (
-        "mtc0	%1,"STR(CP0_ENTRYHI)"	\n\t"
-        "nop;nop;						\n\t"
-        "tlbp;							\n\t"
-        "nop;nop;						\n\t"
-        "mfc0	%0,"STR(CP0_INDEX)"		\n\t"
-        : "=r" (index) : "r" (entryhi)
-        );
-
-    if( !(index & 0x80000000) )  { 
-        // -- match
-	
-        __asm__ __volatile__ (
-            "tlbr			\n\t"
-            "nop;nop;nop;	\n\t"
-            );
-
-        if( vaddr & ( 1 << 12 ) ) {	    /* Odd entry */
-            __asm__ __volatile__ (
-                "mtc0	%0,"STR(CP0_ENTRYLO1)"\n\t"
-                : 
-                : "r" (global)
-                );
-        } 
-        else {  /* Even entry */
-            __asm__ __volatile__ (
-                "mtc0	%0,"STR(CP0_ENTRYLO0)"\n\t"
-                : 
-                : "r" (global)
-                );
-        }
-		
-        __asm__ __volatile__ (
-            "nop;nop\n\t"
-            "tlbwi\n\t"
-            "nop;nop;nop;\n\t"
-            );
-
-    }
-	
-    __asm__ __volatile__ (
-        "mtc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-        : 
-        : "r" (entryhi_bak)
-        );
-}
-
-
-void tlb_t::flush( word_t asid ) {
-	
-    unsigned entryhi_bak;
-    unsigned wired;
-
-    __asm__ __volatile__ (
-        "mfc0 %0, "STR(CP0_ENTRYHI)"\n\t"
-        : "=r" (entryhi_bak)
-	);
-
-    // don't need this...
-    __asm__ __volatile__ (
-        "mtc0	$0, "STR(CP0_ENTRYLO0)";nop;nop;nop\n\t"
-        "mtc0	$0, "STR(CP0_ENTRYLO1)";nop;nop;nop\n\t"
-        "mfc0	%[wired], "STR(CP0_WIRED)";nop;nop;nop\n\t"
-        : [wired] "=r" (wired)
-	);		
-	
-    for( unsigned i = wired; i < tlb_size; i++ ) {
-        __asm__ __volatile__(
-            "mtc0 %0, "STR(CP0_INDEX)"\n\t"	
-            "nop;nop;nop\n\t"
-            "tlbr\n\t"
-            "mfc0 $8, "STR(CP0_ENTRYHI)"\n\t"
-            "nop;nop;nop\n\t"
-            "and  $8, $8, 0xff\n\t"
-            "bne  $8, %1, 1f\n\t"
-            "nop\n\t"
-            "mtc0	%2, "STR(CP0_ENTRYHI)";nop;nop;nop\n\t"
-            "tlbwi;nop;nop;nop\n\t"
-            "1:"
-            : 
-            : "r"(i), "r"(asid), "r"(get_invalid())
-            : "$8"
-            );
-    }
-
-    __asm__ __volatile__ (
-        "mtc0 %0, "STR(CP0_ENTRYHI)"\n\t"
-        :
-        : "r" (entryhi_bak)
-	);
-}
-
-
-void tlb_t::put( word_t vaddr, word_t asid, pgent_t* pg ) {
-	
-    word_t entryhi_bak;
-    word_t entryhi, entrylo;
-    word_t index;
-
-    entryhi = ( vaddr & 0xffffe000 ) | asid;
-    entrylo = pg->raw;
-
-    __asm__ __volatile__ (
-        "mfc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-        : "=r" (entryhi_bak)
-	);
-
-    __asm__ __volatile__ (
-        "mtc0	%1,"STR(CP0_ENTRYHI)"\n\t"
-        "nop;nop;nop;\n\t"
-        "tlbp;\n\t"
-        "nop;nop;nop;\n\t"
-        "mfc0	%0,"STR(CP0_INDEX)"\n\t"
-        : "=r" (index) 
-        : "r" (entryhi)
-	);
-
-    if( index & 0x80000000)  { 
-
-        // -- no match
-        word_t ck21_0, ck21_1;
-
-        if( vaddr & ( 1 << 12 ) ) {
-	    /* Odd entry */
-            ck21_0 = 0x1;	/* Set global bit (both must be global for kernel) */
-            ck21_1 = entrylo;
-        } 
-        else {
-            /* Even entry */
-            ck21_0 = entrylo;
-            ck21_1 = 0x1;
-        }
-
-        __asm__ __volatile__ (
-            "mtc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-            "mtc0	%1,"STR(CP0_ENTRYLO0)"\n\t"
-            "mtc0	%2,"STR(CP0_ENTRYLO1)"\n\t"
-            "nop;nop;nop;\n\t"
-            "tlbwr\n\t"
-            "nop;nop;nop;\n\t"
-            : 
-            : "r" (entryhi), "r" (ck21_0), "r" (ck21_1)
-            );
-    }
-    else {
-        
-        // -- match 
-        __asm__ __volatile__ (
-            "tlbr\n\t"
-            "nop;nop;nop;\n\t"
-            );
-        
-        if( vaddr & ( 1 << 12 ) ) {	/* Odd entry */
-            
-            __asm__ __volatile__ (
-                "mtc0	%0,"STR(CP0_ENTRYLO1)"\n\t"
-                : 
-                : "r" (entrylo)
-                );
-        }   
-        else { /* Even entry */
-            
-            __asm__ __volatile__ (
-                "mtc0	%0,"STR(CP0_ENTRYLO0)"\n\t"
-                : 
-                : "r" (entrylo)
-                );
-        }
-        
-        __asm__ __volatile__ (
-            "nop;nop;nop;\n\t"
-            "tlbwi\n\t"
-            "nop;nop;nop;\n\t"
-            );
-    }
-
-    __asm__ __volatile__ (
-        "mtc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-        : 
-        : "r" (entryhi_bak)
-	);
-}
-
-
-
-
-#if 0
-void tlb_t::print( ) {
-    
-    unsigned entryhi_bak;
-    unsigned entryhi, entrylo0, entrylo1;
-    
-    printf("========================= CURRENT TLB =========================\n");
-    
-    __asm__ __volatile__ (
-        "mfc0 %0, "STR(CP0_ENTRYHI)"\n\t"
-        : "=r" (entryhi_bak)
-	);
-    
-    for( unsigned i = 0; i < 16; i++ ) {
-        __asm__ __volatile__(
-            "mtc0 %3, "STR(CP0_INDEX)"\n\t"	
-            "nop;nop;nop\n\t"
-            "tlbr\n\t"
-            "mfc0 %0, "STR(CP0_ENTRYHI)"\n\t"
-            "nop;nop;nop\n\t"
-            "mfc0 %1, "STR(CP0_ENTRYLO0)"\n\t"
-            "nop;nop;nop\n\t"
-            "mfc0 %2, "STR(CP0_ENTRYLO1)"\n\t"
-            "nop;nop;nop\n\t"
-            : "=r"(entryhi), "=r"(entrylo0), "=r"(entrylo1)
-            : "r"(i)
-            );
-        printf("    %x: 0x%x -> 0x%x (%c%c%c), 0x%x (%c%c%c), ASID = 0x%x, \n",
-               i, entryhi & 0xffffe000, 
-               (entrylo0 & 0x03ffffc0) << 6, entrylo0 & 4 ? 'D' : '-', entrylo0 & 2 ? 'V' : '-', entrylo0 & 1 ? 'G' : '-', 
-               (entrylo1 & 0x03ffffc0) << 6, entrylo1 & 4 ? 'D' : '-', entrylo1 & 2 ? 'V' : '-', entrylo1 & 1 ? 'G' : '-', 
-               entryhi & 0xff );  
-    }
-    
-    __asm__ __volatile__ (
-        "mtc0 %0, "STR(CP0_ENTRYHI)"\n\t"
-        :
-        : "r" (entryhi_bak)
-	);
-    
-    printf("===============================================================\n");
-}
-#endif 
diff --git a/kernel/src/arch/mips32/tlb.h b/kernel/src/arch/mips32/tlb.h
deleted file mode 100644
index c419d237..00000000
--- a/kernel/src/arch/mips32/tlb.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/tlb.h
- * Description:   MIPS32 TLB management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tlb.h,v 1.1 2006/02/23 21:07:39 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__TLB_H__
-#define __ARCH__MIPS32__TLB_H__
-
-#include INC_ARCH(pgent.h)
-
-class tlb_t {
-  
-public:
-	  
-    void init();
-    void put( word_t vaddr, word_t asid, pgent_t* pg );
-    void flush( word_t asid );
-    void flush( word_t asid, word_t vaddr, word_t page_size );
-    word_t get_invalid();
-	
-};
-
-INLINE tlb_t* get_tlb() {
-    extern tlb_t tlb;
-    return( &tlb );
-}
-	
-#endif /* !__ARCH__MIPS32__TLB_H__ */
diff --git a/kernel/src/arch/mips32/types.h b/kernel/src/arch/mips32/types.h
deleted file mode 100644
index f84091ee..00000000
--- a/kernel/src/arch/mips32/types.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     arch/mips32/types.h
- * Description:   MIPS32-specific types
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.1 2006/02/23 21:07:39 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS32__TYPES_H__
-#define __ARCH__MIPS32__TYPES_H__
-
-typedef unsigned int		__attribute__((__mode__(__DI__))) u64_t;
-typedef unsigned int		u32_t;
-typedef unsigned short		u16_t;
-typedef unsigned char		u8_t;
-
-typedef signed int		__attribute__((__mode__(__DI__))) s64_t;
-typedef signed int		s32_t;
-typedef signed short		s16_t;
-typedef signed char		s8_t;
-
-/**
- *	word_t - machine word wide unsigned int
- */
-typedef u32_t			word_t;
-
-#endif /* !__ARCH__MIPS32__TYPES_H__ */
diff --git a/kernel/src/arch/mips64/Makeconf b/kernel/src/arch/mips64/Makeconf
deleted file mode 100644
index beab72d0..00000000
--- a/kernel/src/arch/mips64/Makeconf
+++ /dev/null
@@ -1,2 +0,0 @@
-SOURCES+=	src/arch/mips64/head.S src/arch/mips64/switch.S
-
diff --git a/kernel/src/arch/mips64/addrspace.h b/kernel/src/arch/mips64/addrspace.h
deleted file mode 100644
index 971641da..00000000
--- a/kernel/src/arch/mips64/addrspace.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:
- * Created:       20/08/2002 by Carl van Schaik
- * Description:   MIPS Address Map
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: addrspace.h,v 1.5 2003/09/24 19:04:29 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef _ARCH_MIPS64_ADDRSPACE_H_
-#define _ARCH_MIPS64_ADDRSPACE_H_
-
-/* 32-bit Compatible Segments */
-#define KUSEG	    0x0000000000000000
-#define KSEG0	    0xffffffff80000000
-#define KSEG1	    0xffffffffa0000000
-#define KSEG2	    0xffffffffc0000000
-#define KSEG3	    0xffffffffe0000000
-
-#define KUSEG_SIZE  0x80000000
-#define KSEG0_SIZE  0x20000000
-#define KSEG1_SIZE  0x20000000
-#define KSEG2_SIZE  0x20000000
-#define KSEG3_SIZE  0x20000000
-
-#define KUSEG_MASK  (KUSEG_SIZE-1)
-#define KSEG0_MASK  (KSEG0_SIZE-1)
-#define KSEG1_MASK  (KSEG1_SIZE-1)
-#define KSEG2_MASK  (KSEG2_SIZE-1)
-#define KSEG3_MASK  (KSEG3_SIZE-1)
-
-/* 64-bit Memory Segments */
-#define XKUSEG	    0x0000000000000000
-#define XKSSEG	    0x4000000000000000
-#define XKPHYS	    0x8000000000000000
-#define XKSEG	    0xc000000000000000
-#define CKSEG0	    0xffffffff80000000
-#define CKSEG1	    0xffffffffa0000000
-#define CKSSEG	    0xffffffffc0000000
-#define CKSEG3	    0xffffffffe0000000
-
-/* Address generation */
-#define MIPS64_ADDR_K0(pa)	(KSEG0 | (pa & KSEG0_MASK))
-#define MIPS64_ADDR_K1(pa)	(KSEG1 | (pa & KSEG1_MASK))
-
-#endif /* _ARCH_MIPS64_ADDRSPACE_H_ */
diff --git a/kernel/src/arch/mips64/asm.h b/kernel/src/arch/mips64/asm.h
deleted file mode 100644
index 0b981294..00000000
--- a/kernel/src/arch/mips64/asm.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     arch/mips64/asm.h
- * Description:   Assembler macros etc. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.4 2003/09/24 19:04:29 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__MIPS64__ASM_H__
-#define __ARCH__MIPS64__ASM_H__
-
-#define BEGIN_PROC(name)			\
-    .global name;				\
-    .align 3;					\
-    .ent name;					\
-name:
-
-#define END_PROC(name)				\
-    .end name
-
-/*
- * EXPORT - export definition of symbol
- */
-#define EXPORT(symbol)				\
-    .globl  symbol;				\
-symbol:
-
-
-#endif /* __ARCH__MIPS64__ASM_H__ */
diff --git a/kernel/src/arch/mips64/cache.h b/kernel/src/arch/mips64/cache.h
deleted file mode 100644
index e1af3dc9..00000000
--- a/kernel/src/arch/mips64/cache.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:	  arch/mips64/cache.h
- * Description:   Functions which manipulate the MIPS cache
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cache.h,v 1.6 2004/06/04 02:14:25 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__MIPS64__CACHE_H__
-#define __ARCH__MIPS64__CACHE_H__
-
-#ifndef ASSEMBLER
-
-#include INC_ARCH(pgent.h)
-
-class cache_t
-{
-public:
-    static inline void init_cpu(void);
-    static inline void flush_cache_all(void);
-    static inline void flush_cache_l1(void);
-    static inline void flush_cache_range(unsigned long start, unsigned long end);
-    static inline void flush_icache_range(unsigned long start, unsigned long end);
-    static inline void flush_cache_page(unsigned long page, pgent_t::pgsize_e pgsize);
-    static inline void flush_icache_page(unsigned long page, pgent_t::pgsize_e pgsize);
-
-//  void clear_page
-//  void copy_page
-};
-
-#endif	/* ASSEMBLER */
-
-#endif	/* __ARCH__MIPS64__CACHE_H__ */
diff --git a/kernel/src/arch/mips64/cpu.h b/kernel/src/arch/mips64/cpu.h
deleted file mode 100644
index 5c64a9a4..00000000
--- a/kernel/src/arch/mips64/cpu.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/mips64/cpu.h
- * Description:   MIPS CPU ID Numbers. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cpu.h,v 1.4 2003/11/17 05:45:13 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef _ARCH_MIPS64_CPU_H_
-#define _ARCH_MIPS64_CPU_H_
-
-#define MIPS_IMP_VR41XX	    0x0c00
-
-#define MIPS_REV_VR4121	    0x0060
-#define MIPS_REV_VR4181	    0x0050
-#define MIPS_REV_MASK_VR    0x00f0
-
-#define MIPS_IMP_RC64574    0x1500
-#define MIPS_IMP_R4700	    0x2100
-#define MIPS_IMP_SB1	    0x0100	    /* NB: Sibyte has PRid bits 23 to 16 set to Sibyte Manufacturer */
-
-#define MIPS_IMP_MASK	    0xff00
-#define MIPS_REV_MASK	    0x00ff
-
-/* Top half of PRID */
-#define MIPS_NORMAL	    0x00000000
-#define MIPS_MANUF_SIBYTE   0x00040000
-
-#define MIPS_MANUF_MASK	    0x00ff0000
-
-#endif /* _ARCH_MIPS64_CPU_H */
diff --git a/kernel/src/arch/mips64/debug.h b/kernel/src/arch/mips64/debug.h
deleted file mode 100644
index 34f95f44..00000000
--- a/kernel/src/arch/mips64/debug.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     arch/mips64/debug.h
- * Description:   Debug support
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: debug.h,v 1.8 2003/09/24 19:04:29 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__MIPS64__DEBUG_H__
-#define __ARCH__MIPS64__DEBUG_H__
-
-#include INC_GLUE(syscalls.h)
-
-#define SPIN_INTERRUPT  15 
-#define SPIN_IDLE       30
-#define SPIN_YIELD      45
-#define SPIN_TIMER_INT  60
-#define SPIN_IPC        75
-
-INLINE int spin_forever(int pos = 0)
-{
-    while(1) { asm ("wait;"); }
-    return 0;
-}
-
-INLINE void spin(int pos = 0, int cpu = 0)
-{
-}
-
-#define enter_kdebug(x)				\
-do {						\
-    __asm__ __volatile__ (			\
-	".set	noat\n\t"			\
-	"li	$1, %0\n\t"			\
-	"dla	$2, 1f		    \n\t"	\
-	"break			    \n\t"	\
-	".set	at\n\t"				\
-	"	.data		    \n\t"	\
-	"1:	.string " #x "	    \n\t"	\
-	"	.previous	    \n\t"	\
-	: : "i" (L4_TRAP_KDEBUG) : "memory", "$1", "$2"	\
-    );						\
-} while (0)
-
-#define HERE()               printf("Here %s:%d\n", __PRETTY_FUNCTION__, __LINE__)
-
-#endif /* __ARCH__MIPS64__DEBUG_H__ */
diff --git a/kernel/src/arch/mips64/head.S b/kernel/src/arch/mips64/head.S
deleted file mode 100644
index 0af3d47b..00000000
--- a/kernel/src/arch/mips64/head.S
+++ /dev/null
@@ -1,104 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/mips64/head.S
- * Description:    The kernels entry point 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: head.S,v 1.15 2003/12/24 03:22:35 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(regdef.h)
-#include INC_GLUE(context.h)
-#include INC_PLAT(config.h)
-
-	.section .text.startup
-BEGIN_PROC(_start)
-	dla	sp, _bootstack_top
-#ifndef CONFIG_SMP
-	sd      sp, K_STACK_BOTTOM
-#endif
-
-	jal startup_system
-END_PROC(_start)
-
-#define  KVAR(x)	\
-	.globl x;	\
-x:;			\
-	.space 8;
-
-	.section .base
-	/* Kernel BASE information (64K) aligned */
-	.globl KERNEL_BASE
-KERNEL_BASE:
-	KVAR(K_STACK_BOTTOM)
-	KVAR(K_TEMP0)
-	KVAR(K_TEMP1)
-	KVAR(K_TEMP2)
-	KVAR(K_TEMP3)
-	KVAR(K_TEMP4)
-
-	.section .init
-	.set at
-	.set noreorder
-BEGIN_PROC(init_cpu)
-
-	/* Disable Caches */
-	mfc0	t0, CP0_CONFIG
-	and	t0, ~(CONFIG_CACHE_MASK)
-#if defined (CONFIG_SB1_PASS1_WORKAROUNDS)
-	or	t0, CONFIG_CACHABLE_COW
-#else
-	or	t0, CONFIG_NOCACHE
-#endif		
-	mtc0	t0, CP0_CONFIG
-	nop
-
-	/* Setup STATUS Regiser : These can be optimised */
-	mfc0	t0, CP0_STATUS
-
-	li	t1, INIT_CP0_STATUS_SET
-	li	t2, ~INIT_CP0_STATUS_CLEAR
-
-	or	t0, t1
-	and	t0, t2
-
-	srl	t0, 5;	    	/* clear IE, EXL, ERL, KSU */
-	sll	t0, 5;
-
-	mtc0	t0, CP0_STATUS  /* set new status */
-	nop
-	nop
-	nop
-	mtc0    zero, CP0_TAGLO
-	nop
-
-	mtc0    zero, CP0_CAUSE /* clear cause register */
-	nop
-
-	j	ra
-	nop
-END_PROC(init_cpu)
diff --git a/kernel/src/arch/mips64/mips_cpu.h b/kernel/src/arch/mips64/mips_cpu.h
deleted file mode 100644
index 77cc5fc2..00000000
--- a/kernel/src/arch/mips64/mips_cpu.h
+++ /dev/null
@@ -1,282 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     arch/mips64/mips_cpu.h
- * Created:       22/08/2002 by Carl van Schaik
- * Description:   MIPS CPU control functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips_cpu.h,v 1.13 2004/06/04 02:14:25 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__MIPS64__MIPS_CPU_H__
-#define __ARCH__MIPS64__MIPS_CPU_H__
-
-#include INC_ARCH(mipsregs.h)
-
-/**
- * MIPS CPU control functions
- */
-
-class mips_cpu
-{
-public:
-    static inline void cli (void);
-    static inline void restore_mask (unsigned int mask);
-    static inline void sti (void);
-    static inline void sleep (void);
-    static inline unsigned int save_flags (void);
-    static inline void restore_flags (unsigned int flags);
-
-public:
-    static inline unsigned int set_cp0_status (unsigned int set);
-    static inline unsigned int clear_cp0_status (unsigned int clear);
-    static inline unsigned int change_cp0_status (unsigned int mask, unsigned int newbits);
-    
-    static inline unsigned int set_cp0_cause (unsigned int set);
-    static inline unsigned int clear_cp0_cause (unsigned int clear);
-    static inline unsigned int change_cp0_cause (unsigned int mask, unsigned int newbits);
-    
-    static inline unsigned int set_cp0_config (unsigned int set);
-    static inline unsigned int clear_cp0_config (unsigned int clear);
-    static inline unsigned int change_cp0_config (unsigned int mask, unsigned int newbits);
-
-#ifdef CONFIG_CPU_MIPS64_SB1
-    static inline unsigned long get_cp0_perf_counter0 (void);
-    static inline unsigned long get_cp0_perf_control0 (void);
-    static inline unsigned long get_cp0_perf_counter1 (void);
-    static inline unsigned long get_cp0_perf_control1 (void);
-    static inline unsigned long get_cp0_perf_counter2 (void);
-    static inline unsigned long get_cp0_perf_control2 (void);
-    static inline unsigned long get_cp0_perf_counter3 (void);
-    static inline unsigned long get_cp0_perf_control3 (void);
-
-    static inline unsigned long set_cp0_perf_counter0 (unsigned long set);
-    static inline unsigned long set_cp0_perf_control0 (unsigned long set);
-    static inline unsigned long set_cp0_perf_counter1 (unsigned long set);
-    static inline unsigned long set_cp0_perf_control1 (unsigned long set);
-    static inline unsigned long set_cp0_perf_counter2 (unsigned long set);
-    static inline unsigned long set_cp0_perf_control2 (unsigned long set);
-    static inline unsigned long set_cp0_perf_counter3 (unsigned long set);
-    static inline unsigned long set_cp0_perf_control3 (unsigned long set);
-#endif
-
-public:
-    static inline void enable_fpu (void);
-    static inline void disable_fpu (void);
-};
-
-#ifdef CONFIG_SMP
-# warning "Is this SMP safe?"
-#endif
-
-INLINE void mips_cpu::cli (void)
-{
-    __asm__ __volatile__ (
-	".set	push		\n"
-	".set	reorder		\n"
-	".set	noat		\n"
-	"mfc0	$1,$12		\n"
-	"ori	$1,1		\n"
-	"xori	$1,1		\n"
-	".set	noreorder	\n"
-	"mtc0	$1,$12		\n"
-	"sll	$0, $0, 1;	# nop\n"
-	"sll	$0, $0, 1;	# nop\n"
-	"sll	$0, $0, 1;	# nop\n"
-	".set	pop;\n\t"
-	::: "$1", "memory"
-	);
-}
-
-INLINE void mips_cpu::restore_mask (unsigned int mask)
-{
-    word_t temp = ~(0x00ff00ul);
-    __asm__ __volatile__ (
-	".set	push		\n"
-	".set	reorder		\n"
-	".set	noat		\n"
-	"mfc0	$1,$12		\n"
-	"and	$1, $1, %[temp]		\n"
-	"sll	%0, %0, 8		\n"
-	"or	$1, $1, %0		\n"
-	"mtc0	$1, $12			\n"
-	"sll	$0, $0, 1;	# nop\n"
-	"sll	$0, $0, 1;	# nop\n"
-	"sll	$0, $0, 1;	# nop\n"
-	".set	pop;\n\t"
-	:: "r" (mask), [temp] "r" (temp) : "$1", "memory"
-    );
-}
-
-INLINE void mips_cpu::sti (void)
-{
-    __asm__ __volatile__ (
-	".set	push	    \n"
-	".set	reorder	    \n"
-	".set	noat	    \n"
-	"mfc0	$1,$12	    \n"
-	"ori	$1,0x01	    \n"
-	"mtc0	$1,$12	    \n"
-	".set	pop	    \n"
-	::: "$1"
-	);
-}
-
-INLINE void mips_cpu::sleep (void)
-{
-#if !defined(CONFIG_CPU_MIPS64_R4X00) && !defined(CONFIG_PLAT_VR41XX)
-    __asm__ __volatile__ (
-	".set push	\n\t"
-	".set noreorder	\n\t"
-	"nop		\n\t"
-	"wait		\n\t"
-	"nop		\n\t"
-	".set reorder	\n\t"
-	".set pop	\n\t"
-	);
-#elif CONFIG_PLAT_VR41XX
-    __asm__ __volatile__ (
-//	"standby;	"
-	".word	0x42000021;	"
-    );
-#else
-    for (word_t i = 0; i < 1000; i++);
-#endif
-}
-
-INLINE unsigned int mips_cpu::save_flags (void)
-{
-    unsigned int temp;
-    __asm__ __volatile__ (
-        ".set\tpush\n\t"
-        ".set\treorder\n\t"
-        "mfc0\t\\temp, $12\n\t"
-        ".set\tpop\n\t"
-	);
-    return temp;
-}
-
-INLINE void mips_cpu::restore_flags (unsigned int flags)
-{
-    __asm__ __volatile__ (
-	".set\tnoreorder\n\t"
-	".set\tnoat\n\t"
-	"mfc0\t$1, $12\n\t"
-	"andi\t\\flags, 1\n\t"
-	"ori\t$1, 1\n\t"
-	"xori\t$1, 1\n\t"
-	"or\t\\flags, $1\n\t"
-	"mtc0\t\\flags, $12\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	"sll\t$0, $0, 1\t\t\t# nop\n\t"
-	".set\tat\n\t"
-	".set\treorder\n\t"
-	);
-}
-
-#define __BUILD_SET_CP0(name,register)                          \
-INLINE unsigned int mips_cpu::set_cp0_##name (unsigned int set)	\
-{								\
-    unsigned int res;						\
-								\
-    res = read_32bit_cp0_register(register);			\
-    res |= set;							\
-    write_32bit_cp0_register(register, res);			\
-								\
-    return res;							\
-}								\
-								\
-INLINE unsigned int mips_cpu::clear_cp0_##name (unsigned int clear)	\
-{								\
-    unsigned int res;						\
-								\
-    res = read_32bit_cp0_register(register);			\
-    res &= ~clear;						\
-    write_32bit_cp0_register(register, res);			\
-								\
-    return res;							\
-}								\
-								\
-INLINE unsigned int mips_cpu::change_cp0_##name (unsigned int mask, unsigned int newbits)	\
-{								\
-    unsigned int res;						\
-								\
-    res = read_32bit_cp0_register(register);			\
-    res &= ~mask;						\
-    res |= (mask & newbits);					\
-    write_32bit_cp0_register(register, res);			\
-								\
-    return res;							\
-}
-
-__BUILD_SET_CP0(status,CP0_STATUS)
-__BUILD_SET_CP0(cause,CP0_CAUSE)
-__BUILD_SET_CP0(config,CP0_CONFIG)
-
-INLINE void mips_cpu::enable_fpu (void)
-{
-    set_cp0_status(ST_CU1);
-    asm("nop;nop;nop;nop");         /* max. hazard */
-}
-
-INLINE void mips_cpu::disable_fpu (void)
-{
-    clear_cp0_status(ST_CU1);
-    /* We don't care about the cp0 hazard here  */ 
-}
-
-#ifdef CONFIG_CPU_MIPS64_SB1
-
-#define __BUILD_SET_PERF(name,sel)                          \
-INLINE unsigned long mips_cpu::get_cp0_perf_##name (void)	\
-{								\
-    unsigned long res;						\
-								\
-    res = read_64bit_cp0_register_sel(CP0_PERF,sel);		\
-								\
-    return res;							\
-}								\
-								\
-INLINE unsigned long mips_cpu::set_cp0_perf_##name (unsigned long set)	\
-{								\
-    write_64bit_cp0_register_sel(CP0_PERF, set, sel);		\
-								\
-    return set;							\
-}								\
-
-__BUILD_SET_PERF(control0,0);
-__BUILD_SET_PERF(counter0,1);
-__BUILD_SET_PERF(control1,2);
-__BUILD_SET_PERF(counter1,3);
-__BUILD_SET_PERF(control2,4);
-__BUILD_SET_PERF(counter2,5);
-__BUILD_SET_PERF(control3,6);
-__BUILD_SET_PERF(counter3,7);
-
-#endif
-
-#endif /* __ARCH__MIPS64__MIPS_CPU_H__ */
diff --git a/kernel/src/arch/mips64/mipsregs.h b/kernel/src/arch/mips64/mipsregs.h
deleted file mode 100644
index 51b6046c..00000000
--- a/kernel/src/arch/mips64/mipsregs.h
+++ /dev/null
@@ -1,192 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:
- * Created:       20/08/2002 by Carl van Schaik
- * Description:   MIPS CPU Registers
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mipsregs.h,v 1.9 2004/12/02 00:02:53 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef _ARCH_MIPS64_MIPSREGS_H_
-#define _ARCH_MIPS64_MIPSREGS_H_
-
-/* MIPS CoProcessor-0 Registers*/
-#define CP0_INDEX $0	/* selects TLB entry for r/w ops & shows probe success */ 
-#define CP0_RANDOM $1	/* counter - random number generator */
-#define CP0_ENTRYLO $2	/* low word of a TLB entry */
-#define CP0_ENTRYLO0 $2	/* R4k uses this for even-numbered virtual pages */
-#define CP0_ENTRYLO1 $3	/* R4k uses this for odd-numbered virtual pages */
-#define CP0_CONTEXT $4	/* TLB refill handler's kernel PTE entry pointer */
-#define CP0_PAGEMASK $5	/* R4k page number bit mask (impl. variable page sizes) */
-#define CP0_WIRED $6	/* R4k lower bnd for Random (controls randomness of TLB) */
-#define CP0_ERROR $7	/* R6k status/control register for parity checking */
-#define CP0_BADVADDR $8	/* "bad" virt. addr (VA of last failed v->p translation) */
-#define CP0_COUNT $9	/* R4k r/w reg - continuously incrementing counter */
-#define CP0_ENTRYHI $10	/* High word of a TLB entry */
-#define CP0_COMPARE $11	/* R4k traps when this register equals Count */
-#define CP0_STATUS $12	/* Kernel/User mode, interrupt enb., & diagnostic states */
-#define CP0_CAUSE $13	/* Cause of last exception */
-#define CP0_EPC $14	/* Address to return to after processing this exception */
-#define CP0_PRID $15	/* Processor revision identifier */
-#define CP0_CONFIG $16	/* R4k config options for caches, etc. */
-#define CP0_LLADR $17	/* R4k last instruction read by a Load Linked */
-#define CP0_LLADDR $17	/* Inconsistencies in naming... sigh. */
-#define CP0_WATCHLO $18	/* R4k hardware watchpoint data */
-#define CP0_WATCHHI $19	/* R4k hardware watchpoint data */
-/* 20-21,23-24 - RESERVED */
-#define CP0_PTR $22	/* MIPS64 Performance Trace Register */
-#define CP0_PERF $25	/* MIPS64 Performance Counter Register Mapping */
-#define CP0_ECC $26	/* R4k cache Error Correction Code */
-#define CP0_CACHEERR $27	/* R4k read-only cache error codes */
-#define CP0_TAGLO $28	/* R4k primary or secondary cache tag and parity */
-#define CP0_TAGHI $29	/* R4k primary or secondary cache tag and parity */
-#define CP0_ERROREPC $30	/* R4k cache error EPC */
-
-/* MIPS CoProcessor-0 Registers*/
-#define CP1_REVISION $0	/* FPU Revision */
-#define CP1_STATUS $31 /* FPU STatus */
-
-/* Config Register - Cacheability Codes */
-#define CONFIG_CACHABLE_NO_WA 0
-#define CONFIG_CACHABLE_WA 1
-#define CONFIG_NOCACHE 2
-#define CONFIG_CACHABLE_NONCOHERENT 3
-#define CONFIG_CACHABLE_CE 4
-#define CONFIG_CACHABLE_COW 5
-#define CONFIG_CACHABLE_CUW 6
-#define CONFIG_CACHABLE_ACCEL 7
-#define CONFIG_CACHE_MASK 7
-
-#define _INS_(x) #x
-#define STR(x) _INS_(x)
-
-/* Read from CP0 register */
-#define read_32bit_cp0_register(reg)	\
-({ unsigned int _rd_data;		\
-        __asm__ __volatile__(		\
-        "mfc0 %0,"STR(reg)		\
-        : "=r" (_rd_data));		\
-        _rd_data;})
-
-#define read_64bit_cp0_register(reg)	\
-({ unsigned long _rd_data;		\
-        __asm__ __volatile__(		\
-        "dmfc0 %0,"STR(reg)		\
-        : "=r" (_rd_data));		\
-        _rd_data;})
-
-#define read_64bit_cp0_register_sel(reg, sel)	\
-({ unsigned long _rd_data;		\
-        __asm__ __volatile__(		\
-        "dmfc0 %0,"STR(reg)","STR(sel)		\
-        : "=r" (_rd_data));		\
-        _rd_data;})
-
-#define write_32bit_cp0_register(reg,value) \
-        __asm__ __volatile__(		\
-        "mtc0\t%0,"STR(reg)		\
-        : : "r" (value));
-
-#define write_64bit_cp0_register(reg,value) \
-        __asm__ __volatile__(		\
-        "dmtc0\t%0,"STR(reg)		\
-        : : "r" (value))
-
-#define write_64bit_cp0_register_sel(reg,value,sel) \
-        __asm__ __volatile__(		\
-        "dmtc0\t%0,"STR(reg)","STR(sel)		\
-        : : "r" (value))
-
-
-/* Interupt Enable/Cause Bits */
-#define INT_SW0     (1<<8)
-#define INT_SW1     (1<<9)
-#define INT_IRQ0    (1<<10)
-#define INT_IRQ1    (1<<11)
-#define INT_IRQ2    (1<<12)
-#define INT_IRQ3    (1<<13)
-#define INT_IRQ4    (1<<14)
-#define INT_IRQ5    (1<<15)
-
-/* Status register bits */
-#define ST_IE		(1<<0)
-#define ST_EXL		(1<<1)
-#define ST_ERL		(1<<2)	
-#define ST_KSU		(3<<3)
-#define ST_U		(2<<3)
-#define ST_S		(1<<3)
-#define ST_K		(0<<3)
-#define ST_UX		(1<<5)
-#define ST_SX		(1<<6)
-#define ST_KX 		(1<<7)
-#define ST_DE		(1<<16)
-#define ST_CE		(1<<17)
-#define ST_NMI		(1<<19)
-#define ST_SR		(1<<20)
-#define ST_TS		(1<<21)
-#define ST_BEV		(1<<22)
-#define ST_PX		(1<<23)
-#define ST_MX		(1<<24)
-#define ST_RE		(1<<25)
-#define ST_FR		(1<<26)
-#define ST_RP		(1<<27)
-
-#define ST_IM		(0xff<<8)
-#define ST_CH		(1<<18)
-#define ST_SR		(1<<20)
-#define ST_TS		(1<<21)
-#define ST_BEV		(1<<22)
-#define ST_PX		(1<<23)
-#define ST_MX		(1<<24)
-#define ST_CU		(0xf<<28)
-#define ST_CU0		(0x1<<28)
-#define ST_CU1		(0x2<<28)
-#define ST_CU2		(0x4<<28)
-#define ST_CU3		(0x8<<28)
-#define ST_XX		(0x8<<28)
-
-#define USER_FLAG_READ_MASK	(ST_CU | ST_RP | ST_FR | ST_RE | ST_MX | ST_PX | ST_UX)
-#define USER_FLAG_WRITE_MASK	(ST_XX | ST_RP | ST_FR | ST_RE | ST_PX | ST_PX | ST_UX)
-
-/* Cause register */
-#define CAUSE_EXCCODE	(31<<2)
-#define CAUSE_EXCCODE_NUM(x)	((x>>2) & 31)
-#define CAUSE_IP	(255<<8)
-#define CAUSE_IP0	(1<<8)
-#define CAUSE_IP1	(1<<9)
-#define CAUSE_IP2	(1<<10)
-#define CAUSE_IP3	(1<<11)
-#define CAUSE_IP4	(1<<12)
-#define CAUSE_IP5	(1<<13)
-#define CAUSE_IP6	(1<<14)
-#define CAUSE_IP7	(1<<15)
-#define CAUSE_IV	(1<<23)
-#define CAUSE_CE	(3<<28)
-#define CAUSE_CE_NUM(x)	((x>>28) & 3)
-#define CAUSE_BD	(1<<31)
-
-#endif /* _ARCH_MIPS64_MIPSREGS_H_ */
diff --git a/kernel/src/arch/mips64/page.h b/kernel/src/arch/mips64/page.h
deleted file mode 100644
index 375f5a8e..00000000
--- a/kernel/src/arch/mips64/page.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     arch/mips64/page.h
- * Created:       30/07/2002 10:48:30 by Daniel Potts (danielp)
- * Description:   MIPS64 specific MM 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: page.h,v 1.12 2004/06/04 02:14:25 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__MIPS64__PAGE_H__
-#define __ARCH__MIPS64__PAGE_H__
-
-#include <config.h>
-#include INC_PLAT(config.h)
-
-/* #define MIPS64_PT_LEVELS         4 */
-
-#if CONFIG_MIPS64_ADDRESS_BITS == 40
-
-#define TOPLEVEL_PT_BITS (39)
-
-#if 0
-/* We are using a 3 level PT */
-#define MIPS64_PT_LEVELS         3
-
-/* How many bits each level maps */
-#define MIPS64_PT_BITS           {33, 23, 13}
-
-#define PTBR_SPACE_OFFSET       (512 * 8)
-
-#endif
-
-/* HW_PGSHIFTS must match pgsize_e (pgent.h) */
-/* space_t is (1024)*8  - 2^10 entries */
-/* so we have 12 -> 22 -> 32 -> 40 (42 -> 44 for sibyte) */
-/* #define HW_PGSHIFTS            { 12, 14, 16, 18, 20, 22, 24, 32, 40 }  XXX */
-#define HW_PGSHIFTS            { 12, 14, 16, 18, 20, 22, 24, 32, 41 } /* 41 - virtual ktcb */
-
-#define MDB_NUM_PGSIZES        (8)
-
-#define HW_VALID_PGSIZES       ((1 << 12) |  /*   4KB */ \
-                                (1 << 14) |  /*  16KB */ \
-                                (1 << 16) |  /*  64KB */ \
-                                (1 << 18) |  /* 256KB */ \
-                                (1 << 20) |  /*   1MB */ \
-                                (1 << 22) |  /*   4MB */ \
-                                (1 << 24))   /*  16MB */
-
-
-#elif CONFIG_MIPS64_ADDRESS_BITS == 44
-
-#define TOPLEVEL_PT_BITS (39)
-
-#if 0
-/* We are using a 4 level PT */
-#define MIPS64_PT_LEVELS         4
-#define MIPS64_PT_BITS           {43, 33, 23, 13}
-#define TOPLEVEL_PT_BITS        43
-
-#define PTBR_SPACE_OFFSET       (512 * 8)
-#endif
-
-
-/* HW_PGSHIFTS must match pgsize_e (pgent.h) */
-/* space_t is (1024)*8  - 2^10 entries */
-/* so we have 12 -> 22 -> 32 -> 40 (42 -> 44 for sibyte) */
-/*#define HW_PGSHIFTS            { 12, 14, 16, 18, 20, 22, 24, 32, 40 } * XXX */
-#define HW_PGSHIFTS            { 12, 14, 16, 18, 20, 22, 24, 26, 28, 32, 41 } /* 41 - virtual ktcb */
-
-#define MDB_NUM_PGSIZES        (10)
-
-#define HW_VALID_PGSIZES       ((1 << 12) |  /*   4KB */ \
-                                (1 << 14) |  /*  16KB */ \
-                                (1 << 16) |  /*  64KB */ \
-                                (1 << 18) |  /* 256KB */ \
-                                (1 << 20) |  /*   1MB */ \
-                                (1 << 22) |  /*   4MB */ \
-                                (1 << 24) |  /*  16MB */ \
-				(1 << 26) |  /*  64MB */ \
-				(1 << 28))   /* 256MB */
-
-
-
-#else
-#error We only support 40 and 44 bit address spaces!
-#endif /* CONFIG_MIPS64_ADDRESS_BITS */
-
-/* Basic page sizes etc. */
-
-#define MIPS64_PAGE_BITS         12
-#define MIPS64_PAGE_SIZE         (1UL << MIPS64_PAGE_BITS)
-#define MIPS64_PAGE_MASK         (~(MIPS64_PAGE_SIZE - 1))
-#define MIPS64_OFFSET_MASK       (~MIPS64_PAGE_MASK)
-
-
-/* Address space layout */
-
-
-#define AS_XKUSEG_START		(0)
-#define AS_XKUSEG_SIZE		(1UL << (CONFIG_MIPS64_ADDRESS_BITS))
-#define AS_XKUSEG_END		(AS_XKUSEG_START + AS_XKUSEG_SIZE - 1)
-
-/* XKPHYS is 8 segments of 2^PABITS each with different mapping modes.
- * SIZE and END are defined only for one of these segments.
- * If we want different cache attributes for this region, we could adjust START.
- */
-#define AS_XKPHYS_START		(0x8000000000000000)
-#define AS_XKPHYS_SIZE		(1UL << CONFIG_MIPS64_PHYS_ADDRESS_BITS)
-#define AS_XKPHYS_END		(AS_XKPHYS_START + AS_XKPHYS_SIZE - 1)
-
-#define AS_CKSEG0_START		(0xFFFFFFFF80000000)
-#define AS_CKSEG0_SIZE		(1UL << 29)
-#define AS_CKSEG0_END		(AS_CKSEG0_START + AS_CKSEG0_SIZE - 1)
-
-#define AS_CKSEG1_START		(0xFFFFFFFFa0000000)
-#define AS_CKSEG1_SIZE		(1UL << 29)
-#define AS_CKSEG1_END		(AS_CKSEG2_START + AS_CKSEG2_SIZE - 1)
-
-#define AS_CKSSEG_START		(0xFFFFFFFFc0000000)
-#define AS_CKSSEG_SIZE		(1UL << 29)
-#define AS_CKSSEG_END		(AS_CKSEG2_START + AS_CKSEG2_SIZE - 1)
-
-#define AS_CKSEG3_START		(0xFFFFFFFFe0000000)
-#define AS_CKSEG3_SIZE		(1UL << 29)
-#define AS_CKSEG3_END		(AS_CKSEG3_START + AS_CKSEG3_SIZE - 1)
-
-#define AS_XKSEG_START		(0x4000000000000000)
-#define AS_XKSEG_SIZE		((1UL << CONFIG_MIPS64_ADDRESS_BITS))
-#define AS_XKSEG_END		(AS_XKSEG_START + AS_XKSEG_SIZE - 1)
-
-/* #define KERNEL_OFFSET           (AS_XKPHYS_START + CONFIG_MIPS64_CONSOLE_RESERVE) */
-
-/* define where kernel starts */
-/*
-#define AS_KSEG_START 		AS_XKPHYS_START
-#define AS_KSEG_END		AS_XKPHYS_END
-*/
-#define AS_KSEG_START 		AS_CKSEG0_START
-#define AS_KSEG_END		AS_CKSEG0_END
-#define AS_KSEG_SIZE		AS_CKSEG0_SIZE
-
-#endif /* __ARCH__MIPS64__PAGE_H__ */
diff --git a/kernel/src/arch/mips64/pgent.h b/kernel/src/arch/mips64/pgent.h
deleted file mode 100644
index e6a99313..00000000
--- a/kernel/src/arch/mips64/pgent.h
+++ /dev/null
@@ -1,352 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004, 2006,  University of New South Wales
- *                
- * File path:     arch/mips64/pgent.h
- * Description:   Generic page table manipulation for MIPS64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pgent.h,v 1.26 2006/11/17 17:07:12 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS64__PGENT_H__
-#define __ARCH__MIPS64__PGENT_H__
-
-#include <kmemory.h>
-#include <debug.h>
-
-#include INC_GLUE(config.h)
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(page.h)
-
-#include INC_ARCH(tlb.h)
-
-
-#define MIPS64_PTAB_SIZE	((1 << 10) * sizeof (u64_t))
-
-#define MDB_PGSHIFTS		HW_PGSHIFTS
-
-
-EXTERN_KMEM_GROUP (kmem_pgtab);
-
-extern word_t hw_pgshifts[];
-
-class mapnode_t;
-class space_t;
-
-class pgent_t
-{
-public:
-    union {
-	struct {
-	    BITFIELD5(word_t,
-		subtree		: 56,	/* Pointer to subtree */
-		pgsize		: 4,	/* pgsize_e */
-		is_subtree	: 1,	/* 1 if valid subtree */
-		is_valid	: 1,	/* 0 for subtrees */
-		__rv2		: 2	/* Defined by translation */
-	    )
-	} tree;
-	struct {
-	    BITFIELD6(word_t,
-		__rv1		: 30,	/* Defined by translation */
-		__pad		: 26,
-		pgsize		: 4,	/* pgsize_e */
-		is_subtree	: 1,	/* 0 for mapping */
-		is_valid	: 1,	/* 1 if valid mapping */
-		__rv2		: 2	/* Defined by translation */
-	    )
-	} map;
-	u64_t		raw;
-    };
-
-    enum pgsize_e {
-		size_4k = 0,
-		size_16k,  /* 1	*/
-		size_64k,  /* 2	*/
-		size_256k, /* 3	*/
-		size_1m,   /* 4	*/
-		size_4m,   /* 5	*/
-		size_16m,  /* 6	*/
-#if CONFIG_MIPS64_ADDRESS_BITS == 40
-		size_4g,   /* 7 */
-		size_4t,   /* 8 */
-
-		/* XXX stubs for below */
-		size_64m,  /* 9*/
-		size_256m, /* 10 */
-		size_4p,  /* 11 */
-
-		size_max = size_4g
-#elif CONFIG_MIPS64_ADDRESS_BITS == 44
-		size_64m,  /* 7	*/
-		size_256m, /* 8	*/
-		size_4g,   /* 9 */
-		size_4t,   /* 10*/
-		size_4p,  /* 11 */
-		
-		size_max = size_4g
-#else
-#error We only support 40 and 44 bit address spaces!
-#endif
-    };
-
-private:
-
-    // Linknode access 
-
-    u64_t get_linknode (void)
-	{ return *(u64_t *) ((word_t) this + MIPS64_PTAB_SIZE); }
-
-    void set_linknode (u64_t val)
-	{ *(u64_t *) ((word_t) this + MIPS64_PTAB_SIZE) = val; }
-
-public:
-
-    translation_t * translation (void)
-	{ return (translation_t *) this; }
-
-    // Predicates
-
-    bool is_valid (space_t * s, pgsize_e pgsize)
-	{
-	    return map.is_valid || (map.is_subtree &&
-				    map.pgsize < (word_t) pgsize);
-	}
-
-    bool is_subtree (space_t * s, pgsize_e pgsize)
-	{
-	    if (pgsize == size_4t || pgsize == size_4g || pgsize == size_4m)
-		return tree.is_subtree;
-	    else
-		return map.pgsize < (word_t) pgsize;
-	}
-
-    bool is_readable (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->get_valid ();
-	}
-
-    bool is_writable (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->get_dirty () &&
-		    translation ()->get_valid ();
-	}
-
-    bool is_executable (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->get_valid ();
-	}
-
-    bool is_kernel (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->is_kernel();
-	}
-
-    word_t attributes (space_t * s, pgsize_e pgsize)
-	{
-	    return translation ()->memattrib();
-	}
-
-    // Retrieval
-
-    addr_t address (space_t * s, pgsize_e pgsize)
-	{
-	    return addr_mask (translation ()->phys_addr (),
-			      ~((1UL << hw_pgshifts[pgsize]) - 1));
-	}
-	
-    pgent_t * subtree (space_t * s, pgsize_e pgsize)
-	{
-	    if (pgsize == size_4t  || pgsize == size_4g || pgsize == size_4m)
-		return (pgent_t *) tree_to_addr ((addr_t) raw);
-	    else
-		return (pgent_t *) this;
-	}
-
-    mapnode_t * mapnode (space_t * s, pgsize_e pgsize, addr_t vaddr)
-	{ return (mapnode_t *) (get_linknode () ^ (u64_t) vaddr); }
-
-    addr_t vaddr (space_t * s, pgsize_e pgsize, mapnode_t * map)
-	{ return (addr_t) (get_linknode () ^ (u64_t) map); }
-
-    word_t reference_bits (space_t * s, pgsize_e pgsize, addr_t vaddr)
-	{
-	    word_t rwx = 0;
-	    if (translation ()->get_dirty ())
-		rwx = 6;
-	    else if (translation ()->get_valid())
-		rwx = 4;
-	    return rwx;
-	}
-
-    void update_reference_bits (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    // XXX: Implement me
-	}
-
-    // Modification
-
-    void clear (space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr)
-	{
-	    switch (pgsize)
-	    {
-	    case size_4m: case size_4g: case size_4t: case size_4p:
-		raw = 0;
-		break;
-	    default:
-		tree.is_valid = 0;
-		tree.is_subtree = 1;
-		break;
-	    }
-	    if (! kernel)
-		set_linknode (0);
-	}
-
-    void flush (space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr)
- 	{
-   	}
-
-    void make_subtree (space_t * s, pgsize_e pgsize, bool kernel)
-	{
-	    switch (pgsize) {
-	    case size_4t: case size_4g: case size_4m:
-		tree.subtree = (word_t)
-		    kmem.alloc (kmem_pgtab,
-				kernel ? MIPS64_PTAB_SIZE : MIPS64_PTAB_SIZE * 2);
-		tree.is_valid = 0;
-		tree.is_subtree = 1;
-		tree.pgsize = pgsize - 1;
-		break;
-	    default:
-		map.is_valid = 0;
-		map.is_subtree = 1;
-		map.pgsize = pgsize - 1;
-		break;
-	    }
-	}
-
-    void remove_subtree (space_t * s, pgsize_e pgsize, bool kernel)
-	{
-	    switch (pgsize) {
-	    case size_4p: case size_4t: case size_4g: case size_4m:
-	    {
-		//addr_t ptab = mips64_phys_to_virt (7, (addr_t) tree.subtree);
-		addr_t ptab = (addr_t) raw; /* FIXME */
-		raw = 0;
-		kmem.free (kmem_pgtab, tree_to_addr(ptab), 
-			   kernel ? MIPS64_PTAB_SIZE : MIPS64_PTAB_SIZE * 2);
-		break;
-	    }
-	    default:
-		map.is_subtree = 1;
-		map.is_valid = 0;
-		map.pgsize = pgsize + 1;
-		break;
-	    }
-	}
-
-    /* This is technically an assignment operator */
-    void set_entry(space_t *space, pgsize_e pgsize, pgent_t pgent)
-	{
-	    raw = pgent.raw;
-	}
-
-    void set_entry (space_t * s, pgsize_e pgsize, addr_t paddr,
-		    word_t rwx, bool kernel);
-	{
-	    translation_t newtr (
-				 translation_t::l4default,
-				 readable || writable, writable,
-				 kernel, paddr);
-	    raw = newtr.get_raw ();
-	    map.is_valid = 1;
-	    map.is_subtree = 0;
-	    map.pgsize = pgsize;
-	}
-
-    void set_entry (space_t * s, pgsize_e pgsize, addr_t paddr,
-		    word_t rwx, word_t attrib, bool kernel)
-	{
-	    translation_t newtr (
-	    			 (translation_t::memattrib_e)attrib,
-				 readable || writable, writable,
-				 kernel, paddr);
-	    raw = newtr.get_raw ();
-	    map.is_valid = 1;
-	    map.is_subtree = 0;
-	    map.pgsize = pgsize;
-	}
-
-    void set_attributes (space_t * s, pgsize_e pgsize, word_t attrib)
-	{
-	}
-
-    void revoke_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    translation_t * tr = translation ();
-	    if (rwx & 2) tr->set_dirty(0);
-	}
-
-    void update_rights (space_t * s, pgsize_e pgsize, word_t rwx)
-	{
-	    translation_t * tr = translation ();
-	    if (rwx & 2) tr->set_dirty(1);
-	}
-
-    void reset_reference_bits (space_t * s, pgsize_e pgsize)
-	{ translation ()->reset_reference_bits (); }
-
-    void set_linknode (space_t * s, pgsize_e pgsize,
-			      mapnode_t * map, addr_t vaddr)
-	{ set_linknode ((u64_t) map ^ (u64_t) vaddr); }
-
-    // Movement
-
-    pgent_t * next (space_t * s, pgsize_e pgsize, word_t num)
-	{
-	    /* 2^ (22, 32, 42) -> next level */
-	    switch (pgsize) {
-	    case size_16k: case size_16m: //case size_16t:
-		return this + 4*num;
-	    case size_64k: case size_64m:
-		return this + 16*num;
-	    case size_256k: case size_256m:
-		return this + 64*num;
-	    case size_1m: //case size_1t:
-		return this + 256*num;
-
-	    case size_4p: case size_4t: case size_4g: case size_4m: case size_4k:
-		return this + num;
-	    }
-	}
-
-    // Debug
-
-    void dump_misc (space_t * s, pgsize_e pgsize)
-	{
-	}
-};
-
-
-#endif /* !__ARCH__MIPS64__PGENT_H__ */
diff --git a/kernel/src/arch/mips64/regdef.h b/kernel/src/arch/mips64/regdef.h
deleted file mode 100644
index b7c59657..00000000
--- a/kernel/src/arch/mips64/regdef.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:
- * Created:       20/08/2002 by Carl van Schaik
- * Description:   MIPS Register Descriptions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: regdef.h,v 1.5 2003/09/24 19:04:29 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef _ARCH_MIPS64_REGDEF_H_
-#define _ARCH_MIPS64_REGDEF_H_
-
-#define zero		$0  /* hardwired to zero */
-#define AT		$1  /* assembler temporary */
-#define v0		$2  /* result */
-#define v1		$3
-/* argument registers */
-#define a0		$4
-#define a1		$5
-#define a2		$6
-#define a3		$7
-#define a4		$8  /* ABI64 names */
-#define a5		$9
-#define a6		$10
-#define a7		$11
-/* temporary registers */
-#define t0		$8
-#define t1		$9
-#define t2		$10
-#define t3		$11
-#define t4		$12
-#define t5		$13
-#define t6		$14
-#define t7		$15
-/* saved registers */
-#define s0		$16
-#define s1		$17
-#define s2		$18
-#define s3		$19
-#define s4		$20
-#define s5		$21
-#define s6		$22
-#define s7		$23
-/* extra temporaries */
-#define t8		$24
-#define t9		$25
-/* kernel registers - don't touch */
-#define k0		$26
-#define k1		$27
-
-#define gp		$28	/* global pointer */
-#define sp		$29	/* stack pointer */
-#define fp		$30	/* frame pointer */
-#define s8		$30	/* or saved register */
-#define ra		$31	/* return address */
-
-#endif /* _ARCH_MIPS64_REGDEF_H_ */
diff --git a/kernel/src/arch/mips64/switch.S b/kernel/src/arch/mips64/switch.S
deleted file mode 100644
index ae9c953c..00000000
--- a/kernel/src/arch/mips64/switch.S
+++ /dev/null
@@ -1,66 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:      arch/mips64/switch.S
- * Description:    Thread Switch
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: switch.S,v 1.13 2003/12/30 09:29:22 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_GLUE(context.h)
-#include <asmsyms.h>
-
-#define BEGIN_NOALIGN(name)			\
-    .global name;				\
-    .align 2;					\
-    .ent name;					\
-name:
-
-/* So s0 is the func, s1 is the arg1, s2 is the arg2. */ 
-BEGIN_PROC(mips64_return_from_notify2)
-
-    move    a1, s1
-    
-    END_PROC(mips64_return_from_notify2)
-
-    /* So s0 is the func, s1 is the arg. */ 
-    BEGIN_NOALIGN(mips64_return_from_notify1)
-
-    END_PROC(mips64_return_from_notify1)
-
-    /* So s0 is the func. */ 
-    BEGIN_NOALIGN(mips64_return_from_notify0)
-
-    move    a0, s0	/* assembler will do branch delay */
-    jal	    s8
-
-    RESTORE_SWITCH_STACK
-    jr	ra
-    nop
-
-END_PROC(mips64_return_from_notify0)
-
diff --git a/kernel/src/arch/mips64/sync.h b/kernel/src/arch/mips64/sync.h
deleted file mode 100644
index ccbed552..00000000
--- a/kernel/src/arch/mips64/sync.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     arch/mips64/sync.h
- * Description:   MIPS64 sychronization primitives
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id$
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS64__SYNC_H__
-#define __ARCH__MIPS64__SYNC_H__
-
-#include <debug.h>
-
-class spinlock_t 
-{
-public:
-    void init (word_t val = 0)
-	{ this->_lock= val; }
-    void lock (void);
-    void unlock (void);
-    
-public: // to allow initializers
-    volatile word_t _lock;
-};
-
-#define DECLARE_SPINLOCK(name) extern spinlock_t name;
-#define DEFINE_SPINLOCK(name) spinlock_t name = ((spinlock_t) {{_lock: 0}})
-
-DECLARE_SPINLOCK(printf_spin_lock);
-
-INLINE void spinlock_t::lock (void)
-{
-    __asm__ __volatile__ (
-	"   .set noreorder	\n"
-	"   move    $4, %0	\n"
-	"   1:			\n"
-	"   ll	    $5, ($4)	\n"
-	"   bnez    $5, 1b	\n"
-	"   nop			\n"
-	"   li	    $5, 1	\n"
-	"   sc	    $5, ($4)	\n"
-	"   beqz    $5, 1b	\n"
-	"   nop			\n"
-	"   .set reorder	\n"
-	:: "r" (&this->_lock)
-	: "$4", "$5"
-    );
-}
-
-INLINE void spinlock_t::unlock (void)
-{
-    __asm__ __volatile__ (
-	"sync;"
-	::: "memory"
-    );
-    this->_lock = 0;
-}
-
-
-#endif /* !__ARCH__MIPS64__SYNC_H__ */
diff --git a/kernel/src/arch/mips64/tlb.h b/kernel/src/arch/mips64/tlb.h
deleted file mode 100644
index f5d23fe0..00000000
--- a/kernel/src/arch/mips64/tlb.h
+++ /dev/null
@@ -1,407 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     arch/mips64/tlb.h
- * Description:   TLB management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tlb.h,v 1.16 2004/06/04 02:14:25 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS64__TLB_H__
-#define __ARCH__MIPS64__TLB_H__
-
-#include INC_ARCH(mipsregs.h)
-
-/**
- * A translation specifying a mapping to a physical address, including
- * page access rights, memory attributes, etc.  Virtual address, page
- * size, and so on are specified when inserting the translation into
- * the TLB.
- */
-class translation_t
-{
-    union {
-	struct {
-	    BITFIELD7( word_t,
-		global		: 1,
-		valid		: 1,
-		dirty		: 1,
-		memory_attrib	: 3,
-		phys_addr	: 24, /* How big do you want to make
-	         		       * this? */
-		__rv1		: 32,
-		rid		: 2   /* Region ID: 00b user/ 01b supervisor/ 11b kernel */
-	    )
-	} x;
-	word_t raw;
-    };
-
-public:
-
-    /* memory coherency attributes (map to EntryLo bits) */
-    enum memattrib_e {
-	write_through_noalloc	= CONFIG_CACHABLE_NO_WA,
-	write_through		= CONFIG_CACHABLE_WA,
-	uncached		= CONFIG_NOCACHE,
-	write_back		= CONFIG_CACHABLE_NONCOHERENT,
-#if CONFIG_UNCACHED
-	l4default		= uncached,
-#else
-#if CONFIG_SMP
-	coherent		= CONFIG_CACHABLE_COW,
-	l4default		= coherent,
-#else
-	l4default		= write_back,
-#endif
-#endif
-    };
-
-
-    /*
-     * Retrieval
-     */
-
-    /*
-     * reset accessed and dirty bit for page
-     */
-    void reset_reference_bits (void)
-	{ /* Do nothing */ }
-
-    /*
-     * @return memory attributes for page
-     */
-    memattrib_e memattrib (void)
-	{ return (memattrib_e) x.memory_attrib; }
-
-    /**
-     * @return physical address of mapping
-     */
-    addr_t phys_addr (void)
-	{ return (addr_t) (x.phys_addr << CONFIG_MIPS64_VPN_SHIFT); }
-
-    /**
-     * @return raw contents of translation
-     */
-    u64_t get_raw (void)
-	{ return raw; }
-
-
-    word_t get_valid (void)
-	{ return x.valid; }
-
-    word_t get_dirty (void)
-	{ return x.dirty; }
-
-    word_t get_global (void)
-	{ return x.global; }
-
-    bool is_kernel (void)
-	{ return (x.rid != 0); } /* 0 - user, 1 or 3 is kernel */
-
-    /*
-     * Modification
-     */
-
-    void set_dirty (word_t d)
-	{ x.dirty = d; }
-
-    void set_valid (word_t v)
-	{ x.valid = v; }
-
-    void set_global (word_t g)
-	{ x.global = g; }
-
-    void set_attrib (memattrib_e memattrib)
-	{ x.memory_attrib = (word_t) memattrib; }
-
-    void set_phys_addr(addr_t phys_addr)
-	{
-	    x.phys_addr = (word_t) phys_addr >> CONFIG_MIPS64_VPN_SHIFT;
-	}
-
-    void set (memattrib_e memattrib,
-	      bool allow_access,
-	      bool allow_modify,
-	      bool kernel,
-	      addr_t phys_addr);
-
-
-    /*
-     * Creation
-     */
-
-    /**
-     * Create new translation with undefined contents.
-     */
-    translation_t (void) {}
-
-    /**
-     * Create new translation with the given raw contents.
-     * @param x		raw contenents of new translation
-     */
-    translation_t (word_t x) { raw = x; }
-
-    translation_t (memattrib_e memattrib,
-		   bool allow_access,
-		   bool allow_modify,
-		   bool kernel,
-		   addr_t phys_addr);
-
-    /*
-     * Translation cache access
-     */
-
-    void put_tc (addr_t vaddr, word_t page_size, word_t asid);
-};
-
-
-/**
- * Create new translation and set initialize it according to input
- * parameters.
- *
- * @param memattrib		memory attribute for mapping
- * @param allow_access		allow accesses on mapped page
- * @param allow_modify		allow modifications on mapped page
- * @param phys_addr		physical address
- */
-INLINE
-translation_t::translation_t (memattrib_e memattrib,
-			      bool allow_access,
-			      bool allow_modify,
-			      bool kernel,
-			      addr_t phys_addr)
-{
-    raw = 			0;
-    x.global =			kernel;
-    x.valid =			allow_access;
-    x.dirty =			allow_modify;
-    x.memory_attrib = 		(word_t) memattrib;
-    x.phys_addr =		(word_t) phys_addr >> CONFIG_MIPS64_VPN_SHIFT;
-    x.rid	=		kernel ? 1 : 0;	    /* 00b - user, 01b - super, 11b - kernel */
-}
-
-
-/**
- * Set translation according to input parameters.
- *
- * @param present		is page present or not
- * @param memattrib		memory attribute for mapping
- * @param allow_access		allow accesses on mapped page
- * @param allow_modify		allow modifications on mapped page
- * @param access_rights		access rights for mapping
- * @param phys_addr		physical address
- * @param defer_exceptions	shoule exception in page be deferred
- */
-INLINE void
-translation_t::set (memattrib_e memattrib,
-		    bool allow_access,
-		    bool allow_modify,
-		    bool kernel,
-		    addr_t phys_addr)
-{
-    x.global =			kernel;
-    x.valid =			allow_access;
-    x.dirty =			allow_modify;
-    x.memory_attrib = 		(word_t) memattrib;
-    x.phys_addr =		(word_t) phys_addr >> CONFIG_MIPS64_VPN_SHIFT;
-    x.rid =			kernel ? 1 : 0;	    /* 00b - user, 01b - super, 11b - kernel */
-}
-
-
-/**
- * Number of virtual address bits implemented by the CPU. 
- */
-extern word_t mips64_num_vaddr_bits;
-
-
-/**
- * Insert code and/or data translation into translation cache.
- *
- * @param vaddr		virtual address
- * @param page_size	page size (log2)
- * @param asid		address space ID
- */
-INLINE void
-translation_t::put_tc (addr_t vaddr, word_t page_size, word_t asid)
-{
-    word_t entry_hi, save;
-    word_t entry_lo0, entry_lo1;
-    long int temp;
-
-    ASSERT(page_size == 12);
-    ASSERT(asid < CONFIG_MAX_NUM_ASIDS);
-
-    __asm__ __volatile__ (
-	"dmfc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-	: "=r" (save)
-    );
-
-    if (x.global) asid = 0;    /* Global? */
-
-    entry_hi = (x.rid<<62) | (asid) |
-		((((word_t)vaddr>>(page_size+1))&((1<<27)-1))<<(13));
-    /* TRACEF("entry_hi = %p, raw = %p, phy = %8x\n", entry_hi, raw, (raw>>6)<<12); */
-
-    __asm__ __volatile__ (
-	"dmtc0	%1,"STR(CP0_ENTRYHI)"\n\t"
-	"nop;nop;nop;tlbp;nop;nop;nop;"
-	"mfc0	%0,"STR(CP0_INDEX)"\n\t"
-	: "=r" (temp) : "r" (entry_hi)
-    );
-
-    if (temp < 0)   /* is top bit set? */
-	goto none;
-
-    __asm__ __volatile__ (
-	"tlbr\n\t"
-	"nop;nop;nop;\n\t"
-    );
-
-    if ((word_t)vaddr & (1<<page_size))	    /* Odd entry */
-    {
-	__asm__ __volatile__ (
-	    "dmtc0	%0,"STR(CP0_ENTRYLO1)"\n\t"
-	    : : "r" (raw)
-	);
-    } else  /* Even entry */
-    {
-	__asm__ __volatile__ (
-	    "dmtc0	%0,"STR(CP0_ENTRYLO0)"\n\t"
-	    : : "r" (raw)
-	);
-    }
-    __asm__ __volatile__ (
-	"nop;nop;nop;\n\t"
-	"tlbwi\n\t"
-"nop;nop;nop;\n\t"
-    );
-    goto exit;
-
-none:
-    if ((word_t)vaddr & (1<<page_size))	    /* Odd entry */
-    {
-	entry_lo0 = 1;	/* Set global bit (both must be global for kernel) */
-	entry_lo1 = raw;
-    } else  /* Even entry */
-    {
-	entry_lo0 = raw;
-	entry_lo1 = 1;
-    }
-    __asm__ __volatile__ (
-	"dmtc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-	"dmtc0	%1,"STR(CP0_ENTRYLO0)"\n\t"
-	"dmtc0	%2,"STR(CP0_ENTRYLO1)"\n\t"
-	"nop;nop;nop;\n\t"
-	"tlbwr\n\t"
-"nop;nop;nop;\n\t"
-	: : "r" (entry_hi), "r" (entry_lo0), "r" (entry_lo1)
-    );
-
-exit:
-    __asm__ __volatile__ (
-	"dmtc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-	: : "r" (save)
-    );
-
-}
-
-/**
- * Purge all data and instruction translations in the translation
- * with the indicated virtual memory region.
- *
- * @param vaddr		virtual address to purge
- * @param page_size	size of region to purge (log2)
- * @param asid		address space ID of mapping to purge
- */
-INLINE void purge_tc (addr_t vaddr, word_t page_size, word_t asid)
-{
-    word_t entry_hi, save;
-    s64_t temp;
-
-    ASSERT(page_size == 12);
-    ASSERT(asid < CONFIG_MAX_NUM_ASIDS);
-
-    __asm__ __volatile__ (
-	"dmfc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-	: "=r" (save)
-    );
-
-    entry_hi = (word_t)vaddr & (~((1UL<<(page_size+1)) - 1)) | asid;
-
-    __asm__ __volatile__ (
-	"dmtc0	%1,"STR(CP0_ENTRYHI)"\n\t"
-	"nop;nop;nop;tlbp;nop;nop;nop;"
-	"mfc0	%0,"STR(CP0_INDEX)"\n\t"
-	: "=r" (temp) : "r" (entry_hi)
-    );
-
-    if (temp < 0)   /* is top bit set? */
-	goto exit;
-
-    __asm__ __volatile__ (
-	"tlbr\n\t"
-	"nop;nop;nop;\n\t"
-    );
-
-    if ((word_t)vaddr & (1UL<<page_size))	    /* Odd entry */
-    {
-	__asm__ __volatile__ (
-	    "dmtc0	$0,"STR(CP0_ENTRYLO1)"\n\t"
-	);
-    } else  /* Even entry */
-    {
-	__asm__ __volatile__ (
-	    "dmtc0	$0,"STR(CP0_ENTRYLO0)"\n\t"
-	);
-    }
-    __asm__ __volatile__ (
-	"nop;nop;nop;\n\t"
-	"tlbwi\n\t"
-"nop;nop;nop;\n\t"
-    );
-
-exit:
-    __asm__ __volatile__ (
-	"dmtc0	%0,"STR(CP0_ENTRYHI)"\n\t"
-	: : "r" (save)
-    );
-}
-
-/**
- * Flush TLB and page cache for asid specified
- * 
- * @param asid		address space ID of space to purge
- */
-INLINE void flush_tc (word_t asid)
-{
-    UNIMPLEMENTED();
-}
-
-/**
- * Initialize the TLB
- */
-void init_tlb (void);
-
-#endif /* !__ARCH__MIPS64__TLB_H__ */
diff --git a/kernel/src/arch/mips64/types.h b/kernel/src/arch/mips64/types.h
deleted file mode 100644
index 2cfe40fd..00000000
--- a/kernel/src/arch/mips64/types.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     arch/mips64/types.h
- * Description:   MIPS64 specific types
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.5 2004/06/04 02:14:25 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__MIPS64__TYPES_H__
-#define __ARCH__MIPS64__TYPES_H__
-
-#define L4_64BIT
-#undef  L4_32BIT
-
-typedef unsigned long		u64_t; /* make sure you have -mlong64 as a
-					  CFLAG */
-typedef unsigned int		u32_t;
-typedef unsigned short		u16_t;
-typedef unsigned char		u8_t;
-
-typedef signed long		s64_t;
-typedef signed int		s32_t;
-typedef signed short		s16_t;
-typedef signed char		s8_t;
-
-/**
- *	word_t - machine word wide unsigned int
- */
-typedef u64_t			word_t;
-
-#endif /* !__ARCH__MIPS64__TYPES_H__ */
diff --git a/kernel/src/arch/sparc64/Makeconf b/kernel/src/arch/sparc64/Makeconf
deleted file mode 100644
index 502d6d65..00000000
--- a/kernel/src/arch/sparc64/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/arch/sparc64/, switch.S )
diff --git a/kernel/src/arch/sparc64/asi.h b/kernel/src/arch/sparc64/asi.h
deleted file mode 100644
index 7af14fa3..00000000
--- a/kernel/src/arch/sparc64/asi.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     arch/sparc64/asi.h
- * Description:   SPARC v9 alternative space identifiers (ASIs).
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asi.h,v 1.3 2003/09/24 19:04:31 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__ASI_H__
-#define __ARCH__SPARC64__ASI_H__
-
-#include INC_CPU(asi.h)  /* Additional ASIs defined by CPU implementation */
-
-#define ASI_N     0x04 /* Nucleus                              */
-#define ASI_NL    0x0c /* Nucleus, little endian               */
-#define ASI_AIUP  0x10 /* Primary, as if user                  */
-#define ASI_AIUS  0x11 /* Secondary, as if user                */
-#define ASI_AIUPL 0x18 /* Primary, as if user, little endian   */
-#define ASI_AIUSL 0x19 /* Secondary, as if user, little endian */
-#define ASI_P     0x80 /* Primary                              */
-#define ASI_S     0x81 /* Secondary                            */
-#define ASI_PNF   0x82 /* Primary, no fault                    */
-#define ASI_SNF   0x83 /* Secondary, no fault                  */
-#define ASI_PL    0x88 /* Primary, little endian               */
-#define ASI_SL    0x89 /* Secondary, little endian             */
-#define ASI_PNFL  0x8A /* Primary, no fault, little endian     */
-#define ASI_SNFL  0x8B /* Secondary, no fault, little endian   */
-
-
-#endif /* !__ARCH__SPARC64__ASI_H__ */
diff --git a/kernel/src/arch/sparc64/asm.h b/kernel/src/arch/sparc64/asm.h
deleted file mode 100644
index fec5b30e..00000000
--- a/kernel/src/arch/sparc64/asm.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  University of New South Wales
- *                
- * File path:     arch/sparc64/asm.h
- * Description:   Assembler defines/macros for sparc64. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.4 2004/02/03 04:11:11 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__ASM_H__
-#define __ARCH__SPARC64__ASM_H__
-
-/* SPARC 64-bit ABI dictates that the stack pointer is baised by 2047 bits */
-#define STACK_BIAS_64BIT  2047
-
-/* SPARC 64-bit compiler 64-bit frame size. 8 bytes * (8in + 8local + 6) */ 
-#define STACK_FRAME_64BIT 176
-
-#define DECLAR_STRING(name, sect, value) \
-  	.section sect;                   \
-	.globl name;                     \
-name:	.string value
-
-#define BEGIN_PROC(name, sect) \
-  	.section sect, "x";    \
-	.align 8;              \
-	.globl name;           \
-	.type name,@function;  \
-name:
-
-#define _INS_(x) #x
-#define STR(x) _INS_(x)
-
-#endif /* !__ARCH__SPARC64__ASM_H__ */
diff --git a/kernel/src/arch/sparc64/debug.h b/kernel/src/arch/sparc64/debug.h
deleted file mode 100644
index 921a9a55..00000000
--- a/kernel/src/arch/sparc64/debug.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    arch/sparc64/debug.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: debug.h,v 1.5 2004/02/06 05:47:33 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__DEBUG_H__
-#define __ARCH__SPARC64__DEBUG_H__
-
-#include <debug.h>
-
-#define enter_kdebug(x)							\
-do {									\
-    word_t tl;								\
-									\
-    __asm__ __volatile__("rdpr\t%%tl, %0\t!Read trap level\n"		\
-			 : "=r" (tl) /* %0 */ :);			\
-									\
-    printf("enter_kdebug: %s called from trap level 0x%lx\n", (char *)x, tl); \
-									\
-    __asm__ __volatile__("illtrap\t0x0\n"				\
-			 : /* no outputs */ :);				\
-									\
-} while (0)
-
-#warning awiggins (01-09-03): Might change this later, reboots so firmware gets control.
-INLINE int spin_forever(int pos = 0)
-{
-    asm("sir\t0\t! Trap to firmware\n");
-
-    return 0;
-}
-
-INLINE void spin(int pos = 0, int cpu = 0)
-{
-}
-
-
-#endif /* !__ARCH__SPARC64__DEBUG_H__ */
diff --git a/kernel/src/arch/sparc64/frame.h b/kernel/src/arch/sparc64/frame.h
deleted file mode 100644
index 208e2a4c..00000000
--- a/kernel/src/arch/sparc64/frame.h
+++ /dev/null
@@ -1,159 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    arch/sparc64/frame.h
- * Description:  Saved state for traps, windows and thread switches
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: frame.h,v 1.7 2004/07/01 04:00:04 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__FRAME_H__
-#define __ARCH__SPARC64__FRAME_H__
-
-/**********************************************************
-* Note: All SPARC64 frames MUST be 16 byte aligned!       *
-* See INC_ARCH(registers.h) for sizes of register fields. *
-**********************************************************/
-
-#ifndef ASSEMBLY
-
-#include <kdb/console.h>
-
-/**
- *  Stack frame for a register window.
- */
-class window_frame_t {
-public:
-    word_t   l0; /*-0---*/
-    word_t   l1; /* 8   */
-    word_t   l2; /*-16  */ 
-    word_t   l3; /* 24  */
-    word_t   l4; /*-32--*/
-    word_t   l5; /* 40  */
-    word_t   l6; /*-48  */
-    word_t   l7; /* 56  */
-    word_t   i0; /*-64--*/
-    word_t   i1; /* 72  */
-    word_t   i2; /*-80  */
-    word_t   i3; /* 88  */
-    word_t   i4; /*-96--*/
-    word_t   i5; /* 104 */
-    word_t   i6; /*-112 */
-    word_t   i7; /* 120 */
-
-public:
-
-    /* Printing */
-
-    void print(void);
-
-}; // window_frame_t
-
-INLINE void
-window_frame_t::print(void)
-{
-    printf("Window Frame:\n");
-    printf("\tl0 0x%lx\nl1 0x%lx\n\tl2 0x%lx\n\tl3 0x%lx\n",
-	   l0, l1, l2, l3);
-    printf("\tl4 0x%lx\n\tl5 0x%lx\n\tl6 0x%lx\n\tl7 0x%lx\n",
-	   l4, l5, l6, l7);
-    printf("\ti0 0x%lx\n\ti1 0x%lx\n\ti2 0x%lx\n\ti3 0x%lx\n",
-	   i0, i1, i2, i3);
-    printf("\ti4 0x%lx\n\ti5 0x%lx\n\ti6 0x%lx\n\ti7 0x%lx\n",
-	   i4, i5, i6, i7);
-
-} // window_frame_t::print()
-
-/**
- *  Stack frame for a general trap.
- */
-class trap_frame_t {
-public:
-    window_frame_t   window;     /* 0   */
-    word_t   args[8];            /* 128 */
-    word_t   g1;                 /* 192 */
-    word_t   g2;                 /* 200 */
-    word_t   g3;                 /* 208 */
-    word_t   g4;                 /* 216 */
-    word_t   g5;                 /* 224 */
-    word_t   o0;                 /* 232 */
-    word_t   o1;                 /* 240 */
-    word_t   o2;                 /* 248 */
-    word_t   o3;                 /* 256 */
-    word_t   o4;                 /* 264 */
-    word_t   o5;                 /* 272 */
-    word_t   o6;                 /* 280 */
-    word_t   o7;                 /* 288 */
-    word_t   i6;                 /* 296 */
-    word_t   i7;                 /* 304 */
-    word_t   unused;             /* 312 */
-
-public:
-
-    /* Printing */
-
-    void print(void);
-
-}; // trap_frame_t
-
-INLINE void
-trap_frame_t::print(void)
-{
-    printf("Trap Frame:\n");
-    printf("\tg1 0x%lx\n", g1);
-    printf("\tg2 0x%lx\n\tg3 0x%lx\n\tg4 0x%lx\n\tg5 0x%lx\n",
-	   g2, g3, g4, g5);
-    printf("\to0 0x%lx\n\to1 0x%lx\n\to2 0x%lx\n\to3 0x%lx\n",
-	   o0, o1, o2, o3);
-    printf("\to4 0x%lx\n\to5 0x%lx\n\to6 0x%lx\n\to7 0x%lx\n",
-	   o4, o5, o6, o7);
-    printf("\ti6 0x%lx\n\ti7 0x%lx\n",
-	   i6, i7);
-
-} // trap_frame_t::print()
-
-/**
- * frame used by thread switch and notify
- */
-class switch_frame_t {
-public:
-    window_frame_t window;  /* 0   */
-    word_t args[6];         /* 128 */
-    word_t o7;              /* 176 */
-    word_t i6;              /* 184 */
-    word_t i7;              /* 192 */
-    word_t o0;              /* 200 */
-    word_t o1;              /* 208 */
-    word_t o2;              /* 216 */
-    word_t y;               /* 224 */
-    word_t unused;          /* 232 */
-};
-
-extern "C" void sparc64_do_notify();
-
-#endif /* !ASSEMBLY */
-
-#endif /* !__ARCH__SPARC64__FRAME_H__ */
diff --git a/kernel/src/arch/sparc64/pgent.h b/kernel/src/arch/sparc64/pgent.h
deleted file mode 100644
index a7b7777a..00000000
--- a/kernel/src/arch/sparc64/pgent.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    arch/sparc64/pgent.h
- * Description:  Generic page table manipluation for SPARC v9.
- *               As the architecture doesn't define the MMU, grab it
- *               from the CPU family.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pgent.h,v 1.3 2003/09/24 19:04:31 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__PGENT_H__
-#define __ARCH__SPARC64__PGENT_H__
-
-/* Page table entries defined by the CPU implemtation. */
-#include INC_CPU(pgent.h)
-
-
-#endif /* !__ARCH__SPARC64__PGENT_H__ */
diff --git a/kernel/src/arch/sparc64/registers.h b/kernel/src/arch/sparc64/registers.h
deleted file mode 100644
index 64f1ef9d..00000000
--- a/kernel/src/arch/sparc64/registers.h
+++ /dev/null
@@ -1,698 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    arch/sparc64/registers.h
- * Description:  Describes the register specifics of the SPARC v9 
- *               architecture.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: registers.h,v 1.4 2004/02/06 05:48:54 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__REGISTERS_H__
-#define __ARCH__SPARC64__REGISTERS_H__
-
-#include INC_CPU(registers.h)
-
-/********************
- * Integer Registers *
- ********************/
-
-#define REGISTER_WINDOW_SIZE 16 /* 16 registers per window */
-
-#ifndef ASSEMBLY
-
-/******************
- * State Registers *
- ******************/
-
-/**
- *  Y Register (Y_REG)
- */
-class y_reg_t {
-public:
-    u32_t y;
-
-public:
-
-    /* Y register management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wr\t%0, %%y\n"
-			     : /* no output */
-			     : "r" (y)); // %0
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rd\t%%y, %0\n"
-			     : "=r" (y) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void) { printf("y: 0x%x", y);}
-
-}; // y_reg_t
-
-/**
- *  Condition Codes Register (CCR)
- */
-class ccr_t {
-public:
-    union {
-	u8_t raw;
-	struct {
-	    BITFIELD8(u8_t,
-		      /* icc: 32-bit condition codes. */
-		      icc_c : 1, // Carry.
-		      icc_v : 1, // Overflow.
-		      icc_z : 1, // Zero.
-		      icc_n : 1, // Negative.
-		      /* xcc: 64-bit condition codes. */
-		      xcc_c : 1,
-		      xcc_v : 1,
-		      xcc_z : 1,
-		      xcc_n : 1
-
-	    ) // BITFIELD8()
-	} ccr;
-
-    }; // union
-
-public:
-
-    /* CCR management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wr\t%0, %%ccr\n"
-			     : /* no output */
-			     : "r" (raw)); // %0
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rd\t%%ccr, %0\n"
-			     : "=r" (raw) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void)
-    {
-	printf("xcc: %c%c%c%c icc: %c%c%c%c",
-	       ccr.xcc_c ? 'C' : 'c',
-	       ccr.xcc_v ? 'V' : 'v',
-	       ccr.xcc_z ? 'Z' : 'z',
-	       ccr.xcc_n ? 'N' : 'n',
-	       ccr.icc_c ? 'C' : 'c',
-	       ccr.icc_v ? 'V' : 'v',
-	       ccr.icc_z ? 'Z' : 'z',
-	       ccr.icc_n ? 'N' : 'n');
-    }
-
-} __attribute__((packed)); // ccr_t
-
-/**
- *  Address Space Identifier (ASI)
- */
-class asi_t {
-public:
-    u8_t asi;
-
-public:
-
-    /* ASI management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wr\t%0, %%asi\n"
-			     : /* no output */
-			     : "r" (asi)); // %0
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rd\t%%asi, %0\n"
-			     : "=r" (asi)
-			     : /* no input */); // %0
-    }
-
-    /* Printing. */
-
-    void print(void){printf("asi: 0x%x", asi);}
-
-}; // asi_t
-
-/**
- *  Floating-Point Register Status (FPRS)
- */
-
-/***********************
- * Privileged Registers *
- ***********************/
-
-/**
- *  Tick (TICK)
- */
-
-/**
- *  Floating-Point Deferred-Trap Queue (FQ)
- */
-
-/**
- *  Version Register (VER)
- *  Notes: Read only register.
- */
-class ver_t {
-public:
-    union {
-	u64_t raw;
-	struct {
-	    BITFIELD7(u64_t,
-		maxwin : 5,  /* Maximum window index (NWINDOWS - 1).          */
-		__rv1  : 3,  /* Reserved by architecture.                     */
-		maxtl  : 8,  /* Maximum number of trap levels supported.      */
-		__rv2  : 8,  /* Reserved by architecture.                     */
-		mask   : 8,  /* Mask set revision, manufacturer.              */
-		impl   : 16, /* Implementation of architecture, manufacturer. */
-		manuf  : 16  /* JEDEC semiconductor Manufacturer Code.        */
-
-	    ) // BITFIELD7()
-	} ver;
-
-    }; // union
-
-public:
-
-    /* VER management. */
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%ver, %0\n"
-			     : "=r" (raw)
-			     : /* no input */); // %0
-    }
-
-    /* Printing. */
-
-    void print(void)
-    {
-	printf("ver: trap levels %d windows %d manuf 0x%x impl 0x%x mask 0x%x\n",
-	       ver.maxtl, ver.maxwin + 1, ver.manuf, ver.impl, ver.mask);
-    }
-
-} __attribute__((packed)); // ver_t
-
-/**
- *  Current Window Pointer (CWP)
- */
-class cwp_t {
-public:
-    u8_t cwp;
-
-public:
-
-    /* CWP management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%cwp\n"
-			     : /* no output */
-			     : "r" (cwp)); // %0
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%cwp, %0\n"
-			     : "=r" (cwp) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void) {printf("cwp: %d", cwp);}
-
-}; // cwp_t
-
-/**
- *  Window State Register (WSTATE)
- */
-class wstate_t {
-public:
-    union {
-	u8_t raw;
-	struct {
-	    BITFIELD3(u8_t,
-		      normal : 3, /* Which normal spill/fill handler to use. */
-		      other  : 3, /* Which other spill/fill handler to use.  */
-		      __rv1  : 2  /* Unused.                                 */
-
-	    ) // BITFIELD3()
-	} wstate;
-
-    }; // union
-
-public:
-
-    /* WSTATE management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%wstate\n"
-			     : /* no output */
-			     : "r" (raw)); // %0
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%wstate, %0\n"
-			     : "=r" (raw) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void)
-    {
-	printf("wstate: normal %d other %d",
-	       wstate.normal, wstate.other);
-
-    }
-
-}; // wstate_t
-
-/**
- *  Register Window State (CWP, CANSAVE, CANRESTORE, OTHERWIN, WSTATE, CLEANWIN)
- */
-class reg_win_t {
-public:
-    cwp_t    cwp;
-    u8_t     cansave;
-    u8_t     canrestore;
-    u8_t     otherwin;
-    wstate_t wstate;
-    u8_t     cleanwin;
-
-public:
-
-    /* State management. */
-
-    void set(void)
-    {
-	cwp.get();
-	wstate.get();
-
-	__asm__ __volatile__("wrpr\t%0, %%cansave\n"
-			     "wrpr\t%1, %%canrestore\n"
-			     "wrpr\t%2, %%otherwin\n"
-			     "wrpr\t%3, %%cleanwin\n"
-			     : /* no output */
-			     : "r" (cansave),    // %0
-			     "r" (canrestore), // %1
-			     "r" (otherwin),   // %2
-			     "r" (cleanwin));  // %3
-    }
-
-    void get(void)
-    {
-	cwp.get();
-	wstate.get();
-
-	__asm__ __volatile__("rdpr\t%%cansave, %0\n"
-			     "rdpr\t%%canrestore, %1\n"
-			     "rdpr\t%%otherwin, %2\n"
-			     "rdpr\t%%cleanwin, %3\n"
-			     : "=r" (cansave),    // %0
-			     "=r" (canrestore), // %1
-			     "=r" (otherwin),   // %2
-			     "=r" (cleanwin)    // %3 
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void)
-    {
-	cwp.print(), printf(" cansave: %d canrestor %d ", cansave, canrestore),
-	wstate.print(), printf(" cleanwin: %d\n", cleanwin);
-    }
-
-}; // reg_win_t
-
-/**
- *  Processor State Register (PSTATE)
- */
-
-#endif /* !ASSEMBLY */
-
-/*      PSTATE_PID1 (1 << 11)*/ /* CPU implementation dependent.     */
-/*      PSTATE_PID0 (1 << 10)*/ /* CPU implementation dependent.     */
-#define PSTATE_CLE  (1 << 9)    /* Current little endian.            */
-#define PSTATE_TLE  (1 << 8)    /* Traps little endian.              */
-
-/* PSTATE_MM, Memory model */
-#define PSTATE_TSO  (0 << 6)    /* Total store order.                */
-/*      PSTATE_PSO  (1 << 6)*/  /* Partial store order, CPU dep.     */
-/*      PSTATE_RMO  (2 << 6)*/  /* Relaxed memory order, CPU dep.    */
-
-#define PSTATE_RED  (1 << 5)    /* Reset, Error, and Debug state.    */
-#define PSTATE_PEF  (1 << 4)    /* Priv, Floating point unit enable. */
-#define PSTATE_AM   (1 << 3)    /* Address-mask, 32-bit mode.        */
-#define PSTATE_PRIV (1 << 2)    /* Priviledged mode.                 */
-#define PSTATE_IE   (1 << 1)    /* Interrupts enabled.               */
-#define PSTATE_AG   (1 << 0)    /* Alternate globals enabled.        */
-
-#ifndef ASSEMBLY
-
-class pstate_t {
-public:
-    union {
-	u16_t raw;
-	struct {
-	    BITFIELD12(u16_t,
-		       ag          : 1, /* Use aternative global registers. */
-		       ie          : 1, /* Interrupts enable.               */
-		       priv        : 1, /* Priviledged mode.                */
-		       am          : 1, /* Address mask, 32 vs64 addresses. */
-		       pef         : 1, /* Enabled Floating-point unit.     */
-		       red         : 1, /* Reset Error and Debug state.     */
-		       mm          : 2, /* Memory model, see mm_e below .   */
-		       tle         : 1, /* Traps will use little endian.    */
-		       cle         : 1, /* Currently little endian.         */
-		       PSTATE_PID0 : 1, /* see INC_CPU(registers.h)         */
-		       PSTATE_PID1 : 1, /* see INC_CPU(registers.h)         */
-		       __rv        : 4  /* Unused.                          */
-
-	    ) // BITFIELD12()
-	} pstate;
-
-    }; // union
-
-    /* Memory model */
-    enum mm_e {
-	TSO = 0, /* Total Store Order.    */
-	PSO = 1, /* Partial Store Order.  */
-	RMO = 2  /* Relaxed Memory Order. */
-    };
-
-public:
-
-    /* PSTATE management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%pstate\n"
-			     : /* no output */
-			     : "r" (raw)); // %0      
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%pstate, %0\n"
-			     : "=r" (raw) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void)
-    {
-	printf("pstate: %c%c%c%c %s %c%c%c%c%c%c",
-	       PSTATE_PID1_CHAR(),
-	       PSTATE_PID0_CHAR(),
-	       pstate.cle  ? 'C' : 'c',
-	       pstate.tle  ? 'T' : 't',
-	       (pstate.mm == TSO) ? "TSO" :
-	       ((pstate.mm == PSO) ? "PSO" :
-		((pstate.mm == RMO) ? "RMO" : "XXX" )),
-	       pstate.red  ? 'R' : 'r',
-	       pstate.pef  ? 'F' : 'f',
-	       pstate.am   ? 'A' : 'a',
-	       pstate.priv ? 'P' : 'p',
-	       pstate.ie   ? 'E' : 'e',
-	       pstate.ag   ? 'G' : 'g');
-    }
-
-} __attribute__((packed)); // pstate_t
-
-/**
- *  Processor Interrupt Level (PIL)
- */
-class pil_t {
-public:
-    u8_t pil;
-
-public:
-
-    /* PIL management */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%pil\n"
-			     : /* no output */
-			     : "r" (pil)); // %0
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%pil, %0\n"
-			     : "=r" (pil) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void) {printf("pil: %d", pil);}
-
-}; // pil_t
-
-/**
- *  Trap Level (TL)
- */
-class tl_t {
-public:
-    u8_t tl;
-
-public:
-
-    /* TL management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%tl\n"
-			     : /* no output */
-			     :  "r" (tl)); // %0
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%tl, %0\n"
-			     : "=r" (tl) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void) {printf("tl: %d", tl);}
-
-}; // tl_t
-
-/**
- *  Trap Program Counter (TPC)
- */
-class tpc_t {
-public:
-    word_t tpc;
-
-public:
-
-    /* TPC management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%tpc\n"
-			     : /* no output */
-			     : "r" (tpc)); // %0      
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%tpc, %0\n"
-			     : "=r" (tpc) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void) {printf("tpc: 0x%x", tpc);}
-
-}; // tpc_t
-
-/**
- *  Trap Next Program Counter (TNPC)
- */
-class tnpc_t {
-public:
-    word_t tnpc;
-
-public:
-
-    /* TNPC management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%tnpc\n"
-			     : /* no output */
-			     : "r" (tnpc)); // %0      
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%tnpc, %0\n"
-			     : "=r" (tnpc)
-			     : /* no input */); // %0
-    }
-
-    /* Printing. */
-
-    void print(void) {printf("tnpc: 0x%x", tnpc);}
-
-}; // tnpc_t
-
-/**
- *  Trap state (TSTATE)
- */
-class tstate_t {
-private:
-    union {
-	u64_t raw;
-	struct {
-	    BITFIELD7(u64_t,
-		      cwp    : 5,  /* Trap CWP.    */
-		      __rv1  : 3,  /* Reserved.    */
-		      pstate : 12, /* Trap PSTATE. */
-		      __rv2  : 4,  /* Reserved.    */
-		      asi    : 8,  /* Trap ASI.    */
-		      ccr    : 8,  /* Trap CCR.    */
-		      __rv3  : 24  /* Reserved.    */
-
-	    ) // BITFIELD7()
-	} tstate;
-
-    }; // union
-
-public:
-
-    /* TSTATE management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%tstate\n"
-			     : /* no output */
-			     : "r" (raw)); // %0      
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%tstate, %0\n"
-			     : "=r" (raw)
-			     : /* no input */); // %0
-    }
-
-    /* TSTATE field access. */
-
-    void set_cwp(cwp_t cwp){tstate.cwp = (u64_t)cwp.cwp;}
-    void set_asi(asi_t asi){tstate.asi = (u64_t)asi.asi;}
-    void set_ccr(ccr_t ccr){tstate.ccr = (u64_t)ccr.raw;}
-    void set_pstate(pstate_t pstate){tstate.pstate = (u64_t)pstate.raw;} 
-
-    cwp_t    get_cwp(void){cwp_t cwp; cwp.cwp = tstate.cwp; return cwp;}
-    asi_t    get_asi(void){asi_t asi; asi.asi = tstate.asi; return asi;}
-    ccr_t    get_ccr(void){ccr_t ccr; ccr.raw = tstate.ccr; return ccr;}
-    pstate_t get_pstate(void)
-    {pstate_t pstate; pstate.raw = tstate.pstate; return pstate;}
-
-    /* Printing. */
-
-    void print(void)
-    {
-	extern void putc(char);
-
-	cwp_t cwp = get_cwp();
-	asi_t asi = get_asi();
-	ccr_t ccr = get_ccr();
-	pstate_t pstate = get_pstate();
-
-	printf("tstate: ");
-	ccr.print(), putc(' '), asi.print(), putc(' '),
-	pstate.print(), putc(' '), cwp.print(), putc('\n');
-
-    } // print()
-
-} __attribute__((packed)); // tstate_t
-
-/**
- *  Trap Type (TT)
- */
-class tt_t {
-public:
-    u16_t tt;
-
-public:
-
-    /* TT management. */
-
-    void set(void)
-    {
-	__asm__ __volatile__("wrpr\t%0, %%tt\n"
-			     : /* no output */
-			     : "r" (tt)); // %0      
-    }
-
-    void get(void)
-    {
-	__asm__ __volatile__("rdpr\t%%tt, %0\n"
-			     : "=r" (tt) // %0
-			     : /* no input */);
-    }
-
-    /* Printing. */
-
-    void print(void) {printf("tt: %0x", tt);}
-
-}; // tt_t
-
-/**
- *  Trap Base Adddress (TBA)
- */
-
-#endif /* !ASSEMBLY */
-
-#endif /* !__ARCH__SPARC64__REGISTERS_H__ */
diff --git a/kernel/src/arch/sparc64/switch.S b/kernel/src/arch/sparc64/switch.S
deleted file mode 100644
index bd2bf6f1..00000000
--- a/kernel/src/arch/sparc64/switch.S
+++ /dev/null
@@ -1,90 +0,0 @@
-/****************************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:	arch/sparc64/switch.S
- * Description:	SPARC64 switch_to and notify code.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: switch.S,v 1.4 2004/06/28 07:04:31 philipd Exp $
- *
- ***************************************************************************/
-
-#include INC_ARCH(asm.h)
-
-#include <asmsyms.h>
-
-.register	%g2,#ignore
-.register	%g3,#ignore
-
-BEGIN_PROC(sparc64_do_notify, ".text")
-	call	%o2
-	nop
-	ldx	[ %sp + SWITCH_FRAME_O7 + STACK_BIAS_64BIT ], %o7
-	ldx	[ %sp + SWITCH_FRAME_I6 + STACK_BIAS_64BIT ], %i6
-	ldx	[ %sp + SWITCH_FRAME_I7 + STACK_BIAS_64BIT ], %i7
-	ldx	[ %sp + SWITCH_FRAME_O0 + STACK_BIAS_64BIT ], %o0
-	ldx	[ %sp + SWITCH_FRAME_O1 + STACK_BIAS_64BIT ], %o1
-	ldx	[ %sp + SWITCH_FRAME_O2 + STACK_BIAS_64BIT ], %o2
-	ldx	[ %sp + SWITCH_FRAME_Y + STACK_BIAS_64BIT ], %l0
-	wr	%l0, %y
-	add	%sp, SWITCH_FRAME_SIZE, %sp
-	jmp	%o7
-	nop
-
-/**
- * sparc64_initial_to_user: Starts a user thread.
- */
-BEGIN_PROC(sparc64_initial_to_user, ".text")
-	wr	%g0, %y
-	clr	%g1
-	clr	%g2
-	clr	%g3
-	clr	%g4
-	clr	%g5
-	clr	%g6
-	clr	%o0
-	clr	%o1
-	clr	%o2
-	clr	%o3
-	clr	%o4
-	clr	%o5
-	clr	%o7
-	clr	%l0
-	clr	%l1
-	clr	%l2
-	clr	%l3
-	clr	%l4
-	clr	%l5
-	clr	%l6
-	clr	%l7
-	clr	%i0
-	clr	%i1
-	clr	%i2
-	clr	%i3
-	clr	%i4
-	clr	%i5
-	clr	%i6
-	clr	%i7
-	ldx	[ %sp + TRAP_FRAME_O6 + STACK_BIAS_64BIT ], %sp
-	retry /* jump to TL[0].TPC */
diff --git a/kernel/src/arch/sparc64/ttable.h b/kernel/src/arch/sparc64/ttable.h
deleted file mode 100644
index c1efdb0d..00000000
--- a/kernel/src/arch/sparc64/ttable.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    arch/sparc64/ttable.h
- * Description:  Assembler macros for SPARC v9 Trap Table. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ttable.h,v 1.4 2004/02/10 01:08:49 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__TTABLE_H__
-#define __ARCH__SPARC64__TTABLE_H__
-
-#include INC_GLUE_API_ARCH(ttable.h)
-
-/* Each Trap Table 'trap type' entry is 32 bytes long. */
-#define TTABLE_ENTRY_BITS 5
-#define TTABLE_ENTRY_SIZE (1 << 5)
-
-/* Trap level (TL) offsets into trap table. */
-#define TT_OFFSET_TLO 0
-#define TT_OFFSET_TLX 0x200
-
-/*********
-* Macros *
-*********/
-
-/**
- *  trap_type: 'Trap type'of request in the trap table.
- *  tl:        O if 'Trap level (TL)' = 0, otherwise X.
- */
-#define TRAPTYPE2TTOFFSET(trap_type, tl)                                   \
-    ((trap_type + TT_OFFSET_TL##tl) << TTABLE_ENTRY_BITS)
-
-/**
- *  trap_type: 'Trap type'of request in the trap table.
- *  tl:        O if 'Trap level (TL)' = 0, otherwise X.
- */
-#warning awiggins (20-08-03): This needs to be fixed at some stage, ld problem?
-#define TRAPTYPE2ADDR(trap_type, tl)                                       \
-    (/*ttable*/ABSOLUTE(0x80000008000) + TRAPTYPE2TTOFFSET(trap_type, tl))
-
-/**
- *  BEGIN_TTABLE_ENTRY: Begin a Trap Table entry point procedure.
- *  name:      Name of the trap request.
- *  tl:        O if 'Trap level (TL)' = 0, otherwise X.
- *
- *  Make sure there is NO whitespace in argument tl! Otherwise things break...
- */
-#define BEGIN_TTABLE_ENTRY(name, tl)                                       \
-    .section .ttable.##tl##.##name;                                        \
-    .globl  ttable_##tl##_##name;                                          \
-    .type ttable_##tl##_##name,@function;                                  \
-ttable_##tl##_##name:
-
-/**
- *  UNIMPLEMENTED_TTABLE_ENTRY: Declare an unimplemented Trap Table entry point.
- */
-#define UNIMPLEMENTED_TTABLE_ENTRY(name, tl)                               \
-    BEGIN_TTABLE_ENTRY(name,tl)                                            \
-    UNIMPLEMENTED_##tl##_##TRAP()
-
-/**
- *  UNUSED_TTABLE_ENTRY: Declare an unused Trap Table entry point.
- */
-#define UNUSED_TTABLE_ENTRY(name, tl)                                      \
-    BEGIN_TTABLE_ENTRY(name,tl)                                            \
-    UNUSED_##tl##_##TRAP()
-
-
-#endif /* !__ARCH__SPARC64__TTABLE_H__ */
diff --git a/kernel/src/arch/sparc64/ttable.ldi b/kernel/src/arch/sparc64/ttable.ldi
deleted file mode 100644
index 1973026e..00000000
--- a/kernel/src/arch/sparc64/ttable.ldi
+++ /dev/null
@@ -1,665 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003-2004, University of New South Wales
- *
- * File path:	arch/sparc64/ttable.ldi
- * Description:	Linker script include file for SPARC v9 Trap Table.
- *              Hex numbers specify trap types. 0/X specify the trap level
- *              (TL), O -> (TL = 0) while X -> (TL > 0). When (TL > 0) the
- *              trap type is offset into the trap table by 0x200.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: ttable.ldi,v 1.4 2004/02/12 05:58:00 philipd Exp $
- *
- ***************************************************************************/
-
-#include INC_ARCH(ttable.h)
-#include INC_GLUE_API_ARCH(config.h)
-
-		/**********************
-		* Trap level (TL) = 0 *
-		**********************/
-
-		/**
-		 *  Hardware traps.   (0x000 - 0x07F)
-		 */
-
-		/* Reserved       (0x000        , O)                         */
-		. = TRAPTYPE2ADDR (0x001        , O);
-		*(.ttable.O.power_on_reset)
-		. = TRAPTYPE2ADDR (0x002        , O);
-		*(.ttable.O.watchdog_reset)
-		. = TRAPTYPE2ADDR (0x003        , O);
-		*(.ttable.O.externally_initiated_reset)
-		. = TRAPTYPE2ADDR (0x004        , O);
-		*(.ttable.O.software_initiated_reset)
-		. = TRAPTYPE2ADDR (0x005        , O);
-		*(.ttable.O.RED_state_exception)
-		/* Reserved       (0x006 - 0x007, O)                         */
-		. = TRAPTYPE2ADDR (0x008        , O);
-		*(.ttable.O.instruction_access_exception)
-		. = TRAPTYPE2ADDR (0x009        , O);
-		*(.ttable.O.instruction_access_MMU_miss)
-		. = TRAPTYPE2ADDR (0x00A        , O);
-		*(.ttable.O.instruction_access_error)
-		/* Reserved       (0x00B - 0x00F, O)                         */
-		. = TRAPTYPE2ADDR (0x010        , O);
-		*(.ttable.O.illegal_instruction)
-		. = TRAPTYPE2ADDR (0x011        , O);
-		*(.ttable.O.privileged_opcode)
-		. = TRAPTYPE2ADDR (0x012        , O);
-		*(.ttable.O.unimplemented_LDD)
-		. = TRAPTYPE2ADDR (0x013        , O);
-		*(.ttable.O.unimplemented_STD)
-		/* Reserved       (0x014 - 0x01F, O)                         */
-		. = TRAPTYPE2ADDR (0x020        , O);
-		*(.ttable.O.fp_disabled)
-		. = TRAPTYPE2ADDR (0x021        , O);
-		*(.ttable.O.fp_exception_ieee_754)
-		. = TRAPTYPE2ADDR (0x022        , O);
-		*(.ttable.O.fp_exception_other)
-		. = TRAPTYPE2ADDR (0x023        , O);
-		*(.ttable.O.tag_overflow)
-		. = TRAPTYPE2ADDR (0x024        , O); /*  4 entries - 0x027  */
-		*(.ttable.O.clean_window)
-		. = TRAPTYPE2ADDR (0x028        , O);
-		*(.ttable.O.division_by_zero)
-		. = TRAPTYPE2ADDR (0x029        , O);
-		*(.ttable.O.internal_processor_error)
-		/* Reserved       (0x02A - 0x02F, O)                         */
-		. = TRAPTYPE2ADDR (0x030        , O);
-		*(.ttable.O.data_access_exception)
-		. = TRAPTYPE2ADDR (0x031        , O);
-		*(.ttable.O.data_access_MMU_miss)
-		. = TRAPTYPE2ADDR (0x032        , O);
-		*(.ttable.O.data_access_error)
-		. = TRAPTYPE2ADDR (0x033        , O);
-		*(.ttable.O.data_access_protection)
-		. = TRAPTYPE2ADDR (0x034        , O);
-		*(.ttable.O.mem_address_non_aligned)
-		. = TRAPTYPE2ADDR (0x035        , O);
-		*(.ttable.O.LDDF_mem_address_not_aligned)
-		. = TRAPTYPE2ADDR (0x036        , O);
-		*(.ttable.O.STDF_mem_address_not_aligned)
-		. = TRAPTYPE2ADDR (0x037        , O);
-		*(.ttable.O.privileged_action)
-		. = TRAPTYPE2ADDR (0x038        , O);
-		*(.ttable.O.LDQF_mem_address_not_aligned)
-		. = TRAPTYPE2ADDR (0x039        , O);
-		*(.ttable.O.STQF_mem_address_not_aligned)
-		/* Reserved       (0x03A - 0x03F, O)                         */
-		. = TRAPTYPE2ADDR (0x040        , O);
-		*(.ttable.O.async_data_error)
-		. = TRAPTYPE2ADDR (0x041        , O);
-		*(.ttable.O.interrupt_level_1)
-		. = TRAPTYPE2ADDR (0x042        , O);
-		*(.ttable.O.interrupt_level_2)
-		. = TRAPTYPE2ADDR (0x043        , O);
-		*(.ttable.O.interrupt_level_3)
-		. = TRAPTYPE2ADDR (0x044        , O);
-		*(.ttable.O.interrupt_level_4)
-		. = TRAPTYPE2ADDR (0x045        , O);
-		*(.ttable.O.interrupt_level_5)
-		. = TRAPTYPE2ADDR (0x046        , O);
-		*(.ttable.O.interrupt_level_6)
-		. = TRAPTYPE2ADDR (0x047        , O);
-		*(.ttable.O.interrupt_level_7)
-		. = TRAPTYPE2ADDR (0x048        , O);
-		*(.ttable.O.interrupt_level_8)
-		. = TRAPTYPE2ADDR (0x049        , O);
-		*(.ttable.O.interrupt_level_9)
-		. = TRAPTYPE2ADDR (0x04a        , O);
-		*(.ttable.O.interrupt_level_10)
-		. = TRAPTYPE2ADDR (0x04b        , O);
-		*(.ttable.O.interrupt_level_11)
-		. = TRAPTYPE2ADDR (0x04c        , O);
-		*(.ttable.O.interrupt_level_12)
-		. = TRAPTYPE2ADDR (0x04d        , O);
-		*(.ttable.O.interrupt_level_13)
-		. = TRAPTYPE2ADDR (0x04e        , O);
-		*(.ttable.O.interrupt_level_14)
-		. = TRAPTYPE2ADDR (0x04f        , O);
-		*(.ttable.O.interrupt_level_15)
-		/* Reserved       (0x050 - 0x05F, O)                         */
-
-#define TTABLE_TL O
-#include INC_CPU(ttable.ldi)                          /* CPU dependent traps */
-#undef TTABLE_TL
-
-		/**
-		 *  Spill/fill traps. (0x080 - 0x0FF)
-		 */
-
-		. = TRAPTYPE2ADDR (0x080        , O); /* 4  entries - 0x083  */
-		*(.ttable.O.spill_0_normal)
-		. = TRAPTYPE2ADDR (0x084        , O); /* 4  entries - 0x087  */
-		*(.ttable.O.spill_1_normal)
-		. = TRAPTYPE2ADDR (0x088        , O); /* 4  entries - 0x08A  */
-		*(.ttable.O.spill_2_normal)
-		. = TRAPTYPE2ADDR (0x08B        , O); /* 4  entries - 0x08F  */
-		*(.ttable.O.spill_3_normal)
-		. = TRAPTYPE2ADDR (0x090        , O); /* 4  entries - 0x093  */
-		*(.ttable.O.spill_4_normal)
-		. = TRAPTYPE2ADDR (0x094        , O); /* 4  entries - 0x097  */
-		*(.ttable.O.spill_5_normal)
-		. = TRAPTYPE2ADDR (0x098        , O); /* 4  entries - 0x09A  */
-		*(.ttable.O.spill_6_normal)
-		. = TRAPTYPE2ADDR (0x09B        , O); /* 4  entries - 0x09F  */
-		*(.ttable.O.spill_7_normal)
-		. = TRAPTYPE2ADDR (0x0A0        , O); /* 4  entries - 0x0A3  */
-		*(.ttable.O.spill_0_other)
-		. = TRAPTYPE2ADDR (0x0A4        , O); /* 4  entries - 0x0A7  */
-		*(.ttable.O.spill_1_other)
-		. = TRAPTYPE2ADDR (0x0A8        , O); /* 4  entries - 0x0AA  */
-		*(.ttable.O.spill_2_other)
-		. = TRAPTYPE2ADDR (0x0AB        , O); /* 4  entries - 0x0AF  */
-		*(.ttable.O.spill_3_other)
-		. = TRAPTYPE2ADDR (0x0B0        , O); /* 4  entries - 0x0B3  */
-		*(.ttable.O.spill_4_other)
-		. = TRAPTYPE2ADDR (0x0B4        , O); /* 4  entries - 0x0B7  */
-		*(.ttable.O.spill_5_other)
-		. = TRAPTYPE2ADDR (0x0B8        , O); /* 4  entries - 0x0BA  */
-		*(.ttable.O.spill_6_other)
-		. = TRAPTYPE2ADDR (0x0BB        , O); /* 4  entries - 0x0BF  */
-		*(.ttable.O.spill_7_other)
-		. = TRAPTYPE2ADDR (0x0C0        , O); /* 4  entries - 0x0C3  */
-		*(.ttable.O.fill_0_normal)
-		. = TRAPTYPE2ADDR (0x0C4        , O); /* 4  entries - 0x0C7  */
-		*(.ttable.O.fill_1_normal)
-		. = TRAPTYPE2ADDR (0x0C8        , O); /* 4  entries - 0x0CA  */
-		*(.ttable.O.fill_2_normal)
-		. = TRAPTYPE2ADDR (0x0CB        , O); /* 4  entries - 0x0CF  */
-		*(.ttable.O.fill_3_normal)
-		. = TRAPTYPE2ADDR (0x0D0        , O); /* 4  entries - 0x0D3  */
-		*(.ttable.O.fill_4_normal)
-		. = TRAPTYPE2ADDR (0x0D4        , O); /* 4  entries - 0x0D7  */
-		*(.ttable.O.fill_5_normal)
-		. = TRAPTYPE2ADDR (0x0D8        , O); /* 4  entries - 0x0DA  */
-		*(.ttable.O.fill_6_normal)
-		. = TRAPTYPE2ADDR (0x0DB        , O); /* 4  entries - 0x0DF  */
-		*(.ttable.O.fill_7_normal)
-		. = TRAPTYPE2ADDR (0x0E0        , O); /* 4  entries - 0x0E3  */
-		*(.ttable.O.fill_0_other)
-		. = TRAPTYPE2ADDR (0x0E4        , O); /* 4  entries - 0x0E7  */
-		*(.ttable.O.fill_1_other)
-		. = TRAPTYPE2ADDR (0x0E8        , O); /* 4  entries - 0x0EA  */
-		*(.ttable.O.fill_2_other)
-		. = TRAPTYPE2ADDR (0x0EB        , O); /* 4  entries - 0x0EF  */
-		*(.ttable.O.fill_3_other)
-		. = TRAPTYPE2ADDR (0x0F0        , O); /* 4  entries - 0x0F3  */
-		*(.ttable.O.fill_4_other)
-		. = TRAPTYPE2ADDR (0x0F4        , O); /* 4  entries - 0x0F7  */
-		*(.ttable.O.fill_5_other)
-		. = TRAPTYPE2ADDR (0x0F8        , O); /* 4  entries - 0x0FA  */
-		*(.ttable.O.fill_6_other)
-		. = TRAPTYPE2ADDR (0x0FB        , O); /* 4  entries - 0x0FF  */
-		*(.ttable.O.fill_7_other)
-
-		/**
-		 *  Software traps.   (0x100 - 0x17F)
-		 */
-
-		. = TRAPTYPE2ADDR (0x100	, O);
-		*(.ttable.O.trap_0x00)
-		. = TRAPTYPE2ADDR (0x101	, O);
-		*(.ttable.O.trap_0x01)
-		. = TRAPTYPE2ADDR (0x102	, O);
-		*(.ttable.O.trap_0x02)
-		. = TRAPTYPE2ADDR (0x103	, O);
-		*(.ttable.O.trap_0x03)
-		. = TRAPTYPE2ADDR (0x104	, O);
-		*(.ttable.O.trap_0x04)
-		. = TRAPTYPE2ADDR (0x105	, O);
-		*(.ttable.O.trap_0x05)
-		. = TRAPTYPE2ADDR (0x106	, O);
-		*(.ttable.O.trap_0x06)
-		. = TRAPTYPE2ADDR (0x107	, O);
-		*(.ttable.O.trap_0x07)
-		. = TRAPTYPE2ADDR (0x108	, O);
-		*(.ttable.O.trap_0x08)
-		. = TRAPTYPE2ADDR (0x109	, O);
-		*(.ttable.O.trap_0x09)
-		. = TRAPTYPE2ADDR (0x10a	, O);
-		*(.ttable.O.trap_0x0a)
-		. = TRAPTYPE2ADDR (0x10b	, O);
-		*(.ttable.O.trap_0x0b)
-		. = TRAPTYPE2ADDR (0x10c	, O);
-		*(.ttable.O.trap_0x0c)
-		. = TRAPTYPE2ADDR (0x10d	, O);
-		*(.ttable.O.trap_0x0d)
-		. = TRAPTYPE2ADDR (0x10e	, O);
-		*(.ttable.O.trap_0x0e)
-		. = TRAPTYPE2ADDR (0x10f	, O);
-		*(.ttable.O.trap_0x0f)
-		. = TRAPTYPE2ADDR (0x110	, O);
-		*(.ttable.O.trap_0x10)
-		. = TRAPTYPE2ADDR (0x111	, O);
-		*(.ttable.O.trap_0x11)
-		. = TRAPTYPE2ADDR (0x112	, O);
-		*(.ttable.O.trap_0x12)
-		. = TRAPTYPE2ADDR (0x113	, O);
-		*(.ttable.O.trap_0x13)
-		. = TRAPTYPE2ADDR (0x114	, O);
-		*(.ttable.O.trap_0x14)
-		. = TRAPTYPE2ADDR (0x115	, O);
-		*(.ttable.O.trap_0x15)
-		. = TRAPTYPE2ADDR (0x116	, O);
-		*(.ttable.O.trap_0x16)
-		. = TRAPTYPE2ADDR (0x117	, O);
-		*(.ttable.O.trap_0x17)
-		. = TRAPTYPE2ADDR (0x118	, O);
-		*(.ttable.O.trap_0x18)
-		. = TRAPTYPE2ADDR (0x119	, O);
-		*(.ttable.O.trap_0x19)
-		. = TRAPTYPE2ADDR (0x11a	, O);
-		*(.ttable.O.trap_0x1a)
-		. = TRAPTYPE2ADDR (0x11b	, O);
-		*(.ttable.O.trap_0x1b)
-		. = TRAPTYPE2ADDR (0x11c	, O);
-		*(.ttable.O.trap_0x1c)
-		. = TRAPTYPE2ADDR (0x11d	, O);
-		*(.ttable.O.trap_0x1d)
-		. = TRAPTYPE2ADDR (0x11e	, O);
-		*(.ttable.O.trap_0x1e)
-		. = TRAPTYPE2ADDR (0x11f	, O);
-		*(.ttable.O.trap_0x1f)
-		. = TRAPTYPE2ADDR (0x120	, O);
-		*(.ttable.O.trap_0x20)
-		. = TRAPTYPE2ADDR (0x121	, O);
-		*(.ttable.O.trap_0x21)
-		. = TRAPTYPE2ADDR (0x122	, O);
-		*(.ttable.O.trap_0x22)
-		. = TRAPTYPE2ADDR (0x123	, O);
-		*(.ttable.O.trap_0x23)
-		. = TRAPTYPE2ADDR (0x124	, O);
-		*(.ttable.O.trap_0x24)
-		. = TRAPTYPE2ADDR (0x125	, O);
-		*(.ttable.O.trap_0x25)
-		. = TRAPTYPE2ADDR (0x126	, O);
-		*(.ttable.O.trap_0x26)
-		. = TRAPTYPE2ADDR (0x127	, O);
-		*(.ttable.O.trap_0x27)
-		. = TRAPTYPE2ADDR (0x128	, O);
-		*(.ttable.O.trap_0x28)
-		. = TRAPTYPE2ADDR (0x129	, O);
-		*(.ttable.O.trap_0x29)
-		. = TRAPTYPE2ADDR (0x12a	, O);
-		*(.ttable.O.trap_0x2a)
-		. = TRAPTYPE2ADDR (0x12b	, O);
-		*(.ttable.O.trap_0x2b)
-		. = TRAPTYPE2ADDR (0x12c	, O);
-		*(.ttable.O.trap_0x2c)
-		. = TRAPTYPE2ADDR (0x12d	, O);
-		*(.ttable.O.trap_0x2d)
-		. = TRAPTYPE2ADDR (0x12e	, O);
-		*(.ttable.O.trap_0x2e)
-		. = TRAPTYPE2ADDR (0x12f	, O);
-		*(.ttable.O.trap_0x2f)
-		. = TRAPTYPE2ADDR (0x130	, O);
-		*(.ttable.O.trap_0x30)
-		. = TRAPTYPE2ADDR (0x131	, O);
-		*(.ttable.O.trap_0x31)
-		. = TRAPTYPE2ADDR (0x132	, O);
-		*(.ttable.O.trap_0x32)
-		. = TRAPTYPE2ADDR (0x133	, O);
-		*(.ttable.O.trap_0x33)
-		. = TRAPTYPE2ADDR (0x134	, O);
-		*(.ttable.O.trap_0x34)
-		. = TRAPTYPE2ADDR (0x135	, O);
-		*(.ttable.O.trap_0x35)
-		. = TRAPTYPE2ADDR (0x136	, O);
-		*(.ttable.O.trap_0x36)
-		. = TRAPTYPE2ADDR (0x137	, O);
-		*(.ttable.O.trap_0x37)
-		. = TRAPTYPE2ADDR (0x138	, O);
-		*(.ttable.O.trap_0x38)
-		. = TRAPTYPE2ADDR (0x139	, O);
-		*(.ttable.O.trap_0x39)
-		. = TRAPTYPE2ADDR (0x13a	, O);
-		*(.ttable.O.trap_0x3a)
-		. = TRAPTYPE2ADDR (0x13b	, O);
-		*(.ttable.O.trap_0x3b)
-		. = TRAPTYPE2ADDR (0x13c	, O);
-		*(.ttable.O.trap_0x3c)
-		. = TRAPTYPE2ADDR (0x13d	, O);
-		*(.ttable.O.trap_0x3d)
-		. = TRAPTYPE2ADDR (0x13e	, O);
-		*(.ttable.O.trap_0x3e)
-		. = TRAPTYPE2ADDR (0x13f	, O);
-		*(.ttable.O.trap_0x3f)
-		. = TRAPTYPE2ADDR (0x140	, O);
-		*(.ttable.O.trap_0x40)
-		. = TRAPTYPE2ADDR (0x141	, O);
-		*(.ttable.O.trap_0x41)
-		. = TRAPTYPE2ADDR (0x142	, O);
-		*(.ttable.O.trap_0x42)
-		. = TRAPTYPE2ADDR (0x143	, O);
-		*(.ttable.O.trap_0x43)
-		. = TRAPTYPE2ADDR (0x144	, O);
-		*(.ttable.O.trap_0x44)
-		. = TRAPTYPE2ADDR (0x145	, O);
-		*(.ttable.O.trap_0x45)
-		. = TRAPTYPE2ADDR (0x146	, O);
-		*(.ttable.O.trap_0x46)
-		. = TRAPTYPE2ADDR (0x147	, O);
-		*(.ttable.O.trap_0x47)
-		. = TRAPTYPE2ADDR (0x148	, O);
-		*(.ttable.O.trap_0x48)
-		. = TRAPTYPE2ADDR (0x149	, O);
-		*(.ttable.O.trap_0x49)
-		. = TRAPTYPE2ADDR (0x14a	, O);
-		*(.ttable.O.trap_0x4a)
-		. = TRAPTYPE2ADDR (0x14b	, O);
-		*(.ttable.O.trap_0x4b)
-		. = TRAPTYPE2ADDR (0x14c	, O);
-		*(.ttable.O.trap_0x4c)
-		. = TRAPTYPE2ADDR (0x14d	, O);
-		*(.ttable.O.trap_0x4d)
-		. = TRAPTYPE2ADDR (0x14e	, O);
-		*(.ttable.O.trap_0x4e)
-		. = TRAPTYPE2ADDR (0x14f	, O);
-		*(.ttable.O.trap_0x4f)
-		. = TRAPTYPE2ADDR (0x150	, O);
-		*(.ttable.O.trap_0x50)
-		. = TRAPTYPE2ADDR (0x151	, O);
-		*(.ttable.O.trap_0x51)
-		. = TRAPTYPE2ADDR (0x152	, O);
-		*(.ttable.O.trap_0x52)
-		. = TRAPTYPE2ADDR (0x153	, O);
-		*(.ttable.O.trap_0x53)
-		. = TRAPTYPE2ADDR (0x154	, O);
-		*(.ttable.O.trap_0x54)
-		. = TRAPTYPE2ADDR (0x155	, O);
-		*(.ttable.O.trap_0x55)
-		. = TRAPTYPE2ADDR (0x156	, O);
-		*(.ttable.O.trap_0x56)
-		. = TRAPTYPE2ADDR (0x157	, O);
-		*(.ttable.O.trap_0x57)
-		. = TRAPTYPE2ADDR (0x158	, O);
-		*(.ttable.O.trap_0x58)
-		. = TRAPTYPE2ADDR (0x159	, O);
-		*(.ttable.O.trap_0x59)
-		. = TRAPTYPE2ADDR (0x15a	, O);
-		*(.ttable.O.trap_0x5a)
-		. = TRAPTYPE2ADDR (0x15b	, O);
-		*(.ttable.O.trap_0x5b)
-		. = TRAPTYPE2ADDR (0x15c	, O);
-		*(.ttable.O.trap_0x5c)
-		. = TRAPTYPE2ADDR (0x15d	, O);
-		*(.ttable.O.trap_0x5d)
-		. = TRAPTYPE2ADDR (0x15e	, O);
-		*(.ttable.O.trap_0x5e)
-		. = TRAPTYPE2ADDR (0x15f	, O);
-		*(.ttable.O.trap_0x5f)
-		. = TRAPTYPE2ADDR (0x160	, O);
-		*(.ttable.O.trap_0x60)
-		. = TRAPTYPE2ADDR (0x161	, O);
-		*(.ttable.O.trap_0x61)
-		. = TRAPTYPE2ADDR (0x162	, O);
-		*(.ttable.O.trap_0x62)
-		. = TRAPTYPE2ADDR (0x163	, O);
-		*(.ttable.O.trap_0x63)
-		. = TRAPTYPE2ADDR (0x164	, O);
-		*(.ttable.O.trap_0x64)
-		. = TRAPTYPE2ADDR (0x165	, O);
-		*(.ttable.O.trap_0x65)
-		. = TRAPTYPE2ADDR (0x166	, O);
-		*(.ttable.O.trap_0x66)
-		. = TRAPTYPE2ADDR (0x167	, O);
-		*(.ttable.O.trap_0x67)
-		. = TRAPTYPE2ADDR (0x168	, O);
-		*(.ttable.O.trap_0x68)
-		. = TRAPTYPE2ADDR (0x169	, O);
-		*(.ttable.O.trap_0x69)
-		. = TRAPTYPE2ADDR (0x16a	, O);
-		*(.ttable.O.trap_0x6a)
-		. = TRAPTYPE2ADDR (0x16b	, O);
-		*(.ttable.O.trap_0x6b)
-		. = TRAPTYPE2ADDR (0x16c	, O);
-		*(.ttable.O.trap_0x6c)
-		. = TRAPTYPE2ADDR (0x16d	, O);
-		*(.ttable.O.trap_0x6d)
-		. = TRAPTYPE2ADDR (0x16e	, O);
-		*(.ttable.O.trap_0x6e)
-		. = TRAPTYPE2ADDR (0x16f	, O);
-		*(.ttable.O.trap_0x6f)
-
-		. = TRAPTYPE2ADDR (0x170	, O);
-		*(.ttable.O.trap_sys_kernel_interface)
-		. = TRAPTYPE2ADDR (0x171	, O);
-		*(.ttable.O.trap_sys_ipc)
-		. = TRAPTYPE2ADDR (0x172	, O);
-		*(.ttable.O.trap_sys_lipc)
-		. = TRAPTYPE2ADDR (0x173	, O);
-		*(.ttable.O.trap_sys_exchange_registers)
-		. = TRAPTYPE2ADDR (0x174	, O);
-		*(.ttable.O.trap_sys_thread_control)
-		. = TRAPTYPE2ADDR (0x175	, O);
-		*(.ttable.O.trap_sys_system_clock)
-		. = TRAPTYPE2ADDR (0x176	, O);
-		*(.ttable.O.trap_sys_thread_switch)
-		. = TRAPTYPE2ADDR (0x177	, O);
-		*(.ttable.O.trap_sys_schedule)
-		. = TRAPTYPE2ADDR (0x178	, O);
-		*(.ttable.O.trap_sys_unmap)
-		. = TRAPTYPE2ADDR (0x179	, O);
-		*(.ttable.O.trap_sys_space_control)
-		. = TRAPTYPE2ADDR (0x17a	, O);
-		*(.ttable.O.trap_sys_processor_control)
-		. = TRAPTYPE2ADDR (0x17b	, O);
-		*(.ttable.O.trap_sys_memory_control)
-#if CONFIG_KDB
-		. = TRAPTYPE2ADDR (0x17c	, O);
-		*(.ttable.O.trap_sys_kdebug_putc)
-		. = TRAPTYPE2ADDR (0x17d	, O);
-		*(.ttable.O.trap_sys_kdebug_getc)
-		. = TRAPTYPE2ADDR (0x17e	, O);
-		*(.ttable.O.trap_sys_kdebug_getc_nonblock)
-		. = TRAPTYPE2ADDR (0x17f	, O);
-		*(.ttable.O.trap_sys_enter_kdebug)
-#else /* !CONFIG_KDB */
-		. = TRAPTYPE2ADDR (0x17c	, O);
-		*(.ttable.O.trap_0x7c)
-		. = TRAPTYPE2ADDR (0x17d	, O);
-		*(.ttable.O.trap_0x7d)
-		. = TRAPTYPE2ADDR (0x17e	, O);
-		*(.ttable.O.trap_0x7e)
-		. = TRAPTYPE2ADDR (0x17f	, O);
-		*(.ttable.O.trap_0x7f)
-#endif /* CONFIG_KDB */
-
-		/**
-		 *  Reserved          (0x180 - 0x1FF) 
-		 */
-
-		/**********************
-		* Trap level (TL) > 0 *
-		**********************/
-
-		/**
-		 *  Hardware traps.   (0x200 - 0x27F)
-		 */
-
-		/* Reserved       (0x000        , X)                         */
-		. = TRAPTYPE2ADDR (0x001        , X);
-		*(.ttable.X.power_on_reset)
-		. = TRAPTYPE2ADDR (0x002        , X);
-		*(.ttable.X.watchdog_reset)
-		. = TRAPTYPE2ADDR (0x003        , X);
-		*(.ttable.X.externally_initiated_reset)
-		. = TRAPTYPE2ADDR (0x004        , X);
-		*(.ttable.X.software_initiated_reset)
-		. = TRAPTYPE2ADDR (0x005        , X);
-		*(.ttable.X.RED_state_exception)
-		/* Reserved       (0x006 - 0x007, X)                         */
-		. = TRAPTYPE2ADDR (0x008        , X);
-		*(.ttable.X.instruction_access_exception)
-		. = TRAPTYPE2ADDR (0x009        , X);
-		*(.ttable.X.instruction_access_MMU_miss)
-		. = TRAPTYPE2ADDR (0x00A        , X);
-		*(.ttable.X.instruction_access_error)
-		/* Reserved       (0x00B - 0x00F, X)                         */
-		. = TRAPTYPE2ADDR (0x010        , X);
-		*(.ttable.X.illegal_instruction)
-		. = TRAPTYPE2ADDR (0x011        , X);
-		*(.ttable.X.privileged_opcode)
-		. = TRAPTYPE2ADDR (0x012        , X);
-		*(.ttable.X.unimplemented_LDD)
-		. = TRAPTYPE2ADDR (0x013        , X);
-		*(.ttable.X.unimplemented_STD)
-		/* Reserved       (0x014 - 0x01F, X)                         */
-		. = TRAPTYPE2ADDR (0x020        , X);
-		*(.ttable.X.fp_disabled)
-		. = TRAPTYPE2ADDR (0x021        , X);
-		*(.ttable.X.fp_exception_ieee_754)
-		. = TRAPTYPE2ADDR (0x022        , X);
-		*(.ttable.X.fp_exception_other)
-		. = TRAPTYPE2ADDR (0x023        , X);
-		*(.ttable.X.tag_overflow)
-		. = TRAPTYPE2ADDR (0x024        , X); /*   4 entries - 0x027 */
-		*(.ttable.X.clean_window)
-		. = TRAPTYPE2ADDR (0x028        , X);
-		*(.ttable.X.division_by_zero)
-		. = TRAPTYPE2ADDR (0x029        , X);
-		*(.ttable.X.internal_processor_error)
-		/* Reserved       (0x02A - 0x02F, X)                         */
-		. = TRAPTYPE2ADDR (0x030        , X);
-		*(.ttable.X.data_access_exception)
-		. = TRAPTYPE2ADDR (0x031        , X);
-		*(.ttable.X.data_access_MMU_miss)
-		. = TRAPTYPE2ADDR (0x032        , X);
-		*(.ttable.X.data_access_error)
-		. = TRAPTYPE2ADDR (0x033        , X);
-		*(.ttable.X.data_access_protection)
-		. = TRAPTYPE2ADDR (0x034        , X);
-		*(.ttable.X.mem_address_non_aligned)
-		. = TRAPTYPE2ADDR (0x035        , X);
-		*(.ttable.X.LDDF_mem_address_not_aligned)
-		. = TRAPTYPE2ADDR (0x036        , X);
-		*(.ttable.X.STDF_mem_address_not_aligned)
-		. = TRAPTYPE2ADDR (0x037        , X);
-		*(.ttable.X.privileged_action)
-		. = TRAPTYPE2ADDR (0x038        , X);
-		*(.ttable.X.LDQF_mem_address_not_aligned)
-		. = TRAPTYPE2ADDR (0x039        , X);
-		*(.ttable.X.STQF_mem_address_not_aligned)
-		/* Reserved       (0x03A - 0x03F, X)                         */
-		. = TRAPTYPE2ADDR (0x040        , X);
-		*(.ttable.X.async_data_error)
-		. = TRAPTYPE2ADDR (0x041        , X); /*  15 entries - 0x04F */
-		*(.ttable.X.interrupt_level_n)
-		/* Reserved       (0x050 - 0x05F, X)                         */
-
-#define TTABLE_TL X
-#include INC_CPU(ttable.ldi)                          /* CPU dependent traps */
-#undef TTABLE_TL
-
-		/**
-		 *  Spill/fill traps. (0x280 - 0x2FF)
-		 */
-
-		. = TRAPTYPE2ADDR (0x080        , X); /* 4  entries - 0x083  */
-		*(.ttable.X.spill_0_normal)
-		. = TRAPTYPE2ADDR (0x084        , X); /* 4  entries - 0x087  */
-		*(.ttable.X.spill_1_normal)
-		. = TRAPTYPE2ADDR (0x088        , X); /* 4  entries - 0x08A  */
-		*(.ttable.X.spill_2_normal)
-		. = TRAPTYPE2ADDR (0x08B        , X); /* 4  entries - 0x08F  */
-		*(.ttable.X.spill_3_normal)
-		. = TRAPTYPE2ADDR (0x090        , X); /* 4  entries - 0x093  */
-		*(.ttable.X.spill_4_normal)
-		. = TRAPTYPE2ADDR (0x094        , X); /* 4  entries - 0x097  */
-		*(.ttable.X.spill_5_normal)
-		. = TRAPTYPE2ADDR (0x098        , X); /* 4  entries - 0x09A  */
-		*(.ttable.X.spill_6_normal)
-		. = TRAPTYPE2ADDR (0x09B        , X); /* 4  entries - 0x09F  */
-		*(.ttable.X.spill_7_normal)
-		. = TRAPTYPE2ADDR (0x0A0        , X); /* 4  entries - 0x0A3  */
-		*(.ttable.X.spill_0_other)
-		. = TRAPTYPE2ADDR (0x0A4        , X); /* 4  entries - 0x0A7  */
-		*(.ttable.X.spill_1_other)
-		. = TRAPTYPE2ADDR (0x0A8        , X); /* 4  entries - 0x0AA  */
-		*(.ttable.X.spill_2_other)
-		. = TRAPTYPE2ADDR (0x0AB        , X); /* 4  entries - 0x0AF  */
-		*(.ttable.X.spill_3_other)
-		. = TRAPTYPE2ADDR (0x0B0        , X); /* 4  entries - 0x0B3  */
-		*(.ttable.X.spill_4_other)
-		. = TRAPTYPE2ADDR (0x0B4        , X); /* 4  entries - 0x0B7  */
-		*(.ttable.X.spill_5_other)
-		. = TRAPTYPE2ADDR (0x0B8        , X); /* 4  entries - 0x0BA  */
-		*(.ttable.X.spill_6_other)
-		. = TRAPTYPE2ADDR (0x0BB        , X); /* 4  entries - 0x0BF  */
-		*(.ttable.X.spill_7_other)
-		. = TRAPTYPE2ADDR (0x0C0        , X); /* 4  entries - 0x0C3  */
-		*(.ttable.X.fill_0_normal)
-		. = TRAPTYPE2ADDR (0x0C4        , X); /* 4  entries - 0x0C7  */
-		*(.ttable.X.fill_1_normal)
-		. = TRAPTYPE2ADDR (0x0C8        , X); /* 4  entries - 0x0CA  */
-		*(.ttable.X.fill_2_normal)
-		. = TRAPTYPE2ADDR (0x0CB        , X); /* 4  entries - 0x0CF  */
-		*(.ttable.X.fill_3_normal)
-		. = TRAPTYPE2ADDR (0x0D0        , X); /* 4  entries - 0x0D3  */
-		*(.ttable.X.fill_4_normal)
-		. = TRAPTYPE2ADDR (0x0D4        , X); /* 4  entries - 0x0D7  */
-		*(.ttable.X.fill_5_normal)
-		. = TRAPTYPE2ADDR (0x0D8        , X); /* 4  entries - 0x0DA  */
-		*(.ttable.X.fill_6_normal)
-		. = TRAPTYPE2ADDR (0x0DB        , X); /* 4  entries - 0x0DF  */
-		*(.ttable.X.fill_7_normal)
-		. = TRAPTYPE2ADDR (0x0E0        , X); /* 4  entries - 0x0E3  */
-		*(.ttable.X.fill_0_other)
-		. = TRAPTYPE2ADDR (0x0E4        , X); /* 4  entries - 0x0E7  */
-		*(.ttable.X.fill_1_other)
-		. = TRAPTYPE2ADDR (0x0E8        , X); /* 4  entries - 0x0EA  */
-		*(.ttable.X.fill_2_other)
-		. = TRAPTYPE2ADDR (0x0EB        , X); /* 4  entries - 0x0EF  */
-		*(.ttable.X.fill_3_other)
-		. = TRAPTYPE2ADDR (0x0F0        , X); /* 4  entries - 0x0F3  */
-		*(.ttable.X.fill_4_other)
-		. = TRAPTYPE2ADDR (0x0F4        , X); /* 4  entries - 0x0F7  */
-		*(.ttable.X.fill_5_other)
-		. = TRAPTYPE2ADDR (0x0F8        , X); /* 4  entries - 0x0FA  */
-		*(.ttable.X.fill_6_other)
-		. = TRAPTYPE2ADDR (0x0FB        , X); /* 4  entries - 0x0FF  */
-		*(.ttable.X.fill_7_other)
-
-#if TTABLE_SHORT /* Are trap instructions not used in kernel? */
-
-		. = TRAPTYPE2ADDR (0x100        , X); /* End of Trap Table   */
-
-#else /* !TTABLE_SHORT */
-
-		/**
-		 *  Software traps.   (0x300 - 0x37F)
-		 */
-
-		. = TRAPTYPE2ADDR (0x100        , X); /* 128 entries - 0x17F  */
-		*(.ttable.X.trap_instruction)
-
-		/**
-		 *  Reserved          (0x380 - 0x3FF) 
-		 */
-
-		. = TRAPTYPE2ADDR (0x200        , X); /* End of Trap Table    */
-
-#endif /* TTABLE_SHORT */
diff --git a/kernel/src/arch/sparc64/types.h b/kernel/src/arch/sparc64/types.h
deleted file mode 100644
index ba531869..00000000
--- a/kernel/src/arch/sparc64/types.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     arch/sparc64/types.h
- * Description:   SPARC v9 specific types
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.2 2003/09/24 19:04:31 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__SPARC64__TYPES_H__
-#define __ARCH__SPARC64__TYPES_H__
-
-#define L4_64BIT
-#undef  L4_32BIT
-
-typedef unsigned int		__attribute__ ((__mode__(__DI__))) u64_t;
-typedef unsigned int		u32_t;
-typedef unsigned short		u16_t;
-typedef unsigned char		u8_t;
-
-typedef signed int 		__attribute__ ((__mode__(__DI__))) s64_t;
-typedef signed int		s32_t;
-typedef signed short		s16_t;
-typedef signed char		s8_t;
-
-
-/**
- * word_t: machine word wide unsigned int
- */
-typedef u64_t			word_t;
-
-
-#endif /* !__ARCH__SPARC64__TYPES_H__ */
diff --git a/kernel/src/arch/sparc64/ultrasparc/asi.h b/kernel/src/arch/sparc64/ultrasparc/asi.h
deleted file mode 100644
index 3ab906a1..00000000
--- a/kernel/src/arch/sparc64/ultrasparc/asi.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:   arch/sparc64/ultrasparc/asi.h
- * Description: UltraSPARC specific alternative space identifiers
- *              (ASIs).
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asi.h,v 1.4 2004/01/21 23:55:51 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__ULTRASPARC__ASI_H__
-#define __ARCH__SPARC64__ULTRASPARC__ASI_H__
-
-/* E-bit means accesses have side effects */
-
-#define ASI_PHYS_USE_EC        0x14 /* Physical, ext cachable                */
-#define ASI_PHYS_BYPASS_EC_E   0x15 /* Physical, E-bit                       */
-#define ASI_PHYS_USE_UE_L      0x1C /* Physical, ext cacheble, little endian */
-#define ASI_PHYS_BYPASS_EC_E_L 0x1D /* Physical, E-bit, little endian        */
-
-#define ASI_LSU_CONTROL_REG    0x45 /* Load/Store unit control register.     */
-
-#define ASI_NUCLEUS_QUAD_LDD   0x24 /* Atomic 128-bit load from nucleus      */
-
-/***********
-* MMU ASIs *
-***********/
-
-#define ASI_IMMU                0x50 /* Instruction-MMU main register space. */
-#define ASI_IMMU_TSB_8KB_PTR    0x51 /* I-MMU TSB 8KB pointer register.      */
-#define ASI_IMMU_TSB_64KB_PTR   0x52 /* I-MMU TSB 64KB pointer register.     */
-#define ASI_ITLB_DATA_IN        0x54 /* I-MMU TLB data in register.          */
-#define ASI_ITLB_DATA_ACCESS    0x55 /* I-MMU TLB data access register.      */
-#define ASI_ITLB_TAG_READ       0x56 /* I-MMU TLB tag read register.         */
-#define ASI_IMMU_DEMAP          0x57 /* I-MMU TLB demap.                     */
-
-#define ASI_DMMU                0x58 /* Data-MMU main register space.        */
-#define ASI_DMMU_TSB_8KB_PTR    0x59 /* D-MMU TSB 8KB pointer register.      */
-#define ASI_DMMU_TSB_64KB_PTR   0x5A /* D-MMU TSB 64KB pointer register.     */
-#define ASI_DMMU_TSB_DIRECT_PTR 0x5B /* D-MMU TSB direct pointer register.   */
-#define ASI_DTLB_DATA_IN        0x5C /* D-MMU TLB data in register.          */
-#define ASI_DTLB_DATA_ACCESS    0x5D /* D-MMU TLB data access register.      */
-#define ASI_DTLB_TAG_READ       0x5E /* D-MMU TLB tag read register.         */
-#define ASI_DMMU_DEMAP          0x5F /* D-MMU TLB demap.                     */
-
-/**
- *  I/D-MMU main register space.
- */
-
-// Accessable via both ASI_IMMU and ASI_DMMU.
-
-#define TSB_TAG_TARGET    0x00 /* I/D-MMU Tag Target register.               */
-#define TLB_SFSR          0x18 /* I/D-MMU Synchronous fault status regiser.  */
-#define TSB_REGISTER      0x28 /* I/D-MMU TSB register.                      */
-#define TLB_TAG_ACCESS    0x30 /* I/D-MMU TLB tag access register.           */
-
-// Accessable via ASI_DMMU only.
-
-#define TLB_SFAR          0x20 /* D-MMU Synchronous fault address register.  */
-#define VADDR_WATCHPOINT  0x38 /* D-MMU VA data watchpoint register.         */
-#define PADDR_WATCHPOINT  0x40 /* D-MMU PA data watchpoint register.         */
-
-// Unified, only accessable via ASI_DMMU only.
-
-#define PRIMARY_CONTEXT   0x08 /* I/D-MMU Primary context (ASID) register.   */
-#define SECONDARY_CONTEXT 0x10 /* I/D-MMU Secondary context (ASID) register. */
-
-
-#endif /* !__ARCH__SPARC64__ULTRASPARC__ASI_H__ */
diff --git a/kernel/src/arch/sparc64/ultrasparc/mmu.h b/kernel/src/arch/sparc64/ultrasparc/mmu.h
deleted file mode 100644
index 120a7e2a..00000000
--- a/kernel/src/arch/sparc64/ultrasparc/mmu.h
+++ /dev/null
@@ -1,490 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    arch/sparc64/ultrasparc/mmu.h
- * Description:  MMU specifics of the UltraSPARC CPU implmenetation
- *               of SPARC v9.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mmu.h,v 1.6 2004/02/22 23:04:20 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__ULTRASPARC__MMU_H__
-#define __ARCH__SPARC64__ULTRASPARC__MMU_H__
-
-#include <config.h>
-
-/*******************************************************************************
-* Notes:                                                                       *
-*                                                                              *
-* - UltraSPARC I/II support a 44 bit virtual address space while UltraSPARC    *
-* III supports the ful 64 bit address space. So we use a 3 and 5 level page    *
-* tables respectively. All support 4 page sizes of 8KB, 64KB, 512KB and 4MB.   *
-* All page table levels are 10 bits worth of VA indexing to have 1024 entries  *
-* except the leaf levels which are 11 bits and twice the size to accomidate    *
-* the shadow page table (SPT) for the mapping database making 4096 entires.    *
-*                                                                              *
-* - The UltraSPARC while using a software loaded TLB provides some support for *
-* a Translation Storage Buffer (TSB) which is effectively a software TLB. This *
-* support comes in the form of a precalculated hash index which can be used to *
-* provide indexing into seperate I/D-TSBs, which can be split 8K/64K page size *
-* support and even pseudo set-associative. Although the TLB entry doesn't      *
-* support orthogonal execute/read permissions, they can be encoded by setting  *
-* the I/D-TSB entries for the same page differently based on the permissions   *
-* defined by software. The TSB sizes supported are 512 - 64K entries.          *
-* We use seperate I/D-TSBs which are each split in to 8K/64K page size support *
-* regions. The 64K region also holds 512K and 4M page mappings.                *
-*                                                                              *
-* - The TSB is stored in the CPU local data and a pinned mapping for CPU local *
-*   data is used.                                                              *
-*                                                                              *
-* - Since the UltraSPARC MMU provides no way to access untranslated            *
-* instruction references when the MMU is enabled and only limited access to    *
-* untranslated data references (uncached or L2 cached only) certain pinning    *
-* guidelines must be followed: TLB-miss handler, TSB and linked data,          *
-* asyncronous trap handlers and data must all be pinned (locked) in the TLB.   *
-* In addition the TSB-miss handler and data, interrupt-vector handler and data *
-* must be pinned in the TSB. We handle this by using locked TLB entries for    *
-* the first 4MB (BOOTPAGE) of memory in both the I/D-TLBs. All kernel code and *
-* static are stored in this region and at initialisation time dynamically      *
-* allocated memory (for things like page tables) is only avaliable from this   *
-* area. Dynamic memory allocations after initialisation for things like page   *
-* tables may allocate memory outside of the pinned region. The result is that  *
-* page tables may produce TLB faults. The exception to this is the static      *
-* mappings of the kernel page table which are allocated out of the 4MB pinned  *
-* area.                                                                        *
-*                                                                              *
-*******************************************************************************/
-
-/* 4MB BOOTPAGE is used. */
-
-#define BOOTPAGE_PGSIZE size_4m
-#define BOOTPAGE_SIZE   (1 << 22)
-
-/* UltraSPARC page sizes and access bits */
-
-#define SPARC64_PAGE_BITS 13          /* 8KB base page size */
-#define SPARC64_PAGE_SIZE (1UL << 13)
-#define SPARC64_PAGE_MASK (~(SPARC64_PAGE_SIZE - 1))
-
-#define NUM_CONTEXTS    (1 << 13)         /* 13 bits of CONTEXT (ASID) tag. */
-#define NUCLEUS_CONTEXT 0                 /* Hardcoded to 0 on ultrasparc.  */
-#define INVALID_CONTEXT (NUM_CONTEXTS-1)  /* Used in invalid TSB entries.  */
-
-#define HW_VALID_PGSIZES ((1 << 13) | /*   8KB */ \
-			  (1 << 16) | /*  64KB */ \
-			  (1 << 19) | /* 512KB */ \
-			  (1 << 22))  /*   4MB */
-
-#define EXECUTE_ACCESS_BIT (1 << 0)
-#define WRITE_ACCESS_BIT   (1 << 1)
-#define READ_ACCESS_BIT    (1 << 2)
-
-#define HW_ACCESS_BITS (EXECUTE_ACCESS_BIT | /* eXecute independent   */ \
-			WRITE_ACCESS_BIT)    /* Write independent     */
-/* Read implied by write */
-/*  It seems you can't specify what other access bits a particular
- *  bit is dependent on. This seems a bit limiting.
- */
-
-/* UltraSPARC virtual address space sizes */
-
-#if (CONFIG_SPARC64_ULTRASPARC1 || CONFIG_SPARC64_ULTRASPARC2)
-
-#define SPARC64_VIRTUAL_ADDRESS_BITS  44
-#define SPARC64_PHYSICAL_ADDRESS_BITS 41
-
-/* Define the structure of the linear_ptab page table */
-#define HW_PGSHIFTS     {13, 16, 19, 22, 24, 34, 44}
-
-#define PT_LEVEL1ENTRIES (1 << 10)
-#define PT_LEVEL2ENTRIES (1 << 10)
-#define PT_LEVEL3ENTRIES (1 << (11 + 1 /* For shadow page tables. */))
-
-#define MDB_PGSHIFTS    {13, 16, 19, 22, 32, 41}
-#define MDB_NUM_PGSIZES 5
-
-/* Define the alignment required to avoid cache aliasing problems */
-#define SPARC64_ALIAS_BOUNDARY (1 << (SPARC64_PAGE_BITS+1))
-#define SPARC64_CACHE_ALIGN (((SPARC64_ALIAS_BOUNDARY/SPARC64_PAGE_SIZE)-1) \
-			     << SPARC64_PAGE_BITS)
-
-#elif (CONFIG_SPARC64_ULTRASPARC3)
-
-#define SPARC64_VIRTUAL_ADDRESS_BITS  64
-#define SPARC64_PHYSICAL_ADDRESS_BITS 43
-
-/* Define the structure of the linear_ptab page table */
-#define HW_PGSHIFTS     {13, 16, 19, 22, 24, 34, 44, 54, 64}
-
-#define PT_LEVEL1ENTRIES (1 << 10)
-#define PT_LEVEL2ENTRIES (1 << 10)
-#define PT_LEVEL3ENTRIES (1 << 10)
-#define PT_LEVEL4ENTRIES (1 << 10)
-#define PT_LEVEL5ENTRIES (1 << (11 + 1 /* For shadow page tables. */))
-
-#define MDB_PGSHIFTS    {13, 16, 19, 22, 32, 43} 
-#define MDB_NUM_PGSIZES 6
-
-/* Define the alignment required to avoid cache aliasing problems */
-#define SPARC64_ALIAS_BOUNDARY (1 << (SPARC64_PAGE_BITS+1))
-#define SPARC64_CACHE_ALIGN (((SPARC64_ALIAS_BOUNDARY/SPARC64_PAGE_SIZE)-1) \
-			     << SPARC64_PAGE_BITS)
-
-#else
-
-#error Unknown UltraSPARC CPU defined!
-
-#endif /* CONFIG_SPARC64_ULTRASPARC* */
-
-/* UltraSPARCs ASI specifics */
-
-#define SPARC64_HAS_ASI_NUCLEUS 1 /* UltraSPARC supports a NUCLEUS context */
-
-#ifndef ASSEMBLY /* We don't want the TTE stuff in non C/C++ files */
-
-#include <types.h>
-#include <asid.h>
-
-#include INC_CPU(tlb.h)
-#include INC_ARCH(asi.h)
-#include INC_ARCH(types.h)
-
-/**
- *  Context Register (PRIMARY/SECONDARY/NUCLEUS)
- */
-class context_t {
-public:
-    hw_asid_t context;
-
-public:
-    /* Context regiters. */
-    enum context_e {
-	primary   = 0,
-	secondary = 1,
-	nucleus   = 2, /* Doubles to indicate neither primary/secondary contexts. */
-	reserved  = 3  /* We use it to indicate both primary/secondary contexts.  */
-    };
-
-public:
-    /* Context management. */
-    void set(context_e context_register)
-    {
-	if(context_register == primary || context_register == reserved) {
-
-	    __asm__ __volatile__("stxa\t%0, [%1] %2\n\t"
-				 "membar    #Sync"
-				 : /* No outputs */
-				 : "r" (context),         // %0
-				 "r" (PRIMARY_CONTEXT), // %1
-				 "i" (ASI_DMMU));       // %2
-
-	} else if(context_register == secondary || context_register == reserved) {
-
-	    __asm__ __volatile__("stxa\t%0, [%1] %2\n\t"
-				 "membar    #Sync"
-				 : /* No outputs */
-				 : "r" (context),           // %0
-				 "r" (SECONDARY_CONTEXT), // %1
-				 "i" (ASI_DMMU));         // %2
-
-	} else {ASSERT(false);} // Nucleus context is always 0.
-
-    } // set()
-
-    void get(context_e context_register)
-    {
-	if(context_register == primary || context_register == reserved) {
-
-	    __asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-				 : "=r" (context)         // %0
-				 : "r" (PRIMARY_CONTEXT), // %1
-				 "i" (ASI_DMMU));       // %2
-
-	} else if(context_register == secondary || context_register == reserved) {
-
-	    __asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-				 : "=r" (context)           // %0
-				 : "r" (SECONDARY_CONTEXT), // %1
-				 "i" (ASI_DMMU));         // %2
-
-	} else {
-	    context = 0; // Nucleus context is always 0.
-	}
-
-    } // get()
-
-    /* Printing. */
-
-    void print(context_e context_register)
-    {
-	ASSERT(context_register != nucleus && context_register != reserved);
-
-	printf("%s: 0x%x",
-	       context_register == primary ? "Primary" : "Secondary", context);
-
-    } // print()
-
-}; // context_t
-
-/**
- *  Synchronous Fault Status Register (SFSR)
- */
-class sfsr_t {
-public:
-    union {
-	u32_t raw;
-	struct {
-	    BITFIELD10(u32_t,
-		       fv    : 1, /* Fault Valid.              */
-		       ow    : 1, /* Fault status overwritten. */
-		       w     : 1, /* Write fault.              */
-		       pr    : 1, /* Fault privileged mode.    */
-		       ct    : 2, /* Faulting context.         */
-		       e     : 1, /* Side effect bits status.  */
-		       ft    : 7, /* Fault type.               */
-		       __rv1 : 2, /* Unused.                   */
-		       asi   : 8, /* Fault ASI.                */
-		       __rv2 : 8  /* Unused.                   */
-
-		      ) // BITFIELD10()
-	} sfsr;
-
-    }; // union
-
-public:	
-    /* Fault status. */
-    enum status_e {
-	none = 0, /* Neither.                  */
-	data = 1, /* Data fault status.        */
-	inst = 2, /* Instruction fault status. */
-	both = 3  /* Both fault status.        */
-    };
-
-public:    
-    /* SFSR management. */
-
-    void get(status_e status)
-    {
-	if(status & data) { // D-SFSR
-
-	    __asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-				 : "=r" (sfsr)       // %0
-				 : "r" (TLB_SFSR),   // %1
-				 "i" (ASI_DMMU));  // %2
-
-	} else if(status & inst) { // I-SFSR
-
-	    __asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-				 : "=r" (sfsr)       // %0
-				 : "r" (TLB_SFSR),   // %1
-				 "i" (ASI_IMMU));  // %2
-
-	} else {ASSERT(false);}
-
-    } // get()
-
-    /* Printing. */
-
-    void print(status_e status)
-    {
-	ASSERT(status != none && status != both);
-
-	printf("%s: %c%c%c%c%c %s FT 0x%x ASI 0x%x\n",
-	       status == data ? "D-sfsr" : "I-sfsr",
-	       sfsr.fv ? 'V' : 'v',
-	       sfsr.ow ? 'O' : 'o',
-	       sfsr.w  ? 'W' : 'w',
-	       sfsr.pr ? 'P' : 'p',
-	       sfsr.e  ? 'E' : 'e',
-	       (sfsr.ct == context_t::primary) ? "Prim" :
-	       ((sfsr.ct == context_t::secondary) ? "Sec" : "Nucl"),
-	       sfsr.ft,
-	       sfsr.asi);
-
-    } // print()
-
-}; // sfsr_t
-
-/**
- *  Memory Management Unit (MMU)
- */
-class mmu_t {
-public:
-    context_t primary;
-    context_t secondary;
-    sfsr_t d_sfsr;
-    sfsr_t i_sfsr;
-
-public:
-    /* MMU general management. */
-
-    static void init(void)
-    {
-	tlb_t tlb_entry;
-
-	tlb_entry.clear();
-	for(int i = 0; i < TLB_ENTRIES; i++) {
-	    if(i != TLB_KERNEL_LOCKED) {tlb_entry.set(i, tlb_t::all_tlb);}
-	}
-
-	// Initialise TSB?
-
-    } // init()
-
-    /* Return the contents of the fault address register */
-    static addr_t get_d_sfar(void)
-    {
-	addr_t sfar;
-	__asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-			     : "=r" (sfar)       // %0
-			     : "r" (TLB_SFAR),   // %1
-			     "i" (ASI_DMMU));  // %2
-	return sfar;
-    }
-
-    /* TLB unmapping. */
-    /* Unmap a whole context from TLB(s). */
-    static void unmap(hw_asid_t context, tlb_t::tlb_e tlb)
-    {
-	context_t old_secondary, new_secondary;
-
-	/* Save the secondary context and set it to the asid to be unmapped. */
-	old_secondary.get(context_t::secondary);
-	new_secondary.context = context;
-	new_secondary.set(context_t::secondary);
-
-	/* Do the demap operations. */
-	word_t demap_op = (1 << 6) | (context_t::secondary << 4);
-	if(tlb & tlb_t::d_tlb) {
-	    __asm__ __volatile__("stxa	%%g0, [ %0 ] %1"
-				 :: "r" (demap_op), "i" (ASI_DMMU_DEMAP));
-	}
-	if(tlb & tlb_t::i_tlb) {
-	    __asm__ __volatile__("stxa	%%g0, [ %0 ] %1"
-				 :: "r" (demap_op), "i" (ASI_IMMU_DEMAP));
-	}
-
-	/* Restore the secondary context. */
-	old_secondary.set(context_t::secondary);
-    } // unmap(context, type, tlb)
-
-    /* Unmap a single entry from TLB(s). */
-    static void unmap(hw_asid_t context, addr_t page, tlb_t::tlb_e tlb)
-    {
-	context_t old_secondary, new_secondary;
-
-	/* Save the secondary context and set it to the asid to be unmapped. */
-	old_secondary.get(context_t::secondary);
-	new_secondary.context = context;
-	new_secondary.set(context_t::secondary);
-
-	/* Do the demap operations. */
-	word_t demap_op = ((word_t)page & SPARC64_PAGE_MASK) | (context_t::secondary << 4);
-	if(tlb & tlb_t::d_tlb) {
-	    __asm__ __volatile__("stxa	%%g0, [ %0 ] %1"
-				 :: "r" (demap_op), "i" (ASI_DMMU_DEMAP));
-	}
-	if(tlb & tlb_t::i_tlb) {
-	    __asm__ __volatile__("stxa	%%g0, [ %0 ] %1"
-				 :: "r" (demap_op), "i" (ASI_IMMU_DEMAP));
-	}
-
-	/* Restore the secondary context. */
-	old_secondary.set(context_t::secondary);
-    } // unmap(context, type, page, tlb);
-
-    /* Printing. */
-
-    /* Dump MMU state. */
-    void print(sfsr_t::status_e status, context_t::context_e context)
-    {
-	/* Print I/D-SFSRs */
-	if(status & sfsr_t::data) {
-	    d_sfsr.get(sfsr_t::data);
-
-	    d_sfsr.print(sfsr_t::data);
-	}
-	if(status & sfsr_t::inst) {
-	    i_sfsr.get(sfsr_t::inst);
-
-	    i_sfsr.print(sfsr_t::inst);
-	}
-
-	/* Print primary/secondary contexts. */
-	if(context == context_t::primary || context == context_t::reserved) {
-	    primary.get(context_t::primary);
-
-	    primary.print(context_t::primary), printf(" ");
-	}
-	if(context == context_t::secondary || context == context_t::reserved) {
-	    secondary.get(context_t::secondary);
-
-	    secondary.print(context_t::secondary), printf(" ");
-	}
-
-	printf("\n");
-
-	/* Print data fault address register */
-	printf("D-SFAR: %p\n", get_d_sfar());
-
-    } // print(status, context)
-
-    /* Dump all TLB(s) entries. */
-    static void print(tlb_t::tlb_e tlb)
-    {
-	ASSERT(tlb != tlb_t::no_tlb);
-
-	if(tlb & tlb_t::d_tlb) {
-	    for(int i = 0; i < TLB_ENTRIES; i++) {
-		print(i, tlb_t::d_tlb);
-	    }
-	}
-	if(tlb & tlb_t::i_tlb) {
-	    for(int i = 0; i < TLB_ENTRIES; i++) {
-		print(i, tlb_t::i_tlb);
-	    }
-	}
-
-    } // print(tlb)
-
-    /* Dump a single TLB entry. */
-    static void print(u16_t entry, tlb_t::tlb_e tlb)
-    {
-	tlb_t tlb_entry;
-
-	tlb_entry.get(entry, tlb);
-
-	printf("%c-TLB[%d] ", (tlb & tlb_t::d_tlb) ? 'D' : 'I', entry);
-	tlb_entry.print();
-	printf("\n");
-
-    } // print(entry, tlb)
-}; // mmu_t
-
-#endif /* !ASSEMBLY */
-
-
-#endif /* !__ARCH__SPARC64__ULTRASPARC__MMU_H__ */
diff --git a/kernel/src/arch/sparc64/ultrasparc/pgent.h b/kernel/src/arch/sparc64/ultrasparc/pgent.h
deleted file mode 100644
index b6332c70..00000000
--- a/kernel/src/arch/sparc64/ultrasparc/pgent.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2004, University of New South Wales
- *
- * File path:	arch/sparc64/ultrasparc/pgent.h
- * Description:	Wrapper for pgent_t and its inline methods
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: pgent.h,v 1.4 2004/01/30 06:18:06 philipd Exp $
- *
- ***************************************************************************/
-
-#ifndef __ARCH__SPARC64__ULTRASPARC__PGENT_H__
-#define __ARCH__SPARC64__ULTRASPARC__PGENT_H__
-
-#include INC_GLUE_API_CPU(pgent.h)
-#include INC_GLUE_API_CPU(pgent_inline.h)
-
-#endif	/* !__ARCH__SPARC64__ULTRASPARC__PGENT_H__ */
diff --git a/kernel/src/arch/sparc64/ultrasparc/registers.h b/kernel/src/arch/sparc64/ultrasparc/registers.h
deleted file mode 100644
index 8cd8fd66..00000000
--- a/kernel/src/arch/sparc64/ultrasparc/registers.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:   arch/sparc64/ultrasparc/registers.h
- * Description: Describes the register specifics of the UltraSPARC
- *              family of SPARC v9 cpus.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: registers.h,v 1.4 2004/01/21 23:52:45 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__ULTRASPARC__REGISTERS_H__
-#define __ARCH__SPARC64__ULTRASPARC__REGISTERS_H__
-
-/********************
-* Integer Registers *
-********************/
-
-/* The number of register windows is CPU specific */
-
-#if (CONFIG_SPARC64_ULTRASPRC1 || CONFIG_SPARC64_ULTRASPARC2)
-
-#define NWINDOWS 8  
-
-#elif (CONFIG_SPARC64_ULTRASPARC3)
-
-#define NWINDOWS 16
-
-#else
-
-#error Unknown UltraSPARC CPU defined!
-
-#endif /* CONFIG_SPARC64_ULTRASPARC* */
-
-/***********************
-* Privileged Registers *
-***********************/
-
-/**
- *  Processor state register (PSTATE) 
- */
-
-#define PSTATE_IG (1 << 11) /* Interrupt globals enabled. */
-#define PSTATE_MG (1 << 10) /* MMU globals enabled.       */
-
-/* PSTATE_MM, Memory model */
-#define PSTATE_PSO  (1 << 6)  /* Partial store order, implemented.  */
-#define PSTATE_RMO  (2 << 6)  /* Relaxed memory order, implemented. */
-
-/* PID0 and PID1 definitions. */
-
-#define PSTATE_PID0 mg /* Use MMU global registers.       */
-#define PSTATE_PID1 ig /* Use Interrupt global registers. */
-
-#define PSTATE_PID0_CHAR() (pstate.mg ? 'M' : 'm')
-#define PSTATE_PID1_CHAR() (pstate.ig ? 'I' : 'i')
-
-/* User-modifiable PSTATE bits */
-#define PSTATE_USER_MASK (PSTATE_CLE)
-
-/* Maximum value of the trap level register (TL). This is defined for all
- * SPARCv9 CPUs but the value is UltraSPARC specific. */
-#define MAXTL 5
-
-#endif /* !__ARCH__SPARC64__ULTRASPARC__REGISTERS_H__ */
diff --git a/kernel/src/arch/sparc64/ultrasparc/tlb.h b/kernel/src/arch/sparc64/ultrasparc/tlb.h
deleted file mode 100644
index aba3feb7..00000000
--- a/kernel/src/arch/sparc64/ultrasparc/tlb.h
+++ /dev/null
@@ -1,312 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    arch/sparc64/ultrasparc/tlb.h
- * Description:  TLB class for the UltraSPARC CPU implmenetation
- *               of SPARC v9.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tlb.h,v 1.4 2004/02/22 23:07:35 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__ULTRASPARC__TLB_H__
-#define __ARCH__SPARC64__ULTRASPARC__TLB_H__
-
-#ifndef ASSEMBLY
-
-#include <types.h>
-#include <asid.h>
-
-#include INC_ARCH(asi.h)
-
-/**************************************************************************
- * Notes: Currently only looked at the UltraSPARC I/II TLB. UltraSPARC III *
- * support will require modifications.                                     *
- * See the UltraSPARC manuals for details of fields.                       *
- **************************************************************************/
-
-#define TLB_ENTRIES 64 /* UltraSPARC I/II have 64 entry I/D-TLBs. */
-
-#define TLB_DATA_ENTRY                                                         \
-BITFIELD17(u64_t,                                                            \
-	   global        : 1,  /* Is this mapping global to all spaces. */   \
-	   tlb_writable  : 1,  /* TLB write access bit.                 */   \
-	   privileged    : 1,  /* Is this a kernel only mapping.        */   \
-	   side_effect   : 1,  /* Is this an I/O style mapping.         */   \
-	   cache_attrib  : 2,  /* See cache_attrib_e.                   */   \
-	   tlb_lock      : 1,  /* TTE locked into TLB once loaded.      */   \
-	   access_bits   : 3,  /* Page is r/w/x.        Ignored by TLB. */   \
-	   ref_bits      : 3,  /* Page has been r/w/x.  Ignored by TLB. */   \
-	   pfn           : 28, /* Physical Frame Number.                */   \
-	   __rv1         : 9,  /* Reserved by the CPU implementation.   */   \
-	   __rv2         : 4,  /* Defined by pgent_t in INC_CPU(pgent.h)*/   \
-	   __spare       : 4,  /* Can use later.        Ignored by TLB. */   \
-	   tsb_lock      : 1,  /* TTE locked into TSB.  Ignored by TLB. */   \
-	   invert_endian : 1,  /* Invert endianess of mapping.          */   \
-	   no_fault_only : 1,  /* Must be accessed via NO_FAULT ASIs.   */   \
-	   size          : 2,  /* See pgsize_e below.                   */   \
-	   tlb_valid     : 1)  /* DTLB read bit, ITLB execute bit.      */
-
-
-/* Location (TLB entry) of pinned kernel mappings in the TLB. */
-#define TLB_KERNEL_LOCKED 0
-
-/**
- *  Manages I/D-TLB entries.
- */
-class tlb_t {
-private:
-    /* The TAG/CAM field of a TLB entry. */
-    union {
-	u64_t tag_raw;
-	struct {
-	    BITFIELD2(u64_t,
-		      context : 13, /* Context identifier (ASID). */
-		      vpn     : 51  /* Virtual page number.       */
-
-		     ) // BITFIELD2()
-	} tag;
-
-    }; // union
-
-    /* The DATA/RAM field of a TLB entry. */
-    union {
-	u64_t data_raw;
-	struct {
-	    TLB_DATA_ENTRY
-	} data;
-
-    }; // union
-
-public:  
-    /* Which hardware TLB. */
-    enum tlb_e {
-	no_tlb  = 0, /* No TLB.   */
-	d_tlb   = 1, /* D-TLB.    */
-	i_tlb   = 2, /* I-TLB.    */
-	all_tlb = 3  /* All TLBs. */
-    };
-
-    /* Caching attributes. */
-    enum cache_attrib_e {
-	uncached  = 0, /* Totally uncached.                          */
-	cache_phy = 2, /* Cachable in physically tagged caches only. */
-	cache_vir = 3  /* Cachable in all caches.                    */
-    };
-
-    /* Page sizes. */
-    enum pgsize_e {
-	size_8k   = 0,
-	size_64k  = 1,
-	size_512k = 2,
-	size_4m   = 3
-    };
-
-public:
-
-    /* I/D-TLB entry management. */
-
-    /* Sets an entry in the D-TLB and/or I-TLB. */
-    void set(u16_t entry, tlb_e tlb)
-    {
-	//ASSERT(tlb != no_tlb);
-	//ASSERT(entry < TLB_ENTRIES);
-
-	if(tlb & d_tlb) { // D-TLB entry.
-	    __asm__ __volatile__("stxa\t%0, [%1] %2\n"
-				 "stxa\t%3, [%4] %5\n"
-				 : /* no outputs */
-				 : "r" (tag_raw),               // %0
-				   "r" (TLB_TAG_ACCESS),        // %1
-				   "i" (ASI_DMMU),              // %2 
-				   "r" (data_raw),              // %3
-				   "r" (entry << 3),            // %4 (3 LSB are zero)
-				   "i" (ASI_DTLB_DATA_ACCESS)); // %5
-	}
-	if(tlb & i_tlb) { // I-TLB entry.
-	    __asm__ __volatile__("stxa\t%0, [%1] %2\n"
-				 "stxa\t%3, [%4] %5\n"
-				 : /* no outputs */
-				 : "r" (tag_raw),               // %0
-				   "r" (TLB_TAG_ACCESS),        // %1
-				   "i" (ASI_IMMU),              // %2 
-				   "r" (data_raw),              // %3
-				   "r" (entry << 3),            // %4 (3 LSB are zero)
-				   "i" (ASI_ITLB_DATA_ACCESS)); // %5
-	}
-
-    } // set()
-
-    /* Sets an entry in the D-TLB and/or I-TLB using the CPU's replacement
-     * algorithm.
-     */
-    void set(tlb_e tlb)
-    {
-	// ASSERT(tlb != no_tlb);
-	if(tlb & d_tlb) { // D-TLB entry.
-	    __asm__ __volatile__("stxa\t%0, [%1] %2\n"
-				 "stxa\t%3, [%%g0] %4\n"
-				 : /* no outputs */
-				 : "r" (tag_raw),               // %0
-				   "r" (TLB_TAG_ACCESS),        // %1
-				   "i" (ASI_DMMU),              // %2 
-				   "r" (data_raw),              // %3
-				   "i" (ASI_DTLB_DATA_IN));     // %4
-	}
-	if(tlb & i_tlb) { // I-TLB entry.
-	    __asm__ __volatile__("stxa\t%0, [%1] %2\n"
-				 "stxa\t%3, [%%g0] %4\n"
-				 : /* no outputs */
-				 : "r" (tag_raw),               // %0
-				   "r" (TLB_TAG_ACCESS),        // %1
-				   "i" (ASI_IMMU),              // %2 
-				   "r" (data_raw),              // %3
-				   "i" (ASI_ITLB_DATA_IN));     // %4
-	}
-    }
-
-    /* Get an entry from either D-TLB or I-TLB. */
-    void get(u16_t entry, tlb_e tlb)
-    {
-	ASSERT(entry < TLB_ENTRIES);
-
-	switch (tlb) {
-	case d_tlb:
-	__asm__ __volatile__("ldxa\t[%2] %3, %0\n"
-			     "ldxa\t[%2] %4, %1\n"
-			     : "=r" (data_raw),            // %0
-			       "=r" (tag_raw)              // %1
-			     : "r" (entry << 3),           // %2 (3 LSB are zero)
-			       "i" (ASI_DTLB_DATA_ACCESS), // %3
-			       "i" (ASI_DTLB_TAG_READ));   // %4
-	break;
-	case i_tlb:
-	__asm__ __volatile__("ldxa\t[%2] %3, %0\n"
-			     "ldxa\t[%2] %4, %1\n"
-			     : "=r" (data_raw),            // %0
-			       "=r" (tag_raw)              // %1
-			     : "r" (entry << 3),           // %2 (3 LSB are zero)
-			       "i" (ASI_ITLB_DATA_ACCESS), // %3
-			       "i" (ASI_ITLB_TAG_READ));   // %4
-	break;
-	default:
-	ASSERT(false);
-	}
-
-    } // get()
-
-    static word_t get_tag_access(tlb_e tlb) {
-	word_t access_reg = 0;
-
-	if(tlb == d_tlb) { // D-TLB access register.
-	    __asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-				 : "=r" (access_reg)            // %0
-				 : "r" (TLB_TAG_ACCESS),        // %1
-				   "i" (ASI_DMMU));             // %2 
-	} else if(tlb == i_tlb) { // I-TLB access register.
-	    __asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-				 : "=r" (access_reg)            // %0
-				 : "r" (TLB_TAG_ACCESS),        // %1
-				   "i" (ASI_IMMU));             // %2 
-	}
-
-	return access_reg;
-    }
-
-    /* Tag field manipulation. */
-
-    void set_va(addr_t vaddr) {tag.vpn = (u64_t)vaddr >> SPARC64_PAGE_BITS;}
-    void set_asid(hw_asid_t asid) {tag.context = (u64_t)asid;}
-    addr_t get_va(void) {return (addr_t)(tag.vpn << SPARC64_PAGE_BITS);}
-    hw_asid_t get_asid(void) {return (hw_asid_t)tag.context;}
-
-    /* Data field manipulation. */
-
-    void set_global(bool g) {data.global = g;}
-    void set_writable(bool w) {data.tlb_writable = w;}
-    void set_privileged(bool p) {data.privileged = p;}
-    void set_side_effect(bool e) {data.side_effect = e;}
-    void set_lock(bool l) {data.tlb_lock = l;}
-    void set_invert_endian(bool i) {data.invert_endian = i;}
-    void set_no_fault_only(bool n) {data.no_fault_only = n;}
-    void set_valid(bool v) {data.tlb_valid = v;}
-    void set_size(pgsize_e size) {data.size = size;}
-    void set_cache_attrib(cache_attrib_e attrib)
-    {
-	data.cache_attrib = attrib;
-    }
-    void set_pa(addr_t paddr) {data.pfn = (u64_t)paddr >> SPARC64_PAGE_BITS;}
-    bool get_global(void) {return (bool)data.global;} 
-    bool get_writable(void) {return (bool)data.tlb_writable;}
-    bool get_privileged(void) {return (bool)data.privileged;}
-    bool get_side_effect(void) {return (bool)data.side_effect;}
-    bool get_lock(void) {return (bool)data.tlb_lock;}
-    bool get_invert_endian(void) {return (bool)data.invert_endian;}
-    bool get_no_fault_only(void) {return (bool)data.no_fault_only;}
-    bool get_valid(void) {return (bool)data.tlb_valid;}
-    pgsize_e get_size(void) {return (pgsize_e)data.size;}
-    cache_attrib_e get_cache_attrib(void)
-    {
-	return (cache_attrib_e)data.cache_attrib;
-    }
-    addr_t get_pa(void) {return (addr_t)(data.pfn << SPARC64_PAGE_BITS);}
-
-    /* Invalid TLB entry. */
-
-    void clear(void)
-    {
-	data_raw = 0;
-	tag_raw = 0;
-    }
-
-    /* Printing. */
-
-    void print(void)
-    {
-	printf("va: 0x%lx \tasid: 0x%x \tpa: 0x%lx \t%c%c%c%c%c%c%c%c CA:%d %s",
-	       (word_t)get_va(),
-	       (word_t)get_asid(),
-	       (word_t)get_pa(),
-	       get_global()        ? 'G' : 'g',
-	       get_writable()      ? 'W' : 'w',
-	       get_privileged()    ? 'P' : 'p',
-	       get_side_effect()   ? 'E' : 'e',
-	       get_lock()          ? 'L' : 'l',
-	       get_invert_endian() ? 'I' : 'i',
-	       get_no_fault_only() ? 'N' : 'n',
-	       get_valid()         ? 'V' : 'v',
-	       (int)get_cache_attrib(),
-	       (get_size() == size_8k)     ? "8KB" :
-	       ((get_size() == size_64k)   ? "64KB" :
-		((get_size() == size_512k) ? "512KB" : "4MB")));
-
-    } // print()
-
-}; // tlb_t
-
-#endif /* !ASSEMBLY */
-
-
-#endif /* !__ARCH__SPARC64__ULTRASPARC__TLB_H__ */
diff --git a/kernel/src/arch/sparc64/ultrasparc/tsb.h b/kernel/src/arch/sparc64/ultrasparc/tsb.h
deleted file mode 100644
index 9a0fc43a..00000000
--- a/kernel/src/arch/sparc64/ultrasparc/tsb.h
+++ /dev/null
@@ -1,447 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    arch/sparc64/ultrasparc/tsb.h
- * Description:  TSB class for the UltraSPARC CPU implmenetation
- *               of SPARC v9. The Translation Storage Buffer (TSB)
- *               is basically a software TLB.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tsb.h,v 1.4 2004/05/21 02:34:52 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__SPARC64__ULTRASPARC__TSB_H__
-#define __ARCH__SPARC64__ULTRASPARC__TSB_H__
-
-#include <debug.h>
-
-#include INC_CPU(tlb.h)
-
-/***************************************************************************
- * Notes: The TSB is where the MMU's 'fast' trap handlers look to handle    *
- * TLB faults. In the advent of a TSB miss, etc these inline handlers fall  *
- * back to C++ code that accesses the page tables and generate page faults, *
- * etc. The TSB field vpn_short does not contain bits vpn[21:13] as these   *
- * are implied by the TSB index.                                            *
- ***************************************************************************/
-
-#warning awiggins (02-09-03): Should make TSB_ARRAY_BITS a configuration option.
-#define TSB_ARRAY_SIZE_BITS 0                     /* [0..7] */
-#define TSB_ARRAY_BITS      (9 + TSB_ARRAY_SIZE_BITS)
-#define TSB_ARRAY_SIZE      (1 << TSB_ARRAY_BITS) /* # entries in each array. */
-
-/* 4 arrays * array size * 16 bytes per entry. */
-#define TSB_SIZE (4 * TSB_ARRAY_SIZE * 16)
-
-#ifndef ASSEMBLY
-
-#define TSB_DATA_ENTRY TLB_DATA_ENTRY
-
-#define TSB_VPN_SHORT_SHIFT 22
-
-/**
- *  tsb_tag_t: TSB entry tag field.
- */
-struct tsb_tag_t {
-    BITFIELD5(u64_t,
-	      vpn_short   : 42, /* Short virtual page number, vpn[63:22]. */
-	      __reserved1 : 6,  /* Reserved by the CPU implementation.    */
-	      context     : 13, /* Context identifier (ASID) of tte.      */
-	      __reserved2 : 2,  /* Reserved by the CPU implementation.    */
-	      global      : 1   /* Is this mapping global to all spaces.  */
-
-	     ) // BITFIELD5()
-
-};
-
-/**
- *  tsb_data_t: TSB entry data field.
- */
-struct tsb_data_t {
-    TSB_DATA_ENTRY
-
-};
-
-/**
- *  tsbent_t: TSB entry.
- */
-class tsbent_t { 
-private:
-    /* The Tag field of a TSB entry. */
-    union {
-	u64_t     tag_raw;
-	tsb_tag_t tag;
-
-    }; // union
-
-    /* The data field of a TSB entry. */
-    union {
-	u64_t      data_raw;
-	tsb_data_t data;
-
-    }; // union
-
-public:
-    /* Tag field manipulation. */
-
-    void set_va(addr_t vaddr)
-    {
-	tag.vpn_short = (u64_t)vaddr >> TSB_VPN_SHORT_SHIFT;
-    }
-    void set_asid(hw_asid_t asid) {tag.context = (u64_t)asid;}
-    addr_t get_va(void) {return (addr_t)(tag.vpn_short << TSB_VPN_SHORT_SHIFT);}
-    addr_t get_va(u16_t tsb_index)
-    {
-	// Calculate the entire VA of this entry, including the part that
-	// depends on its index in the tsb
-	if(data.size == tlb_t::size_8k)
-	    return (addr_t)((word_t)get_va() |
-			    (tsb_index << SPARC64_PAGE_BITS));
-	else
-	    return (addr_t)((word_t)get_va() |
-			    (tsb_index << (SPARC64_PAGE_BITS + 3)));
-    }
-    hw_asid_t get_asid(void) {return (hw_asid_t)tag.context;}
-
-    /* Data field manipulation. */
-
-    void set_global(bool g) {data.global = g; tag.global = g;}
-    void set_privileged(bool p) {data.privileged = p;}
-    void set_side_effect(bool e) {data.side_effect = e;}
-    void set_lock(bool l) {data.tsb_lock = 1;}
-    void set_invert_endian(bool i) {data.invert_endian = i;}
-    void set_no_fault_only(bool n) {data.no_fault_only = n;}
-    void set_access_bits(word_t rwx) {data.access_bits = rwx;}
-    void set_ref_bits(word_t rwx) {data.ref_bits = rwx;}
-    void set_size(tlb_t::pgsize_e size) {data.size = size;}
-    void set_cache_attrib(tlb_t::cache_attrib_e attrib)
-    {
-	data.cache_attrib = attrib;
-    }
-    void set_pa(addr_t paddr) {data.pfn = (u64_t)paddr >> SPARC64_PAGE_BITS;}
-    void set_data(tsb_data_t* newdata) { data = *newdata; }
-    bool get_global(void) {return (bool)data.global;}
-    bool get_privileged(void) {return (bool)data.privileged;}
-    bool get_side_effect(void) {return (bool)data.side_effect;}
-    bool get_lock(void) {return (bool)data.tsb_lock;}
-    bool get_invert_endian(void) {return (bool)data.invert_endian;}
-    bool get_no_fault_only(void) {return (bool)data.no_fault_only;}
-    word_t get_access_bits(void) {return (word_t)data.access_bits;}
-    word_t get_ref_bits(void) {return (word_t)data.ref_bits;}
-    tlb_t::pgsize_e get_size(void) {return (tlb_t::pgsize_e)data.size;}
-    tlb_t::cache_attrib_e get_cache_attrib(void)
-    {
-	return (tlb_t::cache_attrib_e)data.cache_attrib;
-    }
-    addr_t get_pa(void) {return (addr_t)(data.pfn << SPARC64_PAGE_BITS);}
-    bool get_tlb_valid(void) { return data.tlb_valid; }
-
-    /* Invalid TSB entry. */
-
-    void clear(void)
-    {
-	data_raw = 0;
-	tag_raw = 0;
-    }
-
-    /* Printing. */
-
-    /* Index is used to calculate va since TSB vpn is incomplete. */
-    void print(u16_t tsb_index)
-    {
-	printf("va: 0x%lx \tasid: 0x%x \tpa: 0x%lx \t%c%c%c%c%c%c access: %c%c%c reference: %c%c%c CA:%d %s",
-	       (word_t)get_va(tsb_index),
-	       (word_t)get_asid(),
-	       (word_t)get_pa(),
-	       get_global()        ? 'G' : 'g',
-	       get_privileged()    ? 'P' : 'p',
-	       get_side_effect()   ? 'E' : 'e',
-	       get_lock()          ? 'L' : 'l',
-	       get_invert_endian() ? 'I' : 'i',
-	       get_no_fault_only() ? 'N' : 'n',
-	       (get_access_bits() & READ_ACCESS_BIT)    ? 'R' : 'r',
-	       (get_access_bits() & WRITE_ACCESS_BIT)   ? 'W' : 'w',
-	       (get_access_bits() & EXECUTE_ACCESS_BIT) ? 'X' : 'x',
-	       (get_ref_bits() & READ_ACCESS_BIT)    ? 'R' : 'r',
-	       (get_ref_bits() & WRITE_ACCESS_BIT)   ? 'W' : 'w',
-	       (get_ref_bits() & EXECUTE_ACCESS_BIT) ? 'X' : 'x',
-	       (int)get_cache_attrib(),
-	       (get_size() == tlb_t::size_8k)     ? "8KB" :
-	       ((get_size() == tlb_t::size_64k)   ? "64KB" :
-		((get_size() == tlb_t::size_512k) ? "512KB" : "4MB")));
-
-    } // print()
-
-}; // tsbent_t
-
-/** 
- *  tsbarrays_t: TSB arrays
- *  awiggins (02-09-03): Do not touch these fields without consulting me.
- */
-typedef struct {
-    tsbent_t d8k[TSB_ARRAY_SIZE];  /* D-TSB array for 8KB pages only.   */
-    tsbent_t d64k[TSB_ARRAY_SIZE]; /* D-TSB array for other sizes.      */
-    tsbent_t i8k[TSB_ARRAY_SIZE];  /* I-TSB array for 8KB pages only.   */
-    tsbent_t i64k[TSB_ARRAY_SIZE]; /* I-TSB array for other page sizes. */
-
-} tsbarrays_t;
-
-/**
- *  I/D-TSB Registers, point to TSB arrays for index calculation.
- */
-class tsb_reg_t {
-private:
-    union {
-	u64_t raw;
-	struct {
-	    BITFIELD4(u64_t,
-		      size  : 3,  /* TSB arrays size.                       */
-		      __rv  : 9,  /* unused.                                */
-		      split : 1,  /* Is array split into seperate 8KB/64KB. */
-		      base  : 51  /* TSB array base pointer.                */
-
-		     ) // BITFIELD4()
-	} reg;
-
-    }; // union 
-
-public:
-    /* I/D-TSB register management. */
-
-    void set(tlb_t::tlb_e tsb)
-    {
-	ASSERT(tsb != tlb_t::no_tlb);
-
-	if(tsb & tlb_t::d_tlb) { // D-TSB register.
-
-	    __asm__ __volatile__("stxa\t%0, [%1] %2\n"
-				 : /* no outputs */
-				 : "r" (raw),          // %0
-				 "r" (TSB_REGISTER), // %1
-				 "i" (ASI_DMMU));    // %2
-
-	} else if(tsb & tlb_t::i_tlb) { // I-TSB register.
-
-	    __asm__ __volatile__("stxa\t%0, [%1] %2\n"
-				 : /* no outputs */
-				 : "r" (raw),          // %0
-				 "r" (TSB_REGISTER), // %1
-				 "i" (ASI_IMMU));    // %2
-
-	} else {ASSERT(false);}
-
-    } // set()
-
-    void get(tlb_t::tlb_e tsb)
-    {
-	ASSERT(tsb != tlb_t::no_tlb);
-
-	if(tsb & tlb_t::d_tlb) { // D-TSB register.
-
-	    __asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-				 : "=r" (raw)          // %0
-				 : "r" (TSB_REGISTER), // %1
-				 "i" (ASI_DMMU));    // %2
-
-	} else if(tsb & tlb_t::i_tlb) { // I-TSB register.
-
-	    __asm__ __volatile__("ldxa\t[%1] %2, %0\n"
-				 : "=r" (raw)          // %0
-				 : "r" (TSB_REGISTER), // %1
-				 "i" (ASI_IMMU));    // %2
-
-	} else {ASSERT(false);}
-
-    } // get()
-
-    /* Field manipulation. */
-
-    void set_base(addr_t base) {reg.base = (u64_t)base >> SPARC64_PAGE_BITS;}
-    void set_split(bool split) {reg.split = split;}
-    void set_size(u8_t size) {reg.size = size;}
-
-    /* Printing. */
-
-    void print(void)
-    {
-	printf("base: 0x%lx %s size %d",
-	       reg.base << SPARC64_PAGE_BITS,
-	       reg.split ? "split" : "unified",
-	       1 << 9 + reg.size);
-    }
-
-}; // tsb_reg_t
-
-/**
- *  Manages I/D-TSB entries.
- */
-class tsb_t {
-private:
-    static tsbarrays_t arrays;
-    tsb_reg_t d_reg; // D-TSB Register.
-    tsb_reg_t i_reg; // I-TSB REgister.
-
-
-public:
-    /* Which TSB array. */
-    enum tsb_e {
-	d8k_tsb  = 1, /* 8KB page D-TSB.     */
-	d64k_tsb = 2, /* Other D-TSB.        */
-	i8k_tsb  = 3, /* 8KB page I-TSB.     */
-	i64k_tsb = 4  /* Other I-TSB.        */
-    };
-
-public:
-    /* I/D-TSB management. */
-
-    void init(void)
-    {
-	d_reg.set_base((addr_t)arrays.d8k);
-	d_reg.set_split(true);
-	d_reg.set_size(TSB_ARRAY_SIZE_BITS);
-	d_reg.set(tlb_t::d_tlb);
-	i_reg.set_base((addr_t)arrays.i8k);
-	i_reg.set_split(true);
-	i_reg.set_size(TSB_ARRAY_SIZE_BITS);
-	i_reg.set(tlb_t::i_tlb);
-
-	for(int i = 0; i < TSB_ARRAY_SIZE; i++) {
-	    arrays.d8k[i].clear();
-	    arrays.d64k[i].clear();
-	    arrays.i8k[i].clear();
-	    arrays.i64k[i].clear();
-	}
-    }
-
-    /* Calculate index into TSB arrays. */
-    static u16_t index(addr_t vaddr, tlb_t::pgsize_e size)
-    {
-	// index for 8k and 64k sizes is calculated by the MMU hardware. This
-	// function emulates that calculation. 
-	if(size == tlb_t::size_8k) {
-	    return ((word_t)vaddr >> SPARC64_PAGE_BITS) % TSB_ARRAY_SIZE;
-	} else {
-	    // Larger page sizes are treated as if they are 64kb (so there might
-	    // be multiple TSB entries in the 64kb TSB referring to one >64kb
-	    // superpage)
-	    return ((word_t)vaddr >> (SPARC64_PAGE_BITS + 3)) % TSB_ARRAY_SIZE;
-	}
-
-	ASSERT(false);
-	return 0;
-    }
-
-    /* Get a pointer to an entry in either D-TSB or I-TSB. */
-    static void get(u16_t index, tsbent_t** entry, tsb_e tsb)
-    {
-	ASSERT(index < TSB_ARRAY_SIZE);
-
-	switch(tsb) {
-	case d8k_tsb:
-	    *entry = &arrays.d8k[index];
-	    break;
-	case d64k_tsb:
-	    *entry = &arrays.d64k[index];
-	    break;
-	case i8k_tsb:
-	    *entry = &arrays.i8k[index];
-	    break;
-	case i64k_tsb:
-	    *entry = &arrays.i64k[index];
-	    break;
-	default:
-	    ASSERT(false);
-	}
-    }
-
-    /* Printing. */
-
-    /* Dump TSB state. */
-    void print(void)
-    {
-	d_reg.get(tlb_t::d_tlb);
-	i_reg.get(tlb_t::i_tlb);
-
-	printf("D-TSB - "), d_reg.print(), printf("\nI-TSB - "), i_reg.print(),
-	printf("\n");
-
-    } // print()
-
-    /* Dump all TSB(s) entries. */
-    static void print(tsb_e tsb)
-    {
-	if(tsb == d8k_tsb) {
-	    for(int i = 0; i < TSB_ARRAY_SIZE; i++) {print(i, d8k_tsb);}
-	}
-	if(tsb == d64k_tsb) {
-	    for(int i = 0; i < TSB_ARRAY_SIZE; i++) {print(i, d64k_tsb);}
-	}
-	if(tsb == i8k_tsb) {
-	    for(int i = 0; i < TSB_ARRAY_SIZE; i++) {print(i, i8k_tsb);}
-	}
-	if(tsb == i64k_tsb) {
-	    for(int i = 0; i < TSB_ARRAY_SIZE; i++) {print(i, i64k_tsb);}
-	}
-
-    } // print(tsb)
-
-    /* Dump a single TSB entry. */
-    static void print(u16_t entry, tsb_e tsb)
-    {
-	ASSERT(entry < TSB_ARRAY_SIZE);
-
-	if(tsb == d8k_tsb) {
-	    if(arrays.d8k[entry].get_access_bits()) {
-		printf("D-TSB-8K[%d] ", entry), 
-		arrays.d8k[entry].print(entry), printf("\n");
-	    }
-	} else if(tsb == d64k_tsb) {
-	    if(arrays.d64k[entry].get_access_bits()) {
-		printf("D-TSB-64K[%d] ", entry), 
-		arrays.d64k[entry].print(entry), printf("\n");
-	    }
-	} else if(tsb == i8k_tsb) {
-	    if(arrays.i8k[entry].get_access_bits()) {
-		printf("I-TSB-8K[%d] ", entry), 
-		arrays.i8k[entry].print(entry), printf("\n");
-	    }
-	} else if(tsb == i64k_tsb) {
-	    if(arrays.i64k[entry].get_access_bits()) {
-		printf("I-TSB-64K[%d] ", entry), 
-		arrays.i64k[entry].print(entry), printf("\n");
-	    }
-	} else {
-
-	    ASSERT(false);
-	}
-
-    } // print(entry, tsb)
-
-}; // tsb_t
-
-#endif /* !ASSEMBLY */
-
-
-#endif /* !__ARCH__SPARC64__ULTRASPARC__TSB_H__ */
diff --git a/kernel/src/arch/sparc64/ultrasparc/ttable.ldi b/kernel/src/arch/sparc64/ultrasparc/ttable.ldi
deleted file mode 100644
index abf99229..00000000
--- a/kernel/src/arch/sparc64/ultrasparc/ttable.ldi
+++ /dev/null
@@ -1,54 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003, University of New South Wales
- *
- * File path:	arch/sparc64/ultrasparc/ttable.ldi
- * Description:	Linker script include file for SPARC v9 Trap Table.
- *              UltraSPARC CPU implementation dependent traps.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: ttable.ldi,v 1.2 2003/09/24 19:04:32 skoglund Exp $
- *
- ***************************************************************************/
-
-		/**
-		 *  CPU implementation dependent trap types. (0x060 - 0x07F)
-		 */
-		. = TRAPTYPE2ADDR (0x060, TTABLE_TL);
-
-		*(.ttable.TTABLE_TL.interrupt_vector)
-		. = TRAPTYPE2ADDR (0x061, TTABLE_TL);
-		*(.ttable.TTABLE_TL.PA_watchpoint)
-		. = TRAPTYPE2ADDR (0x062, TTABLE_TL);
-		*(.ttable.TTABLE_TL.VA_watchpoint)
-		. = TRAPTYPE2ADDR (0x063, TTABLE_TL);
-		*(.ttable.TTABLE_TL.corrected_ECC_error)
-		. = TRAPTYPE2ADDR (0x064, TTABLE_TL); /* 4 entries - 0x067 */
-		*(.ttable.TTABLE_TL.fast_instruction_access_MMU_miss)
-		. = TRAPTYPE2ADDR (0x068, TTABLE_TL); /* 4 entries - 0x06B */
-		*(.ttable.TTABLE_TL.fast_data_access_MMU_miss)
-		. = TRAPTYPE2ADDR (0x06C, TTABLE_TL); /* 4 entries - 0x06F */
-		*(.ttable.TTABLE_TL.fast_data_access_protection)
-
-		/* Reserved       (0x070 - 0x07F, TTABLE_TL)               */
-
diff --git a/kernel/src/arch/tmplarch/debug.h b/kernel/src/arch/tmplarch/debug.h
deleted file mode 100644
index 68770c28..00000000
--- a/kernel/src/arch/tmplarch/debug.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/template/debug.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: debug.h,v 1.2 2003/09/24 19:04:32 skoglund Exp $
- *                
- ********************************************************************/
diff --git a/kernel/src/arch/tmplarch/types.h b/kernel/src/arch/tmplarch/types.h
deleted file mode 100644
index 6ce4e857..00000000
--- a/kernel/src/arch/tmplarch/types.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     arch/template/types.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.2 2003/09/24 19:04:32 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH__TEMPLATE__TYPES_H__
-#define __ARCH__TEMPLATE__TYPES_H__
-
-typedef unsigned int __attribute__((__mode__(__DI__))) u64_t;
-typedef unsigned int		u32_t;
-typedef unsigned short		u16_t;
-typedef unsigned char		u8_t;
-
-typedef signed int __attribute__((__mode__(__DI__))) s64_t;
-typedef signed int		s32_t;
-typedef signed short		s16_t;
-typedef signed char		s8_t;
-
-/**
- *	word_t - machine word wide unsigned int
- */
-typedef u32_t			word_t;
-
-#endif /* !__ARCH__TEMPLATE__TYPES_H__ */
diff --git a/kernel/src/glue/v4-alpha/Makeconf b/kernel/src/glue/v4-alpha/Makeconf
deleted file mode 100644
index fc05b4fd..00000000
--- a/kernel/src/glue/v4-alpha/Makeconf
+++ /dev/null
@@ -1,12 +0,0 @@
-CURDIR=src/glue/v4-alpha/
-
-#SOURCES+=$(addprefix ${CURDIR}, sizes.cc init.cc )
-
-SOURCES+= $(addprefix ${CURDIR}, init.cc intctrl.cc thread.cc space.cc traps.S irq.cc timer.cc user.S syscalls.S fastpath.S alpha.cc resources.cc)
-
-# awiggins (2004-07-21) Disabled until it is fixed up and tested again.
-#SOURCES+= $(pal_fastpath.S)
-
-SOURCES+= src/generic/linear_ptab_walker.cc \
-	  src/generic/mapping.cc \
-	  src/generic/mapping_alloc.cc
\ No newline at end of file
diff --git a/kernel/src/glue/v4-alpha/alpha.cc b/kernel/src/glue/v4-alpha/alpha.cc
deleted file mode 100644
index c5887f48..00000000
--- a/kernel/src/glue/v4-alpha/alpha.cc
+++ /dev/null
@@ -1,51 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/irq.cc
- * Description:   Generic trap handling 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: alpha.cc,v 1.2 2003/09/24 19:05:32 skoglund Exp $
- *                
- ********************************************************************/
-
-#include INC_GLUE(config.h)
-#include INC_API(tcb.h)
-
-extern "C" void sys_halt(void)
-{
-    volatile unsigned long *ptr = (volatile unsigned long *) (AS_KSEG_START + 0x8780000900ull);
-
-    *ptr = 0x0000dead;
-}
-
-extern "C" unsigned long sys_read_idle(unsigned long new_pcc)
-{
-    unsigned long ret = get_idle_tcb()->get_arch()->pcb.pcc;
-
-    if(new_pcc != -1ull) 
-	get_idle_tcb()->get_arch()->pcb.pcc = new_pcc;
-
-    return ret;
-}
diff --git a/kernel/src/glue/v4-alpha/asmsyms.cc b/kernel/src/glue/v4-alpha/asmsyms.cc
deleted file mode 100644
index 53f662dc..00000000
--- a/kernel/src/glue/v4-alpha/asmsyms.cc
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/asmsyms.cc
- * Description:   Various asm definitions for alpha
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asmsyms.cc,v 1.2 2003/09/24 19:05:32 skoglund Exp $
- *                
- ********************************************************************/
-#include <mkasmsym.h>
-
-#include INC_ARCH(thread.h)
-
-#include INC_API(tcb.h)
-#include INC_GLUE(config.h)
-
-/* Alpha defines */
-MKASMSYM (ALPHA_CONTEXT_SIZE, sizeof(alpha_context_t));
-MKASMSYM (ALPHA_SWITCH_STACK_SIZE, sizeof(alpha_switch_stack_t));
-MKASMSYM (UTCB_MR_OFFSET, (word_t) ((utcb_t *) 0)->mr);
-MKASMSYM (ASM_KTCB_MASK, KTCB_MASK);
-MKASMSYM (ASM_KTCB_BITS, KTCB_BITS);
-MKASMSYM (ASM_KTCB_SIZE, KTCB_SIZE);
-MKASMSYM (ASM_KTCB_AREA_START, KTCB_AREA_START);
-MKASMSYM (SWITCH_STACK_RA, offsetof(alpha_switch_stack_t, ra));
diff --git a/kernel/src/glue/v4-alpha/config.h b/kernel/src/glue/v4-alpha/config.h
deleted file mode 100644
index aed56f48..00000000
--- a/kernel/src/glue/v4-alpha/config.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/config.h
- * Created:       24/07/2002 23:54:34 by Simon Winwood (sjw)
- * Description:   Arch configuration 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.14 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__CONFIG_H__
-#define __GLUE__V4_ALPHA__CONFIG_H__
-
-#include INC_API(config.h)
-#include INC_ARCH(page.h)
-
-/**
- * Size of a kernel TCB in bytes
- */
-#define KTCB_SIZE	4096
-#define KTCB_BITS       12
-#define KTCB_MASK       (~((1 << KTCB_BITS) - 1))
-
-#define UTCB_SIZE       1024
-#define UTCB_BITS       10
-#define UTCB_MASK       (~((1 << UTCB_BITS) - 1))
-
-#define CACHE_LINE_SIZE  (ALPHA_CACHE_LINE_SIZE)
-#define KERNEL_PAGE_SIZE (ALPHA_PAGE_SIZE)
-
-#ifndef __ASSEMBLY__
-
-#define KIP_SYSCALL(x)		((word_t) (x) - (word_t) &kip)
-
-/**
- * endianess and word size
- */
-#define KIP_API_FLAGS	{endian:0, word_size:1} /* 64-bit, little endian */
-
-/**
- * minimum size of UTCB area and number of UTCBs in this
- */
-/* sjw (11/04/2003): Deprecated? */
-#define KIP_UTCB_AREA	{size:ALPHA_PAGE_BITS, no:(1 << (ALPHA_PAGE_BITS - UTCB_BITS))}   /* 8 threads, 8KB */
-
-/* 8 byte aligned, 1KB size, 8KB area size */
-#define KIP_UTCB_INFO           {multiplier:1, alignment:UTCB_BITS, size:ALPHA_PAGE_BITS}
-
-/**
- * size of kernel interface page
- */
-#define KIP_KIP_AREA	{size:ALPHA_PAGE_BITS}   /* 8KB */
-
-/**
- * supported page sizes and access bits
- */
-#define KIP_ARCH_PAGEINFO {rwx:6, size_mask:\
-                                     HW_VALID_PGSIZES  >> 10}
-/**
- * Base address of the root task's UTCB area
- */
-
-#endif /* __ASSEMBLY__ */
-
-
-/* The kernel will execute out of kseg as it reduces TLB overhead and
- * bootstrapping easier (can delay setting up page tables etc.).  The kernel will
- * use seg1 for its virtual area (for the VPT, KTCBs, etc.)
- *
- * We need somewhere to put the console and its data structures (HWRPB being an important one).
- * The console needs <256M (from what I can tell from the Alpha HWRM --- it puts the console at 256M and
- * system software at 512M).
- *
- * Finally, we need some VM for KTCBs (although we could put them in kseg?) and the string IPC copy windows.
- *
- * I will deal with copy windows when they are implemented.
- * 
- */
-
-/* Per space */
-#define USER_AREA_START         (0)
-#define USER_AREA_SIZE          AS_SEG0_SIZE
-#define USER_AREA_END           AS_SEG0_END
-
-/* VPT goes at the start of seg1 */
-#define VLPT_AREA_START         AS_SEG1_START
-/* This is 2**(33) for 43 bit AS, 2**(38) for 48 bit AS. */
-#define VLPT_AREA_BITS          (CONFIG_ALPHA_ADDRESS_BITS - ALPHA_PAGE_BITS + 3)
-#define VLPT_AREA_SIZE          (1UL << VLPT_AREA_BITS)
-#define VLPT_AREA_END           (VLPT_AREA_START + VLPT_AREA_SIZE)
-
-/* Shared */
-
-/* Align this up to the next toplevel PTE */
-#define CONSOLE_AREA_START      (VLPT_AREA_START + (1UL << TOPLEVEL_PT_BITS))
-#define CONSOLE_AREA_SIZE       (1UL << TOPLEVEL_PT_BITS)
-#define CONSOLE_AREA_END        (CONSOLE_AREA_START + CONSOLE_AREA_SIZE)
-#define HWRPB_VADDR             CONSOLE_AREA_START
-
-/* Somewhat arbitrary ... just give them 1 top level PT */
-/* #define VALID_THREADNO_BITS     (TOPLEVEL_PT_BITS - KTCB_BITS) */
-#define VALID_THREADNO_BITS     16
-#define KTCB_AREA_SIZE		(1UL << (KTCB_BITS + VALID_THREADNO_BITS))
-#define KTCB_AREA_START		(CONSOLE_AREA_END)
-#define KTCB_AREA_END		(KTCB_AREA_START + KTCB_AREA_SIZE)
-
-
-#define ROOT_UTCB_START		(USER_AREA_END - (ROOT_MAX_THREADS << UTCB_BITS))
-
-/**
- * Address of the KIP in the root task
- */
-#define ROOT_KIP_START		(ROOT_UTCB_START - ALPHA_PAGE_SIZE)
-
-/* sjw (06/08/2002): This is technically in the HWRPB ... it says that it is 1kHz, 
- * but the interrupts look to come every 40ms?  Anyway, 1 1kHz clock gives a length of
- * 976ms 
- */
-#define TIMER_TICK_LENGTH       (976)
-
-#endif /* __GLUE__V4_ALPHA__CONFIG_H__ */
diff --git a/kernel/src/glue/v4-alpha/fastpath.S b/kernel/src/glue/v4-alpha/fastpath.S
deleted file mode 100644
index 7b373796..00000000
--- a/kernel/src/glue/v4-alpha/fastpath.S
+++ /dev/null
@@ -1,428 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/fastpath.S
- * Description:   IPC fastpath
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fastpath.S,v 1.4 2004/04/06 07:33:23 benno Exp $
- *                
- ********************************************************************/
-
-/*
- * The fast path is:	
- *   + both send and receive. 
- *   + All IDs are global.
- *   + No typed message registers 
- *   + Up to and including IPC_MAX_REGS untyped message registers.
- *   + Not propagating.
- *   + A receive is involved, the target thread must not be polling.  If the 
- *   target threadid is anythread, the send queue must be empty.
- *   + The receive timeout must be infinite. (may change)
- */
-
-#include <tcb_layout.h>	
-#include <asmsyms.h>
-#include <config.h>
-#include INC_ARCH(asm.h)
-#include INC_ARCH(pal.h)
-#include INC_GLUE(config.h)
-#include INC_GLUE(ipcregs.h)
-			
-#if defined(CONFIG_PREEMPT_ASIDS)
-#error ASID check in context switch code not done
-#endif
-	
-#define IPC_MAX_REGS	8
-
-/* Pistachio defines */
-#define THREAD_STATE_RUNNABLE 2
-#define THREAD_STATE_WAITING -1	
-#define IPC_MR0_PROPAGATED (1 << 12)	
-
-#if VALID_THREADNO_BITS != 16
-#error I expect VALID_THREADNO_BITS to be 16!
-#endif	
-/* 
- * Convenience functions 
- */
-
-/* Clobber lower 12 bits of stack to get TCB */
-#define GET_CURRENT(reg)	lda	reg, ASM_KTCB_MASK ;  and	reg, $30, reg
-
-/* */
-#define TID_TO_TCB(tid, tcb, tmp)						\
-	zapnot	tid, 0x30, tcb	;			/* Get threadno bits */	\
-	lda	tmp, 0xe04	;						\
-	sll	tmp, (64 - 12), tmp ;						\
-	or	tmp, tcb, tcb	;						\
-	sra	tcb, (32 - ASM_KTCB_BITS), tcb 
-
-/* API defines */					
-#define mr0		R_MR0
-#define mr1		R_MR1
-#define mr2		R_MR2
-#define mr3		R_MR3
-#define mr4		R_MR4
-#define mr5		R_MR5
-#define mr6		R_MR6
-#define mr7		R_MR7
-#define mr8		R_MR8
-
-#define to_tid		R_TO_TID
-#define from_tid	R_FROM_TID
-#define timeout		R_TIMEOUT
-	
-/* Locals */	
-#define current		$1
-#define to_tcb		$2
-#define from_tcb	$3
-#define current_global	$4
-#define dest_partner	$5
-#define current_utcb	$6
-
-		
-#define T(a)
-
-#define	tmp0		$19
-#define	tmp1		$19	
-#define	tmp2		$20
-#define	tmp3		$21
-#define	tmp4		$22
-#define	tmp5		$19
-#define	tmp6		NOTUSED
-#define	tmp7		NOTUSED
-#define	tmp8		NOTUSED		
-#define	tmp9		$23
-#define	tmp10		$24		
-#define	tmp11		NOTUSED
-#define	tmp12		$20
-#define	tmp13		$24
-#define	tmp14		$20
-#define	tmp15		NOTUSED
-#define	tmp16		$22
-#define	tmp17		$19
-#define	tmp18		$20
-#define	tmp19		$21
-		
-/* Layout is:	
-T(n)	inst	arg, arg, arg	
-	
-	where:	
-	n is the thread number (used to keep track of what is happening --- purely for my convenience)	
-	IBOX is the pipeline the instruction can execute within 
-
-Note:	
-	21164 can do 0-cycle latency for branches in parallel with logical or compare instructions.  This
-	means that	
-		cmpeq	a, b, c	;  beq c, label 
-	
-	is perfectly valid and will execute in parallel. 
-*/
-		
-BEGIN_PROC(__ent_sys)
-	DISABLE_INT($3, $4)
-	nop
-	bne	$0, __handle_non_ipc
-
-#if defined(CONFIG_ALPHA_PAL_IPC_FASTPATH)
-	br	$31, __ipc_goto_slowpath
-#endif
-#if ! defined(CONFIG_ALPHA_FASTPATH)
-	br	$31, __ipc_goto_slowpath
-#else		
-	.align	4	
-send_path:	
-	/*
-	 * Check conditions: infinite receive timeout, < IPC_MAX_REGS sent, no typed registers
-	 */	
-
-T(0)	zapnot	to_tid, 0x30, to_tcb			/* E0 */	/* Get threadno bits T(0) */	
-T(0)	lda	tmp0, 0xe04				/* E0 or E1 */	
-						
-T(0)	sll	tmp0, (64 - 12), tmp0			/* E0 */							
-T(3)	and	mr0, 0x3f, tmp3				/* E0 or E1 */	/* we support < IPC_MAX_REGS T(3) */
-
-T(6)	lda	current, ASM_KTCB_MASK			/* E0 or E1 */	/* get current T(6) */	
-T(0)	or	tmp0, to_tcb, to_tcb			/* E0 or E1 */							
-
-T(0)	sra	to_tcb, (32 - ASM_KTCB_BITS), to_tcb	/* E0 */ 	/* END T(0) */	
-T(6)	and	current, $30, current			/* E0 or E1 */	/* END T(6) */
-
-T(7)	ldq	dest_partner, OFS_TCB_PARTNER(to_tcb)	/* E0 or E1 */	/* Check partner T(7) <- T(0) */
-T(8)	ldq	current_global, OFS_TCB_MYSELF_GLOBAL(current)	/* E0 or E1 */	/* Get current_global T(8) <- T(6) */
-
-T(1)	zapnot	timeout, 0x3, tmp1			/* E0 */	/* infinite timeout T(1) */			
-T(2)	ldiq	tmp2, (0x3f << 6) | IPC_MR0_PROPAGATED	/* E0 or E1 */	/* num_typed is bits 6 - 11 (6 bits) in mr0 T(2) */
-	
-T(10)	cmpeq	current_global, dest_partner, tmp10	/* E0 or E1 */  /* partner check T(10) <- (T(8), T(7)) */
-T(9)	addq	dest_partner, 1, tmp9			/* E0 or E1 */	/* is_anythread == -1 T(9) <- T(7) */	
-
-T(11)	cmovne	tmp10, 0, tmp9				/* E0 or E1 */  /* tmp9 == 0 or tmp10 != 0 -> fast_path T(11) <- (T(9), T(10)) */
-	nop								/* Hopefully this will be squashed by the cmove */
-	
-T(13)	ldq	tmp13, OFS_TCB_SEND_HEAD(current)	/* E0 or E1 */	/* Require send_head to be empty T(13) <- T(6) */	
-T(1)	bne	tmp1, __ipc_goto_slowpath		/* E1 */	/* From timeout END T(1) */
-
-T(4)	ldq	tmp4, OFS_TCB_MYSELF_GLOBAL(to_tcb)	/* E0 or E1 */	/* Check global ID T(4) <- T(0) */		
-T(5)	ldl	tmp5, OFS_TCB_THREAD_STATE(to_tcb)	/* E0 or E1 */	/* Check partner is waiting T(5) <- T(0) */
-
-T(2)	and	tmp2, mr0, tmp2				/* E0 or E1 */	
-T(11)	bne	tmp9, __ipc_goto_slowpath		/* E1 */	/* END T(9) END T(10) END T(11) */
-	
-T(3)	cmple	tmp3, IPC_MAX_REGS, tmp3		/* E0 or E1 */	
-T(3)	beq	tmp3, __ipc_goto_slowpath		/* E1 */	/* From IPC_MAX_REGS END T(3) */
-
-T(4)	cmpeq	tmp4, to_tid, tmp4			/* E0 or E1 */
-T(4)	beq	tmp4, __ipc_goto_slowpath		/* E1 */	/* from global ID check. END T(4) */
-			
-T(5)	addq	tmp5, 1, tmp5				/* E0 or E1 */
-T(2)	bne	tmp2, __ipc_goto_slowpath		/* E1 */	/* From num_typed END T(2)*/
-
-T(12)	addq	from_tid, 1, tmp12			/* E0 or E1 */	/* Check that receive phase blocks T(12) */
-T(5)	bne	tmp5, __ipc_goto_slowpath		/* E1 */	/* From is_waiting check END T(5) */
-	
-	nop						/* This isn't such a bad place for this nop --- probably 50% chance here */
-T(12)	bne	tmp12, check_other_tcb			/* E1 */	/* END T(12) */	
-
-T(14)	ldiq	tmp14, THREAD_STATE_WAITING		/* E0 or E1 */	/* Set thread state to waiting T(14) */	
-T(13)	bne	tmp13, __ipc_goto_slowpath		/* E1 */	/* END T(13) */
-
-	/* FALLTHRU */
-	
-continue_ipc:
-	/* This is the point of no return --- after this we cannot go to the slow path */	
-	/* At this point, we have set up the sending thread's TCB state.  We now setup the 
-	 * stack so that when we are next switched to we do the right thing (set state to running 
-	 * and return partner) --- this only happens in the generic send case.
-	 */	
-
-T(17)	ldq	$16, OFS_TCB_ARCH(to_tcb)		/* E0 or E1 */	/* Gives the PA of the PCB T(17) END T(17) */	
-T(16)	lda	tmp16, goto_finish			/* E0 or E1 */	/* turns into a ldq ... grumble  T(16) */
-	
-T(14)	stl	tmp14, OFS_TCB_THREAD_STATE(current)	/* E0 or E1 */	/* END T(14) */
-T(16)	subq	$30, ALPHA_SWITCH_STACK_SIZE, $30	/* E0 or E1 */	/* Save RA */
-
-T(15)	stq	from_tid, OFS_TCB_PARTNER(current)	/* E0 or E1 */	/* Set partner T(15) END T(15) */
-T(16)	stq	tmp16, SWITCH_STACK_RA($30)		/* E0 or E1 */	/* END T(16) */
-	
-	/* t0, t8..t11, a0 trashed, v0 contains old ctx */
-T(17)	ldiq	tmp17, THREAD_STATE_RUNNABLE		/* E0 or E1 */	/* Make thread runnable */
-	call_pal	PAL_swpctx			/* E1 */
-	
-	/* OK, we are now in to_tcb's context.  Clean up the stack and return */
-T(18)	mov	current_global, $0			/* E0 or E1 */	/* return from TID */
-T(17)	stl	tmp17, OFS_TCB_THREAD_STATE(to_tcb)	/* E0 or E1 */	/* END T(17) */
-
-T(18)	ldiq	tmp18, ASM_KTCB_SIZE - ALPHA_CONTEXT_SIZE /* E0 or E1 */	/* Clean up stack T(18) */	
-T(19)	ldiq	tmp19, ~(0xe << 12)			/* E0 or E1 */	/* Clear receive flags in mr0 T(19) */
-	
-T(18)	addq	to_tcb, tmp18, $30			/* E0 or E1 */	/* END T(18) */
-T(19)	and	mr0, tmp19, mr0				/* E0 or E1 */	/* END T(19) */
-
-	nop
-	call_pal	PAL_retsys			/* E1 */
-		
-	.align	6	
-	/* Check whether from_tid is polling */
-check_other_tcb:	
-	beq	from_tid, __ipc_goto_slowpath
-	
-	TID_TO_TCB(from_tid, from_tcb, tmp1)
-
-T(14)	ldiq	tmp14, THREAD_STATE_WAITING		/* E0 or E1 */	/* Set thread state to waiting T(14) */	
-	
-	/* Check global ID */
-	ldq	tmp1, OFS_TCB_MYSELF_GLOBAL(from_tcb)
-	cmpeq	tmp1, from_tid, tmp1
-	beq	tmp1, __ipc_goto_slowpath
-	
-	/* 
-	 * Check if the thread is polling us --- if so, go to slow path
-	 */
-
-	/* is_polling():	thread_state == 5 << 1*/
-	ldl	tmp1, OFS_TCB_THREAD_STATE(from_tcb)
-	cmpeq	tmp1, 5 << 1, tmp1
-	beq	tmp1, continue_ipc		/* from_tcb isn't polling */
-
-	/* partner == current->global_id */
-	ldq	tmp1, OFS_TCB_PARTNER(from_tcb)
-	cmpeq	tmp1, current_global, tmp2
-	bne	tmp2, __ipc_goto_slowpath	/* If the other thread is polling us, goto the slowpath */
-	
-	/* partner == current->local_id */
-	ldq	tmp2, OFS_TCB_MYSELF_LOCAL(current)
-	cmpeq	tmp1, tmp2, tmp2
-	beq	tmp2, continue_ipc
-
-	br	__ipc_goto_slowpath
-
-goto_finish:
-	bsr	$31, __ipc_finish
-#endif /* not defined(CONFIG_ALPHA_FASTPATH) */		
-END_PROC(__ent_sys)
-
-/* This code handles the dest thread waiting on a local thread */
-#if 0
-	/* IS_WAITING_LOCAL:	(tcb->get_space() == current->get_space()) && (tcb->get_partner() == current->myself_local) || (tcb->get_partner().is_anylocalthread()) */
-	/* check tcb->get_space() == current->get_space() */
-	ldq	tmp1, OFS_TCB_SPACE(to_tcb)
-	ldq	tmp2, OFS_TCB_SPACE(current)
-	cmpeq	tmp1, tmp2, tmp1
-	beq	tmp1, __ipc_goto_slowpath
-
-	/* myself_local == utcb */
-	cmpeq	current_utcb, dest_partner, tmp1
-	bne	tmp1, do_send_phase
-
-	/* is_anylocalthread() version == 0, id == -1 */
-	dliq	tmp1, -1 << L4_LOCAL_ID_ZERO_BITS
-	cmpeq	tmp1, dest_partner, tmp1
-	beq	tmp1, __ipc_goto_slowpath
-#endif
-
-	
-/* 
- * SLOW PATH:	
- * This is the return path for the thread.  We got here via the generic path, so we 
- * need to load stuff out of MRs and set up the state that the receiving thread expects. 
- */
-
-BEGIN_PROC(__ipc_finish)
-#if 0
-	subq	$30, 8*2, $30
-	stq	$16, 0($30)
-	stq	$17, 8($30)
-	
-	ldiq	$16, 2
-	lda	$17, 1f
-	call_pal	PAL_gentrap
-	br	$31, 2f
-	
-1:	.asciz	"Slowpath (Finish)"
-	.align	4
-
-2:		
-
-	ldq	$16, 0($30)
-	ldq	$17, 8($30)
-	addq	$30, 8*2, $30
-#endif
-	
-	GET_CURRENT(current)
-	
-	/* first the state */
-	ldiq	tmp1, THREAD_STATE_RUNNABLE
-	stl	tmp1, OFS_TCB_THREAD_STATE(current)
-	ldq	$0, OFS_TCB_PARTNER(current)
-
-	/* Now the message contents */
-	/* OPT:	only load as many MRs as there have been sent */
-	ldq	current_utcb, OFS_TCB_UTCB(current)
-	ldq	mr0, UTCB_MR_OFFSET +  0(current_utcb)
-	ldq	mr1, UTCB_MR_OFFSET +  8(current_utcb)
-	ldq	mr2, UTCB_MR_OFFSET + 16(current_utcb)
-	ldq	mr3, UTCB_MR_OFFSET + 24(current_utcb)
-	ldq	mr4, UTCB_MR_OFFSET + 32(current_utcb)
-	ldq	mr5, UTCB_MR_OFFSET + 40(current_utcb)
-	ldq	mr6, UTCB_MR_OFFSET + 48(current_utcb)
-	ldq	mr7, UTCB_MR_OFFSET + 56(current_utcb)
-	ldq	mr8, UTCB_MR_OFFSET + 64(current_utcb)							
-	
-	call_pal	PAL_retsys	
-END_PROC(__ipc_finish)
-
-/*
- * SLOW PATH:	
- * We need to store all the MRs into the UTCB and call the regular IPC function 
- *
- */
-
-BEGIN_PROC(__ipc_goto_slowpath)
-#if 0
-	subq	$30, 8*2, $30
-	stq	$16, 0($30)
-	stq	$17, 8($30)
-	
-	ldiq	$16, 2
-	lda	$17, 1f
-	call_pal	PAL_gentrap
-	br	$31, 2f
-	
-1:	.asciz	"Slowpath"
-	.align	4
-
-2:		
-
-	ldq	$16, 0($30)
-	ldq	$17, 8($30)
-	addq	$30, 8*2, $30
-#endif
-		
-	GET_CURRENT(current)
-	
-	/* Now the message contents */
-	/* OPT:	only store as many MRs as there have been sent */
-	ldq	current_utcb, OFS_TCB_UTCB(current)
-	stq	mr0, UTCB_MR_OFFSET +  0(current_utcb)
-	stq	mr1, UTCB_MR_OFFSET +  8(current_utcb)
-	stq	mr2, UTCB_MR_OFFSET + 16(current_utcb)
-	stq	mr3, UTCB_MR_OFFSET + 24(current_utcb)
-	stq	mr4, UTCB_MR_OFFSET + 32(current_utcb)
-	stq	mr5, UTCB_MR_OFFSET + 40(current_utcb)
-	stq	mr6, UTCB_MR_OFFSET + 48(current_utcb)
-	stq	mr7, UTCB_MR_OFFSET + 56(current_utcb)
-	stq	mr8, UTCB_MR_OFFSET + 64(current_utcb)							
-
-	lda	$27, sys_ipc
-	lda	$26, __ipc_finish
-
-	jsr	$31, ($27)
-
-
-END_PROC(__ipc_goto_slowpath)
-
-BEGIN_PROC(__ipc_error)
-#if 1
-	subq	$30, 8*2, $30
-	stq	$16, 0($30)
-	stq	$17, 8($30)
-	
-	ldiq	$16, 2
-	lda	$17, 1f
-	call_pal	PAL_gentrap
-	br	$31, 2f
-	
-1:	.asciz	"IPC Error"
-	.align	4
-
-2:		
-
-	ldq	$16, 0($30)
-	ldq	$17, 8($30)
-	addq	$30, 8*2, $30
-#endif	
-	halt
-END_PROC(__ipc_error)
diff --git a/kernel/src/glue/v4-alpha/fpage.h b/kernel/src/glue/v4-alpha/fpage.h
deleted file mode 100644
index bd27fa9a..00000000
--- a/kernel/src/glue/v4-alpha/fpage.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-alpha/fpage.h
- * Description:   architecture specific flexpage declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fpage.h,v 1.3 2005/05/19 08:38:09 stoess Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__FPAGE_H__
-#define __GLUE__V4_ALPHA__FPAGE_H__
-
-#include INC_API(generic-archfpage.h)
-
-#endif /* !__GLUE__V4_ALPHA__FPAGE_H__ */
diff --git a/kernel/src/glue/v4-alpha/hwspace.h b/kernel/src/glue/v4-alpha/hwspace.h
deleted file mode 100644
index 1dc6f60e..00000000
--- a/kernel/src/glue/v4-alpha/hwspace.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003  University of New South Wales
- *                
- * File path:     glue/v4-alpha/hwspace.h
- * Created:       25/07/2002 01:29:34 by Simon Winwood (sjw)
- * Description:   Conversion between kernel addrs and physical addrs 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: hwspace.h,v 1.5 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__HWSPACE_H__
-#define __GLUE__V4_ALPHA__HWSPACE_H__
-
-#include <debug.h>
-#include INC_ARCH(types.h)
-#include INC_API(config.h)
-
-INLINE addr_t virt_to_phys(addr_t addr)
-{
-    ASSERT(addr >= (addr_t) AS_KSEG_START && addr < (addr_t) AS_KSEG_END);
-    return (addr_t) ((word_t) addr - AS_KSEG_START);
-}
-
-INLINE addr_t phys_to_virt(addr_t addr)
-{
-    return (addr_t) ((word_t) addr +  AS_KSEG_START);
-}
-
-
-#endif /* __GLUE__V4_ALPHA__HWSPACE_H__ */
diff --git a/kernel/src/glue/v4-alpha/init.cc b/kernel/src/glue/v4-alpha/init.cc
deleted file mode 100644
index 6a8b63e2..00000000
--- a/kernel/src/glue/v4-alpha/init.cc
+++ /dev/null
@@ -1,382 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     glue/v4-alpha/init.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: init.cc,v 1.29 2004/08/25 07:15:37 awiggins Exp $
- *                
- ********************************************************************/
-
-#include <stddef.h>
-#include <debug.h>
-#include <kmemory.h>
-#include <mapping.h>
-
-#include INC_API(kernelinterface.h)
-#include INC_API(schedule.h)
-#include INC_API(space.h)
-#include INC_API(resources.h)
-
-#include INC_ARCH(palcalls.h)
-#include INC_ARCH(hwrpb.h)
-#include INC_ARCH(console.h)
-
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(memory.h)
-#include INC_GLUE(timer.h)
-
-#include INC_ARCH(debug.h)
-
-#define INIT_TEXT SECTION(".init.text")
-
-extern char _start_pal_code;
-extern char _end_pal_code;
-extern char _start_pal_stub;
-extern char _end_pal_stub;
-
-extern "C" void __ent_interrupt(void);
-extern "C" void __ent_arith(void);
-extern "C" void __ent_mm(void);
-extern "C" void __ent_if(void);
-extern "C" void __ent_una(void);
-extern "C" void __ent_sys(void);
-
-static alpha_pcb_t alpha_init_pcb;
-struct hwrpb *hwrpb = (struct hwrpb *) CONSOLE_AREA_START;
-
-#define BOOTMEM_PAGES (CONFIG_BOOTMEM_PAGES)
-
-static void INIT_TEXT dump_info(void)
-{
-    printf("Kernel configuration:\n");
-    printf("\tVPT  area: 0x%lx -> 0x%lx (0x%lx)\n", VLPT_AREA_START, VLPT_AREA_END, VLPT_AREA_SIZE);
-    printf("\tKTCB area: 0x%lx -> 0x%lx (0x%lx)\n", KTCB_AREA_START, KTCB_AREA_END, KTCB_AREA_SIZE);
-    
-    printf("System configuration:\n");
-    printf("\tTimer frequency        : %dHz\n", hwrpb->rpb_intr_freq / 4096);
-    printf("\tCycle counter frequency: %dHz\n", hwrpb->rpb_cc_freq);
-}
-
-/* Before this function, we are executing in the initial AS provided by the console.  Afterwards,
- * we are executing in our AS */
-static void init_pageing(void)
-{
-    get_asid_cache()->init();
-    
-    /* The Alpha ARM says that an alpha processor should support > 13 ASNs */
-    get_asid_cache()->set_valid(0, 12);
-
-    /* Create and init kernel space */
-    init_kernel_space();
-
-    /* Update the console */
-    remap_console();
-
-    /* Setup initial pcb */
-    alpha_init_pcb.ptbr = (word_t) virt_to_phys((addr_t) get_kernel_space()->pgent(0)) >> ALPHA_PAGE_BITS;
-    alpha_init_pcb.asn = get_kernel_space()->get_asid()->get();
-    alpha_init_pcb.usp = 0;
-    alpha_init_pcb.flags = 1;
-
-    /* Set up the kernel GP so kernel context is set up correctly */
-    word_t gp;
-    asm __volatile__ ("stq   $29, 0(%0)" : : "r" (&gp));
-    /* sjw (05/08/2002): We may need to do this per-cpu? */
-    PAL::wrkgp(gp);
-    
-
-    /* We do this early for the boot CPU so we can get early page faults */
-    PAL::wrent((word_t) __ent_mm, PAL::entMM);
-
-    /* Write VPTPTR */
-    PAL::wrvptptr(VLPT_AREA_START);
-
-    /* sjw (02/08/2002): Ensure that nothing gets between these two instructions that modifies sp! */
-    asm __volatile__ ("stq   $30, 0(%0)\n\t" : : "r" (&alpha_init_pcb.ksp));
-    PAL::swpctx((word_t) virt_to_phys((addr_t) &alpha_init_pcb));
-
-    PAL::tbia();
-    PAL::imb();
-
-    /* If this works ;) */
-    get_asid_cache()->set_valid(13, hwrpb->rpb_max_asn);
-}
-
-#define WRITE_SPINNER(a, b) do { static char __a[] = (a); 	video_print_string(__a, (b) - sizeof(__a) + 3); } while(0)
-
-static void init_debugging(void)
-{
-    WRITE_SPINNER("Timer[ ]",  SPIN_TIMER_INT);
-    WRITE_SPINNER("Int[ ]", SPIN_INTERRUPT);
-    WRITE_SPINNER("Yield[ ]", SPIN_YIELD);
-    WRITE_SPINNER("Idle[ ]", SPIN_IDLE);
-    WRITE_SPINNER("Slowpath[ ]", SPIN_IPC);
-}
-
-/**
- * init_bootmem - Initialises the inital RAM pool
- * @start: The start of the reserved memory region
- * @end: The end of the reserved memory region
- *
- * Description: This function initialises the kernel memory
- * allocator.
- *
- **/
-#define UPDATE_FREE(f, a) do { word_t _b = (word_t) addr_align_up((a), ALPHA_PAGE_SIZE) >> ALPHA_PAGE_BITS; if(_b > f) f = _b; } while(0)
-    
-extern word_t _end[];
-extern word_t _start[];
-
-static int INIT_TEXT init_bootmem()
-{
-    /* Initialise KIP memory info from HWRPB */
-    struct mddt *mem_desc = (struct mddt *) ( ((word_t) INIT_HWRPB) + INIT_HWRPB->rpb_memdat_off);
-    int nclusters = mem_desc->mddt_cluster_cnt;
-    struct mddt::mddt_cluster *cluster = mem_desc->mddt_clusters;
-    word_t free_start = 0;
-    
-    UPDATE_FREE(free_start, _end);
-    UPDATE_FREE(free_start, get_kip()->sigma0.mem_region.high);
-    UPDATE_FREE(free_start, get_kip()->sigma1.mem_region.high);
-    UPDATE_FREE(free_start, get_kip()->root_server.mem_region.high);
-
-    /* sjw (16/10/2002): Yuck! */
-    get_kip()->memory_info.n = 0;
-
-    /* sjw (14/10/2002): This should eventually be much nicer, but we make some assumptions here. */    
-    for(int i = 0; i < nclusters; cluster++, i++) {
-
-	memdesc_t::type_e type = (cluster->mddt_usage & 3) ? memdesc_t::reserved : memdesc_t::conventional;
-
-/*	printf("Inserting 0x%lx - 0x%lx, %d\n", cluster->start_pfn  << ALPHA_PAGE_BITS, 
-	       (cluster->start_pfn + cluster->numpages)  << ALPHA_PAGE_BITS, type);
-*/
-	get_kip()->memory_info.insert(type, false, (addr_t) (cluster->mddt_pfn << ALPHA_PAGE_BITS), 
-				      (addr_t) ( (cluster->mddt_pfn + cluster->mddt_pg_cnt) << ALPHA_PAGE_BITS));
-    }
-
-
-#ifdef CONFIG_PLAT_TSUNAMI
-    /* Values from Tsunami 21272 Chipset -- Function description */
-#if CONFIG_ALPHA_ADDRESS_BITS == 48
-    get_kip()->memory_info.insert(memdesc_t::dedicated, false,
-				  (addr_t) (1UL << 43), 
-				  (addr_t) ((1UL << 43) + 0x3FF000000));
-#endif
-
-#if CONFIG_ALPHA_ADDRESS_BITS == 43
-    get_kip()->memory_info.insert(memdesc_t::dedicated, false,
-				  (addr_t) (1UL << 40), 
-				  (addr_t) ((1UL << 40) + 0x3FF000000));
-#endif
-
-#endif
-
-#ifdef CONFIG_PLAT_MIATA
-    /* Values from 21174 TRM */
-    get_kip()->memory_info.insert(memdesc_t::dedicated, false,
-				  (addr_t) 0x8000000000, 
-				  (addr_t) 0x8700000000);
-    get_kip()->memory_info.insert(memdesc_t::dedicated, false,
-				  (addr_t) 0x8780000000, 
-				  (addr_t) 0x87B0000000);
-
-    /* These are here if Byte/Word mode is enabled */
-    get_kip()->memory_info.insert(memdesc_t::dedicated, false,
-				  (addr_t) 0x8800000000, 
-				  (addr_t) 0xbc00000000);
-    get_kip()->memory_info.insert(memdesc_t::dedicated, false,
-				  (addr_t) 0xc7c0000000, 
-				  (addr_t) 0xc800000000);
-#endif
-
-    /* Console area + kernel */
-    /* sjw (22/10/2002): Make this more accurate! */
-    get_kip()->memory_info.insert(memdesc_t::reserved, false,
-				  0,
-				  addr_align_up (_end, ALPHA_PAGE_SIZE));
-    
-    cluster = mem_desc->mddt_clusters;
-    /* Find some bootmem */
-    for(int i = 0; i < nclusters; cluster++, i++) {
-	word_t start = cluster->mddt_pfn;
-	int npages = cluster->mddt_pg_cnt;
-
-	if((start + npages) < free_start)
-	    continue;
-
-	if(start < free_start) {
-	    npages -= (free_start - start);
-	    start = free_start;
-	}
-
-	if(npages < BOOTMEM_PAGES)
-	    continue;
-
-	start <<= ALPHA_PAGE_BITS;
-	word_t end = start + (BOOTMEM_PAGES << ALPHA_PAGE_BITS);
-	
-	get_kip()->memory_info.insert(memdesc_t::reserved, false,
-				      (addr_t) start, (addr_t) end);
-		
-	kmem.init(phys_to_virt((addr_t) start), phys_to_virt((addr_t) end));
-
-	return 0;
-    }
-
-    printf("Couldn't find enough bootmem!");
-
-    /* can't drop to debugger as we don't have enough state set up */
-    PAL::halt();
-    
-    return 1;
-}
-
-#undef UPDATE_FREE
-
-static int INIT_TEXT init_arch(void)
-{
-    /* Note that this is called twice --- once before init_pageing, and once after */
-    init_console();
-
-    /* initialize kernel interface page */
-    get_kip()->init();
-
-    /* start and end are link variables */
-    init_bootmem();
-
-    /* initialise page tables */
-    init_pageing();
-
-    /* Really init console ;) */
-    init_console();
-
-    /* initialize mapping database */
-    init_mdb();
-
-    /* initialize kernel debugger if any */
-    if (get_kip()->kdebug_init)
-	get_kip()->kdebug_init();
-
-    /* Initialise global interrupt state */
-    get_interrupt_ctrl()->init_arch();    
-
-    /* Initialise timer state */
-    get_timer()->init_global();    
-
-    return 0;
-}
-
-
-/**
- * init_cpu - Initialises per-CPU information
- *
- * Description: Initialised the per-CPU state for this 
- * processor.  This will be the first (C) function called
- * by a new processor.  
- *
- * The boot processor is guaranteed to call this before any other
- * processor (before the other processors are started).
- *
- **/
-extern "C" void INIT_TEXT init_cpu(void)
-{
-    /* Initialise PAL context (register for interrupts etc. */
-    
-    /* Ensure that we will not take any interrupts (e.g. the clock).  We
-     * can't take any page faults until this is set up, also.
-     */
-    PAL::swpipl(PAL::IPL_highest);
-
-    /* Now set up the trap vectors */
-    /* sjw (23/07/2002): Should this go in intctr_t::init_cpu()? */
-    PAL::wrent((word_t) __ent_interrupt, PAL::entInt);
-    PAL::wrent((word_t) __ent_arith, PAL::entArith);
-    PAL::wrent((word_t) __ent_mm, PAL::entMM);
-    PAL::wrent((word_t) __ent_if, PAL::entIF);
-    PAL::wrent((word_t) __ent_una, PAL::entUna);
-    PAL::wrent((word_t) __ent_sys, PAL::entSys);
-
-    /* Initialise local interrupt state */
-    get_interrupt_ctrl()->init_cpu();    
-
-    /* Initialise local timer state */
-    get_timer()->init_cpu();
-
-    /* Initilise local resources */
-    get_resources()->init_cpu();
-}
-
-extern "C" 
-void
-memcpy(char *dest, char *src, int size)
-{
-	int i=0;
-	for(i=0; i<size;i++)
-		dest[i] = src[i];
-}
-
-#if defined(CONFIG_ALPHA_PAL_IPC_FASTPATH)
-void setup_pal()
-{
-    char *pal_stub_addr = \
-	    (char*) (0xfffffc0000000000ul + 0x1bc00);
-    char *fast_path_addr = (char *) (0xfffffc0000000000ul + 0x22000);
-
-    memcpy(pal_stub_addr, &_start_pal_stub, &_end_pal_stub - &_start_pal_stub);
-    memcpy(fast_path_addr, &_start_pal_code, &_end_pal_code - &_start_pal_code);
-
-    PAL::cflush(0x1bc00 >> ALPHA_PAGE_BITS);
-    PAL::cflush(0x22000 >> ALPHA_PAGE_BITS);
-}
-#endif
-
-extern "C" void INIT_TEXT startup_system()
-{
-
-    init_arch();
-    init_cpu();
-
-#if defined(CONFIG_ALPHA_PAL_IPC_FASTPATH)
-    setup_pal();
-#endif
-
-    init_hello();
-
-    dump_info();
-    /* sjw (23/07/2002): Start up other CPUs here */
-
-    init_debugging();
-//    interrupt_test();
-
-    /* initialize the scheduler */
-    get_current_scheduler()->init();
-    /* get the thing going - we should never return */
-    get_current_scheduler()->start();
-    
-    /* make sure we don't fall off the edge */
-    spin_forever(1);    
-}
diff --git a/kernel/src/glue/v4-alpha/intctrl.cc b/kernel/src/glue/v4-alpha/intctrl.cc
deleted file mode 100644
index 7bcfe8b8..00000000
--- a/kernel/src/glue/v4-alpha/intctrl.cc
+++ /dev/null
@@ -1,36 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/intctrl.cc
- * Description:   Implementation of interrupt control functionality 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.cc,v 1.5 2003/09/24 19:05:32 skoglund Exp $
- *                
- ********************************************************************/
-
-#include INC_GLUE(intctrl.h)
-
-intctrl_t intctrl;
-
diff --git a/kernel/src/glue/v4-alpha/intctrl.h b/kernel/src/glue/v4-alpha/intctrl.h
deleted file mode 100644
index cd4d7ba6..00000000
--- a/kernel/src/glue/v4-alpha/intctrl.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003   University of New South Wales
- *                
- * File path:     glue/v4-alpha/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.8 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__INTCTRL_H__
-#define __GLUE__INTCTRL_H__
-
-#include INC_PLAT(intctrl.h)
-
-/**
- * @return pointer to interrupt controller
- */
-INLINE intctrl_t * get_interrupt_ctrl() 
-{
-    extern intctrl_t intctrl;
-    return &intctrl;
-}
-
-#endif /* __GLUE__INTCTRL_H__ */
diff --git a/kernel/src/glue/v4-alpha/ipcregs.h b/kernel/src/glue/v4-alpha/ipcregs.h
deleted file mode 100644
index b37576cf..00000000
--- a/kernel/src/glue/v4-alpha/ipcregs.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003  University of New South Wales
- *                
- * File path:     glue/v4-alpha/ipcregs.h
- * Created:       09/03/2003 15:30:05 by Simon Winwood (sjw)
- * Description:   IPC register definition 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ipcregs.h,v 1.3 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__IPCREGS_H__
-#define __GLUE__V4_ALPHA__IPCREGS_H__
-
-#ifdef __LANGUAGE_ASSEMBLY__
-#define DECLARE_REGISTER(a) a
-#else
-#define DECLARE_REGISTER(a) #a
-#endif
-
-#define R_MR0		DECLARE_REGISTER($15)
-#define R_MR1		DECLARE_REGISTER($7)
-#define R_MR2		DECLARE_REGISTER($8)
-#define R_MR3		DECLARE_REGISTER($9)
-#define R_MR4		DECLARE_REGISTER($10)
-#define R_MR5		DECLARE_REGISTER($11)
-#define R_MR6		DECLARE_REGISTER($12)
-#define R_MR7		DECLARE_REGISTER($13)
-#define R_MR8		DECLARE_REGISTER($14)
-
-#define R_TO_TID	DECLARE_REGISTER($16)
-#define R_FROM_TID	DECLARE_REGISTER($17)
-#define R_TIMEOUT	DECLARE_REGISTER($18)	
-#define R_RESULT	DECLARE_REGISTER($0)	
-
-#endif /* __GLUE__V4_ALPHA__IPCREGS_H__ */
diff --git a/kernel/src/glue/v4-alpha/irq.cc b/kernel/src/glue/v4-alpha/irq.cc
deleted file mode 100644
index a79e7f76..00000000
--- a/kernel/src/glue/v4-alpha/irq.cc
+++ /dev/null
@@ -1,179 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/irq.cc
- * Description:   Generic trap handling 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: irq.cc,v 1.13 2004/04/06 01:20:28 benno Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/tracepoints.h>
-
-#include INC_API(types.h)
-#include INC_API(schedule.h)
-#include INC_API(interrupt.h)
-#include INC_API(kernelinterface.h)
-#include INC_GLUE(syscalls.h)
-#include INC_ARCH(palcalls.h)
-#include INC_GLUE(intctrl.h)
-
-#include INC_GLUE(resources_inline.h)
-
-DECLARE_TRACEPOINT (SYS_KERNEL_INTERFACE);
-
-word_t alpha_cycles = 0;
-word_t alpha_nticks = 0;
-
-static word_t last_pcc = 0;
-
-static word_t get_pcc(void)
-{
-    word_t reg;
-
-    asm ("rpcc %0; extll %0, 0, %0" : "=r" (reg));
-
-    return reg;
-}
-
-static word_t update_pcc(void)
-{
-    word_t delta, pcc = get_pcc();
-    if(pcc < last_pcc) {
-	delta = (pcc + (1ull << 32)) - last_pcc;
-    } else {
-	delta = pcc - last_pcc;
-    }
-    last_pcc = pcc;
-    alpha_cycles += delta;
-
-    return alpha_cycles;
-}
-
-extern "C" word_t sys_system_clock(void) 
-{
-    return update_pcc();
-}
-
-extern "C" void handle_IRQ(word_t type, word_t a1, word_t a2)
-{
-    switch(type) {
-    case PAL_INT_IPI:
-	enter_kdebug("Got an IPI");
-	break;
-    case PAL_INT_CLOCK:
-    {
-	alpha_nticks++;
-
-	get_current_scheduler()->handle_timer_interrupt();
-	break;
-    }
-    case PAL_INT_ERR:
-	printf("Got a correctable error or machine check (vector 0x%lx)\n", a1);
-	handle_interrupt(MCHECK_IRQ);
-	break;
-
-    case PAL_INT_DEV:
-    {
-	int irq = get_interrupt_ctrl()->decode_irq(a1);
-	get_interrupt_ctrl()->mask(irq);
-	get_interrupt_ctrl()->ack(irq);
-
-//	printf("Got a device interrupt %d\n", irq);	
-
-	handle_interrupt(irq);
-	break;
-    }
-    case PAL_INT_PERF:
-	printf("Got a performance interrupt (vector 0x%lx)\n", a1);	
-	handle_interrupt(PERF_IRQ);
-	
-	break;
-
-    default:
-	printf("Unknown interrupt type: %d 0x%lx 0x%lx", type, a1, a2);
-	enter_kdebug("Unknown interrupt");
-	break;
-    }
-}
-
-extern "C" void handle_arith(word_t a0, word_t a1, word_t a2)
-{
-    printf("Arithmetic exception: 0x%lx, 0x%lx\n", a0, a1);
-    enter_kdebug("Arithmetic exception");
-}
-
-extern "C" void handle_if(word_t type, word_t a1, word_t a2, alpha_context_t *ctx, alpha_savedregs_t *regs)
-{
-    word_t result = 0;
-
-    switch(type) {
-    case PAL_IF_BPT:
-	enter_kdebug("Breakpoint hit");
-	break;
-    case PAL_IF_BUGCHK:
-	enter_kdebug("Bugchk hit");
-	break;
-    case PAL_IF_GENTRAP:
-	result = handle_user_trap(ctx->a0, ctx->a1);
-	break;
-    case PAL_IF_FEN: 
-    {
-	tcb_t *current_tcb = get_current_tcb();
-	current_tcb->resources.alpha_fpu_unavail_exception( current_tcb );
-	return;
-    }
-    case PAL_IF_OPDEC:
-	/* The application gets the kernel info page by doing some privileged PAL call, with 
-	   a0 ($16) == {'L', '4', 'u', 'K', 'K', 'I', 'P', '4'} == 0x4c34754b4b495034
-	*/
-	if(ctx->a0 == MAGIC_KIP_REQUEST) {
-	    regs->r0 = (word_t) get_current_space()->get_kip_page_area().get_base();
-	    ctx->a0  = get_kip()->api_version;
-	    ctx->a1 = get_kip()->api_flags;
-	    ctx->a2 = (4 << 24) | (1 << 16);
-
-	    TRACEPOINT (SYS_KERNEL_INTERFACE,
-			printf ("KernelInterface() @ %p in %p\n",
-				ctx->pc, get_current_tcb()));
-
-	    return;
-	}
-	printf("OPDEC hit @ %p\n", ctx->pc);
-	break;
-    default:
-	enter_kdebug("Unknown entIF");
-	break;
-    }
-
-    regs->r0 = result;
-}
-
-extern "C" void handle_una(word_t a0, word_t a1, word_t a2, alpha_context_t *ctx, alpha_savedregs_t *regs)
-{
-    printf("Unaligned access: VA: 0x%lx, OP: 0x%lx, REG: 0x%lx, PC: 0x%lx\n", a0, a1, a2, ctx->pc);
-    enter_kdebug("Unaligned exception");
-}
diff --git a/kernel/src/glue/v4-alpha/ktcb.h b/kernel/src/glue/v4-alpha/ktcb.h
deleted file mode 100644
index 53fa3b09..00000000
--- a/kernel/src/glue/v4-alpha/ktcb.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003 University of New South Wales
- *                
- * File path:     glue/v4-alpha/ktcb.h
- * Created:       26/07/2002 02:19:17 by Simon Winwood (sjw)
- * Description:   Kernel TCB state 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ktcb.h,v 1.8 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__KTCB_H__
-#define __GLUE__V4_ALPHA__KTCB_H__
-
-#include INC_ARCH(thread.h)
-
-class arch_ktcb_t {
- public:
-    word_t pcb_paddr;  /* used when context switching */
-    alpha_pcb_t pcb;
-};
-
-#endif /* __GLUE__V4_ALPHA__KTCB_H__ */
diff --git a/kernel/src/glue/v4-alpha/map.h b/kernel/src/glue/v4-alpha/map.h
deleted file mode 100644
index eed1cb3e..00000000
--- a/kernel/src/glue/v4-alpha/map.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2005,  Karlsruhe University
- *                
- * File path:     glue/v4-alpha/map.h
- * Description:   architecture specific mapping declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: map.h,v 1.3 2005/05/19 08:39:47 stoess Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ALPHA__MAP_H__
-#define __GLUE__V4_ALPHA__MAP_H__
-
-#include INC_API(generic-archmap.h)
-
-#endif /* !__GLUE__V4_ALPHA__MAP_H__ */
diff --git a/kernel/src/glue/v4-alpha/memory.h b/kernel/src/glue/v4-alpha/memory.h
deleted file mode 100644
index 297c72e0..00000000
--- a/kernel/src/glue/v4-alpha/memory.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003  University of New South Wales
- *                
- * File path:     glue/v4-alpha/memory.h
- * Created:       28/07/2002 02:24:02 by Simon Winwood (sjw)
- * Description:   V4 Alpha memory defines 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: memory.h,v 1.3 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__MEMORY_H__
-#define __GLUE__V4_ALPHA__MEMORY_H__
-
-/*
- * Symbols defined by linker script.
- */
-
-/* Boot memory */
-extern char _start_bootmem[];
-extern char _end_bootmem[];
-extern char _start_bootmem_phys[];
-extern char _end_bootmem_phys[];
-
-/* Kernel code and data */
-extern char _start_text_phys[];
-extern char _end_text_phys[];
-extern char _start_text[];
-extern char _end_text[];
-
-/*
- * Wrapper macros to access linker symbols.
- */
-
-#define start_text_phys		((addr_t) _start_text_phys)
-#define end_text_phys		((addr_t) _end_text_phys)
-#define start_bootmem_phys	((addr_t) _start_bootmem_phys)
-#define end_bootmem_phys	((addr_t) _end_bootmem_phys)
-#define start_bootmem		((addr_t) _start_bootmem)
-#define end_bootmem		((addr_t) _end_bootmem)
-
-#endif /* __GLUE__V4_ALPHA__MEMORY_H__ */
diff --git a/kernel/src/glue/v4-alpha/offsets.h b/kernel/src/glue/v4-alpha/offsets.h
deleted file mode 100644
index 68f542b7..00000000
--- a/kernel/src/glue/v4-alpha/offsets.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003  University of New South Wales
- *                
- * File path:     glue/v4-ia32/offsets.h
- * Description:   Addresses used for C++, asm AND linker scripts
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: offsets.h,v 1.3 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ALPHA__OFFSETS_H__
-#define __GLUE__V4_ALPHA__OFFSETS_H__
-
-/* DON'T USE 0x........UL HERE. THE LINKER WILL NOT UNDERSTAND THAT */
-
-/* The offset of the .text section's virtual and load address */
-#if CONFIG_ALPHA_ADDRESS_BITS == 43
-KERNEL_OFFSET = 0xfffffc0000000000;
-#else
-KERNEL_OFFSET = 0xffff800000000000;
-#endif /* CONFIG_ALPHA_ADDRESS_BITS */
-
-#endif /* !__GLUE__V4_IA32__OFFSETS_H__ */
diff --git a/kernel/src/glue/v4-alpha/pal_fastpath.S b/kernel/src/glue/v4-alpha/pal_fastpath.S
deleted file mode 100644
index 5734cd02..00000000
--- a/kernel/src/glue/v4-alpha/pal_fastpath.S
+++ /dev/null
@@ -1,628 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-alpha/pal_fastpath.S
- * Description:   PAL mode IPC fastpath
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pal_fastpath.S,v 1.3 2004/06/04 06:32:02 cvansch Exp $
- *                
- ********************************************************************/
-
-#include <tcb_layout.h>	
-#include <asmsyms.h>
-#include <config.h>
-#include INC_ARCH(asm.h)
-#include INC_ARCH(pal.h)
-#include INC_GLUE(config.h)
-#include INC_GLUE(ipcregs.h)
-
-#define ALIGN_FETCH_BLOCK(x) .align 4
-
-/* The rest of L4 hardcode these pcb offset... evil.. */
-#define OSF_PCB__KSP  0
-#define OSF_PCB__USP  8
-#define OSF_PCB__PTBR 16
-#define OSF_PCB__CPC  24 // PCC
-#define OSF_PCB__ASN  28
-#define OSF_PCB__UNQ  32
-#define OSF_PCB__FEN  40	
-#define OSF_PCB__RSV  48
-
-#define OSF_PCB__ASN__S		32
-#define OSF_PCB__ASN__M		0xFF
-#define OSF_PCB__FEN__S         0
-#define OSF_PCB__FEN__M         0x1
-#define OSF_PCB__PME__S         62
-#define OSF_PCB__PME__M         0x1
-
-#define OSF_P_MISC__PS__M       0xF
-
-#define OSF_FRM__PS             0x0000
-#define OSF_FRM__PC             0x0008
-#define OSF_FRM__GP             0x0010
-
-#define OSF_FRM__A0             0x0018
-#define OSF_FRM__R16            0x0018
-
-#define OSF_FRM__A1             0x0020
-#define OSF_FRM__R17            0x0020
-
-#define OSF_FRM__A2             0x0028
-#define OSF_FRM__R18            0x0028
-
-#define OSF_FRM__SIZE           0x0030
-	
-	
-/* other defines used by this file */
-
-/* '264 internal registers and offsets */
-#define EV6__PS 	 	0x9
-#define EV6__PAL_BASE		0x10
-#define	EV6__CC			0xc0 
-#define EV6__PROCESS_CONTEXT	0x5f     
-
-#define EV6__PPCE__PPCE__S 	0x1        
-#define EV6__FPE__FPE__S	0x2  
-#define EV6__ASN__ASN__S	0x27 
-	
-#define EV6__DTB_ASN0		0x25    
-#define EV6__DTB_ASN0__ASN__S	0x38    
-#define EV6__DTB_ASN1		0xa5    
-
-/* EV6 PAL temps */
-#define PT__VPTB	0x0
-#define PT__PTBR	0x8
-#define PT__PCBB	0x10
-#define PT__KSP		0x18
-#define PT__USP		0x20
-#define PT__KGP		0x28
-/* ... */
-#define PT__ENT_SYS	0x50
-#define PT__STACK_PC	0x60
-#define PT__IMPURE	0x88
-
-/* PAL shadow registers */
-#define p4     $4
-#define p5     $5
-#define p6     $6
-#define p7     $7
-#define p20    $20
-#define p21    $21
-#define p_temp $21
-#define p22    $22
-#define p_misc $22
-#define p23    $23
-
-#define r0 $0   /* v0 */
-#define r16 $16 /* a0 */
-#define r31 $31 /* zero */
-#define r29 $29 /* gp */
-#define r30 $30 /* sp */
-
-#define asn_shift  (EV6__DTB_ASN0__ASN__S - EV6__ASN__ASN__S)
-#define fpe_shift  (EV6__FPE__FPE__S - OSF_PCB__FEN__S)
-#define ppce_shift (OSF_PCB__PME__S - EV6__PPCE__PPCE__S)
-#define page_offset_size_bits 13
-
-	
-/* Pistachio IPC fastpath defines */
-#if defined(CONFIG_PREEMPT_ASIDS)
-#error ASID check in context switch code not done
-#endif
-	
-#define IPC_MAX_REGS	8
-
-/* Pistachio defines */
-#define THREAD_STATE_RUNNABLE 2
-#define THREAD_STATE_WAITING -1	
-#define IPC_MR0_PROPAGATED (1 << 12)	
-
-#if VALID_THREADNO_BITS != 16
-#error I expect VALID_THREADNO_BITS to be 16!
-#endif	
-/* 
- * Convenience functions 
- */
-
-/* Clobber lower 12 bits of stack to get TCB */
-#define GET_CURRENT(reg)	lda	reg, ASM_KTCB_MASK ;  and	reg, $30, reg
-
-/* */
-#define TID_TO_TCB(tid, tcb, tmp)						\
-	zapnot	tid, 0x30, tcb	;			/* Get threadno bits */	\
-	lda	tmp, 0xe04	;						\
-	sll	tmp, (64 - 12), tmp ;						\
-	or	tmp, tcb, tcb	;						\
-	sra	tcb, (32 - ASM_KTCB_BITS), tcb 
-
-/* API defines */					
-#define mr0		R_MR0
-#define mr1		R_MR1
-#define mr2		R_MR2
-#define mr3		R_MR3
-#define mr4		R_MR4
-#define mr5		R_MR5
-#define mr6		R_MR6
-#define mr7		R_MR7
-#define mr8		R_MR8
-
-#define to_tid		R_TO_TID
-#define from_tid	R_FROM_TID
-#define timeout		R_TIMEOUT
-	
-/* Locals */	
-#define current		$1
-#define to_tcb		$2
-#define from_tcb	$3
-#define current_global	$0
-#define dest_partner	$25
-#define current_utcb	$26 /* This is relatively free :) */
-
-		
-#define T(a)
-
-#define	tmp0		$19
-#define	tmp1		$19	
-#define	tmp2		$29 //20
-#define	tmp3		$28 //21
-#define	tmp4		$27 //22
-#define	tmp5		$19
-#define	tmp6		NOTUSED
-#define	tmp7		NOTUSED
-#define	tmp8		NOTUSED		
-#define	tmp9		dest_partner //was $23
-#define	tmp10		$24		
-#define	tmp11		NOTUSED
-#define	tmp12		$29 //20
-#define	tmp13		$24
-#define	tmp14		$29 //20
-#define	tmp15		NOTUSED
-#define	tmp16		$27 //22
-#define	tmp17		$19
-#define	tmp18		$29 //20
-#define	tmp19		$28 //21
-		
-
-		
-.global _start_pal_code
-.global _end_pal_code
-.global _start_pal_stub
-.global _end_pal_stub
-/*.section .pal_code*/
-.text
-pal_stub:	
-_start_pal_stub:
-	ldiq p4, 0x22001
-	nop
-	nop
-	nop
-
-	
-	/* Swap context code from sdk */
-	//rpcc $12
-
-	hw_jmp (p4)
-	br $31, .-4
-_end_pal_stub:	
-
-.align 4
-
-_start_pal_code:
-BEGIN_PROC(pal_ipc_fast_path)
-	/* 1) Interrupts are off because we are in PAL.
-	*  2) We should switch from PAL/user to PAL/kernel.
-	*     This path assumes it is NOT called from kernel (easy enough to fix).
-	*/
-
-	/* Set up an exception frame -- returnable via RETSYS if needed */
-
-        hw_stq/p r30, PT__USP(p_temp)          		// save user SP
-	hw_stq/p p23, PT__STACK_PC(p_temp)              // store away nextpc
-	and     p_misc, OSF_P_MISC__PS__M, p20         // save original ps
-	br	p4, p_fastpath_k_cm
-	/* Aligned */
-
-p_fastpath_k_cm:
-#define p_fastpath_k_offset (p_fastpath_k_done - p_fastpath_k_cm)	
-	addq	p4, (p_fastpath_k_offset+1), p4
-	hw_mtpr	$31, (EV6__PS << 8 | 0x10)          // (4,0L) switch to kern
-	bsr	$31, .+4		            // push prediction stack
-	hw_ret/stall (p4)			    // pop prediction stack
-	.align 4
-p_fastpath_k_done:
-
-	/* We are now in PAL/kernel mode */
-	hw_ldq/p r30, PT__KSP(p_temp)          		// get kernel SP
-	bic     p_misc, OSF_P_MISC__PS__M, p_misc       // cm=0, ipl=0
-	lda     r30, (0-OSF_FRM__SIZE)(r30)             // allocate stack space
- 	stq     p20, OSF_FRM__PS(r30)                   // save original ps
-
-	stq     r29, OSF_FRM__GP(r30)                   // save gp
-	hw_ldq/p p20, PT__STACK_PC(p_temp)              // 1.39 get nextpc back
-	stq     p20, OSF_FRM__PC(r30)                   // 1.39 save nextpc
-	nop
-
-	/* Check zero to_tid */
-	beq	to_tid, __pal_goto_slowpath
-	/*
-	 * Check conditions: infinite receive timeout, < IPC_MAX_REGS sent, 
-	 * no typed registers
-	 */	
-T(0)	zapnot	to_tid, 0x30, to_tcb			/* E0 */	/* Get threadno bits T(0) */	
-T(0)	lda	tmp0, 0xe04				/* E0 or E1 */	
-						
-T(0)	sll	tmp0, (64 - 12), tmp0			/* E0 */							
-T(3)	and	mr0, 0x3f, tmp3				/* E0 or E1 */	/* we support < IPC_MAX_REGS T(3) */
-
-T(6)	lda	current, ASM_KTCB_MASK			/* E0 or E1 */	/* get current T(6) */	
-T(0)	or	tmp0, to_tcb, to_tcb			/* E0 or E1 */							
-
-T(0)	sra	to_tcb, (32 - ASM_KTCB_BITS), to_tcb	/* E0 */ 	/* END T(0) */	
-T(6)	and	current, $30, current			/* E0 or E1 */	/* END T(6) */
-
-
-T(7)	ldq	dest_partner, OFS_TCB_SPACE(to_tcb)	/* E0 or E1 */	/* doing irq thread go to slow path */
-	beq	dest_partner, __pal_goto_slowpath
-	
-T(7)	ldq	dest_partner, OFS_TCB_PARTNER(to_tcb)	/* E0 or E1 */	/* Check partner T(7) <- T(0) */
-T(8)	ldq	current_global, OFS_TCB_MYSELF_GLOBAL(current)	/* E0 or E1 */	/* Get current_global T(8) <- T(6) */
-	
-
-T(1)	zapnot	timeout, 0x3, tmp1			/* E0 */	/* infinite timeout T(1) */			
-T(2)	ldiq	tmp2, (0x3f << 6) | IPC_MR0_PROPAGATED	/* E0 or E1 */	/* num_typed is bits 6 - 11 (6 bits) in mr0 T(2) */
-	
-T(10)	cmpeq	current_global, dest_partner, tmp10	/* E0 or E1 */  /* partner check T(10) <- (T(8), T(7)) */
-T(9)	addq	dest_partner, 1, tmp9			/* E0 or E1 */	/* is_anythread == -1 T(9) <- T(7) */	
-
-T(11)	cmovne	tmp10, 0, tmp9				/* E0 or E1 */  /* tmp9 == 0 or tmp10 != 0 -> fast_path T(11) <- (T(9), T(10)) */
-	nop								/* Hopefully this will be squashed by the cmove */
-	
-T(13)	ldq	tmp13, OFS_TCB_SEND_HEAD(current)	/* E0 or E1 */	/* Require send_head to be empty T(13) <- T(6) */	
-T(1)	bne	tmp1, __pal_goto_slowpath		/* E1 */	/* From timeout END T(1) */
-
-T(4)	ldq	tmp4, OFS_TCB_MYSELF_GLOBAL(to_tcb)	/* E0 or E1 */	/* Check global ID T(4) <- T(0) */		
-T(5)	ldl	tmp5, OFS_TCB_THREAD_STATE(to_tcb)	/* E0 or E1 */	/* Check partner is waiting T(5) <- T(0) */
-
-T(2)	and	tmp2, mr0, tmp2				/* E0 or E1 */	
-T(11)	bne	tmp9, __pal_goto_slowpath		/* E1 */	/* END T(9) END T(10) END T(11) */
-	
-T(3)	cmple	tmp3, IPC_MAX_REGS, tmp3		/* E0 or E1 */	
-T(3)	beq	tmp3, __pal_goto_slowpath		/* E1 */	/* From IPC_MAX_REGS END T(3) */
-
-T(4)	cmpeq	tmp4, to_tid, tmp4			/* E0 or E1 */
-T(4)	beq	tmp4, __pal_goto_slowpath		/* E1 */	/* from global ID check. END T(4) */
-			
-T(5)	addq	tmp5, 1, tmp5				/* E0 or E1 */
-T(2)	bne	tmp2, __pal_goto_slowpath		/* E1 */	/* From num_typed END T(2)*/
-
-T(12)	addq	from_tid, 1, tmp12			/* E0 or E1 */	/* Check that receive phase blocks T(12) */
-T(5)	bne	tmp5, __pal_goto_slowpath		/* E1 */	/* From is_waiting check END T(5) */
-	/* Works to here */
-	nop						/* This isn't such a bad place for this nop --- probably 50% chance here */
-T(12)	bne	tmp12, check_other_tcb			/* E1 */	/* END T(12) */	
-
-T(14)	ldiq	tmp14, THREAD_STATE_WAITING		/* E0 or E1 */	/* Set thread state to waiting T(14) */	
-T(13)	bne	tmp13, __pal_goto_slowpath		/* E1 */	/* END T(13) */
-	
-	/* FALLTHRU */
-	
-continue_ipc:
-	/* This is the point of no return --- after this we cannot go
-	to the slow path */ 
-	
-	/* At this point, we have set up the sending thread's TCB
-	state.  We now setup the stack so that when we are next
-	switched to we do the right thing (set state to running and
-	return partner) --- this only happens in the generic send
-	case.  */
-
-	/* Works to here */
-
-T(17)	ldq	$16, OFS_TCB_ARCH(to_tcb)		/* E0 or E1 */	/* Gives the PA of the PCB T(17) END T(17) */	
-
-#if 0 /* Evil shit */
-T(16)	lda	tmp16, goto_finish			/* E0 or E1 */	/* turns into a ldq ... grumble  T(16) */
-#endif
-	
-/* This block of code if fucked */
-
-        lda tmp17, -0x400($31)
-        br tmp16, next_foo
-next_foo:
-	lda tmp16, (goto_finish - next_foo)(tmp16)
-	bic	tmp16, 0x1, tmp16
-T(16)	subq	$30, ALPHA_SWITCH_STACK_SIZE, $30	/* E0 or E1 */	/* Save RA */
-        sll tmp17, 32, tmp17
-T(14)	stl	tmp14, OFS_TCB_THREAD_STATE(current)	/* E0 or E1 */	/* END T(14) */
-
-	addq tmp16, tmp17, tmp16
-	
-T(15)	stq	from_tid, OFS_TCB_PARTNER(current)	/* E0 or E1 */	/* Set partner T(15) END T(15) */
-T(16)	stq	tmp16, SWITCH_STACK_RA($30)		/* E0 or E1 */	/* END T(16) */
-	/* t0, t8..t11, a0 trashed, v0 contains old ctx */
-T(17)	lda	tmp17, THREAD_STATE_RUNNABLE		/* E0 or E1 */	/*
-									 * Make thread runnable */
-		/* ALIGNED.. start pal stuff here */
-
-	/* How is this different from current?? */
-	hw_ldl/p p6, OSF_PCB__ASN(r16)		// get new cpc/asn
-	hw_ldq/p tmp16, PT__PCBB(p_temp)		// get old PCBB
-	hw_ldq/p p7, PT__USP(p_temp)		// get usp
-	and	p6, OSF_PCB__ASN__M, p6		// clean ASN
-
-	
-	hw_stq/p r30, OSF_PCB__KSP(tmp16)		// store ksp
-	hw_stq/p p7, OSF_PCB__USP(tmp16)		// store usp
-	sll	p6, EV6__DTB_ASN0__ASN__S, p6	// ASN into mbox spot
-	nop
-	
-	hw_ldq/p p5, OSF_PCB__FEN(r16)		// get new fen/pme
-	hw_stq/p r16, PT__PCBB(p_temp)		// set new PCBB
-	nop
-	nop	
-//
-// Now write ASN to DTB_ASNx.
-//
-// Current state:
-//	p5	fen/pme quadword
-//	p6	cpc/asn quadword
-//
-//
-// There must be a scoreboard bit -> register dependency chain to prevent
-// hw_mtpr DTB_ASx from issuing while ANY of scoreboard bits <7:4> are set.
-//
-	hw_mfpr	p7, (EV6__PAL_BASE << 8 | 0xF0)	// (4-7,0L)
-	xor	p7, p7, p7			// zap p7
-	bis	p7, p6, p6			// force register dependency
-	NOP					// force fetch block
-
-	.align 4
-	hw_mtpr	p6, (EV6__DTB_ASN0 << 8 | 0x10)		// (4,0L)
-	hw_mtpr	p6, (EV6__DTB_ASN1 << 8 | 0x80)		// (7,1L)
-	sll	p5, fpe_shift, p4		// get FEN into position
-T(18)	lda	tmp18, ASM_KTCB_SIZE - ALPHA_CONTEXT_SIZE /* E0 or E1 */	/* Clean up stack T(18) */	
-
-
-//
-// Create Ibox Process Context IPR, filling in ASN, FPE, PPCE
-//
-// Current state:
-//	p5	fen/pme quadword
-//	p6	asn in DTB_ASNx position
-//
-
-
-	hw_ldq/p p7, OSF_PCB__PTBR(r16)		// get new PTBR
-	srl	p6, (asn_shift), p6		// ASN back into ibox position
-	and	p4, (1<<EV6__FPE__FPE__S), p4	// clean it
-	bis	p6, p4, p6			// or in FEN enable
-
-
-	srl	p5, ppce_shift, p4		// get pme into position
-	and	p4, (1<<EV6__PPCE__PPCE__S), p4	// clean it
-	bis	p6, p4, p6			// or in ppce bit
-	hw_mtpr	p6, (EV6__PROCESS_CONTEXT << 8 | 0x10)	// (4,0L) write it
-
-#if 0
-	.align 4
-	bis	r0, r0, r0			// force retire
-	nop
-	nop
-	hw_mtpr p6, (EV6__PROCESS_CONTEXT << 8 | 0x10)
-#endif
-	//rpcc $12
-	//.align 4
-
-
-		/* May need alignment */
-//
-// Write new PTBR, get new USP and SP, save USP.
-//
-	
-	hw_ldq/p p5, OSF_PCB__USP(r16)		// get new USP
-	//hw_ldq/p r30, OSF_PCB__KSP(r16)		// get new KSP
-
-	sll	p7, page_offset_size_bits, p7	// convert PFN
-	hw_stq/p p7, PT__PTBR(p_temp)		// store new PTBR
-	hw_stq/p p5, PT__USP(p_temp)		// save USP
-
-
-	/* Swap context done */
-T(17)	stl	tmp17, OFS_TCB_THREAD_STATE(to_tcb)	/* E0 or E1 */	/* END T(17) */
-	/* ldiq is two instructions! */
-T(19)	ldiq	tmp19, ~(0xe << 12)			/* E0 or E1 */	/* Clear receive flags in mr0 T(19) */
-	
-T(18)	addq	to_tcb, tmp18, $30			/* E0 or E1 */	/* END T(18) */
-T(19)	and	mr0, tmp19, mr0				/* E0 or E1 */	/* END T(19) */
-
-//	nop
-
-      /* We made this look like a syscall, so now we return to user
-       * using the RETSYS call path
-       */
-	//rpcc $13
-	//.align 4
-
-	call_pal	PAL_retsys			/* E1 */
-
-
-	.align	4
-	/* Check whether from_tid is polling */
-check_other_tcb:	
-	beq	from_tid, __pal_goto_slowpath
-	/* works up to here */
-	
-	TID_TO_TCB(from_tid, from_tcb, tmp1)
-
-T(14)	ldiq	tmp14, THREAD_STATE_WAITING		/* E0 or E1 */	/* Set thread state to waiting T(14) */	
-	
-	/* Check global ID */
-	/* works to here */
-	ldq	tmp1, OFS_TCB_MYSELF_GLOBAL(from_tcb)
-	cmpeq	tmp1, from_tid, tmp1
-	beq	tmp1, __pal_goto_slowpath
-	
-	/* 
-	 * Check if the thread is polling us --- if so, go to slow path
-	 */
-
-	/* is_polling():	thread_state == 5 << 1*/
-	ldl	tmp1, OFS_TCB_THREAD_STATE(from_tcb)
-	cmpeq	tmp1, 5 << 1, tmp1
-	beq	tmp1, continue_ipc		/* from_tcb isn't polling */
-
-	/* partner == current->global_id */
-	ldq	tmp1, OFS_TCB_PARTNER(from_tcb)
-	cmpeq	tmp1, current_global, tmp2
-	bne	tmp2, __pal_goto_slowpath	/* If the other thread is polling us, goto the slowpath */
-	
-	/* partner == current->local_id */
-	ldq	tmp2, OFS_TCB_MYSELF_LOCAL(current)
-	cmpeq	tmp1, tmp2, tmp2
-	beq	tmp2, continue_ipc
-
-	br	__pal_goto_slowpath
-
-	/* goto_finish (__ipc_finish) must be executed in non-PAL/kernel mode. */
-goto_finish:
-	bsr	$31, __pal_ipc_finish
-END_PROC(pal_ipc_fast_path)
-
-BEGIN_PROC(__pal_ipc_finish)
-	
-	GET_CURRENT(current)
-	
-	/* first the state */
-	ldiq	tmp1, THREAD_STATE_RUNNABLE
-	stl	tmp1, OFS_TCB_THREAD_STATE(current)
-	ldq	$0, OFS_TCB_PARTNER(current)
-
-	/* Now the message contents */
-	/* OPT:	only load as many MRs as there have been sent */
-	ldq	current_utcb, OFS_TCB_UTCB(current)
-	ldq	mr0, UTCB_MR_OFFSET +  0(current_utcb)
-	ldq	mr1, UTCB_MR_OFFSET +  8(current_utcb)
-	ldq	mr2, UTCB_MR_OFFSET + 16(current_utcb)
-	ldq	mr3, UTCB_MR_OFFSET + 24(current_utcb)
-	ldq	mr4, UTCB_MR_OFFSET + 32(current_utcb)
-	ldq	mr5, UTCB_MR_OFFSET + 40(current_utcb)
-	ldq	mr6, UTCB_MR_OFFSET + 48(current_utcb)
-	ldq	mr7, UTCB_MR_OFFSET + 56(current_utcb)
-	ldq	mr8, UTCB_MR_OFFSET + 64(current_utcb)							
-	call_pal	PAL_retsys
-	nop
-	nop
-	nop
-END_PROC(__pal_ipc_finish)
-
-#if 0
-BEGIN_PROC(__pal_irq_handler)
-	/* Unmask irq */
-	/* Evil.. assuming pci for now */
-	/* cached_irq_mask |= (1UL << (irq - BASE_PCI_IRQ));*/
-	//ldq	tmp0, 0(cached_irq_mask)
-
-	/* $19 == 0xfffffd01a0000200 == AS_KSEG_START + 0x101a0000200UL
-		== TSUNAMI_IRQ_MASK */
-	lda	$19, -0x2ff($31)
-	lda	$29, 0xa($31)
-	sll	$29, 28, $29
-	lda	$27, 0x2($31)
-	sll	$27, 8, $27
-	addq	$27, $29, $29
-	addq	$19, $29, $19
-
-
-	ldq	$28, 0($19)
-			
-	srl	to_tcb, 32, $29
-	/* 24 is BASE_PCI_IRQ */
-	subl	$29, 24, $29
-	lda	$24, 1
-	sll	$24, $29, $24
-	bis	$28, $24, $28
-
-	
-	stq	$28, 0($19)
-
-	
-/*                 0xfffffc0000000000	
-/*	AS_KSEG_START + 0x101a0000200UL*/
-/*                   fffffd01a0000200 */
-	/* */
-	
-        lda tmp17, -0x400($31)
-        br tmp16, next_irq_foo
-next_irq_foo:
-	lda tmp16, (goto_irq_finish - next_irq_foo)(tmp16)
-	bic	tmp16, 0x1, tmp16
-T(16)	subq	$30, ALPHA_SWITCH_STACK_SIZE, $30	/* E0 or E1 */	/* Save RA */
-        sll tmp17, 32, tmp17
-T(14)	stl	tmp14, OFS_TCB_THREAD_STATE(current)	/* E0 or E1 */	/* END T(14) */
-
-	addq tmp16, tmp17, tmp16
-	
-T(15)	stq	from_tid, OFS_TCB_PARTNER(current)	/* E0 or E1 */	/* Set partner T(15) END T(15) */
-T(16)	stq	tmp16, SWITCH_STACK_RA($30)		/* E0 or E1 */	/* END T(16) */
-
-	/* Setup return stack */
-//foo:	br	$31, foo
-	/* Switch to next runnable */
-
-	hw_ldq/p p23, PT__ENT_SYS(p_temp)               // get entry point
-	hw_ldq/p r29, PT__KGP(p_temp)                   // get kgp
-
-	mov	$31, $16
-	lda	$0, 0x1($31) // XXX we should call __ipc_goto_slowpath directly!
-	 
-	hw_ret  (p23)				             // to os
-	
-goto_irq_finish:
-	bsr	$31, __pal_ipc_finish
-END_PROC(__pal_irq_handler)
-#endif
-			
-BEGIN_PROC(__pal_goto_slowpath)
-	/* handles getting out of PAL can calling IPC slow path */
-	/* 1) currently in PAL/kernel mode: switch to kernel (non-PAL) mode,
-	 *  branch to __ipc_goto_slowpath code (do this at non pal time)
-	 * We need to make sure we save the right state to get back 
-	 * (make it look like callsys).
-	 */
-
-	/* Same code CALLSYS does.. we should have done the other stuff earlier.. */
- 
-//foo:	br	$31, foo
-
-	hw_ldq/p p23, PT__ENT_SYS(p_temp)               // get entry point
-	hw_ldq/p r29, PT__KGP(p_temp)                   // get kgp
-
-	mov	$31, $0		// XXX we should call __ipc_goto_slowpath directly!
-	 
-	hw_ret  (p23)				             // to os
-END_PROC(__pal_goto_slowpath)	
-		
-_end_pal_code:
-
diff --git a/kernel/src/glue/v4-alpha/resources.cc b/kernel/src/glue/v4-alpha/resources.cc
deleted file mode 100644
index 17cebc36..00000000
--- a/kernel/src/glue/v4-alpha/resources.cc
+++ /dev/null
@@ -1,190 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  The University of New South Wales
- *                
- * File path:     glue/v4-alpha/resources.cc
- * Description:   thread resource management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.cc,v 1.2 2003/10/21 07:50:22 sjw Exp $
- *
- * Derived from glue/v4-powerpc/resources.cc
- *                
- ********************************************************************/
-
-#include INC_API(tcb.h)
-
-processor_resources_t processor_resources UNIT("cpulocal");
-
-INLINE void thread_resources_t::deactivate_fpu( tcb_t *tcb )
-{
-    get_resources()->clear_fp_lazy_tcb();
-
-    if(get_current_tcb() == tcb) {
-	PAL::wrfen(0);
-    } else {
-	tcb->get_arch()->pcb.clear_fen();
-    }
-}
-
-INLINE void thread_resources_t::activate_fpu( tcb_t *tcb )
-{
-    get_resources()->set_fp_lazy_tcb(tcb);
-
-    if(get_current_tcb() == tcb) {
-	PAL::wrfen(1);
-    } else {
-	tcb->get_arch()->pcb.set_fen();
-    }
-}
-
-void thread_resources_t::dump (tcb_t * tcb)
-{
-}
-
-void thread_resources_t::save( tcb_t *tcb )
-{
-}
-
-void thread_resources_t::load( tcb_t *tcb )
-{
-    if( EXPECT_TRUE(tcb->resource_bits == 0) )
-	return;
-}
-
-void thread_resources_t::purge( tcb_t *tcb )
-{
-    if( get_resources()->get_fp_lazy_tcb() == tcb )
-	this->spill_fpu( tcb );
-}
-
-void thread_resources_t::init( tcb_t *tcb )
-{
-    tcb->resource_bits = 0;
-}
-
-void thread_resources_t::free( tcb_t *tcb )
-{
-    if( get_resources()->get_fp_lazy_tcb() == tcb )
-	this->deactivate_fpu( tcb );
-}
-
-void thread_resources_t::spill_fpu( tcb_t *tcb )
-{
-    // Spill the registers.
-    u64_t *start = this->fpu_state;
-
-    /* HACK ALERT */
-    PAL::wrfen(1);
-
-    asm volatile (
-	"stt     $f0,0(%0)\n\t"
-	"stt     $f1,8(%0)\n\t"
-	"stt     $f2,16(%0)\n\t"
-	"stt     $f3,24(%0)\n\t"
-	"stt     $f4,32(%0)\n\t"
-	"stt     $f5,40(%0)\n\t"
-	"stt     $f6,48(%0)\n\t"
-	"stt     $f7,56(%0)\n\t"
-	"stt     $f8,64(%0)\n\t"
-	"stt     $f9,72(%0)\n\t"
-	"stt     $f10,80(%0)\n\t"
-	"stt     $f11,88(%0)\n\t"
-	"stt     $f12,96(%0)\n\t"
-	"stt     $f13,104(%0)\n\t"
-	"stt     $f14,112(%0)\n\t"
-	"stt     $f15,120(%0)\n\t"
-	"stt     $f16,128(%0)\n\t"
-	"stt     $f17,136(%0)\n\t"
-	"stt     $f18,144(%0)\n\t"
-	"stt     $f19,152(%0)\n\t"
-	"stt     $f20,160(%0)\n\t"
-	"stt     $f21,168(%0)\n\t"
-	"stt     $f22,176(%0)\n\t"
-	"stt     $f23,184(%0)\n\t"
-	"stt     $f24,192(%0)\n\t"
-	"stt     $f25,200(%0)\n\t"
-	"stt     $f26,208(%0)\n\t"
-	"stt     $f27,216(%0)\n\t"
-	"stt     $f28,224(%0)\n\t" 
-	"stt     $f29,232(%0)\n\t"
-	"stt     $f30,240(%0)\n\t"
-        "mf_fpcr $f0\n\t"
-	"stt     $f0,248(%0)\n\t"
-	: /* ouputs */
-	: /* inputs */
-	"r" (start)
-	);
-
-    PAL::wrfen(0); /* Could probably leave this be ... */
-
-    this->deactivate_fpu( tcb );
-}
-
-void thread_resources_t::restore_fpu( tcb_t *tcb )
-{
-    // Load the registers.
-    u64_t *start = this->fpu_state;
-
-    this->activate_fpu( tcb );
-
-    asm volatile (
-	"ldt     $f0,248(%0)\n\t"
-        "mt_fpcr $f0\n\t"
-	"ldt     $f0,0(%0)\n\t"
-	"ldt     $f1,8(%0)\n\t"
-	"ldt     $f2,16(%0)\n\t"
-	"ldt     $f3,24(%0)\n\t"
-	"ldt     $f4,32(%0)\n\t"
-	"ldt     $f5,40(%0)\n\t"
-	"ldt     $f6,48(%0)\n\t"
-	"ldt     $f7,56(%0)\n\t"
-	"ldt     $f8,64(%0)\n\t"
-	"ldt     $f9,72(%0)\n\t"
-	"ldt     $f10,80(%0)\n\t"
-	"ldt     $f11,88(%0)\n\t"
-	"ldt     $f12,96(%0)\n\t"
-	"ldt     $f13,104(%0)\n\t"
-	"ldt     $f14,112(%0)\n\t"
-	"ldt     $f15,120(%0)\n\t"
-	"ldt     $f16,128(%0)\n\t"
-	"ldt     $f17,136(%0)\n\t"
-	"ldt     $f18,144(%0)\n\t"
-	"ldt     $f19,152(%0)\n\t"
-	"ldt     $f20,160(%0)\n\t"
-	"ldt     $f21,168(%0)\n\t"
-	"ldt     $f22,176(%0)\n\t"
-	"ldt     $f23,184(%0)\n\t"
-	"ldt     $f24,192(%0)\n\t"
-	"ldt     $f25,200(%0)\n\t"
-	"ldt     $f26,208(%0)\n\t"
-	"ldt     $f27,216(%0)\n\t"
-	"ldt     $f28,224(%0)\n\t" 
-	"ldt     $f29,232(%0)\n\t"
-	"ldt     $f30,240(%0)\n\t"
-	: /* ouputs */
-	: /* inputs */
-	"r" (start)
-	);
-}
-
diff --git a/kernel/src/glue/v4-alpha/resources.h b/kernel/src/glue/v4-alpha/resources.h
deleted file mode 100644
index 9a822f29..00000000
--- a/kernel/src/glue/v4-alpha/resources.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/resources.h
- * Created:       17/09/2002 17:01:55 by Simon Winwood (sjw)
- * Description:   CPU resources 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.h,v 1.5 2004/06/04 02:27:51 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__RESOURCES_H__
-#define __GLUE__V4_ALPHA__RESOURCES_H__
-
-class thread_resources_t : public generic_thread_resources_t 
-{
-public:
-    void dump(tcb_t * tcb);
-    void save(tcb_t * tcb);
-    void load(tcb_t * tcb);
-    void purge(tcb_t * tcb);
-    void init(tcb_t * tcb);
-    void free(tcb_t * tcb);
-
-public:
-    void alpha_fpu_unavail_exception( tcb_t *tcb );
-
-private:
-    void spill_fpu( tcb_t *tcb );
-    void restore_fpu( tcb_t *tcb );
-    void deactivate_fpu( tcb_t *tcb );
-    void activate_fpu( tcb_t *tcb );
-
-private:
-    u64_t fpu_state[32]; /* 31 FPRs and 1 FPSCR */
-};
-
-class processor_resources_t {
- public:
-    void init_cpu(void) {
-	fp_lazy_tcb = NULL;
-    }
-
- public:
-    tcb_t *get_fp_lazy_tcb() {
-	return fp_lazy_tcb;
-    }
-
-    void set_fp_lazy_tcb( tcb_t *tcb ) {
-	fp_lazy_tcb = tcb;
-    }
-
-    void clear_fp_lazy_tcb() {
-	fp_lazy_tcb = NULL;
-    }
-    
- private:
-    tcb_t *fp_lazy_tcb;
-};
-
-INLINE processor_resources_t *get_resources(void) 
-{
-    extern processor_resources_t processor_resources;
-    return &processor_resources;
-}
-
-#endif /* __GLUE__V4_ALPHA__RESOURCES_H__ */
diff --git a/kernel/src/glue/v4-alpha/resources_inline.h b/kernel/src/glue/v4-alpha/resources_inline.h
deleted file mode 100644
index ded75954..00000000
--- a/kernel/src/glue/v4-alpha/resources_inline.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/resources_inline.h
- * Description:   inline routines for resources.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources_inline.h,v 1.3 2004/06/04 02:27:51 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ALPHA__RESOURCES_INLINE_H__
-#define __GLUE__V4_ALPHA__RESOURCES_INLINE_H__
-
-#include INC_API(resources.h)
-
-INLINE void thread_resources_t::alpha_fpu_unavail_exception( tcb_t *tcb )
-{
-    tcb_t *fp_tcb = get_resources()->get_fp_lazy_tcb();
-
-    /* In our lazy floating point model, we should never see a floating point
-     * exception if the current tcb already owns the floating point register
-     * file.
-     */
-    ASSERT( fp_tcb != tcb );
-
-    if( fp_tcb )
-	fp_tcb->resources.spill_fpu( fp_tcb );
-
-    this->restore_fpu( tcb );
-}
-
-#endif /* !__GLUE__V4_ALPHA__RESOURCES_H__ */
diff --git a/kernel/src/glue/v4-alpha/schedule.h b/kernel/src/glue/v4-alpha/schedule.h
deleted file mode 100644
index fb8559a0..00000000
--- a/kernel/src/glue/v4-alpha/schedule.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003 University of New South Wales
- *                
- * File path:     glue/v4-alpha/schedule.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: schedule.h,v 1.6 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <config.h>
-
-#include INC_ARCH(palcalls.h)
-
-/**
- * @todo document me
- */
-INLINE u64_t get_timer_tick_length()
-{
-    return TIMER_TICK_LENGTH;
-}
-
-/**
- * send the current processor to sleep
- */
-INLINE void processor_sleep()
-{
-    /* We need to get timer interrupts, etc., so enable interrupts
-     * here.  Note that we also need timer interrupts to be disabled when
-     * we return so we don't get any nasty kernel-preemptions */
-    word_t old_ipl = PAL::swpipl(PAL::IPL_all);
-    for(int i = 0; i < 100; i++) {
-	asm __volatile__ ("nop");
-    }
-
-    PAL::swpipl(old_ipl);
-}
diff --git a/kernel/src/glue/v4-alpha/smp.h b/kernel/src/glue/v4-alpha/smp.h
deleted file mode 100644
index 382f66b6..00000000
--- a/kernel/src/glue/v4-alpha/smp.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003  University of New South Wales
- *                
- * File path:     glue/v4-alpha/smp.h
- * Created:       17/09/2002 17:03:48 by Simon Winwood (sjw)
- * Description:   SMP specific functionality 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: smp.h,v 1.3 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__SMP_H__
-#define __GLUE__V4_ALPHA__SMP_H__
-
-#warning PORTME
-
-
-#endif /* __GLUE__V4_ALPHA__SMP_H__ */
diff --git a/kernel/src/glue/v4-alpha/space-stub.cc b/kernel/src/glue/v4-alpha/space-stub.cc
deleted file mode 100644
index 0154d941..00000000
--- a/kernel/src/glue/v4-alpha/space-stub.cc
+++ /dev/null
@@ -1,44 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     glue/v4-alpha/space-stub.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space-stub.cc,v 1.4 2003/09/24 19:05:32 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include INC_GLUE(space.h)
-
-#warning PORTME
-
-/* if not using linear_ptab_walker, use these */
-void space_t::map_fpage(fpage_t snd_fpage, word_t snd_base, space_t * dst_space, fpage_t rcv_fpage, bool grant)
-{
-}
-
-fpage_t space_t::unmap_fpage(fpage_t fpage, bool flush, bool unmap_all)
-{
-}
diff --git a/kernel/src/glue/v4-alpha/space.cc b/kernel/src/glue/v4-alpha/space.cc
deleted file mode 100644
index fe3920fa..00000000
--- a/kernel/src/glue/v4-alpha/space.cc
+++ /dev/null
@@ -1,342 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/space.cc
- * Description:   VAS implementation 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.cc,v 1.21 2005/06/03 15:54:06 joshua Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>			/* for UNIMPLEMENTED	*/
-#include <linear_ptab.h>
-#include <kdb/tracepoints.h>
-#include <generic/lib.h>
-#include <kmemory.h>
-
-#include INC_API(space.h)		/* space_t		*/
-#include INC_API(kernelinterface.h)
-#include INC_API(tcb.h)
-#include INC_ARCH(pgent.h)
-#include INC_ARCH(pal.h)
-
-#define PGSIZE_KTCB	(pgent_t::size_base)
-#define PGSIZE_UTCB	(pgent_t::size_base)
-#define PGSIZE_KERNEL	(pgent_t::size_base)
-#define PGSIZE_KIP	(pgent_t::size_base)
-
-EXTERN_KMEM_GROUP (kmem_space);
-DECLARE_KMEM_GROUP (kmem_tcb);
-DECLARE_KMEM_GROUP (kmem_utcb);
-
-asid_cache_t asid_cache;
-space_t *kernel_space = NULL;
-tcb_t *dummy_tcb = NULL;
-
-void SECTION(".init.memory") space_t::init_kernel_mappings()
-{
-    int ktcb_idx = page_table_index(pgent_t::size_max, (addr_t) KTCB_AREA_START),
-	vlpt_idx = page_table_index(pgent_t::size_max, (addr_t) VLPT_AREA_START);
-
-    /* Set up ktcb area (allocate page) */
-    pgent(ktcb_idx)->make_subtree(this, pgent_t::size_max, true);
-
-    /* Set up self-mapping */
-    /* sjw (06/08/2002): This is somewhat evil */
-    pgent_t tmp = pgent(vlpt_idx)->create_entry(get_kernel_space(), pgent_t::size_max, 
-						virt_to_phys((addr_t) pgent(0)), true, true, false, false, false);
-
-    pgent(vlpt_idx)->set_entry(this, pgent_t::size_max, tmp);
-}
-
-void SECTION(".init.memory") init_kernel_space()
-{
-    ASSERT(!kernel_space);
-
-    kernel_space = allocate_space();
-    ASSERT(kernel_space);
-
-    kernel_space->get_asid()->init();
-    kernel_space->init_kernel_mappings();
-
-    /* now allocate dummy tcb */
-    ASSERT(!dummy_tcb);
-    dummy_tcb = (tcb_t *) kmem.alloc(kmem_tcb, ALPHA_PAGE_SIZE);
-    ASSERT(dummy_tcb);
-}
-
-space_t *allocate_space(void)
-{
-    addr_t page = kmem.alloc(kmem_space, ALPHA_PAGE_SIZE);
-    ASSERT(page);
-    return space_t::ptbr_to_space(page);
-}
-
-void free_space(space_t *space)
-{
-    addr_t page = (addr_t) space->get_ptbr();
-    /* sjw (28/07/2002): What about the page tables? */
-    kmem.free(kmem_space, page, ALPHA_PAGE_SIZE);
-}
-
-/**
- * initialize a space
- *
- * @param utcb_area	fpage describing location of UTCB area
- * @param kip_area	fpage describing location of KIP
- */
-void space_t::init(fpage_t utcb_area, fpage_t kip_area)
-{
-    int console_idx = page_table_index(pgent_t::size_max, (addr_t) CONSOLE_AREA_START),
-	ktcb_idx = page_table_index(pgent_t::size_max, (addr_t) KTCB_AREA_START),
-	vlpt_idx = page_table_index(pgent_t::size_max, (addr_t) VLPT_AREA_START);
-
-    this->utcb_area = utcb_area;
-    this->kip_area = kip_area;
-
-    get_asid()->init();
-
-    /* Copy top level entries for the console and ktcb areas */
-    pgent(console_idx)->set_entry(this, pgent_t::size_max, *get_kernel_space()->pgent(console_idx));
-    pgent(ktcb_idx)->set_entry(this, pgent_t::size_max, *get_kernel_space()->pgent(ktcb_idx));
-
-    /* Self-map the VPT */
-    pgent_t tmp = pgent(vlpt_idx)->create_entry(this, pgent_t::size_max, virt_to_phys((addr_t) pgent(0)),
-						true, true, false, false, false);
-    
-    pgent(vlpt_idx)->set_entry(this, pgent_t::size_max, tmp);
-    
-    /* map kip read-only to user */
-    add_mapping(kip_area.get_base(), virt_to_phys((addr_t) get_kip()), PGSIZE_KIP, false, false);
-}
-
-/**
- * add a kernel mapping for a UTCB
- * @param utcb the user-visible address of the UTCB to add the mapping for
- * @return the kernel-accessible address of the UTCB
- */
-utcb_t * space_t::map_utcb(utcb_t * utcb)
-{
-    /* sjw (25/07/2002):  Is this correct?  Should we not init it at least? */
-    addr_t page = kmem.alloc(kmem_utcb, ALPHA_PAGE_SIZE);
-    ASSERT(page);
-    
-    add_mapping((addr_t) utcb, virt_to_phys(page), PGSIZE_UTCB, true, false);
-
-    return (utcb_t *) addr_offset(page, (word_t) utcb & (~ALPHA_PAGE_MASK));
-}
-
-/**
- * Release mappings that belong to the kernel (UTCB, KIP)
- * @param vaddr		virtual address in the space
- * @param paddr		physical address the mapping refers to
- * @param log2size	log2(size of mapping)
- */
-void space_t::release_kernel_mapping(addr_t vaddr, addr_t paddr,
-				     word_t log2size)
-{
-    if (get_utcb_page_area().is_addr_in_fpage (vaddr))
-	kmem.free(kmem_utcb, phys_to_virt(paddr), 1UL << log2size);
-}
-
-/**
- * establish a mapping in sigma0's space
- * @param addr	the fault address in sigma0
- *
- * This function should install a mapping that allows sigma0 to make
- * progress. Sigma0's space is available as this.
- */
-void space_t::map_sigma0(addr_t addr)
-{
-    add_mapping(addr, addr, pgent_t::size_base, true, false);
-}
-
-/**
- * Try to copy a mapping from kernel space into the current space
- * @param addr the address for which the mapping should be copied
- * @return true if something was copied, false otherwise.
- * Synchronization must happen at the highest level, allowing sharing.
- */
-bool space_t::sync_kernel_space(addr_t addr)
-{
-    /* We set everything up at initialisation time */
-    return false;
-}
-
-/**
- * Install a dummy TCB
- * @param addr	address where the dummy TCB should be installed
- *
- * The dummy TCB must be read-only and fail all validity tests.
- */
-void space_t::map_dummy_tcb (addr_t addr)
-{
-    kernel_space->add_mapping(addr, virt_to_phys((addr_t) dummy_tcb), PGSIZE_KTCB, false, true);
-}
-
-
-/**
- * Allocate a UTCB
- * @param tcb	Owner of the utcb
- *
- */
-utcb_t * space_t::allocate_utcb (tcb_t * tcb)
-{
-    ASSERT (tcb);
-    addr_t utcb = (addr_t) tcb->get_utcb_location ();
-
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-
-    if (lookup_mapping ((addr_t) utcb, &pg, &pgsize))
-    {
-        addr_t kaddr = addr_mask (pg->address(this, pgsize),
-                                  ~page_mask (pgsize));
-        return (utcb_t *) phys_to_virt
-            (addr_offset (kaddr, (word_t) utcb & page_mask (pgsize)));
-    }
-
-    addr_t page = kmem.alloc (kmem_utcb, page_size (PGSIZE_UTCB));
-
-    add_mapping((addr_t) utcb, virt_to_phys(page), 
-		PGSIZE_UTCB, true, false);
-
-    return (utcb_t *)
-        addr_offset (page, addr_mask (utcb, page_size (PGSIZE_UTCB) - 1));
-}
-
-
-
-/**
- * Map memory usable for TCB
- * @param addr address of the TCB that should be made usable
- *
- * This function is called when a TCB should be made usable the first
- * time. Usually, this happens when a) no page is mapped at the TCB
- * address at all, or b) a read-only page is mapped and now a write
- * access to the TCB occured.
- *
- * @see space_t::map_dummy_tcb
- */
-void space_t::allocate_tcb(addr_t addr)
-{
-    addr_t page = kmem.alloc(kmem_tcb, ALPHA_PAGE_SIZE);
-    kernel_space->add_mapping(addr, virt_to_phys(page), PGSIZE_KTCB, true, true);
-}
-
-/**
- * Translate a user accessible UTCB address to a kernel accessible one
- * @param utcb	user accessible address of UTCB
- * @returns kernel accessible address of UTCB
- *
- * The returned address must be accessible in the current address
- * space. This is required for checking values in the UTCB of a thread
- * in a different address space.
- */
-utcb_t * space_t::utcb_to_kernel_space(utcb_t * utcb)
-{
-    pgent_t *pg;
-    pgent_t::pgsize_e pgsize;
-
-    if(!lookup_mapping((addr_t) utcb, &pg, &pgsize)) {
-	return NULL;
-    }
-    
-    return (utcb_t *) (((word_t) utcb & ALPHA_OFFSET_MASK) + (word_t) phys_to_virt(pg->address(this, pgsize)));
-}
-
-
-
-void space_t::add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size, 
-			  bool writable, bool kernel)
-{
-    pgent_t::pgsize_e pgsize = pgent_t::size_max;
-    pgent_t * pg = this->pgent(page_table_index(pgsize, vaddr));
-
-    /*
-     * Sanity checking on page size
-     */
-    if (!is_page_size_valid(size))
-    {
-	printf("Mapping invalid pagesize (%dKB)\n", page_size(pgsize) >> 10);
-	enter_kdebug("invalid page size");
-	return;
-    }
-
-    /*
-     * Lookup mapping
-     */
-    while (pgsize > size)
-    {
-//	pg->print(this, pgsize, (word_t) vaddr); 
-
-	if (pg->is_valid(this, pgsize))
-	{
-	    // Sanity check
-	    if (!pg->is_subtree(this, pgsize))
-	    {
-		printf("%dKB mapping @ %p space %p already exists.\n",
-			page_size (pgsize) >> 10, vaddr, this);
-		enter_kdebug("mapping exists");
-		return;
-	    } 
-	}
-	else
-	    // Create subtree
-	    pg->make_subtree(this, pgsize, kernel);
-
-//	pg->print(this, pgsize, (word_t) vaddr);
-
-	pg = pg->subtree(this, pgsize)->next(this, pgsize-1, page_table_index(pgsize-1, vaddr));
-	pgsize--;
-    }
-
-    /*
-     * Modify page table
-     */
-    
-    /* XXX benjl: This is huge overkill. There are some specific times, where
-     *  some specific TLB entries should be flushed. But I don't want to code
-     * that yet. So for now we flush all entries, all the time
-     */
-
-    PAL::tbia();
-
-    pg->set_entry(this, pgsize, paddr, true, writable, true, kernel);
-
-//    printf("Final: ");	pg->print(this, pgsize, (word_t) vaddr);
-}
-
-extern "C" void handle_mm(addr_t va, word_t mmcsr, space_t::access_e access, alpha_context_t *ctx)
-{
-    tcb_t *current = get_current_tcb();
-    space_t *space = current->get_space();
-
-    if(space == NULL)
-	space = get_kernel_space();
-
-    /* sjw (30/07/2002): Do dirty and reference stuff here */
-    space->handle_pagefault(va, (addr_t) ctx->pc, access, (ctx->ps & PAL_PS_USER) ? false : true);    
-}
diff --git a/kernel/src/glue/v4-alpha/space.h b/kernel/src/glue/v4-alpha/space.h
deleted file mode 100644
index 156fbe6a..00000000
--- a/kernel/src/glue/v4-alpha/space.h
+++ /dev/null
@@ -1,333 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004, 2006,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/space.h
- * Created:       24/07/2002 23:56:20 by Simon Winwood (sjw)
- * Description:   Address space data structure 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.h,v 1.28 2006/11/14 18:44:56 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__SPACE_H__
-#define __ARCH__ALPHA__SPACE_H__
-
-#include <debug.h>
-#include <asid.h>
-
-#include INC_API(types.h)
-
-#include INC_API(fpage.h)			/* fpage_t	*/
-#include INC_API(thread.h)			/* threadid_t	*/
-#include INC_ARCH(pgent.h)
-#include INC_ARCH(palcalls.h)
-#include INC_GLUE(config.h)
-
-// Even if new MDB is not used we need the mdb_t::ctrl_t
-#include <mdb.h>
-
-/* forward declarations - space_t depends on tcb_t and utcb_t */
-class tcb_t;
-class utcb_t;
-
-/**
- * The address space representation.
- *
- * In a 43 bit system we stick the space data structure in the 256 entries that are unused 
- * due to kseg.
- * In a 48 bit system, we stick the space data structure after the 32 entries in the 
- * L0 page table. 
- */
-class space_t {
-public:
-    enum access_e {
-	read = 0, write = 1, execute = -1, readwrite = 1
-    };
-
-    space_t *allocate(void);
-    void init(fpage_t utcb_area, fpage_t kip_area);
-    void free();
-    bool sync_kernel_space(addr_t addr);
-    void handle_pagefault(addr_t addr, addr_t ip, access_e access, bool kernel);
-    bool is_initialized();
-
-    /* Mapping */
-    /* linear_ptab_walker.cc */
-    void map_sigma0(addr_t addr); 
-    
-    /* linear_ptab_walker.cc */
-    void map_fpage(fpage_t snd_fp, word_t base, space_t * t_space, fpage_t rcv_fp, bool grant);  
-
-    /* linear_ptab_walker.cc */
-    fpage_t unmap_fpage(fpage_t fpage, bool flush, bool unmap_all);
-    fpage_t mapctrl (fpage_t fpage, mdb_t::ctrl_t ctrl,
-		     word_t attribute, bool unmap_all);
-
-    /* tcb management */
-    void allocate_tcb(addr_t addr);
-    void map_dummy_tcb(addr_t addr);
-    utcb_t * allocate_utcb(tcb_t * tcb);
-    utcb_t * utcb_to_kernel_space(utcb_t * utcb);
-    utcb_t * map_utcb(utcb_t * utcb);
-
-    tcb_t * get_tcb(threadid_t tid);
-    tcb_t * get_tcb(void *ptr);
-
-    /* Address ranges */
-    bool is_mappable(addr_t addr);
-    bool is_mappable(fpage_t);
-    bool is_user_area(addr_t);
-    bool is_user_area(fpage_t);
-    bool is_tcb_area(addr_t addr);
-    bool is_arch_mappable(addr_t addr, size_t size) { return true; }
-
-    /* Copy area related methods */
-    bool is_copy_area (addr_t addr);
-    word_t get_copy_limit (addr_t addr, word_t limit);
-
-    /* kip and utcb handling */
-    fpage_t get_kip_page_area();
-    fpage_t get_utcb_page_area();
-
-    /* Reference counting */
-    void add_tcb(tcb_t * tcb);
-    bool remove_tcb(tcb_t * tcb);
-
-    /* space control */
-    word_t space_control (word_t ctrl) { return 0; }
-
-    /*
-     *  Alpha Specifics
-     */
-    
-    /* Linear ptab stuff */
-    /* Provides: */
-    bool lookup_mapping (addr_t vaddr, pgent_t ** pg,
-			 pgent_t::pgsize_e * size);
-    bool readmem (addr_t vaddr, word_t * contents);
-    static word_t readmem_phys (addr_t paddr)
-        { return *(word_t *) phys_to_virt((word_t *) paddr); }
-
-    void release_kernel_mapping (addr_t vaddr, addr_t paddr, word_t log2size);
-
-    /* Requires: */
-    pgent_t *pgent(word_t num, word_t cpu = 0);
-    void flush_tlb (space_t * curspace);
-    void flush_tlbent (space_t * curspace, addr_t vaddr, word_t log2size);
-
-    /* sjw (28/07/2002): Follow PPC ... doesn't really pay to flush the TLB ... */
-    bool does_tlbflush_pay (word_t log2size)
-	{ return false; }
-
-    void add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size, bool writable, bool kernel);
-
-    /* Alpha Specifics */
-    word_t translate(addr_t va);
-
-    asid_t *get_asid(void) 
-	{ return &asid; }
-
-    pgent_t *get_ptbr(void) {
-	return (pgent_t *) ((word_t) this & ALPHA_PAGE_MASK);	
-    }
-    
-    static space_t *ptbr_to_space(addr_t ptbr);
-    void init_kernel_mappings(void);
-
-    static void begin_update(void) {}
-    static void end_update(void) {}
-
-
- private:
-    /* Generic stuff */
-    fpage_t kip_area;
-    fpage_t utcb_area;
-    word_t thread_count;
-
-    /* Alpha specifics */
-    asid_t asid;
-};
-
-/**
- * get the KIP area of an address space
- * @returns the KIP area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_kip_page_area (void)
-{
-    return kip_area;
-}
-
-/**
- * get the UTCB area of an address space
- * @returns the utcb area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_utcb_page_area (void)
-{
-    return utcb_area;
-}
-
-INLINE bool space_t::is_user_area (addr_t addr)
-{
-    return addr >= (addr_t) USER_AREA_START && addr < (addr_t) USER_AREA_END;
-}
-        
-INLINE bool space_t::is_tcb_area (addr_t addr)
-{
-    return addr >= (addr_t) KTCB_AREA_START && addr < (addr_t) KTCB_AREA_END;
-}
-
-INLINE bool space_t::is_copy_area (addr_t addr)
-{
-    UNIMPLEMENTED();
-    return false;
-}
-
-INLINE word_t space_t::get_copy_limit (addr_t addr, word_t limit)
-{
-    UNIMPLEMENTED ();
-    return limit;
-}
-
-INLINE space_t* get_kernel_space()
-{
-    extern space_t * kernel_space;
-    return kernel_space;
-}
-
-/**
- * translates a global thread ID into a valid tcb pointer
- * @param tid thread ID
- * @returns pointer to the TCB of thread tid
- */
-INLINE tcb_t * space_t::get_tcb( threadid_t tid )
-{
-    /* sjw (26/07/2002): This won't allocate a TCB ... */
-    return (tcb_t*)((KTCB_AREA_START) + (tid.get_threadno() * KTCB_SIZE));
-}
-
-/**
- * translates a pointer within a tcb into a valid tcb pointer
- * @param ptr pointer to somewhere in the TCB
- * @returns pointer to the TCB
- */
-INLINE tcb_t * space_t::get_tcb (void * ptr)
-{
-    return (tcb_t *)((word_t)(ptr) & KTCB_MASK);
-}
-
-/**
- * removes a thread from a space
- * @param tcb_t thread control block
- * @return true if it was the last thread
- */
-INLINE bool space_t::remove_tcb(tcb_t * tcb)
-{
-    /* sjw (30/07/2002): SMP unsafe */
-    thread_count--;
-    return (thread_count == 0);
-}
-
-/**
- * adds a thread to the space
- * @param tcb pointer to thread control block
- */
-INLINE void space_t::add_tcb(tcb_t * tcb)
-{
-    /* sjw (30/07/2002): SMP unsafe */
-    thread_count++;
-}
-
-/**
- * ptbr_to_space - Given a page table, returns the associated space.
- * @ptbr: The page table in question
- *
- *
- **/
-INLINE space_t *space_t::ptbr_to_space(addr_t ptbr)
-{
-    return (space_t *) ((word_t) ptbr + PTBR_SPACE_OFFSET);
-}
-
-
-INLINE pgent_t *space_t::pgent (word_t num, word_t cpu)
-{
-    return get_ptbr()->next(this, pgent_t::size_max, num);
-}
-
-
-/* From the Alpha ARM */
-#define VPT_LSHIFT  (64 - ((ALPHA_PAGE_BITS * (ALPHA_PT_LEVELS + 1)) - (ALPHA_PT_LEVELS * 3)))
-#define VPT_RSHIFT  (64 - ((ALPHA_PAGE_BITS * (ALPHA_PT_LEVELS + 1)) - (ALPHA_PT_LEVELS * 3)) + ALPHA_PAGE_BITS - 3)
-
-/**
- * Translate a valid VA to the corresponding VA
- * @param va    The virtual address to translate.
- *
- * This method translates a virtual address to the corresponding
- * physical address.  Note that this uses the linear page table, so it
- * is possible to take a TLB miss or page fault here.
- *
- * This only works on the current AS, or on shared mappings (like the
- * KTCB array).  Do NOT use this method for VAs in address spaces
- * other than current and kernel_space.
- *
- * This method should be reasonably fast, especially if the VA has
- * been recently touched.
- **/
-INLINE word_t space_t::translate(addr_t va)
-{
-    word_t idx = ((word_t) va & ALPHA_PAGE_MASK) << VPT_LSHIFT;
-    idx >>= VPT_RSHIFT;
-    
-    word_t *pte = (word_t *) ((VLPT_AREA_START | idx) & ~0x3); 
-
-    /* sjw (06/08/2002): We should really use the pgent_t here, but this is much quicker ;( */
-    return (((*pte >> 32) << ALPHA_PAGE_BITS) | ((word_t) va & ALPHA_OFFSET_MASK)); 
-}
-
-#undef VPT_LSHIFT
-#undef VPT_RSHIFT
-
-
-/* PAL doesn't support flushing based on ASNs, so if we want to flush an address space
- * we need to flush the entire TLB.  Another idea would be to recycle the ASN */
-INLINE void space_t::flush_tlb(space_t * curspace)
-{
-    /* Only flush kernel mappings if requested */
-    if(curspace == get_kernel_space())
-	PAL::tbia();
-    else
-	PAL::tbiap();
-}
- 
-INLINE void space_t::flush_tlbent(space_t * curspace, addr_t vaddr, word_t log2size)
-{
-    /* sjw (30/07/2002): Braindead */
-    flush_tlb(curspace);
-}
-
-void init_kernel_space(void);
-
-#endif /* __ARCH__ALPHA__SPACE_H__ */
diff --git a/kernel/src/glue/v4-alpha/syscalls.S b/kernel/src/glue/v4-alpha/syscalls.S
deleted file mode 100644
index 8416c2a3..00000000
--- a/kernel/src/glue/v4-alpha/syscalls.S
+++ /dev/null
@@ -1,118 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/syscalls.S
- * Description:   Syscall stubs for alpha 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.S,v 1.6 2003/11/03 08:01:20 sjw Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_GLUE(syscalls.h)
-	
-.set noat
-	
-#define DECODE_SYSCALL(name, vector, t0, t1, t2, jr)	\
-	lda	t0, SYSCALL_##name ;			\
-	lda	t1, sys_##name ;			\
-	cmpeq	t0, vector, t2	; 			\
-	cmovne	t2, t1, jr 
-
-#define DECODE_SYSCALL_SPECIAL(name, vector, t0, t1, t2, jr)	\
-	lda	t0, SYSCALL_##name ;			\
-	lda	t1, __call_##name ;			\
-	cmpeq	t0, vector, t2	; 			\
-	cmovne	t2, t1, jr 	
-			
-/* Entry is fastpath.S */				
-BEGIN_PROC(__handle_non_ipc)
-//	DISABLE_INT($3, $4)
-		
-	lda	$27, __unknown_syscall			
-	lda	$26, __finish_sys
-	
-	DECODE_SYSCALL(thread_switch, $0, $22, $23, $24, $27) /* 1 in, 0 out */
-	DECODE_SYSCALL(thread_control, $0, $22, $23, $24, $27) /* 4 in, 1 out */ 
-	DECODE_SYSCALL_SPECIAL(exchange_registers, $0, $22, $23, $24, $27) /* 7 in, 7 out */	
-	DECODE_SYSCALL(schedule, $0, $22, $23, $24, $27) /* 5 in, 2 out */
-	DECODE_SYSCALL(unmap, $0, $22, $23, $24, $27) /* 1 in, 0 out */
-	DECODE_SYSCALL(space_control, $0, $22, $23, $24, $27) /* 5 in, 2 out */
-
-#if 0
-	DECODE_SYSCALL(processor_control, $0, $22, $23, $24, $27) /* 4 in, 1 out */
-	DECODE_SYSCALL(memory_control, $0, $22, $23, $24, $27) /* 5 in, 0 out */ 
-#endif
-	DECODE_SYSCALL(system_clock, $0, $22, $23, $24, $27) /* 0 in, 1 out */
-											
-	DECODE_SYSCALL(wrperfmon, $0, $22, $23, $24, $27) /* 2 in, 1 out */
-	DECODE_SYSCALL(read_idle, $0, $22, $23, $24, $27) /* 1 in, 1 out */
-
-	DECODE_SYSCALL(halt, $0, $22, $23, $24, $27) /* 0 in, 0 out */ 	
-	DECODE_SYSCALL(null, $0, $22, $23, $24, $27) /* 1 in, 0 out */
-	
-	jsr	$31, ($27)
-END_PROC(__handle_non_ipc)
-
-BEGIN_PROC(__call_exchange_registers)
-	subq	$30, 8, $30
-	stq	$2, 0($30)
-
-	lda	$27, sys_exchange_registers
-	jsr	$26, ($27)
-
-	addq	$30, 8, $30
-	call_pal	PAL_retsys
-END_PROC(__call_exchange_registers)
-	
-BEGIN_PROC(__unknown_syscall)
-	/* well, this shouldn't happen ... */
-	ldiq	$16, 2
-	lda	$17, 1f
-
-	call_pal	PAL_gentrap
-
-	call_pal	PAL_retsys
-	
-1:	.asciz	"Unknown syscall!"
-
-END_PROC(__unknown_syscall)
-	
-BEGIN_PROC(__finish_sys)
-	call_pal	PAL_retsys
-END_PROC(__finish_sys)
-	
-/* Alpha specifics */
-	
-BEGIN_PROC(sys_null)
-	call_pal	PAL_retsys
-END_PROC(sys_null)
-
-BEGIN_PROC(sys_wrperfmon)
-	call_pal	PAL_wrperfmon
-	call_pal	PAL_retsys
-END_PROC(sys_wrperfmon)
-
-	
\ No newline at end of file
diff --git a/kernel/src/glue/v4-alpha/syscalls.h b/kernel/src/glue/v4-alpha/syscalls.h
deleted file mode 100644
index df9f6e92..00000000
--- a/kernel/src/glue/v4-alpha/syscalls.h
+++ /dev/null
@@ -1,197 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/syscalls.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.11 2004/06/04 02:27:51 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__SYSCALLS_H__
-#define __GLUE__V4_ALPHA__SYSCALLS_H__
-
-#define SYSCALL_ipc                0
-#define SYSCALL_thread_switch      1
-#define SYSCALL_thread_control     2
-#define SYSCALL_exchange_registers 3
-#define SYSCALL_schedule           4
-#define SYSCALL_unmap              5
-#define SYSCALL_space_control      6
-#define SYSCALL_processor_control  7
-#define SYSCALL_memory_control     8
-#define SYSCALL_system_clock       9
-
-/* Alpha specific */
-#define SYSCALL_wrperfmon          100
-#define SYSCALL_null               101
-#define SYSCALL_halt               102
-#define SYSCALL_read_idle          103
-
-/* The application gets the kernel info page by doing some privileged PAL call, with 
-   a0 ($16) == {'L', '4', 'u', 'K', 'K', 'I', 'P', '4'} == 0x4c34754b4b495034
-*/
-#define MAGIC_KIP_REQUEST          (0x4c34754b4b495034)
-
-/*
-  System call function attributes.
-*/
-
-#define SYSCALL_ATTR(sec_name)
-
-
-#define SYS_IPC_RETURN_TYPE                     threadid_t
-#define SYS_THREAD_CONTROL_RETURN_TYPE          word_t
-#define SYS_EXCHANGE_REGISTERS_RETURN_TYPE      threadid_t
-#define SYS_SPACE_CONTROL_RETURN_TYPE           word_t
-#define SYS_SCHEDULE_RETURN_TYPE                word_t
-#define SYS_MEMORY_CONTROL_RETURN_TYPE          word_t
-
-#define SYS_IPC(to, from, timeout)                              \
-  SYS_IPC_RETURN_TYPE SYSCALL_ATTR ("ipc")                      \
-  sys_ipc (to, from, timeout)
-
-#define SYS_THREAD_CONTROL(dest, space, scheduler, pager, utcb)		\
-  SYS_THREAD_CONTROL_RETURN_TYPE SYSCALL_ATTR ("thread_control")	\
-  sys_thread_control (dest, space, scheduler, pager, utcb)
-
-#define SYS_SPACE_CONTROL(space, control, kip_area, utcb_area,  \
-                          redirector)                           \
-  SYS_SPACE_CONTROL_RETURN_TYPE SYSCALL_ATTR ("space_control")  \
-  sys_space_control (space, control, kip_area, utcb_area,       \
-                     redirector)
-
-#define SYS_SCHEDULE(dest, time_control, processor_control,     \
-                     prio, preemption_control)                  \
-  SYS_SCHEDULE_RETURN_TYPE SYSCALL_ATTR ("schedule")            \
-  sys_schedule (dest, time_control, processor_control,          \
-                prio, preemption_control)
-
-#define SYS_EXCHANGE_REGISTERS(dest, control, usp, uip,				\
-                               uflags, uhandle, pager, is_local)		\
-  SYS_EXCHANGE_REGISTERS_RETURN_TYPE SYSCALL_ATTR ("exchange_registers")	\
-  sys_exchange_registers (dest, control, usp, uip,				\
-                          uflags, uhandle, pager, is_local)
-
-#define SYS_THREAD_SWITCH(dest)                                 \
-  void SYSCALL_ATTR ("thread_switch")                           \
-  sys_thread_switch (dest)
-
-#define SYS_UNMAP(control)                                      \
-  void SYSCALL_ATTR ("unmap") sys_unmap (control)
-
-#define SYS_PROCESSOR_CONTROL(processor_no, internal_frequency, \
-                              external_frequency, voltage)      \
-  void SYSCALL_ATTR ("processor_control")                       \
-  sys_processor_control (processor_no, internal_frequency,      \
-                         external_frequency, voltage)
-
-#define SYS_MEMORY_CONTROL(control, attribute0, attribute1,		\
-                           attribute2, attribute3)			\
-  SYS_MEMORY_CONTROL_RETURN_TYPE SYSCALL_ATTR ("memory_control")	\
-  sys_memory_control (control, attribute0, attribute1,			\
-                      attribute2, attribute3)
-
-/**
- * Preload registers and return from sys_ipc
- * @param from The FROM value after the system call
- */
-
-
-#define return_ipc(from)   return (from)
-
-
-/**
- * Preload registers and return from sys_thread_control
- * @param result The RESULT value after the system call
- */
-
-#define return_thread_control(result)  return result
-
-/**
- * Preload registers and return from sys_exchange_registers
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- * @param sp The SP value after the system call
- * @param ip The IP value after the system call
- * @param flags The FLAGS value after the system call
- * @param pager The PAGER value after the system call
- * @param handle The USERDEFINEDHANDLE value after the system call
- */
-
-
-#define return_exchange_registers(result, control, sp, ip, flags, pager, handle)				\
-{														\
-    register word_t r16 asm("$16") = control;									\
-    register word_t r17 asm("$17") = sp;									\
-    register word_t r18 asm("$18") = ip;									\
-    register word_t r19 asm("$19") = flags;									\
-    register word_t r20 asm("$20") = pager.get_raw();								\
-    register word_t r21 asm("$21") = handle;									\
-    asm __volatile__ ("" : : "r" (r16), "r" (r17), "r" (r18), "r" (r19), "r" (r20), "r" (r21)); 	        \
-    return result;												\
-}
-
-
-/**
- * Return from sys_thread_switch
- */
-#define return_thread_switch() return
-
-
-/**
- * Return from sys_unmap
- */
-#define return_unmap() return
-
-
-/**
- * Preload registers and return from sys_thread_switch
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- */
-#define return_space_control(result, control)	\
-{						\
-    register word_t r16 asm("$16") = control;	\
-    asm __volatile__ ("" : : "r" (r16));	\
-    return result;				\
-}
-
-
-/**
- * Preload registers and return from sys_schedule
- * @param result The RESULT value after the system call
- * @param time_control The TIME_CONTROL value after the system call
- */
-#define return_schedule( result, time_control )		\
-{							\
-    register word_t r16 asm("$16") = time_control;	\
-    asm __volatile__ ("" : : "r" (r16));		\
-    return result;					\
-}
-
-#define return_processor_control() return
-
-#endif /* __GLUE__V4_ALPHA__SYSCALLS_H__ */
diff --git a/kernel/src/glue/v4-alpha/tcb.h b/kernel/src/glue/v4-alpha/tcb.h
deleted file mode 100644
index 6cc48dd7..00000000
--- a/kernel/src/glue/v4-alpha/tcb.h
+++ /dev/null
@@ -1,520 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004, 2006,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/tcb.h
- * Description:   TCB related functions for Version 4, Alpha
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tcb.h,v 1.46 2006/10/20 21:31:11 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ALPHA__TCB_H__
-#define __GLUE__V4_ALPHA__TCB_H__
-
-#ifndef __API__V4__TCB_H__
-#error not for stand-alone inclusion
-#endif
-
-#include INC_ARCH(types.h)
-#include INC_API(syscalls.h)		/* for sys_ipc */
-#include INC_ARCH(thread.h)             /* for alpha_switch_to */
-#include INC_API(space.h)
-#include INC_ARCH(page.h)
-#include INC_ARCH(palcalls.h)
-#include INC_GLUE(ipcregs.h)
-
-
-/**********************************************************************
- *
- *                        global tcb functions
- *
- **********************************************************************/
-
-INLINE tcb_t * addr_to_tcb (addr_t addr)
-{
-    return (tcb_t *) ((word_t) addr & KTCB_MASK);
-}
-
-/**
- * Locate current TCB by using current stack pointer and return it.
- */
-INLINE tcb_t * get_current_tcb (void)
-{
-    /* sjw (27/07/2002): Is this nicer than usem asm(...)? */
-    unsigned long stack_var;
-
-    return (tcb_t *) ((word_t) &stack_var & KTCB_MASK);
-};
-
-
-INLINE alpha_context_t *get_alpha_context(tcb_t *tcb)
-{
-    alpha_context_t *ctx = (alpha_context_t *) tcb->get_stack_top();
-    return --ctx;
-}
-
-/**
- * read value of message register
- * @param index number of message register
- */
-INLINE word_t tcb_t::get_mr(word_t index)
-{
-    /* sjw (26/07/2002): When I start putting mr's in registers, this will change */
-    return get_utcb()->mr[index];
-}
-
-/**
- * set the value of a message register
- * @param index number of message register
- * @param value value to set
- */
-INLINE void tcb_t::set_mr(word_t index, word_t value)
-{
-    get_utcb()->mr[index] = value;
-}
-
-/**
- * copies a set of message registers from one UTCB to another
- * @param dest destination TCB
- * @param start MR start index
- * @param count number of MRs to be copied
- */
-INLINE void tcb_t::copy_mrs(tcb_t * dest, word_t start, word_t count)
-{
-    ASSERT(start + count <= IPC_NUM_MR);
-
-    for (word_t idx = start; idx < start + count; idx++)
-	dest->set_mr(idx, this->get_mr(idx));
-}
-
-/**
- * read value of buffer register
- * @param index number of buffer register
- */
-INLINE word_t tcb_t::get_br(word_t index)
-{
-    return get_utcb()->br[index];
-}
-
-/**
- * set the value of a buffer register
- * @param index number of buffer register
- * @param value value to set
- */
-INLINE void tcb_t::set_br(word_t index, word_t value)
-{
-    get_utcb()->br[index] = value;
-}
-
-
-/**
- * allocate the tcb
- * The tcb pointed to by this will be allocated.
- */
-INLINE void tcb_t::allocate()
-{
-    /* sjw (26/07/2002): Possible performance problem here --- easier to touch, but
-     * perhaps more expensive?
-     */
-    this->kernel_stack[0] = 0;
-//    this->myself_global = this->myself_global;
-}
-
-
-/**
- * set the address space a TCB belongs to
- * @param space address space the TCB will be associated with
- */
-INLINE void tcb_t::set_space(space_t * space)
-{
-    this->space = space;
-    
-    if(space) {
-	/* Set up the tcb's PCB ... basically the ptbr etc. */
-	/* sjw (26/07/2002): If we start pre-empting the ASNs this will have to be moved into tcb.h as well */
-	alpha_pcb_t *pcb = &get_arch()->pcb;
-	
-	pcb->ptbr = (word_t) virt_to_phys((addr_t) space->pgent(0)) >> ALPHA_PAGE_BITS;    
-    }
-}
-
-#if 0
-/**
- * set local ID of a thread
- * @param utcb ???
- *
- * utcb == local_id on alpha (not sure about lower bits?)
- */
-INLINE void tcb_t::set_local_id(utcb_t * utcb)
-{
-    myself_local.set_raw((word_t) utcb);
-
-    if(this == get_current_tcb()) {
-	PAL::wrunique((word_t) utcb);
-    } else
-	get_arch()->pcb.unique = (word_t) utcb;
-}
-#endif
-
-INLINE void tcb_t::set_cpu(cpuid_t cpu) 
-{ 
-    this->cpu = cpu;
-    get_utcb()->processor_no = cpu;
-}
-
-/* This function is very seedy.  Basically, we don't save any S registers
- * on the IPC path, so we can just return as per usual. To cleanup the stack,
- * we need to do the whole thing in asm to make sure C doesn't interfere.
- *
- */
-INLINE void tcb_t::return_from_ipc (void)
-{
-    alpha_context_t *ctx = get_alpha_context(this);
-    register word_t ret asm(R_MR0) = get_mr(0);
-
-    __asm__ volatile ("mov %0, $30; bsr $31, __finish_sys" : : "r" (ctx), "r" (ret) : "memory");
-}
-
-INLINE void tcb_t::return_from_user_interruption (void)
-{
-    word_t newstack = (word_t) get_alpha_context(this) - sizeof(alpha_savedregs_t);
-    
-    __asm__ volatile ("mov %0, $30; bsr $31, __return_except" : : "r" (newstack) : "memory");
-}
-
-/**
- * invoke an IPC from within the kernel
- *
- * @param to_tid destination thread id
- * @param from_tid from specifier
- * @param timeout IPC timeout
- * @return IPC message tag (MR0)
- */
-INLINE msg_tag_t tcb_t::do_ipc (threadid_t to_tid, threadid_t from_tid,
-                                timeout_t timeout)
-{
-    msg_tag_t tag;
-
-    sys_ipc (to_tid, from_tid, timeout);
-    tag.raw = get_mr (0);
-
-    return tag;
-}
-
-/********************************************************************** 
- *
- *                      thread switch routines
- *
- **********************************************************************/
-
-/**
- * switch to initial thread
- * @param tcb TCB of initial thread
- *
- * Initializes context of initial thread and switches to it.  The
- * context (e.g., instruction pointer) has been generated by inserting
- * a notify procedure context on the stack.  We simply restore this
- * context.
- */
-INLINE void NORETURN initial_switch_to (tcb_t * tcb)
-{
-    alpha_pcb_t *pcb = &(tcb->get_arch()->pcb);
-    
-    /* sjw (29/07/2002): Will this work? */
-    pcb->asn = get_kernel_space()->get_asid()->get();
-    pcb->ptbr = (word_t) virt_to_phys(get_kernel_space()->pgent(0)) >> ALPHA_PAGE_BITS;
-
-    alpha_switch_to((word_t) virt_to_phys(pcb));
-    
-    /* sjw (29/07/2002): If we get here we have a problem */
-    ASSERT(!"We shouldn't get here!");
-    while(true) {}
-}
-
-/**
- * switch to idle thread
- */
-INLINE void do_switch_to_idle()
-{
-    alpha_pcb_t *idle, *current;
-
-    /* sjw (29/07/2002): Probably not as efficient as it could be */
-    idle = &get_idle_tcb()->get_arch()->pcb;
-    current = &get_current_tcb()->get_arch()->pcb;
-
-    /* Make sure that the idle thread runs in the initial address space */
-    idle->ptbr = current->ptbr;
-    idle->asn = current->asn;
-
-    alpha_switch_to((word_t) virt_to_phys(idle));
-}
-
-/**
- * switches to another tcb thereby switching address spaces if needed
- * @param dest tcb to switch to
- */
-INLINE void tcb_t::switch_to(tcb_t * dest)
-{
-    /* sjw (27/07/2002): Stuff that isn't done here, but should be:
-     *   - saving/restoring FP state 
-     */
-    if(dest == get_idle_tcb()) {
-	do_switch_to_idle();
-	return;
-    }
-
-    alpha_pcb_t *pcb = &dest->get_arch()->pcb;
-    space_t *space = dest->get_space();
-    word_t pcb_paddr;
-       
-    if(space) {
-	pcb->asn = space->get_asid()->get();
-	pcb_paddr = dest->get_arch()->pcb_paddr;
-    } else {
-	pcb->asn = get_kernel_space()->get_asid()->get();
-	pcb->ptbr = (word_t) virt_to_phys(get_kernel_space()->pgent(0)) >>
-	    ALPHA_PAGE_BITS;
-	pcb_paddr = get_kernel_space()->translate(pcb);
-    }
-
-    ASSERT(pcb_paddr != NULL);
-
-    alpha_switch_to(pcb_paddr);    
-}
-
-#if 0
-/**
- * switch to idle thread
- */
-INLINE void tcb_t::switch_to_idle()
-{
-    alpha_pcb_t *idle, *current;
-
-    /* sjw (29/07/2002): Probably not as efficient as it could be */
-    idle = &get_idle_tcb()->get_arch()->pcb;
-    current = &get_current_tcb()->get_arch()->pcb;
-
-    /* Make sure that the idle thread runs in the initial address space */
-    idle->ptbr = current->ptbr;
-    idle->asn = current->asn;
-
-    alpha_switch_to((word_t) virt_to_phys(idle));
-}
-#endif
-
-INLINE word_t *tcb_t::get_stack_top(void)
-{
-    /* sjw (29/07/2002): Evil? */
-    return (word_t *) ((char *) this + KTCB_SIZE);
-}
-
-/**
- * intialize stack for given thread
- */
-INLINE void tcb_t::init_stack()
-{
-    get_arch()->pcb.ksp = (word_t) get_alpha_context(this);
-}
-
-
-
-/**********************************************************************
- *
- *                        notification functions
- *
- **********************************************************************/
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)())
-{
-    notify((void (*)(word_t, word_t)) func, 0, 0);
-}
-
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)(word_t), word_t arg1)
-{
-    notify((void (*)(word_t, word_t)) func, arg1, 0);
-}
-
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- * @param arg2 2nd argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-
-INLINE void tcb_t::notify (void (*func)(word_t, word_t), word_t arg1, word_t arg2)
-{
-    /* We need to fake a stack frame as in alpha_switch_to */
-    word_t stack = get_arch()->pcb.ksp - sizeof(alpha_switch_stack_t);
-    alpha_switch_stack_t *fake = (alpha_switch_stack_t *) stack;
-
-    fake->r15 = (word_t) func;
-    fake->r14 = arg1;
-    fake->r13 = arg2;
-    fake->ra = (word_t) alpha_return_from_notify;
-    
-    get_arch()->pcb.ksp = stack;
-}
-
-/**********************************************************************
- * 
- *            access functions for ex-regs'able registers
- *
- **********************************************************************/
-
-/**
- * read the user-level instruction pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_ip()
-{
-    return (addr_t) get_alpha_context(this)->pc;
-}
-
-/**
- * read the user-level stack pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_sp()
-{
-    if(this == get_current_tcb()) 
-	return (addr_t) PAL::rdusp();
-
-    return (addr_t) get_arch()->pcb.usp;
-}
-
-/**
- * set the user-level instruction pointer
- * @param ip	new user-level instruction pointer
- */
-INLINE void tcb_t::set_user_ip(addr_t ip)
-{
-    get_alpha_context(this)->pc = (word_t) ip;
-}
-
-/**
- * set the user-level stack pointer
- * @param sp	new user-level stack pointer
- */
-INLINE void tcb_t::set_user_sp(addr_t sp)
-{
-    if(this == get_current_tcb()) {
-	PAL::wrusp((word_t) sp);
-    } else
-	get_arch()->pcb.usp = (word_t) sp;
-}
-
-
-/**
- * read the user-level flags (one word)
- * @return	the user-level flags
- */
-INLINE word_t tcb_t::get_user_flags (void)
-{
-    /* sjw (29/07/2002): Probably a waste of time */
-    return get_arch()->pcb.unique;
-}
-
-/**
- * set the user-level flags
- * @param flags	new user-level flags
- */
-INLINE void tcb_t::set_user_flags (const word_t flags)
-{
-    get_arch()->pcb.unique = flags;
-}
-
-
-INLINE word_t tcb_t::get_utcb_location()
-{
-    utcb_t * dummy = (utcb_t*)NULL;
-    return myself_local.get_raw() - ((word_t)&dummy->mr[0]);
-}
-
-INLINE void tcb_t::set_utcb_location(word_t utcb_location)
-{
-    utcb_t * dummy = (utcb_t*)NULL;
-    myself_local.set_raw (utcb_location + ((word_t)&dummy->mr[0]));
-}
-
-/**********************************************************************
- *
- *                  copy-area related functions
- *
- **********************************************************************/
-
-INLINE void tcb_t::adjust_for_copy_area (tcb_t * dst, addr_t * s, addr_t * d)
-{
-    UNIMPLEMENTED ();
-}
-
-INLINE void tcb_t::release_copy_area (void)
-{
-/* sjw (21/11/2002): FIXME */
-//    UNIMPLEMENTED ();
-}
-
-INLINE addr_t tcb_t::copy_area_real_address (addr_t addr)
-{
-    UNIMPLEMENTED ();
-    return addr;
-}
-
-/**********************************************************************
- *
- *                  architecture-specific functions
- *
- **********************************************************************/
-
-/**
- * initialize architecture-dependent root server properties based on
- * values passed via KIP
- * @param space the address space this server will run in
- * @param ip the initial instruction pointer
- * @param sp the initial stack pointer
- */
-INLINE void tcb_t::arch_init_root_server (space_t * space, word_t ip, word_t sp)
-{
-}
-
-#endif /* !__GLUE__V4_ALPHA__TCB_H__ */
diff --git a/kernel/src/glue/v4-alpha/thread.cc b/kernel/src/glue/v4-alpha/thread.cc
deleted file mode 100644
index b7cb02e3..00000000
--- a/kernel/src/glue/v4-alpha/thread.cc
+++ /dev/null
@@ -1,89 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     glue/v4-tmplarch/thread.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: thread.cc,v 1.9 2003/09/24 19:05:32 skoglund Exp $
- *                
- ********************************************************************/
-
-
-#include <debug.h>
-#include INC_API(tcb.h)
-#include INC_ARCH(pal.h)
-#include INC_ARCH(thread.h)
-/**
- * Setup TCB to execute a function when switched to
- * @param func pointer to function
- *
- * The old stack state of the TCB does not matter.
- * The stack will look like the following:
- *
- * |----------------------------|
- * |     Interrupt context      |
- * |                            |
- * |----------------------------|
- * |                            |
- * |    alpha_return_to_user    |
- * |  notification stack frame  |
- * |                            |
- * |----------------------------|
- * |                            |
- * |           func             |
- * |  notification stack frame  |
- * |                            |
- * |----------------------------| <- ksp
- *
- */
-void tcb_t::create_startup_stack (void (*func)())
-{
-    /* Re-init the stack */
-    init_stack();
-
-    notify(alpha_return_to_user);
-    notify(func);
-
-    alpha_context_t *ctx = (alpha_context_t *) get_alpha_context(this);
-
-    /* Set user mode */
-    ctx->ps |= PAL_PS_USER;
-
-    /* Set first argument to be the UTCB */
-    /* sjw (22/02/2003): Required? */
-    ctx->a0 = get_local_id().get_raw();
-
-    /* Initialise KTCB */
-    alpha_pcb_t *pcb = &get_arch()->pcb;
-
-    /* set PME bit */
-//    pcb->flags = 1ull << 62;
-
-    get_arch()->pcb_paddr = get_kernel_space()->translate(pcb);
-    ASSERT(get_arch()->pcb_paddr);
-
-    get_arch()->pcb.unique = (word_t) get_utcb_location();
-    
-}
diff --git a/kernel/src/glue/v4-alpha/timer.cc b/kernel/src/glue/v4-alpha/timer.cc
deleted file mode 100644
index 60915bd1..00000000
--- a/kernel/src/glue/v4-alpha/timer.cc
+++ /dev/null
@@ -1,41 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/timer.cc
- * Description:   Periodic timer handling 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.cc,v 1.5 2003/09/24 19:05:32 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_GLUE(timer.h)
-
-timer_t timer;
-
-void timer_t::init_global(void)
-{
-
-}
diff --git a/kernel/src/glue/v4-alpha/timer.h b/kernel/src/glue/v4-alpha/timer.h
deleted file mode 100644
index e0ffb7cb..00000000
--- a/kernel/src/glue/v4-alpha/timer.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/timer.h
- * Created:       28/07/2002 02:31:27 by Simon Winwood (sjw)
- * Description:   Alpha timer handler 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.h,v 1.3 2003/09/24 19:04:34 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ALPHA__TIMER_H__
-#define __GLUE__V4_ALPHA__TIMER_H__
-
-#include <timer.h>
-
-class timer_t : public generic_periodic_timer_t {
-public:
-    void init_global();
-    void init_cpu() { };
-};
-
-INLINE timer_t * get_timer()
-{
-    extern timer_t timer;
-    return &timer;
-}
-
-#endif /* __GLUE__V4_ALPHA__TIMER_H__ */
diff --git a/kernel/src/glue/v4-alpha/traps.S b/kernel/src/glue/v4-alpha/traps.S
deleted file mode 100644
index e4b825ee..00000000
--- a/kernel/src/glue/v4-alpha/traps.S
+++ /dev/null
@@ -1,122 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/traps.S
- * Description:   Kernel entry points for various traps 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: traps.S,v 1.11 2003/10/21 07:50:22 sjw Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-
-.set noat
-	
-/* Interrupt.  We just send this straight to C after saving registers */
-BEGIN_PROC(__ent_interrupt)
-#ifdef  CONFIG_NO_CLOCK_IN_INT
-	ldq	$18, 0($30)
-	cmpeq	$18, 4, $18
-	bne	$18, 1f
-#endif	
-	SAVE_ALL	
-
-	DISABLE_INT($3, $4)
-	
-	lda	$27, handle_IRQ
-	jsr	$26, ($27), handle_IRQ
-	
-	RESTORE_ALL
-1:	
-	call_pal PAL_rti
-END_PROC(__ent_interrupt)
-
-BEGIN_PROC(__ent_arith)
-	SAVE_ALL	
-
-	DISABLE_INT($3, $4)
-	
-	lda	$27, handle_arith
-	jsr	$26, ($27), handle_arith
-	
-	RESTORE_ALL
-	call_pal PAL_rti
-END_PROC(__ent_arith)
-
-BEGIN_PROC(__ent_mm)		
-	SAVE_ALL	
-	
-	DISABLE_INT($3, $4)
-		
-	/* We need to put the context ptr in a3 */
-	lda	$19, INTERRUPT_STACK_SIZE($30)
-	lda	$27, handle_mm
-	jsr	$26, ($27), handle_mm
-
-	RESTORE_ALL
-	call_pal PAL_rti
-END_PROC(__ent_mm)
-
-
-BEGIN_PROC(__ent_if)
-	SAVE_ALL	
-
-	DISABLE_INT($3, $4)
-	
-	/* Need to put the ctx ptr in a3, and the stack in a4 */
-	lda	$19, INTERRUPT_STACK_SIZE($30)
-	mov	$30, $20
-
-	lda	$27, handle_if
-	jsr	$26, ($27), handle_if
-	
-	RESTORE_ALL
-	call_pal PAL_rti
-END_PROC(__ent_if)
-
-	
-BEGIN_PROC(__ent_una)
-	SAVE_ALL	
-
-	DISABLE_INT($3, $4)
-
-	/* Need to put the ctx ptr in a3, and the stack in a4 */
-	lda	$19, INTERRUPT_STACK_SIZE($30)
-	mov	$30, $20
-
-		
-	lda	$27, handle_una
-	jsr	$26, ($27), handle_una
-	
-	RESTORE_ALL
-	call_pal PAL_rti
-END_PROC(__ent_una)
-
-
-BEGIN_PROC(__return_except)
-	RESTORE_ALL
-	call_pal PAL_rti
-END_PROC(__return_except)
-	
diff --git a/kernel/src/glue/v4-alpha/user.S b/kernel/src/glue/v4-alpha/user.S
deleted file mode 100644
index 9477a1a0..00000000
--- a/kernel/src/glue/v4-alpha/user.S
+++ /dev/null
@@ -1,148 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/user.S
- * Description:   User syscall stubs 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: user.S,v 1.6 2004/04/06 07:27:14 benno Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(pal.h)
-#include INC_GLUE(syscalls.h)
-#include <asmsyms.h>
-#include INC_GLUE(ipcregs.h)
-
-#define SYSCALL(name)				\
-.section .user.##name, "ax";			\
-BEGIN_PROC(user_##name);			\
-    subq   $30, 8, $30;				\
-    stq    $26, 0($30);				\
-    lda    $0, SYSCALL_##name;			\
-    call_pal  PAL_callsys;			\
-    ldq    $26, 0($30);				\
-    addq   $30, 8, $30;				\
-    ret    $31, ($26);				\
-END_PROC(user_##name);				\
-.previous
-
-#define SYSCALL_UNIMPLEMENTED(name)		\
-.section .user.##name, "ax";			\
-BEGIN_PROC(user_##name);			\
-	lda	$0, 0;				\
-	ret	$31, ($26);			\
-END_PROC(user_##name);				\
-.previous
-	
-/* This is special due to saving s regs. */
-.section .user.ipc, "ax"
-BEGIN_PROC(user_ipc)
-	subq   $30, 8 * 8, $30 /* Make room for ra and s0 - s6 ($9 - $15) */
-
-	stq    $9,   0($30)
-	stq    $10,  8($30)
-	stq    $11, 16($30)
-	stq    $12, 24($30)
-	stq    $13, 32($30)
-	stq    $14, 40($30)
-	stq    $15, 48($30)	
-	stq    $26, 56($30)
-
-
-/* API defines */					
-#define mr0		R_MR0
-#define mr1		R_MR1
-#define mr2		R_MR2
-#define mr3		R_MR3
-#define mr4		R_MR4
-#define mr5		R_MR5
-#define mr6		R_MR6
-#define mr7		R_MR7
-#define mr8		R_MR8
-	
-#define current_utcb	$0
-	
-	/* Load MRs */
-	call_pal PAL_rdunique
-	ldq	mr0, UTCB_MR_OFFSET +  0(current_utcb)
-	ldq	mr1, UTCB_MR_OFFSET +  8(current_utcb)
-	ldq	mr2, UTCB_MR_OFFSET + 16(current_utcb)
-	ldq	mr3, UTCB_MR_OFFSET + 24(current_utcb)
-	ldq	mr4, UTCB_MR_OFFSET + 32(current_utcb)
-	ldq	mr5, UTCB_MR_OFFSET + 40(current_utcb)
-	ldq	mr6, UTCB_MR_OFFSET + 48(current_utcb)
-	ldq	mr7, UTCB_MR_OFFSET + 56(current_utcb)						
-	ldq	mr8, UTCB_MR_OFFSET + 64(current_utcb)						
-	
-	mov	$31, $0
-#if defined(CONFIG_ALPHA_PAL_IPC_FASTPATH)
-	call_pal  0xb0
-#else
-	call_pal  PAL_callsys
-#endif /* CONFIG_ALPHA_PAL_IPC_FASTPATH */
-
-	mov	$0, $16
-#if 1
-	call_pal PAL_rdunique	
-	stq	mr0, UTCB_MR_OFFSET +  0(current_utcb)
-	stq	mr1, UTCB_MR_OFFSET +  8(current_utcb)
-	stq	mr2, UTCB_MR_OFFSET + 16(current_utcb)
-	stq	mr3, UTCB_MR_OFFSET + 24(current_utcb)
-	stq	mr4, UTCB_MR_OFFSET + 32(current_utcb)
-	stq	mr5, UTCB_MR_OFFSET + 40(current_utcb)
-	stq	mr6, UTCB_MR_OFFSET + 48(current_utcb)
-	stq	mr7, UTCB_MR_OFFSET + 56(current_utcb)						
-	stq	mr8, UTCB_MR_OFFSET + 64(current_utcb)						
-#endif
-	mov	$16, $0
-	
-	ldq    $9,   0($30)
-	ldq    $10,  8($30)
-	ldq    $11, 16($30)
-	ldq    $12, 24($30)
-	ldq    $13, 32($30)
-	ldq    $14, 40($30)
-	ldq    $15, 48($30)	
-	ldq    $26, 56($30)
-	
-	addq   $30, 8 * 8, $30				
-	ret    $31, ($26)				
-END_PROC(user_ipc)			
-.previous
-
-SYSCALL(thread_switch)
-SYSCALL(thread_control)
-SYSCALL(exchange_registers)
-SYSCALL(schedule)
-SYSCALL(unmap)
-SYSCALL(space_control)
-SYSCALL(processor_control)
-SYSCALL(memory_control)
-SYSCALL(system_clock)
-	
-SYSCALL_UNIMPLEMENTED(lipc)
-
-	
diff --git a/kernel/src/glue/v4-alpha/utcb.h b/kernel/src/glue/v4-alpha/utcb.h
deleted file mode 100644
index 7073f98b..00000000
--- a/kernel/src/glue/v4-alpha/utcb.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003, 2006,  University of New South Wales
- *                
- * File path:     glue/v4-alpha/utcb.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: utcb.h,v 1.6 2006/10/20 16:29:32 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ALPHA__UTCB_H__
-#define __GLUE__V4_ALPHA__UTCB_H__
-
-#include INC_API(types.h)
-#include INC_API(thread.h)
-
-/* On ev6, the L1 cache size is 64 bytes, on ev4 and ev5m size is 32 bytes */
-
-class utcb_t
-{
-public:
-    bool allocate(threadid_t tid);
-    void free() {this->my_global_id = NILTHREAD;}
-
-public:
-    threadid_t		my_global_id;		/* 0 */
-    word_t		processor_no;		/* 8 */
-    word_t		user_defined_handle;	/* 16 */
-    threadid_t		pager;			/* 24 */
-    threadid_t		exception_handler;	/* 32 */
-    u8_t		preempt_flags;		/* 40 */
-    u8_t		cop_flags;              /* 41 */
-    u16_t		__reserved0;           
-    u32_t               __reserved1;
-    timeout_t		xfer_timeout;		/* 48 */
-    word_t		error_code;		/* 56 */
-    threadid_t		intended_receiver;	/* 64 */
-    threadid_t		virtual_sender;		/* 72 */
-    word_t              __padding0[6];          /* 80 .. 128 */
-    word_t		mr[IPC_NUM_MR];		/* 128 .. 640 */
-    word_t		br[IPC_NUM_BR];		/* 640 .. 904 */
-    word_t              __padding1[15];         /* 904 .. 1024 */
-
-public:
-    void set_my_global_id(threadid_t tid);
-    word_t get_user_defined_handle();
-    void set_user_defined_handle(word_t handle);
-    threadid_t get_pager();
-    void set_pager(threadid_t tid);
-    threadid_t get_exception_handler();
-    void set_exception_handler(threadid_t tid);
-    u8_t get_preempt_flags();
-    void set_preempt_flags(u8_t flags);
-    u8_t get_cop_flags();
-    word_t get_error_code();
-    void set_error_code(word_t err);
-    timeout_t get_xfer_timeout();
-    threadid_t get_intended_receiver();
-    threadid_t get_virtual_sender();
-    void set_virtual_sender(threadid_t tid);
-
-} __attribute__((packed));
-
-#include INC_API(generic-utcb.h)
-
-/**
- * try to allocate a UTCB and mark it as used
- * @param tid the global ID of the associated thread
- * @return true on success, false if UTCB is already allocated
- */
-INLINE bool utcb_t::allocate( threadid_t tid )
-{
-#if defined(CONFIG_SMP)
-#warning utcb_t::allocate not SMP safe
-#endif
-    if(this->my_global_id.is_nilthread()) {
-    	this->my_global_id.set_raw(tid.get_raw());
-	return true;
-    } else
-	return false;
-}
-
-#endif /* !__GLUE__V4_ALPHA__UTCB_H__ */
diff --git a/kernel/src/glue/v4-arm/Makeconf b/kernel/src/glue/v4-arm/Makeconf
deleted file mode 100644
index f8671652..00000000
--- a/kernel/src/glue/v4-arm/Makeconf
+++ /dev/null
@@ -1,6 +0,0 @@
-SOURCES += $(addprefix src/glue/v4-arm/,			\
-	init.cc space.cc thread.cc exception.cc intctrl.cc	\
-	resources.cc memcontrol.cc user.S traps.S)
-  
-SOURCES += $(addprefix src/generic/, linear_ptab_walker.cc	\
-	    mapping.cc mapping_alloc.cc )
diff --git a/kernel/src/glue/v4-arm/asmsyms.cc b/kernel/src/glue/v4-arm/asmsyms.cc
deleted file mode 100644
index 8e63c55d..00000000
--- a/kernel/src/glue/v4-arm/asmsyms.cc
+++ /dev/null
@@ -1,42 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003, 2006,  University of New South Wales
- *                
- * File path:     glue/v4-arm/asmsyms.cc
- * Description:   Various asm definitions for arm
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asmsyms.cc,v 1.2 2006/10/19 14:21:57 reichelt Exp $
- *                
- ********************************************************************/
-#include <mkasmsym.h>
-
-#include INC_API(tcb.h)
-#include INC_GLUE(space.h)
-
-MKASMSYM( TSTATE_RUNNING, (word_t) thread_state_t::running );
-MKASMSYM( TSTATE_WAITING_FOREVER, (word_t) thread_state_t::waiting_forever );
-MKASMSYM( TSTATE_POLLING, (word_t) thread_state_t::polling);
-
-MKASMSYM( OFS_SPACE_DOMAIN, offsetof(space_t, pt.pd_split.domain));
-MKASMSYM( OFS_SPACE_PID, offsetof(space_t, pt.pd_split.pid));
diff --git a/kernel/src/glue/v4-arm/config.h b/kernel/src/glue/v4-arm/config.h
deleted file mode 100644
index 3bc2fd00..00000000
--- a/kernel/src/glue/v4-arm/config.h
+++ /dev/null
@@ -1,221 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/config.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.23 2004/12/01 23:57:01 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ARM__CONFIG_H__
-#define __GLUE__V4_ARM__CONFIG_H__
-
-#include INC_API(config.h)
-#include INC_ARCH(page.h)
-
-#if defined(ASSEMBLY)
-#define UL(x)	x
-#else
-#define UL(x)	x##ul
-#endif
-
-/**
- * Size of a kernel TCB in bytes
- */
-#define KTCB_PGSIZE     pgent_t::size_4k
-#define KTCB_BITS       12
-#define KTCB_SIZE	(UL(1) << KTCB_BITS)
-#define KTCB_MASK       (~(KTCB_SIZE - 1))
-
-#define UTCB_BITS       9
-#define UTCB_SIZE       (1ul << UTCB_BITS)
-#define UTCB_MASK       (~(UTCB_SIZE - 1))
-
-#define UTCB_AREA_PGSIZE pgent_t::size_4k
-
-/**
-   attributes for system call functions
-   @param x is the name of the system call lacking the leading sys_ .
-   This makes it possible to place every system call in its own section
-   if required. Default is empty.
- */
-#define KIP_SYSCALL(x)  ((word_t) (x) - (word_t) &kip)
-
-/**
- * endianess and word size
- */
-
-#if CONFIG_BIGENDIAN
-  #define KIP_API_FLAGS	{SHUFFLE2(endian:1, word_size:0)} /* 32-bit, big endian */
-#else
-  #define KIP_API_FLAGS	{ endian:0, word_size:0 } /* 32-bit, little endian */
-#endif
-
-/**
- * minimum size of UTCB area and number of UTCBs in this
- */
-#define KIP_UTCB_INFO   { SHUFFLE3(multiplier: 1, alignment: UTCB_BITS, size:PAGE_BITS_4K) }
-
-/**
- * size of kernel interface page
- */
-#define KIP_KIP_BITS    PAGE_BITS_4K
-#define KIP_KIP_SIZE    (1 << KIP_KIP_BITS)
-#define KIP_KIP_PGSIZE  pgent_t::size_4k
-#define KIP_KIP_AREA	{ size:KIP_KIP_BITS }   // 4KB
-
-/**
- * supported page sizes and access bits
- */
-#define KIP_ARCH_PAGEINFO { SHUFFLE2(rwx:2, size_mask:HW_VALID_PGSIZES >> 10) }
-
-/* memory layout
- *
- * The first (14/16ths = 3.54GB) are user address space.  Immediately after this, is the
- * beginning of kernel space (2/16ths = 512MB).
- * There is 256 MB of KTCBs, giving 16 valid bits for thread IDs.
- *
- * Next is 128 MB of space for kernel code and structures (such as the CPD,
- * root page table and bootstack).
- *
- * After this is 64 MB of space for the copy area.
- *
- * Following this is 16 MB of space for storing variables for space_t such as
- * kip_area, utcb_area, thread_count and domain. It is important that the
- * 2 LSBs _MUST_ be 00, when using these for data or security may be compromised.
- * 
- * Following is 47 MB for IO space mappings, then
- * 
- * Finally a 1 MB section is reserved for mapping in the exception vectors.
- */
-
-
-#define USER_AREA_SECTIONS	((ARM_NUM_SECTIONS * 14) / 16)
-#define USER_AREA_START		0ul
-#define USER_AREA_SIZE		(USER_AREA_SECTIONS * ARM_SECTION_SIZE)
-#define USER_AREA_END		(USER_AREA_START + USER_AREA_SIZE)
-
-#define VALID_THREADNO_BITS	16
-#define VALID_THREADNO_MASK	((1ul << VALID_THREADNO_BITS)-1)
-#define KTCB_AREA_SECTIONS	(KTCB_AREA_SIZE / ARM_SECTION_SIZE)
-#define KTCB_AREA_START		USER_AREA_END
-#define KTCB_AREA_SIZE		(1ul << (KTCB_BITS + VALID_THREADNO_BITS))
-#define KTCB_AREA_END		(KTCB_AREA_START + KTCB_AREA_SIZE)
-
-#define KERNEL_AREA_SECTIONS	64
-#define KERNEL_AREA_START	KTCB_AREA_END
-#define KERNEL_AREA_SIZE	(KERNEL_AREA_SECTIONS * ARM_SECTION_SIZE)
-#define KERNEL_AREA_END		(KERNEL_AREA_START + KERNEL_AREA_SIZE)
-
-#define UNCACHE_AREA_SECTIONS	64
-#define UNCACHE_AREA_START	KERNEL_AREA_END
-#define UNCACHE_AREA_SIZE	(UNCACHE_AREA_SECTIONS * ARM_SECTION_SIZE)
-#define UNCACHE_AREA_END	(UNCACHE_AREA_START + UNCACHE_AREA_SIZE)
-
-#define COPY_AREA_SECTIONS	 64
-#define COPY_AREA_BLOCK_SECTIONS 8
-#define COPY_AREA_START		 UNCACHE_AREA_END
-#define COPY_AREA_BLOCK_SIZE	 (COPY_AREA_BLOCK_SECTIONS * ARM_SECTION_SIZE)
-#define COPY_AREA_SIZE		 (COPY_AREA_SECTIONS * ARM_SECTION_SIZE)
-#define COPY_AREA_COUNT		 (COPY_AREA_SIZE / COPY_AREA_BLOCK_SIZE)
-#define COPY_AREA_END		 (COPY_AREA_START + COPY_AREA_SIZE)
-
-#define VAR_AREA_SECTIONS	16
-#define VAR_AREA_START		COPY_AREA_END
-#define VAR_AREA_SIZE		(VAR_AREA_SECTIONS * ARM_SECTION_SIZE)
-#define VAR_AREA_END		(VAR_AREA_START + VAR_AREA_SIZE)
-
-#define IO_AREA_SECTIONS	32
-#define IO_AREA_START		VAR_AREA_END
-#define IO_AREA_SIZE		(IO_AREA_SECTIONS * ARM_SECTION_SIZE)
-#define IO_AREA_END		(IO_AREA_START + IO_AREA_SIZE)
-
-#define MISC_AREA_SECTIONS	15
-#define MISC_AREA_START		IO_AREA_END
-#define MISC_AREA_SIZE		(MISC_AREA_SECTIONS * ARM_SECTION_SIZE)
-#define MISC_AREA_END		(MISC_AREA_START + MISC_AREA_SIZE)
-
-/* User UTCB reference page at 0xff000000 */
-
-#define USER_UTCB_REF_PAGE	MISC_AREA_START
-
-#define EXCPT_AREA_START	MISC_AREA_END
-#define EXCPT_AREA_SIZE		ARM_SECTION_SIZE
-#define EXCPT_AREA_END		(EXCPT_AREA_START + EXCPT_AREA_SIZE)
-
-/* 1MB IO Areas in the Virtual Address space. Define more if needed */
-#define IO_AREA0_VADDR		(IO_AREA_START + (ARM_SECTION_SIZE*0))
-#define IO_AREA1_VADDR		(IO_AREA_START + (ARM_SECTION_SIZE*1))
-#define IO_AREA2_VADDR		(IO_AREA_START + (ARM_SECTION_SIZE*2))
-#define IO_AREA3_VADDR		(IO_AREA_START + (ARM_SECTION_SIZE*3))
-#define IO_AREA4_VADDR		(IO_AREA_START + (ARM_SECTION_SIZE*4))
-#define IO_AREA5_VADDR		(IO_AREA_START + (ARM_SECTION_SIZE*5))
-#define IO_AREA6_VADDR		(IO_AREA_START + (ARM_SECTION_SIZE*6))
-#define IO_AREA7_VADDR		(IO_AREA_START + (ARM_SECTION_SIZE*7))
-#define PHYSMAPPING_VADDR	(IO_AREA_START + (ARM_SECTION_SIZE*10))
-
-/* Note on io area usage:
- *
- * SA1100 uses:
- *  #define CONSOLE_VADDR		IO_AREA0_VADDR
- *  #define ZERO_BANK_VADDR		IO_AREA1_VADDR
- *  #define SA1100_OS_TIMER_BASE	IO_AREA2_VADDR
- *
- * XSCALE uses:
- *  #define IODEVICE_VADDR		IO_AREA0_VADDR
- *
- * OMAP1510 uses:
- *  #define IODEVICE_VADDR		IO_AREA0_VADDR
- *
- * CSB337 uses:
- *  #define SYS_VADDR			IO_AREA0_VADDR
-*/
-
-/**
- * Base address of the root task's UTCB area
- */
-#define ROOT_UTCB_START		(USER_AREA_END - ARM_SECTION_SIZE)
-
-/**
- * Address of the KIP in the root task
- */
-#define ROOT_KIP_START		(USER_AREA_END - KIP_KIP_SIZE)
-
-/**
- * Address of start of arm_high_vector - exception handling code
- */
-#define ARM_HIGH_VECTOR_VADDR	(EXCPT_AREA_START | 0x000f0000 )
-
-/**
- * Address of the syscall area (for prefect aborts) is in
- * the last page of virtual memory. Do not map anything
- * with user access here.
- */
-#define ARM_SYSCALL_VECTOR	(0xffffff00)
-
-#include INC_PLAT(timer.h)
-
-#endif /* __GLUE__V4_ARM__CONFIG_H__ */
diff --git a/kernel/src/glue/v4-arm/debug.h b/kernel/src/glue/v4-arm/debug.h
deleted file mode 100644
index 8bff4365..00000000
--- a/kernel/src/glue/v4-arm/debug.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     glue/v4-arm/debug.h
- * Description:
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: debug.h,v 1.3 2004/06/04 02:26:52 cvansch Exp $
- *
- ********************************************************************/
-#ifndef __GLUE__V4_ARM__DEBUG_H__
-#define __GLUE__V4_ARM__DEBUG_H__
-
-#include INC_GLUE(syscalls.h)
-
-#define enter_kdebug(x)					\
-do {							\
-    __asm__ __volatile__ (				\
-	"	adr	lr,	1f		\n"	\
-	"	mov	r1,	%0		\n"	\
-	"	ldr	pc,	0f		\n"	\
-	"0:     .word	kern_kdebug_entry	\n"	\
-	"1:					\n"	\
-	: : "r" (x) : "r1", "lr");			\
-} while (0)
-
-#endif /* __GLUE__V4_ARM__DEBUG_H__ */
diff --git a/kernel/src/glue/v4-arm/exception.cc b/kernel/src/glue/v4-arm/exception.cc
deleted file mode 100644
index fea1269a..00000000
--- a/kernel/src/glue/v4-arm/exception.cc
+++ /dev/null
@@ -1,438 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     glue/v4-arm/exception.cc
- * Description:   ARM syscall and page fault handlers
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: exception.cc,v 1.35 2006/10/27 18:00:51 reichelt Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include <linear_ptab.h>
-#include INC_API(tcb.h)
-#include INC_API(syscalls.h)
-#include INC_API(kernelinterface.h)
-#include INC_ARCH(thread.h)
-#include INC_GLUE(exception.h)
-#include INC_GLUE(space.h)
-#include INC_PLAT(console.h)
-#include INC_GLUE(syscalls.h)
-#include INC_GLUE(intctrl.h)
-#include INC_CPU(cpu.h)
-#include INC_PLAT(timer.h)
-#include INC_API(schedule.h)
-#include <kdb/tracepoints.h>
-#ifdef CONFIG_DEBUG
-#include <kdb/console.h>
-#endif
-
-DECLARE_TRACEPOINT(ARM_PAGE_FAULT);
-DECLARE_TRACEPOINT(EXCEPTION_IPC_SYSCALL);
-DECLARE_TRACEPOINT(EXCEPTION_IPC_GENERAL);
-
-INLINE void halt_user_thread( void )
-{
-    tcb_t *current = get_current_tcb();
-
-    current->set_state( thread_state_t::halted );
-    current->switch_to_idle();
-}
-
-/* As on MIPS */
-
-#define SYSCALL_SAVED_REGISTERS (EXCEPT_IPC_SYS_MR_NUM+1)
-
-static bool send_exception_ipc( word_t exc_no, word_t exc_code, arm_irq_context_t *context );
-
-static bool send_syscall_ipc(arm_irq_context_t *context)
-{
-    tcb_t *current = get_current_tcb();
-
-    if (current->get_exception_handler().is_nilthread()) {
-        printf( "Unable to deliver user exception: no exception handler.\n" );
-        return false;
-    }
-
-    TRACEPOINT (EXCEPTION_IPC_SYSCALL,
-		printf ("EXCEPTION_IPC_SYSCALL: (%p) IP = %p\n",
-			current, (word_t)current->get_user_ip()));
-
-    // Save message registers on the stack
-    word_t saved_mr[SYSCALL_SAVED_REGISTERS];
-    msg_tag_t tag;
-
-    // Save message registers.
-    for (int i = 0; i < SYSCALL_SAVED_REGISTERS; i++)
-        saved_mr[i] = current->get_mr(i);
-
-    current->set_saved_partner(current->get_partner());
-    current->set_saved_state(current->get_state());
- 
-    // Create the message tag.
-    tag.set(0, EXCEPT_IPC_SYS_MR_NUM, EXCEPT_IPC_SYS_LABEL);
-    current->set_tag(tag);
-
-    // Create the message.
-    current->set_mr(EXCEPT_IPC_SYS_MR_PC, (word_t)current->get_user_ip()); 
-    current->set_mr(EXCEPT_IPC_SYS_MR_R0, context->r0);
-    current->set_mr(EXCEPT_IPC_SYS_MR_R1, context->r1);
-    current->set_mr(EXCEPT_IPC_SYS_MR_R2, context->r2);
-    current->set_mr(EXCEPT_IPC_SYS_MR_R3, context->r3);
-    current->set_mr(EXCEPT_IPC_SYS_MR_R4, context->r4);
-    current->set_mr(EXCEPT_IPC_SYS_MR_R5, context->r5);
-    current->set_mr(EXCEPT_IPC_SYS_MR_R6, context->r6);
-    current->set_mr(EXCEPT_IPC_SYS_MR_R7, context->r7);
-    current->set_mr(EXCEPT_IPC_SYS_MR_SP, (word_t)current->get_user_sp());
-    current->set_mr(EXCEPT_IPC_SYS_MR_LR, context->lr);
-    current->set_mr(EXCEPT_IPC_SYS_MR_SYSCALL, *(word_t *)((word_t)current->get_user_ip()-4));
-    current->set_mr(EXCEPT_IPC_SYS_MR_FLAGS, current->get_user_flags());
- 
-
-    // Deliver the exception IPC.
-    tag = current->do_ipc(current->get_exception_handler(),
-            current->get_exception_handler(), timeout_t::never());
-
-    // Alter the user context if necessary.
-    if (!tag.is_error()) {
-        current->set_user_ip((addr_t)current->get_mr(EXCEPT_IPC_SYS_MR_PC));
-        current->set_user_sp((addr_t)current->get_mr(EXCEPT_IPC_SYS_MR_SP));
-        current->set_user_flags(current->get_mr(EXCEPT_IPC_SYS_MR_FLAGS));
-
-	context->r0 = current->get_mr(EXCEPT_IPC_SYS_MR_R0);
-	context->r1 = current->get_mr(EXCEPT_IPC_SYS_MR_R1);
-	context->r2 = current->get_mr(EXCEPT_IPC_SYS_MR_R2);
-	context->r3 = current->get_mr(EXCEPT_IPC_SYS_MR_R3);
-	context->r4 = current->get_mr(EXCEPT_IPC_SYS_MR_R4);
-	context->r5 = current->get_mr(EXCEPT_IPC_SYS_MR_R5);
-	context->r6 = current->get_mr(EXCEPT_IPC_SYS_MR_R6);
-	context->r7 = current->get_mr(EXCEPT_IPC_SYS_MR_R7);
-	context->lr = current->get_mr(EXCEPT_IPC_SYS_MR_LR);
-    } else {
-        printf("Unable to deliver user exception: IPC error.\n");
-    }
-
-    // Clean-up.
-    for (int i = 0; i < SYSCALL_SAVED_REGISTERS; i++)
-        current->set_mr(i, saved_mr[i]);
-    
-    current->set_partner(current->get_saved_partner());
-    current->set_saved_partner(NILTHREAD);
-    current->set_state(current->get_saved_state());
-    current->set_saved_state(thread_state_t::aborted);
-    
-    return !tag.is_error();
-}
-
-extern "C" void syscall_exception(arm_irq_context_t *context)
-{  
-    if (!send_syscall_ipc(context)) {
-        printf(TXT_BRIGHT "--- KD# %s ---\n" TXT_NORMAL, 
-                "Unhandled User SYSCALL");  
-
-	if( EXPECT_FALSE(get_kip()->kdebug_entry != NULL) )
-	    get_kip()->kdebug_entry(context);
-
-	halt_user_thread();
-    }
-}
-
-extern "C" void undefined_exception(arm_irq_context_t *context)
-{  
-    word_t instr = *(word_t *)
-	    ((word_t)get_current_tcb()->get_user_ip()-4);
-
-    if (!send_exception_ipc(1, instr, context)) {
-	printf(TXT_BRIGHT "--- KD# %s ---\n" TXT_NORMAL, 
-		    "Unhandled User Undefined Instruction");  
-
-	if( EXPECT_FALSE(get_kip()->kdebug_entry != NULL) )
-	    get_kip()->kdebug_entry(context);
-
-	halt_user_thread();
-    }
-}
-
-extern "C" void reset_exception(arm_irq_context_t *context)
-{  
-    printf(TXT_BRIGHT "--- KD# %s ---\n" TXT_NORMAL, 
-		"Unhandled Reset Exception");  
-
-    if( EXPECT_FALSE(get_kip()->kdebug_entry != NULL) )
-	get_kip()->kdebug_entry(context);
-
-    halt_user_thread();
-}
-
-extern "C" void fiq_exception(arm_irq_context_t *context)
-{  
-    printf(TXT_BRIGHT "--- KD# %s ---\n" TXT_NORMAL, 
-		"FIQ Exception");  
-
-    if( EXPECT_FALSE(get_kip()->kdebug_entry != NULL) )
-	get_kip()->kdebug_entry(context);
-
-    halt_user_thread();
-}
-
-extern "C" void arm_misc_l4_syscall(arm_irq_context_t *context)
-{
-#ifdef CONFIG_DEBUG
-    switch (context->pc & 0xff) {
-    case L4_TRAP_KIP: 
-	{
-	    space_t *space = get_current_space();
-
-	    context->r0 = (word_t)space->get_kip_page_area().get_base();
-	    context->r1 = get_kip()->api_version;
-	    context->r2 = get_kip()->api_flags;
-	    context->r3 = get_kip()->kernel_desc_ptr ?
-		    *(word_t *)((word_t)get_kip() + get_kip()->kernel_desc_ptr)
-		    : 0;
-
-	    return;
-	}
-    case L4_TRAP_KPUTC:
-	putc((char)context->r0);
-	return;
-    case L4_TRAP_KGETC:
-	context->r0 = (s32_t)(s8_t)getc(true);
-	return;
-    case L4_TRAP_KGETC_NB:
-	context->r0 = (s32_t)(s8_t)getc(false);
-	return;
-    case L4_TRAP_KDEBUG:
-	printf("User trap to kdebug\n");
-	kdebug_entry(context);
-	return;
-    default:
-	break;
-    }
-#endif
-
-    printf("Illegal misc syscall\n");
-    halt_user_thread();
-}
-
-extern "C" u64_t sys_clock(void)
-{
-    return get_current_scheduler()->get_current_time();
-}
-
-extern "C" void arm_page_fault(word_t fault_status, addr_t fault_addr,
-        arm_irq_context_t *context, word_t data_abt)
-{
-    pgent_t::pgsize_e pgsize;
-    pgent_t *pg;
-    word_t fs = fault_status & 0xf;
-
-    TRACEPOINT(ARM_PAGE_FAULT,
-	printf("pf @ %p, pc = %p, tcb = %p, fs = %x\n", fault_addr, 
-	    (addr_t)context->pc, get_current_tcb(), fs));
-
-    /* See ARM ARM B3-19 - only deal with prefetch aborts, translation,
-     * domain and permission data aborts. Alignment and external aborts are
-     * not currently recoverable.
-     */
-    if (fault_status)
-    {
-	switch(fs) {
-	    case 7: case 5: case 15: case 13: case 9: case 11:
-		break;
-	    case 2:	/* Terminal exception, not recoverable */
-	    default:
-		if (!send_exception_ipc(0x100 + fs, (word_t)fault_addr, context)) {
-		    printf(TXT_BRIGHT "--- KD# %s ---\n" TXT_NORMAL, 
-				"Unhandled Memory Abort");  
-
-		    if( EXPECT_FALSE(get_kip()->kdebug_entry != NULL) )
-			get_kip()->kdebug_entry(context);
-
-		    halt_user_thread();
-		}
-		return;
-	}
-    }
-
-    space_t *space = get_current_tcb()->get_space();
-                                                                                
-    if (space == NULL)
-	space = get_kernel_space();
-                                                                                
-    ASSERT(space);
-                                     
-    bool is_valid = space->lookup_mapping(fault_addr, &pg, &pgsize);
-    bool is_writable = is_valid && pg->is_writable(space, pgsize);
-
-    word_t fault_section = (word_t)fault_addr >> 20;
-
-    /* Special case when TCB sections are copied in for the first time */
-    if (space->is_tcb_area(fault_addr) && *space->pgent(fault_section) !=
-		    *get_kernel_space()->pgent(fault_section)) {
-	*space->pgent(fault_section) =
-		*get_kernel_space()->pgent(fault_section);
-        return;
-    }
-
-
-#ifdef CONFIG_ENABLE_FASS
-    /* Does the faulter's space's section match that in the CPD for the fault
-     * address? 
-     */
-
-    pgent_t spg = *space->pgent(fault_section);
-    pgent_t cpg = cpd->pt.pdir[fault_section];
-
-    if (cpg != spg)
-    {
-loop:
-	bool cpd_section_valid = cpg.is_valid(cpd, pgent_t::size_1m); 
-	arm_domain_t cpd_section_domain = cpg.get_domain();
-
-	/* Clean the kernel's UTCB synonym if necessary */
-	bool is_utcb_section = 
-		((word_t)get_current_tcb()->get_utcb_location() >> 20)
-		== fault_section;
-	bool flush_utcb = is_utcb_section && 
-		TEST_BIT_WORD(utcb_dirty, current_domain);
-
-	bool need_flush = flush_utcb || 
-		(cpd_section_valid &&  
-		    TEST_BIT_WORD(domain_dirty, cpd_section_domain));
-
-	/* If there is an existing mapping in the CPD for this section,
-	 * remove it from the owner domain's set of sections in the CPD 
-	 */
-	if (cpd_section_valid)
-	    arm_fass.remove_set(cpd_section_domain, fault_section);
-
-	/* Update the faulter domain's set of sections in the CPD */
-	arm_fass.add_set(current_domain, fault_section);
-
-	/* Update the CPD */
-	if (spg.is_valid(space, pgent_t::size_1m)) 
-	    space->pgent(fault_section)->set_domain(current_domain);
-	cpd->pt.pdir[fault_section] = *space->pgent(fault_section);
-
-	if (need_flush) {
-	    arm_fass.clean_all();
-	    SET_BIT_WORD(domain_dirty, current_domain);
-	} else {
-	    // need to remove all entries corresponding to fault section
-	    // from TLB. Cheaper to flush than to iterate over section
-	    // on SA-1100 (FIXME - check other archs' MMU).
-	    arm_cache::tlb_flush();
-	}
-
-	if (is_valid)
-	    return;
-    }
-#endif
-
-/*printf("v=%x w=%x %p-%p, %p-%p\n", is_valid, is_writable,
-		&cpd->pt.pdir[fault_section], cpd->pt.pdir[fault_section],
-		space->pgent(fault_section), *space->pgent(fault_section));
-*/
-    space->handle_pagefault(fault_addr, (addr_t)context->pc,
-		    data_abt ? is_valid && !is_writable ?
-		    space_t::write : space_t::read : space_t::execute,
-		    ((context->cpsr & 0x1f) != 0x10));
-
-    if (fs == 0xf)
-	arm_cache::tlb_flush_ent(fault_addr, ARM_PAGE_BITS);
-    else if (fs == 0xd)
-	arm_cache::tlb_flush();
-
-#ifdef CONFIG_ENABLE_FASS
-    if (!is_valid)
-	return;
-
-    spg = *space->pgent(fault_section);
-    cpg = cpd->pt.pdir[fault_section];
-
-    if (cpg != spg)
-	goto loop;
-#endif
-}
-
-#define GENERIC_SAVED_REGISTERS (EXCEPT_IPC_GEN_MR_NUM+1)
-
-static bool send_exception_ipc( word_t exc_no, word_t exc_code, arm_irq_context_t *context )
-{
-    tcb_t *current = get_current_tcb();
-    if( current->get_exception_handler().is_nilthread() )
-	return false;
-
-    TRACEPOINT (EXCEPTION_IPC_GENERAL,
-		printf ("EXCEPTION_IPC_GENERAL: (%p) exc_no %d, exc_code %016lx, IP = %p\n",
-			current, exc_no, exc_code, (word_t)current->get_user_ip()));
-
-    // Save message registers on the stack
-    word_t saved_mr[GENERIC_SAVED_REGISTERS];
-    msg_tag_t tag;
-
-    // Save message registers.
-    for( int i = 0; i < GENERIC_SAVED_REGISTERS; i++ )
-	saved_mr[i] = current->get_mr(i);
-    current->set_saved_partner( current->get_partner() );
-    current->set_saved_state( current->get_state() );
-
-    // Create the message tag.
-    tag.set( 0, EXCEPT_IPC_GEN_MR_NUM, EXCEPT_IPC_GEN_LABEL);
-    current->set_tag( tag );
-
-    // Create the message.
-    current->set_mr( EXCEPT_IPC_GEN_MR_IP, (word_t)current->get_user_ip() );
-    current->set_mr( EXCEPT_IPC_GEN_MR_SP, (word_t)current->get_user_sp() );
-    current->set_mr( EXCEPT_IPC_GEN_MR_FLAGS, (word_t)current->get_user_flags() );
-    current->set_mr( EXCEPT_IPC_GEN_MR_EXCEPTNO, exc_no );
-    current->set_mr( EXCEPT_IPC_GEN_MR_ERRORCODE, exc_code );
-    current->set_mr( EXCEPT_IPC_GEN_MR_LOCALID, current->get_local_id().get_raw() );
-
-    // Deliver the exception IPC.
-    tag = current->do_ipc( current->get_exception_handler(),
-	    current->get_exception_handler(), timeout_t::never() );
-
-    // Alter the user context if necessary.
-    if( !tag.is_error() )
-    {
-	current->set_user_ip( (addr_t)current->get_mr(EXCEPT_IPC_GEN_MR_IP) );
-	current->set_user_sp( (addr_t)current->get_mr(EXCEPT_IPC_GEN_MR_SP) );
-	current->set_user_flags( current->get_mr(EXCEPT_IPC_GEN_MR_FLAGS) );
-    }
-    else
-	printf( "Unable to deliver user exception: IPC error.\n" );
-
-    // Clean-up.
-    for( int i = 0; i < GENERIC_SAVED_REGISTERS; i++ )
-	current->set_mr( i, saved_mr[i] );
-
-    current->set_partner( current->get_saved_partner() );
-    current->set_saved_partner( NILTHREAD );
-    current->set_state( current->get_saved_state() );
-    current->set_saved_state( thread_state_t::aborted );
-
-    return !tag.is_error();
-}
diff --git a/kernel/src/glue/v4-arm/exception.h b/kernel/src/glue/v4-arm/exception.h
deleted file mode 100644
index 7d2606f7..00000000
--- a/kernel/src/glue/v4-arm/exception.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     glue/v4-arm/exception.h
- * Description:
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: exception.h,v 1.6 2004/12/02 00:10:11 cvansch Exp $
- *
- ********************************************************************/
-
-
-#ifndef __GLUE__V4_ARM__EXCEPTION_H__
-#define __GLUE__V4_ARM__EXCEPTION_H__
-
-/*
- * Generic exception message format
- * All exceptions not handled by the kernel or other exception
- * messages.
- */
-
-#define EXCEPT_IPC_GEN_MR_IP		1
-#define EXCEPT_IPC_GEN_MR_SP		2
-#define EXCEPT_IPC_GEN_MR_FLAGS		3
-#define EXCEPT_IPC_GEN_MR_EXCEPTNO	4
-#define EXCEPT_IPC_GEN_MR_ERRORCODE	5
-#define EXCEPT_IPC_GEN_MR_LOCALID	6
-#define EXCEPT_IPC_GEN_MR_NUM		6
-
-#define EXCEPT_IPC_GEN_LABEL		(-5ul << 4)
-#define EXCEPT_IPC_GEN_TAG		((EXCEPT_IPC_GEN_LABEL << 16) | EXCEPT_IPC_GEN_MR_NUM)
-
-/*
- * System call exception
- */
-#define EXCEPT_IPC_SYS_MR_PC            1
-#define EXCEPT_IPC_SYS_MR_R0            2
-#define EXCEPT_IPC_SYS_MR_R1            3
-#define EXCEPT_IPC_SYS_MR_R2            4
-#define EXCEPT_IPC_SYS_MR_R3            5
-#define EXCEPT_IPC_SYS_MR_R4            6
-#define EXCEPT_IPC_SYS_MR_R5            7
-#define EXCEPT_IPC_SYS_MR_R6            8
-#define EXCEPT_IPC_SYS_MR_R7            9
-#define EXCEPT_IPC_SYS_MR_SP            10
-#define EXCEPT_IPC_SYS_MR_LR            11
-#define EXCEPT_IPC_SYS_MR_SYSCALL       12
-#define EXCEPT_IPC_SYS_MR_FLAGS         13
-#define EXCEPT_IPC_SYS_MR_NUM           13
-
-#define EXCEPT_IPC_SYS_LABEL            (-5ul << 4)
-#define EXCEPT_IPC_SYS_TAG              ((EXCEPT_IPC_SYS_LABEL << 16) | EXCEPT_IPC_SYS_MR_NUM)
-
-
-#endif /* __GLUE__V4_ARM__EXCEPTION_H__ */
diff --git a/kernel/src/glue/v4-arm/fpage.h b/kernel/src/glue/v4-arm/fpage.h
deleted file mode 100644
index e46060cc..00000000
--- a/kernel/src/glue/v4-arm/fpage.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-arm/fpage.h
- * Description:   architecture specific flexpage declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fpage.h,v 1.3 2005/05/19 08:38:09 stoess Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ARM__FPAGE_H__
-#define __GLUE__V4_ARM__FPAGE_H__
-
-#include INC_API(generic-archfpage.h)
-
-#endif /* !__GLUE__V4_ARM__FPAGE_H__ */
diff --git a/kernel/src/glue/v4-arm/hwspace.h b/kernel/src/glue/v4-arm/hwspace.h
deleted file mode 100644
index f260464d..00000000
--- a/kernel/src/glue/v4-arm/hwspace.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/hwspace.h
- * Description:   Conversion functions for hardware space addresses
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: hwspace.h,v 1.7 2004/06/04 02:26:52 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ARM__HWSPACE_H__
-#define __GLUE__V4_ARM__HWSPACE_H__
-
-#include INC_PLAT(offsets.h)
-
-template<typename T> INLINE T virt_to_phys(T x)
-{
-    return (T) ((u32_t) x - KERNEL_OFFSET);
-}
-
-template<typename T> INLINE T phys_to_virt(T x)
-{
-    return (T) ((u32_t) x + KERNEL_OFFSET);
-}
-
-#endif /* !__GLUE__V4_ARM__HWSPACE_H__ */
diff --git a/kernel/src/glue/v4-arm/init.cc b/kernel/src/glue/v4-arm/init.cc
deleted file mode 100644
index e8a7c293..00000000
--- a/kernel/src/glue/v4-arm/init.cc
+++ /dev/null
@@ -1,368 +0,0 @@
-/********************************************************************* *                
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/init.cc
- * Description:   
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: init.cc,v 1.19 2004/12/09 01:14:49 cvansch Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(kernelinterface.h)
-#include INC_API(schedule.h)
-#include INC_GLUE(space.h)
-#include INC_GLUE(memory.h)
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(config.h)
-#include INC_GLUE(hwspace.h)
-#include INC_GLUE(timer.h)
-#include INC_CPU(syscon.h)
-#include INC_ARCH(bootdesc.h)
-
-#include <mapping.h>
-
-DECLARE_KMEM_GROUP(kmem_user_utcb_ref);
-
-extern "C" void init_platform(void);
-extern "C" void init_cpu_mappings(void);
-extern "C" struct arm_bootdesc* init_platform_mem(void);
-
-#define BOOTMEM_PAGES (CONFIG_BOOTMEM_PAGES)
-
-extern "C" void SECTION(".init") init_kip()
-{
-    TRACE_INIT("Initialising KIP...\n");    
-
-    /* set user virtual address space */
-    get_kip()->memory_info.insert(memdesc_t::conventional, true,
-            (addr_t)USER_AREA_START, (addr_t)USER_AREA_END);
-
-    /* reserved regions in physical memory */
-    get_kip()->memory_info.insert(memdesc_t::reserved, false,
-            addr_align(virt_to_phys(start_text), KB(4)),
-            addr_align_up(virt_to_phys(end_kip), KB(4)));
-    get_kip()->memory_info.insert(memdesc_t::reserved, false,
-            addr_align(virt_to_phys(start_data), KB(4)),
-            addr_align_up(virt_to_phys(end_kernel), KB(4)));
-
-    get_kip()->reserved_mem0.set(
-            addr_align(virt_to_phys(start_text), KB(4)),
-            addr_align_up(virt_to_phys(end_kip), KB(4)));
-    get_kip()->reserved_mem1.set(
-            addr_align(virt_to_phys(start_data), KB(4)),
-            addr_align_up(virt_to_phys(end_kernel), KB(4)));
-
-    get_kip()->init();
-}
-
-/**
- * Get page table index of virtual address for a 1m size
- *
- * @param vaddr         virtual address
- *
- * @return page table index for a table of the given page size
- */
-INLINE word_t page_table_1m (addr_t vaddr)
-{
-    return ((word_t) vaddr >> 20) & (ARM_L1_SIZE - 1);
-}
-
-/*
- * Add 1MB mappings during init.
- * This function works with the mmu disabled
- */
-extern "C" void SECTION(".init") add_mapping_init(space_t *space, addr_t vaddr,
-		addr_t paddr, bool uncached )
-{
-    pgent_t *pg = &space->pt.pdir[ page_table_1m(vaddr) ];
-
-    pg->set_entry_1m(space, paddr, true, true, true, uncached);
-}
-
-/* Put the addresses of physical memory directly into the bootinfo structure.
- * We do this here because we want to use some of the memory for a page table,
- * which needs to be around very early on, before we go into virtual mode.
-*/
-extern "C" void SECTION(".init")
-init_ram_descriptors(kernel_interface_page_t *kip_phys)
-{
-    struct arm_bootdesc* plat_mem = init_platform_mem();
-    memdesc_t *current;
-    int i;
-    
-    /* Setup platform physical memory map */
-    for (i=0; plat_mem[i].type; i++)
-    {
-    	current = virt_to_phys(
-			kip_phys->memory_info.get_memdesc(
-				kip_phys->memory_info.n++));
-    	current->set((memdesc_t::type_e)(plat_mem[i].type & 0xf),
-			(plat_mem[i].type>>4) & 0xf, false,
-			(addr_t)plat_mem[i].start,
-			(addr_t)(plat_mem[i].end-1));
-    }
-}
-
-/*
- * Setup the kernel page table and map the kernel and data areas.
- *
- * This function is entered with the MMU disabled and the code
- * running relocated in physical addresses. We setup the page
- * table and bootstrap ourselves into virtual mode/addresses.
- */
-extern "C" void SECTION(".init") init_memory(void) 
-{
-    extern char _end_init_memory[];
-    extern char kernel_space_object[];
-
-    word_t i;
-    addr_t start, end;
-    memdesc_t *current;
-    space_t * kspace_phys = (space_t *)virt_to_phys( kernel_space_object ); 
-    kernel_interface_page_t *kip_phys =
-	    (kernel_interface_page_t *)virt_to_phys( get_kip() );
-
-    /* Zero out the level 1 translation table */
-    for (i = 0; i < sizeof(space_t)/sizeof(word_t); ++i) 
-	((word_t*)kspace_phys)[i] = 0;
-
-    /* Calculate the area for the kernel to use as boot memory */
-    word_t bootmem_size = BOOTMEM_PAGES << PAGE_BITS_4K;
-    addr_t start_bootmem;
-    addr_t start_bootmem_phys = 0;
-
-    init_ram_descriptors(kip_phys);
-
-    /* Find a suitable spot for the bootmem */
-    for (i = 0; i < kip_phys->memory_info.get_num_descriptors(); i++) {
-	current = virt_to_phys(kip_phys->memory_info.get_memdesc(i));
-	if (current->type() == memdesc_t::conventional && current->size() >= bootmem_size) {
-	    /* Reserve the start of this spot */
-	    start_bootmem_phys = (void *)((word_t)current->high() - bootmem_size);
-	    break;
-	}
-    }
-
-    if (start_bootmem_phys == 0) {
-	while(1) ;
-    }
-
-    start_bootmem_phys = addr_align_up(start_bootmem_phys, ARM_PAGE_SIZE);
-
-    /* Get the bootmem addresses */
-    start_bootmem = phys_to_virt(start_bootmem_phys);
-    addr_t end_bootmem =	(addr_t)((word_t)start_bootmem + bootmem_size);
-    addr_t end_bootmem_phys =	(addr_t)virt_to_phys(end_bootmem);
-
-    /* The kernel can only map 64MB for kernel memory */
-    if (((word_t)end_bootmem - KERNEL_AREA_START) > 64*PAGE_SIZE_1M)
-	while(1);
-    if (((word_t)end_kernel - KERNEL_AREA_START) > 64*PAGE_SIZE_1M)
-	while(1);
-
-    /* Map the kernel area to its virtual address */
-    start = addr_align(virt_to_phys(start_text), PAGE_SIZE_1M);
-    end = virt_to_phys(end_kernel);
-
-    for (i = (word_t)start; i < (word_t)end; i += PAGE_SIZE_1M)
-    {
-	add_mapping_init( kspace_phys, (addr_t)phys_to_virt(i), (addr_t)i, false );
-    }
-
-    /* Map the kernel bootmem area if not covered by the kernel mapping */
-    if ((word_t)addr_align_up(end_bootmem_phys, PAGE_SIZE_1M) >
-		    (word_t)addr_align_up(end, PAGE_SIZE_1M))
-    {
-	start = addr_align(start_bootmem_phys, PAGE_SIZE_1M);
-
-	if ((word_t)start < (word_t)addr_align_up(end, PAGE_SIZE_1M))
-	    start = addr_align_up(end, PAGE_SIZE_1M);
-
-	end = end_bootmem_phys;
-
-	/* Map the kernel bootmem */
-	for (i = (word_t)start; i < (word_t)end; i += PAGE_SIZE_1M)
-	{
-	    add_mapping_init( kspace_phys, (addr_t)phys_to_virt(i), (addr_t)i, false );
-	}
-    }
-
-    /* Enable kernel domain (0) */
-    write_cp15_register(C15_domain, C15_CRm_default, C15_OP2_default, 0x0001);
-    /* Set the translation table base to use the kspace_phys */
-    write_cp15_register(C15_ttbase, C15_CRm_default, C15_OP2_default, kspace_phys);
-
-    /* Map the current code area 1:1 */
-    start = addr_align(virt_to_phys((addr_t)init_memory), PAGE_SIZE_1M);
-    end = virt_to_phys(_end_init_memory);
-    for (i = (word_t)start; i < (word_t)end; i += PAGE_SIZE_1M)
-    {
-	add_mapping_init( kspace_phys, (addr_t)i, (addr_t)i, false );
-    }
-
-    /* Map the kernel area to its uncached virtual address for the page table */
-    start = addr_align(virt_to_phys(start_text), PAGE_SIZE_1M);
-    end = virt_to_phys(end_kernel);
-    for (i = (word_t)start; i < (word_t)end; i += PAGE_SIZE_1M)
-    {
-	add_mapping_init( kspace_phys, (addr_t)phys_to_page_table(i), (addr_t)i, true );
-    }
-
-    /* Enable virtual memory, caching etc */
-    write_cp15_register(C15_control, C15_CRm_default,
-		    C15_OP2_default, C15_CONTROL_KERNEL);
-    CPWAIT;
-
-    /* Switch to virtual memory code and stack */
-    __asm__ __volatile__ (
-	"add	sp, sp,	%0		\n"
-	"mov	pc, %1			\n"
-	: : "r" (KERNEL_OFFSET), "r" (_end_init_memory)
-	: "r0", "memory"
-    );
-
-    __asm__ __volatile__ (
-	".global    _end_init_memory;	    \n"
-	"_end_init_memory:		    \n"
-    );
-
-    /* Initialise the kernel memory */
-    kmem.init(start_bootmem, end_bootmem);
-
-    /* Map the kernel bootmem area uncached if not covered by the kernel mapping */
-    if ((word_t)addr_align_up(end_bootmem_phys, PAGE_SIZE_1M) >
-		    (word_t)addr_align_up(end, PAGE_SIZE_1M))
-    {
-	start = addr_align(start_bootmem_phys, PAGE_SIZE_1M);
-
-	if ((word_t)start < (word_t)addr_align_up(end, PAGE_SIZE_1M))
-	    start = addr_align_up(end, PAGE_SIZE_1M);
-
-	end = end_bootmem_phys;
-
-	/* Map the kernel bootmem */
-	for (i = (word_t)start; i < (word_t)end; i += PAGE_SIZE_1M)
-	{
-	    get_kernel_space()->add_mapping( (addr_t)phys_to_page_table(i), (addr_t)i,
-			    pgent_t::size_1m, true, true, true );
-	}
-    }
-
-    /* Initialize CPU specific mappings */
-    init_cpu_mappings();
-
-    /* Allocate and map the UTCB reference page */
-    addr_t user_utcb_ref_phy = virt_to_phys(kmem.alloc(kmem_user_utcb_ref, 
-            PAGE_SIZE_4K));
-    arm_cache::cache_flush();
-
-    get_kernel_space()->add_mapping((addr_t)USER_UTCB_REF_PAGE, 
-            user_utcb_ref_phy, pgent_t::size_4k, false, false);
-
-    /* Reserve bootmem */
-    get_kip()->memory_info.insert(memdesc_t::reserved, false,
-		    start_bootmem_phys, end_bootmem_phys);
-
-    start = addr_align(virt_to_phys((addr_t)init_memory), PAGE_SIZE_1M);
-    end = virt_to_phys(_end_init_memory);
-
-    /* Remove 1:1 mapping */
-    for (i = (word_t)start; i < (word_t)end; i += PAGE_SIZE_1M)
-    {
-	get_kernel_space()->remove_mapping( (addr_t)i,
-			pgent_t::size_1m, true);
-    }
-
-    do {
-	__asm__ __volatile__ (
-	    "add	%0, %0, %1	\n"
-	    "mov	pc, %0		\n"
-	    :: "r" (__builtin_return_address(0)), "r" (KERNEL_OFFSET)
-	);
-    } while (1);
-}
-
-
-extern "C" void init_cpu(void);
-
-/**
- * Entry point from ASM into C kernel
- * Precondition: MMU and page tables are disabled
- * Warning: Do not use local variables in startup_system()
- */
-extern "C" void SECTION(".init") startup_system()
-{
-    /* Processor specific initialisation */
-    init_cpu();
-
-    /* Map the L4 kernel, enable virtual memory and setup bootmem */
-    init_memory();
-
-    /* Initialise the platform, map the console and other memory */
-    init_platform();
-
-    /* Initialise the L4 console */
-    init_console();
-    init_hello();
-
-    /* Setup the kernel address space */
-    init_kernel_space();
-
-    /* Prepare KIP */
-    init_kip();
-
-    /* Set up mapping database */
-    init_mdb ();
-
-    TRACE_INIT("Initialising kernel debugger...\n");
-    
-    /* initialize kernel debugger if any */
-    if (get_kip()->kdebug_init)
-	get_kip()->kdebug_init();
-    else
-	TRACE_INIT("No kernel debugger!\n\r");
-
-    /* Cconfigure IRQ hardware */
-    TRACE_INIT("Initialising interrupts...\n");
-    get_interrupt_ctrl()->init_arch();
-    get_interrupt_ctrl()->init_cpu();
-
-    TRACE_INIT("Initialising timer...\n");
-    /* initialize the kernel's timer source */
-    get_timer()->init_cpu();
- 
-    TRACE_INIT("Initialising scheduler...\n");
-    /* initialise the scheduler */
-    get_current_scheduler()->init();
-
-    /* get the thing going - we should never return */
-    get_current_scheduler()->start();
-
-    ASSERT(!"Scheduler start fell through!!!\n");
-    
-    /* make sure we don't fall off the edge */
-    spin_forever(1);
-}
diff --git a/kernel/src/glue/v4-arm/intctrl.cc b/kernel/src/glue/v4-arm/intctrl.cc
deleted file mode 100644
index 2503bb91..00000000
--- a/kernel/src/glue/v4-arm/intctrl.cc
+++ /dev/null
@@ -1,64 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/intctrl.cc
- * Description:   Implementation of interrupt control functionality 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.cc,v 1.9 2004/08/12 11:36:36 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_GLUE(intctrl.h)
-
-intctrl_t intctrl;
-word_t interrupt_handlers[IRQS];
-
-extern "C" void spurious_interrupt_handler(word_t irq,
-        arm_irq_context_t * frame)
-{
-    printf("L4 ARM: Spurious interrupt %d\n", irq);
-    enter_kdebug("Spurious interrupt");
-}
-
-extern "C" void intctrl_t_handle_irq(word_t irq, arm_irq_context_t * frame)
-{   
-    get_interrupt_ctrl()->mask(irq);
-    handle_interrupt(irq);
-}
-
-void intctrl_t::init_cpu()
-{
-    get_kernel_space()->add_mapping((addr_t)ARM_HIGH_VECTOR_VADDR,
-		(addr_t)virt_to_phys(&arm_high_vector),
-			pgent_t::size_4k, true, true);
-
-    disable_fiq();
-
-    for (int i = 0; i < IRQS; ++i)
-    {
-	mask(i);
-	register_interrupt_handler(i, intctrl_t_handle_irq);
-    }
-}
diff --git a/kernel/src/glue/v4-arm/intctrl.h b/kernel/src/glue/v4-arm/intctrl.h
deleted file mode 100644
index 690a0cb5..00000000
--- a/kernel/src/glue/v4-arm/intctrl.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.8 2004/09/30 08:58:13 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ARM__INTCTRL_H__
-#define __GLUE__V4_ARM__INTCTRL_H__
-
-#include <intctrl.h>
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(thread.h)
-#include INC_API(space.h)
-#include INC_PLAT(intctrl.h)
-
-/**
- * @return pointer to interrupt controller
- */
-INLINE intctrl_t * get_interrupt_ctrl() 
-{
-    extern intctrl_t intctrl;
-    return &intctrl;
-}
-
-#endif /* __GLUE__V4_ARM__INTCTRL_H__ */
diff --git a/kernel/src/glue/v4-arm/ktcb.h b/kernel/src/glue/v4-arm/ktcb.h
deleted file mode 100644
index 9bde68f7..00000000
--- a/kernel/src/glue/v4-arm/ktcb.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-arm/ktcb.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ktcb.h,v 1.2 2003/09/24 19:04:35 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ARM__KTCB_H__
-#define __GLUE__V4_ARM__KTCB_H__
-
-class arch_ktcb_t {
-};
-
-#endif /* __GLUE__V4_ARM__KTCB_H__ */
diff --git a/kernel/src/glue/v4-arm/map.h b/kernel/src/glue/v4-arm/map.h
deleted file mode 100644
index 4a6b7fb4..00000000
--- a/kernel/src/glue/v4-arm/map.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2005,  Karlsruhe University
- *                
- * File path:     glue/v4-arm/map.h
- * Description:   architecture specific mapping declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- * $Id: map.h,v 1.3 2005/05/19 08:39:47 stoess Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ARM__MAP_H__
-#define __GLUE__V4_ARM__MAP_H__
-
-#include INC_API(generic-archmap.h)
-
-#endif /* !__GLUE__V4_ARM__MAP_H__ */
diff --git a/kernel/src/glue/v4-arm/memcontrol.cc b/kernel/src/glue/v4-arm/memcontrol.cc
deleted file mode 100644
index c9b0dae9..00000000
--- a/kernel/src/glue/v4-arm/memcontrol.cc
+++ /dev/null
@@ -1,255 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-mips64/memcontrol.cc
- * Description:   Temporary memory_control implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: memcontrol.cc,v 1.10 2006/10/19 14:50:14 reichelt Exp $
- *                
- ********************************************************************/
-
-#include INC_API(config.h)
-#include INC_API(tcb.h)
-#include INC_API(thread.h)
-#include INC_API(fpage.h)
-#include INC_GLUE(syscalls.h)
-#include INC_API(syscalls.h)
-#include INC_CPU(cache.h)
-
-#include <kdb/tracepoints.h>
-
-DECLARE_TRACEPOINT(SYSCALL_MEMORY_CONTROL);
-
-enum attribute_e {
-    a_l4default		= 0,
-    a_uncached		= 1,
-    a_flush_i		= 29,
-    a_flush_d		= 30,
-    a_flush		= 31,
-};
-
-
-#include INC_ARCH(pgent.h)
-#include INC_API(space.h)
-#include INC_GLUE(space.h)
-#include <linear_ptab.h>
-
-
-/**
- * @param fpage		fpage to change
- * @param attrib	new fpage attributes
- *
- * @returns 
- */
-word_t attrib_fpage (tcb_t *current, fpage_t fpage, attribute_e attrib)
-{
-    pgent_t::pgsize_e size, pgsize;
-    pgent_t * pg;
-    addr_t vaddr;
-    word_t num;
-
-    pgent_t *r_pg[pgent_t::size_max];
-    word_t r_num[pgent_t::size_max];
-    space_t *space = current->get_space();
-
-    num = fpage.get_size_log2 ();
-    vaddr = address (fpage, num);
-
-    if (num < hw_pgshifts[0])
-    {
-	current->set_error_code(EINVALID_PARAM);  /* Invalid fpage */
-	return 1;
-    }
-
-    /*
-     * Some architectures may not support a complete virtual address
-     * space.  Enforce attrib to only cover the supported space.
-     */
-
-    if (num > hw_pgshifts[pgent_t::size_max+1])
-	num = hw_pgshifts[pgent_t::size_max+1];
-
-    /*
-     * Find pagesize to use, and number of pages to map.
-     */
-
-    for (pgsize = pgent_t::size_max; hw_pgshifts[pgsize] > num; pgsize--) {}
-
-    num = 1UL << (num - hw_pgshifts[pgsize]);
-    size = pgent_t::size_max;
-    pg = space->pgent (page_table_index (size, vaddr));
-
-    while (num)
-    {
-	if (! space->is_user_area (vaddr))
-	    /* Do not mess with kernel area. */
-	    break;
-
-	if (size > pgsize)
-	{
-	    /* We are operating on too large page sizes. */
-	    if (! pg->is_valid (space, size))
-		break;
-	    else if (pg->is_subtree (space, size))
-	    {
-		size--;
-		pg = pg->subtree (space, size+1)->next
-		    (space, size, page_table_index (size, vaddr));
-		continue;
-	    }
-	    else
-	    {
-		/* page is too large */
-		current->set_error_code(EINVALID_PARAM); /* Invalid fpage */
-		return 1;
-	    }
-	}
-
-	if (! pg->is_valid (space, size))
-	    goto Next_entry;
-
-	if (pg->is_subtree (space, size))
-	{
-	    /* We have to modify each single page in the subtree. */
-	    size--;
-	    r_pg[size] = pg;
-	    r_num[size] = num - 1;
-
-	    pg = pg->subtree (space, size+1);
-	    num = page_table_size (size);
-	    continue;
-	}
-
-	if (space->is_mappable (vaddr))
-	{
-	    space->flush_tlbent (space, vaddr, page_shift (size));
-
-	    switch (attrib)
-	    {
-	    case a_l4default: 
-                pg->update_cacheable(space, pgsize, true);
-                break;
-	    case a_uncached:
-                pg->update_cacheable(space, pgsize, false);
-                break;
-	    case a_flush_i:
-                arm_cache::flush_icache_ent(vaddr, page_shift (size));
-		break;
-	    case a_flush_d:
-                arm_cache::flush_dcache_ent(vaddr, page_shift (size));
-		break;
-	    case a_flush:
-                arm_cache::flush_ent(vaddr, page_shift (size));
-		break;
-	    default:
-		/* invalid attribute */
-		current->set_error_code(EINVALID_PARAM);  /* Invalid attribute */
-		return 1;
-	    }
-	}
-
-    Next_entry:
-
-	pg = pg->next (space, size, 1);
-	vaddr = addr_offset (vaddr, page_size (size));
-	num--;
-    }
-
-    return 0;
-}
-
-SYS_MEMORY_CONTROL (word_t control, word_t attribute0, word_t attribute1,
-		    word_t attribute2, word_t attribute3)
-{
-    tcb_t * current = get_current_tcb();
-    space_t *space = current->get_space();
-    word_t fp_idx, att;
-
-    TRACEPOINT (SYSCALL_MEMORY_CONTROL, 
-		printf ("SYSCALL_MEMORY_CONTROL: current=%p control=%lx, attribute0=%lx, "
-			"attribute1=%lx, attribute2=%lx, attribute3=%lx\n",
-			current, control, attribute0, attribute1, attribute2,
-    			attribute3));
-
-    // flush cpu cache
-    if (control == -2UL)
-    {
-        arm_cache::cache_flush();
-	return_memory_control(1);
-    }
-
-    if (control >= IPC_NUM_MR)
-    {
-	current->set_error_code(EINVALID_PARAM);  /* Invalid parameter */
-	return_memory_control(0);
-    }
-
-    for (fp_idx = 0; fp_idx <= control; fp_idx++)
-    {
-	fpage_t fpage;
-	addr_t addr;
-	pgent_t * pg;
-	pgent_t::pgsize_e pgsize;
-
-	fpage.raw = current->get_mr(fp_idx);
-
-	/* nil pages act as a no-op */
-	if (fpage.is_nil_fpage() )
-	    continue;
-
-	switch(fpage.raw & 0x3)
-	{
-	    case 0: att = attribute0; break;
-	    case 1: att = attribute1; break;
-	    case 2: att = attribute2; break;
-	    default: att = attribute3; break;
-	}
-
-	// invalid request - thread not privileged
-	if (!is_privileged_space(get_current_space()) && (att < 28))
-	{
-	    current->set_error_code(ENO_PRIVILEGE); /* No priviledge */
-	    return_memory_control(0);
-	}
-
-	addr = address (fpage, fpage.get_size_log2 ());
-	// Check if mapping exist in page table
-	if (!space->lookup_mapping (addr, &pg, &pgsize))
-	{
-	    if (!is_sigma0_space(current->get_space()))
-	    {
-		current->set_error_code(ENO_PRIVILEGE);  /* No priviledge */
-		return_memory_control(0);
-	    }
-
-	    space->map_sigma0(addr);
-	}
-
-	if (attrib_fpage(current, fpage, (attribute_e)att))
-	    return_memory_control(0);
-    }
-
-    return_memory_control(1);
-}
diff --git a/kernel/src/glue/v4-arm/memory.h b/kernel/src/glue/v4-arm/memory.h
deleted file mode 100644
index d710914c..00000000
--- a/kernel/src/glue/v4-arm/memory.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/memory.h
- * Description:   ARM memory defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: memory.h,v 1.5 2004/06/17 01:54:49 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ARM__MEMORY_H__
-#define __GLUE__V4_ARM__MEMORY_H__
-
-/*
- * Symbols defined by linker script.
- */
-
-/* Kernel code and data */
-extern char _start_text[];
-extern char _start_data[];
-extern char _end_kip[];
-extern char _end_text[];
-extern char _end[];
-
-/*
- * Wrapper macros to access linker symbols.
- */
-
-#define start_text		((addr_t) _start_text)
-#define start_data		((addr_t) _start_data)
-#define end_text		((addr_t) _end_text)
-#define end_kip			((addr_t) _end_kip)
-#define end_kernel		((addr_t) _end)
-
-#endif /* __GLUE__V4_ARM__MEMORY_H__ */
diff --git a/kernel/src/glue/v4-arm/resource_functions.h b/kernel/src/glue/v4-arm/resource_functions.h
deleted file mode 100644
index c3e1f9f6..00000000
--- a/kernel/src/glue/v4-arm/resource_functions.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     glue/v4-arm/resource_functions.h
- * Description:
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: resource_functions.h,v 1.9 2004/09/30 08:58:13 cvansch Exp $
- *
- ********************************************************************/
-
-
-#ifndef __GLUE__V4_ARM__RESOURCE_FUNCTIONS_H__
-#define __GLUE__V4_ARM__RESOURCE_FUNCTIONS_H__
-
-#include INC_GLUE(resources.h)
-#include INC_API(tcb.h)
-
-/* FIXME - this is a naieve implementation of string IPC - it requires
- * the flushing of the data cache prior to the data cache synonym creation,
- * and after the operation completes. When using FASS, it is possible to
- * make this much more efficient, by doing a direct copy between the
- * address spaces when the source/destination sections are disjoint. With
- * non-FASS we can delay the flush until context switch.
- */
-
-INLINE void thread_resources_t::sync_copy_area(tcb_t *tcb, tcb_t *partner)
-{
-    unsigned int i, start_section = copy_dest_base >> 20;
-
-    arm_cache::cache_flush();
-
-    for (i = 0; i < COPY_AREA_BLOCK_SECTIONS; ++i) {
-#ifdef CONFIG_ENABLE_FASS
-        cpd->pt.pd_split.copy_area[i] =
-                virt_to_page_table(partner->get_space())->pt.pdir[start_section
-                        + i];
-
-#else
-        virt_to_page_table(tcb->get_space())->pt.pd_split.copy_area[i] =
-                virt_to_page_table(partner->get_space())->pt.pdir[start_section
-                        + i];
-#endif
-    }
-}
-
-/**
- * Enable a copy area.  
- *
- * @param tcb                   TCB of current thread
- * @param partner               TCB of partner thread
- * @param addr                  address within destination space
- *
- * @return an address into the copy area where kernel should perform
- * the IPC copy.
- */
-INLINE addr_t thread_resources_t::enable_copy_area(tcb_t *tcb, tcb_t *partner,
-        addr_t addr)
-{
-    unsigned int start_section = (word_t)addr >> 20;
-
-    tcb->resource_bits += COPY_AREA; 
-
-    copy_dest_base = start_section << 20;
-
-    sync_copy_area(tcb, partner);
-
-    return addr_offset((addr_t)COPY_AREA_START, 
-            (word_t) addr & (ARM_SECTION_SIZE - 1));
-}
-
-/**
- * Release all copy areas.
- *
- * @param tcb                   TCB of current thread
- * @param disable_copyarea      should copy area resource be disabled or not
- */
-INLINE void thread_resources_t::release_copy_area (tcb_t *tcb,
-                                                   bool disable_copyarea)
-{
-    if (tcb->resource_bits.have_resource(COPY_AREA)) {
-        unsigned int i;
-
-        arm_cache::cache_flush(); 
-
-        for (i = 0; i < COPY_AREA_BLOCK_SECTIONS; ++i) {
-#ifdef CONFIG_ENABLE_FASS
-            cpd->pt.pd_split.copy_area[i].raw = 0;
-#else
-            virt_to_page_table(tcb->get_space())->pt.pd_split.copy_area[i].raw = 0;
-#endif
-        }
-
-        arm_cache::tlb_flush();
-    
-        if (disable_copyarea)
-            tcb->resource_bits -= COPY_AREA;
-    }
-}
-
-INLINE addr_t thread_resources_t::copy_area_real_address(addr_t addr)
-{
-    return (addr_t)((word_t)addr - COPY_AREA_START + copy_dest_base);
-}
-
-
-/**
- * Mark the thread as being in a kernel IPC
- *
- * @param tcb			current TCB
- */
-INLINE void thread_resources_t::set_kernel_ipc (tcb_t * tcb)
-{
-    tcb->resource_bits += KIPC;
-}
-
-
-/**
- * Clear the kernel IPC bit
- *
- * @param tcb			current TCB
- */
-INLINE void thread_resources_t::clear_kernel_ipc (tcb_t * tcb)
-{
-    tcb->resource_bits -= KIPC;
-}
-
-
-#endif /* __GLUE__V4_ARM__RESOURCE_FUNCTIONS_H__ */
diff --git a/kernel/src/glue/v4-arm/resources.cc b/kernel/src/glue/v4-arm/resources.cc
deleted file mode 100644
index 53442628..00000000
--- a/kernel/src/glue/v4-arm/resources.cc
+++ /dev/null
@@ -1,76 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     glue/v4-arm/resource.cc
- * Description:   ARM copy area resource
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: resources.cc,v 1.4 2004/06/09 09:52:50 htuch Exp $
- *
- ********************************************************************/
-
-#include INC_API(tcb.h)
-#include INC_GLUE(resource_functions.h)
-#include <debug.h>
-
-void thread_resources_t::save(tcb_t * tcb)
-{
-    if (tcb->resource_bits.have_resource(COPY_AREA))
-        release_copy_area(tcb, false);
-}
-
-void thread_resources_t::load(tcb_t * tcb)
-{
-    if (tcb->resource_bits.have_resource(COPY_AREA)) {
-        // If we had a nested pagefault, the saved partner will be our
-        // real communication partner.  For other types of IPC copy
-        // interruptions, the saved_partner will be nil.
-        threadid_t ptid = tcb->get_saved_partner ().is_nilthread () ?
-            tcb->get_partner () : tcb->get_saved_partner ();
-        tcb_t *partner = tcb->get_space ()->get_tcb (ptid);
-
-        sync_copy_area(tcb, partner);
-    }
-}
-   
-void thread_resources_t::purge(tcb_t * tcb)
-{
-    UNIMPLEMENTED();
-}
-
-void thread_resources_t::init(tcb_t * tcb)
-{
-    ASSERT(tcb);
-
-    tcb->resource_bits.init ();
-}
-
-void thread_resources_t::free(tcb_t * tcb)
-{
-    ASSERT(tcb);
-
-    if (tcb->resource_bits.have_resource(COPY_AREA))
-        release_copy_area(tcb, false);
-}
-
diff --git a/kernel/src/glue/v4-arm/resources.h b/kernel/src/glue/v4-arm/resources.h
deleted file mode 100644
index 74add5f8..00000000
--- a/kernel/src/glue/v4-arm/resources.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/resources.h
- * Description:   Resource bit definitions for arm
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.h,v 1.7 2004/09/30 08:58:13 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ARM__RESOURCES_H__
-#define __GLUE__V4_ARM__RESOURCES_H__
-
-#include INC_API(resources.h)
-
-#define HAVE_RESOURCE_TYPE_E
-enum resource_type_e {
-    COPY_AREA	= 0,
-    KIPC = 1,
-};
-
-
-class thread_resources_t : public generic_thread_resources_t
-{
-public:
-    void save(tcb_t * tcb);
-    void load(tcb_t * tcb);
-    void purge(tcb_t * tcb);
-    void init(tcb_t * tcb);
-    void free(tcb_t * tcb);
-
-    addr_t enable_copy_area (tcb_t * tcb, tcb_t * partner, addr_t addr);
-    void release_copy_area (tcb_t * tcb, bool disable_copyarea);
-    addr_t copy_area_real_address(addr_t addr);
-
-    void set_kernel_ipc(tcb_t * tcb);
-    void clear_kernel_ipc(tcb_t * tcb);
-
-private:
-    void sync_copy_area(tcb_t *tcb, tcb_t *partner);
-    unsigned int copy_dest_base;
-};
-
-
-#endif /* !__GLUE__V4_ARM__RESOURCES_H__ */
diff --git a/kernel/src/glue/v4-arm/schedule.h b/kernel/src/glue/v4-arm/schedule.h
deleted file mode 100644
index 84c4278e..00000000
--- a/kernel/src/glue/v4-arm/schedule.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/schedule.h
- * Description:
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: schedule.h,v 1.9 2004/06/04 02:26:52 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_ARM__SCHEDULE_H__
-#define __GLUE__V4_ARM__SCHEDULE_H__
-
-#include INC_GLUE(config.h)
-#include INC_CPU(cpu.h)
-
-/**
- * @todo document me
- */
-INLINE u64_t get_timer_tick_length()
-{
-    return TIMER_TICK_LENGTH;
-}
-
-
-/**
- * D_RETURN_(3);
- * send the current processor to sleep
- */
-INLINE void processor_sleep()
-{
-    arm_cpu::sti();
-    arm_cpu::sleep();
-    arm_cpu::cli();
-}
-
-#endif /* __GLUE__V4_ARM__SCHEDULE_H__ */
diff --git a/kernel/src/glue/v4-arm/space.cc b/kernel/src/glue/v4-arm/space.cc
deleted file mode 100644
index 63f575c4..00000000
--- a/kernel/src/glue/v4-arm/space.cc
+++ /dev/null
@@ -1,404 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:	glue/v4-arm/space.cc
- * Description:	ARM space_t implementation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: space.cc,v 1.26 2006/11/17 17:14:30 skoglund Exp $
- *
- ***************************************************************************/
-
-#include <debug.h>			/* for UNIMPLEMENTED	*/
-#include <linear_ptab.h>
-#include INC_API(space.h)		/* space_t		*/
-#include INC_API(tcb.h)
-#include INC_ARCH(pgent.h)
-#include INC_API(kernelinterface.h)
-#include INC_GLUE(memory.h)
-#include INC_GLUE(config.h)
-#include INC_ARCH(fass.h)
-#include INC_CPU(syscon.h)
-
-DECLARE_KMEM_GROUP(kmem_utcb);
-DECLARE_KMEM_GROUP(kmem_tcb);
-EXTERN_KMEM_GROUP (kmem_space);
-
-tcb_t * dummy_tcb = NULL;
-
-/* The kernel space is statically defined beause it is needed
- * before the virtual memory has been setup or the kernel
- * memory allocator.
- */
-char UNIT("kspace") kernel_space_object[sizeof(space_t)] __attribute__((aligned(ARM_L1_SIZE)));
-
-space_t *kernel_space = (space_t*)((word_t)&kernel_space_object);
-
-#ifdef CONFIG_ENABLE_FASS
-space_t *cpd;
-#endif
-
-void SECTION(".init") init_kernel_space()
-{
-    TRACE_INIT("Initialising kernel space @ %p...\n\r", kernel_space);
-
-    kernel_space->init_kernel_mappings();
-
-    dummy_tcb = (tcb_t *)kmem.alloc(kmem_tcb, KTCB_SIZE);
- 
-#ifdef CONFIG_ENABLE_FASS
-    cpd = (space_t *)virt_to_page_table(kernel_space);
-    arm_fass.init();
-#endif 
-}
-
-/**
- * initialize THE kernel space
- * @see get_kernel_space()
- */
-void SECTION(".init") space_t::init_kernel_mappings()
-{
-    /* Kernel space's mappings already setup in initial root page table */
-}
-
-/**
- * initialize a space
- *
- * @param utcb_area	fpage describing location of UTCB area
- * @param kip_area	fpage describing location of KIP
- */
-void space_t::init (fpage_t utcb_area, fpage_t kip_area)
-{
-    word_t i;
-    pgent_t *pg_to = pgent(USER_AREA_SECTIONS);
-    pgent_t *pg_from = get_kernel_space()->pgent(USER_AREA_SECTIONS);
-
-    for (i=0; i < (KTCB_AREA_SECTIONS); i++)
-	*pg_to++ = *pg_from++;
-    for (i=0; i < (KERNEL_AREA_SECTIONS); i++)
-	*pg_to++ = *pg_from++;
-    for (i=0; i < (UNCACHE_AREA_SECTIONS); i++)
-	*pg_to++ = *pg_from++;
-    for (i=0; i < (COPY_AREA_SECTIONS); i++)
-	*pg_to++ = *pg_from++;
-
-    pg_to += VAR_AREA_SECTIONS;
-    pg_from += VAR_AREA_SECTIONS;
-
-    for (i=0; i < (IO_AREA_SECTIONS); i++)
-	*pg_to++ = *pg_from++;
-    for (i=0; i < (MISC_AREA_SECTIONS); i++)
-	*pg_to++ = *pg_from++;
-
-    *pg_to = *pg_from;	/* high_int_vector */
-
-#ifdef CONFIG_ENABLE_FASS
-    set_domain(INVALID_DOMAIN);
-#endif 
-
-    utcb_area.mem.x.execute = utcb_area.mem.x.write = 0;
-    kip_area.mem.x.execute = kip_area.mem.x.write = 0;
-    pt.pd_split.utcb_area = utcb_area;
-    pt.pd_split.kip_area = kip_area;
-
-    /* Map the kip (user read only) */
-    add_mapping(kip_area.get_base(), 
-            virt_to_phys((addr_t) get_kip()), KIP_KIP_PGSIZE, false, false);
-}
-
-/**
- * Release mappings that belong to the kernel (UTCB, KIP)
- * @param vaddr		virtual address in the space
- * @param paddr		physical address the mapping refers to
- * @param log2size	log2(size of mapping)
- */
-void space_t::release_kernel_mapping (addr_t vaddr, addr_t paddr,
-				      word_t log2size)
-{
-    /* Free up memory used for UTCBs */
-    if (get_utcb_page_area ().is_addr_in_fpage (vaddr))
-	kmem.free (kmem_utcb, phys_to_virt (paddr), 1UL << log2size);
-}
-
-/**
- * Allocate a UTCB
- * @param tcb   Owner of the utcb
- */
-utcb_t * space_t::allocate_utcb(tcb_t * tcb) 
-{
-    ASSERT (tcb);
-    addr_t utcb = (addr_t) tcb->get_utcb_location ();
-
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-
-    if (lookup_mapping ((addr_t) utcb, &pg, &pgsize))
-    {
-	addr_t kaddr = addr_mask (pg->address(this, pgsize),
-			~page_mask (pgsize));
-	return (utcb_t *) phys_to_virt
-	    (addr_offset (kaddr, (word_t) utcb & page_mask (pgsize)));
-    }
-
-    addr_t page = kmem.alloc (kmem_utcb, page_size (UTCB_AREA_PGSIZE)); 
-    arm_cache::flush_dcache_ent(page, PAGE_BITS_4K);
-
-    add_mapping((addr_t) utcb, virt_to_phys(page),
-		UTCB_AREA_PGSIZE, true, false);
-
-    return (utcb_t *)
-	addr_offset (page, addr_mask (utcb, page_size (UTCB_AREA_PGSIZE) - 1));
-}
-
-/**
- * establish a mapping in sigma0's space
- * @param addr	the fault address in sigma0
- *
- * This function should install a mapping that allows sigma0 to make
- * progress. Sigma0's space is available as this.
- */
-
-void space_t::map_sigma0(addr_t addr)
-{
-    add_mapping(addr, addr, pgent_t::size_4k, true, false);
-}
-
-/**
- * Try to copy a mapping from kernel space into the current space
- * @param addr the address for which the mapping should be copied
- * @return true if something was copied, false otherwise.
- * Synchronization must happen at the highest level, allowing sharing.
- */
-bool space_t::sync_kernel_space(addr_t addr)
-{
-    /* We set everything up at initialisation time */
-    return false;
-}
-
-/**
- * Install a dummy TCB
- * @param addr	address where the dummy TCB should be installed
- *
- * The dummy TCB must be read-only and fail all validity tests.
- */
-void space_t::map_dummy_tcb (addr_t addr)
-{
-    kernel_space->add_mapping(addr, virt_to_phys((addr_t)dummy_tcb),
-		    KTCB_PGSIZE, false, true);
-}
-
-/**
- * Map memory usable for TCB
- * @param addr address of the TCB that should be made usable
- *
- * This function is called when a TCB should be made usable the first
- * time. Usually, this happens when a) no page is mapped at the TCB
- * address at all, or b) a read-only page is mapped and now a write
- * access to the TCB occured.
- *
- * @see space_t::map_dummy_tcb
- */
-void space_t::allocate_tcb(addr_t addr)
-{
-    addr_t page = kmem.alloc(kmem_tcb, KTCB_SIZE);
-//    arm_cache::flush_dcache_ent(page, KTCB_BITS);
-    arm_cache::flush_dcache_ent(page, KTCB_BITS*2);
-
-    kernel_space->add_mapping(addr, virt_to_phys(page), KTCB_PGSIZE, true, 
-            true);
-}
-
-/**
- * Translate a user accessible UTCB address to a kernel accessible one
- * @param utcb	user accessible address of UTCB
- * @returns kernel accessible address of UTCB
- *
- * The returned address must be accessible in the current address
- * space. This is required for checking values in the UTCB of a thread
- * in a different address space.
- */
-utcb_t * space_t::utcb_to_kernel_space(utcb_t * utcb)
-{
-    /* (ht) appears unused */
-    UNIMPLEMENTED();
-
-#if 0
-    pgent_t::pgsize_e pgsize;
-    pgent_t *pg;
-
-    if (!lookup_mapping((addr_t) utcb, &pg, &pgsize))
-    {
-        return NULL;
-    }
-
-    return (utcb_t *) (((word_t) utcb & ARM_SMALL_MASK) + 
-            (word_t) phys_to_virt(pg->address(this, pgsize)));
-#endif
-}
-
-/**
- * reads a word from a given physical address, uses a remap window and
- * maps a 4MB page for the access
- *
- * @param paddr		physical address to read from
- * @return the value at the given address
- */
-word_t space_t::readmem_phys (addr_t paddr)
-{
-    /* XXX this needs to be optimized */
-    word_t data;
-
-    space_t *space = (space_t *)read_cp15_register(C15_ttbase,
-				C15_CRm_default, C15_OP2_default);
-    space = phys_to_virt(space);
-
-    arm_cache::cache_flush(); /* Only really used in kdb afaict */
-
-    space->add_mapping((addr_t) PHYSMAPPING_VADDR,
-		    (addr_t)((word_t)paddr & (~(PAGE_SIZE_1M-1))),
-		    pgent_t::size_1m, false, true, true);
-
-    data = *(word_t*)(PHYSMAPPING_VADDR + ((word_t)paddr & (PAGE_SIZE_1M-1)));
-
-    space->remove_mapping((addr_t) PHYSMAPPING_VADDR, pgent_t::size_1m, true);
-
-    return data;
-}
-
-void space_t::add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size,
-                bool writeable, bool kernel, bool uncached)
-{
-    pgent_t::pgsize_e pgsize = pgent_t::size_max;
-    pgent_t *pg = this->pgent(page_table_index(pgsize, vaddr));
-
-    //TRACEF("vaddr = %p paddr = %p %d\n", vaddr, paddr, size);
-
-    if (!is_page_size_valid(size)) 
-    {
-        enter_kdebug("invalid page size");
-        return;
-    }
-
-    while (pgsize > size)
-    {
-        if (pg->is_valid(this, pgsize))
-        {
-            if (!pg->is_subtree(this, pgsize))
-            {
-                ASSERT(!"mapping exists");
-                enter_kdebug("mapping exists");
-                return;
-            }
-        }
-        else {
-                pg->make_subtree(this, pgsize, kernel);
-        }
-
-        pg = pg->subtree(this, pgsize)->next(this, pgsize-1, 
-                page_table_index(pgsize-1, vaddr));
-
-        pgsize--;
-    }
-
-    pg->set_entry(this, pgsize, paddr, writable ? 7 : 5,
-		  uncached ? 1 : 0, kernel);
-
-    flush_tlbent(this, vaddr, page_shift(size));
-}
-
-void space_t::remove_mapping(addr_t vaddr, pgent_t::pgsize_e size, bool kernel)
-{
-    pgent_t::pgsize_e pgsize = pgent_t::size_max;
-    pgent_t *pg = this->pgent(page_table_index(pgsize, vaddr));
-
-    if (!is_page_size_valid(size)) 
-    {
-        enter_kdebug("invalid page size");
-        return;
-    }
-
-    while (pgsize > size)
-    {
-        if (pg->is_valid(this, pgsize))
-        {
-            if (!pg->is_subtree(this, pgsize))
-            {
-                ASSERT(!"mapping >size exists");
-                enter_kdebug("larger mapping exists");
-                return;
-            }
-        }
-        else {
-	    ASSERT(!"mapping not present");
-        }
-
-        pg = pg->subtree(this, pgsize)->next(this, pgsize-1, 
-                page_table_index(pgsize-1, vaddr));
-
-        pgsize--;
-    }
-
-    pg->clear(this, pgsize, kernel);
-
-    flush_tlbent(this, vaddr, page_shift(size));
-}
-
-space_t * allocate_space()
-{
-    space_t * space = (space_t*)kmem.alloc(kmem_space, sizeof(space_t));
-
-    if (!space)
-	return NULL;
- 
-    /* kmem.alloc zeros out the page, in cached memory. Since we'll be using
-     * this for uncached accesses, need to flush this out now.
-     */
-    arm_cache::flush_dcache_ent(space, ARM_SECTION_BITS+2);
-
-    return space;
-}
-
-void free_space(space_t * space)
-{
-    ASSERT(space);
-
-#ifdef CONFIG_ENABLE_FASS
-    if (space->get_domain() != INVALID_DOMAIN)
-        arm_fass.set_space(space->get_domain(), NULL);
-#endif
-    /* srXXX: This function does not exist (any more?). */
-    //space->dequeue_spaces();
-
-    kmem.free(kmem_space, (addr_t)space, sizeof(space_t));
-}
-
-void space_t::flush_tlb(space_t *curspace)
-{
-    arm_cache::tlb_flush();
-}
-
-void space_t::flush_tlbent(space_t *curspace, addr_t vaddr, word_t log2size)
-{
-    arm_cache::tlb_flush_ent(vaddr, log2size);
-}
diff --git a/kernel/src/glue/v4-arm/space.h b/kernel/src/glue/v4-arm/space.h
deleted file mode 100644
index c2ba033e..00000000
--- a/kernel/src/glue/v4-arm/space.h
+++ /dev/null
@@ -1,341 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:	glue/v4-arm/space.h
- * Description:	ARM specific space implementation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: space.h,v 1.21 2006/10/20 19:04:15 reichelt Exp $
- *
- ***************************************************************************/
-
-#ifndef __GLUE__V4_ARM__SPACE_H
-#define __GLUE__V4_ARM__SPACE_H
-
-#include INC_API(fpage.h)			/* fpage_t	*/
-#include INC_API(thread.h)			/* threadid_t	*/
-#include INC_ARCH(fass.h)
-#include INC_ARCH(pgent.h)
-#include INC_CPU(cache.h)
-#include INC_GLUE(config.h)
-
-/* forward declarations - space_t depends on tcb_t and utcb_t */
-class tcb_t;
-class utcb_t;
-
-/**
- * The address space representation
- */
-class space_t {
-public:
-    /* TCB management */
-    void allocate_tcb(addr_t addr);
-    void map_dummy_tcb(addr_t addr);
-    utcb_t * allocate_utcb(tcb_t * tcb);
-
-    tcb_t * get_tcb(threadid_t tid);
-    tcb_t * get_tcb(void *ptr);
-
-    /* Address ranges */
-    bool is_user_area(addr_t);
-    bool is_user_area(fpage_t);
-    bool is_tcb_area(addr_t addr);
-    bool is_mappable(addr_t addr);
-    bool is_mappable(fpage_t);
-    bool is_arch_mappable(addr_t addr, size_t size) { return true; }
-
-    /* Copy area related methods */
-    bool is_copy_area (addr_t addr);
-    word_t get_copy_limit (addr_t addr, word_t limit);
-
-    /* kip and utcb handling */
-    fpage_t get_kip_page_area();
-    fpage_t get_utcb_page_area();
-
-    /* reference counting */
-    void add_tcb(tcb_t * tcb);
-    bool remove_tcb(tcb_t * tcb);
-
-    /* space control */
-    word_t space_control (word_t ctrl) { 
-#ifdef CONFIG_ENABLE_FASS
-        set_pid((ctrl & 0xe) << 25); /* Only 7 LSBs significant for PID */ 
-#endif
-        return 0; 
-    }
-
-    /* space update hooks */
-    static void begin_update (void) {}
-    static void end_update (void) {}
-
-    bool is_initialized();
-
-    void map_fpage(fpage_t snd_fp, word_t base, space_t * t_space, 
-            fpage_t rcv_fp, bool grant);
-    fpage_t unmap_fpage(fpage_t fpage, bool flush, bool unmap_all);
-    void init(fpage_t utcb_area, fpage_t kip_area);
-    void free();
-
-    enum access_e {
-	read = 0,
-	write = 1,
-	readwrite = -1,
-	execute = 2
-    };
-
-    void handle_pagefault(addr_t addr, addr_t ip, access_e access, bool kernel);
-    void map_sigma0(addr_t addr);
-    bool sync_kernel_space(addr_t addr);
-    utcb_t * utcb_to_kernel_space(utcb_t * utcb);
-
-    /* Methods needed by linear page table walker. */
-    pgent_t * pgent (word_t num, word_t cpu = 0);
-    bool lookup_mapping (addr_t vaddr, pgent_t ** pg,
-			 pgent_t::pgsize_e * size);
-    bool readmem (addr_t vaddr, word_t * contents);
-    word_t readmem_phys (addr_t paddr);
-
-    void release_kernel_mapping (addr_t vaddr, addr_t paddr, word_t log2size);
-
-    void init_kernel_mappings(void);
-
-    void add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size,
-            bool writeable, bool kernel, bool uncached);
-
-    inline void add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size,
-            bool writeable, bool kernel)
-    {
-	add_mapping(vaddr, paddr, size, writeable, kernel, false);
-    }
-
-    void remove_mapping(addr_t vaddr, pgent_t::pgsize_e size,
-	    bool kernel);
-
-    /* TLB releated methods used by linear page table walker. */
-    void flush_tlb (space_t * curspace);
-    void flush_tlbent (space_t * curspace, addr_t vaddr, word_t log2size);
-    inline bool does_tlbflush_pay(word_t log2size)
-    { return true; }    
-
-#ifdef CONFIG_ENABLE_FASS
-    arm_domain_t get_domain(void);
-    void set_domain(arm_domain_t new_domain);
-    arm_pid_t get_pid(void); 
-    void set_pid(arm_pid_t pid);
-#endif
-
-    union pt_u {
-	/* Pagetable is 2x because MDB linknodes after the page table */
-	struct {
-	    pgent_t pdir  [1 << ARM_SECTION_BITS];
-	    /* FIXME - should MDB linknodes be cached? */
-	    pgent_t lnodes[1 << ARM_SECTION_BITS];
-	};
-	struct {
-	    pgent_t user_area[USER_AREA_SECTIONS];
-	    pgent_t ktcb_area[KTCB_AREA_SECTIONS];
-	    pgent_t kernel_area[KERNEL_AREA_SECTIONS];
-	    pgent_t uncache_area[UNCACHE_AREA_SECTIONS];
-	    pgent_t copy_area[COPY_AREA_SECTIONS];
-
-	    /* Should be cache aligned here */
-
-	    /* (ht) This is tricky - potentially a security problem.
-	     * All of these variables _must_ have their lower two bits
-	     * set to 00, since that will give a fault. 
-	     */
-	    arm_domain_t domain;
-	    word_t pid;
-	    tcb_t *threads;    // tcb & will be word aligned at least
-	    fpage_t utcb_area; // assume only modified in space_t::init
-	    fpage_t kip_area;  // assume only modified in space_t::init
-	    word_t thread_count;
-	    pgent_t var_area[VAR_AREA_SECTIONS - 6];
-
-	    pgent_t io_area[IO_AREA_SECTIONS];
-	    pgent_t misc_area[MISC_AREA_SECTIONS];
-	    pgent_t high_int_vector;
-        } pd_split;
-    } pt;
-};
-
-#ifdef CONFIG_ENABLE_FASS
-    INLINE arm_domain_t space_t::get_domain(void)
-    {
-        return this->pt.pd_split.domain >> 2;
-    }
-
-    INLINE void space_t::set_domain(arm_domain_t new_domain)
-    {
-        this->pt.pd_split.domain = new_domain << 2;
-    }
-
-    INLINE arm_pid_t space_t::get_pid(void)
-    {
-        return this->pt.pd_split.pid;
-    }
-
-    INLINE void space_t::set_pid(arm_pid_t new_pid)
-    {
-        this->pt.pd_split.pid = new_pid;
-    }
-#endif
-
-INLINE pgent_t *space_t::pgent(word_t num, word_t cpu) 
-{
-    return (pgent_t*)virt_to_page_table(&(pt.pdir[num]));
-}
-
-/**
- * get the KIP area of an address space
- * @returns the KIP area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_kip_page_area (void)
-{
-    return pt.pd_split.kip_area; 
-}
-
-/**
- * get the UTCB area of an address space
- * @returns the utcb area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_utcb_page_area (void)
-{
-    return pt.pd_split.utcb_area;
-}
-
-INLINE bool space_t::is_user_area (addr_t addr)
-{
-    return ((word_t)addr < USER_AREA_END);
-}
-
-/* KTCB Area */
-INLINE bool space_t::is_tcb_area (addr_t addr)
-{
-    return ((word_t)addr >= KTCB_AREA_START && (word_t)addr < KTCB_AREA_END);
-}
-
-
-/**
- * Check whether address resides within copy area.
- *
- * @param addr			address to check against
- *
- * @return true if address is within copy area; false otherwise
- */
-INLINE bool space_t::is_copy_area (addr_t addr)
-{
-    return ((word_t)addr >= COPY_AREA_START && (word_t)addr < COPY_AREA_END);
-}
-
-/**
- * Get the limit of an IPC copy operation (e.g., copy from operation
- * is not allowed to go beyond the boundaries of the user area).
- *
- * @param addr			address to copy from/to
- * @param limit			intended copy size
- *
- * @return limit clipped to the allowed copy size
- */
-INLINE word_t space_t::get_copy_limit (addr_t addr, word_t limit)
-{
-    word_t end = (word_t) addr + limit;
-
-    if (is_user_area (addr)) {
-        // Address in user area.  Do not go beyond user-area boundary.
-        if (end >= USER_AREA_END)
-            return (USER_AREA_END - (word_t) addr);
-    } else {
-        // Address in copy-area.  Make sure that we do not go beyond
-        // the boundary of current copy area.
-        ASSERT (is_copy_area (addr));
-        if (addr_align (addr, COPY_AREA_BLOCK_SIZE) !=
-                addr_align ((addr_t) end, COPY_AREA_BLOCK_SIZE)) {
-            return (word_t) addr_align_up (addr, COPY_AREA_BLOCK_SIZE) -
-                    (word_t) addr;
-        }
-    }
-
-    return limit;
-}
-
-/* May as well return kernel space since mappings should be identical for
- * the kernel area as in the each of the user's address spaces. 
- */
-
-INLINE space_t* get_kernel_space()
-{
-    extern space_t * kernel_space;
-    return kernel_space;
-}
-
-
-/**
- * translates a global thread ID into a valid tcb pointer
- * @param tid thread ID
- * @returns pointer to the TCB of thread tid
- */
-INLINE tcb_t * space_t::get_tcb( threadid_t tid )
-{
-    return (tcb_t*)((KTCB_AREA_START) +
-		    ((tid.get_threadno() & (VALID_THREADNO_MASK)) * KTCB_SIZE));
-}
-
-/**
- * translates a pointer within a tcb into a valid tcb pointer
- * @param ptr pointer to somewhere in the TCB
- * @returns pointer to the TCB
- */
-INLINE tcb_t * space_t::get_tcb (void * ptr)
-{
-    return (tcb_t*)((word_t)(ptr) & KTCB_MASK);
-}
-
-
-/**
- * adds a thread to the space
- * @param tcb pointer to thread control block
- */
-
-#define THR_COUNT_SHIFT 2
- 
-INLINE void space_t::add_tcb(tcb_t * tcb)
-{
-    pt.pd_split.thread_count+= (1<<THR_COUNT_SHIFT);
-}
-
-/**
- * removes a thread from a space
- * @param tcb_t thread control block
- * @return true if it was the last thread
- */
-INLINE bool space_t::remove_tcb(tcb_t * tcb)
-{
-    pt.pd_split.thread_count-= (1<<THR_COUNT_SHIFT);
-    return (pt.pd_split.thread_count == 0);
-}
-
-void init_kernel_space();
-
-#endif
diff --git a/kernel/src/glue/v4-arm/syscalls.h b/kernel/src/glue/v4-arm/syscalls.h
deleted file mode 100644
index ef1da7dd..00000000
--- a/kernel/src/glue/v4-arm/syscalls.h
+++ /dev/null
@@ -1,227 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/syscalls.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.16 2006/10/27 18:01:19 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ARM__SYSCALLS_H__
-#define __GLUE__V4_ARM__SYSCALLS_H__
-
-#include INC_ARCH(asm.h)
-#include INC_GLUE(config.h)
-
-#define USER_UTCB_REF		(*(word_t *)USER_UTCB_REF_PAGE)
-
-#define L4_TRAP_KPUTC		0x000000a0
-#define L4_TRAP_KGETC		0x000000a4
-#define L4_TRAP_KGETC_NB	0x000000a8
-#define L4_TRAP_KDEBUG		0x000000ac
-#define L4_TRAP_GETUTCB		0x000000b0
-#define L4_TRAP_KIP		0x000000b4
-
-#define SYSCALL_ipc		    0x0
-#define SYSCALL_thread_switch	    0x4
-#define SYSCALL_thread_control	    0x8
-#define SYSCALL_exchange_registers  0xc
-#define SYSCALL_schedule	    0x10
-#define SYSCALL_unmap		    0x14
-#define SYSCALL_space_control	    0x18
-#define SYSCALL_processor_control   0x1c
-#define SYSCALL_memory_control	    0x20
-#define SYSCALL_system_clock	    0x24
-#define SYSCALL_lipc		    0x28
-
-/* Upper bound on syscall number */
-#define SYSCALL_limit		SYSCALL_lipc
-
-/*
- * attributes for system call functions
- */
-#define SYSCALL_ATTR(x)
-
-#define SYS_IPC_RETURN_TYPE			threadid_t
-#define SYS_THREAD_CONTROL_RETURN_TYPE		word_t
-#define SYS_EXCHANGE_REGISTERS_RETURN_TYPE	threadid_t
-#define SYS_SPACE_CONTROL_RETURN_TYPE		word_t
-#define SYS_SCHEDULE_RETURN_TYPE		word_t
-#define SYS_MEMORY_CONTROL_RETURN_TYPE		word_t
-
-
-/*
- * Syscall declaration wrappers.
- */
-
-#define SYS_IPC(to, from, timeout)				\
-  SYS_IPC_RETURN_TYPE SYSCALL_ATTR ("ipc")			\
-  sys_ipc (to, from, timeout)
-
-#define SYS_THREAD_CONTROL(dest, space, scheduler, pager, utcb) \
-  SYS_THREAD_CONTROL_RETURN_TYPE SYSCALL_ATTR ("thread_control")\
-  sys_thread_control (dest, space, scheduler, pager, utcb)
-
-#define SYS_SPACE_CONTROL(space, control, kip_area, utcb_area,  \
-                          redirector)                           \
-  SYS_SPACE_CONTROL_RETURN_TYPE SYSCALL_ATTR ("space_control")  \
-  sys_space_control (space, control, kip_area, utcb_area,       \
-                     redirector)
-
-#define SYS_SCHEDULE(dest, time_control, processor_control,     \
-                     prio, preemption_control)                  \
-  SYS_SCHEDULE_RETURN_TYPE SYSCALL_ATTR ("schedule")            \
-  sys_schedule (dest, time_control, processor_control,          \
-                prio, preemption_control)
-
-#define SYS_EXCHANGE_REGISTERS(dest, control, usp, uip, uflags,	\
-                        uhandle, pager, is_local)		\
-  SYS_EXCHANGE_REGISTERS_RETURN_TYPE SYSCALL_ATTR ("exchange_registers")\
-  sys_exchange_registers (dest, control, usp, uip,		\
-                          uflags, uhandle, pager, is_local)
-
-#define SYS_THREAD_SWITCH(dest)					\
-  void SYSCALL_ATTR ("thread_switch")				\
-  sys_thread_switch (dest)
-
-#define SYS_UNMAP(control)					\
-  void SYSCALL_ATTR ("unmap") sys_unmap (control)
-
-#define SYS_PROCESSOR_CONTROL(processor_no, internal_frequency,	\
-                              external_frequency, voltage)	\
-  void SYSCALL_ATTR ("processor_control")                       \
-  sys_processor_control (processor_no, internal_frequency,	\
-                         external_frequency, voltage)
-
-#define SYS_MEMORY_CONTROL(control, attribute0, attribute1,	\
-                           attribute2, attribute3)		\
-  SYS_MEMORY_CONTROL_RETURN_TYPE SYSCALL_ATTR ("memory_control")\
-  sys_memory_control (control, attribute0, attribute1,		\
-                      attribute2, attribute3) 
-
-/**
- * Preload registers and return from sys_ipc
- * @param from The FROM value after the system call
- */
-#define return_ipc(from) return(from)
-
-/**
- * Preload registers and return from sys_thread_control
- * @param result The RESULT value after the system call
- */
-#define return_thread_control(result)  return (result)
-
-/**
- * Preload registers and return from sys_exchange_registers
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- * @param sp The SP value after the system call
- * @param ip The IP value after the system call
- * @param flags The FLAGS value after the system call
- * @param pager The PAGER value after the system call
- * @param handle The USERDEFINEDHANDLE value after the system call
- */
-#define return_exchange_registers(result, control, sp, ip, flags, pager, handle)\
-{									\
-    register word_t rslt    asm("r0") = (result).get_raw();		\
-    register word_t ctrl    asm("r1") = control;			\
-    register word_t sp_r    asm("r2") = sp;				\
-    register word_t ip_r    asm("r3") = ip;				\
-    register word_t flg	    asm("r4") = flags;				\
-    register word_t hdl	    asm("r5") = handle;				\
-    register word_t pgr	    asm("r6") = (pager).get_raw();		\
-    char * context = (char *) get_current_tcb()->get_stack_top () -	\
-		ARM_IPC_STACK_SIZE - (4*4);				\
-									\
-    __asm__ __volatile__ (						\
-	CHECK_ARG("r0", "%2")						\
-	CHECK_ARG("r1", "%3")						\
-	CHECK_ARG("r2", "%4")						\
-	CHECK_ARG("r3", "%5")						\
-	CHECK_ARG("r4", "%6")						\
-	CHECK_ARG("r5", "%8")						\
-	CHECK_ARG("r6", "%7")						\
-	"mov	sp,	%1	\n"					\
-	"mov	pc,	%0	\n"					\
-	:: "r"	(__builtin_return_address(0)),				\
-	   "r"	(context),						\
-	   "r" (rslt), "r" (ctrl), "r" (sp_r),				\
-	   "r" (ip_r), "r" (flg), "r" (pgr), "r" (hdl)			\
-    );									\
-    while (1);								\
-}
-
-/**
- * Return from sys_thread_switch
- */
-#define return_thread_switch() return
-
-
-/**
- * Return from sys_unmap
- */
-#define return_unmap()                  return
-
-
-/**
- * Preload registers and return from sys_thread_switch
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- */
-#define return_space_control(result, control) {                         \
-    __asm__ __volatile__ (                                              \
-        " /* return_unmap */                                    \n"     \
-        "       mov     r0, %0                                  \n"     \
-        "       mov     r1, %1                                  \n"     \
-        :                                                               \
-        : "r" (result), "r" (control)                                   \
-        : "r0", "r1");                                                  \
-    return (result);                                                    \
-}
-
-/**
- * Preload registers and return from sys_schedule
- * @param result The RESULT value after the system call
- * @param time_control The TIME_CONTROL value after the system call
- */
-#define return_schedule(result, time_control) {                         \
-    __asm__ __volatile__ (                                              \
-        " /* return_schedule */                                 \n"     \
-        "       mov     r0, %0                                  \n"     \
-        "       mov     r1, %1                                  \n"     \
-        :                                                               \
-        : "r" (result), "r" (time_control)                              \
-        : "r0", "r1");                                                  \
-    return (result);                                                    \
-}
-
-#define return_processor_control()
-
-/**
- * Return from sys_memory_control
- */
-#define return_memory_control(from)     return (from)
-
-#endif /* __GLUE__V4_ARM__SYSCALLS_H__ */
diff --git a/kernel/src/glue/v4-arm/tcb.h b/kernel/src/glue/v4-arm/tcb.h
deleted file mode 100644
index f3676267..00000000
--- a/kernel/src/glue/v4-arm/tcb.h
+++ /dev/null
@@ -1,625 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, 2006,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/tcb.h
- * Description:   TCB related functions for Version 4, ARM
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tcb.h,v 1.40 2006/10/20 21:31:33 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ARM__TCB_H__
-#define __GLUE__V4_ARM__TCB_H__
-
-#ifndef __API__V4__TCB_H__
-#error not for stand-alone inclusion
-#endif
-
-#include INC_API(syscalls.h)		/* for sys_ipc */
-#include INC_ARCH(thread.h)
-#include INC_ARCH(fass.h)
-#include INC_ARCH(fass_inline.h)
-#include INC_CPU(cache.h)
-#include INC_GLUE(resource_functions.h)
-
-
-INLINE word_t *tcb_t::get_stack_top(void)
-{
-    word_t *st = (word_t *) ((char *)this + KTCB_SIZE);
-
-    return st;
-}
-
-/**
- * Locate current TCB by using current stack pointer and return it.
- */
-INLINE tcb_t * get_current_tcb (void)
-{
-        register word_t stack_var asm("sp");
-
-        return (tcb_t *) (stack_var & KTCB_MASK);
-}
-
-/* FIXME - might save significant # cycles on IPC path with FASS by optimising 
- * this further 
- */
-INLINE utcb_t * tcb_t::get_utcb() 
-{
-#ifdef CONFIG_ENABLE_FASS
-    if (!this->space)
-	return this->utcb;
-
-    arm_domain_t domain = this->space->get_domain();
-    word_t utcb_location = get_utcb_location();
-    word_t utcb_section = utcb_location >> 20;
-
-    if ((domain != INVALID_DOMAIN && arm_fass.set_member(domain, utcb_section))) {
-        return (utcb_t *)utcb_location;
-    } else {
-        /* FIXME - this belongs in functions like set_mr etc. - if it is
-         * here then the UTCB is being marked dirty too conservatively. However,
-         * some of these functions are in generic code...
-         */
-        SET_BIT_WORD(utcb_dirty, domain);
-
-        //*(volatile word_t *)(this->utcb);
-
-        return this->utcb;
-    }
-
-#else
-    tcb_t *current_tcb = get_current_tcb();
-
-    if (EXPECT_TRUE(this->space && (current_tcb->space == this->space)))
-        return (utcb_t *)get_utcb_location();
-    else
-        return this->utcb;
-#endif
-}
-
-
-/**
- * read value of message register
- * @param index number of message register
- */
-INLINE word_t tcb_t::get_mr(word_t index)
-{
-    return get_utcb()->mr[index];
-}
-
-/**
- * set the value of a message register
- * @param index number of message register
- * @param value value to set
- */
-INLINE void tcb_t::set_mr(word_t index, word_t value)
-{
-    get_utcb()->mr[index] = value;
-}
-
-/**
- * copies a set of message registers from one UTCB to another
- * @param dest destination TCB
- * @param start MR start index
- * @param count number of MRs to be copied
- */
-INLINE void tcb_t::copy_mrs(tcb_t * dest, word_t start, word_t count)
-{
-    word_t *dest_mr = dest->get_utcb()->mr;
-    word_t *src_mr = get_utcb()->mr;
-
-    /* FIXME - optimise for ARM */
-
-    ASSERT(start + count <= IPC_NUM_MR);
-
-    for (word_t idx = start; idx < start + count; idx++)
-        dest_mr[idx] = src_mr[idx];
-}
-
-
-
-/**
- * read value of buffer register
- * @param index number of buffer register
- */
-INLINE word_t tcb_t::get_br(word_t index)
-{
-    return get_utcb()->br[index];
-}
-
-/**
- * set the value of a buffer register
- * @param index number of buffer register
- * @param value value to set
- */
-INLINE void tcb_t::set_br(word_t index, word_t value)
-{
-    get_utcb()->br[index] = value;
-}
-
-
-/**
- * allocate the tcb
- * The tcb pointed to by this will be allocated.
- */
-INLINE void tcb_t::allocate()
-{
-    this->kernel_stack[0] = 0;
-}
-
-
-/**
- * set the address space a TCB belongs to
- * @param space address space the TCB will be associated with
- */
-INLINE void tcb_t::set_space(space_t * space)
-{
-    this->space = space;
-}
-
-/* 
- * Return back to user_land when an IPC is aborted
- * We short circuit the restoration of any saved registers/state
- */
-INLINE void tcb_t::return_from_ipc (void)
-{
-    char * context =
-	    (char *) get_stack_top () - ARM_IPC_STACK_SIZE; 
-    extern void * ipc_syscall_return;
-    word_t ret = ((word_t)&ipc_syscall_return & 0x0fff) | ARM_HIGH_VECTOR_VADDR;
-
-    do {
-	__asm__ __volatile__ (
-	    "mov	sp,	%0		\n"
-	    "mov	pc,	%1		\n"
-	    : : "r" (context), "r" (ret)
-	);
-    } while (1);
-}
-
-
-/**
- * Short circuit a return path from a user-level interruption or
- * exception.  That is, restore the complete exception context and
- * resume execution at user-level.
- */
-INLINE void tcb_t::return_from_user_interruption(void)
-{
-    arm_irq_context_t * context =
-	    (arm_irq_context_t *) get_stack_top () - 1;
-    extern void * arm_abort_return;
-    word_t ret = ((word_t)&arm_abort_return & 0x0fff) | ARM_HIGH_VECTOR_VADDR;
-
-    do {
-	__asm__ __volatile__ (
-	    "mov	sp,	%0		\n"
-	    "mov	pc,	%1		\n"
-	    : : "r" (context), "r" (ret)
-	);
-    } while (1);
-    // NOT REACHED
-}
-
-
-INLINE void tcb_t::set_cpu(unsigned short foo) {}
-
-/********************************************************************** 
- *
- *                      thread switch routines
- *
- **********************************************************************/
-
-/**
- * switch to initial thread
- * @param tcb TCB of initial thread
- *
- * Initializes context of initial thread and switches to it.  The
- * context (e.g., instruction pointer) has been generated by inserting
- * a notify procedure context on the stack.  We simply restore this
- * context.
- */
-
-INLINE void NORETURN initial_switch_to (tcb_t * tcb)
-{
-#ifdef CONFIG_ENABLE_FASS
-    addr_t new_pt = page_table_to_phys(cpd);
-
-    /* Load CPD with kernel's PD */
-    for (int i = 0; i < (1 << ARM_SECTION_BITS); ++i)
-        cpd->pt.pdir[i] = get_kernel_space()->pt.pdir[i];
-
-    arm_fass.activate_domain(tcb->get_space());
-#else
-    addr_t new_pt = tcb->get_space();
-
-    if (new_pt == NULL)
-        new_pt = get_kernel_space();
-
-    new_pt = virt_to_phys(new_pt);
-#endif
-
-    arm_cache::cache_flush();
-
-    USER_UTCB_REF = tcb->get_utcb_location();
-
-    __asm__ __volatile__ (
-        "    mcr     p15, 0, r0, c7, c10, 4  \n" /* drain write buffer */   
-        "    mcr     p15, 0, %0, c2, c0, 0   \n" /* install new PT */      
-        "    mcr     p15, 0, r0, c8, c7, 0   \n" /* flush TLB */            
-        "                                    \n"               
-        "    mov     sp,     %1              \n" /* load new stack ptr */   
-        "                                    \n"               
-        "    ldmfd   sp!,    {r4,r5,r11,lr}  \n" /* load notify context */
-        "                                    \n"               
-        "    mov     pc,     lr              \n" /* load new PC */  
-        : 
-        : "r" (new_pt), "r" (tcb->stack)
-        : "r0", "memory");
-
-    ASSERT(!"We shouldn't get here!");
-    while(true) {}
-}
-
-/**
- * switches to another tcb thereby switching address spaces if needed
- * Note: current_tcb may not be in dest->space, be careful
- * @param dest tcb to switch to
- */
-
-INLINE void tcb_t::switch_to(tcb_t * dest)
-{
-    if (EXPECT_FALSE(resource_bits))
-        resources.save(this);
-
-#ifdef CONFIG_ENABLE_FASS
-    if (EXPECT_TRUE(dest->get_space() != get_space())) 
-        arm_fass.activate_domain(dest->get_space());
-
-    USER_UTCB_REF = dest->get_utcb_location();
-
-    __asm__ __volatile__ (
-	"   adr	    r12,    1f			\n"
-	"   stmfd   sp!,    {r4, r5, r11, r12}	\n"
-	"   str	    sp,	    [%0]		\n"
-	"   mov	    sp,	    %1			\n"
-	"   ldmfd   sp!,    {r4, r5, r11, pc}	\n"
-	"1:					\n"
-	:
-	: "r" (&stack), "r" (dest->stack)
-	: "r12", "memory"
-    );
-    __asm__ __volatile__ ("" ::: "r0","r1","r2","r3","r6","r7" );
-    __asm__ __volatile__ ("" ::: "r8","r9","r10","r11","memory" );
-
-#else
-    addr_t new_pt;
-
-    if (EXPECT_FALSE(dest->get_space() != get_space()))
-    {
-    	new_pt = dest->get_space();
-
-        if (new_pt == NULL) 
-            new_pt = get_kernel_space();
-
-        new_pt = virt_to_phys(new_pt);
-
-        arm_cache::cache_flush();
-        arm_cache::tlb_flush();
-    } else {
-	new_pt = NULL;
-    }
-
-    __asm__ __volatile__ (
-	"   adr	    r12,    1f			\n"
-	"   stmfd   sp!,    {r4, r5, r11, r12}	\n"
-	"   str	    sp,	    [%0]		\n"
-	"   mov	    sp,	    %1			\n"
-	"   cmp	    %2,	    #0			\n"
-	"   mcrne   p15, 0, %2, c2, c0, 0	\n" /* Set new page table */
-	"   str	    %4,	    [%3]		\n" /* set UTCB address */
-	"   ldmfd   sp!,    {r4, r5, r11, pc}	\n"
-	"1:					\n"
-	:
-	: "r" (&stack), "r" (dest->stack), "r" (new_pt),
-	  "r" (USER_UTCB_REF_PAGE), "r" (dest->get_utcb_location())
-	: "r12", "memory"
-    );
-    __asm__ __volatile__ ("" ::: "r0","r1","r2","r3","r6","r7" );
-    __asm__ __volatile__ ("" ::: "r8","r9","r10","r11","memory" );
-#endif
-
-    if (EXPECT_FALSE(resource_bits))
-        resources.load(this);
-}
-
-
-/**
- * intialize stack for given thread
- */
-INLINE void tcb_t::init_stack()
-{
-    /* Create space for an exception context */
-    arm_irq_context_t *context = (arm_irq_context_t *)get_stack_top() - 1;
-
-    stack = (word_t *)context; /* Update new stack position */
-
-    /* clear whole context */
-    for (word_t *t = (word_t *)context; t < get_stack_top(); t++)
-        *t = 0;
-}
-
-
-
-
-/**********************************************************************
- *
- *                        notification functions
- *
- **********************************************************************/
-
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-extern "C" void arm_return_from_notify0(void);
-INLINE void tcb_t::notify (void (*func)())
-{
-    arm_switch_stack_t *arm_switch = (arm_switch_stack_t *)stack;
-    arm_switch--;
-    stack = (word_t*) arm_switch;
-    arm_switch->r4 = (word_t)func;
-    arm_switch->lr = (word_t)arm_return_from_notify0; 
-}
-
-
-    
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-extern "C" void arm_return_from_notify1(void);
-INLINE void tcb_t::notify (void (*func)(word_t), word_t arg1)
-{
-    arm_switch_stack_t *arm_switch = (arm_switch_stack_t *)stack;
-    arm_switch--;
-    stack = (word_t*) arm_switch;
-
-    arm_switch->r4 = (word_t) func;
-    arm_switch->r5 = arg1;
-    arm_switch->lr = (word_t)arm_return_from_notify1; 
-}
-
-extern "C" void arm_return_from_notify2(void);
-INLINE void tcb_t::notify (void (*func)(word_t, word_t), word_t arg1, 
-        word_t arg2)
-{
-    arm_switch_stack_t *arm_switch = (arm_switch_stack_t *)stack;
-    arm_switch--;
-    stack = (word_t*) arm_switch;
-
-    arm_switch->r4 = (word_t) func;
-    arm_switch->r5 = arg1;
-    arm_switch->r11 = arg2;
-    arm_switch->lr = (word_t)arm_return_from_notify2; 
-}
-
-/**********************************************************************
- * 
- *            access functions for ex-regs'able registers
- *
- **********************************************************************/
-
-/**
- * read the user-level instruction pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_ip()
-{
-    arm_irq_context_t * context =
-        (arm_irq_context_t *) get_stack_top () - 1;
-
-    return (addr_t) (context)->pc;
-}
-
-/**
- * read the user-level stack pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_sp()
-{
-    arm_irq_context_t * context =
-        (arm_irq_context_t *) get_stack_top () - 1;
-
-    return (addr_t) (context)->sp;
-}
-
-/**
- * set the user-level instruction pointer
- * @param ip	new user-level instruction pointer
- */
-INLINE void tcb_t::set_user_ip(addr_t ip)
-{
-    arm_irq_context_t *context = (arm_irq_context_t *)get_stack_top() -1;
-
-    context->pc = (word_t)ip;
-}
-
-/**
- * set the user-level stack pointer
- * @param sp	new user-level stack pointer
- */
-INLINE void tcb_t::set_user_sp(addr_t sp)
-{
-    arm_irq_context_t *context = (arm_irq_context_t *)get_stack_top() -1;
-
-    context->sp = (word_t)sp;
-}
-
-
-INLINE word_t tcb_t::get_utcb_location()
-{
-    return myself_local.get_raw();
-}
-
-INLINE void tcb_t::set_utcb_location(word_t utcb_location)
-{
-    myself_local.set_raw (utcb_location);
-}
-
-
-/**
- * read the user-level flags (one word)
- * @return	the user-level flags
- */
-INLINE word_t tcb_t::get_user_flags (void)
-{
-    arm_irq_context_t * context =
-        (arm_irq_context_t *) get_stack_top () - 1;
-
-    return (word_t) (context)->cpsr & ARM_USER_FLAGS_MASK;
-}
-
-/**
- * set the user-level flags
- * @param flags	new user-level flags
- */
-INLINE void tcb_t::set_user_flags (const word_t flags)
-{
-    arm_irq_context_t *context = (arm_irq_context_t *)get_stack_top() -1;
-
-    context->cpsr = (context->cpsr & ~ARM_USER_FLAGS_MASK) |
-            ((word_t)flags & ARM_USER_FLAGS_MASK);
-}
-
-/**********************************************************************
- *
- *                  copy-area related functions
- *
- **********************************************************************/
-
-/**
- * Enable copy area for current thread.
- *
- * @param dst		destination TCB for IPC copy operation
- * @param s		source address
- * @param d		destination address
- */
-INLINE void tcb_t::adjust_for_copy_area (tcb_t * dst, addr_t * s, addr_t * d)
-{
-    //UNIMPLEMENTED();
-    *d = resources.enable_copy_area (this, dst, *d);
-}
-
-/**
- * Release copy area(s) for current thread.
- */
-INLINE void tcb_t::release_copy_area (void)
-{
-    resources.release_copy_area (this, true);
-}
-
-/**
- * Retrieve the real address associated with a copy area address.
- *
- * @param addr		address within copy area
- *
- * @return address translated into a regular user-level address
- */
-INLINE addr_t tcb_t::copy_area_real_address (addr_t addr)
-{
-    ASSERT (space->is_copy_area (addr));
-
-    return resources.copy_area_real_address(addr);
-}
-
-/**********************************************************************
- *
- *                        global tcb functions
- *
- **********************************************************************/
-
-INLINE tcb_t * addr_to_tcb(addr_t addr) 
-{
-    return (tcb_t *) ((word_t) addr & KTCB_MASK);
-}
-
-
-
-/**
- * invoke an IPC from within the kernel
- *
- * @param to_tid destination thread id
- * @param from_tid from specifier
- * @param timeout IPC timeout
- * @return IPC message tag (MR0)
- */
-INLINE msg_tag_t tcb_t::do_ipc (threadid_t to_tid, threadid_t from_tid,
-                                timeout_t timeout)
-{
-    msg_tag_t tag;
-
-#ifdef CONFIG_IPC_FASTPATH
-    tcb_t *current = get_current_tcb();
-    // For fast path, we need to indicate that we are doing ipc from the kernel
-    current->resources.set_kernel_ipc( current );
-#endif
-
-    sys_ipc (to_tid, from_tid, timeout);
-    tag.raw = get_mr (0);
-
-#ifdef CONFIG_IPC_FASTPATH
-    current->resources.clear_kernel_ipc( current );
-#endif
-
-    return tag;
-}
-
-
-/**********************************************************************
- *
- *                  architecture-specific functions
- *
- **********************************************************************/
-
-/**
- * initialize architecture-dependent root server properties based on
- * values passed via KIP
- * @param space the address space this server will run in   
- * @param ip the initial instruction pointer           
- * @param sp the initial stack pointer
- */
-INLINE void tcb_t::arch_init_root_server (space_t * space, word_t ip, word_t sp)
-{ 
-}
-
-
-#endif /* !__GLUE__V4_ARM__TCB_H__ */
diff --git a/kernel/src/glue/v4-arm/thread.cc b/kernel/src/glue/v4-arm/thread.cc
deleted file mode 100644
index 040f533d..00000000
--- a/kernel/src/glue/v4-arm/thread.cc
+++ /dev/null
@@ -1,58 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/thread.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: thread.cc,v 1.4 2004/06/04 06:32:02 cvansch Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(tcb.h)
-#include INC_ARCH(thread.h)
-
-#define CPSR_USER_MODE 0x10
-
-extern "C" void arm_initial_to_user(void);
-
-/**
- * Setup TCB to execute a function when switched to
- * @param func pointer to function
- *
- * The old stack state of the TCB does not matter.
- */
-void tcb_t::create_startup_stack (void (*func)())
-{
-    init_stack();
-
-    notify(arm_initial_to_user);
-    notify(func);
-
-    arm_irq_context_t *context = (arm_irq_context_t *)get_stack_top() - 1;
-
-    /* set user mode */
-    context->cpsr = CPSR_USER_MODE;
-}
diff --git a/kernel/src/glue/v4-arm/timer.h b/kernel/src/glue/v4-arm/timer.h
deleted file mode 100644
index 73f0af2b..00000000
--- a/kernel/src/glue/v4-arm/timer.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003,  National ICT Australia (NICTA)
- *
- * File path:     glue/v4-arm/timer.h
- * Description:   ARM timer handler
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.h,v 1.3 2004/06/04 02:26:52 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __GLUE__V4_ARM__TIMER_H__
-#define __GLUE__V4_ARM__TIMER_H__
-
-#include <timer.h>
-
-class timer_t : public generic_periodic_timer_t {
-public:
-    void init_global();
-    void init_cpu();
-};
-
-INLINE timer_t * get_timer()
-{
-    extern timer_t timer;
-    return &timer;
-}
-
-#endif /* __GLUE__V4_ARM__TIMER_H__ */
diff --git a/kernel/src/glue/v4-arm/traps.S b/kernel/src/glue/v4-arm/traps.S
deleted file mode 100644
index d2a2556f..00000000
--- a/kernel/src/glue/v4-arm/traps.S
+++ /dev/null
@@ -1,789 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:      glue/v4-arm/traps.S
- * Description:    Exception vectors
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: traps.S,v 1.28 2004/12/01 23:58:27 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_ARCH(thread.h)
-#include INC_GLUE(syscalls.h)
-#include INC_ARCH(asm.h)
-#include INC_ARCH(fass.h)
-
-#include <tcb_layout.h>
-#include <asmsyms.h>
-
-.balign 4096
-
-/* Relative branches, loads and stores to locations outside this 4K page are
- * broken, as this is remapped to the high interrupt vector 0xFFFF0000
- */
-BEGIN_PROC(arm_high_vector)
-	b	arm_reset_exception
-	b	arm_undefined_inst_exception
-	b	arm_swi_exception 
-	b	arm_l4_syscall
-	b	arm_data_abort_exception
-	nop
-	b	arm_irq_exception
-	b	arm_fiq_exception
-END_PROC(arm_high_vector)
-
-arm_common_return:
-	SET_USER_DACR
-	RESTORE_ALL
-	movs	pc,	lr
-
-arm_reset_exception:
-	/* Save R13_abt, SPSR_abt */
-	sub	lr,	lr,	#8
-	str	lr,	tmp_r14_abt
-	mrs	lr,	spsr
-	str	lr,	tmp_spsr_abt
-
-	/* Enter supervisor mode, IRQ/FIQ disabled */
-	msr	cpsr_c,	#0x000000d3
-
-	/* since SAVE_ALL_INT only does user's banked lr */
-	str	lr,	[sp, #(-PT_SIZE + PT_KLR)]
-
-	ldr	lr,	tmp_r14_abt
-	SAVE_ALL_INT
-	SAVE_CPSR_MRS 
-	SET_KERNEL_DACR
-
-	/* Call C function reset_exception(arm_irq_context_t *) */
-	mov	r0,	sp
-	ldr	r1,	=reset_exception
-	adr	lr,	arm_common_return
-	mov	pc,	r1
-
-arm_undefined_inst_exception:
-	/* Save R13_abt, SPSR_abt */
-	sub	lr,	lr,	#8
-	str	lr,	tmp_r14_abt
-	mrs	lr,	spsr
-	str	lr,	tmp_spsr_abt
-
-	/* Enter supervisor mode, IRQ/FIQ disabled */
-	msr	cpsr_c,	#0x000000d3
-
-	/* since SAVE_ALL_INT only does user's banked lr */
-	str	lr,	[sp, #(-PT_SIZE + PT_KLR)]
-
-	ldr	lr,	tmp_r14_abt
-	SAVE_ALL_INT
-	SAVE_CPSR_MRS
-	SET_KERNEL_DACR
-
-	/* Call C function undefined_exception(arm_irq_context_t *) */
-	mov	r0,	sp
-	ldr	r1,	=undefined_exception
-	adr	lr,	arm_common_return
-	mov	pc,	r1
-
-arm_fiq_exception:
-	/* Save R13_abt, SPSR_abt */
-	sub	lr,	lr,	#8
-	str	lr,	tmp_r14_abt
-	mrs	lr,	spsr
-	str	lr,	tmp_spsr_abt
-
-	/* Enter supervisor mode, IRQ/FIQ disabled */
-	msr	cpsr_c,	#0x000000d3
-
-	/* since SAVE_ALL_INT only does user's banked lr */
-	str	lr,	[sp, #(-PT_SIZE + PT_KLR)]
-
-	ldr	lr,	tmp_r14_abt
-	SAVE_ALL_INT
-	SAVE_CPSR_MRS
-	SET_KERNEL_DACR
-
-	/* Call C function fiq_exception(arm_irq_context_t *) */
-	mov	r0,	sp
-	ldr	r1,	=fiq_exception
-	adr	lr,	arm_common_return
-	mov	pc,	r1
-
-arm_swi_exception:
-	SAVE_ALL_INT
-	SAVE_CPSR_MRS
-	SET_KERNEL_DACR
-
-	/* Call C function syscall_exception(arm_irq_context_t *) */
-	mov	r0,	sp
-	ldr	r1,	=syscall_exception
-	adr	lr,	arm_common_return
-	mov	pc,	r1
- 
-arm_l4_syscall:
-	/* Save R14_abt, SPSR_abt */
-	sub	lr,	lr,	#4
-	str	lr,	tmp_r14_abt
-	mrs	lr,	spsr
-	str	lr,	tmp_spsr_abt
-
-	/* Enter supervisor mode, IRQ/FIQ disabled */
-	msr	cpsr_c,	#0x000000d3
-
-	ldr	lr,	tmp_r14_abt
-
-	/* Test to see if it is a syscall */
-	cmp	lr,	#0xffffff00
-#ifdef CONFIG_IPC_FASTPATH
-	bne	arm_non_ipc_syscall
-
-#define	to_tid		r0
-#define	from_tid	r1
-#define	timeouts	r2
-#define	mr0		r3
-#define	mr1		r4
-#define	mr2		r5
-#define	mr3		r6
-#define	mr4		r7
-
-#define	to_tcb		r8
-#define	current		r9
-#define	tmp1		r10
-#define	tmp2		r11
-#define	tmp3		r12
-#define	tmp4		r2	    /* only use after continue_ipc! */
-#define	tmp5		r1	    /* only use after last from_tid use! */
-#define	tmp6		lr
-
-#if (KTCB_BITS != 12)
-#error KTCB_BITS changed
-#endif
-#if ((KTCB_AREA_START) != 0xe0000000)
-#error KTCB_AREA moved
-#endif
-#if ((USER_UTCB_REF_PAGE) != 0xff000000)
-#error KTCB_AREA moved
-#endif
-
-	/***** Fast path IPC *****/
-
-	/* It is a syscall, so save the user's banked SP and LR as well as
-	 * CPSR (SETUP)
-	 */
-	ldr	r12,	tmp_spsr_abt				/* SETUP */
-
-	/* Look for a nil to-tid. */				/* TEST0 */
-	cmp	to_tid, #0					/* TEST0 */
-
-	/* Check for typed messages and flags	bits 15..6 = 0	   TEST1 */
-	movne	tmp1,	mr0, LSL #16				/* TEST1 */
-
-	stmdb	sp,	{r12, sp, lr}^				/* SETUP */
-	nop							/* SETUP */
-	sub	sp,	sp,	#ARM_IPC_STACK_SIZE		/* SETUP */
-
-	beq	arm_slowpath					/* TEST0 */
-
-	movs	tmp1,	tmp1, LSR #22				/* TEST1 */
-//	bne	arm_slowpath					/* TEST1 */
-
-	/* Calculate to_tcb (destination tcb)			   CALC1 */
-	moveq	to_tcb,	to_tid, LSL #(32 - VALID_THREADNO_BITS - L4_GLOBAL_VERSION_BITS)	/* CALC1 */
-	moveq	to_tcb, to_tcb, LSR #(32 - VALID_THREADNO_BITS)	/* CALC1 */
-
-	/* Calculate current tcb				   CALC2 */
-	moveq	current, sp, LSR #12				/* CALC2 */
-
-	moveq	to_tcb, to_tcb, LSL #12				/* CALC1 */
-	addeq	to_tcb,	to_tcb, #0xe0000000			/* CALC1 */
-
-	ldreq	tmp2,	[to_tcb, #OFS_TCB_MYSELF_GLOBAL]	/* TEST4 */
-	ldreq	tmp3,	[to_tcb, #OFS_TCB_RESOURCE_BITS]	/* TEST9 */
-
-	moveq	current, current, LSL #12			/* CALC2 */
-	ldreq	tmp6,	[current, #OFS_TCB_RESOURCE_BITS]	/* TEST10 */
-
-	/* Check that the receive timeout is infinite		   TEST3 | (lower 16 timeout bits == 0) */
-	moveqs	tmp1,	timeouts, LSL #16			/* TEST3 */
-//	bne	arm_slowpath					/* TEST3 */
-
-	/* Check to_tcb->get_global_id == to_tid		   TEST4 */
-	cmpeq	tmp2,	to_tid					/* TEST4 */
-//	bne	arm_slowpath					/* TEST4 */
-
-	ldreq	tmp1,	[to_tcb, #OFS_TCB_THREAD_STATE]		/* TEST5 */
-
-	/* Check if any resource bits are set			   TEST9 | TEST10 */
-	orreqs	tmp3,	tmp3, tmp6				/* TEST9 | TEST10 */
-//	bne	arm_slowpath					/* TEST9 | TEST10 */
-
-	ldreq	tmp6,	[to_tcb, #OFS_TCB_SPACE]		/* TEST11 */
-	/* Check partner (to_tcb) is waiting			   TEST5 */
-	cmpeq	tmp1,	#-1					/* TEST5 */
-	bne	arm_slowpath					/* TEST5 */
-
-	ldr	tmp1,	[to_tcb, #OFS_TCB_PARTNER]		/* TEST6 */
-	/* Check if to_tcb->space == NULL			   TEST11 */
-	cmp	tmp6,	#0					/* TEST11 */
-	beq	arm_slowpath					/* TEST11 */
-
-	ldr	tmp3,	[current, #OFS_TCB_MYSELF_GLOBAL]	/* TEST6 */
-	/* tcb->get_partner().is_anythread()			   TEST6 */
-	cmp	tmp1,	#-1					/* TEST6 */
-	beq	1f						/* TEST6 */
-	/* tcb->get_partner() == current->get_global_id()	   TEST6 */
-	cmp	tmp1,	tmp3					/* TEST6 */
-	bne	arm_slowpath					/* TEST6 */
-1:
-	/* Check if IPC is a Call				   TEST12 */
-	cmp	to_tid,	from_tid				/* TEST12 */
-	beq	2f						/* TEST12 */
-	
-	/* Require send_head to be empty			   TEST8 */
-	ldr	tmp1,	[current, #OFS_TCB_SEND_HEAD]		/* TEST8 */
-	cmp	tmp1,	#0					/* TEST8 */
-	bne	arm_slowpath					/* TEST8 */
-
-	/* XXX reorder ? */
-	/* Check that receive phase blocks			   TEST7 */
-	cmp	from_tid,   #-1					/* TEST7 */
-	bne	check_other_tcb					/* TEST7 */
-
-2:
-
-continue_ipc:
-#ifdef	CONFIG_ENABLE_FASS
-	/* Macro uses register ip (r12 / tmp3) */
-	SET_KERNEL_DACR
-
-	/* Touch the current thread's UTCB to fault it in if needed
-	 * This is done before SET_KERNEL_DACR! */
-	ldr	tmp1,	[current, #OFS_TCB_MYSELF_LOCAL]
-	ldr	tmp1,	[tmp1, #84]
-
-	add	tmp1,	tmp6,	#OFS_SPACE_DOMAIN
-	ldr	tmp6,	[tmp1]
-	mov	tmp6,	tmp6,	LSR #2
-	cmp	tmp6,	#INVALID_DOMAIN
-	beq	arm_slowpath
-
-#else
-	/* Check for address space switch */
-	ldr	tmp3,	[current, #OFS_TCB_SPACE]
-	cmp	tmp6,	tmp3
-	bne	arm_slowpath
-#endif
-
-	mov	tmp2,	#-1
-	/* Set thread state to waiting				   STORE1 */
-	str	tmp2,	[current, #OFS_TCB_THREAD_STATE]	/* STORE1  tmp2 = -1 */
-	/* Set partner						   STORE2/3 */
-	str	from_tid,	[current, #OFS_TCB_PARTNER]	/* STORE2 */
-#if 0
-	ldr	tmp3,	[current, #OFS_TCB_MYSELF_GLOBAL]	/* STORE3 */
-	str	tmp3,	[to_tcb, #OFS_TCB_PARTNER]		/* STORE3 */
-#endif
-
-	/* Use copy loop if more than 5 message registers	   TEST2 */
-	and	tmp1,	mr0,	#0x3f				/* TEST2 */
-	subs	tmp1,	tmp1,	#5				/* TEST2 */
-	bmi	fast_path_switch_to				/* TEST2 */
-
-	/* current utcb */
-	ldr	tmp2,	[current, #OFS_TCB_MYSELF_LOCAL]
-
-	/* destination utcb */
-#ifdef	CONFIG_ENABLE_FASS
-
-	/* cpd_set[domain][CPD_BITFIELD_POS(utcb_section)] &
-	            (1 << CPD_BITFIELD_OFFSET(utcb_section)) */
-
-	ldr	tmp5,	[to_tcb, #OFS_TCB_MYSELF_LOCAL]
-	ldr	tmp4,	arm_fass_ptr
-	mov	tmp3,	tmp6,	LSL #(12 - 5)
-	add	tmp3,	tmp3,	tmp5,	LSR #(20 + 5)
-	ldr	tmp3,	[tmp4, tmp3, LSL #2]
-
-	mov	tmp4,	tmp5,	LSR #20
-	and	tmp4,	tmp4,	#31
-	mov	tmp5,	#1
-	ands	tmp3,	tmp3,	tmp5,	LSL tmp4
-	ldrne	tmp3,	[to_tcb, #OFS_TCB_MYSELF_LOCAL]
-	bne	4f
-
-	/* SET_BIT_WORD */
-	ldr	tmp3,	arm_utcb_dirty_ptr
-	ldr	tmp4,	[tmp3]
-	orr	tmp4,	tmp4,	tmp5,	LSL tmp6
-	str	tmp4,	[tmp3]
-
-	ldr	tmp3,	[to_tcb, #OFS_TCB_UTCB]
-4:
-#else	/* No FASS */
-	/* Non-fass only gets here for Intra address space IPC */
-	ldr	tmp3,	[to_tcb, #OFS_TCB_MYSELF_LOCAL]
-#endif
-	/* tmp1 = num to copy - 1
-	 * tmp2 = from utcb
-	 * tmp3 = to utcb	    */
-	add	tmp2,	tmp2,	#84
-	add	tmp3,	tmp3,	#84
-
-copy_loop:
-	ldr	tmp4,	[tmp2],	#4
-	subs	tmp1,	tmp1,	#1
-	str	tmp4,	[tmp3],	#4
-	bpl	copy_loop
-
-fast_path_switch_to:
-#ifdef CONFIG_ENABLE_FASS
-	/* Check for address space switch */
-	ldr	tmp2,	[to_tcb, #OFS_TCB_SPACE]
-	ldr	tmp3,	[current, #OFS_TCB_SPACE]
-	cmp	tmp2,	tmp3
-	beq	3f
-
-	/* ACTIVATE NEW DOMAIN */
-	/* current_domain = target */
-	ldr	tmp4,	arm_current_ptr
-	mov	tmp1,	#1
-	str	tmp6,	[tmp4]
-
-	/* SET_BIT_WORD(domain_dirty, target) */
-	mov	tmp1,	tmp1,	LSR tmp6
-	ldr	tmp4,	arm_domain_ptr
-	ldr	tmp3,	[tmp4]
-	orr	tmp3,	tmp3,	tmp1
-	str	tmp3,	[tmp4]
-
-	/* current_pid = get_pid */
-	ldr	tmp1,	[to_tcb, #OFS_TCB_SPACE]
-	ldr	tmp4,	arm_pid_ptr
-	add	tmp1,	tmp1,	#OFS_SPACE_DOMAIN
-	ldr	tmp3,	[tmp1,	#(OFS_SPACE_PID - OFS_SPACE_DOMAIN)]
-	str	tmp3,	[tmp4]
-3:
-#endif
-
-	/* Set new UTCB XXX - if we fault after this, (before switch) is this bad? */
-	ldr	tmp3,	[to_tcb, #OFS_TCB_MYSELF_LOCAL]
-	mov	tmp1,	#0xff000000
-	str	tmp3,	[tmp1]
-
-	/* Set fast path return address */
-	adr	tmp1,	fast_path_recover
-
-	/* Create switch stack */
-	sub	sp,	sp,	#(4*4)
-	str	tmp1,	[sp, #12]	/* Save return address */
-
-	/* Save stack */
-	str	sp,	[current, #OFS_TCB_STACK]
-
-	/* Set destination thread to running */
-	mov	tmp1,	#TSTATE_RUNNING
-	str	tmp1,	[to_tcb, #OFS_TCB_THREAD_STATE]
-
-	/* Load new stack */
-	add	sp,	to_tcb,	#KTCB_SIZE
-
-	/* Clean up mr0 (clear receive flags) */
-	and	mr0,	mr0,	#(~(0xe << 12))
-
-	/* Load result (should be cached from before XXX) */
-	ldr	r0,	[current, #OFS_TCB_MYSELF_GLOBAL]
-
-	/* trashes ip/r12 and lr */
-	/* XXX - optimize - don't do SET_USER_DACR unless we switch address spaces */
-	SET_USER_DACR
-
-	/* restore the user's banked SP, LR, CPSR */
-	sub	tmp1,	sp,	#ARM_IPC_STACK_SIZE
-	ldmia	tmp1,	{r12, sp}^
-	nop
-	ldr	lr,	[sp, #-4]
-	msr	spsr,	r12
-
-	movs	pc,	lr
-
-check_other_tcb:
-	/* use tmp1, tmp2, tmp3, tmp6 only */
-
-	/* from_tid == 0?					   TEST13 */
-	cmp	from_tid,   #0					/* TEST13 */
-	beq	arm_slowpath					/* TEST13 */
-
-	/* Calculate from_tcb					   CALC4 */
-	mov	tmp1,	from_tid, LSL #(32 - VALID_THREADNO_BITS - L4_GLOBAL_VERSION_BITS)	/* CALC4 */
-	mov	tmp1,	tmp1,	LSR #(32 - VALID_THREADNO_BITS)	/* CALC4 */
-	mov	tmp1,	tmp1,	LSL #12				/* CALC4 */
-	add	tmp1,	tmp1,	#0xe0000000			/* CALC4 */
-
-	/* Check global ID */
-	ldr	tmp3,	[tmp1, #OFS_TCB_MYSELF_GLOBAL]
-	ldr	tmp6,	[tmp1, #OFS_TCB_THREAD_STATE]
-
-	cmp	tmp3,	from_tid
-	bne	arm_slowpath
-
-	/*
-	 * Check if the thread is polling us --- if so, go to slow path
-	 */
-
-	/* is_polling() */	
-	cmp	tmp6,	#TSTATE_POLLING
-	bne	continue_ipc	    /* from_tcb isn't polling */
-
-	/* partner == current->global_id */
-	ldr	tmp3,	[tmp1, #OFS_TCB_PARTNER]
-	ldr	tmp6,	[current, #OFS_TCB_MYSELF_GLOBAL]
-	cmp	tmp3,	tmp6
-	beq	arm_slowpath
-
-	/* partner == current->local_id */
-	ldr	tmp6,	[current, #OFS_TCB_MYSELF_LOCAL]
-	cmp	tmp3,	tmp6
-	beq	continue_ipc
-
-	b	arm_slowpath
-
-fast_path_recover:
-	mov	tmp1,	sp,	LSR #12
-	mov	current,tmp1,	LSL #12
-	add	sp,	current,#KTCB_SIZE
-	sub	sp,	sp,	#ARM_IPC_STACK_SIZE
-
-	/* Set the state to running */
-	mov	tmp1,	#TSTATE_RUNNING
-	str	tmp1,	[current, #OFS_TCB_THREAD_STATE]
-
-	/* Load result */
-	ldr	r0,	[current, #OFS_TCB_PARTNER]
-
-	b	ipc_syscall_return
-
-arm_slowpath:
-	mov	r12,	#0xff000000
-	ldr	r12,	[r12]
-	add	r12,	r12,	#64
-	stmia	r12,	{r3-r7}
-
-	/* Macro uses register ip/r12 */
-	SET_KERNEL_DACR
-
-	adr	lr,	ipc_syscall_return
-	ldr	pc,	arm_sys_ipc
-
-arm_non_ipc_syscall:
-#endif
-        bcc     arm_prefetch_abort_exception
-
-	/* svc SP should point to current thread's stack in KTCB - this is
-	* given as it is an invariant that the banked svc SP is to the
-	* currently executing thread's KTCB stack
-	*/
-
-	/* Test to see if it is a syscall */
-	and	lr,	lr,	#0x000000ff
-	cmp	lr,	#SYSCALL_limit
-	bhi	arm_non_l4_syscall
-
-	SET_KERNEL_DACR
-
-	/* It is a syscall, so save the user's banked SP and LR as well as
-	 * CPSR
-	 */
-
-	ldr	r12,	tmp_spsr_abt
-	stmdb	sp,	{r12, sp, lr}^
-	nop
-	sub	sp,	sp,	#ARM_IPC_STACK_SIZE
-
-	/* Calling registers:
-	 *   r0, r1, r2, r3, r4, r5, r6, r7 : arguments 1 - 8
-	 * Retuned registers:
-	 *   r0, r1, r2, r3, r4, r5, r6     : returned 1 - 7
-	 */
-	mov	r12,	lr
-	adr	lr,	syscall_return
-	ldr	pc,	[pc, r12 /* , lsl #2*/]
-	nop
-
-arm_sys_ipc:
-.word	sys_ipc
-.word	sys_thread_switch
-.word	sys_thread_control_exargs
-.word	sys_exchange_registers_exargs
-.word	sys_schedule_exargs 
-.word	sys_unmap 
-.word	sys_space_control
-.word	syscall_return /* sys_processor_control */
-.word	sys_memory_control_exargs 
-.word   sys_clock
-.word   sys_ipc /* lipc */
-
-#define SYS_EXARGS(name, lastreg, numregs)	\
-name##_exargs:					\
-	stmdb	sp!,	{r4##lastreg};		\
-	ldr	r12,	=name##;		\
-	mov	lr,	pc;			\
-	mov	pc,	r12;			\
-						\
-	add	sp,	sp,     #(numregs * 4);	\
-	b	syscall_return;			
-
-SYS_EXARGS(sys_thread_control, , 1)
-SYS_EXARGS(sys_exchange_registers,-r7,4)
-SYS_EXARGS(sys_schedule, , 1)
-SYS_EXARGS(sys_memory_control, , 1)
-
-arm_domain_ptr:
-	.word	domain_dirty
-arm_current_ptr:
-	.word	current_domain
-arm_pid_ptr:
-	.word	current_pid
-#ifdef CONFIG_ENABLE_FASS
-arm_fass_ptr:
-	.word	arm_fass
-arm_utcb_dirty_ptr:
-	.word	utcb_dirty
-#endif
-
-.global ipc_syscall_return
-ipc_syscall_return:
-#ifdef CONFIG_IPC_FASTPATH
-
-	SET_USER_DACR
-
-	mov	r12,	#0xff000000
-	ldr	r12,	[r12]
-	add	r12,	r12,	#64
-	ldmia	r12,	{r3-r7}
-
-	/* restore the user's banked SP, LR, CPSR */
-
-	ldmia	sp,	{r12, sp}^
-	nop
-	add	sp,	sp,	#ARM_IPC_STACK_SIZE
-	ldr	lr,	[sp, #-4]
-	msr	spsr,	r12
-
-	movs	pc,	lr
-#endif
-
-.global syscall_return
-syscall_return:
-	SET_USER_DACR
-	/* restore the user's banked SP, LR, CPSR */
-
-	ldmia	sp,	{r12, sp}^
-	nop
-	add	sp,	sp,	#ARM_IPC_STACK_SIZE
-	ldr	lr,	[sp, #-4]
-	msr	spsr,	r12
-
-	movs	pc,	lr
-
-arm_non_l4_syscall:
-	SAVE_ALL_INT
-	SAVE_CPSR_TMP
-	SET_KERNEL_DACR
-
-	/* Call C function arm_swi(arm_irq_context_t *) */
-	mov	r0,	sp
-	ldr	r1,	=arm_misc_l4_syscall
-	mov	lr,	pc
-	mov	pc,	r1
-
-	SET_USER_DACR
-	RESTORE_ALL
-
-	ldr	lr,	[sp, #(-PT_SIZE + PT_LR)]
-
-	movs	pc,	lr
-
-arm_prefetch_abort_exception:
-	/* Even if the fault came from the kernel, it won't be on the current
-	 * stack as KTCBs are faulted on for allocation prior to the use of
-	 * their stacks 
-	 */
-
-	SAVE_ALL_INT
-	SAVE_CPSR_TMP
-	SET_KERNEL_DACR
-
-	/* Pointer to base of current arm_irq_context_t record */
-	mov	r2,	sp
-
-	/* Faulting address */
-	ldr	r1,	[sp, #PT_PC]
-
-	/* Assume it was a page fault for now */
-
-	/* Fault status - not updated on prefetch abort */
-	mov	r0,	#0
-
-	mov	r3,	#0
-
-	/* Process the page fault */
- 
-	ldr	r4,	=arm_page_fault
-	adr	lr,	arm_abort_return
-	mov	pc,	r4
-
-arm_data_abort_exception:
-	/* Save R13_abt, SPSR_abt */
-	sub	lr,	lr,	#8
-	str	lr,	tmp_r14_abt
-	mrs	lr,	spsr
-	str	lr,	tmp_spsr_abt
-
-	/* Enter supervisor mode, IRQ/FIQ disabled */
-	msr	cpsr_c,	#0x000000d3
-
-	/* since SAVE_ALL_INT only does user's banked lr */
-	str	lr,	[sp, #(-PT_SIZE + PT_KLR)]
-
-	ldr	lr,	tmp_r14_abt
-
-	/* Even if the fault came from the kernel, it won't be on the current
-	 * stack as KTCBs are faulted on for allocation prior to the use of
-	 * their stacks
-	 */
-	
-	SAVE_ALL_INT
-	SAVE_CPSR_TMP
-	SET_KERNEL_DACR
-
-	/* Pointer to base of current arm_irq_context_t record */
-	mov	r2,	sp
-
-	/* Fault status */
-	mrc	p15, 0, r0, c5, c0, 0
-
-	/* Faulting address */
-	mrc	p15, 0, r1, c6, c0, 0
-
-	mov	r3,	#1
-
-	ldr	r4,	=arm_page_fault
-	mov	lr,	pc
-	mov	pc,	r4
-
-.global arm_abort_return
-arm_abort_return:
-	SET_USER_DACR_K
-	RESTORE_ALL
-
-	str	lr,	tmp_r14_abt
-	mrs	lr,	spsr
-	str	lr,	tmp_spsr_abt
-
-	ldr	lr,	[sp, #(-PT_SIZE + PT_KLR)]
-
-	/* Enter abort mode, IRQ/FIQ disabled */
-	msr	cpsr_c,	#0x000000d7
-
-	/* Restore R13_abt, SPSR_abt */
-	ldr	lr,	tmp_spsr_abt
-	msr	spsr,	lr
-	ldr	lr,	tmp_r14_abt
-
-	movs	pc,	r14
-
-arm_irq_exception:
-	/* Save R13_abt, SPSR_abt */
-	sub	lr,	lr,	#4
-	str	lr,	tmp_r14_abt
-	mrs	lr,	spsr
-	str	lr,	tmp_spsr_abt
-
-	/* Enter supervisor mode, IRQ/FIQ disabled */
-	msr	cpsr_c,	#0x000000d3
-
-	/* since SAVE_ALL_INT only does user's banked lr */
-	str	lr,	[sp, #(-PT_SIZE + PT_KLR)]
-
-	ldr	lr,	tmp_r14_abt
-
-	SAVE_ALL_INT
-	SAVE_CPSR_TMP
-	SET_KERNEL_DACR
-
-	mov	r0,	sp
-       
-	ldr	r4,	=arm_irq
-	mov	lr,	pc
-	mov	pc,	r4
-
-	SET_USER_DACR_K
-	RESTORE_ALL
-
-	str	lr,	tmp_r14_abt
-	mrs	lr,	spsr
-	str	lr,	tmp_spsr_abt
-
-	ldr	lr,	[sp, #(-PT_SIZE + PT_KLR)]
-
-	/* Enter irq mode, IRQ/FIQ disabled */
-	msr	cpsr_c, #0x000000d2
-
-	/* Restore R13_abt, SPSR_abt */
-	ldr	lr,	tmp_spsr_abt
-	msr	spsr,	lr
-	ldr	lr,	tmp_r14_abt
-
-	movs	pc,	lr
-
-.balign 32
-
-.global utcb_dirty
-utcb_dirty: 
-	.word	0xdeadbeef
-
-.global domain_dirty
-domain_dirty:
-	.word	0xdeadbeef
-
-.global current_domain
-current_domain:
-	.word	0xdeadbeef
-
-.global current_pid
-current_pid:
-	.word	0xdeadbeef
-
-.balign 32
-
-tmp_r14_abt:
-	.word	0xdeadbeef
-tmp_spsr_abt:
-	.word	0xdeadbeef
-
-.ltorg
-
-.balign 4096
-
diff --git a/kernel/src/glue/v4-arm/user.S b/kernel/src/glue/v4-arm/user.S
deleted file mode 100644
index 744c4051..00000000
--- a/kernel/src/glue/v4-arm/user.S
+++ /dev/null
@@ -1,104 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     glue/v4-arm/user.S
- * Description:   Kernel entry points for syscalls
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: user.S,v 1.19 2004/12/01 23:57:01 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(thread.h)
-#include INC_GLUE(syscalls.h)
-
-#define SYSCALL_UNIMPLEMENTED(name) \
-.section    .user.##name;           \
-BEGIN_PROC(user_##name);            \
-        mov   pc, lr;               \
-END_PROC(user_##name)
-
-#define SYSCALL(name)				\
-.section	.user.##name;			\
-BEGIN_PROC(user_##name);			\
-	mov	r12,	#(0xffffff00 + SYSCALL_##name);	\
-	mov	pc,	r12;			\
-END_PROC(user_##name)            
-
-#define SYSCALL_EXCH(name)				\
-.section	.user.##name;			\
-BEGIN_PROC(user_##name);			\
-	movs	r12,	r0,	LSL #(32-L4_LOCAL_ID_ZERO_BITS);	\
-	moveq	r7,	#1;			\
-	movne	r7,	#0;			\
-	mov	r12,	#(0xffffff00 + SYSCALL_##name);\
-	mov	pc,	r12;			\
-END_PROC(user_##name)            
-
-#ifdef CONFIG_IPC_FASTPATH
-
-#define SYSCALL_IPC(name)	SYSCALL(name)
-
-#else
-
-/* No fast-path, so write MRs back to UTCB. */
-
-#define SYSCALL_IPC(name)	SYSCALL_MRS(name)
-
-#endif /* CONFIG_IPC_FASTPATH */
-
-#define SYSCALL_MRS(name)			\
-.section	.user.##name;			\
-BEGIN_PROC(user_##name);			\
-	mov	ip,	#0xff000000;		\
-	ldr	ip,	[ip];			\
-	add	ip,	ip,	#64;		\
-	stmia	ip,	{r3-r7};		\
-	str	ip,	[sp, #-4]!;		\
-	mov	ip,	#(0xffffff00 + SYSCALL_##name);	\
-	str	lr,	[sp, #-4]!;		\
-	mov	lr,	pc;			\
-	mov	pc,	ip;			\
-	ldr	lr,	[sp],	#4;		\
-	ldr	ip,	[sp],	#4;		\
-	ldmia	ip,	{r3-r7};		\
-	mov	pc,	lr;
-END_PROC(user_##name)             
-
-SYSCALL_IPC(ipc)
-SYSCALL_MRS(lipc)
-SYSCALL(thread_switch)
-SYSCALL(space_control)
-SYSCALL_MRS(unmap)
-SYSCALL(system_clock)
-SYSCALL_EXCH(exchange_registers)
-SYSCALL(thread_control)
-SYSCALL(schedule)
-SYSCALL(memory_control)
-
-/* ProcessorControl currently unimplemented */
-
-SYSCALL_UNIMPLEMENTED(processor_control)
-
diff --git a/kernel/src/glue/v4-arm/utcb.h b/kernel/src/glue/v4-arm/utcb.h
deleted file mode 100644
index 281f531b..00000000
--- a/kernel/src/glue/v4-arm/utcb.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, 2006,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-arm/utcb.h
- * Description:   UTCB definition
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: utcb.h,v 1.5 2006/10/20 16:30:04 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_ARM__UTCB_H__
-#define __GLUE__V4_ARM__UTCB_H__
-
-#include INC_API(thread.h)
-#include INC_API(types.h)
-
-#define PADDING_0       ((64-sizeof(threadid_t)*5-sizeof(word_t)*3-sizeof(timeout_t)-sizeof(u8_t)*2-sizeof(u16_t))/4)
-
-#define PADDING_1       ((448-sizeof(word_t)*(IPC_NUM_MR+IPC_NUM_BR))/4)
-
-class utcb_t {
-public:
-    bool allocate(threadid_t tid);
-    void free();
-
-public:
-    threadid_t		my_global_id;		/* 0 */
-    word_t		processor_no;		/* 4 */
-    word_t		user_defined_handle;	/* 8 */
-    threadid_t		pager;			/* 12 */
-    threadid_t		exception_handler;	/* 16 */
-    u8_t		preempt_flags;		/* 20 */
-    u8_t		cop_flags;              /* 21 */
-    u16_t		__reserved0;            /* 22 */
-    timeout_t		xfer_timeout;		/* 24 */
-    word_t		error_code;		/* 28 */
-    threadid_t		intended_receiver;	/* 32 */
-    threadid_t		virtual_sender;		/* 36 */
-    word_t              __padding0[PADDING_0];          /* 40 .. 64 */
-    word_t		mr[IPC_NUM_MR];		/* 64 .. 320 */
-    word_t		br[IPC_NUM_BR];		/* 320 .. 452 */
-    word_t              __padding1[PADDING_1];         /* 452 .. 512 */
-
-public:
-    void set_my_global_id(threadid_t tid);
-    word_t get_user_defined_handle();
-    void set_user_defined_handle(word_t handle);
-    threadid_t get_pager();
-    void set_pager(threadid_t tid);
-    threadid_t get_exception_handler();
-    void set_exception_handler(threadid_t tid);
-    u8_t get_preempt_flags();
-    void set_preempt_flags(u8_t flags);
-    u8_t get_cop_flags();
-    word_t get_error_code();
-    void set_error_code(word_t err);
-    timeout_t get_xfer_timeout();
-    threadid_t get_intended_receiver();
-    threadid_t get_virtual_sender();
-    void set_virtual_sender(threadid_t tid);
-
-} /*__attribute__((packed))*/;
-
-#include INC_API(generic-utcb.h)
-
-#endif /* !__GLUE__V4_ARM__UTCB_H__ */
diff --git a/kernel/src/glue/v4-ia64/Makeconf b/kernel/src/glue/v4-ia64/Makeconf
deleted file mode 100644
index 49001b34..00000000
--- a/kernel/src/glue/v4-ia64/Makeconf
+++ /dev/null
@@ -1,17 +0,0 @@
-SOURCES+=	src/glue/v4-ia64/context.S \
-		src/glue/v4-ia64/exception.cc \
-		src/glue/v4-ia64/init.cc \
-		src/glue/v4-ia64/intctrl.cc \
-		src/glue/v4-ia64/ivt.S \
-		src/glue/v4-ia64/resources.cc \
-		src/glue/v4-ia64/memcontrol.cc \
-		src/glue/v4-ia64/sal.cc \
-		src/glue/v4-ia64/smp.cc \
-		src/glue/v4-ia64/space.cc \
-		src/glue/v4-ia64/thread.cc \
-		src/glue/v4-ia64/timer.cc \
-		src/glue/v4-ia64/user.S
-
-SOURCES+=	src/generic/linear_ptab_walker.cc \
-		src/generic/mapping_alloc.cc \
-		src/generic/mapping.cc
diff --git a/kernel/src/glue/v4-ia64/asmsyms.cc b/kernel/src/glue/v4-ia64/asmsyms.cc
deleted file mode 100644
index 8133a23d..00000000
--- a/kernel/src/glue/v4-ia64/asmsyms.cc
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/asmsyms.cc
- * Description:   Various asm definitions for ia64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asmsyms.cc,v 1.11 2005/10/19 16:22:24 skoglund Exp $
- *                
- ********************************************************************/
-#include <mkasmsym.h>
-
-#include INC_GLUE(context.h)
-#include INC_GLUE(utcb.h)
-#include INC_API(procdesc.h)
-#include INC_API(kernelinterface.h)
-#include INC_API(threadstate.h)
-
-
-MKASMSYM (SIZEOF_SWITCH_CONTEXT, sizeof (ia64_switch_context_t));
-MKASMSYM (SIZEOF_EXCEPTION_CONTEXT, sizeof (ia64_exception_context_t));
-
-MKASMSYM (EXC_CONTEXT_IPSR_OFFSET, offsetof (ia64_exception_context_t, ipsr));
-MKASMSYM (PROCDESC_ARCH1_OFFSET, offsetof (procdesc_t, arch1));
-MKASMSYM (KIP_PROCDESC_PTR_OFFSET,
-	  offsetof (kernel_interface_page_t, proc_desc_ptr));
-MKASMSYM (SWITCH_CTX_PFS_OFFSET, offsetof (ia64_switch_context_t, pfs));
-
-MKASMSYM (UTCB_MR_OFFSET, offsetof (utcb_t, mr));
-MKASMSYM (UTCB_PROCESSOR_OFFSET, offsetof (utcb_t, processor_no));
-
-MKASMSYM (TSTATE_POLLING, (word_t) thread_state_t::polling);
-MKASMSYM (TSTATE_WAITING_FOREVER, (word_t) thread_state_t::waiting_forever);
-MKASMSYM (TSTATE_RUNNING, (word_t) thread_state_t::running);
diff --git a/kernel/src/glue/v4-ia64/config.h b/kernel/src/glue/v4-ia64/config.h
deleted file mode 100644
index 887a1dfa..00000000
--- a/kernel/src/glue/v4-ia64/config.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/config.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.32 2003/09/24 19:04:36 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__CONFIG_H__
-#define __GLUE__V4_IA64__CONFIG_H__
-
-#include INC_API(config.h)
-#include INC_ARCH(config.h)
-
-#define MIN_PAGE_SIZE		(__UL(4096))
-#define MIN_PAGE_MASK		(~(MIN_PAGE_SIZE-1))
-
-#define KTCB_BITSIZE		(13)
-#define KTCB_SIZE		(__UL(1) << KTCB_BITSIZE)
-#define KTCB_MASK		(~(KTCB_SIZE-1))
-
-#define KIP_SIZE_LOG2		(15)
-
-
-/**
- * Offset from empty kernel SP to empty RSE SP
- */
-#define IA64_SP_TO_RSE_OFFSET	(KTCB_SIZE - 0x200)
-
-
-/*
- * Setup for user-stubs of system calls.
- */
-
-#define KIP_SYSCALL(x)		((word_t *) (x))[0]
-#define ARCH_SYSCALL0		KIP_SYSCALL (user_pal_call)
-#define ARCH_SYSCALL1		KIP_SYSCALL (user_sal_call)
-
-#if !defined(ASSEMBLY) && defined(__cplusplus)
-extern "C" void SECTION (".user.syscall.pal_call") user_pal_call (void);
-extern "C" void SECTION (".user.syscall.sal_call") user_sal_call (void);
-#endif
-
-
-/*
- * Values for kernel interface page.
- */
-
-/* 64bit, little endian */
-#define KIP_API_FLAGS		{SHUFFLE2(endian:0, word_size:1)}	
-
-/* 8 byte aligned, 1KB size, 4KB area size */
-#define KIP_UTCB_INFO		{SHUFFLE3(multiplier:1, alignment:10, size:12)}
-
-/* 2*8KB */
-#define KIP_KIP_AREA		{ KIP_SIZE_LOG2 }
-
-/* write+exec */
-#define KIP_ARCH_PAGEINFO	{SHUFFLE2(rwx:3, size_mask:\
-                                           ((1 << 12) |  /*   4KB */ \
-					    (1 << 13) |  /*   8KB */ \
-					    (1 << 14) |  /*  16KB */ \
-					    (1 << 16) |  /*  64KB */ \
-					    (1 << 18) |  /* 256KB */ \
-					    (1 << 20) |  /*   1MB */ \
-					    (1 << 22) |  /*   4MB */ \
-					    (1 << 24) |  /*  16MB */ \
-					    (1 << 26) |  /*  64MB */ \
-					    (1 << 28))   /* 256MB */ >> 10)}
-
-/* Minimum number of memory descriptors required in KIP */
-#define KIP_MIN_MEMDESCS	(32)
-
-
-/* Number of usec in a timer tick */
-#define TIMER_TICK_LENGTH	(2000)
-
-#define CACHE_LINE_SIZE		(IA64_CACHE_LINE_SIZE)
-
-#define KERNEL_AREA_START	(7UL << 61)
-
-#define VALID_THREADNO_BITS	(17)
-#define KTCB_REGION_ID		(__UL(5))
-#define KTCB_AREA_START		(KTCB_REGION_ID << 61)
-#define KTCB_AREA_SIZE		(KTCB_SIZE << L4_GLOBAL_THREADNO_BITS)
-#define KTCB_AREA_END		(KTCB_AREA_START + KTCB_AREA_SIZE)
-
-#define USER_AREA_START		(0UL)
-#define USER_AREA_END		(1UL << 61)
-
-#define ROOT_UTCB_START		(1UL << 32)
-#define ROOT_KIP_START		(1UL << 33)
-
-#endif /* !__GLUE__V4_IA64__CONFIG_H__ */
diff --git a/kernel/src/glue/v4-ia64/context.S b/kernel/src/glue/v4-ia64/context.S
deleted file mode 100644
index bb1dbbb0..00000000
--- a/kernel/src/glue/v4-ia64/context.S
+++ /dev/null
@@ -1,187 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/context.S
- * Description:   Context management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: context.S,v 1.22 2005/10/19 16:22:48 skoglund Exp $
- *                
- ********************************************************************/
-#include <tcb_layout.h>
-#include <asmsyms.h>
-
-#include INC_ARCH(asm.h)
-#include INC_GLUE(registers.h)
-#include INC_GLUE(context_handle.h)
-
-
-/**
- * Trampoline to invoke a notify procedure.  Stack pointer will upon
- * entry contian the switch context to return to, and r_rp will contain the
- * notify procedure to invoke.  We just call the procedure and restore
- * the previous switch context.
- */
-BEG_PROC (ia64_notify_trampoline)
-	.regstk 0,0,0,0
-
-sp1		= r10
-sp2		= r11
-r_bsp		= r14
-r_ip		= r15
-r_rp		= r16		// must match r_rp in thread_switch()
-r_cfm		= r17		// must match r_cfm in thread_switch()
-r_pfs		= r18		// must match r_pfs in thread_switch()
-r_rnat		= r19
-r_unat		= r20
-r_pr		= r21
-r_psr		= r22
-
-	// Turn all local+input registers into outputs
-	dep	r_cfm = 0,r_cfm,7,7
-	movl	r10 = 1f
-	;;
-	mov	rp = r10
-	mov	ar.pfs = r_cfm
-	;;
-	br.ret.sptk.few rp
-
-1:	// Perform last phase of thread switch
-	mov	ar.pfs = r_pfs
-	mov	rp = r_rp
-	mov	ar.rsc = 3
-
-	// Invoke notify procedure
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = rp
-	add	sp = 16, sp
-	;;
-
-	// Create a separate return trampoline label to be used for
-	// only "restoring" initial context of a newly started thread.
-	.global ia64_notify_return_trampoline
-ia64_notify_return_trampoline:
-
-	add	sp1 = SWITCH_CTX_PFS_OFFSET, sp
-	add	sp2 = SWITCH_CTX_PFS_OFFSET+8, sp
-	flushrs				// flush dirty registers
-	mov	ar.rsc = 0		// turn off RSE
-	;;
-
-	// Load context from new frame
-	ld8	r_pfs = [sp1], 16
-	ld8	r_cfm = [sp2], 16
-	;;
-	ld8	r_ip = [sp1], 16
-	ld8	r_bsp = [sp2], 16
-	mov	ar.pfs = r_cfm
-	;;
-	ld8	r_rnat = [sp1], 16
-	ld8	r_unat = [sp2], 16
-	mov	ar.bspstore = r_bsp
-	;;
-	ld8	r_pr = [sp1]
-	ld8	r_psr = [sp2], 16
-	mov	ar.rnat = r_rnat
-	mov	ar.unat = r_unat
-	;;
-	ld8	r_rp = [sp2]
-	mov	rp = r_ip
-	add	sp = SIZEOF_SWITCH_CONTEXT,sp
-	mov	pr = r_pr, 0x1ffff
-	mov	psr.l = r_psr
-	;;
-	srlz.d
-
-	// Return to the last phase of the context switch
-	br.ret.sptk.many rp
-
-END_PROC (ia64_notify_trampoline)
-
-
-BEG_PROC (save_context)
-arg_ip		= r31
-arg_num		= r30
-
-	SAVE_EXCEPTION_CONTEXT (arg_num, ;; mov rp = arg_ip ;;)
-	br.sptk.few rp
-
-END_PROC (save_context)
-
-BEG_PROC (load_context)
-	LOAD_EXCEPTION_CONTEXT ()
-	srlz.d
-	;;
-	rfi
-END_PROC (load_context)
-
-
-BEG_PROC (save_context_extint)
-arg_ip		= r31
-arg_ivr		= r30
-
-	// We temporarily store arg_ivr in b1 while saving the 
-	// exception context because all other general registers are
-	// used for storing the context.
-
-	SAVE_EXCEPTION_CONTEXT (12, ;; mov rp = arg_ip ;; mov b1 = arg_ivr )
-	mov	ret0 = b1
-
-	br.sptk.few rp
-END_PROC (save_context_extint)
-
-
-
-/**
- * Restore a user exception context and activate it using rfi.
- *
- * @param context	pointer to exception context
- */
-BEG_PROC (activate_context)
-	rsm	psr.i
-	;;
-	alloc	r14 = ar.pfs,1,0,0,0
-	mov	sp = in0
-	;;
-	mov	r_KERNEL_STACK_COUNTER = 2
-	;;
-	LOAD_EXCEPTION_CONTEXT ()
-	srlz.d
-	;;
-	rfi
-
-END_PROC (activate_context)
-
-
-
-
-/**
- * clobber_caller_saved_registers: clobbers all caller saved registers
- */
-BEG_PROC (clobber_caller_saved_registers)
-	br.ret.sptk.many rp
-END_PROC (clobber_caller_saved_registers)
-
-
diff --git a/kernel/src/glue/v4-ia64/context.h b/kernel/src/glue/v4-ia64/context.h
deleted file mode 100644
index bb1dab1b..00000000
--- a/kernel/src/glue/v4-ia64/context.h
+++ /dev/null
@@ -1,159 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/context.h
- * Description:   Various context management classes
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: context.h,v 1.28 2003/09/24 19:04:36 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__CONTEXT_H__
-#define __GLUE__V4_IA64__CONTEXT_H__
-
-#include INC_ARCH(psr.h)
-#include INC_ARCH(cr.h)
-#include INC_ARCH(ar.h)
-
-typedef struct {
-    word_t raw[2];
-} ia64_float;
-
-
-/**
- * Frame contains minimal information for a thread switch context.
- * The SP and IP must be located at the same offset from the end of
- * the frame as the SP and IP in the exception context frame.
- */
-class ia64_switch_context_t
-{
-public:
-    word_t	__pad;
-    word_t	num_dirty;	// Only used in syscall stubs
-    word_t	rsc;		// Only used in syscall stubs
-    word_t	gp;		// Only used in syscall stubs
-
-    word_t	pfs;
-    word_t	cfm;
-    addr_t	ip;
-    word_t *	bspstore;
-    word_t	rnat;
-    word_t	unat;
-    word_t	pr;
-    psr_t	psr;
-    addr_t	sp;		// Only used in syscall stubs
-    addr_t	rp;
-};
-
-
-class ia64_exception_context_t
-{
-public:
-    word_t	exception_num;
-    word_t	__pad1;
-
-    ia64_float	f6;
-    ia64_float	f7;
-    ia64_float	f8;
-    ia64_float	f9;
-    ia64_float	f10;
-    ia64_float	f11;
-    ia64_float	f12;
-    ia64_float	f13;
-    ia64_float	f14;
-    ia64_float	f15;
-
-    addr_t	bspstore_kern;	// For dumping reg stack contents
-
-    word_t	r1;
-    word_t	r2;
-    word_t	r3;
-    word_t	r4;
-    word_t	r5;
-    word_t	r6;
-    word_t	r7;
-    word_t	r8;
-    word_t	r9;
-    word_t	r10;
-    word_t	r11;
-    word_t	r13;
-    word_t	r14;
-    word_t	r15;
-    word_t	r16;
-    word_t	r17;
-    word_t	r18;
-    word_t	r19;
-    word_t	r20;
-    word_t	r21;
-    word_t	r22;
-    word_t	r23;
-    word_t	r24;
-    word_t	r25;
-    word_t	r26;
-    word_t	r27;
-    word_t	r28;
-    word_t	r29;
-    word_t	r30;
-    word_t	r31;
-
-    word_t	b0;
-    word_t	b1;
-    word_t	b2;
-    word_t	b3;
-    word_t	b4;
-    word_t	b5;
-    word_t	b6;
-    word_t	b7;
-
-    word_t	pr;
-
-    ar_pfs_t	pfs;
-    word_t	num_dirty;
-    addr_t	bspstore;
-    word_t	rsc;
-    word_t	ccv;
-    word_t	unat;
-    word_t	rnat;
-    word_t	lc;
-    word_t	ec;
-    ar_fpsr_t	fpsr;
-
-    addr_t	iipa;
-    cr_isr_t	isr;
-    ar_pfs_t	ifs;
-    word_t	iim;
-    addr_t	ifa;
-    addr_t	iha;
-    word_t	unat_kern;
-    word_t	rnat_kern;
-    cr_tpr_t	tpr;
-
-    // Remaining fields overlap with switch context
-    psr_t	ipsr;
-    addr_t	r12;
-    addr_t	iip;
-};
-
-
-#endif /* !__GLUE__V4_IA64__CONTEXT_H__ */
diff --git a/kernel/src/glue/v4-ia64/context_handle.h b/kernel/src/glue/v4-ia64/context_handle.h
deleted file mode 100644
index 63fafb05..00000000
--- a/kernel/src/glue/v4-ia64/context_handle.h
+++ /dev/null
@@ -1,542 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/context_handle.h
- * Description:   Context handling macros
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: context_handle.h,v 1.9 2005/10/19 16:20:44 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__CONTEXT_HANDLE_H__
-#define __GLUE__V4_IA64__CONTEXT_HANDLE_H__
-
-#include <asmsyms.h>
-#include INC_ARCH(asm.h)
-#include INC_GLUE(registers.h)
-#include INC_GLUE(config.h)
-
-#define TPR_INT_ENABLE_SOME	((0 << 16) + (14 << 4))
-#define TPR_INT_ENABLE_ALL	((0 << 16) +  (0 << 4))
-#define TPR_INT_DISABLE		((1 << 16))
-
-
-/* N.B. do not use r30/r31 */
-#define SAVE_EXCEPTION_CONTEXT(num,mixin_code)				\
-									;\
-sp1		= r1							;\
-sp2		= r2							;\
-									;\
-r_b0		= r3							;\
-r_b1		= r4							;\
-r_b2		= r5							;\
-r_b3		= r6							;\
-r_b4		= r7							;\
-r_b5		= r8							;\
-r_b6		= r9							;\
-r_b7		= r10							;\
-r_pr		= r11							;\
-									;\
-tmp_pr		= r21							;\
-tmp_sp		= r20							;\
-r_sp		= r13							;\
-new_bspstore	= r14							;\
-									;\
-r_bspstore	= r16							;\
-num_dirty	= r17							;\
-r_pfs		= r18							;\
-r_rsc		= r19							;\
-r_ccv		= r20							;\
-r_rnat		= r21							;\
-r_unat		= r15							;\
-tmp_unat	= r22							;\
-r_lc		= r23							;\
-r_ec		= r24							;\
-r_fpsr		= r25							;\
-r_isr		= r26							;\
-r_ipsr		= r27							;\
-r_ifs		= r28							;\
-r_iipa		= r29							;\
-r_iip		= r30							;\
-r_unat_kern	= r31							;\
-r_iim		= r10							;\
-r_ifa		= r9							;\
-r_iha		= r8							;\
-r_tpr		= r7							;\
-kern_sp		= r19							;\
-									;\
-	/* Predicates after context is saved:	*/			;\
-	/*   p2 = !switch to kernel sp		*/			;\
-	/*   p3 = switch to kernel sp		*/			;\
-	/*   p4 = switch to kernel bsp		*/			;\
-	/*   p5 = keep current bsp		*/			;\
-									;\
-	mov	r17 = r_KERNEL_STACK_COUNTER				;\
-	mov	tmp_pr = pr						;\
-	mov	tmp_sp = sp						;\
-	;;								;\
-	mov	kern_sp = r_KERNEL_SP					;\
-	rsm	psr.ic|psr.i|psr.dt					;\
-	cmp.eq	p3,p2 = 0, r17						;\
-	cmp.geu	p4,p5 = 1, r17						;\
-	;;								;\
-	mov	r16 = r_PHYS_TCB_ADDR					;\
-(p3)	add	sp = -SIZEOF_EXCEPTION_CONTEXT,kern_sp			;\
-(p2)	add	sp = -SIZEOF_EXCEPTION_CONTEXT,sp			;\
-	mov	r17 = r1						;\
-	mov	r18 = r2						;\
-	;;								;\
-	mov	tmp_unat = ar.unat					;\
-	dep	sp1 = sp,r16,0,KTCB_BITSIZE				;\
-	mov	r16 = num						;\
-	;;								;\
-	srlz.d								;\
-	add	sp2 = 16+16, sp1					;\
-	st8	[sp1] = r16, 16		/* exc num */			;\
-	nop.i	0							;\
-	;;								;\
-	stf.spill [sp1] = f6, 32	/* f6 */			;\
-	stf.spill [sp2] = f7, 32	/* f7 */			;\
-	;;								;\
-	stf.spill [sp1] = f8, 32	/* f8 */			;\
-	stf.spill [sp2] = f9, 32	/* f9 */			;\
-	;;								;\
-	stf.spill [sp1] = f10, 32	/* f10 */			;\
-	stf.spill [sp2] = f11, 32	/* f11 */			;\
-	;;								;\
-	stf.spill [sp1] = f12, 32	/* f12 */			;\
-	stf.spill [sp2] = f13, 32	/* f13 */			;\
-	;;								;\
-	stf.spill [sp1] = f14, 40	/* f14 */			;\
-	stf.spill [sp2] = f15, 32	/* f15 */			;\
-	;;								;\
-									;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r17, 16	/* r1 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r18, 16	/* r2 */			;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r3, 16	/* r3 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r4, 16	/* r4 */			;\
-	mov	r_b0 = b0						;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r5, 16	/* r5 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r6, 16	/* r6 */			;\
-	mov	r_b1 = b1						;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r7, 16	/* r7 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r8, 16	/* r8 */			;\
-	mov	r_b2 = b2						;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r9, 16	/* r9 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r10, 16	/* r10 */			;\
-	mov	r_b3 = b3						;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r11, 16	/* r11 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r13, 16	/* r13 */			;\
-	mov	r_b4 = b4						;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r14, 16	/* r14 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r15, 16	/* r15 */			;\
-	mov	r_b5 = b5						;\
-	;;								;\
-									;\
-	mov	r_b6 = b6						;\
-	mov	r_pr = tmp_pr						;\
-	mov	r_sp = tmp_sp						;\
-(p4)	add	new_bspstore = -IA64_SP_TO_RSE_OFFSET, kern_sp		;\
-	mov	r_unat = tmp_unat					;\
-	;;								;\
-	mov	r_b7 = b7						;\
-									;\
-	/* Run code for, e.g., setting rp, etc. */			;\
-	mixin_code							;\
-									;\
-	bsw.1								;\
-	;;								;\
-	ITANIUM_A_STEP_BSW						;\
-	;;								;\
-									;\
-	mov	r_tpr = cr.tpr						;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r16, 16	/* r16 */			;\
-	;;								;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r17, 16	/* r17 */			;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r18, 16	/* r18 */			;\
-	;;								;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r19, 16	/* r19 */			;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r20, 16	/* r20 */			;\
-	;;								;\
-	mov	r_rsc =	ar.rsc						;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r21, 16	/* r21 */			;\
-	mov	r_pfs = ar.pfs						;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r22, 16	/* r22 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r23, 16	/* r23 */			;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r24, 16	/* r24 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r25, 16	/* r25 */			;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r26, 16	/* r26 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r27, 16	/* r27 */			;\
-	;;								;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r28, 16	/* r28 */			;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r29, 16	/* r29 */			;\
-	;;								;\
-	mov	r_ccv = ar.ccv						;\
-	.mem.offset 0,0							;\
-	st8.spill [sp1] = r30, 16	/* r30 */			;\
-	mov	r_lc = ar.lc						;\
-	;;								;\
-	mov	r_fpsr = ar.fpsr					;\
-	.mem.offset 8,0							;\
-	st8.spill [sp2] = r31, 16	/* r31 */			;\
-	mov	r_ec = ar.ec						;\
-	;;								;\
-	st8	[sp1] = r_b0, 16	/* b0 */			;\
-	st8	[sp2] = r_b1, 16	/* b1 */			;\
-	;;								;\
-	st8	[sp1] = r_b2, 16	/* b2 */			;\
-	st8	[sp2] = r_b3, 16	/* b3 */			;\
-	;;								;\
-	mov	r_iim = cr.iim						;\
-	st8	[sp1] = r_b4, 16	/* b4 */			;\
-	;;								;\
-	st8	[sp2] = r_b5, 16	/* b5 */			;\
-	st8	[sp1] = r_b6, 16	/* b6 */			;\
-	;;								;\
-	mov	r_iha = cr.iha						;\
-	st8	[sp2] = r_b7, 16	/* b7 */			;\
-									;\
-	cover								;\
-	;;								;\
-	mov	ar.rsc = 0						;\
-	st8	[sp1] = r_pr, 16		/* pr */		;\
-	;;								;\
-	mov	r_bspstore = ar.bspstore				;\
-	movl	r9 = TPR_INT_ENABLE_SOME				;\
-	;;								;\
-	mov	cr.tpr = r9						;\
-	st8	[sp2] = r_pfs, 16		/* ar.pfs */		;\
-	;;								;\
-(p4)	mov	ar.bspstore = new_bspstore				;\
-(p5)	mov	new_bspstore = r_bspstore				;\
-	;;								;\
-	mov	num_dirty = ar.bsp					;\
-	st8	[sp2] = r_bspstore, 16		/* ar.bspstore */	;\
-	;;								;\
-	mov	r_rnat = ar.rnat					;\
-	st8	[sp2] = r_ccv, 16		/* ar.ccv */		;\
-	sub	num_dirty = num_dirty, new_bspstore			;\
-	;;								;\
-	mov	ar.rsc = 3						;\
-	st8	[sp1] = num_dirty, 16 		/* num_dirty */		;\
-	;;								;\
-	mov	ar.fpsr = 0x3f			/* Disable fp traps */	;\
-	st8	[sp1] = r_rsc, 16		/* ar.rsc */		;\
-	;;								;\
-	st8	[sp1] = r_unat, 16		/* ar.unat */		;\
-	st8	[sp2] = r_rnat, 16		/* ar.rnat */		;\
-	;;								;\
-	mov	r_iipa = cr.iipa					;\
-	st8	[sp1] = r_lc, 16		/* ar.lc */		;\
-	;;								;\
-	mov	r_isr = cr.isr						;\
-	st8	[sp2] = r_ec, 16		/* ar.ec */		;\
-	;;								;\
-	mov	r_ifs = cr.ifs						;\
-	st8	[sp1] = r_fpsr, 16		/* ar.fpsr */		;\
-	;;								;\
-	mov	r_ifa = cr.ifa						;\
-	st8	[sp2] = r_iipa, 16		/* cr.iipa */		;\
-	;;								;\
-	st8	[sp1] = r_isr, 16		/* cr.isr */		;\
-	st8	[sp2] = r_ifs, 16		/* cr.ifs */		;\
-	;;								;\
-	mov	r_ipsr = cr.ipsr					;\
-	st8	[sp1] = r_iim, 16		/* cr.iim */		;\
-	;;								;\
-	mov	r_iip = cr.iip						;\
-	st8	[sp2] = r_ifa, 32		/* cr.ifa */		;\
-	;;								;\
-	st8	[sp1] = r_iha, 32		/* cr.iha */		;\
-						/* ar.unat (kern) */	;\
-						/* ar.rnat (kern) */	;\
-	st8	[sp2] = r_tpr, 16		/* cr.tpr */		;\
-	;;								;\
-	mov	r_unat_kern = ar.unat					;\
-	st8	[sp1] = r_ipsr, 16		/* cr.ipsr */		;\
-	;;								;\
-	mov	r8 = r_KERNEL_STACK_COUNTER				;\
-	st8.spill [sp2] = r_sp, -32		/* r12 */		;\
-	;;								;\
-	st8	[sp1] = r_iip			/* cr.iip */		;\
-	movl	gp = __gp						;\
-	;;								;\
-	st8	[sp2] = r_unat_kern					;\
-	add	r8 = 2, r8						;\
-	;;								;\
-	mov	r_KERNEL_STACK_COUNTER = r8				;\
-	srlz.d								;\
-	;;								;\
-	ssm	psr.ic|psr.dt						;\
-	;;								;\
-	srlz.d								;\
-	;;
-
-#define LOAD_EXCEPTION_CONTEXT()					\
-									;\
-sp1		= r1							;\
-sp2		= r2							;\
-									;\
-r_b0		= r3							;\
-r_b1		= r4							;\
-r_b2		= r5							;\
-r_b3		= r6							;\
-r_b4		= r7							;\
-r_b5		= r8							;\
-r_b6		= r9							;\
-r_b7		= r10							;\
-r_pr		= r11							;\
-tmp_unat	= r13							;\
-									;\
-r_bspstore	= r16							;\
-num_dirty	= r17							;\
-r_pfs		= r18							;\
-r_rsc		= r19							;\
-r_ccv		= r20							;\
-r_rnat		= r21							;\
-r_unat		= r22							;\
-r_lc		= r23							;\
-r_ec		= r24							;\
-r_fpsr		= r25							;\
-r_isr		= r26							;\
-r_ipsr		= r27							;\
-r_ifs		= r28							;\
-r_iipa		= r29							;\
-r_unat_kern	= r30							;\
-r_tpr		= r31							;\
-									;\
-tmp_r1		= r30							;\
-tmp_r2		= r31							;\
-									;\
-r_iip		= r18							;\
-r_sp		= r19							;\
-r_tmp_ksc	= r31							;\
-									;\
-	mov	r14 = r_KERNEL_STACK_COUNTER				;\
-	;;								;\
-	cmp.leu	p6,p0 = 4, r14			/* stall 11 cycles */	;\
-	cmp.eq	p7,p0 = 2, r14						;\
-									;\
-	add	sp1 = SIZEOF_EXCEPTION_CONTEXT-32, sp			;\
-	add	sp2 = SIZEOF_EXCEPTION_CONTEXT-48, sp			;\
-	;;								;\
-	ld8	r_tpr = [sp1], 8		/* cr.tpr */		;\
-	ld8	r_unat_kern = [sp2], -40	/* ar.unat (kern) */	;\
-	;;								;\
-	ld8	r_ipsr = [sp1], -56		/* cr.ipsr */		;\
-	ld8	r_isr = [sp2], -16		/* cr.isr */		;\
-	;;								;\
-(p7)	mov	cr.tpr = r_tpr						;\
-	ld8	r_ifs = [sp1], -16		/* cr.ifs */		;\
-	;;								;\
-	ld8	r_iipa = [sp1], -16		/* cr.iipa */		;\
-	ld8	r_fpsr = [sp2], -16		/* ar.fpsr */		;\
-	;;								;\
-	ld8	r_ec = [sp1], -16		/* ar.ec */		;\
-	ld8	r_lc = [sp2], -32		/* ar.lc */		;\
-	;;								;\
-	ld8	r_rnat = [sp1], -16		/* ar.rnat */		;\
-/*	ld8	tmp_unat = [sp2], -16*/		/* ar.unat */		;\
-	ld8	r_rsc = [sp2], -16		/* ar.rsc */		;\
-	;;								;\
-	ld8	r_ccv = [sp1], -16		/* ar.ccv */		;\
-	ld8	num_dirty = [sp2], -16		/* num_dirty */		;\
-	;;								;\
-	ld8	r_bspstore = [sp1], -16		/* ar.bspstore */	;\
-									;\
-(p6)	br.cond.dpnt.few 1f						;\
-	alloc	r14 = ar.pfs,0,0,0,0					;\
-	shl	num_dirty = num_dirty,16	/* RSC.loadrs */	;\
-	;;								;\
-(p7)	srlz.d								;\
-	mov	ar.rsc = num_dirty					;\
-	;;								;\
-	loadrs					/* stall 11+1 cycles */	;\
-	;;								;\
-	mov	ar.bspstore = r_bspstore				;\
-	;;								;\
-	mov	ar.rnat = r_rnat					;\
-1:	rsm	psr.ic|psr.i						;\
-	;;								;\
-	srlz.d								;\
-	;;								;\
-	mov	ar.rsc = r_rsc						;\
-	ld8	r_pfs = [sp1], -16		/* ar.pfs */		;\
-	mov	ar.ec = r_ec						;\
-	;;								;\
-	mov	ar.ccv = r_ccv						;\
-	ld8	r_pr = [sp2], -16		/* pr */		;\
-	mov	ar.lc = r_lc						;\
-	;;								;\
-	mov	cr.ifs = r_ifs						;\
-	ld8	r_b7 = [sp1], -16		/* b7 */		;\
-	mov	tmp_unat = r_unat					;\
-	;;								;\
-	mov	cr.isr = r_isr						;\
-	ld8	r_b6 = [sp2], -16		/* b6 */		;\
-	;;								;\
-	mov	ar.fpsr = r_fpsr					;\
-	ld8	r_b5 = [sp1], -16		/* b5 */		;\
-	mov	b7 = r_b7						;\
-	;;								;\
-	mov	cr.ipsr = r_ipsr					;\
-	ld8	r_b4 = [sp2], -16		/* b4 */		;\
-	mov	ar.pfs = r_pfs						;\
-	;;								;\
-	mov	cr.tpr = r_tpr						;\
-	ld8	r_b3 = [sp1], -16		/* b3 */		;\
-	mov	pr = r_pr, 0x1ffff					;\
-	;;								;\
-	ld8	r_b2 = [sp2], -16		/* b2 */		;\
-	ld8	r_b1 = [sp1], -16 		/* b1 */		;\
-	;;								;\
-	mov	ar.unat = r_unat_kern					;\
-	ld8	r_b0 = [sp2], -16		/* b0 */		;\
-	mov	b6 = r_b6						;\
-	;;								;\
-	ld8.fill r31 = [sp1], -16		/* r31 */		;\
-	ld8.fill r30 = [sp2], -16		/* r30 */		;\
-	mov	b5 = r_b5						;\
-	;;								;\
-	ld8.fill r29 = [sp1], -16		/* r29 */		;\
-	ld8.fill r28 = [sp2], -16		/* r28 */		;\
-	;;								;\
-	ld8.fill r27 = [sp1], -16		/* r27 */		;\
-	ld8.fill r26 = [sp2], -16		/* r26 */		;\
-	;;								;\
-	ld8.fill r25 = [sp1], -16		/* r25 */		;\
-	ld8.fill r24 = [sp2], -16		/* r16 */		;\
-	mov	b4 = r_b4						;\
-	;;								;\
-	ld8.fill r23 = [sp1], -16		/* r23 */		;\
-	ld8.fill r22 = [sp2], -16		/* r22 */		;\
-	mov	b3 = r_b3						;\
-	;;								;\
-	ld8.fill r21 = [sp1], -16		/* r21 */		;\
-	ld8.fill r20 = [sp2], -16		/* r20 */		;\
-	mov	b2 = r_b2						;\
-	;;								;\
-	ld8.fill r19 = [sp1], -16		/* r19 */		;\
-	ld8.fill r18 = [sp2], -16		/* r18 */		;\
-	mov	b1 = r_b1						;\
-	;;								;\
-	ld8.fill r17 = [sp1], -16		/* r17 */		;\
-	ld8.fill r16 = [sp2], -16		/* r16 */		;\
-	mov	b0 = r_b0						;\
-	bsw.0								;\
-	;;								;\
-	ITANIUM_A_STEP_BSW						;\
-	mov	r_unat = tmp_unat					;\
-	ld8.fill r15 = [sp1], -16		/* r15 */		;\
-	;;								;\
-	ld8.fill r14 = [sp2], -16		/* r14 */		;\
-	ld8.fill r13 = [sp1], -16		/* r13 */		;\
-	;;								;\
-	ld8.fill r11 = [sp2], -16		/* r11 */		;\
-	ld8.fill r10 = [sp1], -16		/* r10 */		;\
-	;;								;\
-	ld8.fill r9 = [sp2], -16		/* r9 */		;\
-	ld8.fill r8 = [sp1], -16		/* r8 */		;\
-	;;								;\
-	mov	r_tmp_ksc = r_KERNEL_STACK_COUNTER			;\
-	ld8.fill r7 = [sp2], -16		/* r7 */		;\
-	;;								;\
-	ld8.fill r6 = [sp1], -16		/* r6 */		;\
-	ld8.fill r5 = [sp2], -16		/* r5 */		;\
-	add	r_tmp_ksc = -2, r_tmp_ksc				;\
-	;;								;\
-	mov	r_KERNEL_STACK_COUNTER = r_tmp_ksc			;\
-	ld8.fill r4 = [sp1], -16		/* r4 */		;\
-	;;								;\
-	ld8.fill r3 = [sp2], -16		/* r3 */		;\
-	ld8.fill tmp_r2 = [sp1], -32		/* r2 */		;\
-	;;								;\
-	ldf.fill f15 = [sp1], - 32		/* f15 */		;\
-	ld8.fill tmp_r1 = [sp2], -40		/* r1 */		;\
-	add	r16 = SIZEOF_EXCEPTION_CONTEXT-8, sp			;\
-	;;								;\
-	ldf.fill f13 = [sp1], - 32		/* f13 */		;\
-	ldf.fill f14 = [sp2], - 32		/* f14 */		;\
-	add	r17 = SIZEOF_EXCEPTION_CONTEXT-16, sp			;\
-	;;								;\
-	ldf.fill f11 = [sp1], - 32		/* f11 */		;\
-	ldf.fill f12 = [sp2], - 32		/* f12 */		;\
-	;;								;\
-	ldf.fill f9 = [sp1], - 32		/* f9 */		;\
-	ldf.fill f10 = [sp2], - 32		/* f10 */		;\
-	;;								;\
-	ldf.fill f7 = [sp1]			/* f7 */		;\
-	ldf.fill f8 = [sp2], - 32		/* f8 */		;\
-	;;								;\
-	ldf.fill f6 = [sp2]			/* f6 */		;\
-	ld8	r_iip = [r16]			/* cr.iip */		;\
-	mov	r1 = tmp_r1						;\
-	mov	r2 = tmp_r2						;\
-	;;								;\
-	ld8.fill r_sp = [r17]			/* r12 */		;\
-	;;								;\
-/*	mov	ar.unat = r_unat	*/				;\
-	mov	cr.iip = r_iip						;\
-	mov	sp = r_sp						;\
-	;;
-
-
-#endif /* !__GLUE__V4_IA64__CONTEXT_HANDLE_H__ */
diff --git a/kernel/src/glue/v4-ia64/exception.cc b/kernel/src/glue/v4-ia64/exception.cc
deleted file mode 100644
index 9ad25c66..00000000
--- a/kernel/src/glue/v4-ia64/exception.cc
+++ /dev/null
@@ -1,367 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/exception.cc
- * Description:   IA-64 exception handling
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: exception.cc,v 1.36 2006/10/19 22:57:39 ud3 Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kdb/tracepoints.h>
-#include <kdb/console.h>
-
-#include INC_GLUE(context.h)
-
-#include INC_API(tcb.h)
-#include INC_API(kernelinterface.h)
-
-#include INC_ARCH(cr.h)
-#include INC_ARCH(instr.h)
-#include INC_ARCH(runconv.h)
-
-#include INC_PLAT(system_table.h)
-#include INC_PLAT(runtime_services.h)
-
-static char * interruption_names[] = {
-    "VHPT Translation",
-    "Instruction TLB",
-    "Data TLB",
-    "Alternate Instruction TLB",
-    "Alternate Data TLB",
-    "Data Nested TLB",
-    "Instruction Key Miss",
-    "Data Key Miss",
-    "Dirty-Bit",
-    "Instruction Access-Bit",
-    "Data Access-Bit",
-    "Breal Instruction",
-    "External Interrupt",
-    "Reserved", "Reserved", "Reserved", "Reserved", "Reserved",
-    "Reserved", "Reserved",
-    "Page Not Present",
-    "Key Permission",
-    "Instruction Access Rights",
-    "Data Access Rights",
-    "General Exception",
-    "Disabled FP-Register",
-    "NaT Consumption",
-    "Speculation",
-    "Reserved 28",
-    "Debug",
-    "Unaligned Reference",
-    "Unsupported Data",
-    "Floating-point Fault",
-    "Floating-point Trap",
-    "Lower-Privilege Transfer Trap",
-    "Taken Branch Trap",
-    "Single Step Trap",
-    "Reserved", "Reserved", "Reserved", "Reserved",
-    "Reserved", "Reserved", "Reserved", "Reserved",
-    "IA-32 Exception",
-    "IA-32 Intercept",
-    "IA-32 Interrupt",
-    "Reserved", "Reserved", "Reserved", "Reserved", "Reserved",
-    "Reserved", "Reserved", "Reserved", "Reserved", "Reserved",
-    "Reserved", "Reserved", "Reserved", "Reserved", "Reserved",
-    "Reserved", "Reserved", "Reserved", "Reserved", "Reserved"
-};
-
-void ia64_dump_frame (ia64_exception_context_t * frame);
-
-DECLARE_TRACEPOINT (SYSCALL_KERNEL_INTERFACE);
-
-DEFINE_SPINLOCK(kdb_lock);
-
-static void enter_debugger (ia64_exception_context_t * frame)
-{
-    /*
-     * Create an own TCB for the kernel debugger, including stacks.
-     */
-    static whole_tcb_t __kdb_tcb 
-	__attribute__ ((aligned (sizeof (whole_tcb_t))));
-    tcb_t * kdb_tcb = (tcb_t *) &__kdb_tcb;
-
-
-    /*
-     * Make sure only one processor enters the kernel debugger at a
-     * time.  Needed since we share the kernel debuger TCB among all
-     * processors.
-     */
-    kdb_lock.lock ();
-
-    /*
-     * Make sure that current stack pointer does not point into the
-     * middle of the exception frame.
-     */
-    tcb_t * current = addr_to_tcb (frame);
-    current->stack = (word_t *)
-	((word_t) frame - sizeof (ia64_switch_context_t));
-
-    /*
-     * Store various info in the kernel debugger TCB so that we can
-     * use catch exceptions on it and also invoke tcb_t specific
-     * methods (like get_current_space()) on it.
-     */
-    kdb_tcb->set_space (get_current_space ());
-    kdb_tcb->get_arch ()->phys_addr = virt_to_phys ((addr_t) kdb_tcb);
-
-    asm ("	;;						\n"
-	 "	// Store arguments into non-stacked registers	\n"
-	 "	mov	r14 = %[stack]				\n"
-	 "	mov	r15 = %[regstack]			\n"
-	 "	mov	b6  = %[entry]				\n"
-	 "	mov	r16 = %[frame]				\n"
-	 "							\n"
-	 "	// Switch physical TCB location			\n"
-	 "	mov	r19 = "MKSTR(r_PHYS_TCB_ADDR)" ;;	\n"
-	 "	mov	"MKSTR(r_PHYS_TCB_ADDR)" = %[tcb_phys]	\n"
-	 "							\n"
-	 "	// Store stuff which is not clobbered by asm	\n"
-	 "	mov	r17 = ar.pfs				\n"
-	 "	mov	r18 = rp				\n"
-	 "							\n"
-	 "	// Make a call so that we can get CFM		\n"
-	 "	br.call.sptk.many rp = 1f			\n"
-	 "							\n"
-	 "	// Store current SP and RSE settings		\n"
-	 "1:	alloc	loc0 = ar.pfs,0,8,1,0 ;;		\n"
-	 "	mov	loc1 = sp				\n"
-	 "	mov	loc2 = ar.rsc				\n"
-	 "	mov	loc3 = ar.bsp				\n"
-	 "	;;						\n"
-	 "	flushrs						\n"
-	 "	mov	ar.rsc = 0 ;;				\n"
-	 "	mov	loc4 = ar.rnat				\n"
-	 "	mov	loc5 = r17				\n"
-	 "	mov	loc6 = r18				\n"
-	 "	mov	loc7 = r19				\n"
-	 "	add	r20 = %[off_rnat], r16			\n"
-	 "	add	r21 = %[off_bspst], r16			\n"
-	 "	invala						\n"
-	 "							\n"
-	 "	// Switch to debuggers SP and RSP		\n"
-	 "	mov	ar.bspstore = r15 ;;			\n"
-	 "	mov	ar.rnat = 0				\n"
-	 "	mov	sp   = r14				\n"
-	 "							\n"
-	 "	// Invoke kernel debugger			\n"
-	 "	mov	out0 = r16				\n"
-	 "	st8	[r20] = loc4	      // ar.rnat (kern)	\n"
-	 "	st8	[r21] = loc3	      // ar.bsp (kern)	\n"
-	 "	br.call.sptk.many rp = b6			\n"
-	 "							\n"
-	 "	// Restore old SP and RSE settings		\n"
-	 "	mov	ar.pfs = loc0				\n"
-	 "	mov	sp  = loc1				\n"
-	 "	;;						\n"
-	 "	flushrs						\n"
-	 "	mov	ar.rsc = 0 ;;				\n"
-	 "	invala						\n"
-	 "	mov	ar.bspstore = loc3 ;;			\n"
-	 "	mov	ar.rnat = loc4				\n"
-	 "	movl	r14 = 1f ;;				\n"
-	 "	mov	rp  = r14 ;;				\n"
-	 "	mov	r17 = loc5				\n"
-	 "	mov	r18 = loc6				\n"
-	 "	mov	r19 = loc7				\n"
-	 "							\n"
-	 "	// Do return to reset CFM to old value		\n"
-	 "	br.ret.sptk.many rp				\n"
-	 "							\n"
-	 "	// Restore non-clobbered registers		\n"
-	 "1:	mov	rp  = r18				\n"
-	 "	mov	ar.pfs = r17 ;;				\n"
-	 "	mov	r14 = pmc[r0] ;;			\n"	
-	 "	dep	r14 = 0,r14,0,1 ;;			\n"
-	 "	mov	pmc[r0] = r14 ;;			\n"
-	 "							\n"
-	 "	// Switch back to original TCB location		\n"
-	 "	mov	"MKSTR(r_PHYS_TCB_ADDR)" = r19		\n"
-	 :
-	 :
-	 [tcb_phys]	"r" (virt_to_phys (kdb_tcb)),
-	 [stack]	"r" (kdb_tcb->get_stack_top ()),
-	 [regstack]	"r" (kdb_tcb->get_reg_stack_bottom ()),
-	 [entry]	"r" (((word_t *) get_kip ()->kdebug_entry)[0]),
-	 [frame]	"r" (frame),
-	 [off_rnat]	"i" (offsetof (ia64_exception_context_t, rnat_kern)),
-	 [off_bspst]	"i" (offsetof (ia64_exception_context_t,bspstore_kern))
-	 :
-	 CALLER_SAVED_REGS, CALLEE_SAVED_REGS, "memory");
-
-    kdb_lock.unlock();
-}
-
-
-extern "C" void handle_exception (word_t num, ia64_exception_context_t * frame)
-{
-    addr_t iip = frame->iip;
-    psr_t ipsr = frame->ipsr;
-    cr_isr_t isr = frame->isr;
-
-    printf ("Interruption %d (%s) @ %p:  ipsr=%p  isr=%p\n",
-	    num, interruption_names[num],
-	    addr_offset (iip, isr.instruction_slot * 6),
-	    ipsr.raw, isr.raw);
-
-    enter_debugger (frame);
-}
-
-extern "C" void handle_break (ia64_exception_context_t * frame)
-{
-    tcb_t * current = addr_to_tcb (frame);
-    space_t * space = current->get_space ();
-
-    extern word_t _initial_register_stack;
-    extern word_t _initial_stack;
-
-    // Sanity check
-    if (! space->is_tcb_area (frame) &&
-	addr_to_tcb (frame) != get_idle_tcb () &&
-	((word_t *) frame < &_initial_register_stack ||
-	 (word_t *) frame > &_initial_stack))
-    {
-	printf ("handle_break(): frame not in TCB area (%p)\n", frame);
-	ia64_dump_frame (frame);
-
-	printf ("\nPress any key to reboot!\n");
-	getc ();
-
-	efi_runtime_services->reset_system
-	    (efi_runtime_services_t::warm,
-	     efi_runtime_services_t::success,
-	     0, NULL);
-
-	/* NOTREACHED */
-	for (;;);
-    }
-    
-    ia64_instr_t i0, i1, i2;
-    ia64_bundle_t bundle;
-
-    if (space->is_user_area (frame->iip))
-    {
-	// Read user-level instruction.  Instruction may not be in
-	// DTLB, so we read it using the physical address instead.
-	bool readable = 
-	    space->readmem (frame->iip, &bundle.raw64[0]) &&
-	    space->readmem (addr_offset (frame->iip, sizeof (word_t)),
-			    &bundle.raw64[1]);
-	if (! readable)
-	{
-	    // Should not happen
-	    enter_kdebug ("break: unreadable user-memory");
-	    return;
-	}
-    }
-    else
-    {
-	// Instruction in kernel area.  This area is mapped by TRs.
-	bundle.raw64[0] = ((word_t *) frame->iip)[0];
-	bundle.raw64[1] = ((word_t *) frame->iip)[1];
-
-    }
-
-    i0 = bundle.slot (0);
-    i1 = bundle.slot (1);
-    i2 = bundle.slot (2);
-
-    /*
-     * Check for KernelInterface() syscall.  The KernelInterface()
-     * syscall has the following format.
-     *
-     *   { .mlx
-     *   (qp)  break.m	0x1face
-     *   (qp)  movl	r0 = 0x0
-     *	       ;;
-     *   }
-     */
-    if (bundle.get_template () == ia64_bundle_t::mlx_s3 &&
-	i0.m_nop.is_break () && i0.m_nop.immediate () == 0x1face &&
-	i2.x_movl.is_movl () && i2.x_movl.reg () == 0 &&
-	i2.x_movl.immediate (i1) == 0)
-    {
-	// Fill in return values
-
-	frame->r8  = (u64_t) space->get_kip_page_area ().get_base ();
-	frame->r9  = get_kip ()->api_version;
-	frame->r10 = get_kip ()->api_flags;
-	frame->r11 = (4 << 24) | (1 << 16);
-	frame->unat &= ~(0xf << 8);
-
-	TRACEPOINT (SYSCALL_KERNEL_INTERFACE,
-		    printf ("SYS_KERNEL_INTERFACE: [%p @ %p]\n",
-			    get_current_tcb (), frame->iip));
-
-	// Skip past instruction bundle
-
-	frame->iip = addr_offset (frame->iip, 16);
-	frame->ipsr.ri = 0;
-    }
-
-    /*
-     * Check if break instruction is a kdebug operation.  Kdebug
-     * operations have the following format:
-     *
-     *   { .mlx
-     *   (qp)  break.m	<type>
-     *   (qp)  movl	r0 = <arg>
-     *	       ;;
-     *   }
-     */
-    else if (bundle.get_template () == ia64_bundle_t::mlx_s3 &&
-	     i0.m_nop.is_break () &&
-	     i2.x_movl.is_movl () && i2.x_movl.reg () == 0)
-    {
-	enter_debugger (frame);
-
-	// Skip past instruction bundle
-
-	frame->iip = addr_offset (frame->iip, 16);
-	frame->ipsr.ri = 0;
-    }
-
-    else
-    {
-	printf ("break 0x%x @ %p (frame=%p)\n",
-		frame->iim, frame->iip, frame);
-
-	frame->exception_num = 0; // Avoid instruction decoding
-	enter_debugger (frame);
-    }
-}
-
-
-extern "C" void handle_debug_event (ia64_exception_context_t * frame)
-{
-    enter_debugger (frame);
-}
-
-extern "C" void handle_int (word_t vector, ia64_exception_context_t * frame)
-{
-    printf ("Interrupt --- vector: %p,  frame: %p\n", vector, frame);
-    enter_debugger (frame);
-}
diff --git a/kernel/src/glue/v4-ia64/fpage.h b/kernel/src/glue/v4-ia64/fpage.h
deleted file mode 100644
index b56e4e00..00000000
--- a/kernel/src/glue/v4-ia64/fpage.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/fpage.h
- * Description:   architecture specific flexpage declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fpage.h,v 1.3 2005/05/19 08:38:10 stoess Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_IA64__FPAGE_H__
-#define __GLUE__V4_IA64__FPAGE_H__
-
-#include INC_API(generic-archfpage.h)
-
-#endif /* !__GLUE__V4_IA64__FPAGE_H__ */
diff --git a/kernel/src/glue/v4-ia64/hwspace.h b/kernel/src/glue/v4-ia64/hwspace.h
deleted file mode 100644
index 4d3c54e7..00000000
--- a/kernel/src/glue/v4-ia64/hwspace.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/hwspace.h
- * Description:   Conversion functions for hardware space addresses
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: hwspace.h,v 1.6 2003/09/24 19:04:37 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__HWSPACE_H__
-#define __GLUE__V4_IA64__HWSPACE_H__
-
-#include INC_ARCH(rr.h)
-
-
-/**
- * Convert an address of any type from virtual to physical.
- * @param x	virtual address
- * @return phsyical address
- */
-#define virt_to_phys(x) ((typeof (x)) (IA64_RR_MASK (x) - \
-	                               CONFIG_IA64_PHYSMEM_OFFSET))
-
-
-/**
- * Convert an address of any type from physical to virtual.
- * @param x	physical address
- * @return virtual address
- */
-#define phys_to_virt(x) ((typeof (x)) (IA64_RR_BASE (7) + IA64_RR_MASK (x) \
-				       + CONFIG_IA64_PHYSMEM_OFFSET))
-
-
-/**
- * Convert an address of any type from physical to virtual (uncacheable).
- * @param x	physical address
- * @return virtual address in uncacheable address range
- */
-#define phys_to_virt_uc(x) ((typeof (x)) (IA64_RR_BASE (6) + IA64_RR_MASK (x) \
-				          + CONFIG_IA64_PHYSMEM_OFFSET))
-
-
-/*
- * Functions for switching physical/vitual mode.
- */
-extern "C" void ia64_switch_to_phys (void);
-extern "C" void ia64_switch_to_virt (void);
-
-
-#define RID_PHYS_MEM		(1)
-#define RID_PHYS_MEM_UC		(2)
-#define RID_TCB			(3)
-
-
-#endif /* !__GLUE__V4_IA64__HWSPACE_H__ */
diff --git a/kernel/src/glue/v4-ia64/init.cc b/kernel/src/glue/v4-ia64/init.cc
deleted file mode 100644
index b966c396..00000000
--- a/kernel/src/glue/v4-ia64/init.cc
+++ /dev/null
@@ -1,541 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/init.cc
- * Description:   V4 initialization for IA-64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: init.cc,v 1.45 2004/03/30 17:33:02 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kmemory.h>
-#include <tcb_layout.h>
-#include <mapping.h>
-
-#include INC_API(kernelinterface.h)
-#include INC_API(schedule.h)
-#include INC_API(tcb.h)
-#include INC_API(processor.h)
-#include INC_API(procdesc.h)
-
-#include INC_ARCH(pal.h)
-#include INC_ARCH(sal.h)
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-#include INC_ARCH(rr.h)
-#include INC_ARCH(itc_timer.h)
-#include INC_ARCH(ia64.h)
-
-#include INC_GLUE(smp.h)
-#include INC_GLUE(memory.h)
-#include INC_GLUE(registers.h)
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(smp.h)
-
-#include INC_PLAT(bootinfo.h)
-
-EXTERN_KMEM_GROUP (kmem_misc);
-
-// Number of virtual address bits implemented in the CPU
-word_t ia64_num_vaddr_bits;
-
-
-// Min-state save area for Machine Checks
-addr_t ia64_mc_save_area;
-
-
-/**
- * Tick rate of platform clock.
- */
-word_t platform_freq;
-
-
-void init_efi (addr_t, word_t, word_t, u32_t, addr_t);
-void init_sal (void);
-void init_pal (void);
-void ipanic (const char * str);
-void purge_complete_tc (void);
-
-
-static void cmc_handler (word_t irq, ia64_exception_context_t * frame);
-
-
-#if defined(CONFIG_SMP)
-
-extern "C" void _start_ap (void);
-word_t ap_wakeup_vector = 0xf0;
-
-
-/**
- * Initialize application processors
- */
-static bool SECTION (".init")
-init_application_processors (void)
-{
-    TRACE_INIT ("Initializing application processors\n");
-
-    init_xcpu_handling ();
-
-    /* Set the rendezvous function */
-    void (*rendez_func)(void) = _start_ap;
-    ((word_t *) rendez_func)[0] = virt_to_phys (((word_t *) rendez_func)[0]);
-    ((word_t *) rendez_func)[1] = virt_to_phys (((word_t *) rendez_func)[1]);
- 
-    sal_status_e stat;
-    if ((stat = sal_set_boot_rendez (rendez_func, 256)) != SAL_OK)
-    {
-	TRACE_INIT ("Error: sal_set_boot_rendez() => %ld\n", (long) stat);
-	return false;
-    }
-
-    for (cpuid_t cpu = 1; cpu <= CONFIG_SMP_MAX_CPUS; cpu++)
-    {
-	if (! smp_is_processor_available (cpu))
-	    continue;
-
-	smp_startup_processor (cpu, ap_wakeup_vector);
-	if (! smp_wait_for_processor (cpu))
-	    printf ("Failed to start processor %d\n", cpu);
-    }
-
-    return true;
-}
-#endif /* CONFIG_SMP */
-
-/**
- * Perform processor local initialization.  Invoked once for each
- * processor in the system.
- */
-static void SECTION (".init")
-init_cpu (cpuid_t cpuid)
-{
-    get_kernel_space ()->init_cpu_mappings (cpuid);
-
-    // Purge all translation caches
-
-    purge_complete_tc ();
-
-    // Mask Perf Mon, Machine Check, LINT0, and LINT1 signals
-
-    cr_ivec_t ivec = 0;
-    ivec.m = 1;
-
-    cr_set_pmv (ivec);
-    cr_set_lrr0 (ivec);
-    cr_set_lrr1 (ivec);
-
-    ivec.m = 0;
-    ivec.vector = 2;
-    cr_set_cmcv (ivec);
-    get_interrupt_ctrl ()->register_handler (2, cmc_handler);
-
-    ia64_srlz_d ();
-
-    // Calculate ITC tick rate
-
-    word_t proc, bus, itc, itc_freq, proc_freq;
-    pal_status_e pstatus;
-
-    if ((pstatus = pal_freq_ratios (&proc, &bus, &itc)) != PAL_OK)
-	panic ("pal_freq_ratios() => %d\n", (long) pstatus);
-
-    itc_freq = platform_freq * (itc >> 32) / (itc & 0xffffffff);
-    proc_freq = platform_freq * (itc >> 32) / (itc & 0xffffffff);
-    TRACE_INIT ("ITC freq: %dMHz\n", itc_freq / 1000000);
-
-    procdesc_t * pdesc = get_kip ()->processor_info.get_procdesc (cpuid);
-    pdesc->arch1 = itc_freq;
-
-    // Enable periodic timer
-
-    get_itc_ptimer ()->init_cpulocal (IVEC_TIMER);
-    get_itc_ptimer ()->setup (itc_freq / (1000000 / get_timer_tick_length ()));
-
-    cr_set_tpr (cr_tpr_t::some_enabled (14));
-
-    // Register processor with KIP
-
-    init_processor (cpuid, platform_freq / 1000, proc_freq / 1000);
-}
-
-
-DEFINE_SPINLOCK (initial_stack_lock);
-
-static void SECTION (".init") finalize_cpu_init (word_t cpu_id)
-{
-    cpuid_t cpuid = cpu_id;
-    initial_stack_lock.unlock ();
-
-#if defined(CONFIG_SMP)
-    // Mark CPU as being active
-    smp_processor_online (cpuid);
-
-    if (cpuid == 0 && ! init_application_processors ())
-	printf ("Error while initializing MP system --- "
-		"running with single CPU\n");
-#endif
-
-    printf ("Finalized CPU %d\n", cpuid);
-}
-
-
-/**
- * Initialize kernel debugger with initial boot memory, and register
- * kernel memory in the kernel info page.
- */
-static void SECTION (".init")
-init_bootmem (void)
-{
-    kmem.init (start_bootmem, end_bootmem);
-
-    /* Register reservations in kernel interface page. */
-    get_kip ()->reserved_mem0.set (addr_align (start_text_phys, KB (4)),
-				   addr_align_up (end_text_phys, KB (4)));
-    get_kip ()->reserved_mem1.set (addr_align (start_bootmem_phys, KB (4)),
-				   addr_align_up (end_bootmem_phys, KB (4)));
-
-    get_kip ()->memory_info.insert (memdesc_t::reserved, false,
-				    addr_align (start_text_phys, KB (4)),
-				    addr_align_up (end_text_phys, KB (4)));
-    get_kip ()->memory_info.insert (memdesc_t::reserved, false,
-				    addr_align (start_bootmem_phys, KB (4)),
-				    addr_align_up (end_bootmem_phys, KB (4)));
-}
-
-static void cmc_handler (word_t irq, ia64_exception_context_t * frame)
-{
-    printf ("Corrected Machine Check @ %p\n", frame->iip);
-    enter_kdebug ("corrected machine check");
-}
-
-
-/**
- * Register a min-state save area for Machine Checks.
- */
-static void SECTION (".init")
-init_mc (void)
-{
-    return;
-
-    ia64_mc_save_area = kmem.alloc (kmem_misc, KB (4));
-
-    addr_t addr = virt_to_phys (ia64_mc_save_area);
-    TRACE_INIT ("Registering Machine Check min-state save area @ %p\n", addr);
-    addr = (addr_t) ((word_t) addr | (1UL << 63));
-
-    pal_status_e status;
-    if ((status = pal_mc_register_mem (addr)) != PAL_OK)
-	printf ("Error: PAL_MC_REGISTER_MEM => %d\n", status);
-}	
-
-
-/**
- * Set up a pinned translation for the system call stubs.
- */
-static void SECTION (".init")
-setup_syscall_stubs (void)
-{
-    extern word_t _syscall_stubs, _syscall_stubs_phys;
-
-    translation_t tr (true, translation_t::write_back, true, true, 0,
-		      translation_t::xp_rx, &_syscall_stubs_phys, true);
-
-    itrmap.add_map (tr, &_syscall_stubs, 14, 0);
-
-    // Also add a DTR mapping (for debugging reasons)
-    tr.set (true, translation_t::write_back, true, true, 0,
-	    translation_t::rwx, &_syscall_stubs_phys, true);
-    dtrmap.add_map (tr, &_syscall_stubs, 14, 0);
-}
-
-
-/**
- * Set up region registers for physical memory access.
- */
-static void SECTION (".init")
-init_region_regs (void)
-{
-    rr_t rr;
-    rr.set (false, RID_PHYS_MEM, 28);
-    rr.put (7);
-    ia64_srlz_d ();
-    rr.set (false, RID_PHYS_MEM_UC, 28);
-    rr.put (6);
-    ia64_srlz_d ();
-
-    if ((KTCB_AREA_START >> 61) != 5)
-	ipanic ("TCB region != 5");
-
-    // For the boot CPU the region regiser for TCB area is set in
-    // init_kernel_space().
-    extern space_t * kernel_space;
-
-#if defined(__GNUC__) && __GNUC__ >= 3 && __GNUC_MINOR__ >= 3
-    space_t * ks = kernel_space;
-#else
-    // We're not running in virtual mode yet, so use the physical
-    // address when grabbing the kernel space.
-    space_t * ks = *(virt_to_phys (&kernel_space));
-#endif
-
-    if (ks != NULL)
-    {
-	rr.set (false, ks->get_region_id (), KTCB_ALLOC_SIZE_SHIFT);
-	rr.put (5);
-	ia64_srlz_d ();
-    }
-}
-
-
-/**
- * Perform architecture (IA-64) specific initialization.
- * Initialization is global to all processors in the system.
- */
-static void SECTION (".init")
-init_arch (void)
-{
-    init_sal ();
-    init_pal ();
-
-    init_bootmem ();
-    init_mc ();
-
-    // Initialize interrupt controller
-
-    get_interrupt_ctrl ()->init_arch ();
-
-    // Check if TCB area is inside implemented virtual address range
-
-    pal_vm_summary_t info;
-    pal_status_e pstatus;
-    if ((pstatus = pal_vm_summary (&info)) != PAL_OK)
-	panic ("pal_vm_summary() => %d", pstatus);
-
-    ia64_num_vaddr_bits = info.impl_virtual_addtress_msb;
-    get_kip ()->memory_info.insert (memdesc_t::conventional, true, NULL,
-				    (addr_t) (1UL << ia64_num_vaddr_bits));
-
-    if ((KTCB_AREA_END & ~(7UL << 61)) > 1UL << ia64_num_vaddr_bits)
-	panic ("TCB area in unimplemented virtual address range "
-	       "(max %d bits).\n", ia64_num_vaddr_bits);
-
-    // Confirm that SP to RSE offset is valid
-
-    if ((KTCB_SIZE - IA64_SP_TO_RSE_OFFSET <= OFS_TCB_KERNEL_STACK) ||
-	(IA64_SP_TO_RSE_OFFSET & 0x1ff) != 0)
-	panic ("Invalid IA64_SP_TO_RSE_OFFSET (0x%x)\n",
-	       IA64_SP_TO_RSE_OFFSET);
-
-    // Check for UNAT collision of sp in exception frame
-
-    if (((offsetof (ia64_exception_context_t, r12) >> 3) & 63 >=
-	 (offsetof (ia64_exception_context_t, r1)  >> 3) & 63) &&
-	((offsetof (ia64_exception_context_t, r12) >> 3) & 63 <=
-	 (offsetof (ia64_exception_context_t, r31) >> 3) & 63))
-	panic ("UNAT collision for sp in exception frame (position=%d)\n",
-	       offsetof (ia64_exception_context_t, r12) >> 3);
-
-    // Check that FP registers in exception frame are properly aligned
-
-    if (((sizeof (ia64_exception_context_t) -
-	  offsetof (ia64_exception_context_t, f6)) & 0xf) != 0)
-	panic ("FP registers in exception frame not properly aligned\n");
-
-    // Check that exception frame is multiple of 16
-
-    if ((sizeof (ia64_exception_context_t) & 0xf) != 0)
-	panic ("Exception frame not multiple of 16\n");
-
-    // Get platform tick rate
-
-    word_t drift;
-    sal_status_e sstatus;
-
-    if ((sstatus = sal_freq_base (sal_freq_base_t::platform,
-				  &platform_freq, &drift)))
-	panic ("sal_freq_base() => %d\n", (long) sstatus);
-
-    // Initialize kernel debugger
-
-    if (get_kip ()->kdebug_init)
-	get_kip ()->kdebug_init ();
-}
-
-
-extern "C" void SECTION (".init")
-startup_system (efi_bootinfo_t * bootinfo)
-{
-    if (! bootinfo || ! bootinfo->is_valid ())
-	ipanic ("Invalid bootinfo parameter\n");
-
-    // We are running on valid kernel stacks
-    asm volatile ("mov " MKSTR (r_KERNEL_STACK_COUNTER) "=2;;");
-
-    // Create a physical "TCB location" for the init stack.  Needed in
-    // order to save exception context in the right memory location.
-    extern word_t _initial_stack;
-    asm volatile ("mov " MKSTR (r_PHYS_TCB_ADDR) "=%0"
-		  :
-		  :"r" (virt_to_phys (addr_to_tcb (&_initial_stack))));
-
-    init_region_regs ();
-
-    // Map first 256 MB for instruction and data
-    translation_t tr (1, translation_t::write_back, 1, 1,
-		      0, translation_t::rwx, (addr_t) 0, 0);
-
-    tr.put_itr (0, phys_to_virt ((addr_t) 0), HUGE_PGSIZE, 0);
-    tr.put_dtr (0, phys_to_virt ((addr_t) 0), HUGE_PGSIZE, 0);
-
-    // We are now able to run in virtual mode
-    ia64_switch_to_virt ();
-    
-    // Initialize translation mappings
-    itrmap.init ();
-    dtrmap.init ();
-
-    // We already added the mappings.  Just put them into the TR maps.
-    itrmap.add_map (tr, phys_to_virt ((addr_t) 0), HUGE_PGSIZE, 0, false);
-    dtrmap.add_map (tr, phys_to_virt ((addr_t) 0), HUGE_PGSIZE, 0, false);
-	
-    // Map next 256 MB for data only
-    tr.set (1, translation_t::write_back, 1, 1,
-	    0, translation_t::rwx, (addr_t) MB (256), 0);
-    dtrmap.add_map (tr, phys_to_virt ((addr_t) MB (256)), HUGE_PGSIZE, 0);
-
-    // Map first 256 MB of memory as unchachable data
-    tr.set (1, translation_t::uncacheable, 1, 1,
-	    0, translation_t::rwx, (addr_t) 0, 0);
-    dtrmap.add_map (tr, phys_to_virt_uc ((addr_t) 0), HUGE_PGSIZE, 0);
-
-    // Create a local copy of the bootinfo structure
-    static efi_bootinfo_t bootinfo_copy;
-
-    // We might have to create a temporary mapping for accessing the
-    // original bootinfo structure
-    bootinfo = phys_to_virt (bootinfo);
-    if (! dtrmap.is_mapped (bootinfo))
-    {
-	tr.set (1, translation_t::write_back, 1, 1,
-		0, translation_t::rwx, virt_to_phys (bootinfo), 0);
-	dtrmap.add_map (tr, bootinfo, HUGE_PGSIZE, 0);
-
-	bootinfo_copy = *bootinfo;
-
-	dtrmap.free_map (bootinfo);
-    }
-    else
-	bootinfo_copy = *bootinfo;
-
-    bootinfo = &bootinfo_copy;
-
-    if (bootinfo->memmap)
-	bootinfo->memmap = phys_to_virt (bootinfo->memmap);
-    if (bootinfo->systab)
-	bootinfo->systab = phys_to_virt (bootinfo->systab);
-
-    init_efi ((addr_t) bootinfo->memmap, (word_t) bootinfo->memmap_size,
-	      (word_t) bootinfo->memdesc_size, bootinfo->memdesc_version,
-	      (addr_t) bootinfo->systab);
-
-    init_console ();
-    init_hello ();
-
-    /* PRINTING IS NOW ALLOWED. */
-
-    init_arch ();
-    setup_syscall_stubs ();
-    init_cpu (0);
-
-    get_itc_ptimer ()->init_global (IVEC_TIMER);
-
-    get_kip ()->init ();
-
-    init_mdb ();
-    init_kernel_space ();
-
-    get_current_scheduler()->init (true);
-    get_idle_tcb ()->notify (finalize_cpu_init, 0);
-    get_current_scheduler()->start ();
-
-    /* NOTREACHED */
-    for (;;)
-	enter_kdebug ("spin");
-}
-
-
-/**
- * Initialize all translation registers.
- */
-extern "C" int sprintf(char* obuf, const char* format, ...);
-void SECTION (".init") init_translations (void)
-{
-    // Copy instruction translations
-    for (word_t n = 1; n < itrmap.num_entries (); n++)
-    {
-	if (itrmap.is_free[n])
-	    continue;
-	itrmap.put (n, 0);
-    }
-
-    // Copy data translations
-    for (word_t n = 1; n < dtrmap.num_entries (); n++)
-    {
-	if (dtrmap.is_free[n])
-	    continue;
-	dtrmap.put (n, 0);
-    }
-}
-
-#if defined(CONFIG_SMP)
-
-extern "C" void SECTION (".init") startup_ap (cpuid_t cpuid)
-{
-    // We are running on valid kernel stacks
-    asm volatile ("mov " MKSTR (r_KERNEL_STACK_COUNTER) "=2;;");
-
-    init_region_regs ();
-
-    // Map first 256 MB for instruction and data
-    translation_t tr (1, translation_t::write_back, 1, 1,
-		      0, translation_t::rwx, (addr_t) 0, 0);
-    
-    tr.put_itr (0, phys_to_virt ((addr_t) 0), HUGE_PGSIZE, 0);
-    tr.put_dtr (0, phys_to_virt ((addr_t) 0), HUGE_PGSIZE, 0);
-
-    // We are now able to run in virtual mode
-    ia64_switch_to_virt ();
-
-    init_translations ();
-    init_cpu (cpuid);
-
-    get_current_scheduler()->init (false);
-    get_idle_tcb ()->notify (finalize_cpu_init, cpuid);
-    get_current_scheduler()->start (cpuid);
-
-    for (;;);
-}
-
-#endif
diff --git a/kernel/src/glue/v4-ia64/intctrl.cc b/kernel/src/glue/v4-ia64/intctrl.cc
deleted file mode 100644
index c936d079..00000000
--- a/kernel/src/glue/v4-ia64/intctrl.cc
+++ /dev/null
@@ -1,482 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004, 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/intctrl.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.cc,v 1.23 2006/05/24 09:41:47 stoess Exp $
- *                
- ********************************************************************/
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-#include INC_ARCH(cr.h)
-#include INC_ARCH(pib.h)
-#include INC_ARCH(ia64.h)
-#include INC_ARCH(iosapic.h)
-#include INC_API(types.h)
-
-#include <acpi.h>
-
-pib_t<phys_to_virt_uc (IA64_DEFAULT_PIB_ADDR)> pib;
-
-word_t interrupt_vector[256];
-
-intctrl_t intctrl;
-
-
-static void irq_handler (word_t irq, ia64_exception_context_t * frame);
-static void dummy_irq_handler (word_t irq, ia64_exception_context_t * frame);
-
-
-#if defined (CONFIG_SMP)
-
-class ia64_cpu_t
-{
-public:
-    word_t		id;
-    bool		avail;
-    volatile bool	active;
-
-public:
-    void init (void)
-	{ avail = false; }
-
-    void set (u8_t id, u8_t eid, bool active = true);
-
-    void set_active (bool active = true)
-	{ this->active = active; }
-
-    bool is_active (void) 
-	{ return active; }
-
-    bool is_avail (void) 
-	{ return avail; }
-
-    bool is_current_cpu (void)
-	{ return id == (cr_get_lid ().id << 8) | (cr_get_lid ().eid); }
-
-    u8_t get_id (void)
-	{ return (id >> 8); }
-
-    u8_t get_eid (void)
-	{ return (id & 0xff); }
-
-    u16_t get_id_eid (void)
-	{ return id; }
-};
-
-INLINE void ia64_cpu_t::set (u8_t id, u8_t eid, bool avail)
-{
-    this->id = (id << 8) | eid;
-    this->avail = avail;
-    this->active = false;
-}
-
-
-ia64_cpu_t processors[CONFIG_SMP_MAX_CPUS];
-
-void smp_startup_processor (cpuid_t cpu_id, word_t vector)
-{
-    ia64_cpu_t * cpu = &processors[cpu_id];
-
-    if (! cpu->is_avail () || cpu->is_active ())
-	return;
-
-    TRACEF ("cpu %d (id = 0x%04x), vec: %x\n", cpu_id, cpu->id, vector);
-
-    extern volatile word_t _ap_cpuid;
-    _ap_cpuid = cpu_id;
-
-    ia64_mf ();
-    pib.ipi (cpu->id, vector);
-}
-
-void smp_send_ipi (cpuid_t cpu_id, word_t vector)
-{
-    ia64_cpu_t * cpu = &processors[cpu_id];
-    pib.ipi (cpu->id, vector);
-}
-
-void smp_processor_online (cpuid_t cpu)
-{
-    processors[cpu].set_active ();
-}
-
-bool smp_is_processor_online (cpuid_t cpu)
-{
-    return processors[cpu].is_active ();
-}
-
-bool smp_is_processor_available (cpuid_t cpu)
-{
-    return processors[cpu].is_avail ();
-}
-
-bool smp_wait_for_processor (cpuid_t cpu)
-{
-    for (word_t i = 0; i < 1000000; i++)
-	if (processors[cpu].is_active ())
-	    return true;
-    return false;
-}
-
-cpuid_t smp_get_cpuid (void)
-{
-    for (word_t i = 0; i < CONFIG_SMP_MAX_CPUS; i++)
-	if (processors[i].is_current_cpu ())
-	    return i;
-    return ~0U;
-}
-
-#endif /* CONFIG_SMP */
-
-
-void intctrl_t::init_arch (void)
-{
-    // Perform hardware independent initialization of interrupt
-    // controller.
-
-    for (word_t i = 0; i < sizeof (interrupt_vector) / sizeof (word_t); i++)
-	register_handler (i, dummy_irq_handler);
-
-    for (word_t i = 0; i < INTCTRL_REDIR_ENTRIES; i++)
-	redir[i].init ();
-
-    num_irqs = 0;
-
-
-    // Perform hardware dependent initialization of interrupt
-    // controller.
-
-    acpi_rsdp_t * rsdp = acpi_rsdp_t::locate ();
-    addr_t mapped_addr = NULL;
-
-    if (rsdp == NULL)
-    {
-	printf ("Could not locate ACPI info\n");
-	return;
-    }
-
-    TRACE_INIT ("ACPI information found at %p\n", rsdp);
-
-    addr_t acpi_map = NULL;
-    if (! dtrmap.is_mapped (rsdp))
-    {
-	translation_t tr (true, translation_t::write_back, true, true, 0,
-			  translation_t::rwx, rsdp, 0);
-	dtrmap.add_map (tr, rsdp, HUGE_PGSIZE, 0);
-	acpi_map = rsdp;
-    }
-
-    acpi_rsdt_t * rsdt = rsdp->rsdt ();
-    acpi_xsdt_t * xsdt = rsdp->xsdt ();
-
-    if (acpi_map)
-	dtrmap.free_map (acpi_map);
-
-    if ((rsdt == NULL) && (xsdt == NULL))
-	return;
-
-    // Try locating madt in extended system desctriptor table
-
-    acpi_madt_t * madt = NULL;
-    if (xsdt != NULL)
-    {
-	if (! dtrmap.is_mapped (xsdt))
-	{
-	    translation_t tr (true, translation_t::write_back, true, true, 0,
-			      translation_t::rwx, xsdt, 0);
-	    dtrmap.add_map (tr, xsdt, HUGE_PGSIZE, 0);
-	    mapped_addr = xsdt;
-	}
-	madt = (acpi_madt_t *) xsdt->find ("APIC", madt);
-    }
-
-    // Try locating madt in root system desctriptor table
-
-    if ((madt == NULL) && (rsdt != NULL))
-    {
-	if (! dtrmap.is_mapped (rsdt))
-	{
-	    translation_t tr (true, translation_t::write_back, true, true, 0,
-			      translation_t::rwx, rsdt, true);
-	    dtrmap.add_map (tr, rsdt, HUGE_PGSIZE, 0);
-	    mapped_addr = rsdt;
-	}
-	madt = (acpi_madt_t *) rsdt->find ("APIC", madt);
-    }
-
-    if (madt == NULL)
-    {
-	TRACE_INIT ("Could not find MADT\n");
-	return;
-    }
-
-    if (madt->local_apic_addr != IA64_DEFAULT_PIB_ADDR)
-    {
-	printf ("Local APIC not at default location (%p != %p)\n",
-		madt->local_apic_addr, IA64_DEFAULT_PIB_ADDR);
-	return;
-    }
-
-#if defined(CONFIG_SMP)
-
-    for (word_t i = 0; i < CONFIG_SMP_MAX_CPUS; i++)
-	processors[i].init ();
-
-    acpi_madt_lsapic_t * p;
-    for (word_t i = 0; ((p = madt->lsapic (i)) != NULL); i++)
-    {
-	if (p->flags.enabled)
-	{
-	    if (p->apic_processor_id < CONFIG_SMP_MAX_CPUS)
-		processors[p->apic_processor_id].set (p->id, p->eid);
-	    else
-		printf ("Processor id exceeds MAX_CPUS (%d)\n",
-			p->apic_processor_id);
-	}
-    }
-
-    int numcpus = 0;
-    cr_lid_t lid = cr_get_lid ();
-    for (word_t i = 0; i < CONFIG_SMP_MAX_CPUS; i++)
-    {
-	ia64_cpu_t * cpu = &processors[i];
-	if (cpu->is_avail ())
-	{
-	    if (cpu->is_current_cpu ())
-	    {
-		cpu->set_active ();
-		if (i != 0)
-		{
-		    // Make sure that CPU 0 is the boot cpu
-		    ia64_cpu_t tmp = processors[i];
-		    processors[i] = processors[0];
-		    processors[0] = tmp;
-		}
-	    }
-	    numcpus++;
-	}
-    }
-       
-    TRACE_INIT ("Found %d active CPUs, boot CPU is %02x:%02x\n",
-		numcpus, processors[0].get_id (), processors[0].get_eid ());
-
-#endif /* CONFIG_SMP */
-
-    // Locate and initialize I/O APICs
-
-    acpi_madt_iosapic_t * ioap;
-    for (word_t i = 0; (ioap = madt->iosapic (i)) != NULL; i++)
-    {
-	iosapic_t * iosapic = phys_to_virt_uc ((iosapic_t *) ioap->address);
-	if (! dtrmap.is_mapped (iosapic))
-	{
-	    translation_t tr (true, translation_t::uncacheable, true, true,
-			      0, translation_t::rwx,
-			      (addr_t) ioap->address, true);
-	    dtrmap.add_map (tr, iosapic, HUGE_PGSIZE, 0);
-	}
-
-	TRACE_INIT ("Found I/O SAPIC @ %p: Id 0x%02x, Vectors %d-%d\n",
-		    ioap->address, ioap->id, ioap->irq_base,
-		    ioap->irq_base + iosapic->get_version ().max_redir);
-
-	init_iosapic (iosapic, ioap->irq_base);
-    }
-
-    addr_t local_apic = 0;
-    if (madt->local_apic_addr)
-	local_apic = phys_to_virt_uc ((addr_t) (word_t) madt->local_apic_addr);
-
-    // Free up temporary ACPI mapping
-
-    if (mapped_addr)
-	dtrmap.free_map (mapped_addr);
-
-    // Map local apic as uncacheable memory
-
-    if (local_apic && ! dtrmap.is_mapped (local_apic))
-    {
-	translation_t tr(true, translation_t::uncacheable, 
-			 true, true, 0, translation_t::rw,
-			 (addr_t) (word_t) madt->local_apic_addr, true);
-	dtrmap.add_map (tr, (addr_t) local_apic, HUGE_PGSIZE, 0);
-    }
-}
-
-
-void intctrl_t::init_iosapic (iosapic_t * iosapic, word_t irq_base)
-{
-    word_t maxirq = iosapic->get_version ().max_redir;
-
-    // Initialize all I/O SAPIC interrupts.  By default all interrupts
-    // are steered to CPU 0xFF:0xFF.  The kernel re-routes them later
-    // via set_cpu().
-
-    for (word_t i = 0; i <= maxirq; i++)
-    {
-	iosapic_redir_entry_t * r = &redir[irq_base + i];
-	r->set (iosapic, i);
-
-	if (irq_base + i < 16)
-	    r->entry.set (INTERRUPT_VECTOR_OFFSET + irq_base + i,
-			  iosapic_redir_t::high_active,
-			  iosapic_redir_t::edge,
-			  true, 0xffff);
-	else
-	    r->entry.set (INTERRUPT_VECTOR_OFFSET + irq_base + i,
-			  iosapic_redir_t::low_active,
-			  iosapic_redir_t::level,
-			  true, 0xffff);
-
-	register_handler (INTERRUPT_VECTOR_OFFSET + irq_base + i, irq_handler);
-
-	// Make sure that interrupt is masked and not routed to any CPU.
-
-	synch (irq_base + i);
-	if (! r->entry.is_edge_triggered ())
-	    eoi (irq_base + i);
-    }
-
-    // Possibly increase number of available IRQs.  Any holes in the
-    // IRQ list are handled correctly by not having the IRQ entries
-    // marked as valid.
-
-    if (irq_base + maxirq + 1 > num_irqs)
-	num_irqs = irq_base + maxirq + 1;
-}
-
-
-void intctrl_t::set_cpu (word_t irq, word_t cpu)
-{
-#if defined(CONFIG_SMP)
-    word_t id_eid = processors[cpu].get_id_eid ();
-#else
-    word_t id_eid = (cr_get_lid ().id << 8) | (cr_get_lid ().eid);
-#endif
-
-    if (redir[irq].entry.dest_id_eid != id_eid)
-    {
-	redir[irq].entry.set_cpu (id_eid);
-	synch (irq);
-	unmask (irq);
-    }
-}
-
-word_t intctrl_t::get_number_irqs (void)
-{
-    return num_irqs;
-}
-
-bool intctrl_t::is_irq_available (word_t irq)
-{
-    return redir[irq].is_valid ();
-}
-
-void intctrl_t::mask (word_t irq)
-{
-    ASSERT (redir[irq].is_valid ());
-
-    if (redir[irq].entry.is_edge_triggered ())
-    {
-	// Do not mask on the I/O SAPIC to avoid blocking all
-	// interrupts.
-	redir[irq].entry.mask_irq ();
-    }
-    else
-    {
-	// Can safely mask interrupts on the I/O SAPIC.
-	redir[irq].entry.mask_irq ();
-	synch (irq, true);
-    }
-}
-
-bool intctrl_t::unmask (word_t irq)
-{
-    ASSERT (redir[irq].is_valid ());
-
-    if (redir[irq].entry.is_edge_triggered ())
-    {
-	// Check if any interrupts have arrived while beeing masked.
-	if (redir[irq].pending)
-	{
-	    redir[irq].pending = false;
-	    return true;
-	}
-	redir[irq].entry.unmask_irq ();
-    }
-    else
-    {
-	redir[irq].entry.unmask_irq ();
-	synch (irq, true);
-    }
-
-    return false;
-}
-
-void intctrl_t::enable (word_t irq)
-{
-    redir[irq].entry.unmask_irq ();
-    synch (irq, true);
-}
-
-void intctrl_t::disable (word_t irq)
-{
-    redir[irq].pending = false;
-    redir[irq].entry.mask_irq ();
-    synch (irq, true);
-}
-
-INLINE void intctrl_t::handle_irq (word_t irq)
-{
-    if (redir[irq].entry.is_edge_triggered () &&
-	redir[irq].entry.mask)
-    {
-	// Just mark interrupt as pending so that we can receive it
-	// when unmasking the interrupt.
-	redir[irq].pending = true;
-	mask (irq);
-	return;
-    }
-
-    mask (irq);
-
-    if (! redir[irq].entry.is_edge_triggered ())
-	eoi (irq);
-
-    handle_interrupt (irq);
-}
-
-static void irq_handler (word_t vec, ia64_exception_context_t * frame)
-{
-    get_interrupt_ctrl ()->handle_irq (vec - INTERRUPT_VECTOR_OFFSET);
-}
-
-static void dummy_irq_handler (word_t irq, ia64_exception_context_t * frame)
-{
-}
diff --git a/kernel/src/glue/v4-ia64/intctrl.h b/kernel/src/glue/v4-ia64/intctrl.h
deleted file mode 100644
index 3b597395..00000000
--- a/kernel/src/glue/v4-ia64/intctrl.h
+++ /dev/null
@@ -1,140 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/intctrl.h
- * Description:   IA64 interrupt controller
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.11 2003/09/24 19:04:37 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__INTCTRL_H__
-#define __GLUE__V4_IA64__INTCTRL_H__
-
-#include <intctrl.h>
-#include INC_GLUE(context.h)
-#include INC_ARCH(iosapic.h)
-
-extern word_t interrupt_vector[256];
-
-
-#define IVEC_IPI		(238)
-#define IVEC_TIMER		(239)
-#define IVEC_PERFMON		(240)
-
-
-/**
- * Offset for first interrupt vector number available to user.
- */
-#define INTERRUPT_VECTOR_OFFSET		(16)
-
-
-#define INTCTRL_REDIR_ENTRIES		(CONFIG_MAX_IOAPICS * 64)
-
-class intctrl_t : public generic_intctrl_t
-{
-    class iosapic_redir_entry_t {
-    public:
-	iosapic_redir_t		entry;
-	iosapic_t		*iosapic;
-	word_t			line;
-	bool			pending;
-
-	/**
-	 * Initialize and invalidate I/O SAPIC redirection entry.
-	 */
-	void init (void)
-	    { iosapic = NULL; line = ~0UL; pending = false; }
-
-	/**
-	 * Set I/O SAPIC redirection entry.
-	 * @param apic		address of I/O SAPIC
-	 * @param irq		IRQ line on I/O SAPIC
-	 */
-	void set (iosapic_t * apic, word_t irq)
-	    { iosapic = apic; line = irq; }
-
-	/**
-	 * Determine whether IRQ is a valid interrupt line.
-	 * @return true if valid, false otherwise
-	 */
-	bool is_valid (void)
-	    { return line != ~0UL; }
-    };
-
-    iosapic_redir_entry_t redir[INTCTRL_REDIR_ENTRIES];
-    word_t num_irqs;
-
-public:
-
-    // Generic API.
-
-    void init_arch (void);
-    void set_cpu (word_t irq, word_t cpu);
-    void mask (word_t irq);
-    bool unmask (word_t irq);
-    void disable (word_t irq);
-    void enable (word_t irq);
-    
-    void handle_irq (word_t irq);
-    word_t get_number_irqs (void);
-    bool is_irq_available (word_t irq);
-
-    // Architecture dependent API.
-
-    void init_iosapic (iosapic_t * iosapic, word_t irq_base);
-
-    void register_handler (word_t vector,
-			   void (*handler)(word_t, ia64_exception_context_t *))
-	{ interrupt_vector[vector] = *(word_t *) handler; }
-
-    void synch (word_t irq, bool low_only = false)
-	{
-	    redir[irq].iosapic->set_redir (redir[irq].line,
-					   redir[irq].entry,
-					   low_only);
-	}
-
-    void eoi (word_t irq)
-	{ redir[irq].iosapic->eoi (irq + INTERRUPT_VECTOR_OFFSET); }
-
-    iosapic_redir_t get_redir (word_t irq)
-	{
-	    iosapic_redir_t ret;
-	    ret = redir[irq].iosapic->get_redir (redir[irq].line);
-	    return ret;
-	}
-};
-
-
-/**
- * @return pointer to interrupt controller
- */
-INLINE intctrl_t * get_interrupt_ctrl (void) 
-{
-    extern intctrl_t intctrl;
-    return &intctrl;
-}
-
-#endif /* !__GLUE__V4_IA64__INTCTRL_H__ */
diff --git a/kernel/src/glue/v4-ia64/ivt.S b/kernel/src/glue/v4-ia64/ivt.S
deleted file mode 100644
index 5254bee9..00000000
--- a/kernel/src/glue/v4-ia64/ivt.S
+++ /dev/null
@@ -1,577 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/ivt.S
- * Description:   IA-64 interrupt vector table
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ivt.S,v 1.34 2004/04/01 14:49:20 skoglund Exp $
- *                
- ********************************************************************/
-#include <asmsyms.h>
-#include INC_ARCH(asm.h)
-#include INC_GLUE(context_handle.h)
-#include INC_GLUE(space.h)
-
-#define BEG_IVT_ENTRY(num, offset, name)		;\
-	.org	ia64_vector_table + offset		;\
-	.globl	ivt_##name				;\
-ivt_##name:
-#define END_IVT_ENTRY(num, name)
-
-
-#define RESERVED(num, offset)				\
-	BEG_IVT_ENTRY(num, offset, reserved_##num)	;\
-	EXCEPTION (num)					;\
-	END_IVT_ENTRY(num, reserved_##num)
-
-
-#define xxENABLE_INTS()	(p2) ssm psr.i
-#define ENABLE_INTS()
-
-
-#define EXCEPTION(num)					\
-							;\
-arg_ip		= r31					;\
-arg_num		= r30					;\
-							;\
-1:	mov	arg_ip = ip				;\
-	mov	arg_num = num				;\
-	;;						;\
-	add	arg_ip = 2f-1b, arg_ip			;\
-	br.sptk.many save_context			;\
-							;\
-2:	alloc	r14 = ar.pfs,0,0,2,0			;\
-	mov	out0 = num				;\
-	mov	out1 = sp				;\
-	add	sp = -16,sp ;;				;\
-	br.call.sptk.many rp = handle_exception		;\
-	add	sp = 16,sp				;\
-	ENABLE_INTS()					;\
-	br.sptk.many load_context			;\
-	/* NOTREACHED */				;\
-	rfi
-
-#define SAVE_EXCEPTION_CONTEXT_CALL(num)		\
-							;\
-arg_ip		= r31					;\
-arg_num		= r30					;\
-							;\
-1:	mov	arg_ip = ip				;\
-	mov	arg_num = num				;\
-	;;						;\
-	add	arg_ip = 2f-1b, arg_ip			;\
-	br.sptk.many save_context			;\
-2:	
-
-
-#define HANDLE_EXCEPTION_SHORT(num, func)		\
-							;\
-arg_ip		= r31					;\
-arg_num		= r30					;\
-							;\
- 1:	mov	arg_ip = ip				;\
-	mov	arg_num = num				;\
-	;;						;\
-	add	arg_ip = 2f-1b, arg_ip			;\
-	br.sptk.many save_context			;\
-							;\
-2:	alloc	r14 = ar.pfs,0,0,1,0			;\
-	mov	out0 = sp				;\
-	add	sp = -16,sp ;;				;\
-	br.call.sptk.many rp = func			;\
-	add	sp = 16,sp				;\
-	ENABLE_INTS()					;\
-	br.sptk.many load_context			;\
-	/* NOTREACHED */				;\
-	rfi
-
-
-
-	.section	.ivt, "ax"
-	.p2align	15
-	.global		ia64_vector_table
-ia64_vector_table:
-
-
-/*
-**
-**	Interrupt Vector Table
-**
-*/
-
-
-
-	//
-	// VHPT Translation
-	//
-BEG_IVT_ENTRY (0, 0x0000, vhpt_translation)
-	EXCEPTION (0)
-END_IVT_ENTRY (0, vhpt_translation)
-
-
-	//
-	// Intsruction TLB
-	//
-BEG_IVT_ENTRY (1, 0x0400, instruction_tlb)
-	EXCEPTION (1)
-END_IVT_ENTRY (1, instruction_tlb)
-
-
-	//
-	// Data TLB
-	//
-BEG_IVT_ENTRY (2, 0x0800, data_tlb)
-	EXCEPTION (2)
-END_IVT_ENTRY (2, data_tlb)
-
-
-	//
-	// Alternate Instruction TLB
-	//
-BEG_IVT_ENTRY (3, 0x0c00, alternate_instruction)
-	SAVE_EXCEPTION_CONTEXT_CALL (3)
-	alloc	r14 = ar.pfs,0,0,1,0
-	mov	out0 = sp
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = handle_vhpt_miss
-	add	sp = 16, sp
-	ENABLE_INTS()
-	br.sptk.many load_context
-	/* NOTREACHED */
-END_IVT_ENTRY (3, alternate_instruction)
-
-
-	//
-	// Alternate Data TLB
-	//
-BEG_IVT_ENTRY (4, 0x1000, alternate_data)
-
-	// Check if we faulted on page containing our own TCB
-	mov	r16 = cr.ifa
-	mov	r17 = r_KERNEL_SP
-	mov	r18 = pr
-	mov	r19 = cr.ipsr
-	;;
-	add	r17 = -1, r17
-	;;
-	dep	r16 = 0, r16, 0, KTCB_ALLOC_SIZE_SHIFT
-	dep	r17 = 0, r17, 0, KTCB_ALLOC_SIZE_SHIFT
-	tbit.nz	p6,p7 = r19,33		// Is user-level?
-	;;
-(p7)	cmp.eq	p7,p0 = r16,r17		// Is current TCB?
-	;;
-(p7)	br.spnt handle_tcb_fault
-	mov	pr = r18, 0x1ffff
-	;;
-	SAVE_EXCEPTION_CONTEXT_CALL (4)
-
-	alloc	r14 = ar.pfs,0,0,1,0
-	mov	out0 = sp
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = handle_vhpt_miss
-	add	sp = 16, sp
-	ENABLE_INTS()
-	br.sptk.many load_context
-	/* NOTREACHED */
-
-#define TCB_PAGE_TRANSLATION_BITS		\
-	((1 << 0) |	/* Present */		\
-	 (0 << 2) |	/* Write-back */	\
-	 (1 << 5) |	/* Accessed */		\
-	 (1 << 6) |	/* Dirty */		\
-	 (0 << 7) |	/* Privilege level 0 */	\
-	 (2 << 9))	/* Read-write */
-
-handle_tcb_fault:
-	mov	pr = r18, 0x1ffff
-	dep.z	r16 = KTCB_ALLOC_SIZE_SHIFT, 2, 7
-	mov	r17 = r_PHYS_TCB_ADDR
-	movl	r18 = TCB_PAGE_TRANSLATION_BITS
-	;;
-	mov	cr.itir = r16
-	or	r17 = r17, r18
-	;;
-	itc.d	r17
-	rfi
-END_IVT_ENTRY (4, alternate_data)
-
-
-	//
-	// Data Nested TLB
-	//
-BEG_IVT_ENTRY (5, 0x1400, data_nested_tlb)
-	EXCEPTION (5)
-END_IVT_ENTRY (5, data_nested_tlb)
-
-
-	//
-	// Instruction Key Miss
-	//
-BEG_IVT_ENTRY (6, 0x1800, instruction_key_miss)
-	EXCEPTION (6)
-END_IVT_ENTRY (6, instruction_key_miss)
-
-
-	//
-	// Data Key Miss
-	//
-BEG_IVT_ENTRY (7, 0x1c00, data_key_miss)
-	EXCEPTION (7)
-END_IVT_ENTRY (7, data_key_miss)
-
-
-	//
-	// Dirty-Bit
-	//
-BEG_IVT_ENTRY (8, 0x2000, dirty_bit)
-	SAVE_EXCEPTION_CONTEXT_CALL (8)
-	alloc	r14 = ar.pfs,0,0,1,0
-	mov	out0 = sp
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = handle_reference_bits
-	add	sp = 16, sp
-	ENABLE_INTS()
-	br.sptk.many load_context
-	/* NOTREACHED */
-END_IVT_ENTRY (8, dirty_bit)
-
-
-	//
-	// Instruction Access-Bit
-	//
-BEG_IVT_ENTRY (9, 0x2400, instruction_access_bit)
-	SAVE_EXCEPTION_CONTEXT_CALL (9)
-	alloc	r14 = ar.pfs,0,0,1,0
-	mov	out0 = sp
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = handle_reference_bits
-	add	sp = 16, sp
-	ENABLE_INTS()
-	br.sptk.many load_context
-	/* NOTREACHED */
-END_IVT_ENTRY (9, instruction_access_bit)
-
-
-	//
-	// Data Access-Bit
-	//
-BEG_IVT_ENTRY (10, 0x2800, data_access_bit)
-	SAVE_EXCEPTION_CONTEXT_CALL (10)
-	alloc	r14 = ar.pfs,0,0,1,0
-	mov	out0 = sp
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = handle_reference_bits
-	add	sp = 16, sp
-	ENABLE_INTS()
-	br.sptk.many load_context
-	/* NOTREACHED */
-END_IVT_ENTRY (10, data_access_bit)
-
-
-	//
-	// Break Instruction
-	//
-BEG_IVT_ENTRY (11, 0x2c00, break_instruction)
-	HANDLE_EXCEPTION_SHORT (11, handle_break)
-END_IVT_ENTRY (11, break_instruction)
-
-
-	//
-	// External Interrupt
-	//
-BEG_IVT_ENTRY (12, 0x3000, external_interrupt)
-//	SAVE_EXCEPTION_CONTEXT_CALL (12)
-
-arg_ip		= r31
-arg_ivr		= r30
-
-	mov	arg_ivr = cr.ivr
-1:	mov	arg_ip = ip
-	;;
-	add	arg_ip = 3f-1b, arg_ip
-	br.sptk.many save_context_extint
-
-2:	mov	ret0 = cr.ivr
-	;;
-3:	alloc	r14 = ar.pfs,0,2,2,0
-	mov	out0 = ret0
-	mov	out1 = sp
-
-#if 0
-	;;
-	mov	loc0 = out0
-	mov	loc1 = out1
-	;;
-	add	out0 = 80*4, loc0
-	add	sp = -16, sp
-	br.call.sptk.few rp = spin_wheel
-	add	sp = 16, sp
-	mov	out0 = loc0
-	mov	out1 = loc1
-#endif
-
-	add	r15 = @gprel(interrupt_vector), gp
-	;;
-	srlz.d
-	cmp.eq	p6,p0 = 15, out0	// Check for spurious interrupt
-	shladd	r15 = out0, 3, r15
-	;;
-(p6)	br.sptk.many load_context
-	mov	cr.eoi = r0
-	ld8	r14 = [r15]
-	;;
-	srlz.d
-	;;
-	mov	b6 = r14
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = b6
-	add	sp = 16, sp
-	br.sptk.few 2b
-	/* NOTREACHED */
-END_IVT_ENTRY (12, external_interrupt)
-
-	RESERVED (13, 0x3400)
-	RESERVED (14, 0x3800)
-	RESERVED (15, 0x3c00)
-	RESERVED (16, 0x4000)
-	RESERVED (17, 0x4400)
-	RESERVED (18, 0x4800)
-	RESERVED (19, 0x4c00)
-
-
-	//
-	// Page Not Present
-	//
-BEG_IVT_ENTRY (20, 0x5000, page_not_present)
-	EXCEPTION (20)
-END_IVT_ENTRY (20, page_not_present)
-
-
-	//
-	// Key Permission
-	//
-BEG_IVT_ENTRY (21, 0x5100, key_permission)
-	EXCEPTION (21)
-END_IVT_ENTRY (21, key_permission)
-
-
-	//
-	// Instruction Access Rights
-	//
-BEG_IVT_ENTRY (22, 0x5200, instuction_access_rights)
-	SAVE_EXCEPTION_CONTEXT_CALL (22)
-	alloc	r14 = ar.pfs,0,0,1,0
-	mov	out0 = sp
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = handle_access_rights_fault
-	add	sp = 16, sp
-	ENABLE_INTS()
-	br.sptk.many load_context
-	/* NOTREACHED */
-END_IVT_ENTRY (22, instuction_access_rights)
-
-
-	//
-	// Data Acess Rights
-	//
-BEG_IVT_ENTRY (23, 0x5300, data_access_rights)
-	SAVE_EXCEPTION_CONTEXT_CALL (23)
-	alloc	r14 = ar.pfs,0,0,1,0
-	mov	out0 = sp
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = handle_access_rights_fault
-	add	sp = 16, sp
-	ENABLE_INTS()
-	br.sptk.many load_context
-	/* NOTREACHED */
-END_IVT_ENTRY (23, data_access_rights)
-
-
-	//
-	// General Exception
-	//
-BEG_IVT_ENTRY (24, 0x5400, general_exception)
-	EXCEPTION (24)
-END_IVT_ENTRY (24, general_exception)
-
-
-	//
-	// Disabled FP-Register
-	//
-BEG_IVT_ENTRY (25, 0x5500, disabled_fp_register)
-	SAVE_EXCEPTION_CONTEXT_CALL (25)
-	alloc	r14 = ar.pfs,0,0,1,0
-	mov	out0 = sp
-	add	sp = -16, sp
-	;;
-	br.call.sptk.many rp = handle_disabled_fp
-	add	sp = 16, sp
-	ENABLE_INTS()
-	br.sptk.many load_context
-	/* NOTREACHED */
-END_IVT_ENTRY (25, disabled_fp_register)
-
-
-	//
-	// NaT Consumption
-	//
-BEG_IVT_ENTRY (26, 0x5600, nat_consumption)
-	EXCEPTION (26)
-END_IVT_ENTRY (26, nat_consumption)
-
-
-	//
-	// Speculation
-	//
-BEG_IVT_ENTRY (27, 0x5700, speculation)
-	EXCEPTION (27)
-END_IVT_ENTRY (27, speculation)
-
-	RESERVED (28, 0x5800)
-
-	//
-	// Debug
-	//
-BEG_IVT_ENTRY (29, 0x5900, debug)
-	HANDLE_EXCEPTION_SHORT (29, handle_debug_event)
-END_IVT_ENTRY (29, debug)
-
-
-	//
-	// Unaligned Reference
-	//
-BEG_IVT_ENTRY (30, 0x5a00, unaligned_reference)
-	EXCEPTION (30)
-END_IVT_ENTRY (30, unaligned_reference)
-
-
-	//
-	// Unsupported Data Reference
-	//
-BEG_IVT_ENTRY (31, 0x5b00, unsupported_data_reference)
-	EXCEPTION (31)
-END_IVT_ENTRY (31, unsupported_data_reference)
-
-
-	//
-	// Floating-point Fault
-	//
-BEG_IVT_ENTRY (32, 0x5c00, floating_point_fault)
-	EXCEPTION (32)
-END_IVT_ENTRY (32, floating_point_fault)
-
-
-	//
-	// Floating-point Trap
-	//
-BEG_IVT_ENTRY (33, 0x5d00, floating_point_trap)
-	EXCEPTION (33)
-END_IVT_ENTRY (33, floating_point_trap)
-
-
-	//
-	// Lower-Privilege Transfer Trap
-	//
-BEG_IVT_ENTRY (34, 0x5e00, lower_privilege_xfer_trap)
-	EXCEPTION (34)
-END_IVT_ENTRY (34, lower_privilege_xfer_trap)
-
-
-	//
-	// Taken Branch Trap
-	//
-BEG_IVT_ENTRY (35, 0x5f00, taken_branch)
-	HANDLE_EXCEPTION_SHORT (35, handle_debug_event)
-END_IVT_ENTRY (35, taken_branch)
-
-
-	//
-	// Single Step Trap
-	//
-BEG_IVT_ENTRY (36, 0x6000, single_step)
-	HANDLE_EXCEPTION_SHORT (36, handle_debug_event)
-END_IVT_ENTRY (36, single_step)
-
-	RESERVED (37, 0x6100)
-	RESERVED (38, 0x6200)
-	RESERVED (39, 0x6300)
-	RESERVED (40, 0x6400)
-	RESERVED (41, 0x6500)
-	RESERVED (42, 0x6600)
-	RESERVED (43, 0x6700)
-	RESERVED (44, 0x6800)
-
-
-	//
-	// IA-32 Exception
-	//
-BEG_IVT_ENTRY (45, 0x6900, ia32_exception)
-	EXCEPTION (45)
-END_IVT_ENTRY (45, ia32_exception)
-
-
-	//
-	// IA-32 Intercept
-	//
-BEG_IVT_ENTRY (46, 0x6a00, ia32_intercept)
-	EXCEPTION (46)
-END_IVT_ENTRY (46, ia32_intercept)
-
-
-	//
-	// IA-32 Interrupt
-	//
-BEG_IVT_ENTRY (47, 0x6b00, ia32_interrupt)
-	EXCEPTION (47)
-END_IVT_ENTRY (47, ia32_interrupt)
-
-	RESERVED (48, 0x6c00)
-	RESERVED (49, 0x6d00)
-	RESERVED (50, 0x6e00)
-	RESERVED (51, 0x6f00)
-	RESERVED (52, 0x7000)
-	RESERVED (53, 0x7100)
-	RESERVED (54, 0x7200)
-	RESERVED (55, 0x7300)
-	RESERVED (56, 0x7400)
-	RESERVED (57, 0x7500)
-	RESERVED (58, 0x7600)
-	RESERVED (59, 0x7700)
-	RESERVED (60, 0x7800)
-	RESERVED (61, 0x7900)
-	RESERVED (62, 0x7a00)
-	RESERVED (63, 0x7b00)
-	RESERVED (64, 0x7c00)
-	RESERVED (65, 0x7d00)
-	RESERVED (66, 0x7e00)
-	RESERVED (67, 0x7f00)
diff --git a/kernel/src/glue/v4-ia64/ktcb.h b/kernel/src/glue/v4-ia64/ktcb.h
deleted file mode 100644
index f57cd249..00000000
--- a/kernel/src/glue/v4-ia64/ktcb.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/ktcb.h
- * Description:   IA-64 specific part of KTCB.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ktcb.h,v 1.7 2003/11/06 18:45:47 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__KTCB_H__
-#define __GLUE__V4_IA64__KTCB_H__
-
-class arch_ktcb_t
-{
-    /* TCB_START_MARKER */
-public:
-    word_t	scratch;	/* For creating TCBs */
-    addr_t	phys_addr;	/* Physical address of TCB */
-    word_t	num_dirty;	/* Number of dirty user registers
-				   on kernel's registers stack (/8) */
-  
-    /* TCB_END_MARKER */
-};
-
-#endif /* !__GLUE__V4_IA64__KTCB_H__ */
diff --git a/kernel/src/glue/v4-ia64/map.h b/kernel/src/glue/v4-ia64/map.h
deleted file mode 100644
index bd80b52f..00000000
--- a/kernel/src/glue/v4-ia64/map.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2005,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/map.h
- * Description:   architecture specific mapping declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: map.h,v 1.3 2005/05/19 08:39:48 stoess Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_IA64__MAP_H__
-#define __GLUE__V4_IA64__MAP_H__
-
-#include INC_API(generic-archmap.h)
-
-#endif /* !__GLUE__V4_IA64__MAP_H__ */
diff --git a/kernel/src/glue/v4-ia64/memcontrol.cc b/kernel/src/glue/v4-ia64/memcontrol.cc
deleted file mode 100644
index 652d6b03..00000000
--- a/kernel/src/glue/v4-ia64/memcontrol.cc
+++ /dev/null
@@ -1,247 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003, 2005,  University of New South Wales
- *                
- * File path:     glue/v4-ia64/memcontrol.cc
- * Description:   Temporary memory_control implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: memcontrol.cc,v 1.6 2005/06/03 15:47:15 skoglund Exp $
- *                
- ********************************************************************/
-
-#include INC_API(config.h)
-#include INC_API(tcb.h)
-#include INC_API(thread.h)
-#include INC_API(fpage.h)
-#include INC_GLUE(syscalls.h)
-#include INC_API(syscalls.h)
-
-#include <kdb/tracepoints.h>
-
-DECLARE_TRACEPOINT(SYS_MEMORY_CONTROL);
-
-enum attribute_e {
-    a_l4default		= 0,
-    a_uncached		= 1,
-    a_write_back	= 2,
-    a_write_through	= 3,
-    a_write_through_noalloc = 4,
-#ifdef CONFIG_SMP
-    a_coherent		= 5,
-#endif
-    a_flush		= 31,
-};
-
-
-#include INC_ARCH(pgent.h)
-#include INC_API(space.h)
-#include INC_GLUE(space.h)
-#include <linear_ptab.h>
-
-static inline addr_t fpaddress (fpage_t fp, word_t size)
-{
-    return (addr_t) (fp.raw & ~((1UL << size) - 1));
-}
-
-/**
- * @param fpage		fpage to change
- * @param attrib	new fpage attributes
- *
- * @returns 
- */
-word_t attrib_fpage (tcb_t *current, fpage_t fpage, attribute_e attrib)
-{
-    pgent_t::pgsize_e size, pgsize;
-    pgent_t * pg;
-    addr_t vaddr;
-    word_t num;
-
-    pgent_t *r_pg[pgent_t::size_max];
-    word_t r_num[pgent_t::size_max];
-    space_t *space = current->get_space();
-
-    num = fpage.get_size_log2 ();
-    vaddr = fpaddress (fpage, num);
-
-    if (num < hw_pgshifts[0])
-    {
-	current->set_error_code(EINVALID_PARAM);  /* Invalid fpage */
-	return 1;
-    }
-
-    /*
-     * Some architectures may not support a complete virtual address
-     * space.  Enforce attrib to only cover the supported space.
-     */
-
-    if (num > hw_pgshifts[pgent_t::size_max+1])
-	num = hw_pgshifts[pgent_t::size_max+1];
-
-    /*
-     * Find pagesize to use, and number of pages to map.
-     */
-
-    for (pgsize = pgent_t::size_max; hw_pgshifts[pgsize] > num; pgsize--) {}
-
-    num = 1UL << (num - hw_pgshifts[pgsize]);
-    size = pgent_t::size_max;
-    pg = space->pgent (page_table_index (size, vaddr));
-
-    while (num)
-    {
-	translation_t::memattrib_e new_att = translation_t::write_back;
-
-	if (! space->is_user_area (vaddr))
-	    /* Do not mess with kernel area. */
-	    break;
-
-	if (size > pgsize)
-	{
-	    /* We are operating on too large page sizes. */
-	    if (! pg->is_valid (space, size))
-		break;
-	    else if (pg->is_subtree (space, size))
-	    {
-		size--;
-		pg = pg->subtree (space, size+1)->next
-		    (space, size, page_table_index (size, vaddr));
-		continue;
-	    }
-	    else
-	    {
-		/* page is too large */
-		current->set_error_code(EINVALID_PARAM);  /* Invalid fpage */
-		return 1;
-	    }
-	}
-
-	if (! pg->is_valid (space, size))
-	    goto Next_entry;
-
-	if (pg->is_subtree (space, size))
-	{
-	    /* We have to modify each single page in the subtree. */
-	    size--;
-	    r_pg[size] = pg;
-	    r_num[size] = num - 1;
-
-	    pg = pg->subtree (space, size+1);
-	    num = page_table_size (size);
-	    continue;
-	}
-
-	if (space->is_mappable (vaddr))
-	{
-	    space->flush_tlbent (space, vaddr, page_shift (size));
-
-	    switch (attrib)
-	    {
-	    case a_l4default: new_att = translation_t::write_back; break;
-	    case a_uncached: new_att = translation_t::uncacheable; break;
-	    case a_write_back: new_att = translation_t::write_back; break;
-	    default:
-		/* invalid attribute */
-		current->set_error_code(EINVALID_PARAM);  /* Invalid attribute */
-		return 1;
-	    }
-
-	    pg->translation() -> set_memattrib (new_att);
-	}
-
-    Next_entry:
-
-	pg = pg->next (space, size, 1);
-	vaddr = addr_offset (vaddr, page_size (size));
-	num--;
-    }
-
-    return 0;
-}
-
-SYS_MEMORY_CONTROL (word_t control, word_t attribute0, word_t attribute1,
-		    word_t attribute2, word_t attribute3)
-{
-    tcb_t * current = get_current_tcb();
-    space_t *space = current->get_space();
-    word_t fp_idx, att;
-
-    TRACEPOINT (SYS_MEMORY_CONTROL, 
-		printf ("SYS_MEMORY_CONTROL: control=%lx, attribute0=%lx, "
-			"attribute1=%lx, attribute2=%lx, attribute3=%lx\n",
-    			control, attribute0, attribute1, attribute2,
-    			attribute3));
-
-    if (control >= IPC_NUM_MR)
-    {
-	current->set_error_code(EINVALID_PARAM);  /* Invalid parameter */
-	return_memory_control();
-    }
-
-    for (fp_idx = 0; fp_idx <= control; fp_idx++)
-    {
-	fpage_t fpage;
-	addr_t addr;
-	pgent_t * pg;
-	pgent_t::pgsize_e pgsize;
-
-	fpage.raw = current->get_mr(fp_idx);
-
-	/* nil pages act as a no-op */
-	if (fpage.is_nil_fpage() )
-	    continue;
-
-	switch(fpage.raw & 0x3)
-	{
-	    case 0: att = attribute0; break;
-	    case 1: att = attribute1; break;
-	    case 2: att = attribute2; break;
-	    default: att = attribute3; break;
-	}
-
-	// invalid request - thread not privileged
-	if (!is_privileged_space(get_current_space()) && (att < 31))
-	{
-	    current->set_error_code(ENO_PRIVILEGE);  /* No priviledge */
-	    return_memory_control();
-	}
-
-	addr = fpaddress (fpage, fpage.get_size_log2 ());
-	// Check if mapping exist in page table
-	if (!space->lookup_mapping (addr, &pg, &pgsize))
-	{
-	    if (!is_sigma0_space(current->get_space()))
-	    {
-		current->set_error_code(ENO_PRIVILEGE);  /* No priviledge */
-		return_memory_control();
-	    }
-
-	    space->map_sigma0(addr);
-	}
-
-	if (attrib_fpage(current, fpage, (attribute_e)att))
-	    return_memory_control();
-    }
-
-    return_memory_control();
-}
diff --git a/kernel/src/glue/v4-ia64/memory.h b/kernel/src/glue/v4-ia64/memory.h
deleted file mode 100644
index 59946b9f..00000000
--- a/kernel/src/glue/v4-ia64/memory.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/memory.h
- * Description:   V4 IA-64 memory defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: memory.h,v 1.3 2003/09/24 19:04:37 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__MEMORY_H__
-#define __GLUE__V4_IA64__MEMORY_H__
-
-/*
- * Symbols defined by linker script.
- */
-
-/* Boot memory */
-extern char _start_bootmem[];
-extern char _end_bootmem[];
-extern char _start_bootmem_phys[];
-extern char _end_bootmem_phys[];
-
-/* Kernel code and data */
-extern char _start_text_phys[];
-extern char _end_text_phys[];
-extern char _start_text[];
-extern char _end_text[];
-
-/* CPU local memory */
-extern char _start_cpu_local[];
-extern char _end_cpu_local[];
-extern char _start_cpu_local_mem[];
-extern char _end_cpu_local_mem[];
-
-/*
- * Wrapper macros to access linker symbols.
- */
-
-#define start_text_phys		((addr_t) _start_text_phys)
-#define end_text_phys		((addr_t) _end_text_phys)
-#define start_bootmem_phys	((addr_t) _start_bootmem_phys)
-#define end_bootmem_phys	((addr_t) _end_bootmem_phys)
-#define start_bootmem		((addr_t) _start_bootmem)
-#define end_bootmem		((addr_t) _end_bootmem)
-#define start_cpu_local		((addr_t) _start_cpu_local)
-#define end_cpu_local		((addr_t) _end_cpu_local)
-#define start_cpu_local_mem	((addr_t) _start_cpu_local_mem)
-#define end_cpu_local_mem	((addr_t) _end_cpu_local_mem)
-
-
-#endif /* !__GLUE__V4_IA64__MEMORY_H__ */
diff --git a/kernel/src/glue/v4-ia64/registers.h b/kernel/src/glue/v4-ia64/registers.h
deleted file mode 100644
index 40bd5f0b..00000000
--- a/kernel/src/glue/v4-ia64/registers.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/registers.h
- * Description:   IA-64 register association
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: registers.h,v 1.9 2003/09/24 19:04:37 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__REGISTERS_H__
-#define __GLUE__V4_IA64__REGISTERS_H__
-
-
-/*
- * User-level read-only registers
- */
-
-#define r_GLOBAL_ID		ar.k5
-#define r_LOCAL_ID		ar.k6
-#define r_KERNEL_SP		ar.k7
-#define r_PHYS_TCB_ADDR		ar.k3
-
-
-/**
- * Counter which keeps track of whether kernel stacks are currently
- * valid.  Counter increases by two upon each taken
- * exception/interruption, but may temporarily equal 1 if interruption
- * occurs within a syscall binding.
- *
- *   value == 0 - invalid SP, invalid AR.BSPSTORE
- *   value == 1 - valid SP, invalid AR.BSPSTORE
- *   value >= 2 - valid SP, valid AR.BSPSTORE
- *
- */
-#define r_KERNEL_STACK_COUNTER	ar.k4
-
-
-
-#endif /* !__GLUE__V4_IA64__REGISTERS_H__ */
diff --git a/kernel/src/glue/v4-ia64/resource_functions.h b/kernel/src/glue/v4-ia64/resource_functions.h
deleted file mode 100644
index b7c1be19..00000000
--- a/kernel/src/glue/v4-ia64/resource_functions.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/resource_functions.h
- * Description:   Functions for handling the ia64 specific resources
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resource_functions.h,v 1.6 2003/09/24 19:04:37 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__RESOURCE_FUNCTIONS_H__
-#define __GLUE__V4_IA64__RESOURCE_FUNCTIONS_H__
-
-#include INC_API(tcb.h)
-#include INC_API(resources.h)
-#include INC_ARCH(ia64.h)
-
-
-/**
- * Enable the copy area resource by initializing the copy area region
- * with the region register of our IPC partner.
- *
- * @param tcb			current TCB
- * @param partner		partner TCB
- */
-INLINE void thread_resources_t::enable_copy_area (tcb_t * tcb, tcb_t * partner)
-{
-    if (! tcb->resource_bits.have_resource (COPY_AREA))
-    {
-	// Associate the copy area region with the partner's space.
-	rr_t rr (false, partner->space->get_region_id (), 12);
-	rr.put (4);
-	ia64_srlz_d ();
-
-	tcb->resource_bits += COPY_AREA;
-	partner_rid = partner->space->get_region_id ();
-    }
-}
-
-
-/**
- * Disable the copy area resource by inserting an invalid region
- * register for the copy area.  We also flush the TLB entries in the
- * copy area since these are not necessarily flushed when when the TLB
- * entries in the main user area are flushed (depends on CPU
- * implementation).
- *
- * @param tcb			current TCB
- * @param disable_resource	disable copy-area resource or not
- */
-INLINE void thread_resources_t::disable_copy_area (tcb_t * tcb,
-						   bool disable_resource)
-{
-    if (tcb->resource_bits.have_resource (COPY_AREA))
-    {
-	// Disable access in the copy area reagion.
-	rr_t rr (false, 0, 12);
-	rr.put (4);
-	ia64_srlz_d ();
-
-	// Purge TLB entries for copy area.
-	purge_tc (ia64_phys_to_rr (4, (addr_t) 0), 61, partner_rid);
-
-	if (disable_resource)
-	    tcb->resource_bits -= COPY_AREA;
-    }
-}
-
-
-/**
- * Enable global breakpoint resource by modifying the psr.db bit of
- * the exception context and the switch context of the thread.  The
- * global breakpoint resource is handed off to the next thread during
- * a thread switch.
- *
- * @param tcb			tcb to enable breakpoints on
- */
-INLINE void thread_resources_t::enable_global_breakpoint (tcb_t * tcb)
-{
-    ia64_exception_context_t * user_frame =
-	(ia64_exception_context_t *) tcb->get_stack_top () - 1;
-    ia64_switch_context_t * kernel_frame =
-	(ia64_switch_context_t *) tcb->stack;
-
-    user_frame->ipsr.db = kernel_frame->psr.db = 1;
-
-    tcb->resource_bits += BREAKPOINT;
-}
-
-
-/**
- * Disable global breakpoint resource by modifying the psr.db bit of
- * the exception context and the switch context of the thread.
- *
- * @param tcb			tcb to enable breakpoints on
- */
-INLINE void thread_resources_t::disable_global_breakpoint (tcb_t * tcb)
-{
-    // Disable breakpoints in current context.
-    psr_t psr = get_psr ();
-    psr.db = 0;
-    set_psr_low (psr);
-    ia64_srlz_d ();
-    ia64_srlz_i ();
-
-    ia64_exception_context_t * user_frame =
-	(ia64_exception_context_t *) tcb->get_stack_top () - 1;
-    ia64_switch_context_t * kernel_frame =
-	(ia64_switch_context_t *) tcb->stack;
-
-    user_frame->ipsr.db = kernel_frame->psr.db = 0;
-
-    tcb->resource_bits -= BREAKPOINT;
-}
-
-
-/**
- * Enable global performance monitoring resource by modifying the
- * psr.db bit of the exception context and the switch context of the
- * thread.  The global performance monitoring resource is handed off
- * to the next thread during a thread switch.
- *
- * @param tcb			tcb to enable perfmon on
- */
-INLINE void thread_resources_t::enable_global_perfmon (tcb_t * tcb)
-{
-    ia64_exception_context_t * user_frame =
-	(ia64_exception_context_t *) tcb->get_stack_top () - 1;
-    ia64_switch_context_t * kernel_frame =
-	(ia64_switch_context_t *) tcb->stack;
-
-    user_frame->ipsr.pp = user_frame->ipsr.up =
-	kernel_frame->psr.pp = kernel_frame->psr.up = 1;
-
-    tcb->resource_bits += PERFMON;
-}
-
-
-/**
- * Disable global performance monitoring resource by modifying the
- * psr.db bit of the exception context and the switch context of the
- * thread.
- *
- * @param tcb			tcb to enable perfmon on
- */
-INLINE void thread_resources_t::disable_global_perfmon (tcb_t * tcb)
-{
-    // Disable performance counters in current context.
-    psr_t psr = get_psr ();
-    psr.pp = psr.up = 0;
-    set_psr_low (psr);
-    ia64_srlz_d ();
-    ia64_srlz_i ();
-
-    ia64_exception_context_t * user_frame =
-	(ia64_exception_context_t *) tcb->get_stack_top () - 1;
-    ia64_switch_context_t * kernel_frame =
-	(ia64_switch_context_t *) tcb->stack;
-
-    user_frame->ipsr.pp = user_frame->ipsr.up =
-	kernel_frame->psr.pp = kernel_frame->psr.up = 0;
-
-    tcb->resource_bits -= PERFMON;
-}
-
-#endif /* !__GLUE__V4_IA64__RESOURCE_FUNCTIONS_H__ */
diff --git a/kernel/src/glue/v4-ia64/resources.cc b/kernel/src/glue/v4-ia64/resources.cc
deleted file mode 100644
index 341abb3c..00000000
--- a/kernel/src/glue/v4-ia64/resources.cc
+++ /dev/null
@@ -1,222 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/resources.cc
- * Description:   Thread resource management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.cc,v 1.11 2004/06/01 14:43:30 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_API(tcb.h)
-#include INC_ARCH(rr.h)
-#include INC_GLUE(resources.h)
-
-#include <kdb/tracepoints.h>
-
-
-/**
- * Current owner of high floating-point registers.
- * 
- * High floating-point registers are not handled as a regular resource
- * (i.e., there is no resouce bit associated with owning the FP
- * registers).  Instead, the kernel enables/disables the high FP
- * registers by directly modifying the processor status register in
- * the user-contexts.  The invariant is that only the user-context of
- * FPHIGH_OWNER will have the high FP registers enabled.
- *
- * Not using a resource bit for the high FP registers enables most
- * thread switches to be performed without invoking a resource
- * save/load.  Enabling/disabling floating-point registers is as such
- * kept off the critical path.
- */
-static tcb_t * fphigh_owner UNIT ("cpulocal");
-
-
-DECLARE_TRACEPOINT (RESOURCES);
-DECLARE_TRACEPOINT (DISABLED_FP);
-
-DECLARE_KMEM_GROUP (kmem_resources);
-
-
-void thread_resources_t::dump (tcb_t * tcb)
-{
-    if (tcb->resource_bits.have_resource (COPY_AREA))
-	printf ("<copy-area, rid=%07x> ", partner_rid);
-    if (tcb->resource_bits.have_resource (BREAKPOINT))
-	printf ("<breakpoint> ");
-    if (tcb->resource_bits.have_resource (PERFMON))
-	printf ("<perfmon> ");
-
-    if (tcb->resource_bits.have_resources ())
-	printf ("\b");
-}
-
-void thread_resources_t::save (tcb_t * tcb, tcb_t * dest)
-{
-    TRACEPOINT (RESOURCES,
-		printf ("Resources save: tcb=%p  rsc=%p [",
-			tcb, (word_t) tcb->resource_bits);
-		dump (tcb);
-		printf ("]\n"));
-
-    if (tcb->resource_bits.have_resource (COPY_AREA))
-	disable_copy_area (tcb, false);
-
-    if (tcb->resource_bits.have_resource (BREAKPOINT))
-    {
-	disable_global_breakpoint (tcb);
-	enable_global_breakpoint (dest);
-    }
-
-    if (tcb->resource_bits.have_resource (PERFMON))
-    {
-	disable_global_perfmon (tcb);
-	enable_global_perfmon (dest);
-    }
-}
-
-void thread_resources_t::load (tcb_t * tcb)
-{
-    TRACEPOINT (RESOURCES,
-		printf ("Resources load: tcb=%p  rsc=%p [",
-			tcb, (word_t) tcb->resource_bits);
-		dump (tcb);
-		printf ("]\n"));
-
-    if (tcb->resource_bits.have_resource (COPY_AREA))
-    {
-	// Associate the copy area region with the partner's space.
-	rr_t rr (false, partner_rid, 12);
-	rr.put (4);
-	ia64_srlz_d ();
-    }
-}
-
-void thread_resources_t::purge (tcb_t * tcb)
-{
-    TRACEPOINT (RESOURCES,
-		printf ("Resources purge: tcb=%p  rsc=%p [",
-			tcb, (word_t) tcb->resource_bits);
-		dump (tcb);
-		printf ("]\n"));
-
-    if (tcb->resource_bits.have_resource (COPY_AREA))
-	disable_copy_area (tcb, false);
-
-    if (fphigh_owner == tcb)
-    {
-	// Spill registers to TCB and deassociate ownership
-	ia64_enable_fphigh ();
-	high_fp->save ();
-	ia64_disable_fphigh ();
-	fphigh_owner = NULL;
-    }
-}
-
-void thread_resources_t::free (tcb_t * tcb)
-{
-    TRACEPOINT (RESOURCES,
-		printf ("Resources free: tcb=%p  rsc=%p [",
-			tcb, (word_t) tcb->resource_bits);
-		dump (tcb);
-		printf ("]\n"));
-
-    if (tcb->resource_bits.have_resource (COPY_AREA))
-	disable_copy_area (tcb, false);
-
-    if (high_fp != NULL)
-    {
-	kmem.free (kmem_resources, high_fp, KB (2));
-	high_fp = NULL;
-
-	if (fphigh_owner == tcb)
-	    // Deassociate ownership
-	    fphigh_owner = NULL;
-    }
-}
-
-void thread_resources_t::init (tcb_t * tcb)
-{
-    tcb->resource_bits.init ();
-    if (tcb->is_interrupt_thread())
-	    tcb->resource_bits += INTERRUPT_THREAD;
-    partner_rid = 0;
-    high_fp = NULL;
-}
-
-
-
-/**
- * Handle access to disabled floating-point registers.  The kernel
- * (potentially) stores the current FP context to the current owner's
- * TCB, disables FP register access for current owner, loads FP
- * context for new owner, and enables FP register access for new
- * owner.
- *
- * @param tcb		current thread
- * @param frame		exception frame
- */
-void thread_resources_t::handle_disabled_fp (tcb_t * tcb,
-					     ia64_exception_context_t * frame)
-{
-    TRACEPOINT (DISABLED_FP,
-		printf ("FP disabled fault (%s%s):  cur=%p  owner=%p\n",
-			frame->isr.code & 0x1 ? "low" : "",
-			frame->isr.code & 0x2 ? "high" : "",
-			tcb, fphigh_owner));
-
-    ASSERT (fphigh_owner != tcb);	// Should always be different thread
-    ASSERT (~frame->isr.code & 0x1);	// Should not fault on lower FP regs
-
-    ia64_enable_fphigh ();
-    if (fphigh_owner != NULL)
-    {
-	// Save FP context into current owner's TCB.
-	fphigh_owner->resources.save_fp ();
-
-	// Disable high FP for current owner.
-	ia64_exception_context_t * ctx =
-	    ((ia64_exception_context_t *) fphigh_owner->get_stack_top ()) - 1;
-	ctx->ipsr.dfh = 1;
-    }
-
-    if (high_fp == NULL)
-	high_fp = (high_fp_t *) kmem.alloc (kmem_resources, KB (2));
-
-    // Restore FP context into registers.  Or, if thread is using high
-    // FP for the first time, reset FP context with nil-values.
-    high_fp->restore ();
-
-    // Enable high FP for new owner.
-    frame->ipsr.dfh = 0;
-    fphigh_owner = tcb;
-}
-
-
-extern "C" void handle_disabled_fp (ia64_exception_context_t * frame)
-{
-    tcb_t * current = get_current_tcb ();
-    current->resources.handle_disabled_fp (current, frame);
-}
diff --git a/kernel/src/glue/v4-ia64/resources.h b/kernel/src/glue/v4-ia64/resources.h
deleted file mode 100644
index 3d4f4b47..00000000
--- a/kernel/src/glue/v4-ia64/resources.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/resources.h
- * Description:   Resource definitions for ia64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.h,v 1.9 2004/04/13 06:32:19 cgray Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__RESOURCES_H__
-#define __GLUE__V4_IA64__RESOURCES_H__
-
-#include INC_GLUE(context.h)
-#include INC_ARCH(fp.h)
-
-#define HAVE_RESOURCE_TYPE_E
-enum resource_type_e {
-    COPY_AREA	= 0,
-    BREAKPOINT	= 1,
-    PERFMON	= 2,
-    INTERRUPT_THREAD = 3
-};
-
-class thread_resources_t : public generic_thread_resources_t
-{
-    word_t	partner_rid;
-    high_fp_t	*high_fp;	/* High floating-point registers */
-
-public:
-    void save (tcb_t * tcb, tcb_t * dest);
-    void load (tcb_t * tcb);
-    void purge (tcb_t * tcb);
-    void init (tcb_t * tcb);
-    void free (tcb_t * tcb);
-    void dump (tcb_t * tcb);
-
-    void enable_copy_area (tcb_t * tcb, tcb_t * partner);
-    void disable_copy_area (tcb_t * tcb, bool disable_resource);
-
-    void enable_global_breakpoint (tcb_t * tcb);
-    void disable_global_breakpoint (tcb_t * tcb);
-
-    void enable_global_perfmon (tcb_t * tcb);
-    void disable_global_perfmon (tcb_t * tcb);
-
-    void handle_disabled_fp (tcb_t * tcb, ia64_exception_context_t * frame);
-    void save_fp (void) { high_fp->save (); }
-    void load_fp (void) { high_fp->restore (); }
-};
-
-
-#endif /* !__GLUE__V4_IA64__RESOURCES_H__ */
diff --git a/kernel/src/glue/v4-ia64/sal.cc b/kernel/src/glue/v4-ia64/sal.cc
deleted file mode 100644
index 02b6a07b..00000000
--- a/kernel/src/glue/v4-ia64/sal.cc
+++ /dev/null
@@ -1,75 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/sal.cc
- * Description:   User-level interface to SAL procedures
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sal.cc,v 1.5 2003/09/24 19:05:35 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_GLUE(syscalls.h)
-#include INC_ARCH(sal.h)
-#include <kdb/tracepoints.h>
-
-
-DECLARE_TRACEPOINT (SYSCALL_SAL_CALL);
-
-
-SYS_SAL_CALL (word_t idx, word_t a1, word_t a2, word_t a3,
-	      word_t a4, word_t a5, word_t a6)
-{
-    switch (idx)
-    {
-    case SAL_PCI_CONFIG_READ:
-    case SAL_PCI_CONFIG_WRITE:
-	/*
-	 * Access to PCI configuration space.
-	 * TODO: Restrict access to configuration space.
-	 */
-
-	TRACEPOINT (SYSCALL_SAL_CALL,
-		    printf ("SYS_SAL_CALL: PCI_Config%s (%p, %d, %p)\n",
-			    idx == SAL_PCI_CONFIG_READ ? "Read" : "Write",
-			    a1, a2, a3));
-
-	return ia64_sal_entry ((sal_function_id_e) idx,
-			       a1, a2, a3, a4, a5, a6, 0);
-    }
-
-    /*
-     * Unsupported/unimplemented SAL call.
-     */
-
-    sal_return_t ret;
-    ret.status = SAL_UNIMPLEMENTED;
-    ret.raw[1] = ret.raw[2] = ret.raw[3] = 0;
-
-    TRACEPOINT (SYSCALL_SAL_CALL,
-		printf ("SYS_SAL_CALL: idx=%p (%p, %p, %p, %p, %p, %p)\n",
-			idx, a1, a2, a3, a4, a5, a6));
-
-    return ret;
-}
-
diff --git a/kernel/src/glue/v4-ia64/schedule.h b/kernel/src/glue/v4-ia64/schedule.h
deleted file mode 100644
index ed67467d..00000000
--- a/kernel/src/glue/v4-ia64/schedule.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/schedule.h
- * Description:   Scheduling functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: schedule.h,v 1.9 2003/09/24 19:04:37 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__SCHEDULE_H__
-#define __GLUE__V4_IA64__SCHEDULE_H__
-
-#include INC_GLUE(config.h)
-#include INC_ARCH(psr.h)
-#include INC_ARCH(cr.h)
-#include INC_API(smp.h)
-
-INLINE u64_t get_timer_tick_length (void)
-{
-    return TIMER_TICK_LENGTH;
-}
-
-/**
- * Sets the current processor asleep.
- */
-INLINE void processor_sleep (void)
-{
-    cr_tpr_t old_tpr = cr_get_tpr ();
-
-    cr_set_tpr (cr_tpr_t::all_enabled ());
-    ia64_srlz_d ();
-    enable_interrupts ();
-
-    for (word_t i = 0; i < 100; i++);
-
-    disable_interrupts ();
-    cr_set_tpr (old_tpr);
-}
-
-#endif /* !__GLUE__V4_IA64__SCHEDULE_H__ */
diff --git a/kernel/src/glue/v4-ia64/smp.cc b/kernel/src/glue/v4-ia64/smp.cc
deleted file mode 100644
index 5d484c2d..00000000
--- a/kernel/src/glue/v4-ia64/smp.cc
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/smp.cc
- * Description:   ia64 MP implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: smp.cc,v 1.6 2003/09/24 19:05:35 skoglund Exp $
- *                
- ********************************************************************/
-#if defined(CONFIG_SMP)
-
-#include INC_GLUE(intctrl.h)
-#include INC_API(smp.h)
-
-
-void handle_ipi (word_t vector, ia64_exception_context_t * frame)
-{
-    process_xcpu_mailbox ();
-}
-
-void smp_xcpu_trigger (cpuid_t cpu)
-{
-    smp_send_ipi (cpu, IVEC_IPI);
-}
-
-void SECTION (".init") init_xcpu_handling (void)
-{
-    get_interrupt_ctrl ()->register_handler (IVEC_IPI, handle_ipi);
-}
-
-#endif /* CONFIG_SMP */
diff --git a/kernel/src/glue/v4-ia64/smp.h b/kernel/src/glue/v4-ia64/smp.h
deleted file mode 100644
index 2aad7d5a..00000000
--- a/kernel/src/glue/v4-ia64/smp.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/smp.h
- * Description:   SMP definitions for ia64 V4.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: smp.h,v 1.4 2003/09/24 19:04:37 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__SMP_H__
-#define __GLUE__V4_IA64__SMP_H__
-#if defined(CONFIG_SMP)
-
-void smp_startup_processor (cpuid_t cpu_id, word_t vector);
-void smp_send_ipi (cpuid_t cpu_id, word_t vector);
-bool smp_wait_for_processor (cpuid_t cpu);
-void smp_processor_online (cpuid_t cpu);
-bool smp_is_processor_online (cpuid_t cpu_id);
-bool smp_is_processor_available (cpuid_t cpu_id);
-cpuid_t smp_get_cpuid (void);
-
-void SECTION (".init") init_xcpu_handling (void);
-
-#endif /* CONFIG_SMP */
-#endif /* !__GLUE__V4_IA64__SMP_H__ */
diff --git a/kernel/src/glue/v4-ia64/space.cc b/kernel/src/glue/v4-ia64/space.cc
deleted file mode 100644
index 8d30e988..00000000
--- a/kernel/src/glue/v4-ia64/space.cc
+++ /dev/null
@@ -1,562 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003, 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/space.cc
- * Description:   IA-64 V4 specific space management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.cc,v 1.48 2006/11/17 17:14:30 skoglund Exp $
- *                
- ********************************************************************/
-#include <debug.h>
-#include <kmemory.h>
-#include <kdb/tracepoints.h>
-#include <generic/lib.h>
-
-#include INC_GLUE(space.h)
-#include INC_GLUE(context.h)
-#include INC_GLUE(memory.h)
-#include INC_API(tcb.h)
-#include INC_API(kernelinterface.h)
-
-#include INC_ARCH(pgent.h)
-#include INC_ARCH(tlb.h)
-#include INC_ARCH(trmap.h)
-#include <linear_ptab.h>
-
-EXTERN_KMEM_GROUP (kmem_space);
-DECLARE_KMEM_GROUP (kmem_tcb);
-DECLARE_KMEM_GROUP (kmem_utcb);
-
-/**
- * kernel_space: global space used for holding kernel mappings
- */
-space_t * kernel_space = NULL;
-
-
-static tcb_t * dummy_tcb = NULL;
-
-static tcb_t * get_dummy_tcb (void)
-{
-    if (!dummy_tcb)
-    {
-	dummy_tcb = (tcb_t *) kmem.alloc (kmem_tcb,
-					  page_size (KTCB_ALLOC_SIZE));
-	ASSERT (dummy_tcb);
-	dummy_tcb = virt_to_phys (dummy_tcb);
-    }
-
-    return dummy_tcb;
-}
-
-
-INLINE word_t pagedir_idx (addr_t addr)
-{
-    return page_table_index (pgent_t::size_max, addr);
-}
-
-
-
-/**
- * space_t::init initializes the space_t
- *
- * Maps the kernel area and initializes shadow ptabs etc.
- */
-void space_t::init (fpage_t utcb_area, fpage_t kip_area)
-{
-    this->utcb_area = utcb_area;
-    this->kip_area = kip_area;
-
-    add_mapping (kip_area.get_base(),
-		 virt_to_phys ((addr_t) get_kip ()),
-		 pgent_t::size_4k, false,
-		 translation_t::write_back,
-		 translation_t::ro,
-		 translation_t::data,
-		 0);
-}
-
-
-extern "C" void * memcpy (void *, const void *, unsigned int);
-
-void space_t::init_cpu_mappings (cpuid_t cpuid)
-{
-    word_t cpu_local_size = (word_t) end_cpu_local - (word_t) start_cpu_local;
-    word_t mapsize = matching_pgsize (cpu_local_size);
-    if (mapsize == 0)
-	panic ("Size of CPU local memory too large (0x%x)", cpu_local_size);
-
-    if (addr_align (start_cpu_local, (1UL << mapsize)) != start_cpu_local)
-    {
-	panic ("Virtual location of CPU local memory is not properly "
-	       "aligned (location=%p size=%p)\n",
-	       start_cpu_local, (1UL << mapsize));
-    }
-
-    // Size of allocated CPU local memory need not match the mapsize.
-    word_t alloc_size = (1 << 12);
-    while (alloc_size < cpu_local_size)
-	alloc_size <<= 1;
-
-    EXTERN_KMEM_GROUP (kmem_misc);
-
-    addr_t cpu_local_memory;
-    if (cpuid == 0)
-    {
-	if (addr_align (start_cpu_local_mem, (1UL << mapsize)) !=
-	    start_cpu_local_mem)
-	{
-	    // Memory in kernel image not properly aligned.
-	    TRACE_INIT ("CPU local memory in kernel image not properly "
-			"aligned.  Creating a copy.\n");
-
-	    cpu_local_memory = kmem.alloc (kmem_misc, (1UL << mapsize));
-	    memcpy (cpu_local_memory, start_cpu_local_mem, cpu_local_size);
-	}
-	else
-	    // Use memory from kernel image
-	    cpu_local_memory = start_cpu_local_mem;
-    }
-    else
-	// Allocate memory for CPU local data
-	cpu_local_memory = kmem.alloc (kmem_misc, (1UL << mapsize));
-
-
-    if (cpu_local_memory != start_cpu_local_mem)
-	// Free unused part of allocated CPU local memory
-	for (addr_t ptr = addr_offset (cpu_local_memory, alloc_size);
-	     ptr < addr_offset (cpu_local_memory, (1UL << mapsize));
-	     ptr = addr_offset (ptr, alloc_size))
-	{
-	    kmem.free (kmem_misc, ptr, alloc_size);
-	}
-
-    TRACE_INIT ("CPU %d: Map CPU local memory from %p (%dKB)\n",
-		cpuid, cpu_local_memory, (1UL << mapsize) >> 10);
-
-    translation_t tr (true, translation_t::write_back, true, true, 0,
-		      translation_t::rwx, virt_to_phys (cpu_local_memory), 0);
-
-    static word_t cpu_local_tr = 0;
-    if (cpuid == 0)
-    {
-	// Insert new translation
-	cpu_local_tr = dtrmap.add_map (tr, start_cpu_local, mapsize, 0);
-    }
-    else
-    {
-	// Purge existing translation and insert new one
-	purge_dtr (start_cpu_local, mapsize);
-	tr.put_dtr (cpu_local_tr, start_cpu_local, mapsize, 0);
-    }
-
-
-    // Calculate physical location of idle TCBs
-    word_t offset = (word_t) get_idle_tcb () - (word_t) start_cpu_local;
-    get_idle_tcb ()->arch.phys_addr =
-	addr_offset (virt_to_phys (cpu_local_memory), offset);
-}
-
-utcb_t * space_t::allocate_utcb (tcb_t * tcb)
-{
-    ASSERT (tcb);
-    addr_t utcb = (addr_t) tcb->get_utcb_location ();
-
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-
-    if (lookup_mapping ((addr_t) utcb, &pg, &pgsize))
-    {
-	addr_t kaddr = addr_mask (pg->translation ()->phys_addr (),
-				  ~page_mask (pgsize));
-	return (utcb_t *) phys_to_virt
-	    (addr_offset (kaddr, (word_t) utcb & page_mask (pgsize)));
-    }
-
-    addr_t page = kmem.alloc (kmem_utcb, page_size (UTCB_ALLOC_SIZE));
-
-    add_mapping ((addr_t) utcb, virt_to_phys (page),
-		 UTCB_ALLOC_SIZE, false,
-		 translation_t::write_back,
-		 translation_t::rw,
-		 translation_t::data,
-		 0);
-
-    return (utcb_t *)
-	addr_offset (page, addr_mask (utcb, page_size (UTCB_ALLOC_SIZE) - 1));
-}
-
-void space_t::allocate_tcb (addr_t addr)
-{
-    addr_t page = kmem.alloc (kmem_tcb, page_size (KTCB_ALLOC_SIZE));
-
-    // Store physical location of TCB
-    for (tcb_t * vtcb = addr_to_tcb (page);
-	 vtcb < addr_offset (page, page_size (KTCB_ALLOC_SIZE));
-	 vtcb = (tcb_t *) addr_offset (vtcb, KTCB_SIZE))
-    {
-	vtcb->arch.phys_addr = virt_to_phys (vtcb);
-    }
-
-    kernel_space->add_mapping (addr, virt_to_phys (page),
-			       KTCB_ALLOC_SIZE, true,
-			       translation_t::write_back,
-			       translation_t::rw,
-			       translation_t::data,
-			       0);
-}
-
-void space_t::map_dummy_tcb (addr_t addr)
-{
-    kernel_space->add_mapping (addr, get_dummy_tcb (),
-			       KTCB_ALLOC_SIZE, true,
-			       translation_t::write_back,
-			       translation_t::ro,
-			       translation_t::data,
-			       0);
-}
-
-void space_t::map_sigma0 (addr_t addr)
-{
-    // Insert 256MB mapping
-    add_mapping (addr, addr, pgent_t::size_256m, false,
-		 translation_t::write_back,
-		 translation_t::rwx,
-		 translation_t::both,
-		 0);
-}
-
-void space_t::release_kernel_mapping (addr_t vaddr, addr_t paddr,
-				      word_t log2size)
-{
-    // Free up memory used for UTCBs
-    if (get_utcb_page_area ().is_addr_in_fpage (vaddr))
-	kmem.free (kmem_utcb, phys_to_virt (paddr), 1UL << log2size);
-}
-
-void SECTION (".init") init_kernel_space (void)
-{
-    kernel_space = (space_t *) kmem.alloc (kmem_space, sizeof (space_t));
-
-    get_idle_tcb ()->set_space (kernel_space);
-
-    TRACE_INIT ("Allocated kernel space of size 0x%x @ %p\n",
-		sizeof (space_t), kernel_space);
-
-    // Set up region register for TCB area.
-    rr_t rr;
-    rr.set (false, kernel_space->get_region_id (), KTCB_ALLOC_SIZE_SHIFT);
-    rr.put (5);
-    ia64_srlz_d ();
-}
-
-
-void space_t::add_mapping (addr_t vaddr, addr_t paddr,
-			   pgent_t::pgsize_e size, bool kernel,
-			   translation_t::memattrib_e memattrib,
-			   translation_t::access_rights_e access_rights,
-			   translation_t::type_e type,
-			   word_t key)
-{
-    pgent_t * pg = this->pgent (pagedir_idx (vaddr), 0);
-    pgent_t::pgsize_e pgsize = pgent_t::size_max;
-
-    /*
-     * Sanity checking on page size
-     */
-
-    if (! is_page_size_valid (size))
-    {
-	printf ("Mapping invalid pagesize (%dKB)\n", page_size (pgsize) >> 10);
-	enter_kdebug ("invalid page size");
-	return;
-    }
-
-    /*
-     * Lookup mapping
-     */
-
-    while (pgsize > size)
-    {
-	if (pg->is_valid (this, pgsize))
-	{
-	    // Sanity check
-	    if (! pg->is_subtree (this, pgsize))
-	    {
-		printf ("%dKB mapping @ %p space %p already exists.\n",
-			page_size (pgsize) >> 10, vaddr, this);
-		enter_kdebug ("mapping exists");
-		return;
-	    }
-	}
-	else
-	    // Create subtree
-	    pg->make_subtree (this, pgsize, kernel);
-
-	pg = pg->subtree (this, pgsize)->next
-	    (this, pgsize-1, page_table_index (pgsize-1, vaddr));
-	pgsize--;
-    }
-
-    /*
-     * Modify page table
-     */
-
-    pg->set_entry (this, pgsize, paddr, access_rights, memattrib, kernel);
-}
-
-
-/**
- * Check if translation exists in page table, and if entry permits
- * indicated access type, insert translation into TLB.
- *
- * @param vaddr		virtual address to check for
- * @param access	access rights to match agains
- *
- * @return true if insertion was successful, false otherwise
- */
-bool space_t::insert_translation (addr_t vaddr, space_t::access_e access)
-{
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-
-    if (lookup_mapping (vaddr, &pg, &pgsize))
-    {
-	// Check access rights
-	if ((is_execute (access) && pg->is_executable (this, pgsize)) ||
-	    (is_read (access)    && pg->is_readable (this, pgsize)) ||
-	    (is_write (access)   && pg->is_writable (this, pgsize)))
-	{
-	    // Insert translation into TLB.  We also set the
-	    // appropriate reference bits to avoid faulting
-	    // immediately (optimization).
-	    if (is_execute (access))
-	    {
-		pg->set_executed ();
-		pgent_t pgx = *pg;
-		pgx.set_referenced ();
-		pgx.translation ()->put_tc (translation_t::code, vaddr,
-					    page_shift (pgsize), 0);
-	    }
-	    else
-	    {
-		pg->set_referenced ();
-		if (is_write (access))
-		{
-		    // A read-only TLB entry may already exist
-		    purge_tc (vaddr, page_shift (pgsize), get_region_id ());
-		    pg->set_written ();
-		}
-		pg->translation ()->put_tc (translation_t::data, vaddr,
-					    page_shift (pgsize), 0);
-	    }
-
-	    return true;
-	}
-    }
-
-    return false;
-}
-
-
-DECLARE_TRACEPOINT (VHPT_MISS);
-DECLARE_TRACEPOINT (ACCESS_RIGHTS_FAULT);
-
-extern "C" void
-handle_vhpt_miss (ia64_exception_context_t * frame)
-{
-    space_t * fspace;
-    space_t * space = get_current_space ();
-    space_t::access_e ftype = (space_t::access_e) frame->isr.rwx;
-    addr_t faddr = frame->ifa;
-    bool is_kernel = frame->ipsr.cpl == 0;
-
-    // If a kernel access is not backed by a TR we insert a huge TLB
-    // entry for it.  This is necessary when, e.g., accessing
-    // user-level memory by looking up the physical address through
-    // the page tables.
-    if (is_kernel && (IA64_RR_NUM (faddr) == 6 || IA64_RR_NUM (faddr) == 7))
-    {
-	word_t rr = IA64_RR_NUM (faddr);
-	translation_t tr (true, (rr == 7 ? translation_t::write_back :
-				 translation_t::uncacheable),
-			  true, true, 0, translation_t::rwx,
-			  virt_to_phys (faddr), 0);
-	tr.put_tc (ftype == (space_t::execute) ?
-		   translation_t::code : translation_t::data,
-		   faddr, HUGE_PGSIZE, 0);
-	return;
-    }
-
-    // Use kernel space if we have kernel fault in TCB area or
-    // when no space is set (e.g., running on the idler)
-    if ((is_kernel && space->is_tcb_area (faddr)) || space == NULL)
-	space = get_kernel_space ();
-
-    // If there was a miss in the copy area, we should try resolving
-    // the fault using the partner's address space.
-    if (is_kernel && space->is_copy_area (faddr))
-    {
-	tcb_t * partner = space->get_tcb (get_current_tcb ()->get_partner ());
-	ASSERT (partner != NULL);
-	fspace = partner->get_space ();
-    }
-    else
-	fspace = space;
-
-    TRACEPOINT (VHPT_MISS,
-		printf ("VHPT miss @ %p, ip=%p (frame=%p) type=%s %s\n",
-			faddr, addr_offset
-			(frame->iip, frame->isr.instruction_slot * 6), frame,
-			is_kernel ? "kernel" : "user",
-			ftype == (space_t::execute) ? "execute" :
-			ftype == (space_t::read) ? "read" :
-			ftype == (space_t::write) ? "write" :
-			ftype == (space_t::readwrite) ? "read/write" :
-			"unknown"));
-
-    for (word_t tries = 0; tries <= 1; tries++)
-    {
-	if (fspace->insert_translation (faddr, ftype))
-	{
- 	    // Mapping existed in page table
-	    return;
-	}
-
-	if (tries == 0)
-	    // Try to resolve pagefault and check mapping again
-	    space->handle_pagefault (faddr, frame->iip, ftype, is_kernel);
-    }
-}
-
-extern "C" void
-handle_access_rights_fault (ia64_exception_context_t * frame)
-{
-    space_t * fspace;
-    space_t * space = get_current_space ();
-    space_t::access_e ftype = (space_t::access_e) frame->isr.rwx;
-    addr_t faddr = frame->ifa;
-    bool is_kernel = frame->ipsr.cpl == 0;
-
-    // Use kernel space if we have kernel fault in TCB area or
-    // when no space is set (e.g., running on the idler)
-    if ((is_kernel && space->is_tcb_area (faddr)) || space == NULL)
-	space = get_kernel_space ();
-
-    // If there was a miss in the copy area, we should try resolving
-    // the fault using the partner's address space.
-    if (is_kernel && space->is_copy_area (faddr))
-    {
-	tcb_t * partner = space->get_tcb (get_current_tcb ()->get_partner ());
-	ASSERT (partner != NULL);
-	fspace = partner->get_space ();
-    }
-    else
-	fspace = space;
-
-    TRACEPOINT (ACCESS_RIGHTS_FAULT,
-		printf ("Access rights fault @ %p, ip=%p "
-			"(frame=%p) type=%s %s\n",
-			faddr, addr_offset
-			(frame->iip, frame->isr.instruction_slot * 6), frame,
-			is_kernel ? "kernel" : "user",
-			ftype == (space_t::execute) ? "execute" :
-			ftype == (space_t::read) ? "read" :
-			ftype == (space_t::write) ? "write" :
-			ftype == (space_t::readwrite) ? "read/write" :
-			"unknown"));
-
-    // Try to resolve pagefault and insert mapping
-    space->handle_pagefault (faddr, frame->iip, ftype, is_kernel);
-    fspace->insert_translation (faddr, ftype);
-}
-
-extern "C" void
-handle_reference_bits (ia64_exception_context_t * frame)
-{
-    space_t * space = get_current_space ();
-    addr_t faddr = frame->ifa;
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-    bool is_kernel = frame->ipsr.cpl == 0;
-
-    // If there was a miss in the copy area, we should update the
-    // reference bits of the partner's space.
-    if (is_kernel && space->is_copy_area (faddr))
-    {
-	tcb_t * partner = space->get_tcb (get_current_tcb ()->get_partner ());
-	ASSERT (partner != NULL);
-	space = partner->get_space ();
-    }
-    
-    if (space->lookup_mapping (faddr, &pg, &pgsize))
-    {
-	switch (frame->exception_num)
-	{
-	case 9:
-	{
-	    // execute
-	    pg->set_executed ();
-	    pgent_t pgx = *pg;
-	    pgx.set_referenced ();
-	    pgx.translation ()->put_tc (translation_t::code,
-					faddr, page_shift (pgsize), 0);
-	    return;
-	}
-
-	case 8:
-	    // write
-	    pg->set_written ();
-	    /* FALLTHROUGH */
-
-	case 10:
-	    // read
-	    pg->set_referenced ();
-	    pg->translation ()->put_tc (translation_t::data,
-					faddr, page_shift (pgsize), 0);
-	    return;
-
-	default:
-	    break;
-	}
-    }
-
-    printf ("Bogus rwx reference (frame=%p)\n", frame);
-    enter_kdebug ("handle reference bits");
-}
-
-/**
- * ACPI memory handling
- */
-addr_t acpi_remap(addr_t addr)
-{
-    //TRACE_INIT("ACPI remap: %p\n", addr); 
-    return addr;
-}
-
-void acpi_unmap(addr_t addr)
-{
-    /* empty right now */
-}
-
diff --git a/kernel/src/glue/v4-ia64/space.h b/kernel/src/glue/v4-ia64/space.h
deleted file mode 100644
index 9072fe78..00000000
--- a/kernel/src/glue/v4-ia64/space.h
+++ /dev/null
@@ -1,274 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003, 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/space.h
- * Description:   IA-64 specific space implementation.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.h,v 1.40 2006/11/14 18:44:56 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__SPACE_H__
-#define __GLUE__V4_IA64__SPACE_H__
-
-#if !defined(ASSEMBLY)
-#include INC_GLUE(config.h)
-#include INC_GLUE(utcb.h)
-#include INC_API(thread.h)
-#include INC_API(fpage.h)
-#include INC_ARCH(pgent.h)
-#include INC_ARCH(tlb.h)
-#endif
-
-#define KTCB_ALLOC_SIZE_SHIFT	(14)
-#define KTCB_ALLOC_SIZE		(pgent_t::size_16k)
-#define UTCB_ALLOC_SIZE		(pgent_t::size_4k)
-
-#if !defined(ASSEMBLY)
-#include <debug.h>		// Need UNIMPLEMENTED ()
-
-// Even if new MDB is not used we need the mdb_t::ctrl_t
-#include <mdb.h>
-
-
-class tcb_t;
-class pgent_t;
-
-class space_t
-{
-    union {
-	struct {
-	    u64_t user[(1 << 10) - 3];
-	    fpage_t kip_area;
-	    fpage_t utcb_area;
-	    word_t thread_count;
-	};
-	u64_t pagedir[(1 << 10)];
-    };
-
-public:
-    enum access_e {
-	execute 	= 1,
-	write		= 2,
-	read		= 4,
-	readwrite	= 6,
-    };
-
-    bool is_read (access_e a)
-	{ return a & 4; }
-
-    bool is_write (access_e a)
-	{ return a & 2; }
-
-    bool is_execute (access_e a)
-	{ return a & 1; }
-
-
-    //void map_tcb(tcb_t * tcb);
-    void init(fpage_t utcb_area, fpage_t kip_area);
-    void init_cpu_mappings (cpuid_t cpu);
-    void free();
-    bool sync_kernel_space (addr_t addr) { return false; }
-    void handle_pagefault(addr_t addr, addr_t ip, access_e access, bool kernel);
-    bool is_initialized();
-
-    void map_sigma0(addr_t addr);
-    void map_fpage(fpage_t snd_fp, word_t base, 
-	space_t * t_space, fpage_t rcv_fp, bool grant);
-    fpage_t unmap_fpage(fpage_t fpage, bool flush, bool unmap_all);
-    fpage_t mapctrl (fpage_t fpage, mdb_t::ctrl_t ctrl,
-		     word_t attribute, bool unmap_all);
-
-    /* TCB management */
-    void allocate_tcb(addr_t addr);
-    void map_dummy_tcb(addr_t addr);
-    utcb_t * allocate_utcb (tcb_t * tcb);
-
-    tcb_t * get_tcb(threadid_t tid);
-    tcb_t * get_tcb(void * ptr);
-
-    /* Address ranges */
-    inline bool is_user_area (addr_t addr);
-    bool is_user_area (fpage_t fpage);
-    bool is_tcb_area (addr_t addr);
-    bool is_mappable (addr_t addr);
-    bool is_mappable (fpage_t addr);
-    bool is_arch_mappable (addr_t addr, size_t size) { return true; }
-
-    /* Copy area related methods */
-    bool is_copy_area (addr_t addr);
-    word_t get_copy_limit (addr_t addr, word_t limit);
-
-    /* kip and utcb handling */
-    fpage_t get_kip_page_area();
-    fpage_t get_utcb_page_area();
-
-    /* reference counting */
-    void add_tcb(tcb_t * tcb);
-    bool remove_tcb(tcb_t * tcb);
-
-    /* space control */
-    word_t space_control (word_t ctrl) { return 0; }
-    
-    /* space update hooks */
-    static void begin_update (void) {}
-    static void end_update (void) {}
-
-    /* generic page table walker */
-    pgent_t * pgent (word_t num, word_t cpu = 0);
-    bool lookup_mapping (addr_t vaddr, pgent_t ** pg,
-			 pgent_t::pgsize_e * size);
-    bool readmem (addr_t vaddr, word_t * contents);
-    static word_t readmem_phys (addr_t paddr)
-	{ return *(word_t*)phys_to_virt(paddr); }
-
-    void release_kernel_mapping (addr_t vaddr, addr_t paddr, word_t log2size);
-
-    void flush_tlb (space_t * curspace);
-    void flush_tlbent (space_t * curspace, addr_t vaddr, word_t log2size);
-    bool does_tlbflush_pay (word_t log2size)
-	{ return log2size >= 64; }
-
-    word_t get_region_id (void)
-	{ return ((word_t) this >> 12) & ((1 << 18) - 1); }
-
-    void add_mapping (addr_t vaddr, addr_t paddr,
-		      pgent_t::pgsize_e size, bool kernel,
-		      translation_t::memattrib_e memattrib,
-		      translation_t::access_rights_e access_rights,
-		      translation_t::type_e type,
-		      word_t key);
-
-    bool space_t::insert_translation (addr_t vaddr, space_t::access_e access);
-};
-
-
-INLINE fpage_t space_t::get_kip_page_area (void)
-{
-    return kip_area;
-}
-
-INLINE fpage_t space_t::get_utcb_page_area (void)
-{
-    return utcb_area;
-}
-
-INLINE bool space_t::is_user_area (addr_t addr)
-{
-    return (addr >= (addr_t) USER_AREA_START && 
-	    addr < (addr_t) USER_AREA_END);
-}
-
-INLINE bool space_t::is_tcb_area (addr_t addr)
-{
-    return (addr >= (addr_t) KTCB_AREA_START &&
-	    addr < (addr_t) KTCB_AREA_END);
-}
-
-
-INLINE bool space_t::is_copy_area (addr_t addr)
-{
-    return IA64_RR_NUM (addr) == 4;
-}
-
-INLINE word_t space_t::get_copy_limit (addr_t addr, word_t limit)
-{
-    word_t end = (word_t) virt_to_phys (addr) + limit;
-    if (end >= USER_AREA_END)
-	return (USER_AREA_END - (word_t) addr);
-    return limit;
-}
-
-
-/**
- * adds a thread to the space
- * @param tcb pointer to thread control block
- */
-INLINE void space_t::add_tcb (tcb_t * tcb)
-{
-    // Avoid touching bit 0 (page present)
-    thread_count += 2;
-}
-
-/**
- * removes a thread from a space
- * @param tcb_t thread control block
- * @return true if it was the last thread
- */
-INLINE bool space_t::remove_tcb (tcb_t * tcb)
-{
-    ASSERT (thread_count != 0);
-    thread_count -= 2;
-    return (thread_count == 0);
-}
-
-INLINE tcb_t * space_t::get_tcb (threadid_t tid)
-{
-    return (tcb_t *) (KTCB_AREA_START + (tid.get_threadno () * KTCB_SIZE));
-}
-
-/**
- * space_t::get_tcb: translates a pointer into a valid tcb pointer
- */
-INLINE tcb_t * space_t::get_tcb (void * ptr)
-{
-   return (tcb_t *) ((word_t) ptr & KTCB_MASK);
-}
-
-
-
-INLINE pgent_t * space_t::pgent (word_t num, word_t cpu)
-{
-    return ((pgent_t *) this)->next (this, pgent_t::size_max, num);
-}
-
-INLINE void space_t::flush_tlb (space_t * curspace)
-{
-    purge_tc (0, ia64_num_vaddr_bits, get_region_id ());
-}
-
-INLINE void space_t::flush_tlbent (space_t * curspace, addr_t vaddr,
-				   word_t log2size)
-{
-    purge_tc (vaddr, log2size, get_region_id ());
-}
-
-
-/**********************************************************************
- *
- *                 global function declarations
- *
- **********************************************************************/
-
-INLINE space_t * get_kernel_space (void)
-{
-    extern space_t * kernel_space;
-    return kernel_space;
-};
-
-void init_kernel_space (void);
-
-
-#endif /* !ASSEMBLY */
-#endif /* !__GLUE__V4_IA64__SPACE_H__ */
diff --git a/kernel/src/glue/v4-ia64/syscalls.h b/kernel/src/glue/v4-ia64/syscalls.h
deleted file mode 100644
index 300fd6c4..00000000
--- a/kernel/src/glue/v4-ia64/syscalls.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/syscalls.h
- * Description:   Syscall specifi macros
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.21 2005/10/19 16:21:22 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__SYSCALLS_H__
-#define __GLUE__V4_IA64__SYSCALLS_H__
-
-
-typedef struct _sysret2_t { word_t w[2]; } sysret2_t;
-typedef struct _sysret3_t { word_t w[3]; } sysret3_t;
-typedef struct _sysret4_t { word_t w[4]; } sysret4_t;
-
-
-//
-// System call function attributes
-//
-#define SYSCALL_ATTR(sec_name)
-
-
-
-//
-//	Ipc ()
-//
-#define SYS_IPC(to, from, timeout)				\
-  sysret2_t SYSCALL_ATTR ("ipc") sys_ipc (to, from, timeout)
-
-#define return_ipc(from)					\
-do {								\
-    sysret2_t ret;						\
-    ret.w[0] = 0;						\
-    ret.w[1] = (from).get_raw ();				\
-    current->set_partner (from);				\
-    return ret;							\
-} while(0)
-
-
-//
-//	ThreadControl ()
-//
-#define SYS_THREAD_CONTROL(dest, space, scheduler, pager,	\
-			   utcblocation) 			\
-  word_t SYSCALL_ATTR ("thread_control")			\
-  sys_thread_control (dest, space, scheduler, pager, utcblocation)
-
-#define return_thread_control(result)				\
-do {								\
-    return result;						\
-} while (0)
-
-
-//
-//	ExchangeRegisters ()
-//
-#define SYS_EXCHANGE_REGISTERS(dest, control, usp, uip,		\
-			       uflags, uhandle, pager,		\
-			       is_local)	 		\
-  sysret4_t SYSCALL_ATTR ("exchange_registers")			\
-  sys_exchange_registers (dest, control, usp, uip,		\
-			  uflags, uhandle, pager, is_local)
-
-#define return_exchange_registers(result,			\
-	control, sp, ip, flags, pager, handle)			\
-do {								\
-    sysret4_t ret;						\
-    ret.w[0] = (result).get_raw ();				\
-    ret.w[1] = control;						\
-    ret.w[2] = sp;						\
-    ret.w[3] = ip;						\
-    word_t * ptr = get_current_tcb ()->get_stack_top () - 4 -	\
-	(sizeof (ia64_switch_context_t) / sizeof (word_t));	\
-    *ptr++ = flags;						\
-    *ptr++ = handle;						\
-    *ptr = pager.get_raw ();					\
-    return ret;							\
-} while (0)
-
-
-//
-//	ThreadSwitch ()
-//
-#define SYS_THREAD_SWITCH(dest)					\
-  void SYSCALL_ATTR ("thread_switch")				\
-  sys_thread_switch (dest)
-
-#define return_thread_switch()					\
-	return
-
-
-//
-//	Schedule ()
-//
-#define SYS_SCHEDULE(dest, time_control, processor_control,	\
-		     prio, preemption_control)			\
-  sysret2_t SYSCALL_ATTR ("schedule")				\
-  sys_schedule (dest, time_control, processor_control,		\
-		prio, preemption_control)
-
-#define return_schedule(result, time_control)			\
-do {								\
-    sysret2_t ret;						\
-    ret.w[0] = result;						\
-    ret.w[1] = time_control;					\
-    return ret;							\
-} while (0)
-
-
-//
-//	SpaceControl ()
-//
-#define SYS_SPACE_CONTROL(space, control, kip_area, utcb_area,	\
-			  redirector)				\
-  sysret2_t SYSCALL_ATTR ("space_control")			\
-  sys_space_control (space, control, kip_area, utcb_area,	\
-		     redirector)
-
-#define return_space_control(result, control)			\
-do {								\
-    sysret2_t ret;						\
-    ret.w[0] = result;						\
-    ret.w[1] = control;						\
-    return ret;							\
-} while (0)
-
-
-//
-//	Unmap ()
-//
-#define SYS_UNMAP(control)					\
-  void SYSCALL_ATTR ("unmap") sys_unmap (control)
-
-#define return_unmap()						\
-	return
-
-
-//
-//	ProcessorControl ()
-//
-#define SYS_PROCESSOR_CONTROL(processor_no, internal_frequency,	\
-			      external_frequency, voltage)	\
-  void SYSCALL_ATTR ("processor_control")			\
-  sys_processor_control (processor_no, internal_frequency,	\
-			 external_frequency, voltage)
-
-#define return_processor_control()				\
-	return
-
-
-//
-//	MemoryControl ()
-//
-#define SYS_MEMORY_CONTROL(control, attribute0, attribute1,	\
-			   attribute2, attribute3)		\
-  void SYSCALL_ATTR ("memory_control")				\
-  sys_memory_control (control, attribute0, attribute1,		\
-		      attribute2, attribute3)
-
-#define return_memory_control(result)				\
-	return result
-
-
-//
-//	SAL_Call ()
-//
-#define SYS_SAL_CALL(idx, a1, a2, a3, a4, a5, a6)		\
-  extern "C" sal_return_t SYSCALL_ATTR ("sal_call") 		\
-  sys_sal_call (idx, a1, a2, a3, a4, a5, a6)
-
-
-#endif /* !__GLUE__V4_IA64__SYSCALLS_H__ */
diff --git a/kernel/src/glue/v4-ia64/tcb.h b/kernel/src/glue/v4-ia64/tcb.h
deleted file mode 100644
index c99afe08..00000000
--- a/kernel/src/glue/v4-ia64/tcb.h
+++ /dev/null
@@ -1,610 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2006,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/tcb.h
- * Description:   TCB/thread related functions for Version 4, IA-64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tcb.h,v 1.73 2006/10/20 21:31:45 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__TCB_H__
-#define __GLUE__V4_IA64__TCB_H__
-
-#include <debug.h>
-
-#include INC_GLUE(context.h)
-#include INC_GLUE(registers.h)
-#include INC_GLUE(resource_functions.h)
-#include INC_ARCH(runconv.h)
-#include INC_API(syscalls.h)
-
-/**
- * Translate arbitrary address to TCB pointer.
- * @param addr		address to translate
- * @return TCB in which ADDR is located
- */
-INLINE tcb_t * addr_to_tcb (addr_t addr)
-{
-    return (tcb_t *) ((word_t) addr & KTCB_MASK);
-}
-
-
-/**
- * Locate current TCB by using current stack pointer.
- * @return current TCB
- */
-INLINE tcb_t * get_current_tcb (void)
-{
-    register addr_t sp asm ("sp");
-    return addr_to_tcb (sp);
-}
-
-
-#if defined(CONFIG_SMP)
-INLINE cpuid_t get_current_cpu (void)
-{
-    return get_idle_tcb ()->get_cpu ();
-}
-#endif
-
-
-/**
- * Perform thread swith from current thread.
- * @param dest		thread to switch to
- */
-INLINE void tcb_t::switch_to (tcb_t * dest)
-{
-    word_t counter;
-
-    if (EXPECT_FALSE (resource_bits.have_resources ()))
-	resources.save (this, dest);
-
-    __asm__ __volatile__ ("mov %0 = " MKSTR (r_KERNEL_STACK_COUNTER)
-			  :"=r" (counter));
-
-    __asm__ __volatile__ (
-	"							\n"
-	"r_bsp		= r14					\n"
-	"r_ip		= r15					\n"
-	"r_rp		= r16					\n"
-	"r_cfm		= r17					\n"
-	"r_pfs		= r18					\n"
-	"r_rnat		= r19					\n"
-	"r_unat		= r20					\n"
-	"r_pr		= r21					\n"
-	"r_psr		= r22					\n"
-	"new_stack	= r31					\n"
-	"sp1		= r10					\n"
-	"sp2		= r11					\n"
-	"							\n"
-#if 0
-	"{.mlx							\n"
-	"	break.m	0x3					\n"
-	"	movl r0 = 9f ;;					\n"
-	"}							\n"
-	"	.rodata						\n"
-	"9:	stringz \"switch to\"				\n"
-	"	.previous					\n"
-#endif
-	"	// Move context into general registers		\n"
-	"	mov 	r_pfs = ar.pfs				\n"
-	"	mov 	r_rp = rp				\n"
-	"	movl	r_ip = 2f				\n"
-	"							\n"
-	"	// Make sure that stacked reg is not used	\n"
-	"	mov	new_stack = %[dest_stack]		\n"
-	"							\n"
-	"	// Allocate for switch frame			\n"
-	"	add	sp = -%[sizeof_ctx],sp ;;		\n"
-	"	;;						\n"
-	"	mov	ar.rsc = 0				\n"
-	"	add	sp1 = %[offset_pfs], sp			\n"
-	"	add	sp2 = %[offset_pfs]+8,sp		\n"
-	"	st8	[%[this_stack_ptr]] = sp		\n"
-	"							\n"
-	"	// Set thread ids and ksp for new thread	\n"
-	"	mov	"MKSTR(r_GLOBAL_ID)" = %[dest_gid]	\n"
-	"	mov	"MKSTR(r_LOCAL_ID) " = %[dest_lid]	\n"
-	"	mov	"MKSTR(r_KERNEL_SP)" = %[dest_stack_top]\n"
-	"	mov	"MKSTR(r_PHYS_TCB_ADDR)" = %[dest_tcb_phys]\n"
-	"							\n"
-	"	// Set region id				\n"
-	"	mov	rr[r0] = %[dest_rid]			\n"
-	"							\n"
-	"	// Make a call so that we can get CFM		\n"
-	"	br.call.sptk.many rp = 1f			\n"
-	"							\n"
-	"	// Store context into switch frame		\n"
-	"1:	alloc	r_cfm = ar.pfs, 0, 0, 0, 0		\n"
-	"	;;						\n"
-	"	mov 	r_bsp = ar.bsp				\n"
-	"	flushrs						\n"
-	"	;;						\n"
-	"							\n"
-	"	st8	[sp1] = r_pfs, 16			\n"
-	"	st8	[sp2] = r_cfm, 16			\n"
-	"	mov	r_unat = ar.unat			\n"
-	"	mov	r_rnat = ar.rnat			\n"
-	"	mov	r_pr = pr				\n"
-	"	mov	r_psr = psr				\n"
-	"	;;						\n"
-	"	st8	[sp1] = r_ip, 16			\n"
-	"	st8	[sp2] = r_bsp, 16			\n"
-	"	;;						\n"
-	"	st8	[sp1] = r_rnat, 16			\n"
-	"	st8	[sp2] = r_unat, 16			\n"
-	"	;;						\n"
-	"	st8	[sp1] = r_pr				\n"
-	"	st8	[sp2] = r_psr, 16			\n"
-	"	invala						\n"
-	"	loadrs						\n"
-	"	;;						\n"
-	"	st8	[sp2] = r_rp				\n"
-	"							\n"
-	"	// Get new switch frame				\n"
-	"	add	sp1 = %[offset_pfs], new_stack		\n"
-	"	add	sp2 = %[offset_pfs]+8,new_stack		\n"
-	"	;;						\n"
-	"							\n"
-	"	// Load context from new frame			\n"
-	"	ld8	r_pfs = [sp1], 16			\n"
-	"	ld8	r_cfm = [sp2], 16			\n"
-	"	;;						\n"
-	"	ld8	r_ip = [sp1], 16			\n"
-	"	ld8	r_bsp = [sp2], 16			\n"
-	"	mov	ar.pfs = r_cfm				\n"
-	"	;;						\n"
-	"	ld8	r_rnat = [sp1], 16			\n"
-	"	ld8	r_unat = [sp2], 16			\n"
-	"	mov	ar.bspstore = r_bsp			\n"
-	"	;;						\n"
-	"	ld8	r_pr = [sp1]				\n"
-	"	ld8	r_psr = [sp2], 16			\n"
-	"	mov	ar.rnat = r_rnat			\n"
-	"	mov	ar.unat = r_unat			\n"
-	"	;;						\n"
-	"	ld8	r_rp  = [sp2]				\n"
-	"	mov	rp = r_ip				\n"
-	"	add	sp = %[sizeof_ctx],new_stack		\n"
-	"	mov	pr = r_pr, 0x1ffff			\n"
-	"	mov	psr.l = r_psr				\n"
-	"	;;						\n"
-	"	srlz.d						\n"
-	"	;;						\n"
-#if 0
-	"{.mlx							\n"
-	"	break.m	0x3					\n"
-	"	movl r0 = 9f ;;					\n"
-	"}							\n"
-	"	.rodata						\n"
-	"9:	stringz \"switched to\"				\n"
-	"	.previous					\n"
-#endif
-	"	br.ret.sptk.many rp				\n"
-	"							\n"
-	"2:	// Restore non-clobberable registers		\n"
-	"	mov	ar.pfs = r_pfs				\n"
-	"	mov	rp = r_rp				\n"
-	"	mov	ar.rsc = 3				\n"
-	"	;;						\n"
-	:
-	:
-	[this_stack_ptr] "r" (&this->stack),
-	[dest_stack]	 "r" (dest->stack),
-	[sizeof_ctx]	 "i" (sizeof (ia64_switch_context_t)),
-	[offset_pfs]	 "i" (offsetof (ia64_switch_context_t, pfs)),
-	[dest_gid]	 "r" (dest->get_global_id ().get_raw ()),
-	[dest_lid]	 "r" (dest->get_local_id ().get_raw ()),
-	[dest_stack_top] "r" (dest->get_stack_top ()),
-	[dest_tcb_phys]	 "r" (dest->arch.phys_addr),
-	[dest_rid]	 "r" ((dest->space->get_region_id () << 8) + (12 << 2))
-	:
-	CALLER_SAVED_REGS, CALLEE_SAVED_REGS, "memory");
-
-    __asm__ __volatile__ ("mov " MKSTR (r_KERNEL_STACK_COUNTER) "= %0"
-			  ::"r" (counter));
-
-    if (EXPECT_FALSE (resource_bits.have_resources ()))
-	resources.load (this);
-}
-
-
-/**
- * Initializes context of initial thread and switches to it.  The
- * context (e.g., instruction pointer) has been generated by inserting
- * a notify procedure context on the stack.  We simply restore this
- * context.
- *
- * @param tcb		TCB of initial thread
- */
-INLINE void initial_switch_to (tcb_t * tcb) __attribute__ ((noreturn));
-INLINE void initial_switch_to (tcb_t * tcb) 
-{
-    // Do not invoke notify procedure.  Only invoke restore code.
-    __asm __volatile (
-	"	mov	"MKSTR(r_KERNEL_SP)" = %[dest_stack_top]	\n"
-	"	mov	"MKSTR(r_PHYS_TCB_ADDR)" = %[dest_tcb_phys]	\n"
-	"	mov	sp = %[stack]					\n"
-	"	br.sptk.many ia64_notify_return_trampoline		\n"
-	:
-	:
-	[stack]		 "r" (tcb->stack),
-	[dest_stack_top] "r" (tcb->get_stack_top ()),
-	[dest_tcb_phys]	 "r" (tcb->get_arch ()->phys_addr));
-
-    /* NOTREACHED */
-}
-
-
-/**
- * Calculate the stack top (i.e., stack pointer for an empty stack) of
- * current thread.
- *
- * @return stack top of current thread
- */
-INLINE word_t * tcb_t::get_stack_top (void)
-{
-    return &kernel_stack[(KTCB_SIZE - sizeof (tcb_t)) / 
-			 sizeof (kernel_stack[0])];
-}
-
-/**
- * Calculate bottom of register stack.  Register stack is aligned so
- * that a NaT collection will be stored after 63 register stores.
- *
- * @return bottom of register stack
- */
-INLINE word_t * tcb_t::get_reg_stack_bottom (void)
-{
-    return (word_t *) (((word_t) &kernel_stack + 511) & ~(512 - 1));
-}
-
-
-/**
- * Initialize stack space.
- */
-INLINE void tcb_t::init_stack (void)
-{
-    stack = get_stack_top ();
-}
-
-
-extern word_t ia64_notify_trampoline;
-
-/**
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- *
- * @param func		notify procedure to invoke
- */
-INLINE void tcb_t::notify (void (*func)())
-{
-    bool empty_stack = false;
-    if (stack == get_stack_top ())
-    {
-	// Make room for 2 scratch words (C calling convention)
-	stack -= 2;
-	empty_stack = true;
-    }
-
-    ia64_switch_context_t * old_context = (ia64_switch_context_t *) stack;
-
-    // Create new context switch frame
-    stack -= sizeof (ia64_switch_context_t) / sizeof (*stack);
-    ia64_switch_context_t * context = (ia64_switch_context_t *) stack;
-
-    // Make sure that we have a valid BSP
-    if (empty_stack)
-	context->bspstore = &kernel_stack[0];
-    else
-	context->bspstore = old_context->bspstore;
-
-
-    // Align BSP so that we start with a new RSE NaT collection
-    context->bspstore = (word_t *)
-	(((word_t) context->bspstore + 511) & ~(512 - 1));
-
-    // Create a valid context frame
-    context->ip = (addr_t) &ia64_notify_trampoline;
-    context->rp = *(addr_t *) func;
-    context->unat = 0;	// Don't care about NaTs
-    context->rnat = 0;
-    context->cfm = 0;	// in + loc = 0, out = 0, rot = 0
-    context->pfs = 0;
-    context->psr.raw = 0;
-    context->psr.ic = 1;
-    context->psr.it = 1;
-    context->psr.dt = 1;
-    context->psr.rt = 1;
-}
-
-
-/**
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- *
- * @param func		notify procedure to invoke
- * @param arg1		1st argument to notify procedure
- */
-INLINE void tcb_t::notify (void (*func)(word_t), word_t arg1)
-{
-    notify ((void (*)(void)) func);
-
-    ia64_switch_context_t * context = (ia64_switch_context_t *) stack;
-
-    if ((word_t) context->bspstore & 0x1f8 == 0x1f8)
-	*(context->bspstore++) = 0;
-
-    *(context->bspstore++) = arg1; // Push argument on register stack
-    context->cfm = 1 + (1 << 7); // in + loc = 1, out = 0, rot = 0
-}
-
-
-/**
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- *
- * @param func		notify procedure to invoke
- * @param arg1		1st argument to notify procedure
- * @param arg2		2nd argument to notify procedure
- */
-INLINE void tcb_t::notify (void (*func)(word_t, word_t),
-			   word_t arg1, word_t arg2)
-{
-    notify ((void (*)(word_t)) func, arg1);
-
-    ia64_switch_context_t * context = (ia64_switch_context_t *) stack;
-
-    if ((word_t) context->bspstore & 0x1f8 == 0x1f8)
-	*(context->bspstore++) = 0;
-
-    *(context->bspstore++) = arg2; // Push argument on register stack
-    context->cfm = 2 + (2 << 7); // in + loc = 1, out = 0, rot = 0
-}
-
-
-INLINE void tcb_t::set_utcb_location (word_t utcb_location)
-{
-    myself_local.set_raw (utcb_location);
-}
-
-INLINE word_t tcb_t::get_utcb_location (void)
-{
-    return myself_local.get_raw ();
-}
-
-INLINE word_t tcb_t::get_user_flags (void)
-{
-//    UNIMPLEMENTED ();
-    return 0;
-}
-
-INLINE void tcb_t::set_user_flags (const word_t flags)
-{
-//    UNIMPLEMENTED ();
-}
-
-INLINE word_t tcb_t::get_mr (word_t index)
-{
-    return get_utcb ()->mr[index];
-}
-
-INLINE void tcb_t::set_mr (word_t index, word_t value)
-{
-    get_utcb ()->mr[index] = value;
-}
-
-INLINE void tcb_t::copy_mrs(tcb_t * dest, word_t start, word_t count)
-{
-    ASSERT(start + count <= IPC_NUM_MR);
-
-    word_t * ws = &get_utcb ()->mr[start];
-    word_t * wd = &dest->get_utcb ()->mr[start];
-    while (count--)
-	*wd++ = *ws++;
-}
-
-INLINE word_t tcb_t::get_br (word_t index)
-{
-    return get_utcb ()->br[index];
-}
-
-INLINE void tcb_t::set_br (word_t index, word_t value)
-{
-    get_utcb ()->br[index] = value;
-}
-
-INLINE void tcb_t::set_cpu (cpuid_t cpu) 
-{ 
-    this->cpu = cpu;
-    get_utcb ()->processor_no = cpu;
-}
-
-
-/**
- * tcb_t::allocate: allocate memory for TCB
- *
- * Allocate memory for the given TCB.  We do this by generating a
- * write to the TCB area.  If TCB area is not backed by writable
- * memory (i.e., already allocated) the pagefault handler will
- * allocate the memory and map it.
- */
-INLINE void tcb_t::allocate (void)
-{
-    arch.scratch = 0;
-    ia64_mf ();
-}
-
-INLINE void tcb_t::set_space (space_t * space)
-{
-    this->space = space;
-}
-
-INLINE addr_t tcb_t::get_user_ip (void)
-{
-    ia64_exception_context_t * context =
-	(ia64_exception_context_t *) get_stack_top () - 1;
-
-    return context->iip;
-}
-
-INLINE addr_t tcb_t::get_user_sp (void)
-{
-    ia64_exception_context_t * context =
-	(ia64_exception_context_t *) get_stack_top () - 1;
-
-    return context->r12;
-}
-
-INLINE void tcb_t::set_user_ip (addr_t ip)
-{
-    ia64_exception_context_t * context =
-	(ia64_exception_context_t *) get_stack_top () - 1;
-
-    context->iip = ip;
-    context->ipsr.ri = 0;
-}
-
-INLINE void tcb_t::set_user_sp (addr_t sp)
-{
-    ia64_exception_context_t * context =
-	(ia64_exception_context_t *) get_stack_top () - 1;
-
-    context->r12 = sp;
-}
-
-INLINE msg_tag_t tcb_t::do_ipc (threadid_t to_tid, threadid_t from_tid,
-				timeout_t timeout)
-{
-    sys_ipc (to_tid, from_tid, timeout);
-    return get_tag ();
-}
-
-INLINE void tcb_t::return_from_ipc (void)
-{
-    extern long sys_ipc_return;
-
-    // Calculate location of register stack.
-    word_t * regframe = get_reg_stack_bottom () +
-	(arch.num_dirty / sizeof (word_t));
-    word_t * regframe_top = (regframe + 8);
-
-    // Check for NaT collection.
-    if (addr_align (regframe, 512) != addr_align (regframe_top, 512))
-	regframe_top++;
-
-    // Calculate stack pointer
-    word_t sp = (word_t) get_stack_top ();
-    sp -= (sizeof (ia64_switch_context_t) + 16);
-
-    cr_set_tpr (cr_tpr_t::some_enabled (14));
-    ia64_srlz_d ();
-
-    // Return to the location where sys_ipc was invoked.  Restore the
-    // stack pointers.
-    asm volatile (
-	"	rsm	psr.i					\n"
-	"	;;						\n"
-	"	mov	ar.rsc = 0				\n"
-	"	mov	"MKSTR(r_KERNEL_STACK_COUNTER)" = 2	\n"
-	"	;;						\n"
-	"	loadrs						\n"
-	"	;;						\n"
-	"	mov	ar.pfs = %[pfs]				\n"
-	"	mov	ar.bspstore = %[bspstore]		\n"
-	"	mov	r9 = %[from]				\n"
-	"	mov	rp = %[ipc_return]			\n"
-	"	mov	sp = %[sp]				\n"
-	"	;;						\n"
-	"	ssm	psr.i					\n"
-	"	;;						\n"
-	"	srlz.d						\n"
-	"	;;						\n"
-	"	br.ret.sptk.many rp				\n"
-	:
-	:
-	[ipc_return]	"r" (&sys_ipc_return),
-	[sp]		"r" (sp),
-	[bspstore]	"r" (regframe_top),
-	[pfs]		"r" (FRAME_MARKER (0, 3, 7)),
-	[from]		"r" (get_partner ().get_raw ()));
-
-    /* NOTREACHED */
-}
-
-INLINE void tcb_t::return_from_user_interruption (void)
-{
-    ia64_exception_context_t * context =
-	(ia64_exception_context_t *) get_stack_top () - 1;
-    word_t * bspstore = get_reg_stack_bottom () +
-	(context->num_dirty / sizeof (word_t));
-
-    // Restore context from the last exception frame and return to
-    // user-level.  We must also ensure that the bsp points to the
-    // location where the flushed user-level registers reside.
-    asm volatile (
-	"	flushrs					\n"
-	"	mov	ar.rsc = 0			\n"
-	"	;;					\n"
-	"	mov	ar.bspstore = %[bspstore]	\n"
-	"	mov	sp = %[context]			\n"
-
-	"	br.sptk.many load_context		\n"
-	:
-	:
-	[context]	"r" (context),
-	[bspstore]	"r" (bspstore));
-
-    /* NOTREACHED */
-}
-
-INLINE void tcb_t::adjust_for_copy_area (tcb_t * dst, addr_t * s, addr_t * d)
-{
-    resources.enable_copy_area (this, dst);
-    *d = ia64_phys_to_rr (4, *d);
-}
-
-INLINE void tcb_t::release_copy_area (void)
-{
-    resources.disable_copy_area (this, true);
-}
-
-INLINE addr_t tcb_t::copy_area_real_address (addr_t addr)
-{
-    return ia64_phys_to_rr (0, addr);
-}
-
-/**
- * initialize architecture-dependent root server properties based on
- * values passed via KIP
- * @param space the address space this server will run in   
- * @param ip the initial instruction pointer           
- * @param sp the initial stack pointer
- */
-INLINE void tcb_t::arch_init_root_server (space_t * space, word_t ip, word_t sp)
-{ 
-}
-
-#endif /* !__GLUE__V4_IA64__TCB_H__ */
diff --git a/kernel/src/glue/v4-ia64/thread.cc b/kernel/src/glue/v4-ia64/thread.cc
deleted file mode 100644
index 035198e0..00000000
--- a/kernel/src/glue/v4-ia64/thread.cc
+++ /dev/null
@@ -1,93 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/thread.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: thread.cc,v 1.15 2003/11/03 16:30:24 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_API(tcb.h)
-
-#include INC_GLUE(context.h)
-
-extern "C" void activate_context (word_t arg);
-
-void tcb_t::create_startup_stack (void (*func)())
-{
-    init_stack ();
-
-    ia64_exception_context_t * context =
-	(ia64_exception_context_t *) get_stack_top () - 1;
-    stack = (word_t *) context;
-
-    // Clear whole context
-    for (word_t * t = (word_t *) context; t < get_stack_top (); t++)
-	*t = 0;
-
-    context->rsc = 3 << 2;	    // User level RSE, mandatory mode
-    context->unat = ~(1UL << ((word_t) &context->r12 & 0x3f));
-    context->rnat = ~0UL;
-
-    // Disable all fp traps/exceptions by default and set up status
-    // fields according to the runtime conventions.
-    word_t def_fpsf = ar_fpsr_t::pc_3 | ar_fpsr_t::rc_nearest;
-    context->fpsr.disable_all_traps ();
-    context->fpsr.set_sf0 (def_fpsf);
-    context->fpsr.set_sf1 (def_fpsf | ar_fpsr_t::td | ar_fpsr_t::wre);
-    context->fpsr.set_sf2 (def_fpsf | ar_fpsr_t::td);
-    context->fpsr.set_sf3 (def_fpsf | ar_fpsr_t::td);
-
-    // Enable translation
-    context->ipsr.dt	= 1;
-    context->ipsr.it	= 1;
-    context->ipsr.rt	= 1;
-
-    // Disable high floating-point registers
-    context->ipsr.dfh	= 1;
-
-    // Enable interrupts
-    context->ipsr.ic	= 1;
-    context->ipsr.i	= 1;
-    context->tpr	= cr_tpr_t::all_enabled ();
-
-    context->ipsr.cpl	= 3;
-    context->ipsr.bn	= 1;   
-
-    // Treat exception frame as a switch frame and create an initial
-    // reg stack pointer since notify() relies on it.
-    ia64_switch_context_t * fake_ctx = (ia64_switch_context_t *) context;
-    word_t * tmp = fake_ctx->bspstore;
-    fake_ctx->bspstore = get_reg_stack_bottom ();
-
-    // Schedule notify procedure for activating exception context
-    notify (activate_context, (word_t) context);
-
-    // Restore exception frame
-    fake_ctx->bspstore = tmp;
-
-    // Function to invoke before restoring user frame
-    notify (func);
-}
diff --git a/kernel/src/glue/v4-ia64/timer.cc b/kernel/src/glue/v4-ia64/timer.cc
deleted file mode 100644
index 1cae6231..00000000
--- a/kernel/src/glue/v4-ia64/timer.cc
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/timer.cc
- * Description:   Timer interrupt handler
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.cc,v 1.3 2003/09/24 19:05:35 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(itc_timer.h)
-#include INC_ARCH(cr.h)
-#include INC_API(schedule.h)
-#include INC_GLUE(intctrl.h)
-
-itc_ptimer_t itc_ptimer UNIT ("cpulocal");
-
-extern "C" void handle_timer_interrupt (word_t vector,
-					ia64_exception_context_t * frame)
-{
-    word_t itm = cr_get_itm ();
-
-    do {
-	itm += get_itc_ptimer ()->get_rate ();
-	cr_set_itm (itm);
-    } while (ar_get_itc () > itm);
-
-    get_current_scheduler()->handle_timer_interrupt();
-}
-
-void itc_ptimer_t::init_global (word_t vector)
-{
-    get_interrupt_ctrl ()->register_handler (vector, handle_timer_interrupt);
-}
diff --git a/kernel/src/glue/v4-ia64/user.S b/kernel/src/glue/v4-ia64/user.S
deleted file mode 100644
index c210cd02..00000000
--- a/kernel/src/glue/v4-ia64/user.S
+++ /dev/null
@@ -1,2078 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/user.S
- * Description:   User level syscall stubs
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: user.S,v 1.47 2004/04/22 17:46:04 skoglund Exp $
- *                
- ********************************************************************/
-#include INC_ARCH(asm.h)
-#include INC_ARCH(ar.h)
-#include INC_GLUE(registers.h)
-#include INC_GLUE(config.h)
-#include INC_GLUE(context_handle.h)
-#include INC_API(procdesc.h)
-#include <asmsyms.h>
-#include <tcb_layout.h>
-
-#if defined(CONFIG_SMP)
-#define IFSMP(x...)	x
-#else
-#define IFSMP(x...)
-#endif
-
-#define ESK_FASTPATH
-
-/*
- * Some instructions (e.g., brl) are not supported on Itanium1.  Use
- * these macros to generate code which is optimized for the architecture
- * in question.
- */
-#if defined(CONFIG_CPU_IA64_ITANIUM) || defined(CONFIG_CPU_IA64_SKI)
-# define IF_I1(x)		x
-# define IF_I2(x)
-#else
-# define IF_I1(x)
-# define IF_I2(x)		x
-#endif
-
-
-/*
- * Define in order to store MRs into the UTCB on the IPC fast path.
- * Useful for debugging purposes.
- */
-//#define STORE_MRS_ON_FASTPATH
-
-
-/**
- * Wrapper for doing enter KDB within syscall bindings.  Control is
- * transferred to a regular kernel executable page where the KDB
- * entry is actually performed.
- *
- * @param str	string to print upon KDB entry
- */
-#define SYSCALL_KDB(str)		;\
-	.text				;\
-8:					;\
-{ .mlx					;\
-	break.m	0x0			;\
-	movl	r0 = 9f ;;		;\
-}					;\
-	br.sptk.few b7			;\
-					;\
-	.previous			;\
-	.rodata				;\
-9:	stringz str			;\
-	.previous			;\
-					;\
-	;;				;\
-9:	mov	r31 = ip ;;		;\
-	add	r31 = 9f-9b, r31 ;;	;\
-	mov	b7 = r31		;\
-	movl	r31 = 8b ;;		;\
-	mov	b6 = r31 ;;		;\
-	br.sptk.few b6			;\
-9:
-
-#define CHANGE_TO_KERNEL_BACKING_STORE(extra_stack_space)	\
-	/* Switch to kernel stack pointers */			;\
-	mov	r_sp = sp					;\
-	mov	r_rsc = ar.rsc					;\
-								;\
-	mov	sp = r_KERNEL_SP				;\
-	mov	ar.rsc = 0					;\
-	;;							;\
-	mov	r_bsp = ar.bspstore				;\
-	mov	r_rnat = ar.rnat				;\
-	add	num_dirty_ptr = -KTCB_SIZE, sp			;\
-	add	kernel_bspstore = -IA64_SP_TO_RSE_OFFSET, sp	;\
-	;;							;\
-	mov	ar.bspstore = kernel_bspstore			;\
-	add	num_dirty_ptr = OFS_TCB_ARCH_NUM_DIRTY, num_dirty_ptr ;\
-	;;							;\
-	mov	r_KERNEL_STACK_COUNTER = 2			;\
-	mov	num_dirty = ar.bsp				;\
-	;;							;\
-	sub	num_dirty = num_dirty, kernel_bspstore		;\
-	add	sp = -16-SIZEOF_SWITCH_CONTEXT-(extra_stack_space), sp;\
-	mov	ar.rsc = 3					;\
-	;;							;\
-	st8	[num_dirty_ptr] = num_dirty
-
-#define STORE_CURRENT_CONTEXT(syscall, num_inputs, num_outputs, \
-			      extra_stack_space)		\
-	/* Store context to local stack frame */		;\
-	alloc	loc2 = ar.pfs,num_inputs,4,num_outputs,0	;\
-	add	loc0 = 16+8+(extra_stack_space), sp		;\
-	add	loc1 = 16+16+(extra_stack_space), sp		;\
-1:	mov	loc3 = ip					;\
-	IF_I1(movl syscall_addr = sys_##syscall)		;\
-	;;							;\
-	st8	[loc0] = num_dirty, 16	/* num_dirty */		;\
-	st8	[loc1] = r_rsc, 16	/* rsc */		;\
-	add	loc3 = sys_##syscall##_return-1b, loc3		;\
-	;;							;\
-	st8	[loc0] = gp, 16		/* gp */		;\
-	st8	[loc1] = loc2, 16	/* pfs */		;\
-	;;							;\
-	st8	[loc0] = r0, 16		/* cfm */		;\
-	st8	[loc1] = loc3, 16	/* ip */		;\
-	;;							;\
-	st8	[loc0] = r_bsp, 16	/* bspstore */		;\
-	st8	[loc1] = r_rnat, 16	/* rnat */		;\
-	mov	loc2 = ar.unat					;\
-	mov	loc3 = pr					;\
-	;;							;\
-	st8	[loc0] = loc2, 16	/* unat */		;\
-	st8	[loc1] = loc3, 16	/* pr */		;\
-	mov	loc2 = psr					;\
-	;;							;\
-	st8	[loc0] = loc2, 16	/* psr */		;\
-	st8	[loc1] = r_sp		/* sp */		;\
-	mov	loc2 = rp					;\
-	;;							;\
-	st8	[loc0] = loc2		/* rp */		;\
-	IF_I1(mov b6 = syscall_addr)				;\
-	;;
-
-#define INVOKE_SYSCALL(name)					\
-	/* Invoke system call */				;\
-	movl	loc0 = TPR_INT_ENABLE_SOME			;\
-	;;							;\
-	mov	cr.tpr = loc0					;\
-	movl	gp = __gp					;\
-	;;							;\
-	srlz.d							;\
-	IF_I1(br.call.sptk.many rp = b6)			;\
-	IF_I2(brl.call.sptk.many rp = sys_##name)		;\
-								;\
-	.globl	sys_##name##_return				;\
-sys_##name##_return:						;\
-	mov	loc0 = TPR_INT_ENABLE_ALL			;\
-	;;							;\
-	mov	cr.tpr = loc0					;\
-	;;							;\
-	srlz.d
-
-#define INVOKE_SYSCALL_1(name, a0)				\
-	mov	out0 = a0					;\
-	INVOKE_SYSCALL(name)
-
-#define INVOKE_SYSCALL_2(name, a0, a1)				\
-	mov	out1 = a1					;\
-	INVOKE_SYSCALL_1(name, a0)
-
-#define INVOKE_SYSCALL_3(name, a0, a1, a2)			\
-	mov	out2 = a2					;\
-	INVOKE_SYSCALL_2(name, a0, a1)
-
-#define INVOKE_SYSCALL_4(name, a0, a1, a2, a3)			\
-	mov	out3 = a3					;\
-	INVOKE_SYSCALL_3(name, a0, a1, a2)
-
-#define INVOKE_SYSCALL_5(name, a0, a1, a2, a3, a4)		\
-	mov	out4 = a4					;\
-	INVOKE_SYSCALL_4(name, a0, a1, a2, a3)
-
-#define INVOKE_SYSCALL_6(name, a0, a1, a2, a3, a4, a5)		\
-	mov	out5 = a5					;\
-	INVOKE_SYSCALL_5(name, a0, a1, a2, a3, a4)
-
-#define INVOKE_SYSCALL_7(name, a0, a1, a2, a3, a4, a5, a6)	\
-	mov	out6 = a6					;\
-	INVOKE_SYSCALL_6(name, a0, a1, a2, a3, a4, a5)
-
-#define INVOKE_SYSCALL_8(name, a0, a1, a2, a3, a4, a5, a6, a7)	\
-	mov	out7 = a7					;\
-	INVOKE_SYSCALL_7(name, a0, a1, a2, a3, a4, a5, a6)
-
-#define RESTORE_CONTEXT(extra_stack_space)			\
-	/* Restore context from local stack frame */		;\
-	add	loc0 = 16+8+(extra_stack_space), sp		;\
-	add	loc1 = 16+16+(extra_stack_space), sp		;\
-	;;							;\
-	ld8	num_dirty = [loc0], 16	/* num_dirty */		;\
-	ld8	r_rsc = [loc1], 16	/* rsc */		;\
-	;;							;\
-	ld8	gp = [loc0], 32		/* gp */		;\
-	ld8	r_pfs = [loc1], 32	/* pfs */		;\
-	;;							;\
-	ld8	r_bsp = [loc0], 16	/* bspstore */		;\
-	ld8	r_rnat = [loc1], 16	/* rnat */		;\
-	;;							;\
-	ld8	loc2 = [loc0], 16	/* unat */		;\
-	ld8	loc3 = [loc1], 16	/* pr */		;\
-	;;							;\
-	mov	ar.unat = loc2					;\
-	mov	pr = loc3, -1					;\
-	ld8	loc2 = [loc0], 16	/* psr */		;\
-	ld8	r_sp = [loc1]		/* sp */		;\
-	;;							;\
-	ld8	loc3 = [loc0]		/* rp */		;\
-	;;							;\
-	mov	rp = loc3					;\
-	mov	psr.l = loc2					;\
-	;;							;\
-	srlz.d							;\
-	;;
-
-#define LOAD_DIRTY_USER_REGS()					\
-	/* Load dirty user registers off the kernel stack */	;\
-	shl	num_dirty = num_dirty, 16			;\
-	;;							;\
-	alloc	r31 = ar.pfs,0,0,0,0				;\
-	mov	ar.rsc = num_dirty				;\
-	;;							;\
-	loadrs							;\
-	mov	r_KERNEL_STACK_COUNTER = 0			;\
-	;;
-
-#define SWITCH_TO_USER_BACKING_STORE_AND_RETURN()		\
-	/* Change register backing store and return */		;\
-	mov	ar.bspstore = r_bsp				;\
-	mov	sp = r_sp					;\
-	;;							;\
-	mov	ar.rnat = r_rnat				;\
-	mov	ar.pfs = r_pfs					;\
-	mov	ar.rsc = r_rsc					;\
-	ssm	psr.i;						;\
-	br.ret.sptk.many rp
-
-
-	.section .user.syscall, "ax", "progbits"
-
-#if !defined(CONFIG_IPC_FASTPATH)
-
-	//
-	// Regular IPC path
-	//
-
-BEG_PROC (user_ipc)
-
-	.regstk 8,0,0,0
-
-to			= r14
-fromspecifier		= r15
-timeouts		= r16
-from			= r9
-mr0			= r32
-mr1			= r33
-mr2			= r34
-mr3			= r35
-mr4			= r36
-mr5			= r37
-mr6			= r38
-mr7			= r39
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r8
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-ptr_ip			= r24
-ptr_sp			= r23
-cur_tcb			= r22
-mr_ptr1			= r21
-mr_ptr2			= r20
-mr_ptr3			= r19
-mr_ptr4			= r18
-num_dirty_ptr		= r17
-
-	// Convert local IDs into global ones
-	cmp.ne	p10,p0 = to, r0			// ! is_nilthread (to)
-	cmp.ne	p11,p0 = fromspecifier, r0	// ! is_nilthread (fromspec)
-
-	and	r8 = 0x3f, to
-	and	r9 = 0x3f, fromspecifier
-	shr	r10 = fromspecifier, 6
-	;;
-(p10)	cmp.eq	p10,p0 = r8, r0			// is_local (to)
-(p11)	cmp.eq	p11,p0 = r9, r0			// is_local (fromspec)
-	;;
-(p11)	cmp.ne	p11,p0 = -1, r10		// ! is_anylocal (fromspec)
-	;;
-(p10)	ld8	to = [to]
-(p11)	ld8	fromspecifier = [fromspecifier]
-
-	flushrs
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-
-	rsm    psr.i
-	
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq.and p6,p0 = r15, r15
-	cmp.eq.and p6,p0 = r16, r16
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-
-	// Store MRs in UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	st8	[mr_ptr1] = mr0, 32
-	st8	[mr_ptr2] = mr1, 32
-	st8	[mr_ptr3] = mr2, 32
-	st8	[mr_ptr4] = mr3, 32
-	;;
-	st8	[mr_ptr1] = mr4
-	st8	[mr_ptr2] = mr5
-	st8	[mr_ptr3] = mr6
-	st8	[mr_ptr4] = mr7
-
-	STORE_CURRENT_CONTEXT (ipc, 0, 3, 0)
-	
-	INVOKE_SYSCALL_3 (ipc, to, fromspecifier, timeouts)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-
-	// Store MRs in UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	alloc	r14 = ar.pfs,8,0,0,0
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	ld8	mr0 = [mr_ptr1], 32
-	ld8	mr1 = [mr_ptr2], 32
-	ld8	mr2 = [mr_ptr3], 32
-	ld8	mr3 = [mr_ptr4], 32
-	;;
-	ld8	mr4 = [mr_ptr1]
-	ld8	mr5 = [mr_ptr2]
-	ld8	mr6 = [mr_ptr3]
-	ld8	mr7 = [mr_ptr4]
-
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r18 = ip ;;
-	add	r18 = 2f-1b, r18 ;;
-	mov	b6 = r18 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	mov	b6 = r15 ;;
-	mov	b6 = r16 ;;
-	br.call.sptk.few b6 = user_ipc
-
-END_PROC (user_ipc)
-
-
-#else /* CONFIG_IPC_FASTPATH */
-
-	//
-	// Fast path IPC
-	//
-
-BEG_PROC (user_ipc)
-
-	.regstk 8,0,0,0
-
-#ifdef ESK_FASTPATH
-/* esk's fastpath */
-to			= r14
-fromspecifier		= r15
-timeouts		= r16
-from			= r9
-mr0			= r32
-mr1			= r33
-mr2			= r34
-mr3			= r35
-mr4			= r36
-mr5			= r37
-mr6			= r38
-mr7			= r39
-
-src			= r17
-dst			= r18
-fromtcb			= r19
-myself			= r9		// Same as FROM parameter
-tmp1			= r20
-tmp2			= r21
-tmp3			= r22
-tmp4			= r23
-tmp5			= r4
-tmp6			= r5
-tmp7			= r6
-tmp8			= r7
-tmp9			= r13
-
-kern_sp1		= r24
-kern_sp2		= r25
-user_sp			= r4
-
-snd_state		= r31
-snd_partner		= r30
-snd_send_head		= r29
-snd_stack		= r8
-snd_space		= r19
-snd_cpu			= r8
-rcv_state		= r28
-rcv_partner		= r27
-rcv_stack		= r10
-rcv_space		= r26
-rcv_cpu			= r10
-frm_cpu			= r11
-
-Pfast			= p6
-Pslow			= p7
-Pow			= p8		// openwait
-Pcw			= p9		// closedwait
-Pcopy			= p10
-
-	.pred.rel "mutex", p6,p7
-	.pred.rel "mutex", p8,p9
-
-	// Convert local IDs into global ones
-	cmp.ne	p10,p0 = to, r0			// ! is_nilthread (to)
-	cmp.ne	p11,p0 = fromspecifier, r0	// ! is_nilthread (fromspec)
-
-	and	r8 = 0x3f, to
-	and	r9 = 0x3f, fromspecifier
-	shr	r10 = fromspecifier, 6
-	;;
-(p10)	cmp.eq	p10,p0 = r8, r0			// is_local (to)
-(p11)	cmp.eq	p11,p0 = r9, r0			// is_local (fromspec)
-	;;
-(p11)	cmp.ne	p11,p0 = -1, r10		// ! is_anylocal (fromspec)
-	;;
-(p10)	ld8	to = [to]
-(p11)	ld8	fromspecifier = [fromspecifier]
-
-	flushrs
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-	
-	rsm    psr.i
-	
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq.and p6,p0 = r15, r15
-	cmp.eq.and p6,p0 = r16, r16
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-#if defined(STORE_MRS_ON_FASTPATH)
-	// Store MRs in UTCB
-	mov	tmp1 = r_LOCAL_ID
-	;;
-	add	tmp4 = UTCB_MR_OFFSET+24, tmp1
-	add	tmp3 = UTCB_MR_OFFSET+16, tmp1
-	add	tmp2 = UTCB_MR_OFFSET+8,  tmp1
-	add	tmp1 = UTCB_MR_OFFSET,    tmp1
-	;;
-	st8	[tmp1] = mr0, 32
-	st8	[tmp2] = mr1, 32
-	st8	[tmp3] = mr2, 32
-	st8	[tmp4] = mr3, 32
-	;;
-	st8	[tmp1] = mr4
-	st8	[tmp2] = mr5
-	st8	[tmp3] = mr6
-	st8	[tmp4] = mr7
-#endif
-
-	// Calculate TCB locations for src and dst
-	mov	kern_sp1 = r_KERNEL_SP
-	and	tmp2 = 0x3f, fromspecifier
-	cmp.eq	Pow,Pcw = -1, fromspecifier // is_anythread (from)
-	;;
-	cmp.eq.and.orcm Pow,Pcw = tmp2, r0 // is_local (from) (impl. anylocal)
-	add	src = -8, kern_sp1
-	add	kern_sp2 = -SIZEOF_SWITCH_CONTEXT+8, kern_sp1
-	add	kern_sp1 = -SIZEOF_SWITCH_CONTEXT+16, kern_sp1
-	mov	tmp1 = KTCB_REGION_ID
-	shr	dst = to, 32
-	shr	fromtcb = fromspecifier, 32
-	;;
-	dep	src = 0, src, 0, KTCB_BITSIZE
-	dep.z	dst = dst, KTCB_BITSIZE, VALID_THREADNO_BITS
-	dep.z	fromtcb = fromtcb, KTCB_BITSIZE, VALID_THREADNO_BITS
-	;;
-	dep	dst = tmp1, dst, 61, 3
-	dep	fromtcb = tmp1, fromtcb, 61, 3
-
-	extr	tmp2 = timeouts, 0, 16
-	extr	tmp3 = mr0, 6, 10
-	and	tmp4 = (7 << 3), mr0		// msgtag.u (bits 3..5)
-
-	// We can do special optimization if we have a call
-	.pred.rel "mutex", p8, p11
-(Pcw)	cmp.ne	p11,p0 = to, fromspecifier
-(Pow)	cmp.ne	p11,p0 = r0, r0
-
-	add	snd_state =	OFS_TCB_THREAD_STATE, src
-	add	snd_partner =	OFS_TCB_PARTNER, src
-	add	snd_send_head = OFS_TCB_SEND_HEAD, src
-	add	r2 =		OFS_TCB_RESOURCE_BITS, src
-IFSMP(	add	snd_cpu =	OFS_TCB_CPU, src)
-	;;
-	add	rcv_space =	OFS_TCB_SPACE, dst
-	add	rcv_state =	OFS_TCB_THREAD_STATE, dst
-	add	rcv_partner =	OFS_TCB_PARTNER, dst
-	add	r3 =		OFS_TCB_RESOURCE_BITS, dst
-IFSMP(	add	rcv_cpu =	OFS_TCB_CPU, dst)
-	add	tmp9 = (KTCB_SIZE - SIZEOF_EXCEPTION_CONTEXT + \
-		        EXC_CONTEXT_IPSR_OFFSET), dst
-
-(p11)	add	tmp6 =		OFS_TCB_THREAD_STATE, fromtcb
-(p11)	add	tmp7 =		OFS_TCB_PARTNER, fromtcb
-IFSMP((p11)add	frm_cpu =	OFS_TCB_CPU, fromtcb)
-
-	cmp.ne	Pfast,Pslow = 0, to		// to != nil
-	;;
-	cmp.ne.and.orcm Pfast,Pslow = 0, fromspecifier // FromSpecifier != nil
-	cmp.eq.and.orcm Pfast,Pslow = 0, tmp2	// RcvTimeout == 0
-	cmp.eq.and.orcm Pfast,Pslow = 0, tmp3	// t == 0, flags == 0
-	cmp.ne	Pcopy,p0 = 0, tmp4	// u >= 8
-	;;
-(Pslow)	br.spnt.many slow_path_ipc
-	mov	myself = r_GLOBAL_ID
-	ld8	tmp1 = [dst]
-	ld8	tmp2 = [rcv_state]
-	ld8	tmp3 = [rcv_partner]
-	ld8	tmp4 = [r2]
-(Pow)	ld8	tmp5 = [snd_send_head]
-(p11)	ld8	tmp5 = [fromtcb]
-(p11)	ld8	tmp6 = [tmp6]
-(p11)	ld8	tmp7 = [tmp7]
-#if defined(CONFIG_SMP)
-	ld2	snd_cpu = [snd_cpu]
-	ld2	rcv_cpu = [rcv_cpu]
-(p11)	ld2	frm_cpu = [frm_cpu]
-#endif
-	ld8	rcv_space = [rcv_space]
-	ld8	r3 = [r3]
-	movl	r2 = TSTATE_WAITING_FOREVER
-	movl	tmp8 = TSTATE_POLLING
-	ld8	tmp9 = [tmp9]
-	;;
-	cmp.eq.and.orcm Pfast,Pslow = tmp1, to	// dst->myself == to
-	cmp.eq.and.orcm Pfast,Pslow = tmp2, r2	// dst->state == waiting
-	cmp.eq.and.orcm Pfast,Pslow = tmp4, r0	// src->resrouce_bits == 0
-	cmp.eq.and.orcm Pfast,Pslow = r3, r0	// dst->resrouce_bits == 0
-	cmp.ne	p12,p0 = tmp3, myself		// dst->partner != myself
-#if defined(CONFIG_SMP)
-	cmp.eq.and.orcm Pfast,Pslow = snd_cpu, rcv_cpu // dst->cpu == src->cpu
-(p11)	cmp.eq.and.orcm Pfast,Pslow = snd_cpu, frm_cpu // frm->cpu == src->cpu
-#endif
-(p11)	cmp.eq.and.orcm Pfast,Pslow = tmp5, fromspecifier 
-						// frm->myself == fromspecifier
-(p11)	cmp.eq	p11,p0 = tmp6, tmp8		// frm->state == polling
-(Pow)	cmp.eq.and.orcm Pfast,Pslow = tmp5, r0	// src->sendhead == 0
-	mov	tmp4 = -1
-	;;
-	tbit.z.and.orcm Pfast,Pslow = tmp9, 32	// dst->psr.cpl == 0
-(p12)	cmp.eq.and.orcm Pfast,Pslow = tmp3,tmp4 // dst->partner == any
-(p11)	cmp.eq.and.orcm Pfast,Pslow = tmp7, to	// frm->partner != myself
-	cmp.ne.and.orcm Pfast,Pslow = rcv_space, r0	// dst->space != 0
-	;;
-(Pslow)	br.spnt.many slow_path_ipc
-
-//	enter_kdebug ("fast path")
-
-	//
-	// We are now doing fast path IPC
-	//
-
-	add	snd_stack =	OFS_TCB_STACK, src
-	add	snd_space =	OFS_TCB_SPACE, src
-	add	rcv_stack =	OFS_TCB_STACK, dst
-
-	// Create context frame for sender
-
-	mov	user_sp = sp
-	mov	tmp1 = ar.rsc
-	mov	ar.rsc = (3 << 2)	// pl=3, mode=lazy
-	add	sp = -16, kern_sp1
-	movl	tmp4 = ipc_fast_path_reactivation_stub
-	st8	[kern_sp2] = r0, 16	// num_dirty
-	;;
-	alloc	tmp3 = ar.pfs, 8,0,0,0
-	mov	r_KERNEL_STACK_COUNTER = 1 // we have a valid kernel sp
-	;;
-	st8	[kern_sp1] = tmp1, 16	// rsc
-	st8	[kern_sp2] = gp, 16	// gp
-	;;
-	mov	tmp2 = ar.bsp
-	st8	[kern_sp1] = tmp3, 16	// pfs
-	st8	[kern_sp2] = r0, 16	// cfm
-	;;
-	st8	[kern_sp1] = tmp4, 16	// ip
-	st8	[kern_sp2] = tmp2, 16	// bspstore
-	mov	tmp3 = ar.rnat
-	mov	tmp4 = ar.unat
-	;;
-	mov	tmp1 = pr
-	mov	tmp2 = psr
-	st8	[kern_sp1] = tmp3, 16	// rnat
-	st8	[kern_sp2] = tmp4, 16	// unat
-	;;
-	mov	tmp4 = rp
-	st8	[kern_sp1] = tmp1, 16	// pr
-	st8	[kern_sp2] = tmp2, 16	// psr
-	;;
-	st8	[kern_sp1] = user_sp, 16 // sp
-	st8	[kern_sp2] = tmp4, 16	// rp
-	st8	[snd_stack] = sp
-
-	// Do we need to copy MRs between UTCBs
-(Pcopy)	br.spnt.few ipc_copy_mrs
-ipc_copy_done:
-
-	// Set up thread states
-
-	ld8	tmp3 = [snd_space]
-
-	movl	tmp1 = TSTATE_WAITING_FOREVER
-	mov	tmp2 = TSTATE_RUNNING
-	;;
-	st8	[snd_state] = tmp1
-	st8	[rcv_state] = tmp2
-	st8	[snd_partner] = fromspecifier
-
-	// Switch to destination thread
-
-	cmp.eq	p11,p12 = tmp3, rcv_space // p11 = (from->space == to->space)
-					// p12 = (from->space != to->space)
-	.pred.rel "mutex", p11,p12
-	dep	tmp2 = 0, rcv_space, 61, 3
-	mov	tmp3 = (12 << 2) + 0
-	mov	r2 = dst
-	;;
-	ld8	tmp1 = [dst]		// dst->myself_global
-(p12)	shr	tmp2 = tmp2, (12-8)
-	;;
-(p11)	mov	from = r_LOCAL_ID
-(p12)	or	tmp4 = tmp3, tmp2
-	;;
-(p12)	dep	tmp4 = 0, tmp4, (8+18), (64-8-18)
-	;;
-	add	tmp2 = OFS_TCB_MYSELF_LOCAL, dst
-	add	tmp3 = OFS_TCB_ARCH_PHYS_ADDR, dst
-(p12)	mov	rr[r0] = tmp4
-	;;
-(p12)	srlz.d
-(p12)	srlz.i
-	addl	tmp4 = KTCB_SIZE, r2
-	;;
-	ld8	tmp2 = [tmp2]		// dst->myself_local
-	ld8	tmp3 = [tmp3]		// dst->phys_tcb_addr
-	mov	r_KERNEL_SP = tmp4
-	;;
-	add	sp = -SIZEOF_SWITCH_CONTEXT, tmp4
-	mov	r_GLOBAL_ID = tmp1
-	mov	r_LOCAL_ID = tmp2
-	mov	r_PHYS_TCB_ADDR = tmp3
-	;;
-
-	// Restore context frame for receiver
-
-//	enter_kdebug ("restore context")
-
-	add	kern_sp1 = 8+8, sp
-	add	kern_sp2 = 8+16, sp
-	mov	ar.rsc = (3 << 2)	// pl=0, mode=lazy
-	;;
-	ld8	tmp1 = [kern_sp1], 16	// rsc
-	ld8	gp = [kern_sp2], 32	// gp
-	;;
-	ld8	tmp3 = [kern_sp1], 32	// pfs
-	ld8	tmp4 = [kern_sp2], 16	// bspstore
-	;;
-	mov	ar.pfs = tmp3
-	mov	ar.bspstore = tmp4
-	;;
-	loadrs				// invalidate stacked regs
-	invala
-	ld8	tmp3 = [kern_sp1], 16	// rnat
-	ld8	tmp4 = [kern_sp2], 16	// unat
-	;;
-	mov	ar.rnat = tmp3
-	mov	ar.unat = tmp4
-	;;
-	mov	ar.rsc = tmp1
-	ld8	tmp3 = [kern_sp1], 16	// pr
-	ld8	tmp4 = [kern_sp2], 16	// psr
-	;;
-	ld8	tmp1 = [kern_sp1]	// sp
-	ld8	tmp2 = [kern_sp2]	// rp
-	dep	tmp4 = -1, tmp4, 14, 1	// enable interrupts
-	;;
-	mov	r_KERNEL_STACK_COUNTER = 0 // we have an invalid kernel sp
-	mov	pr = tmp3, -1
-	mov	psr.l = tmp4
-	;;
-	srlz.d
-	mov	sp = tmp1
-	mov	rp = tmp2
-	;;
-//	enter_kdebug ("context restored")
-	ssm	psr.i
-	br.ret.sptk.many rp
-
-#else
-/*
- * matthewc's fastpath
- *
- * Conditions:
- *      RcvTimeout == 0
- *      mr0.{t,flags} == 0
- *      (FromSpecifier == dst) || (FromSpecifier == any)
- *      dst->myself == to
- *      dst->state == waiting
- *      src->resource_bits == 0
- *      dst->resource_bits == 0
- *      (dst->partner == myself) || (dst->partner == any)
- *      [SMP] dst->cpu == src->cpu  ** not implemented yet **
- *     if open wait:
- *      src->sendhead == 0
- */
-
-// "global" variables used throughout function
-src			= r2
-dst			= r3
-src_sp			= r4
-src_myself		= r9 // output
-dst_sp			= r5
-dst_myself		= r6
-tmp			= r7
-
-// first stage
-to			= r14 // }
-fromspecifier		= r15 // } inputs
-timeouts		= r16 // }
-mr0			= r32 // }
-mr1			= r33 // }
-mr2			= r34 // }
-mr3			= r35 // }
-mr4			= r36 // }
-mr5			= r37 // }
-mr6			= r38 // }
-mr7			= r39 // }
-src_resource_bits	= r17
-src_send_head		= r18
-dst_state		= r19
-dst_partner		= r20
-dst_resource_bits	= r21
-rcv_timeout		= r22
-msgtag_u		= r23
-msgtag_tf		= r24
-Pfast			= p6
-Pslow			= p7
-Pow			= p8		// src open wait
-Pcw			= p9		// src closed wait
-Pdow			= p10		// dst open wait
-Pdcw			= p11		// dst closed wait
-Pcopy			= p12
-
-// second stage
-from			= r9 // output
-dst_state2		= r6 // }
-src_state		= r6 // } these overlap with each other and with dst_myself
-src_stack		= r6 // }
-src_partner		= r6 // }
-dst_myself_local	= r22 // overlaps wth new_pr
-dst_phys_addr		= r23 // overlaps with new_rp
-dst_space		= r10 // overlaps with new_sp
-sp1			= r14 // overlaps with to
-sp2			= r16 // overlaps with timeouts
-new_sp			= r10
-new_gp			= r11
-new_rsc			= r13
-new_bspstore		= r17
-new_psr			= r18
-new_rnat		= r19
-new_unat		= r20
-new_pfs			= r21
-new_pr			= r22
-new_rp			= r23
-old_pfs			= r24
-old_pr			= r25
-old_rnat		= r26
-old_rp			= r27
-old_rsc			= r28 // these 4 are loaded in stage 1
-old_bspstore		= r29
-old_psr			= r30
-old_unat		= r31
-
-
-		// Stage 1: check fast path conditions, copy MRs
-		// We need to load a number of the variables from src and dst TCBs.  I2 can issue and retire 2 loads per cycle
-		// (dual-ported L1D cache) but we have more than 2 variables to check; we employ a 3 stage pipeline - form
-		// address of variable, load, do check.  Spare issue slots are used to calculate and check additional conditions.
-
-		.mmi
-/*M0*/		flushrs								// flushrs in parallel with mov to overlap latency
-/*A*/		cmp.eq	Pfast,Pslow = r0,r0					// start by assuming fast path
-/*I0*/		shr	dst = to, 32
-		.mmi
-/*M2*/		mov	src_sp = r_KERNEL_SP					// 12 cycles latency - issue ASAP
-/*A*/		mov	tmp = KTCB_REGION_ID
-/*I*/		nop.i	0x0
-		;;
-		.mib
-/*A*/		and	msgtag_u = 0x3f, mr0
-/*I0*/		dep.z	dst = dst, KTCB_BITSIZE, VALID_THREADNO_BITS
-/*B0*/		epc
-		.mmi
-/*M2*/		mov	old_rsc = ar.rsc					// 12 cycles latency
-/*A*/		cmp.eq	Pow,Pcw = -1, fromspecifier
-/*I*/		nop.i	0x0
-		;;
-		.mmi
-/*A*/	(Pcw)	cmp.eq.and.orcm	Pfast,Pslow = to, fromspecifier			// COND: if CW, fromspecifier == to
-/*A*/		add	src = -8, src_sp					// stall up to 8 cycles (src_sp not ready)
-/*I0*/		dep	dst = tmp, dst, 61, 3
-		.mlx
-/*M2*/		mov	old_bspstore = ar.bsp					// 12 cycles latency
-/*LX*/		movl	tmp = TSTATE_WAITING_FOREVER
-		;;
-		.mmi
-/*M01*/		ld8	dst_myself = [dst]
-/*A*/		add	src_sp = -SIZEOF_SWITCH_CONTEXT, src_sp
-/*I0*/		dep	src = 0, src, 0, KTCB_BITSIZE
-		.mmi
-/*M2*/		mov	old_psr = psr						// 12 cycles latency
-/*A*/		add	dst_state = OFS_TCB_THREAD_STATE, dst
-/*A*/		add	dst_partner = OFS_TCB_PARTNER, dst
-		;;
-		.mmi
-/*M01*/		ld8	dst_state = [dst_state]
-/*M01*/		ld8	dst_partner = [dst_partner]
-/*I0*/		extr	msgtag_tf = mr0, 6, 10
-		.mmi
-/*A*/		cmp.eq.and.orcm	Pfast,Pslow = to, dst_myself			// COND: dst->myself == to
-/*A*/		add	dst_resource_bits = OFS_TCB_RESOURCE_BITS, dst
-/*A*/		add	src_resource_bits = OFS_TCB_RESOURCE_BITS, src
-		;;
-		.mmi
-/*M01*/		ld8	dst_resource_bits = [dst_resource_bits]
-/*M01*/		ld8	src_resource_bits = [src_resource_bits]
-/*I0*/		extr	rcv_timeout = timeouts, 0, 16
-		.mmi
-/*M2*/		mov	old_unat = ar.unat					// 5 cycles latency
-/*A*/	(Pow)	add	src_send_head = OFS_TCB_SEND_HEAD, src
-/*A*/		cmp.eq.and.orcm	Pfast,Pslow = tmp, dst_state			// COND: dst->state == waiting
-		;;
-		.mmi
-/*M01*/		ld8	src_myself = [src]
-/*M01*/	(Pow)	ld8	src_send_head = [src_send_head]
-/*A*/		cmp.eq	Pdow,Pdcw = -1, dst_partner
-		.mmi
-/*M2*/		rsm	psr.i
-/*A*/		cmp.eq.and.orcm	Pfast,Pslow = r0, dst_resource_bits		// COND: dst->resource_bits == 0
-/*A*/		cmp.eq.and.orcm	Pfast,Pslow = r0, src_resource_bits		// COND: src->resource_bits == 0
-		;;
-		.mmi
-/*A*/	(Pdcw)	cmp.eq.and.orcm Pfast,Pslow = src_myself, dst_partner		// COND: if partner CW, dst->partner == myself
-/*A*/	(Pow)	cmp.eq.and.orcm	Pfast,Pslow = r0, src_send_head			// COND: if OW, src->sendhead == 0
-/*A*/		cmp.eq.and.orcm	Pfast,Pslow = 0, rcv_timeout			// COND: RcvTimeout == 0
-		.mib
-/*A*/		cmp.eq.and.orcm	Pfast,Pslow = r0, msgtag_tf			// COND: mr0.{t,flags} == 0
-/*I*/		nop.i 0x0
-/*B*/	(Pslow)		br.spnt.many	slow_path_ipc				// ELSE SLOW PATH
-										// FIXME: dst->partner ?
-		;;
-		.mib
-/*M2*/		mov	ar.rsc = (3 << 2)					// 14 cycles latency to loadrs
-/*A*/		cmp.le	Pcopy,p0 = 8, msgtag_u
-/*B*/	(Pcopy)		br.spnt.few	ipc_copy_mrs				// copy MRs if necessary
-		;;
-ipc_copy_done:
-
-		// Stage 2: context switch
-		// Update current thread pointers in kernel registers, switch address space, switch registers
-		// Assumption: no exceptions in the first part, otherwise we need to be more careful about ordering
-
-		.mmi
-/*M2*/		mov	old_rnat = ar.rnat					// 5 cycles latency
-/*A*/		add	dst_space = OFS_TCB_SPACE, dst
-/*A*/		add	dst_sp = KTCB_SIZE, dst
-		;;
-		.mmi
-/*M01*/		ld8	dst_space = [dst_space]
-/*M2*/		mov	r_KERNEL_SP = dst_sp
-/*A*/		add	dst_myself_local = OFS_TCB_MYSELF_LOCAL, dst
-		.mmi
-/*A*/		add	dst_phys_addr = OFS_TCB_ARCH_PHYS_ADDR, dst
-/*A*/		add	sp1 = -SIZEOF_SWITCH_CONTEXT+16, dst_sp
-/*A*/		add	sp2 = -SIZEOF_SWITCH_CONTEXT+24, dst_sp
-		;;
-		.mmi
-/*M01*/		ld8	dst_myself_local = [dst_myself_local]
-/*M01*/		ld8	dst_phys_addr = [dst_phys_addr]
-/*I0*/		shr	dst_space = dst_space, (12-8)
-		.mmi
-/*M2*/		mov	r_GLOBAL_ID = dst_myself
-/*A*/		add	dst_state2 = OFS_TCB_THREAD_STATE, dst
-/*A*/		mov	tmp = TSTATE_RUNNING
-		;;
-		.mmi
-/*M01*/		ld8	new_rsc = [sp1], 16
-/*M01*/		ld8	new_gp = [sp2], 32			// skip cfm
-/*I0*/		dep.z	dst_space = dst_space, 8, 18
-		.mmi
-/*M2*/		mov	r_LOCAL_ID = dst_myself_local
-/*M23*/		st8	[dst_state2] = tmp
-/*A*/		add	src_state = OFS_TCB_THREAD_STATE, src
-		;;
-		.mmi
-/*M01*/		ld8	new_pfs = [sp1], 32		// skip ip
-/*M01*/		ld8	new_bspstore = [sp2], 16
-/*A*/		or	dst_space = (12 << 2), dst_space
-		.mlx
-/*M2*/		mov	r_PHYS_TCB_ADDR = dst_phys_addr
-/*LX*/		movl	tmp = TSTATE_WAITING_FOREVER
-		;;
-		.mmi
-/*M01*/		ld8	new_rnat = [sp1], 16
-/*M01*/		ld8	new_unat = [sp2], 16
-/*I0*/		mov	old_pfs = ar.pfs		// 2 cycles latency
-		.mmi
-/*M2*/		mov	rr[r0] = dst_space		// do we need to srlz somewhere?
-/*M23*/		st8	[src_state] = tmp
-/*A*/		add	src_stack = OFS_TCB_STACK, src
-		;;
-		.mmi
-/*M01*/		ld8	new_pr = [sp1], 16
-/*M01*/		ld8	new_psr = [sp2], 16
-/*I0*/		mov	old_pr = pr			// 2 cycles latency
-		.mmi
-/*M2*/		mov	ar.rnat = new_rnat
-/*M23*/		st8	[src_stack] = src_sp
-/*A*/		add	src_partner = OFS_TCB_PARTNER, src
-		;;
-		.mmi
-/*M01*/		ld8	new_sp = [sp1]
-/*M01*/		ld8	new_rp = [sp2]
-/*I0*/		mov	old_rp = b0			// 2 cycles latency
-		.mmi
-/*M2*/		mov	ar.unat = new_unat
-/*M23*/		st8	[src_partner] = fromspecifier
-/*A*/		add	sp2 = 8, src_sp
-		;;
-		.mmi
-/*A*/		add	sp1 = 16, src_sp
-/*M2*/		mov	ar.bspstore = new_bspstore
-/*I0*/		mov	b0 = new_rp
-		.mmi
-/*M23*/		st8	[sp2] = r0, 16			// num_dirty
-/*LX*/		movl	tmp = ipc_fast_path_reactivation_stub
-		;;
-		.mmi
-/*M23*/		st8	[sp1] = old_rsc, 16
-/*M23*/		st8	[sp2] = gp, 16
-/*I*/		nop.i	0x0
-		;;
-		.mmi
-/*M23*/		st8	[sp1] = old_pfs, 16
-/*M23*/		st8	[sp2] = r0, 16			// cfm
-/*I*/		nop.i	0x0
-		;;
-		.mmi
-/*M23*/		st8	[sp1] = tmp, 16		// ip
-/*M23*/		st8	[sp2] = old_bspstore, 16
-/*I*/		nop.i	0x0
-		;;
-		.mmi
-/*M23*/		st8	[sp1] = old_rnat, 16
-/*M23*/		st8	[sp2] = old_unat, 16
-/*I*/		nop.i	0x0
-		;;
-		.mmi
-/*M23*/		st8	[sp1] = old_pr, 16
-/*M23*/		st8	[sp2] = old_psr, 16
-/*I*/		nop.i	0x0
-		;;
-		.mmi
-/*M23*/		st8	[sp1] = sp
-/*M23*/		st8	[sp2] = old_rp
-/*I*/		nop.i	0x0
-		;;
-		.mmi
-/*M0*/		loadrs
-/*M1*/		invala
-/*A*/		and	new_psr = 0x3f, new_psr
-		.mmi
-/*M2*/		mov	ar.rsc = new_rsc
-/*M*/		mov	gp = new_gp
-/*I*/		mov	sp = new_sp
-		;;
-		.mmi
-/*M2*/		ssm	psr.i
-/*M*/		nop.m	0x0
-/*I0*/		mov	pr = new_pr, -1
-
-		.mib
-/*M2*/		mov	psr.um = new_psr		// split issue
-/*I0*/		mov	ar.pfs = new_pfs
-/*B*/		br.ret.sptk.many	rp					// do we need to do something about Itanium 2 Erratum 9?
-		;;
-#endif
-
-
-	//
-	// Copy MRs from source UTCB to destination UTCB.
-	//
-
-ipc_copy_mrs:
-
-#ifdef ESK_FASTPATH
-num		= tmp1
-src_mr		= tmp2
-src_mr_pre	= tmp3
-dst_mr		= tmp4
-#else 
-num		= msgtag_u
-src_mr		= r25
-src_mr_pre	= r26
-dst_mr		= r10
-tmp5		= r11
-#endif
-
-//	enter_kdebug ("copy mrs")
-
-#ifdef ESK_FASTPATH
-	extr.u  num = mr0, 0, 6
-#endif
-	mov	src_mr = r_LOCAL_ID
-	add	dst_mr = OFS_TCB_UTCB, dst
-	;;
-	add	num = -8, num
-	add	src_mr = UTCB_MR_OFFSET + (8*8), src_mr
-	ld8	dst_mr = [dst_mr]
-	;;
-	lfetch	[src_mr]
-	add	src_mr_pre = 32, src_mr
-	add	dst_mr = UTCB_MR_OFFSET + (8*8), dst_mr
-	mov	ar.lc = num
-	;;
-7:	ld8	tmp5 = [src_mr], 8
-	lfetch	[src_mr_pre], 8
-	;;
-	st8	[dst_mr] = tmp5, 8
-
-	br.cloop.sptk.few 7b
-	;;
-	br.sptk.many ipc_copy_done
-
-
-	//
-	// Return stub to use if a thread doing a fast path IPC is
-	// rescheduled using the regular thread_switch() (i.e., if
-	// thread is replied to with a regular IPC).
-	//
-
-r_rp			= r16		// defined by thread switch
-r_pfs			= r18		// defined by thread switch
-current			= r19
-r_ip			= r20
-r_sp			= r21
-mr_ptr1			= r22
-mr_ptr2			= r23
-mr_ptr3			= r24
-mr_ptr4			= r25
-tmp1			= r31
-tmp2			= r30
-tmp3			= r29
-tmp4			= r28
-
-ipc_fast_path_reactivation_stub:
-	mov	tmp1 = r_KERNEL_SP
-	;;
-	add	sp = -SIZEOF_SWITCH_CONTEXT, tmp1
-	mov	r_KERNEL_STACK_COUNTER = 1	// valid kernel sp, not bsp
-	;;
-//	enter_kdebug ("reactivation stub")
-
-	add	tmp1 = 16, sp
-	add	tmp2 = 24, sp
-	add	tmp3 = SIZEOF_SWITCH_CONTEXT-16, sp
-	;;
-	ld8	tmp1 = [tmp1]		// ar.rsc
-	ld8	gp = [tmp2]		// gp
-	dep	current = 0, sp, 0, KTCB_BITSIZE
-	ld8	r_sp = [tmp3]		// sp
-	mov	rp = r_rp
-	;;
-	mov	r_KERNEL_STACK_COUNTER = 0 // we have an invalid kernel sp
-	;;
-	add	tmp1 = OFS_TCB_PARTNER, current
-	add	tmp2 = OFS_TCB_THREAD_STATE, current
-	mov	sp = r_sp
-	movl	tmp3 = TSTATE_RUNNING
-	;;
-
-	// Set FROM parameter
-	ld8	from = [tmp1]
-
-	// Restore thread state
-	st8	[tmp2] = tmp3
-
-	// Restore MRs from UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	alloc	tmp1 = ar.pfs,8,0,0,0
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	ld8	mr0 = [mr_ptr1], 32
-	ld8	mr1 = [mr_ptr2], 32
-	ld8	mr2 = [mr_ptr3], 32
-	ld8	mr3 = [mr_ptr4], 32
-	;;
-	ld8	mr4 = [mr_ptr1]
-	ld8	mr5 = [mr_ptr2]
-	ld8	mr6 = [mr_ptr3]
-	ld8	mr7 = [mr_ptr4]
-
-	mov	ar.pfs = r_pfs
-	mov	ar.rsc = tmp1
-
-	// Make sure that interrupts are enabled
-	mov	tmp1 = TPR_INT_ENABLE_ALL
-	;;
-	ssm	psr.i
-	mov	cr.tpr = tmp1
-	;;
-	srlz.d
-
-	br.ret.sptk.many rp
-
-
-	//
-	// IPC fast path fallback into slow path
-	//
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r8
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-ptr_ip			= r24
-ptr_sp			= r23
-cur_tcb			= r22
-mr_ptr1			= r21
-mr_ptr2			= r20
-mr_ptr3			= r19
-mr_ptr4			= r18
-num_dirty_ptr		= r17
-
-slow_path_ipc:
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-
-	// Store MRs in UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	st8	[mr_ptr1] = mr0, 32
-	st8	[mr_ptr2] = mr1, 32
-	st8	[mr_ptr3] = mr2, 32
-	st8	[mr_ptr4] = mr3, 32
-	;;
-	st8	[mr_ptr1] = mr4
-	st8	[mr_ptr2] = mr5
-	st8	[mr_ptr3] = mr6
-	st8	[mr_ptr4] = mr7
-
-	STORE_CURRENT_CONTEXT (ipc, 0, 3, 0)
-	
-	INVOKE_SYSCALL_3 (ipc, to, fromspecifier, timeouts)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-
-	// Store MRs in UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	alloc	r14 = ar.pfs,8,0,0,0
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	ld8	mr0 = [mr_ptr1], 32
-	ld8	mr1 = [mr_ptr2], 32
-	ld8	mr2 = [mr_ptr3], 32
-	ld8	mr3 = [mr_ptr4], 32
-	;;
-	ld8	mr4 = [mr_ptr1]
-	ld8	mr5 = [mr_ptr2]
-	ld8	mr6 = [mr_ptr3]
-	ld8	mr7 = [mr_ptr4]
-
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r18 = ip ;;
-	add	r18 = 2f-1b, r18 ;;
-	mov	b6 = r18 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	mov	b6 = r15 ;;
-	mov	b6 = r16 ;;
-	br.call.sptk.few b6 = user_ipc
-
-END_PROC (user_ipc)
-
-#endif /* CONFIG_IPC_FATPATH */
-
-
-BEG_PROC (user_thread_control)
-
-arg_dest		= r14
-arg_space_specifier	= r15
-arg_scheduler		= r16
-arg_pager		= r17
-arg_utcb_location	= r18
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r21
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-ptr_ip			= r24
-ptr_sp			= r23
-num_dirty_ptr		= r22
-
-	// Convert local IDs into global ones
-	cmp.ne	p10,p0 = arg_dest, r0
-	cmp.ne	p11,p0 = arg_space_specifier, r0
-	cmp.ne	p12,p0 = arg_scheduler, r0
-	cmp.ne	p13,p0 = arg_pager, r0
-
-	and	r8  = 0x3f, arg_dest
-	and	r9  = 0x3f, arg_space_specifier
-	and	r10 = 0x3f, arg_scheduler
-	and	r11 = 0x3f, arg_pager
-	;;
-(p10)	cmp.eq	p10,p0 = r8, r0
-(p11)	cmp.eq	p11,p0 = r9, r0
-(p12)	cmp.eq	p12,p0 = r10,r0
-(p13)	cmp.eq	p13,p0 = r11,r0
-	;;
-(p10)	ld8	arg_dest = [arg_dest]
-(p11)	ld8	arg_space_specifier = [arg_space_specifier]
-(p12)	ld8	arg_scheduler = [arg_scheduler]
-(p13)	ld8	arg_pager = [arg_pager]
-
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-
-	rsm    psr.i
-	
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq.and p6,p0 = r15, r15
-	cmp.eq.and p6,p0 = r16, r16
-	cmp.eq.and p6,p0 = r17, r17
-	cmp.eq.and p6,p0 = r18, r18
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-	STORE_CURRENT_CONTEXT (thread_control, 0, 5, 0)
-
-	INVOKE_SYSCALL_5 (thread_control, arg_dest, arg_space_specifier,
-			  arg_scheduler, arg_pager, arg_utcb_location)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r19 = ip ;;
-	add	r19 = 2f-1b, r19 ;;
-	mov	b6 = r19 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	mov	b6 = r15 ;;
-	mov	b6 = r16 ;;
-	mov	b6 = r17 ;;
-	mov	b6 = r18 ;;
-	br.call.sptk.few b6 = user_thread_control
-
-END_PROC (user_thread_control)
-
-
-BEG_PROC (user_space_control)
-
-arg_space_specifier	= r14
-arg_control		= r15
-arg_kip_area		= r16
-arg_utcb_area		= r17
-arg_redirector		= r18
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r21
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-ptr_ip			= r24
-ptr_sp			= r23
-num_dirty_ptr		= r22
-
-	// Convert local IDs into global ones
-	cmp.ne	p10,p0 = arg_space_specifier, r0
-	cmp.ne	p11,p0 = arg_redirector, r0
-
-	and	r8  = 0x3f, arg_space_specifier
-	and	r9  = 0x3f, arg_redirector
-	;;
-(p10)	cmp.eq	p10,p0 = r8, r0
-(p11)	cmp.eq	p11,p0 = r9, r0
-	;;
-(p10)	ld8	arg_space_specifier = [arg_space_specifier]
-(p11)	ld8	arg_redirector = [arg_redirector]
-
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-
-	rsm    psr.i
-	
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq.and p6,p0 = r15, r15
-	cmp.eq.and p6,p0 = r16, r16
-	cmp.eq.and p6,p0 = r17, r17
-	cmp.eq.and p6,p0 = r18, r18
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-	STORE_CURRENT_CONTEXT (space_control, 0, 5, 0)
-
-	INVOKE_SYSCALL_5 (space_control, arg_space_specifier, arg_control,
-			  arg_kip_area, arg_utcb_area, arg_redirector)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r18 = ip ;;
-	add	r18 = 2f-1b, r18 ;;
-	mov	b6 = r18 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	mov	b6 = r15 ;;
-	mov	b6 = r16 ;;
-	mov	b6 = r17 ;;
-	mov	b6 = r18 ;;
-	br.call.sptk.few b6 = user_space_control
-
-END_PROC (user_space_control)
-
-
-
-BEG_PROC (user_schedule)
-
-arg_dest		= r14
-arg_time_ctrl		= r15
-arg_processor_ctrl	= r16
-arg_prio		= r17
-arg_preemption_ctrl	= r18
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r21
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-ptr_ip			= r24
-ptr_sp			= r23
-num_dirty_ptr		= r22
-
-	// Convert local IDs into global ones
-	cmp.ne	p10,p0 = arg_dest, r0
-	and	r8  = 0x3f, arg_dest
-	;;
-(p10)	cmp.eq	p10,p0 = r8, r0
-	;;
-(p10)	ld8	arg_dest = [arg_dest]
-
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-	
-	rsm    psr.i
-	
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq.and p6,p0 = r15, r15
-	cmp.eq.and p6,p0 = r16, r16
-	cmp.eq.and p6,p0 = r17, r17
-	cmp.eq.and p6,p0 = r18, r18
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-	STORE_CURRENT_CONTEXT (schedule, 0, 5, 0)
-
-	INVOKE_SYSCALL_5 (schedule, arg_dest, arg_time_ctrl,
-			  arg_processor_ctrl, arg_prio, arg_preemption_ctrl)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r18 = ip ;;
-	add	r18 = 2f-1b, r18 ;;
-	mov	b6 = r18 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	mov	b6 = r15 ;;
-	mov	b6 = r16 ;;
-	mov	b6 = r17 ;;
-	mov	b6 = r18 ;;
-	br.call.sptk.few b6 = user_schedule
-
-END_PROC (user_schedule)
-
-
-BEG_PROC (user_thread_switch)
-
-arg_dest		= r14
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r21
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-ptr_ip			= r24
-ptr_sp			= r23
-num_dirty_ptr		= r22
-
-	// Convert local IDs into global ones
-	cmp.ne	p10,p0 = arg_dest, r0
-	and	r8  = 0x3f, arg_dest
-	;;
-(p10)	cmp.eq	p10,p0 = r8, r0
-	;;
-(p10)	ld8	arg_dest = [arg_dest]
-
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-
-	rsm    psr.i
-	
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-	STORE_CURRENT_CONTEXT (thread_switch, 0, 1, 0)
-
-	INVOKE_SYSCALL_1 (thread_switch, arg_dest)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r18 = ip ;;
-	add	r18 = 2f-1b, r18 ;;
-	mov	b6 = r18 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	br.call.sptk.few b6 = user_thread_switch
-
-END_PROC (user_thread_switch)
-
-
-BEG_PROC (user_unmap)
-
-arg_control		= r14
-mr0			= r32
-mr1			= r33
-mr2			= r34
-mr3			= r35
-mr4			= r36
-mr5			= r37
-mr6			= r38
-mr7			= r39
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r21
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-ptr_ip			= r24
-ptr_sp			= r23
-num_dirty_ptr		= r22
-mr_ptr1			= r21
-mr_ptr2			= r20
-mr_ptr3			= r19
-mr_ptr4			= r18
-
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-
-	rsm    psr.i
-
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-
-	// Store MRs in UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	st8	[mr_ptr1] = mr0, 32
-	st8	[mr_ptr2] = mr1, 32
-	st8	[mr_ptr3] = mr2, 32
-	st8	[mr_ptr4] = mr3, 32
-	;;
-	st8	[mr_ptr1] = mr4
-	st8	[mr_ptr2] = mr5
-	st8	[mr_ptr3] = mr6
-	st8	[mr_ptr4] = mr7
-
-	STORE_CURRENT_CONTEXT (unmap, 0, 1, 0)
-
-	INVOKE_SYSCALL_1 (unmap, arg_control)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-
-	// Load MRs from UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	alloc	r14 = ar.pfs,8,0,0,0
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	ld8	mr0 = [mr_ptr1], 32
-	ld8	mr1 = [mr_ptr2], 32
-	ld8	mr2 = [mr_ptr3], 32
-	ld8	mr3 = [mr_ptr4], 32
-	;;
-	ld8	mr4 = [mr_ptr1]
-	ld8	mr5 = [mr_ptr2]
-	ld8	mr6 = [mr_ptr3]
-	ld8	mr7 = [mr_ptr4]
-
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r18 = ip ;;
-	add	r18 = 2f-1b, r18 ;;
-	mov	b6 = r18 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	br.call.sptk.few b6 = user_unmap
-
-END_PROC (user_unmap)
-
-
-
-BEG_PROC (user_exchange_registers)
-
-arg_dest		= r14
-arg_control		= r15
-arg_sp			= r16
-arg_ip			= r17
-arg_flags		= r18
-arg_user_def_handle	= r19
-arg_pager		= r20
-arg_is_local_id		= r21
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r22
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-num_dirty_ptr		= r24
-
-	// Convert local IDs into global ones
-	cmp.ne	p11,p0 = arg_pager, r0
-
-	and	r8  = 0x3f, arg_dest
-	and	r9  = 0x3f, arg_pager
-	;;
-	cmp.eq	p10,p12 = r8, r0
-(p11)	cmp.eq	p11,p0 = r9, r0
-	;;
-(p10)	ld8	arg_dest = [arg_dest]
-(p11)	ld8	arg_pager = [arg_pager]
-
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-
-	rsm    psr.i
-	
-	.pred.rel "mutex",p10,p12
-(p10)	mov	arg_is_local_id = 1
-(p12)	mov	arg_is_local_id = 0
-
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq.and p6,p0 = r15, r15
-	cmp.eq.and p6,p0 = r16, r16
-	cmp.eq.and p6,p0 = r17, r17
-	cmp.eq.and p6,p0 = r18, r18
-	cmp.eq.and p6,p0 = r19, r19
-	cmp.eq.and p6,p0 = r20, r20
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-	CHANGE_TO_KERNEL_BACKING_STORE (32)
-	STORE_CURRENT_CONTEXT (exchange_registers, 0, 8, 32)
-
-	INVOKE_SYSCALL_8 (exchange_registers, arg_dest, arg_control,
-			  arg_sp, arg_ip, arg_flags, arg_user_def_handle,
-			  arg_pager, arg_is_local_id)
-
-	// Setup return values
-	mov	r14 = r8
-	mov	r15 = r9
-	mov	r16 = r10
-	mov	r17 = r11
-	add	out4 = 16, sp
-	add	out5 = 24, sp
-	add	out6 = 32, sp
-	;;
-	ld8	r18 = [out4]
-	ld8	r19 = [out5]
-	ld8	r20 = [out6]
-
-	RESTORE_CONTEXT (32)
-	LOAD_DIRTY_USER_REGS ()
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r18 = ip ;;
-	add	r18 = 2f-1b, r18 ;;
-	mov	b6 = r18 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	mov	b6 = r15 ;;
-	mov	b6 = r16 ;;
-	mov	b6 = r17 ;;
-	mov	b6 = r18 ;;
-	mov	b6 = r19 ;;
-	mov	b6 = r20 ;;
-	br.call.sptk.few b6 = user_thread_control
-
-END_PROC (user_exchange_registers)
-
-BEG_PROC (user_system_clock)
-
-clock		= r14
-kip_ptr		= r15
-multiplier	= r16
-processor	= r17
-freq_offset	= r17
-procdesc_offset	= r18
-freq_ptr	= r15
-freq		= r15
-
-	mov	processor = r_LOCAL_ID
-	;;
-	add	processor = UTCB_PROCESSOR_OFFSET, processor
-	;;
-	mov	clock = ar.itc
-	mov	multiplier = 1000000
-	ld8	processor = [processor]
-	;;
-	//
-	// No reading of user memory after this point
-	//
-	epc
-	;;
-	and	processor = 15, processor	// avoid bogus pointers
-	movl	kip_ptr = kip
-	;;
-	add	procdesc_offset = KIP_PROCDESC_PTR_OFFSET, kip_ptr
-	shl	freq_offset = processor, KIP_PROC_DESC_LOG2SIZE
-	;;
-	ld8	procdesc_offset = [procdesc_offset]
-	add	freq_offset = PROCDESC_ARCH1_OFFSET, freq_offset
-	;;
-	add	freq_offset = freq_offset, procdesc_offset
-	;;
-	add	freq_ptr = kip_ptr, freq_offset
-	;;
-	ld8	freq = [freq_ptr]
-	;;
-	// Transfer inputs to FP registers.
-	setf.sig f8 = clock
-	setf.sig f9 = freq
-	setf.sig f10 = multiplier
-	;;
-	xmpy.lu	f8 = f8, f10
-	;;
-	// Convert the inputs to FP, to avoid FP software-assist faults.
-	fcvt.xuf.s1 f8 = f8
-	fcvt.xuf.s1 f9 = f9
-	;;
-	// Compute the reciprocal approximation.
-	frcpa.s1 f10, p6 = f8, f9
-	;;
-	// 3 Newton-Raphson iterations.
-(p6)	fnma.s1	f11 = f9, f10, f1
-(p6)	fmpy.s1	f12 = f8, f10
-	;;
-(p6)	fmpy.s1	f13 = f11, f11
-(p6)	fma.s1	f12 = f11, f12, f12
-	;;
-(p6)	fma.s1	f10 = f11, f10, f10
-(p6)	fma.s1	f11 = f13, f12, f12
-	;;
-(p6)	fma.s1	f10 = f13, f10, f10
-(p6)	fnma.s1	f12 = f9, f11, f8
-	;;
-(p6)	fma.s1	f10 = f12, f10, f11
-	;;
-	// Round quotient to an unsigned integer.
-	fcvt.fxu.trunc.s1 f10 = f10
-	;;
-	// Transfer result to GP registers.
-	getf.sig ret0 = f10
-	
-	br.ret.sptk.many rp
-
-END_PROC (user_system_clock)
-
-
-BEG_PROC (user_pal_call)
-	mov	ret0 = -1
-	br.ret.sptk.many rp
-END_PROC (user_pal_call)
-
-
-BEG_PROC (user_sal_call)
-
-arg_idx			= r32
-arg_1			= r33
-arg_2			= r34
-arg_3			= r35
-arg_4			= r36
-arg_5			= r37
-arg_6			= r38
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r21
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-num_dirty_ptr		= r24
-
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-	
-	rsm    psr.i
-	
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r32, r32
-	cmp.eq.and p6,p0 = r33, r33
-	cmp.eq.and p6,p0 = r34, r34
-	cmp.eq.and p6,p0 = r35, r35
-	cmp.eq.and p6,p0 = r36, r36
-	cmp.eq.and p6,p0 = r37, r37
-	cmp.eq.and p6,p0 = r38, r38
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-	STORE_CURRENT_CONTEXT (sal_call, 7, 7, 0)
-
-	INVOKE_SYSCALL_7 (sal_call, arg_idx, arg_1, arg_2, arg_3,
-			  arg_4, arg_5, arg_6)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r18 = ip ;;
-	add	r18 = 2f-1b, r18 ;;
-	mov	b6 = r18 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r32 ;;
-	mov	b6 = r33 ;;
-	mov	b6 = r34 ;;
-	mov	b6 = r35 ;;
-	mov	b6 = r36 ;;
-	mov	b6 = r37 ;;
-	mov	b6 = r38 ;;
-	br.call.sptk.few b6 = user_sal_call
-
-END_PROC (user_sal_call)
-
-
-BEG_PROC (user_memory_control)
-
-arg_ctrl		= r14
-arg_att0		= r15
-arg_att1		= r16
-arg_att2		= r17
-arg_att3		= r18
-mr0			= r32
-mr1			= r33
-mr2			= r34
-mr3			= r35
-mr4			= r36
-mr5			= r37
-mr6			= r38
-mr7			= r39
-
-syscall_addr		= r31
-r_sp			= r30
-r_bsp			= r29
-r_rsc			= r28
-r_rnat			= r21
-r_pfs			= r27
-kernel_bspstore		= r26
-num_dirty		= r25
-num_dirty_ptr		= r24
-mr_ptr1			= r19
-mr_ptr2			= r20
-mr_ptr3			= r21
-mr_ptr4			= r22
-
-	cmp.eq	p6,p0 = r0, r0		// p6 = true
-	epc
-	;;
-
-	rsm    psr.i
-	
-	// Validate NaT bits in arguments
-	cmp.eq.and p6,p0 = r14, r14
-	cmp.eq.and p6,p0 = r15, r15
-	cmp.eq.and p6,p0 = r16, r16
-	cmp.eq.and p6,p0 = r17, r17
-	cmp.eq.and p6,p0 = r18, r18
-	cmp.eq	p7,p0 = r0, r0		// p7 = true
-	;;
-(p6)	cmp.ne	p7,p0 = r0, r0		// p7 = false if no args are NaTed
-	;;
-(p7)	br.cond.spnt.few 1f
-
-	CHANGE_TO_KERNEL_BACKING_STORE (0)
-
-	// Store MRs in UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	st8	[mr_ptr1] = mr0, 32
-	st8	[mr_ptr2] = mr1, 32
-	st8	[mr_ptr3] = mr2, 32
-	st8	[mr_ptr4] = mr3, 32
-	;;
-	st8	[mr_ptr1] = mr4
-	st8	[mr_ptr2] = mr5
-	st8	[mr_ptr3] = mr6
-	st8	[mr_ptr4] = mr7
-
-	STORE_CURRENT_CONTEXT (memory_control, 0, 5, 0)
-
-	INVOKE_SYSCALL_5 (memory_control, arg_ctrl, arg_att0, arg_att1, 
-			  arg_att2, arg_att3)
-
-	RESTORE_CONTEXT (0)
-	LOAD_DIRTY_USER_REGS ()
-
-	// Load MRs from UTCB
-	mov	mr_ptr1 = r_LOCAL_ID
-	;;
-	alloc	r14 = ar.pfs,8,0,0,0
-	add	mr_ptr4 = UTCB_MR_OFFSET+24, mr_ptr1
-	add	mr_ptr3 = UTCB_MR_OFFSET+16, mr_ptr1
-	add	mr_ptr2 = UTCB_MR_OFFSET+8,  mr_ptr1
-	add	mr_ptr1 = UTCB_MR_OFFSET,    mr_ptr1
-	;;
-	ld8	mr0 = [mr_ptr1], 32
-	ld8	mr1 = [mr_ptr2], 32
-	ld8	mr2 = [mr_ptr3], 32
-	ld8	mr3 = [mr_ptr4], 32
-	;;
-	ld8	mr4 = [mr_ptr1]
-	ld8	mr5 = [mr_ptr2]
-	ld8	mr6 = [mr_ptr3]
-	ld8	mr7 = [mr_ptr4]
-
-	SWITCH_TO_USER_BACKING_STORE_AND_RETURN ()
-
-	// One or more NaTed arguments.  Return to user mode, read
-	// all args to cause exception and try again.
-1:	mov	r19 = ip ;;
-	add	r19 = 2f-1b, r19 ;;
-	mov	b6 = r19 ;;
-	br.ret.sptk.few b6 ;;
-2:	mov	b6 = r14 ;;
-	mov	b6 = r15 ;;
-	mov	b6 = r16 ;;
-	mov	b6 = r17 ;;
-	mov	b6 = r18 ;;
-	br.call.sptk.few b6 = user_memory_control
-
-END_PROC (user_memory_control)
-
-
-#define DEFINE_SYSCALL(syscall)					\
-BEG_PROC (user_##syscall)					;\
-	movl	r8 = user_##syscall##_notimplemented ;;		;\
-	mov	b1 = r8						;\
-	epc							;\
-	;;							;\
-	ssm    psr.i						;\
-	br.sptk.few b1						;\
-END_PROC (user_##syscall)					;\
-								;\
-	.text							;\
-BEG_PROC (user_##syscall##_notimplemented)			;\
-{ .mlx								;\
-	break.m	0x3						;\
-	movl	r0 = 1f ;;					;\
-}								;\
-	br.ret.sptk.many rp					;\
-END_PROC (user_##syscall##_notimplemented)			;\
-	.previous						;\
-								;\
-	.rodata							;\
-1:	string "unimplemented syscall: "			;\
-	stringz #syscall					;\
-	.previous
-
-
-//DEFINE_SYSCALL (space_control)
-//DEFINE_SYSCALL (thread_control)
-DEFINE_SYSCALL (processor_control)
-DEFINE_SYSCALL (lipc)
-//DEFINE_SYSCALL (memory_control)
-//DEFINE_SYSCALL (ipc)
-//DEFINE_SYSCALL (unmap)
-//DEFINE_SYSCALL (exchange_registers)
-//DEFINE_SYSCALL (system_clock)
-//DEFINE_SYSCALL (thread_switch)
-//DEFINE_SYSCALL (schedule)
-//DEFINE_SYSCALL (pal_call)
-//DEFINE_SYSCALL (sal_call)
diff --git a/kernel/src/glue/v4-ia64/utcb.h b/kernel/src/glue/v4-ia64/utcb.h
deleted file mode 100644
index 8dccf05a..00000000
--- a/kernel/src/glue/v4-ia64/utcb.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003, 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-ia64/utcb.h
- * Description:   UTCB definition
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: utcb.h,v 1.14 2006/10/20 16:30:22 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_IA64__UTCB_H__
-#define __GLUE__V4_IA64__UTCB_H__
-
-#include <debug.h> // For UNIMPLEMENTED()
-
-#include INC_API(thread.h)
-#include INC_API(types.h)
-
-class utcb_t
-{
-public:
-    threadid_t		my_global_id;		// 0	(0)
-    word_t		processor_no;		// 8	(1)
-    word_t		user_defined_handle;	// 16	(2)
-    threadid_t		pager;			// 24	(3)
-    threadid_t		exception_handler;	// 32	(4)
-    u8_t		preempt_flags;		// 40	(5)
-    u8_t		cop_flags;		// 41
-    u16_t		__rv1;			// 42
-    u32_t		__rv2;			// 44
-    timeout_t		xfer_timeout;		// 48	(6)
-    threadid_t		intended_receiver;	// 56	(7)
-    threadid_t		virtual_sender;		// 64	(8)
-    word_t		error_code;		// 72	(9)
-
-    word_t		br[IPC_NUM_BR];		// 80	(10)
-    word_t		__padding1[5];		// 344	(43)
-
-    word_t		mr[IPC_NUM_MR];		// 384	(48)
-    word_t		__padding2[16];		// 896	(112)
-
-public:
-    bool allocate (threadid_t tid);
-    void free (void);
-
-public:
-    void set_my_global_id(threadid_t tid);
-    word_t get_user_defined_handle();
-    void set_user_defined_handle(word_t handle);
-    threadid_t get_pager();
-    void set_pager(threadid_t tid);
-    threadid_t get_exception_handler();
-    void set_exception_handler(threadid_t tid);
-    u8_t get_preempt_flags();
-    void set_preempt_flags(u8_t flags);
-    u8_t get_cop_flags();
-    word_t get_error_code();
-    void set_error_code(word_t err);
-    timeout_t get_xfer_timeout();
-    threadid_t get_intended_receiver();
-    threadid_t get_virtual_sender();
-    void set_virtual_sender(threadid_t tid);
-
-};
-
-#include INC_API(generic-utcb.h)
-
-INLINE bool utcb_t::allocate (threadid_t tid)
-{
-    word_t ret;
-
-    __asm__ __volatile__ (
-	"	mov	ar.ccv = r0 ;;			\n"
-	"	cmpxchg8.acq %0 = [%1], %2, ar.ccv	\n"
-	:
-	"=r" (ret)
-	:
-	"r" (&__padding1[0]),
-	"r" (tid.get_raw ())
-	:
-	"ar.ccv");
-
-    return !ret;
-}
-
-INLINE void utcb_t::free (void)
-{
-    this->__padding1[0] = NILTHREAD.get_raw ();
-}
-
-
-#endif /* !__GLUE__V4_IA64__UTCB_H__ */
diff --git a/kernel/src/glue/v4-mips32/Makeconf b/kernel/src/glue/v4-mips32/Makeconf
deleted file mode 100644
index 8f9ddd95..00000000
--- a/kernel/src/glue/v4-mips32/Makeconf
+++ /dev/null
@@ -1,45 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2006,  Karlsruhe University
-##                
-## File path:     glue/v4-mips32/Makeconf
-## Description:   
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf,v 1.1 2006/02/23 21:07:46 ud3 Exp $
-##                
-######################################################################
-
-SOURCES+= src/glue/v4-mips32/space.cc \
-          src/glue/v4-mips32/thread.cc \
-	  src/glue/v4-mips32/init.cc \
-	  src/glue/v4-mips32/timer.cc \
-	  src/glue/v4-mips32/resources.cc \
-	  src/glue/v4-mips32/exception.cc \
-	  src/glue/v4-mips32/excvect.S \
-	  src/generic/mapping.cc \
-	  src/generic/linear_ptab_walker.cc \
-	  src/generic/mapping_alloc.cc \
-	  src/glue/v4-mips32/intctrl.cc \
-	  src/glue/v4-mips32/syscalls.S \
-	  src/glue/v4-mips32/user.S
diff --git a/kernel/src/glue/v4-mips32/config.h b/kernel/src/glue/v4-mips32/config.h
deleted file mode 100644
index 3f9746b7..00000000
--- a/kernel/src/glue/v4-mips32/config.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/config.h
- * Description:   Common configuration settings for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__CONFIG_H__
-#define __GLUE__V4_MIPS32__CONFIG_H__
-
-#define KIP_SYSCALL(x)          ((word_t) (x) - (word_t) &kip)
-
-#define KUSEG_BASE              0x00000000
-#define KSEG0_BASE              0x80000000
-#define KSEG1_BASE              0xa0000000
-#define KSEG2_BASE              0xc0000000
-#define KSEG3_BASE              0xe0000000
-
-#define COPY_AREA_SIZE          ( 8 * 1024 * 1024 )
-#define COPY_AREA_START         ( KSEG2_BASE )
-#define COPY_AREA_END           ( COPY_AREA_START + COPY_AREA_SIZE )
-
-/* virtual asid configuration */
-#define CONFIG_ASIDS_START	1
-#define CONFIG_ASIDS_END	16
-#define KERNEL_ASID		0
-
-#define CONFIG_MAX_NUM_ASIDS    (CONFIG_ASIDS_END + 1) 
-#define CONFIG_PREEMPT_ASIDS
-
-
-#define HW_PGSHIFTS		{ 12, 22, 32 }
-#define HW_VALID_PGSIZES	((1 << 12) | (1 << 22))
-
-#define MDB_PGSHIFTS		{ 12, 22, 32 }
-#define MDB_NUM_PGSIZES		(2)
-
-
-
-/**
- * Size of a kernel TCB in bytes
- */
-#define KTCB_SIZE               4096
-#define KTCB_MASK               (~(KTCB_SIZE - 1))
-
-#define UTCB_SIZE               1024
-#define UTCB_MASK               (~(UTCB_SIZE - 1))
-
-
-#define KTCB_AREA_START         ( KSEG2_BASE + COPY_AREA_SIZE )
-
-#define MIPS32_PAGE_SIZE        4096
-#define MIPS32_PAGE_BITS        12
-
-/**
- * endianess and word size
- */
-#define KIP_API_FLAGS           {endian:0, word_size:0} // 32-bit, little endian
-
-/**
- * size of kernel interface page
- */
-#define KIP_KIP_AREA            {size:12}   // 4KB
-
-/**
- * supported page sizes and access bits
- */
-
-#define KIP_ARCH_PAGEINFO       {SHUFFLE2(rwx:6, size_mask:(1 << 12) >> 10)}
-
-#define KIP_MIN_MEMDESCS        (16)
-
-/*
- * minimum size of UTCB area and number of UTCBs in this
- */
-#define KIP_UTCB_INFO           {SHUFFLE3(multiplier:1, alignment:12, size:12)} // XXX
-
-/**
- * Base address of the root task's UTCB area
- */
-#define ROOT_UTCB_START		(1UL << 30)  // XXX
-
-/**
- * Address of the KIP in the root task
- */
-#define ROOT_KIP_START		((1UL << 30) - 0x100000 ) // XXX
-
-#define VALID_THREADNO_BITS     17 // XXX
-
-
-/**
- * Timer related stuff
- **/
-#define TIMER_PERIOD	  	(5000) /* 10MHz -> 1ms */
-#define TIMER_TICK_LENGTH	(1000)
-
-/* magic constant put into GP[at] on a KernelInterface syscall */
-#define MAGIC_KIP_REQUEST       (0x141fca11)
-
-#endif /* !__GLUE__V4_MIPS32__CONFIG_H__ */
diff --git a/kernel/src/glue/v4-mips32/context.h b/kernel/src/glue/v4-mips32/context.h
deleted file mode 100644
index 3b44838a..00000000
--- a/kernel/src/glue/v4-mips32/context.h
+++ /dev/null
@@ -1,352 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/context.h
- * Description:   Context save/restore for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: context.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__CONTEXT_H__
-#define __GLUE__V4_MIPS32__CONTEXT_H__
-
-#if !defined(ASSEMBLY)
-
-extern "C" void mips32_return_from_notify0 (void);
-extern "C" void mips32_return_from_notify1 (void);
-extern "C" void mips32_return_from_notify2 (void);
-extern "C" void mips32_return_to_user (void);
-
-
-class mips32_switch_stack_t {
-  public:
-    word_t  s0; /* 0 */
-    word_t  s1; /* 4 */
-    word_t  s8; /* 8 */
-    word_t  gp; /* 12 */
-    word_t  ra; /* 16 */
-};
-
-#define MIPS32_SWITCH_STACK_SIZE (5*4)
-
-
-/* must match #defines below */
-class mips32_irq_context_t {
-public:
-    word_t	epc;    /*-0-*/
-    word_t	sp;	/* 4 */ 
-    word_t	status; /* 8 */
-    word_t	ra;     /* 12 */
-    word_t	v0;	/*-16-*/
-    word_t	v1;     /* 20 */
-    word_t	a1;     /* 24 */
-    word_t	cause;  /* 28 */
-    word_t	a2;     /*-32-*/
-    word_t	a3;	/* 36 */
-    word_t	t9;     /* 40 */
-    word_t	a0;     /* 44 */
-    word_t	gp;     /*-48-*/
-    word_t	at;     /* 52 */
-    word_t	t0;     /* 56 */
-    word_t	t1;     /* 60 */
-    word_t	hi;     /*-64-*/
-    word_t	t2;     /* 68 */
-    word_t	t3;     /* 72 */
-    word_t	lo;     /* 76 */
-    word_t	t4;     /*-80-*/
-    word_t	t5;     /* 84 */
-    word_t	t6;     /* 88 */
-    word_t	t7;     /* 92 */
-    word_t	t8;     /*-96-*/
-    word_t	s0;     /* 100 */
-    word_t	s1;     /* 104 */
-    word_t	s2;     /* 108 */
-    word_t	s3;     /*-112-*/
-    word_t	s4;     /* 116 */
-    word_t	s5;     /* 120 */
-    word_t	s6;     /* 124 */
-    word_t	s7;     /*-128-*/
-    word_t	s8;     /* 132 */
-    word_t	x1;	/* 136 */   /* fills to make frame cache aligned */
-    word_t	x2;	/* 140 */
-};
-
-#else
-
-/* Context save / restore : check, this is cache optimised */
-
-#include INC_ARCH(regdef.h)
-#include INC_ARCH(cp0regs.h)
-
-#define MIPS32_SWITCH_STACK_SIZE (5*4)
-
-/**** Switch ****/
-
-/* If changing this, modify class above */
-
-#define SAVE_SWITCH_STACK			\
-/* Save the Callee-saved registers:	*/	\
-/* s0..s2 ($16..$18)			*/	\
-/* gp     ($28)				*/	\
-/* s8     ($30)                         */	\
-/* ra     ($31)				*/	\
-    subu    sp, sp, MIPS32_SWITCH_STACK_SIZE;	\
-    sw	    s0, 0(sp);				\
-    sw	    s1, 4(sp);				\
-    sw	    s8, 8(sp);				\
-    sw	    gp, 12(sp);				\
-    sw	    ra, 16(sp);
-
-#define RESTORE_SWITCH_STACK			\
-    lw	    ra, 16(sp);				\
-    lw	    s0, 0(sp);				\
-    lw	    s1, 4(sp);				\
-    lw	    s8, 8(sp);				\
-    lw	    gp, 12(sp);				\
-    addiu    sp, sp, MIPS32_SWITCH_STACK_SIZE;
-
-/**** Full Context ****/
-
-
-#define PT_EPC		0	
-#define PT_SP		4	
-#define PT_STATUS	8	
-#define PT_RA		12
-#define PT_V0		16
-#define PT_V1		20
-#define PT_A1		24
-#define PT_CAUSE	28
-#define PT_A2		32		
-#define PT_A3		36
-#define PT_T9		40
-#define PT_A0		44
-#define PT_GP		48
-#define PT_AT		52
-#define PT_T0		56
-#define PT_T1		60
-#define PT_HI		64
-#define PT_T2		68
-#define PT_T3		72
-#define PT_LO		76
-#define PT_T4		80
-#define PT_T5		84
-#define PT_T6		88
-#define PT_T7		92
-#define PT_T8		96
-#define PT_S0		100
-#define PT_S1		104
-#define PT_S2		108
-#define PT_S3		112
-#define PT_S4		116
-#define PT_S5		120
-#define PT_S6		124
-#define PT_S7		128
-#define PT_S8		132
-#define PT_X1		136
-#define PT_X2		140
-
-#define PT_SIZE		144
-
-/*
- * SAVE_ALL_INT:
- *  * clear ie, exl, erl, um 
- *	    - in kernel mode
- *			* save all registers on current stack, decrease sp by frame size	
- *	    - in user mode
- *			* save all registers on stack saved in K_STACK_BOTTOM and let new sp point there => K_STACK_BOTTOM must point to tcb of current thread
- */  
-
-#define	SAVE_ALL_INT											\
-	.set	push;											\
-	.set	reorder;										\
-	.set	noat;											\
-	mfc0	k1, CP0_STATUS;                 /* get STATUS register k1 */				\
-	li	k0, 0xffffffe0;                 /* clear IE, EXL, ERL, UM */				\
-	and	k0, k0, k1;										\
-	mtc0	k0, CP0_STATUS;                 /* Enter kernel mode */					\
-	andi	k0, k1, 0x10;                   /* Isolate UM bit */					\
-													\
-	.set	noreorder;										\
-	beq	k0, zero, 8f;                   /* Branch if from KERNEL mode */			\
-	lui	k0, %hi(K_STACK_BOTTOM);								\
-													\
-													\
-	.set	reorder;                        /* save those registers for a sec */			\
-	sw	t2, %lo(K_TEMP2)(k0);           /* to use them temporarily...	  */			\
-	sw	t0, %lo(K_TEMP0)(k0);									\
-	sw	t1, %lo(K_TEMP1)(k0);									\
-	sw	t3, %lo(K_TEMP3)(k0);									\
-	sw	t4, %lo(K_TEMP4)(k0);									\
-													\
-	mfc0	t2, CP0_EPC;										\
-	mfc0	t3, CP0_CAUSE;										\
-	mfc0	t4, CP0_BADVADDR;									\
-	lw	t0, %lo(K_STACK_BOTTOM)(k0);	/* Load saved stack */					\
-													\
-	move	t1, k1;				/* Save some stuff on kernel stack: */			\
-	sw	t1, PT_STATUS-PT_SIZE(t0);	/* Save status */					\
-	sw	sp, PT_SP-PT_SIZE(t0);		/* Save old stack */					\
-	sw	t2, PT_EPC-PT_SIZE(t0);		/* Save EPC */						\
-	sw	t3, PT_CAUSE-PT_SIZE(t0);	/* Save CAUSE */					\
-	mtc0	t4, CP0_BADVADDR;		/* whatever :/ */					\
-	sub	sp, t0, PT_SIZE;		/* New stack pointer = kernel stack */			\
-													\
-													\
-	lui	k0, %hi(K_STACK_BOTTOM);								\
-	lw	t0, %lo(K_TEMP0)(k0);		/* and restore those registers... */			\
-	lw	t1, %lo(K_TEMP1)(k0);		/* to save them later */				\
-	lw	t2, %lo(K_TEMP2)(k0);									\
-	lw	t3, %lo(K_TEMP3)(k0);									\
-	lw	t4, %lo(K_TEMP4)(k0);									\
-	b	9f;											\
-8:;													\
-	sw	t3, %lo(K_TEMP3)(k0);									\
-	sw	t2, %lo(K_TEMP2)(k0);									\
-	sw	t1, %lo(K_TEMP1)(k0);									\
-	sw	t0, %lo(K_TEMP0)(k0);									\
-	lui	t2, 0x8000;										\
-	and	t1, sp, t2;										\
-	beq	t1, t2, 7f;										\
-	/*li	t2, 4;		*/									\
-	/*sll	t2, 60;		*/									\
-	/*and	t1, sp, t2;	*/									\
-	/*beq	t1, t2, 7f;	*/									\
-	li	AT, 2;											\
-	break;												\
-7:													\
-	mfc0	t2, CP0_EPC;										\
-	mfc0	t3, CP0_CAUSE;										\
-	mfc0	t0, CP0_BADVADDR;									\
-	move	t1, k1;											\
-	sw	t1, PT_STATUS-PT_SIZE(sp);	/* Save status */					\
-	sw	t3, PT_CAUSE-PT_SIZE(sp);	/* Save CAUSE */					\
-	sw	sp, PT_SP-PT_SIZE(sp);		/* Save old stack */					\
-	sub	sp, sp, PT_SIZE;		/* New stack pointer */					\
-	sw	t2, PT_EPC(sp);			/* Save EPC */						\
-	mtc0	t0, CP0_BADVADDR;									\
-													\
-	lui	k0, %hi(K_STACK_BOTTOM);	/* restore stuff */					\
-	lw	t0, %lo(K_TEMP0)(k0);									\
-	lw	t1, %lo(K_TEMP1)(k0);									\
-	lw	t2, %lo(K_TEMP2)(k0);									\
-	lw	t3, %lo(K_TEMP3)(k0);									\
-9:;													\
-	sw	ra, PT_RA(sp);										\
-	sw	v0, PT_V0(sp);										\
-	sw	v1, PT_V1(sp);										\
-	sw	a1, PT_A1(sp);										\
-	sw	a2, PT_A2(sp);										\
-	sw	a3, PT_A3(sp);										\
-	sw	t9, PT_T9(sp);										\
-	sw	a0, PT_A0(sp);										\
-	sw	gp, PT_GP(sp);										\
-	sw	$1, PT_AT(sp);										\
-	.set	at;											\
-	mfhi	v0;											\
-	sw	t0, PT_T0(sp);										\
-	sw	t1, PT_T1(sp);										\
-	sw	v0, PT_HI(sp);										\
-	mflo	v1;											\
-	sw	t2, PT_T2(sp);										\
-	sw	t3, PT_T3(sp);										\
-	sw	v1, PT_LO(sp);										\
-	sw	t4, PT_T4(sp);										\
-	sw	t5, PT_T5(sp);										\
-	sw	t6, PT_T6(sp);										\
-	sw	t7, PT_T7(sp);										\
-	sw	t8, PT_T8(sp);										\
-	sw	s0, PT_S0(sp);										\
-	sw	s1, PT_S1(sp);										\
-	sw	s2, PT_S2(sp);										\
-	sw	s3, PT_S3(sp);										\
-	sw	s4, PT_S4(sp);										\
-	sw	s5, PT_S5(sp);										\
-	sw	s6, PT_S6(sp);										\
-	sw	s7, PT_S7(sp);										\
-	sw	s8, PT_S8(sp);
-
-
-
-#define RESTORE_ALL												\
-	.set	push;												\
-	.set	reorder;											\
-	lw	a2, PT_A2(sp);											\
-	lw	a3, PT_A3(sp);											\
-	lw	t9, PT_T9(sp);											\
-	lw	a0, PT_A0(sp);											\
-	lw	gp, PT_GP(sp);											\
-	.set	noat;												\
-	lw	$1, PT_AT(sp);											\
-	lw	t0, PT_T0(sp);											\
-	lw	t1, PT_T1(sp);											\
-	lw	s0, PT_HI(sp);											\
-	lw	t2, PT_T2(sp);											\
-	lw	t3, PT_T3(sp);											\
-	lw	s1, PT_LO(sp);											\
-	mthi	s0;												\
-	lw	t4, PT_T4(sp);											\
-	lw	t5, PT_T5(sp);											\
-	lw	t6, PT_T6(sp);											\
-	mtlo	s1;												\
-	lw	t7, PT_T7(sp);											\
-	lw	t8, PT_T8(sp);											\
-	lw	s0, PT_S0(sp);											\
-	lw	s1, PT_S1(sp);											\
-	lw	s2, PT_S2(sp);											\
-	lw	s3, PT_S3(sp);											\
-	lw	s4, PT_S4(sp);											\
-	lw	s5, PT_S5(sp);											\
-	lw	s6, PT_S6(sp);											\
-	lw	s7, PT_S7(sp);											\
-	lw	s8, PT_S8(sp);											\
-														\
-	mfc0	a1, CP0_STATUS;			/* Status in v1 */						\
-	lw	v1, PT_EPC(sp);			/* is out of order bad for cache? (still same cache line?) */	\
-	lw	v0, PT_STATUS(sp);										\
-	/* XXX - NOTE, Status register updates are not ATOMIC!!!, Interrupt Mask bits can change */		\
-	ori	a1, a1, 0x2;			/* set Exception Level */					\
-	mtc0	a1, CP0_STATUS;			/* to disable interrupts, we now can set EPC */			\
-	li	ra, 0x0fffffe0;			/* compute new status register */				\
-														\
-	and	a1, ra, a1;			/* a1 = current STATUS & 0xe0 */				\
-	nor	ra, zero, ra;			/* ra = 0xf000001f */						\
-	and	v0, ra, v0;			/* v0 = last 5 bit of saved STATUS */				\
-	lw	ra, PT_RA(sp);											\
-	or	k1, a1, v0;			/* k1 = current STATUS with end of saves STATUS */		\
-	mtc0	v1, CP0_EPC;			/* restore EPC */						\
-	lw	v0, PT_V0(sp);											\
-	srl	k0, sp, 12;											\
-	lw	v1, PT_V1(sp);											\
-	lw	a1, PT_A1(sp);											\
-	lw	sp, PT_SP(sp);			/* restore stack */						\
-	mtc0	k1, CP0_STATUS;			/* new status value */						\
-	sll	k0, k0, 12;			/* Get TCB pointer */						\
-	lw	k0, OFS_TCB_MYSELF_LOCAL(k0);	/* Load UTCB into k0 */						\
-	nop
-
-#endif
-
-
-#endif /* !__GLUE__V4_MIPS32__CONTEXT_H__ */
diff --git a/kernel/src/glue/v4-mips32/exception.cc b/kernel/src/glue/v4-mips32/exception.cc
deleted file mode 100644
index 208a536a..00000000
--- a/kernel/src/glue/v4-mips32/exception.cc
+++ /dev/null
@@ -1,390 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/exception.cc
- * Description:   Exception handling for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: exception.cc,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kdb/console.h>
-
-#include INC_API(tcb.h)
-#include INC_API(schedule.h)
-#include INC_API(kernelinterface.h)
-#include INC_API(syscalls.h)
-
-#include INC_GLUE(context.h)
-#include INC_GLUE(syscalls.h)
-#include INC_GLUE(exception.h)
-#include INC_GLUE(config.h)
-
-#include INC_ARCH(cp0regs.h)
-
-
-bool mips32_illegal(mips32_irq_context_t *context, word_t* code);
-bool mips32_break(mips32_irq_context_t *context);
-static bool send_exception_ipc( word_t exc_no, word_t exc_code );
-static bool send_syscall_ipc( mips32_irq_context_t *context );
-
-void halt_user_thread( void );
-
-
-extern "C" void mips32_exception_handler( mips32_irq_context_t *context ) {
-
-    char * exception = NULL;
-    bool result = false;
-    word_t exc_no = CAUSE_EXCCODE_NUM(context->cause);
-    word_t exc_code = 0;
-
-    switch (exc_no) {
-		
-    case 4:  
-        exception = "Address error (load/execute)";
-        exc_code = read_32bit_cp0_register(CP0_BADVADDR); 
-        break;
-		
-    case 5:  
-        exception = "Address error (store)";
-        exc_code = read_32bit_cp0_register(CP0_BADVADDR); 
-        break;
-		
-    case 6:	 
-        exception = "Bus error (instruction fetch)";	
-        break;
-		
-    case 7:	 
-        exception = "Bus error (data load/store)";	
-        break;
-		
-    case 9:  
-        exception = "Breakpoint";		
-        result = mips32_break(context); 
-        break;
-		
-    case 10: 
-        exception = "Illegal instruction";	
-        result = mips32_illegal(context, &exc_code);
-        break;
-        //case 11: exception = "Coprocessor unavailable"; result = mips32_cpu_unavail(context, &exc_code); break;
-		
-    case 12: 
-        exception = "Arithmetic overflow";		
-        break;
-		
-    case 13: 
-        exception = "Trap exception"; 
-        context->epc += 4; 
-        break;
-		
-    case 14: 
-        exception = "Virtual coherency exception (instruction)"; 
-        break;
-        //case 23: exception = "Watchpoint";		result = mips32_watch(context, &exc_code); break;
-		
-    case 31: 
-        exception = "Virtual coherency exception (data)"; 
-        break;
-		
-    default: 
-        exception = "Unknown Exception"; 
-        break;
-    }
-
-    if( result == false ) {
-
-        if (!send_exception_ipc(exc_no, exc_code)) {
-			
-            if( EXPECT_FALSE(get_kip()->kdebug_entry != NULL) ) {
-                if( exception ) {
-                    printf( TXT_BRIGHT "--- KD# %s [%s] ---\n" TXT_NORMAL, "Unhandled Exception", exception );
-                }
-                else {
-                    printf( TXT_BRIGHT "--- KD# %s [%d] ---\n" TXT_NORMAL, "Unhandled Exception", exc_no );
-                }
-                get_kip()->kdebug_entry( context );
-            }
-
-            halt_user_thread();
-        }
-    }
-}
-
-
-// invoked on invalid syscall (identifier) in syscall.S
-extern "C" void syscall_exception(mips32_irq_context_t *context) {
-
-    if( !send_syscall_ipc(context) ) {
-        if (EXPECT_FALSE(get_kip()->kdebug_entry != NULL)) {
-            printf( TXT_BRIGHT "--- KD# %s ---\n" TXT_NORMAL, "Unhandled User SYSCALL" );
-            get_kip()->kdebug_entry(context);
-        }
-        halt_user_thread();
-    }
-}
-
-
-#define GENERIC_SAVED_REGISTERS (EXCEPT_IPC_GEN_MR_NUM + 1)
-static bool send_exception_ipc( word_t exc_no, word_t exc_code ) {
-	
-    // XXX has never been tested
-	
-    tcb_t *current = get_current_tcb();
-    
-    if( current->get_exception_handler().is_nilthread() ) {
-        return false;
-    }
-
-    // Save message registers on the stack
-    word_t saved_mr[GENERIC_SAVED_REGISTERS];
-    msg_tag_t tag;
-
-    // Save message registers.
-    for( int i = 0; i < GENERIC_SAVED_REGISTERS; i++ ) {
-        saved_mr[i] = current->get_mr(i);
-    }
-    current->set_saved_partner( current->get_partner() );
-    current->set_saved_state( current->get_state() );
-
-    // Create the message tag.
-    tag.set( 0, EXCEPT_IPC_GEN_MR_NUM, EXCEPT_IPC_GEN_LABEL);
-    current->set_tag( tag );
-
-    // Create the message.
-    current->set_mr( EXCEPT_IPC_GEN_MR_IP, (word_t)current->get_user_ip() );
-    current->set_mr( EXCEPT_IPC_GEN_MR_SP, (word_t)current->get_user_sp() );
-    current->set_mr( EXCEPT_IPC_GEN_MR_FLAGS, (word_t)current->get_user_flags() );
-    current->set_mr( EXCEPT_IPC_GEN_MR_EXCEPTNO, exc_no );
-    current->set_mr( EXCEPT_IPC_GEN_MR_ERRORCODE, exc_code );
-    current->set_mr( EXCEPT_IPC_GEN_MR_LOCALID, current->get_local_id().get_raw() );
-
-    //// For fast path, we need to indicate that we are doing exception ipc
-    //current->resources.set_exception_ipc( current );
-
-    // Deliver the exception IPC.
-    tag = current->do_ipc( current->get_exception_handler(),
-                           current->get_exception_handler(), timeout_t::never() );
-
-    //current->resources.clear_exception_ipc( current );
-
-    // Alter the user context if necessary.
-    if( !tag.is_error() ) {
-        current->set_user_ip( (addr_t)current->get_mr(EXCEPT_IPC_GEN_MR_IP) );
-        current->set_user_sp( (addr_t)current->get_mr(EXCEPT_IPC_GEN_MR_SP) );
-        current->set_user_flags( current->get_mr(EXCEPT_IPC_GEN_MR_FLAGS) );
-    }
-    else {
-        printf( "Unable to deliver user exception: IPC error.\n" );
-    }
-
-    // Clean-up.
-    for( int i = 0; i < GENERIC_SAVED_REGISTERS; i++ ) {
-        current->set_mr( i, saved_mr[i] );
-    }
-
-    current->set_partner( current->get_saved_partner() );
-    current->set_saved_partner( NILTHREAD );
-    current->set_state( current->get_saved_state() );
-    current->set_saved_state( thread_state_t::aborted );
-
-    return !tag.is_error();
-}
-
-
-#define SYSCALL_SAVED_REGISTERS (EXCEPT_IPC_SYS_MR_NUM+1)
-static bool send_syscall_ipc( mips32_irq_context_t *context ) {
-
-    // XXX has never been tested
-	
-    tcb_t *current = get_current_tcb();
-    if( current->get_exception_handler().is_nilthread() ) {
-        printf( "Unable to deliver user exception: no exception handler.\n" );
-        return false;
-    }
-
-    // Save message registers on the stack
-    word_t saved_mr[SYSCALL_SAVED_REGISTERS];
-    msg_tag_t tag;
-
-    // Save message registers.
-    for( int i = 0; i < SYSCALL_SAVED_REGISTERS; i++ ) {
-        saved_mr[i] = current->get_mr(i);
-    }
-    current->set_saved_partner( current->get_partner() );
-    current->set_saved_state( current->get_state() );
-
-    // Create the message tag.
-    tag.set( 0, EXCEPT_IPC_SYS_MR_NUM, EXCEPT_IPC_SYS_LABEL);
-    current->set_tag( tag );
-
-    // Create the message.
-    current->set_mr( EXCEPT_IPC_SYS_MR_V0, context->v0 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_V1, context->v1 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A0, context->a0 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A1, context->a1 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A2, context->a2 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A3, context->a3 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A4, context->t0 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A5, context->t1 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A6, context->t2 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A7, context->t3 );
-
-    current->set_mr( EXCEPT_IPC_SYS_MR_IP, (word_t)current->get_user_ip() );
-    current->set_mr( EXCEPT_IPC_SYS_MR_SP, (word_t)current->get_user_sp() );
-    current->set_mr( EXCEPT_IPC_SYS_MR_FLAGS, (word_t)current->get_user_flags() );
-
-    //// For fast path, we need to indicate that we are doing exception ipc
-    //current->resources.set_exception_ipc( current );
-
-    // Deliver the exception IPC.
-    tag = current->do_ipc( current->get_exception_handler(),
-                           current->get_exception_handler(), timeout_t::never() );
-
-    //current->resources.clear_exception_ipc( current );
-
-    // Alter the user context if necessary.
-    if( !tag.is_error() ) {
-        current->set_user_ip( (addr_t)current->get_mr( EXCEPT_IPC_SYS_MR_IP ) );
-        current->set_user_sp( (addr_t)current->get_mr( EXCEPT_IPC_SYS_MR_SP ) );
-        current->set_user_flags( current->get_mr(EXCEPT_IPC_SYS_MR_FLAGS) );
-    }
-    else {
-        printf( "Unable to deliver user exception: IPC error.\n" );
-    }
-
-    // Results
-    context->v0 = current->get_mr( EXCEPT_IPC_SYS_MR_V0 );
-    context->v1 = current->get_mr( EXCEPT_IPC_SYS_MR_V1 );
-    context->a0 = current->get_mr( EXCEPT_IPC_SYS_MR_A0 );
-    context->a1 = current->get_mr( EXCEPT_IPC_SYS_MR_A1 );
-    context->a2 = current->get_mr( EXCEPT_IPC_SYS_MR_A2 );
-    context->a3 = current->get_mr( EXCEPT_IPC_SYS_MR_A3 );
-    context->t0 = current->get_mr( EXCEPT_IPC_SYS_MR_A4 );
-    context->t1 = current->get_mr( EXCEPT_IPC_SYS_MR_A5 );
-    context->t2 = current->get_mr( EXCEPT_IPC_SYS_MR_A6 );
-    context->t3 = current->get_mr( EXCEPT_IPC_SYS_MR_A7 );
-
-    // Clean-up.
-    for( int i = 0; i < SYSCALL_SAVED_REGISTERS; i++ ) {
-        current->set_mr( i, saved_mr[i] );
-    }
-
-    current->set_partner( current->get_saved_partner() );
-    current->set_saved_partner( NILTHREAD );
-    current->set_state( current->get_saved_state() );
-    current->set_saved_state( thread_state_t::aborted );
-
-    return !tag.is_error();
-}
-
-
-bool mips32_illegal(mips32_irq_context_t *context, word_t* code) {
-
-    if (context->at == MAGIC_KIP_REQUEST) {
-        space_t * space = get_current_space ();
-
-        context->t0 = (word_t) space->get_kip_page_area ().get_base();
-        context->t1 = get_kip ()->api_version;
-        context->t2 = get_kip ()->api_flags;
-        context->t3 = ( NULL != get_kip()->kernel_desc_ptr) ? *(word_t *)((word_t)get_kip() + get_kip()->kernel_desc_ptr ) : 0;
-    }
-    else {
-        printf("Error: Illegal Instruction. epc =  0x%x, status = 0x%x, kernel_stack = 0x%x, ra = 0x%x\n",
-               context->epc, context->status, context->sp, context->ra );
-        ASSERT( !"NOTREACHED" );
-
-    }
-	
-    //ASSERT(!(context->cause & CAUSE_BD));
-
-    context->epc += 4;
-    return true;	    // Succesfully handled
-}
-
-
-bool mips32_break(mips32_irq_context_t *context) {
-
-    switch( context->at ) {
-		
-    case L4_TRAP_KPUTC:	    
-        putc( (char)context->a0 );	
-        break;
-		
-    case L4_TRAP_KGETC:
-        context->v0 = getc(true);	
-        break;
-		
-    case L4_TRAP_KGETC_NB:  
-        context->v0 = getc(false);	
-        break;
-		
-    case L4_TRAP_KDEBUG: {
-        pgent_t * pg;
-        pgent_t::pgsize_e pgsize;
-        space_t * space = get_current_tcb ()->get_space();
-        if (space == NULL) {
-            space = get_kernel_space();
-        }
-			
-        if( EXPECT_TRUE(get_kip()->kdebug_entry == NULL) ) {
-            return false;
-        }
-
-        printf( TXT_BRIGHT "--- KD# " );
-		    
-        if( context->status & ST_UM ) {
-            printf( "<User> " );
-        }
-
-        if( (!(context->status & ST_UM) ) || (space->lookup_mapping((addr_t)context->v0, &pg, &pgsize)) ) {
-            printf( "%s ", (char*)context->v0 );
-        }
-
-        printf( "---\n" TXT_NORMAL );
-
-        get_kip()->kdebug_entry(context);
-        break;
-    }
-			
-    default:
-        return( false );
-    }
-
-    //ASSERT(!(context->cause & CAUSE_BD));
-
-    context->epc += 4;
-
-    return true;	    // Successfully handled
-}
-
-
-void halt_user_thread( void ) {
-
-    tcb_t *current = get_current_tcb();
-    current->set_state( thread_state_t::halted );
-    current->switch_to_idle();
-}
diff --git a/kernel/src/glue/v4-mips32/exception.h b/kernel/src/glue/v4-mips32/exception.h
deleted file mode 100644
index 8cbb481e..00000000
--- a/kernel/src/glue/v4-mips32/exception.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/exception.h
- * Description:   MIPS32 exception message definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: exception.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__EXCEPTION_H__
-#define __GLUE__V4_MIPS32__EXCEPTION_H__
-
-/*
- * Generic exception message format
- * All exceptions not handled by the kernel or other exception message.
- */
-
-#define EXCEPT_IPC_GEN_MR_IP		1
-#define EXCEPT_IPC_GEN_MR_SP		2
-#define EXCEPT_IPC_GEN_MR_FLAGS		3
-#define EXCEPT_IPC_GEN_MR_EXCEPTNO	4
-#define EXCEPT_IPC_GEN_MR_ERRORCODE	5
-#define EXCEPT_IPC_GEN_MR_LOCALID	6
-
-#define EXCEPT_IPC_GEN_MR_NUM		6
-
-#define EXCEPT_IPC_GEN_LABEL	(-5ul) // XXX (-5ul << 4)
-
-/*
- * System call exception
- * System calls not handled by L4 are redirected via system call exception IPC
- */
-
-#define EXCEPT_IPC_SYS_MR_V0		1
-#define EXCEPT_IPC_SYS_MR_V1		2
-#define EXCEPT_IPC_SYS_MR_A0		3
-#define EXCEPT_IPC_SYS_MR_A1		4
-#define EXCEPT_IPC_SYS_MR_A2		5
-#define EXCEPT_IPC_SYS_MR_A3		6
-#define EXCEPT_IPC_SYS_MR_A4		7
-#define EXCEPT_IPC_SYS_MR_A5		8
-#define EXCEPT_IPC_SYS_MR_A6		9
-#define EXCEPT_IPC_SYS_MR_A7		10
-#define EXCEPT_IPC_SYS_MR_IP		11
-#define EXCEPT_IPC_SYS_MR_SP		12
-#define EXCEPT_IPC_SYS_MR_FLAGS		13
-
-#define EXCEPT_IPC_SYS_MR_NUM		13
-
-#define EXCEPT_IPC_SYS_LABEL		(-5ul) // XXX (-5ul << 4)
-
-
-#endif /* !__GLUE__V4_MIPS32__EXCEPTION_H__ */
diff --git a/kernel/src/glue/v4-mips32/excvect.S b/kernel/src/glue/v4-mips32/excvect.S
deleted file mode 100644
index c437f881..00000000
--- a/kernel/src/glue/v4-mips32/excvect.S
+++ /dev/null
@@ -1,276 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/excvect.S
- * Description:   Exception handler entry and exit points for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: excvect.S,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(regdef.h)
-#include INC_ARCH(cp0regs.h)
-#include INC_ARCH(asm.h)
-#include INC_GLUE(context.h)
-#include <tcb_layout.h>
-
-        .section .base
-
-#.globl UTLB_REFILL_STACK
-#.globl UTLB_REFILL_STACK_end
-
-UTLB_REFILL_STACK:
-	.space 1024
-UTLB_REFILL_STACK_end:
-
-				
-        .text
-
-        .globl __general_except
-        .globl __general_except_end
-        .globl __tlbmiss_except
-        .globl __tlbmiss_except_end
-        .globl __extra_except
-        .globl __extra_except_end
-
-        .globl mips32_exception
-        .globl mips32_interrupt
-        .globl mips32_syscall
-        .globl mips32_tlb_invalid
-        .globl  mips32_tlb_mod
-
-# -------------------------------------------------------------------------
-# On tlb miss: jump to tlbmiss exception handler.
-# This stub is copied to the exception handler address 0xa0000000,
-# -------------------------------------------------------------------------
-
-        .set    noreorder
-	.set    noat
-__tlbmiss_except:
-
-	j       _tlbmiss_except
-        nop
-
-__tlbmiss_except_end:
-	.set    at
-        .set    reorder
-		
-# -----------------------
-# tlbmiss in user mode
-# -----------------------
-.align 4
-_tlbmiss_except:
-
-	SAVE_ALL_INT
-	
-	mfc0    a0, CP0_BADVADDR
-	move    a1, sp
-	subu    sp, sp, 0x10
-	jal     tlbmiss_handler	
-	nop
-	addu    sp, sp, 0x10
-	j       mips32_restore_user
-	nop
-	
-# -----------------------
-# tlbmiss in kernel mode
-# -----------------------
-.align 4
-mips32_tlb_invalid:
-
-	SAVE_ALL_INT
-
-	mfc0    a0, CP0_BADVADDR
-	move    a1, sp
-	subu    sp, sp, 0x10
-	jal     tlbmiss_handler				# jump into c routine
-	nop
-	addu    sp, sp, 0x10
-	j       mips32_restore_user
-	nop
-	
-		
-.align 4
-mips32_tlb_mod:
-
-	SAVE_ALL_INT
-
-	mfc0    a0, CP0_BADVADDR
-	move    a1, sp
-	subu    sp, sp, 0x10
-	jal     tlbmod_handler				# jump into c routine
-	nop
-	addu    sp, sp, 0x10
-	j       mips32_restore_user
-	nop
-	
-.align 4
-.globl mips32_restore_user_o32
-mips32_restore_user_o32:
-	addu	sp, sp, 0x10	#o32 calling convention hack
-
-.globl mips32_restore_user
-mips32_restore_user:
-	RESTORE_ALL
-	eret
-	nop
-
-
-# -------------------------------------------------------------------------
-# This stub is copied to the exception handler address 0xa0000200,
-# -------------------------------------------------------------------------
-
-        .set    noreorder
-	.set    noat
-__extra_except:
-	nop
-	nop
-	nop
-	eret
-	nop
-__extra_except_end:
-	.set    at
-        .set    reorder
-
-
-
-# -------------------------------------------------------------------------
-# On exception/interrupt: jump to exception handler.
-# This stub is copied to the exception handler address 0xa0000180,
-# -------------------------------------------------------------------------
-
-        .set    noreorder
-	.set    noat
-__general_except:
-
-	mfc0    k1, CP0_CAUSE
-	lui     k0, %hi(exception_handlers)
-	andi    k1, k1, 0x7c
-	add     k0, k0, k1
-		
-	lw      k0, %lo(exception_handlers)(k0)
-	jr      k0
-        nop
-
-__general_except_end:
-	.set    at
-        .set    reorder
-
-
-# default exception handler		
-.align 4
-mips32_exception:
-
-	SAVE_ALL_INT
-
-        move    a0, sp
-	
-        subu    sp, sp, 0x10
-        jal     mips32_exception_handler
-	nop
-	addu    sp, sp, 0x10
-	
-        j       mips32_restore_user
-
-
-.set reorder
-.align 4
-mips32_interrupt:
-
-	SAVE_ALL_INT
-
-	mfc0    t1, CP0_CAUSE
-	mfc0    t0, CP0_STATUS
-	li      a0, 7					/* Interrupt source - start at 7 */
-	and     t1, t1, t0
-
-	.set	noreorder
-	andi    t0, t1, INT_IRQ5
-	bnez    t0, 1f
-	andi    t0, t1, INT_IRQ4
-	bnez    t0, 1f
-	li      a0, 6
-	andi    t0, t1, INT_IRQ3
-	bnez	t0, 1f
-	li	a0, 5
-	andi	t0, t1, INT_IRQ2
-	bnez	t0, 1f
-	li	a0, 4
-	andi	t0, t1, INT_IRQ1
-	bnez	t0, 1f
-	li	a0, 3
-	andi	t0, t1, INT_IRQ0
-	bnez	t0, 1f
-	li	a0, 2
-	andi	t0, t1, INT_SW0
-	bnez	t0, 1f
-	li	a0, 0
-	andi	t0, t1, INT_SW1
-	bnez	t0, 1f
-	li      a0, 1
-	
-	/* No interrupt occured, can happen on R4000 (see refman 5.3.20)... - and i've got no clue whether it's the same on R4Kc */
-b	mips32_restore_user
-	nop
-
-	.set	reorder
-1:
-	sll     a1, a0, 2
-	lw      t0, interrupt_handlers(a1)
-	move    a1, sp
-	subu    sp, sp, 0x10
-	jal     t0
-	nop
-	addu    sp, sp, 0x10
-
-        j       mips32_restore_user
-
-
-.globl looop
-looop:
-	j       looop
-	nop
-
-
-#.align 4
-#mips32_syscall:
-#
-#		.set noat
-##		lui		k1, %hi(exception_stack)		# load kernel stack	
-##		lw		k0, %lo(exception_stack)(k1)
-##		addi k1,$at,0							# preserve $at register
-#		.set at
-#	
-#		eret
-
-
-		
-
-        .globl  mips32_utlb_fall_through
-        .align  4
-mips32_utlb_fall_through:
-#RESTORE_UTLB
-
-
diff --git a/kernel/src/glue/v4-mips32/fpage.h b/kernel/src/glue/v4-mips32/fpage.h
deleted file mode 100644
index c099080e..00000000
--- a/kernel/src/glue/v4-mips32/fpage.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/fpage.h
- * Description:   Wrapper for default fpage handling
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fpage.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__FPAGE_H__
-#define __GLUE__V4_MIPS32__FPAGE_H__
-
-#include INC_API(generic-archfpage.h)
-
-#endif /* !__GLUE__V4_MIPS32__FPAGE_H__ */
diff --git a/kernel/src/glue/v4-mips32/hwspace.h b/kernel/src/glue/v4-mips32/hwspace.h
deleted file mode 100644
index 1d91a683..00000000
--- a/kernel/src/glue/v4-mips32/hwspace.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/hwspace.h
- * Description:   Conversion functions for hardware space addresses
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: hwspace.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__HWSPACE_H__
-#define __GLUE__V4_MIPS32__HWSPACE_H__
-
-#include INC_ARCH(types.h)
-#include INC_GLUE(config.h)
-
-INLINE addr_t virt_to_phys(addr_t addr) {
-    return( (addr_t)((u32_t)addr - KSEG1_BASE) );
-}
-
-INLINE addr_t phys_to_virt(addr_t addr) {
-    return( (addr_t)((u32_t)addr + KSEG1_BASE) );
-}
-
-#endif /* !__GLUE__V4_MIPS32__HWSPACE_H__ */
diff --git a/kernel/src/glue/v4-mips32/init.cc b/kernel/src/glue/v4-mips32/init.cc
deleted file mode 100644
index ed8a8976..00000000
--- a/kernel/src/glue/v4-mips32/init.cc
+++ /dev/null
@@ -1,310 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/init.cc
- * Description:   Initialization for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: init.cc,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_API(kernelinterface.h)
-#include INC_API(schedule.h)
-
-#include INC_ARCH(cache.h)
-#include INC_ARCH(tlb.h)
-
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(timer.h)
-
-#include <kmemory.h>
-#include <mapping.h>
-#include <debug.h>
-
-extern "C" void init_cpu();
-
-EXTERN_KMEM_GROUP (kmem_mdb);
-EXTERN_KMEM_GROUP (kmem_tcb);
-EXTERN_KMEM_GROUP (kmem_space);
-
-
-void init_mempool() {
-
-#warning change this once memory descriptors are available
-
-    /* missing MBI... 
-     * kernel:		0x00000000 - 0x00400000 ( 4MB ) 
-     * kmem-heap:   0x00400000 - 0x01400000 ( 16MB )
-     * sigma0		0x02000000 - 0x02100000 ( 1MB )
-     * sigma1		0x02100000 - 0x02200000 ( 1MB )
-     * root 		0x02200000 - 0x02300000 ( 1MB )
-     */
-
-    /* Define the user's virtual address space. */
-    get_kip ()->memory_info.insert( memdesc_t::conventional, 
-                                    true,
-                                    (addr_t)0, 
-                                    (addr_t)(KSEG0_BASE)
-	);
-
-    /* Register physical memory. */
-    get_kip ()->memory_info.insert( memdesc_t::conventional, 
-                                    false, 
-                                    (addr_t)0x02000000, 
-                                    (addr_t)0x07000000 
-	);
-
-
-    /* some I/O ports */
-    get_kip ()->memory_info.insert( memdesc_t::shared, 
-                                    false, 
-                                    (addr_t)0x18000000, 
-                                    (addr_t)0x18001000 
-	);
-}
-
-
-void get_processor_infos() {
-
-    unsigned prid = (unsigned)read_c0_prid();
-    unsigned config1 = (unsigned)read_c0_config1();
-	
-    unsigned tlb_size = ( ( config1 >> 25 ) & 0x3f ) + 1;
-    unsigned da = ( ( config1 >> 7 ) & 0x7 );
-    unsigned dl = ( ( config1 >> 10 ) & 0x7 );
-    unsigned ds = ( ( config1 >> 13 ) & 0x7 );
-    unsigned ia = ( ( config1 >> 16 ) & 0x7 );
-    unsigned il = ( ( config1 >> 19 ) & 0x7 );
-    unsigned is = ( ( config1 >> 22 ) & 0x7 );
-
-    // processor
-    switch( ( prid >> 8 ) & 0xff ) {
-    case mips_cpu_t::mips_4Kc:
-        get_mips_cpu()->set_procid( mips_cpu_t::mips_4Kc );
-        break;
-    case mips_cpu_t::mips_4Kp:
-        get_mips_cpu()->set_procid( mips_cpu_t::mips_4Kp );
-        break;
-    default:
-        get_mips_cpu()->set_procid( mips_cpu_t::mips_unknown );
-        break;
-    }
-
-    // tlb size
-    get_mips_cpu()->set_tlb_size( tlb_size );
-
-	
-    // data cache configuration
-    switch( da ) {
-    case mips_cpu_t::assoc_dm:
-    case mips_cpu_t::assoc_2_way:
-    case mips_cpu_t::assoc_3_way:
-    case mips_cpu_t::assoc_4_way:
-        get_mips_cpu()->set_dcache_assoc( (mips_cpu_t::cache_assoc_e)da );
-        break;
-    default:
-        get_mips_cpu()->set_dcache_assoc( mips_cpu_t::assoc_unknown );
-        break;
-    }
-    switch( dl ) {
-    case mips_cpu_t::size_not_present:
-    case mips_cpu_t::size_16_bytes:
-        get_mips_cpu()->set_dcache_ls( (mips_cpu_t::cache_ls_e)dl );
-        break;
-    default:
-        get_mips_cpu()->set_dcache_ls( mips_cpu_t::size_unknown );
-        break;
-    }
-    switch( ds ) {
-    case mips_cpu_t::spw_64:
-    case mips_cpu_t::spw_128:
-    case mips_cpu_t::spw_256:
-        get_mips_cpu()->set_dcache_spw( (mips_cpu_t::cache_spw_e)ds );
-        break;
-    default:
-        break;
-    }
-
-
-    // instruction cache configuration
-    switch( ia ) {
-    case mips_cpu_t::assoc_dm:
-    case mips_cpu_t::assoc_2_way:
-    case mips_cpu_t::assoc_3_way:
-    case mips_cpu_t::assoc_4_way:
-        get_mips_cpu()->set_icache_assoc( (mips_cpu_t::cache_assoc_e)ia );
-        break;
-    default:
-        get_mips_cpu()->set_icache_assoc( mips_cpu_t::assoc_unknown );
-        break;
-    }
-    switch( il ) {
-    case mips_cpu_t::size_not_present:
-    case mips_cpu_t::size_16_bytes:
-        get_mips_cpu()->set_icache_ls( (mips_cpu_t::cache_ls_e)il );
-        break;
-    default:
-        get_mips_cpu()->set_icache_ls( mips_cpu_t::size_unknown );
-        break;
-    }
-    switch( is ) {
-    case mips_cpu_t::spw_64:
-    case mips_cpu_t::spw_128:
-    case mips_cpu_t::spw_256:
-        get_mips_cpu()->set_icache_spw( (mips_cpu_t::cache_spw_e)is );
-        break;
-    default:
-        break;
-    }
-
-
-}
-
-/**
- * Entry point from ASM into C kernel
- */
-extern "C" void SECTION(".init") startup_system() {
-    
-    {
-#warning clean up early serial port initialization
-        // Early serial port initialization for Simics 3.x - clean up!
-        #define inb(port) (*((volatile unsigned char*)(port)))
-        #define outb( port, data ) ((*((volatile unsigned char*)(port))) = data)
-        
-        #define USART_0_BASE    (0xb80003f8)                    /* reflects PC hardware */
-        
-        #define COMPORT USART_0_BASE
-        #define out_u8 outb
-        #define in_u8 inb
-        
-        #define RATE 115200
-        
-        #define IER	(COMPORT+1)
-        #define EIR	(COMPORT+2)
-        #define LCR	(COMPORT+3)
-        #define MCR	(COMPORT+4)
-        #define LSR	(COMPORT+5)
-        #define MSR	(COMPORT+6)
-        #define DLLO	(COMPORT+0)
-        #define DLHI	(COMPORT+1)
-        
-        out_u8(LCR, 0x80);		/* select bank 1	*/
-        for (volatile int i = 10000000; i--; );
-        out_u8(DLLO, (((115200/RATE) >> 0) & 0x00FF));
-        out_u8(DLHI, (((115200/RATE) >> 8) & 0x00FF));
-        out_u8(LCR, 0x03);		/* set 8,N,1		*/
-        out_u8(IER, 0x00);		/* disable interrupts	*/
-        out_u8(EIR, 0x07);		/* enable FIFOs	*/
-        out_u8(IER, 0x01);		/* enable RX interrupts	*/
-        in_u8(IER);
-        in_u8(EIR);
-        in_u8(LCR);
-        in_u8(MCR);
-        in_u8(LSR);
-        in_u8(MSR);
-    }
-
-
-    get_processor_infos();
-    
-    init_cpu();
-	
-
-#if 0
-    // Untested.  No cache model in Simics.
-    init_cache();	
-    
-    // jump into cached memory region
-    __asm__ __volatile__(
-    	".set noreorder\n\t"	
-    	"la $8, kseg0_ip\n\t"
-    	"lui $9, 0x2000\n\t"
-    	"sub $8, $8, $9\n\t"
-    	"jr $8\n\t"
-    	"nop\n\t"
-    	"kseg0_ip:\n\t"
-    	".set reorder"
-    	:::"$8", "$9"
-    );
-#endif
-    
-    init_hello();
-    
-    get_tlb()->init();
-
-    get_interrupt_ctrl()->init_intctrl();
-
-#warning change this once memory descriptors are available
-    /* missing MBI... 
-     * kernel:		0x00000000 - 0x00400000 ( 4MB ) 
-     * kmem-heap:   0x00400000 - 0x01400000 ( 16MB )
-     * sigma0		0x02000000 - 0x02100000 ( 1MB )
-     * sigma1		0x02100000 - 0x02200000 ( 1MB )
-     * root 		0x02200000 - 0x02300000 ( 1MB )
-     */
-    kmem.init( (void*)0xA0400000, (void*)0xA1400000 ); // XXX
-
-
-    /* initialize kernel interface page */
-    get_kip()->memory_info.n = 0;
-    init_mempool();
-
-    get_kip()->init();
-
-
-#warning change this once memory descriptors are available
-    get_kip()->sigma0.sp = 0x0;
-    get_kip()->sigma0.ip = 0x02000000;
-    get_kip()->sigma0.mem_region.set((void*)0x17, (void*)0x17); // XXX
-
-    get_kip()->root_server.sp = 0x0;
-    get_kip()->root_server.ip = 0x02200000;
-    get_kip()->root_server.mem_region.set((void*)0x17, (void*)0x17); // XXX
-	
-
-    init_mdb();
-
-    get_asid_cache()->init();
-    get_asid_cache()->set_valid(CONFIG_ASIDS_START, CONFIG_MAX_NUM_ASIDS-1);
-
-    init_kernel_space();
-
-    get_kip()->kdebug_init();
-
-        
-    /* initialize the scheduler */
-    get_current_scheduler()->init();
-        
-    /* initialize the kernel's timer source */
-    get_timer()->init_global();
-    get_timer()->init_cpu();
-        
-        
-    /* get the thing going - we should never return */
-    get_current_scheduler()->start();
-        
-    ASSERT( !"should never reach here" );    
-    spin_forever( 1 );
-}
diff --git a/kernel/src/glue/v4-mips32/intctrl.cc b/kernel/src/glue/v4-mips32/intctrl.cc
deleted file mode 100644
index 97a5cfd1..00000000
--- a/kernel/src/glue/v4-mips32/intctrl.cc
+++ /dev/null
@@ -1,98 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/intctrl.cc
- * Description:   MIPS32 interrupt controller implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.cc,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(config.h)
-#include <generic/lib.h>
-
-intctrl_t intctrl;
-
-word_t exception_handlers[32];
-word_t interrupt_handlers[8];
-
-
-extern "C" void spurious_interrupt( word_t irq, mips32_irq_context_t* frame ) {
-
-    printf("L4 Mips: Spurious interrupt %d\n", irq);
-    enter_kdebug("Spurious interrupt");
-}
-
-
-extern "C" void intctrl_t_handle_irq(word_t irq, mips32_irq_context_t* frame) {
-
-    intctrl_t::mask(irq);
-    handle_interrupt(irq);
-}
-
-
-void SECTION (".init") intctrl_t::init_intctrl() {
-
-    extern char	__general_except, __general_except_end;
-    extern char	__tlbmiss_except, __tlbmiss_except_end;
-    extern char	__extra_except, __extra_except_end;
-
-    extern char	mips32_exception;
-    extern char	mips32_interrupt;
-    extern char	mips32_l4syscall;
-    extern char	mips32_tlb_invalid;
-    extern char	mips32_tlb_mod;
-
-    //ASSERT( (word_t)(&__tlbmiss_except_end - &__tlbmiss_except) <= 0x80 && "Exception vector exceeds 0x80 bytes" );
-    //ASSERT( (word_t)(&__general_except_end - &__general_except) <= 0x80 && "Exception vector exceeds 0x80 bytes" );
-    //ASSERT( (word_t)(&__extra_except_end - &__extra_except) <= 0x80 && "Exception vector exceeds 0x80 bytes" );
-
-    /* copy exception vectors */
-    memcpy( (void *)(KSEG1_BASE), &__tlbmiss_except, &__tlbmiss_except_end - &__tlbmiss_except );
-    memcpy( (void *)(KSEG1_BASE + 0x180), &__general_except, &__general_except_end - &__general_except );
-    memcpy( (void *)(KSEG1_BASE + 0x200), &__extra_except, &__extra_except_end - &__extra_except );
-	
-    /* setup exception vector jump table */
-    for( unsigned i = 0; i < 32; i++ )
-        exception_handlers[i] = (word_t)&mips32_exception;
-
-    for( unsigned i = 0; i < 8; i++ )
-        interrupt_handlers[i] = (word_t)spurious_interrupt;
-
-    get_interrupt_ctrl()->register_exception_handler(0, &mips32_interrupt);
-    get_interrupt_ctrl()->register_exception_handler(1, &mips32_tlb_mod);
-    get_interrupt_ctrl()->register_exception_handler(2, &mips32_tlb_invalid);
-    get_interrupt_ctrl()->register_exception_handler(3, &mips32_tlb_invalid);
-    get_interrupt_ctrl()->register_exception_handler(8, &mips32_l4syscall);
-
-    get_interrupt_ctrl()->register_interrupt_handler(2, intctrl_t_handle_irq);
-    get_interrupt_ctrl()->register_interrupt_handler(3, intctrl_t_handle_irq);
-    get_interrupt_ctrl()->register_interrupt_handler(4, intctrl_t_handle_irq);
-    get_interrupt_ctrl()->register_interrupt_handler(5, intctrl_t_handle_irq);
-    get_interrupt_ctrl()->register_interrupt_handler(6, intctrl_t_handle_irq);
- 
-    //XXX ?? flush cache
-}
diff --git a/kernel/src/glue/v4-mips32/intctrl.h b/kernel/src/glue/v4-mips32/intctrl.h
deleted file mode 100644
index 07024ed4..00000000
--- a/kernel/src/glue/v4-mips32/intctrl.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/intctrl.h
- * Description:   MIPS32 interrupt controller
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__INTCTRL_H__
-#define __GLUE__V4_MIPS32__INTCTRL_H__
-
-#include <intctrl.h>
-
-#include INC_ARCH(mips_cpu.h)
-#include INC_API(tcb.h)
-
-extern word_t exception_handlers[32];
-extern word_t interrupt_handlers[8];
-
-
-class intctrl_t : public generic_intctrl_t {
-
-private:
-
-
-public:
-    
-    void init_intctrl();
-
-    void register_exception_handler (word_t vector, void *handler) {
-        ASSERT( vector < 32 && "intctrl_t::register_exception_handler: vector out if range" );
-        exception_handlers[vector] = (word_t)handler;
-    }
-
-    void register_interrupt_handler (word_t vector, void (*handler)(word_t, mips32_irq_context_t *)) {
-        ASSERT( vector < 32 && "intctrl_t::register_interrupt_handler: vector out if range" );
-        interrupt_handlers[vector] = (word_t) handler;
-    }
-
-
-
-    static inline void mask( word_t irq ) {
-        ASSERT( irq < 8 );
-        get_idle_tcb()->arch.int_mask &= ~( 1 << irq );
-        get_mips_cpu()->clear_cp0_status( ( 1<<8 ) << irq );
-    }
-	
-    // unmask returns true if an IRQ was already pending
-    static inline bool unmask( word_t irq ) { 
-        ASSERT( irq < 8 );
-        get_idle_tcb()->arch.int_mask |= 1 << irq;
-        get_mips_cpu()->set_cp0_status( ( 1 << 8 ) << irq );
-        return false;
-    }
-	
-    void mask_and_ack(word_t irq) { 
-        UNIMPLEMENTED(); 
-    }
-    
-    void ack(word_t irq) { 
-        UNIMPLEMENTED(); 
-    }
-	
-    void enable(word_t irq) { 
-        ASSERT( irq < 8 );
-        get_idle_tcb()->arch.int_mask |= 1 << irq;
-        get_mips_cpu()->set_cp0_status( ( 1 << 8 ) << irq );
-    }
-	
-    void disable(word_t irq) { 
-        ASSERT( irq < 8 );
-        get_idle_tcb()->arch.int_mask &= ~( 1 << irq );
-        get_mips_cpu()->clear_cp0_status( ( 1 << 8 ) << irq );
-    }
-
-    /* set affinity/routing */
-    void set_cpu(word_t irq, word_t cpu) { 
-        // XXX UNIMPLEMENTED(); 
-    }
-
-    /* system-global initialization */
-    void init_arch() { 
-        UNIMPLEMENTED(); 
-    }
-	
-    /* cpu-local initialization */
-    void init_cpu() { 
-        UNIMPLEMENTED(); 
-    }
-    
-    word_t get_number_irqs() { 
-        return( 7 ); 
-    }
-	
-    bool is_irq_available(word_t irq) { 
-        return( (irq < 7) && (irq >= 2) );
-    }
-
-};
-
-
-extern intctrl_t intctrl;
-
-/**
- * @return pointer to interrupt controller
- */
-INLINE intctrl_t * get_interrupt_ctrl()  {
-    extern intctrl_t intctrl;
-    return &intctrl;
-}
-
-
-#endif /* !__GLUE__V4_MIPS32__INTCTRL_H__ */
diff --git a/kernel/src/glue/v4-mips32/ipc.h b/kernel/src/glue/v4-mips32/ipc.h
deleted file mode 100644
index 3ed0ed8b..00000000
--- a/kernel/src/glue/v4-mips32/ipc.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/ipc.h
- * Description:   MR-to-GPR mappings for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ipc.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__IPC_H__
-#define __GLUE__V4_MIPS32__IPC_H__
-
-#define mr0	    s0
-#define mr1	    s1
-#define mr2	    s2
-#define mr3	    s3
-#define mr4	    s4
-#define mr5	    s5
-#define mr6	    s6
-#define mr7	    s7
-
-#endif /* !__GLUE__V4_MIPS32__IPC_H__ */
diff --git a/kernel/src/glue/v4-mips32/ktcb.h b/kernel/src/glue/v4-mips32/ktcb.h
deleted file mode 100644
index 204e439f..00000000
--- a/kernel/src/glue/v4-mips32/ktcb.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/ktcb.h
- * Description:   Architecture-specific TCB fields for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ktcb.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__KTCB_H__
-#define __GLUE__V4_MIPS32__KTCB_H__
-
-class arch_ktcb_t {
- public:
-	word_t int_mask;    
-
-};
-
-#endif /* !__GLUE__V4_MIPS32__KTCB_H__ */
diff --git a/kernel/src/glue/v4-mips32/map.h b/kernel/src/glue/v4-mips32/map.h
deleted file mode 100644
index c66b4e60..00000000
--- a/kernel/src/glue/v4-mips32/map.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/map.h
- * Description:   Wrapper for default mapping handling
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: map.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__MAP_H__
-#define __GLUE__V4_MIPS32__MAP_H__
-
-#include INC_API(generic-archmap.h)
-
-#endif /* !__GLUE__V4_MIPS32__MAP_H__ */
diff --git a/kernel/src/glue/v4-mips32/mdb.h b/kernel/src/glue/v4-mips32/mdb.h
deleted file mode 100644
index 1388b0f9..00000000
--- a/kernel/src/glue/v4-mips32/mdb.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/mdb.h
- * Description:   Mapping database configuration
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mdb.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__MDB_H__
-#define __GLUE__V4_MIPS32__MDB_H__
-
-#define MDB_MEM_SIZES		{ 12, 32 }
-#define MDB_MEM_NUMSIZES	2
-
-#endif /* !__GLUE__V4_MIPS32__MDB_H__ */
diff --git a/kernel/src/glue/v4-mips32/resources.cc b/kernel/src/glue/v4-mips32/resources.cc
deleted file mode 100644
index 011bf7d8..00000000
--- a/kernel/src/glue/v4-mips32/resources.cc
+++ /dev/null
@@ -1,294 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/resources.cc
- * Description:   MIPS32 thread resources
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.cc,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_API(tcb.h)
-#include INC_GLUE(resources.h)
-#include INC_ARCH(cp0regs.h)
-#include INC_ARCH(mips_cpu.h)
-#include <linear_ptab.h>
-
-
-void thread_resources_t::save (tcb_t * tcb) {
-
-    if( tcb->resource_bits.have_resource( COPY_AREA ) ) {
-		
-        pgent_t* pdir = tcb->space->get_pdir();
-        word_t idx = page_table_index( pgent_t::size_4m, (addr_t)COPY_AREA_START );
-
-        pdir[idx].raw = 0;
-        pdir[idx+1].raw = 0;
-
-        // XXX Flush tlb
-        get_tlb()->flush( (word_t)tcb->space->get_asid()->get() );
-    }
-}
-
-
-void thread_resources_t::load (tcb_t * tcb) {
-
-    if (tcb->resource_bits.have_resource (COPY_AREA)) {
-		
-        tcb_t* partner = tcb->get_partner_tcb();
-	
-        pgent_t* src_pdir = tcb->space->get_pdir();
-        pgent_t* dst_pdir = partner->space->get_pdir();
-
-        word_t dst_idx = page_table_index( pgent_t::size_4m, (addr_t)this->copy_area );
-        word_t src_idx = page_table_index( pgent_t::size_4m, (addr_t)COPY_AREA_START );
-
-        src_pdir[src_idx].raw = dst_pdir[dst_idx].raw;
-        src_pdir[src_idx+1].raw = dst_pdir[dst_idx+1].raw;
-    }
-}
-
-void thread_resources_t::purge (tcb_t * tcb) {
-
-}
-
-
-void thread_resources_t::dump (tcb_t * tcb) {
-
-}
-
-
-void thread_resources_t::free (tcb_t * tcb) {
-
-}
-
-
-void thread_resources_t::init (tcb_t * tcb) {
-
-    tcb->resource_bits.init();
-    //get_resources()->clear_fp_lazy_tcb();
-    //this->fpu_fpcsr = 0;
-}
-
-
-addr_t thread_resources_t::copy_area_real_address( addr_t addr ) {
-
-    return (addr_t)( this->copy_area + (((word_t)(addr)) & 0x003fffff) );
-}			
-
-
-void thread_resources_t::enable_copy_area( tcb_t* src_tcb, addr_t* src_addr, tcb_t* dst_tcb, addr_t* dst_addr ) {
-	
-    if (src_tcb->resource_bits.have_resource (COPY_AREA)) {
-        ASSERT(!"thread_resources_t::enable_copy_area called unexpectedly");
-    }
-    pgent_t* src_pdir = src_tcb->space->get_pdir();
-    pgent_t* dst_pdir = dst_tcb->space->get_pdir();
-	
-    word_t dst_idx = page_table_index( pgent_t::size_4m, *dst_addr );
-    word_t src_idx = page_table_index( pgent_t::size_4m, (addr_t)COPY_AREA_START );
-    ASSERT( src_idx == 510 + 2 + 256 );
-
-    this->copy_area = ((word_t)(*dst_addr)) & 0xffc00000;
-
-    // set up temp mapping in source address space
-	
-    // XXX was wenn dest pdir eintrag noch nicht existiert ??	
-    src_pdir[src_idx].raw = dst_pdir[dst_idx].raw;
-    src_pdir[src_idx+1].raw = dst_pdir[dst_idx+1].raw;
-	
-    *dst_addr = (addr_t*)(COPY_AREA_START + (((word_t)(*dst_addr)) & 0x003fffff) );
-
-    src_tcb->resource_bits += COPY_AREA;
-}
-
-
-void thread_resources_t::release_copy_area( tcb_t* tcb ) {
-
-    if (tcb->resource_bits.have_resource (COPY_AREA)) {
-
-        pgent_t* pdir = tcb->space->get_pdir();
-        word_t idx = page_table_index( pgent_t::size_4m, (addr_t)COPY_AREA_START );
-
-        pdir[idx].raw = 0;
-        pdir[idx+1].raw = 0;
-
-        // XXX Flush tlb
-        get_tlb()->flush( (word_t)tcb->space->get_asid()->get() );
-        tcb->resource_bits -= COPY_AREA;
-    }
-}
- 
-
-#if 0
-// FPU support not tested
-INLINE void thread_resources_t::deactivate_fpu( tcb_t *tcb ) {
-
-    //get_resources()->clear_fp_lazy_tcb();
-    //mips32_irq_context_t* context = (mips32_irq_context_t *)tcb->get_stack_top()-1;
-    //context->status &= ~ST_CU1;
-}
-
-
-INLINE void thread_resources_t::activate_fpu( tcb_t *tcb ) {
-
-    //get_resources()->set_fp_lazy_tcb( tcb );
-    //mips32_irq_context_t * context = (mips32_irq_context_t *)tcb->get_stack_top()-1;
-    //context->status |= ST_CU1;
-}
-
-
-void thread_resources_t::spill_fpu( tcb_t *tcb ) {
-	
-    word_t* start = this->fpu_gprs;
-   
-    __asm__ __volatile__ (
-        "s.s  $f0,	0(%0);\n\t"
-        "s.s  $f1,  4(%0);\n\t"
-        "s.s  $f2,  8(%0);\n\t"
-        "s.s  $f3,  12(%0);\n\t"
-        "s.s  $f4,  16(%0);\n\t"
-        "s.s  $f5,  20(%0);\n\t"
-        "s.s  $f6,  24(%0);\n\t"
-        "s.s  $f7,  28(%0);\n\t"
-        "s.s  $f8,  32(%0);\n\t"
-        "s.s  $f9,  36(%0);\n\t"
-        "s.s  $f10, 40(%0);\n\t"
-        "s.s  $f11, 44(%0);\n\t"
-        "s.s  $f12, 48(%0);\n\t"
-        "s.s  $f13, 52(%0);\n\t"
-        "s.s  $f14, 56(%0);\n\t"
-        "s.s  $f15, 60(%0);\n\t"
-        "s.s  $f16, 64(%0);\n\t"
-        "s.s  $f17, 68(%0);\n\t"
-        "s.s  $f18, 72(%0);\n\t"
-        "s.s  $f19, 76(%0);\n\t"
-        "s.s  $f20, 80(%0);\n\t"
-        "s.s  $f21, 84(%0);\n\t"
-        "s.s  $f22, 88(%0);\n\t"
-        "s.s  $f23, 92(%0);\n\t"
-        "s.s  $f24, 96(%0);\n\t"
-        "s.s  $f25, 100(%0);\n\t"
-        "s.s  $f26, 104(%0);\n\t"
-        "s.s  $f27, 108(%0);\n\t"
-        "s.s  $f28, 112(%0);\n\t"
-        "s.s  $f29, 116(%0);\n\t"
-        "s.s  $f30, 120(%0);\n\t"
-        "s.s  $f31, 124(%0);"
-        ::"b" (start)
-        );
-
-    // Save the FPCSR
-    __asm__ __volatile__ (
-        "cfc1   %0, $31 ;"
-        : "=r" (this->fpu_fpcsr)
-	);
-
-    this->deactivate_fpu( tcb );
-}
-
-
-INLINE void thread_resources_t::restore_fpu( tcb_t *tcb )
-{
-    this->activate_fpu( tcb );
-
-    word_t *start = this->fpu_gprs;
-
-    __asm__ __volatile__ (
-        "l.s  $f0,	0(%0);\n\t"
-        "l.s  $f1,  4(%0);\n\t"
-        "l.s  $f2,  8(%0);\n\t"
-        "l.s  $f3,  12(%0);\n\t"
-        "l.s  $f4,  16(%0);\n\t"
-        "l.s  $f5,  20(%0);\n\t"
-        "l.s  $f6,  24(%0);\n\t"
-        "l.s  $f7,  28(%0);\n\t"
-        "l.s  $f8,  32(%0);\n\t"
-        "l.s  $f9,  36(%0);\n\t"
-        "l.s  $f10, 40(%0);\n\t"
-        "l.s  $f11, 44(%0);\n\t"
-        "l.s  $f12, 48(%0);\n\t"
-        "l.s  $f13, 52(%0);\n\t"
-        "l.s  $f14, 56(%0);\n\t"
-        "l.s  $f15, 60(%0);\n\t"
-        "l.s  $f16, 64(%0);\n\t"
-        "l.s  $f17, 68(%0);\n\t"
-        "l.s  $f18, 72(%0);\n\t"
-        "l.s  $f19, 76(%0);\n\t"
-        "l.s  $f20, 80(%0);\n\t"
-        "l.s  $f21, 84(%0);\n\t"
-        "l.s  $f22, 88(%0);\n\t"
-        "l.s  $f23, 92(%0);\n\t"
-        "l.s  $f24, 96(%0);\n\t"
-        "l.s  $f25, 100(%0);\n\t"
-        "l.s  $f26, 104(%0);\n\t"
-        "l.s  $f27, 108(%0);\n\t"
-        "l.s  $f28, 112(%0);\n\t"
-        "l.s  $f29, 116(%0);\n\t"
-        "l.s  $f30, 120(%0);\n\t"
-        "l.s  $f31, 124(%0);"
-        : : "b" (start)
-	);
-
-    // Restore the FPCSR
-    __asm__ __volatile__ (
-        "ctc1   %0, $31 ;"
-        : : "r" (this->fpu_fpcsr)
-	);
-}
-
-
-void thread_resources_t::mips32_fpu_unavail_exception( tcb_t *tcb, mips32_irq_context_t* context ) {
-	
-    tcb_t * fp_tcb = get_resources()->get_fp_lazy_tcb();
-
-    /* In our lazy floating point model, we should never see a floating point
-     * exception if the current tcb already owns the floating point register
-     * file.
-     */
-    ASSERT( fp_tcb != tcb );
-
-    get_mips_cpu()->enable_fpu();
-
-    if( fp_tcb ) {
-        fp_tcb->resources.spill_fpu( fp_tcb );
-    }
-
-    this->restore_fpu( tcb );
-}
-
-
-void thread_resources_t::mips32_fpu_spill( tcb_t *tcb ) {
-	
-    tcb_t * fp_tcb = get_resources()->get_fp_lazy_tcb();
-
-    ASSERT( tcb );
-
-    if( tcb == fp_tcb ) {
-	get_mips_cpu()->enable_fpu();
-        fp_tcb->resources.spill_fpu( fp_tcb );
-    }
-}
-#endif
diff --git a/kernel/src/glue/v4-mips32/resources.h b/kernel/src/glue/v4-mips32/resources.h
deleted file mode 100644
index 73486f23..00000000
--- a/kernel/src/glue/v4-mips32/resources.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/resources.h
- * Description:   MIPS32 thread resources
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__RESOURCES_H__
-#define __GLUE__V4_MIPS32__RESOURCES_H__
-
-#include INC_GLUE(context.h)
-
-#define HAVE_RESOURCE_TYPE_E
-
-enum resource_type_e {
-    COPY_AREA	= 1,
-    EXCEPTION	= 2
-};
-
-class thread_resources_t  {
-
-public:
-
-    void dump( tcb_t* tcb );
-    void save( tcb_t* tcb );
-    void load( tcb_t* tcb );
-    void purge( tcb_t* tcb );
-    void init( tcb_t* tcb );
-    void free( tcb_t* tcb );
-
-    void enable_copy_area( tcb_t* tcb, addr_t* saddr, tcb_t* partner, addr_t* daddr );
-    void release_copy_area( tcb_t* tcb );
-    addr_t copy_area_real_address( addr_t addr );
-
-private:	
- 
-    word_t copy_area;
-};
-
-#endif /* !__GLUE__V4_MIPS32__RESOURCES_H__ */
diff --git a/kernel/src/glue/v4-mips32/schedule.h b/kernel/src/glue/v4-mips32/schedule.h
deleted file mode 100644
index ff2fa041..00000000
--- a/kernel/src/glue/v4-mips32/schedule.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/schedule.h
- * Description:   MIPS32-specific scheduler handling
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: schedule.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__SCHEDULE_H__
-#define __GLUE__V4_MIPS32__SCHEDULE_H__
-
-#include INC_GLUE(config.h)
-#include <debug.h>
-
-INLINE u64_t get_timer_tick_length() {
-    return( TIMER_TICK_LENGTH );
-}
-
-#endif /* !__GLUE__V4_MIPS32__SCHEDULE_H__ */
diff --git a/kernel/src/glue/v4-mips32/space.cc b/kernel/src/glue/v4-mips32/space.cc
deleted file mode 100644
index f555b41a..00000000
--- a/kernel/src/glue/v4-mips32/space.cc
+++ /dev/null
@@ -1,374 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/space.cc
- * Description:   Address space handling for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.cc,v 1.2 2006/11/17 17:14:30 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>		
-
-#include <kmemory.h>
-#include <linear_ptab.h>
-
-#include INC_API(space.h)
-#include INC_GLUE(config.h)
-#include INC_GLUE(context.h)
-#include INC_API(tcb.h)
-#include INC_ARCH(cp0regs.h)
-
-EXTERN_KMEM_GROUP (kmem_space);
-DECLARE_KMEM_GROUP (kmem_tcb);
-DECLARE_KMEM_GROUP (kmem_utcb);
-
-
-asid_cache_t asid_cache;
-
-space_t* kernel_space = 0;
-static tcb_t * dummy_tcb = 0;
-
-
-/**
- * Initialize THE kernel space
- *
- * @see get_kernel_space()
- */
-void SECTION(".init.memory") init_kernel_space() {
-	
-    kernel_space = allocate_space();
-
-    ASSERT( ((word_t)kernel_space & 0xfff) == 0 && "unexpected malloc alignment in init_kernel_space" );
-
-    kernel_space->get_asid()->init();
-
-    dummy_tcb = (tcb_t *) kmem.alloc(kmem_tcb, MIPS32_PAGE_SIZE);
-	
-    ASSERT( ((word_t)dummy_tcb & 0xfff) == 0 && "unexpected malloc alignment in init_kernel_space" );
-}
-
-
-/**
- * Initialize a space
- *
- * @param utcb_area	fpage describing location of UTCB area
- * @param kip_area	fpage describing location of KIP
- */
-void space_t::init (fpage_t utcb_area, fpage_t kip_area) {
-
-    ASSERT( ((word_t)utcb_area.get_base() & 0xfff) == 0 && "unexpected alignment in space_t::init" );
-    ASSERT( ((word_t)kip_area.get_base() & 0xfff) == 0 && "unexpected alignment in space_t::init" );
-	
-    lx.utcb_area = utcb_area;
-    lx.kip_area = kip_area;
-
-    this->get_asid()->init();
-
-    add_mapping(kip_area.get_base(), virt_to_phys( (addr_t)get_kip() ), pgent_t::size_4k, false, false, false, true);
-}
-
-
-/**
- * Allocate a UTCB
- *
- * @param tcb	Owner of the utcb
- */
-utcb_t *space_t::allocate_utcb( tcb_t *tcb )
-{
-    addr_t utcb = (addr_t)tcb->get_utcb_location();
-    addr_t page;
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-	
-    if( lookup_mapping( (addr_t) utcb, &pg, &pgsize ) ) {
-        // Already a valid page mapped at UTCB address
-        ASSERT( pgsize == pgent_t::size_4k );
-        page = phys_to_virt( pg->address(this, pgent_t::size_4k) );
-    }
-    else {
-        // Allocate a new UTCB page.
-        page = kmem.alloc( kmem_utcb, 4096 ); // XXX 4096
-        add_mapping( utcb, virt_to_phys(page), pgent_t::size_4k, true, false, false, true );
-    }
-
-    return (utcb_t *)addr_offset( page, (word_t)utcb & 0x00000fff ); 
-}
-
-
-/**
- * Release mappings that belong to the kernel (UTCB, KIP)
- *
- * @param vaddr		virtual address in the space
- * @param paddr		physical address the mapping refers to
- * @param log2size	log2(size of mapping)
- */
-void space_t::release_kernel_mapping (addr_t vaddr, addr_t paddr, word_t log2size) {
-
-    if (get_utcb_page_area ().is_addr_in_fpage (vaddr))
-        kmem.free (kmem_utcb, phys_to_virt( paddr ), 1UL << log2size); 
-}
-
-
-/**
- * Establish a mapping in sigma0's space
- *
- * @param addr	the fault address in sigma0
- *
- * This function should install a mapping that allows sigma0 to make
- * progress. Sigma0's space is available as this.
- */
-void space_t::map_sigma0(addr_t addr) {
-
-    add_mapping(addr, addr, pgent_t::size_4k, true, false, false, true);
-}
-
-
-/**
- * Try to copy a mapping from kernel space into the current space
- *
- * @param addr  The address for which the mapping should be copied
- * @return true if something was copied, false otherwise.
- *
- * Synchronization must happen at the highest level, allowing sharing.
- */
-bool space_t::sync_kernel_space(addr_t addr) {
-
-    return( false );
-}
-
-
-/**
- * Install a dummy TCB
- *
- * @param addr	address where the dummy TCB should be installed
- *
- * The dummy TCB must be read-only and fail all validity tests.
- */
-void space_t::map_dummy_tcb (addr_t addr) {
-
-    ASSERT( ((word_t)addr & 0xfff ) == 0 && "unexpected alignment in space_t::map_dummy_tcb" );
-    add_mapping( addr, virt_to_phys((addr_t)dummy_tcb), pgent_t::size_4k, false, true, true, true );
-}
-
-
-/**
- * Map memory usable for TCB
- *
- * @param addr  address of the TCB that should be made usable
- *
- * This function is called when a TCB should be made usable the first
- * time. Usually, this happens when a) no page is mapped at the TCB
- * address at all, or b) a read-only page is mapped and now a write
- * access to the TCB occured.
- *
- * @see space_t::map_dummy_tcb
- */
-void space_t::allocate_tcb(addr_t addr) {
-
-    ASSERT( (word_t)addr >= KTCB_AREA_START );
-    addr_t page = kmem.alloc( kmem_tcb, MIPS32_PAGE_SIZE );
-	
-    ASSERT( ( (word_t)page & 0xfff ) == 0 && "unexpected alignment in space_t::allocate_tcb" );
-    ASSERT( ( (word_t)addr & 0xfff ) == 0 && "unexpected alignment in space_t::allocate_tcb" );
-
-    this->add_mapping( addr, virt_to_phys(page), pgent_t::size_4k, true, true, true, true );
-}
-
-
-/**
- * Translate a user accessible UTCB address to a kernel accessible one
- *
- * @param utcb  user accessible address of UTCB
- * @returns kernel accessible address of UTCB
- *
- * The returned address must be accessible in the current address
- * space. This is required for checking values in the UTCB of a thread
- * in a different address space.
- */
-utcb_t * space_t::utcb_to_kernel_space(utcb_t * utcb) {
-
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-
-    if( lookup_mapping ((addr_t) utcb, &pg, &pgsize) ) {
-        addr_t kaddr = pg->address( this, pgsize );
-        return (utcb_t *)addr_offset( phys_to_virt(kaddr), (word_t)utcb & 0x00000fff );  // XXX
-    }
-
-    return( (utcb_t*)0 );
-}
-
-
-void space_t::add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size, 
-			  bool writable, bool kernel, bool global, bool cacheable) {
-    
-    //printf("SPACE: Add mapping: space = 0x%x, vaddr = 0x%x, paddr = 0x%x, w = %s, k = %s, g = %s, c = %s\n", this, vaddr, paddr,
-    //		writable ? "true" : "false", kernel ? "true" : "false", global ? "true" : "false", cacheable ? "true" : "false" );
-    
-    if( (word_t)vaddr >= KTCB_AREA_START ) {
-        ASSERT( global == true );
-    }
-    
-    if( (word_t)this == (word_t)get_kernel_space() ) {
-        ASSERT( (word_t)vaddr >= KTCB_AREA_START && "space_t::add_mapping" );
-    }
-    else {
-        ASSERT( (word_t)vaddr < KSEG0_BASE && "space_t::add_mapping" );
-    }
-    
-    pgent_t *pde, *pte;
-    
-    pde = this->pgent( page_table_index( pgent_t::size_4m, vaddr ) );
-    
-    if( !pde->is_valid( this, size ) ) {
-        pde->make_subtree( this, pgent_t::size_4m, kernel );
-    }
-    
-    pte = pde->subtree( this, pgent_t::size_4m )->next( this, pgent_t::size_4k, page_table_index(pgent_t::size_4k, vaddr) );
-    
-    pte->set_entry( this, pgent_t::size_4k, paddr, writable ? 7 : 5, 0, kernel );
-    
-    if( global ) pte->set_global( this, pgent_t::size_4k, true );
-
-}
-
-/*****************************************************************************/
-/*                      USER MODE TLB MISS HANDLING                          */
-/*****************************************************************************/
-
-/*
- * called on a TLB mod exception. This happens on a write to an address in the
- * TLB that is write protected - e.g. a dummy tcb
- */
-extern "C" void tlbmod_handler( addr_t _faddr, mips32_irq_context_t* frame ) {
-
-    space_t* space = get_current_tcb()->get_space();
-    
-    addr_t faddr = (addr_t)( (word_t)_faddr & 0xfffff000 );
-	 
-    pgent_t::pgsize_e pgsize;
-    pgent_t *pg;
-    bool kernel;
-
-    word_t global = 0x0;
-    word_t asid;
-
-    if( space == NULL || (word_t)faddr >= KTCB_AREA_START ) { 
-        space = get_kernel_space();
-        global = 0x1;
-        asid = KERNEL_ASID;
-    }
-    else {
-        asid = (word_t)(space->get_asid()->get());
-    }
-	
-    if( space->lookup_mapping( faddr, &pg, &pgsize ) ) {
-		
-        if( pg->is_writable(space, pgsize) ) {
-            get_tlb()->put( (word_t)faddr, asid, pg);
-            return;
-        }
-    }
-
-    if( space->is_user_area(faddr) ) {
-        kernel = frame->status & ST_UM ? false : true;
-    }
-    else {
-        kernel = true;
-    }
-    space->handle_pagefault (faddr, (addr_t)frame->epc, space_t::write, kernel);
-}
-
-
-extern "C" void touch_tcb( void* tcb ) {
-
-    volatile char toodles;
-    ASSERT( !"touch_tcb reached" ); // XXX simply remove ( though this is unlikely to get invoked in tcb_t::switch_to )
-    toodles = *((char*)tcb);
-}
-
-
-/**
- * Standard TLB miss handler called on TLB missed in user and kernel mode
- */
-extern "C" void tlbmiss_handler( addr_t _faddr, mips32_irq_context_t* frame ) {
-	
-    //register unsigned esp asm("$29");
-    //printf("\n\tuser_tlbmiss - faddr=0x%x, frame=0x%x , ip=0x%x, status=0x%x ,", _faddr, frame, frame->epc, frame->status );
-    space_t* space = get_current_tcb()->get_space();
-    //printf("space = 0x%x, tcb = 0x%x\n", space, get_current_tcb() );
-    //printf("\tSaved stack = 0x%x, current stack = 0x%x\n", frame->sp, esp );
-	
-    addr_t faddr = (addr_t)( (word_t)_faddr & 0xfffff000 );
-	 
-    pgent_t::pgsize_e pgsize;
-    space_t::access_e access;
-    pgent_t *pg;
-    bool kernel, twice;
-
-    word_t global = 0x0;
-    word_t asid;
-	
-    if( space == NULL || (word_t)faddr >= KTCB_AREA_START ) { 
-        space = get_kernel_space();
-        global = 0x1;
-        asid = KERNEL_ASID;
-    }
-    else {
-        asid = (word_t)(space->get_asid()->get());
-    }
-	
-    access = ( frame->cause & CAUSE_EXCCODE ) == ( 3 << 2 ) ? space_t::write : space_t::read;
-    twice = false;
-
-    while (1) {
-        if( space->lookup_mapping( faddr, &pg, &pgsize ) ) {
-            if( !( ((access == space_t::write) && pg->is_writable(space, pgsize)) ||
-                   ((access == space_t::read) && pg->is_readable(space, pgsize))) ) {
-                ASSERT( 0 && "access violation in kernel tlbmiss handler" );
-            }
-            get_tlb()->put( (word_t)faddr, asid, pg);
-            return;
-        }
-
-        if( twice ) { 
-            // printf("======== Segfault ;) ========\n"); 
-            return;
-        }
-
-        if( space->is_user_area(faddr) ) {
-            kernel = frame->status & ST_UM ? false : true;
-        }
-        else {
-            kernel = true;	/* User-space will cause address error */
-        }
-        space->handle_pagefault (faddr, (addr_t)frame->epc, access, kernel);
-        twice = true;
-    }
-}
-
-
-
diff --git a/kernel/src/glue/v4-mips32/space.h b/kernel/src/glue/v4-mips32/space.h
deleted file mode 100644
index 04c0265d..00000000
--- a/kernel/src/glue/v4-mips32/space.h
+++ /dev/null
@@ -1,297 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/space.h
- * Description:   Address space for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.h,v 1.3 2006/11/14 18:44:56 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__SPACE_H__
-#define __GLUE__V4_MIPS32__SPACE_H__
-
-#include INC_API(fpage.h)			/* fpage_t	*/
-#include INC_API(thread.h)			/* threadid_t	*/
-#include INC_API(config.h)
-
-#include INC_GLUE(config.h)
-#include INC_GLUE(hwspace.h)
-
-#include INC_ARCH(pgent.h)
-#include INC_ARCH(tlb.h)
-
-#include <asid.h>
-
-// Even if new MDB is not used we need the mdb_t::ctrl_t
-#include <mdb.h>
-
-/* forward declarations - space_t depends on tcb_t and utcb_t */
-class tcb_t;
-class utcb_t;
-
-
-/**
- * The address space representation
- */
-class space_t {
-
-private:
-
-    union {
-        pgent_t pdir[1024];			// page directory covering 4GB
-        struct {
-            word_t padding_0[512];	// kuseg pagetable
-				
-            fpage_t utcb_area;		// this part (kseg0) will never be mapped
-            fpage_t kip_area;		//   -> use mem to store some other stuff 
-            word_t thread_count; 
-            asid_t asid;
-
-            word_t padding_1[508];	// nothing and kseg2/kseg3 pagetable
-        } lx;
-    };
-		
-public:
-
-    pgent_t* get_pdir() {
-        return( this->pdir );
-    }
-
-    utcb_t * allocate_utcb (tcb_t * tcb);
-
-    /**
-     * Test whether an address is in a mappable page, that is, no
-     * kernel pages, not the KIP and not within the UTCB area.
-     * @param addr address to test
-     * Returns true if address is in a mappable page.
-     */
-    bool is_mappable(addr_t addr);
-
-    /**
-     * test whether an fpage is mappable
-     */
-    /* Address ranges */
-    bool is_mappable(fpage_t);
-    bool is_user_area(addr_t);
-    bool is_user_area(fpage_t);
-    bool is_tcb_area(addr_t addr);
-    bool is_arch_mappable(addr_t addr, size_t size) { return true; }
-
-    /* Copy area related methods */
-    bool is_copy_area (addr_t addr);
-    word_t get_copy_limit (addr_t addr, word_t limit);
-
-    /* kip and utcb handling */
-    fpage_t get_kip_page_area();
-    fpage_t get_utcb_page_area();
-
-    /* space control */
-    word_t space_control (word_t ctrl) { 
-        return 0; 
-    }
-
-    bool is_initialized();
-
-    tcb_t * get_tcb(threadid_t tid);
-    tcb_t * get_tcb(void *ptr);
-
-    void map_fpage(fpage_t snd_fp, word_t base, space_t * t_space, fpage_t rcv_fp, bool grant);
-    fpage_t unmap_fpage(fpage_t fpage, bool flush, bool unmap_all);
-    fpage_t mapctrl (fpage_t fpage, mdb_t::ctrl_t ctrl,
-		     word_t attribute, bool unmap_all);
-    bool allocate_utcb(tcb_t * tcb, utcb_t * &kern_utcb, utcb_t * &user_utcb);
-    void init(fpage_t utcb_area, fpage_t kip_area);
-    void add_tcb(tcb_t * tcb);
-    bool remove_tcb(tcb_t * tcb);
-    void allocate_tcb(addr_t addr);
-    void free();
-
-    enum access_e {
-        read, write, readwrite, execute,
-    };
-    void handle_pagefault(addr_t addr, addr_t ip, access_e access, bool kernel);
-    void map_sigma0(addr_t addr);
-    bool sync_kernel_space(addr_t addr);
-    void map_dummy_tcb(addr_t addr);
-    utcb_t * utcb_to_kernel_space(utcb_t * utcb);
-
-    /* Methods needed by linear page table walker. */
-    pgent_t * pgent (word_t num, word_t cpu = 0);
-    bool lookup_mapping (addr_t vaddr, pgent_t ** pg, pgent_t::pgsize_e * size);
-    bool readmem (addr_t vaddr, word_t * contents);
-    static word_t readmem_phys (addr_t paddr) { 
-        return *(word_t*)phys_to_virt((word_t*)paddr); 
-    }
-    void release_kernel_mapping (addr_t vaddr, addr_t paddr, word_t log2size);
-
-    /* TLB releated methods used by linear page table walker. */
-    void flush_tlb (space_t * curspace);
-    void flush_tlbent (space_t * curspace, addr_t vaddr, word_t log2size);
-    bool does_tlbflush_pay (word_t log2size);
-
-    /* Update hooks to allow for efficient XCPU TLB updates and * invalidations, invoked by the linear ptab walker */
-    static void begin_update() {}
-    static void end_update() {}
-
-    /* generic page table walker */
-    void add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size, bool writable, bool kernel, bool global, bool cacheable = true);
-		
-    /* virtual asid management */
-    asid_t* get_asid() {
-        return( &(lx.asid) );
-    }
-
-};
-
-INLINE space_t* get_kernel_space() {
-    extern space_t* kernel_space;
-    return kernel_space;
-}
-
-
-/**
- * get the KIP area of an address space
- * @returns the KIP area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_kip_page_area (void) {
-    return( lx.kip_area );
-}
-
-/**
- * get the UTCB area of an address space
- * @returns the utcb area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_utcb_page_area (void) {
-    return( lx.utcb_area );
-}
-
-INLINE bool space_t::is_user_area (addr_t addr) {
-    return( (word_t)addr >= 0 && (word_t)addr < KSEG0_BASE );
-}
-        
-INLINE bool space_t::is_tcb_area (addr_t addr) {
-    return( (u32_t)addr >= (u32_t)KTCB_AREA_START );
-}
-
-
-/**
- * Check whether address resides within copy area.
- *
- * @param addr			address to check against
- *
- * @return true if address is within copy area; false otherwise
- */
-INLINE bool space_t::is_copy_area (addr_t addr) {
-    return( (word_t)addr >= COPY_AREA_START && (word_t)addr < COPY_AREA_END );
-}
-
-/**
- * Get the limit of an IPC copy operation (e.g., copy from operation
- * is not allowed to go beyond the boundaries of the user area).
- *
- * @param addr			address to copy from/to
- * @param limit			intended copy size
- *
- * @return limit clipped to the allowed copy size
- */
-INLINE word_t space_t::get_copy_limit (addr_t addr, word_t limit) {
-	
-    word_t end = (word_t)addr + limit;
-
-    if( is_user_area(addr) ) {
-        if( end >= COPY_AREA_END )
-            return( COPY_AREA_END - (word_t)addr );
-    }
-    else {
-        ASSERT( !"space_t::get_copy_limit - address not in user space" );
-    }
-
-    return limit;
-
-}
-
-/**
- * translates a global thread ID into a valid tcb pointer
- * @param tid thread ID
- * @returns pointer to the TCB of thread tid
- */
-INLINE tcb_t * space_t::get_tcb( threadid_t tid ) {
-    return( (tcb_t*)( (word_t)KTCB_AREA_START + KTCB_SIZE * tid.get_threadno() ) );
-}
-
-/**
- * translates a pointer within a tcb into a valid tcb pointer
- * @param ptr pointer to somewhere in the TCB
- * @returns pointer to the TCB
- */
-INLINE tcb_t * space_t::get_tcb (void * ptr) {
-    return( (tcb_t*)((word_t)ptr & KTCB_MASK) );
-}
-
-
-/**
- * adds a thread to the space
- * @param tcb pointer to thread control block
- */
-INLINE void space_t::add_tcb(tcb_t * tcb) {
-    lx.thread_count++;
-}
-
-/**
- * removes a thread from a space
- * @param tcb_t thread control block
- * @return true if it was the last thread
- */
-INLINE bool space_t::remove_tcb(tcb_t * tcb) {
-    ASSERT( lx.thread_count > 0 );
-    lx.thread_count--;
-    return( lx.thread_count == 0 );
-}
-
-
-/* TLB releated methods used by linear page table walker. */
-INLINE void space_t::flush_tlb (space_t * curspace) {
-    ASSERT( !"space_t::flush_tlb(space_t*) is not implemented" );
-    //get_tlb()->flush( (word_t)(curspace->get_asid()->get()) );
-}
-
-INLINE void space_t::flush_tlbent (space_t * curspace, addr_t vaddr, word_t log2size) {
-    ASSERT( curspace->get_asid()->is_valid() );
-    get_tlb()->flush( (word_t)(curspace->get_asid()->get()) ); // XXX only flush area
-}
-
-INLINE bool space_t::does_tlbflush_pay (word_t log2size) {
-    return( false ); 
-}
-
-/* Methods needed by linear page table walker. */
-INLINE pgent_t * space_t::pgent (word_t num, word_t cpu ) {
-    return( ((pgent_t *)pdir)->next( this, pgent_t::size_4m, num ) );
-}
-
-
-void init_kernel_space();
-
-#endif /* !__GLUE__V4_MIPS32__SPACE_H__ */
diff --git a/kernel/src/glue/v4-mips32/syscalls.S b/kernel/src/glue/v4-mips32/syscalls.S
deleted file mode 100644
index 0c469793..00000000
--- a/kernel/src/glue/v4-mips32/syscalls.S
+++ /dev/null
@@ -1,277 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/syscalls.S
- * Description:   System call entry points for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.S,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(regdef.h)
-#include INC_GLUE(syscalls.h)
-#include INC_GLUE(context.h)
-#include <tcb_layout.h>
-
-
-#define mr0	    s0
-#define mr1	    s1
-#define mr2	    s2
-#define mr3	    s3
-#define mr4	    s4
-#define mr5	    s5
-#define mr6	    s6
-#define mr7	    s7
-
-
-#define DECODE_SYSCALL_IPC									\
-1:;												\
-	.set push;										\
-	.set noreorder;										\
-	li	t4, SYSCALL_ipc;								\
-	bne	v0, t4, 1f;									\
-	lui	ra, %hi(mips32_l4sysipc_return);                                                \
-	li	t4, -4096;					/* tcb mask */			\
-	and	t5, sp, t4;					/* t5 = current tcb */          \
-	lw	t5, OFS_TCB_UTCB(t5);		/* t5 = current utcb */                         \
-	addiu	ra, %lo(mips32_l4sysipc_return);                                                \
-	sw	s8, PT_S8(sp);									\
-	sw	mr0, 64(t5);									\
-	sw	mr1, 68(t5); 									\
-	sw	mr2, 72(t5); 									\
-	sw	mr3, 76(t5); 									\
-	sw	mr4, 80(t5); 									\
-	sw	mr5, 84(t5); 									\
-	sw	mr6, 88(t5); 									\
-	sw	mr7, 92(t5); 									\
-	j	sys_ipc;									\
-	subu sp, sp, 0x10;									\
-1:;												\
-	lui	ra, %hi(mips32_l4syscall_return);                                               \
-	subu	t4, t4, 1;									\
-	.set reorder;										\
-	.set pop; 
-
-
-
-
-
-
-#define DECODE_SYSCALL(name, vector)                    \
-	.set push;					\
-	.set noreorder;					\
-1:	bne	v0, t4, 1f;				\
-	subu	t4, t4, 1;				\
-	addiu	ra, %lo(mips32_l4syscall_return);       \
-	j	sys_##name;				\
-	subu sp, sp, 0x10;				\
-	.set pop;					\
-	.set reorder;
-
-#define DECODE_SYSCALL_FIVE_IN(name)                            \
-	.set push;						\
-	.set noreorder;						\
-1:	bne	v0, t4, 1f;					\
-	subu	t4, t4, 1;					\
-	addiu	ra, %lo(mips32_l4syscall_five_in_return);	\
-								\
-	subu sp, sp, 0x14; /* Space for 5 in parameters */	\
-	sw s0, 0x10(sp); /* pass arg no 5 on stack */		\
-								\
-	j	sys_##name;					\
-	nop;							\
-	.set reorder;						\
-	.set pop; 
-
-
-#define DECODE_SYSCALL_EIGHT_IN(name)				\
-	.set push;						\
-	.set noreorder;						\
-1:	bne	v0, t4, 1f;					\
-	subu	t4, t4, 1;					\
-	addiu	ra, %lo(mips32_l4syscall_eight_in_return);	\
-								\
-	subu sp, sp, 0x20; /* Space for 8 in parameters */	\
-	sw	s0, 0x10(sp); /* pass arg no 5 on stack */	\
-	sw	s1, 0x14(sp); /* pass arg no 6 on stack */	\
-	sw	s2, 0x18(sp); /* pass arg no 7 on stack */	\
-	sw	s3, 0x1C(sp); /* pass arg no 8 on stack */	\
-								\
-	j	sys_##name;					\
-	nop;							\
-	.set reorder;						\
-	.set pop;
-
-
-
-
-
-
-#define SKIPDECODE_SYSCALL(name, vector)	\
-	.set push;				\
-	.set noreorder;				\
-1:	bne	v0, t4, 1f;			\
-	subu	t4, t4, 1;			\
-	li	AT, L4_TRAP_KDEBUG;		\
-	la	v0, 2f;				\
-	break;					\
-	.data;					\
-2:	.string "Unsupported SYSCALL";		\
-	.previous;				\
-	.set pop;				\
-	.set reorder;
-
-
-
-BEGIN_PROC(mips32_l4syscall)
-	
-	/* Trashed registers:
-	 *   t4, t5, t6, t7
-	 * Calling Registers:
-	 *   v0 : syscall number
-	 *   a0, a1, a2, a3 : arguments 1 - 4
-	 *   s0, s1, s2, s3 : arguments 5 - 8
-	 * Returned Registers:
-	 *   v0	    : returned 1
-	 *   a0..a3 : returned 2 - 5
-	 *   t0..t1 : returned 6 - 7
-	 */
-	
-	.set noat
-	bgez	v0, mips32_syscall_exception	/* Not an L4 system call? */
-	lui	t5, %hi(K_STACK_BOTTOM)		/* Load kernel stack base address */
-	
-	mfc0	t7, CP0_STATUS			/* get STATUS register */
-
-	move	t4, sp				/* Old stack in t4 */
-
-	srl	t6, t7, 5			/* clear IE, EXL, ERL, UM */
-	sll	t6, t6, 5
-	mtc0	t6, CP0_STATUS			/* Enter kernel mode */
-	andi	t6, t7, 0x10			/* Isolate UM bit */
-
-	.set noreorder
-	beq	t6, zero, 9f			/* Branch if from KERNEL mode */
-	mfc0	t6, CP0_EPC			/* Branch delay */
-	.set reorder
-
-	lw	sp, %lo(K_STACK_BOTTOM)(t5)	/* Load saved stack */
-
-9:
-	addu	t6, t6, 4			/* Calc New EPC */
-	subu	sp, sp, PT_SIZE			/* New stack pointer */
-	sw	ra, PT_RA(sp)			/* Save RA */
-	sw	t7, PT_STATUS(sp)		/* Save status */
-	sw	t4, PT_SP(sp)			/* Save stack */
-	sw	t6, PT_EPC(sp)			/* Save EPC */
-
-	move    t6, t4				/* top of user stack in t6 */
-	li	t4, SYSCALL_ipc
-
-	
-	DECODE_SYSCALL_IPC							/* 3 in, 1 out */
-	DECODE_SYSCALL(thread_switch, SYSCALL_thread_switch)			/* 1 in, 0 out */
-	DECODE_SYSCALL_FIVE_IN(thread_control)					/* 5 in, 1 out */
-	DECODE_SYSCALL_EIGHT_IN(exchange_registers)				/* 8 in, 7 out */
-	DECODE_SYSCALL_FIVE_IN(schedule)					/* 5 in, 2 out */
-	DECODE_SYSCALL(unmap, SYSCALL_unmap)					/* 1 in, 0 out */
-	DECODE_SYSCALL_FIVE_IN(space_control)					/* 5 in, 2 out */
-	SKIPDECODE_SYSCALL(processor_control,SYSCALL_processor_control)
-	SKIPDECODE_SYSCALL(memory_control,SYSCALL_memory_control)		/* 3 in, 1 out */
-	DECODE_SYSCALL(clock,SYSCALL_system_clock)				/* 0 in, 1 out */
-	nop
-
-1:
-	li	AT, L4_TRAP_KDEBUG
-	la	v0, 2f
-	break
-	.data
-2:	.string "Unknown SYSCALL"
-	.previous
-	.set at
-END_PROC(mips32_l4syscall)
-
-BEGIN_PROC(mips32_l4sysipc_return)
-	.set noat
-	addiu	sp, sp, 0x10
-	li	t4, -4096			/* tcb mask */
-	and	t5, sp, t4			/* t5 = current tcb */
-	lw	t5, OFS_TCB_UTCB(t5)            /* t5 = current utcb */
-	lw	s8, PT_S8(sp)
-	lw	mr0, 64(t5)
-	lw	mr1, 68(t5)
-	lw	mr2, 72(t5)
-	lw	mr3, 76(t5)
-	lw	mr4, 80(t5)
-	lw	mr5, 84(t5)
-	lw	mr6, 88(t5)
-	lw	mr7, 92(t5)
-	b	17f	
-mips32_l4syscall_eight_in_return:
-	addiu	sp, sp, 0xc
-mips32_l4syscall_five_in_return:
-	addiu	sp, sp, 0x4
-mips32_l4syscall_return:
-	addiu	sp, sp, 0x10
-17:	mfc0	t6, CP0_STATUS
-	lw	t7, PT_SP(sp)                   /* load stack */
-	ori	t6, t6, 0x2			/* set Exception Level */
-	mtc0	t6, CP0_STATUS                  /* to disable interrupts, we now can set EPC */
-	lw	t4, PT_STATUS(sp)               /* load status */
-	lw	t5, PT_EPC(sp)                  /* load epc */
-	lw	ra, PT_RA(sp)                   /* load ra */
-
-#STOP_SYSCALL_COUNTER
-#PRINT_SYSCALL_TIMES
-
-	mtc0	t5, CP0_EPC			/* restore EPC */ 
-	li	t3, 0x0fffffe0			/* CONFIG_MIPS32_STATUS_MASK */
-	srl	t5, sp, 12
-	move	sp, t7				/* restore stack */
-	and	t6, t3, t6			/* compute new status register */
-	nor	t3, zero, t3
-	and	t4, t3, t4
-	or	t7, t6, t4			/*            " "              */
-	mtc0	t7, CP0_STATUS			/* new status value */
-	sll	t5, t5, 12			/* Get TCB pointer */
-	lw	k0, OFS_TCB_MYSELF_LOCAL(t5)	/* Load UTCB into k0 */
-	nop
-	eret
-	.set at
-END_PROC(mips32_l4sysipc_return)
-
-
-
-
-BEGIN_PROC(mips32_syscall_exception)
-	
-	SAVE_ALL_INT
-	move	a0, sp
-	jal	syscall_exception
-	j	mips32_restore_user
-	nop
-
-END_PROC(mips32_syscall_exception)
diff --git a/kernel/src/glue/v4-mips32/syscalls.h b/kernel/src/glue/v4-mips32/syscalls.h
deleted file mode 100644
index 06995b78..00000000
--- a/kernel/src/glue/v4-mips32/syscalls.h
+++ /dev/null
@@ -1,262 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/syscalls.h
- * Description:   System call declarations for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__SYSCALLS_H__
-#define __GLUE__V4_MIPS32__SYSCALLS_H__
-
-#if defined(ASSEMBLY)
-
-#define L4_TRAP_KPUTC			(-100)
-#define L4_TRAP_KGETC			(-101)
-#define L4_TRAP_KDEBUG			(-102)
-#define L4_TRAP_UNUSED			(-103)
-#define L4_TRAP_KGETC_NB		(-104)
-#define L4_TRAP_READ_PERF		(-110)
-#define L4_TRAP_WRITE_PERF		(-111)
-
-/* The syscall assembler depends on the values below */
-#define SYSCALL_ipc			(-101)
-#define SYSCALL_thread_switch		(-102)
-#define SYSCALL_thread_control		(-103)
-#define SYSCALL_exchange_registers	(-104)
-#define SYSCALL_schedule		(-105)
-#define SYSCALL_unmap			(-106)
-#define SYSCALL_space_control		(-107)
-#define SYSCALL_processor_control	(-108)
-#define SYSCALL_memory_control		(-109)
-#define SYSCALL_system_clock		(-110)
-#define SYSCALL_user_state		(-111)
-
-#else
-
-#define L4_TRAP_KPUTC			(-100ul)
-#define L4_TRAP_KGETC			(-101ul)
-#define L4_TRAP_KDEBUG			(-102ul)
-#define L4_TRAP_GETUTCB			(-103ul)
-#define L4_TRAP_KGETC_NB		(-104ul)
-#define L4_TRAP_READ_PERF		(-110ul)
-#define L4_TRAP_WRITE_PERF		(-111ul)
-
-/* The syscall assembler depends on the values below */
-#define SYSCALL_ipc			(-101ul)
-#define SYSCALL_thread_switch		(-102ul)
-#define SYSCALL_thread_control		(-103ul)
-#define SYSCALL_exchange_registers	(-104ul)
-#define SYSCALL_schedule		(-105ul)
-#define SYSCALL_unmap			(-106ul)
-#define SYSCALL_space_control		(-107ul)
-#define SYSCALL_processor_control	(-108ul)
-#define SYSCALL_memory_control		(-109ul)
-#define SYSCALL_system_clock		(-110ul)
-#define SYSCALL_user_state		(-111ul)
-
-//
-// System call function attributes.
-//
-
-#define SYSCALL_ATTR(sec_name)
-
-#define SYS_IPC_RETURN_TYPE                     word_t 
-
-#define SYS_THREAD_CONTROL_RETURN_TYPE          word_t
-#define SYS_EXCHANGE_REGISTERS_RETURN_TYPE      word_t 
-#define SYS_SPACE_CONTROL_RETURN_TYPE           word_t
-#define SYS_SCHEDULE_RETURN_TYPE                word_t
-#define SYS_MEMORY_CONTROL_RETURN_TYPE          word_t
-#define SYS_CLOCK_RETURN_TYPE			u64_t
-
-
-
-//
-// Syscall declaration wrappers.
-//
-
-#define SYS_IPC(to, from, timeout)						\
-  SYS_IPC_RETURN_TYPE SYSCALL_ATTR ("ipc")					\
-  sys_ipc (to, from, timeout)
-
-#define SYS_THREAD_CONTROL(dest, space, scheduler, pager, utcb)			\
-  SYS_THREAD_CONTROL_RETURN_TYPE SYSCALL_ATTR ("thread_control")		\
-  sys_thread_control (dest, space, scheduler, pager, utcb)
-
-#define SYS_SPACE_CONTROL(space, control, kip_area, utcb_area,			\
-			  redirector)						\
-  SYS_SPACE_CONTROL_RETURN_TYPE SYSCALL_ATTR ("space_control")			\
-  sys_space_control (space, control, kip_area, utcb_area,			\
-		     redirector)
-
-#define SYS_SCHEDULE(dest, time_control, processor_control,			\
-		     prio, preemption_control)					\
-  SYS_SCHEDULE_RETURN_TYPE SYSCALL_ATTR ("schedule")				\
-  sys_schedule (dest, time_control, processor_control,				\
-		prio, preemption_control)
-
-#define SYS_EXCHANGE_REGISTERS(dest, control, usp, uip,uflags,			\
-			uhandle, pager, is_local)				\
-  SYS_EXCHANGE_REGISTERS_RETURN_TYPE SYSCALL_ATTR ("exchange_registers")	\
-  sys_exchange_registers (dest, control, usp, uip,				\
-			  uflags, uhandle, pager, is_local)
-
-#define SYS_THREAD_SWITCH(dest)							\
-  void SYSCALL_ATTR ("thread_switch")						\
-  sys_thread_switch (dest)
-
-#define SYS_UNMAP(control)							\
-  void SYSCALL_ATTR ("unmap") sys_unmap (control)
-
-#define SYS_PROCESSOR_CONTROL(processor_no, internal_frequency,			\
-			      external_frequency, voltage)			\
-  void SYSCALL_ATTR ("processor_control")					\
-  sys_processor_control (processor_no, internal_frequency,			\
-			 external_frequency, voltage)
-
-#define SYS_MEMORY_CONTROL(control, attribute0, attribute1,			\
-			   attribute2, attribute3)				\
-  SYS_MEMORY_CONTROL_RETURN_TYPE SYSCALL_ATTR ("memory_control")		\
-  sys_memory_control (control, attribute0, attribute1,				\
-		      attribute2, attribute3)
-
-
-#define SYS_CLOCK()								\
-  SYS_CLOCK_RETURN_TYPE SYSCALL_ATTR ("clock")					\
-  sys_clock()
-
-
-
-
-#define return_clock(ticks)							\
-{										\
-	return( ticks );							\
-}
-
-/**
- * Preload registers and return from sys_ipc
- * @param from The FROM value after the system call
- */
-#define return_ipc(from)	return((from).get_raw())
-
-
-/**
- * Preload registers and return from sys_thread_control
- * @param result The RESULT value after the system call
- */
-#define return_thread_control(result)	return(result);
-
-
-/**
- * Preload registers and return from sys_exchange_registers
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- * @param sp The SP value after the system call
- * @param ip The IP value after the system call
- * @param flags The FLAGS value after the system call
- * @param pager The PAGER value after the system call
- * @param handle The USERDEFINEDHANDLE value after the system call
- */
-//#warning PORTME 
-//#define return_exchange_registers(result, control, sp, ip, flags, pager, handle)	return
-
-#define return_exchange_registers(result, control, sp, ip, flags, pager, handle)	\
-{											\
-    register word_t ctrl asm("$4") = control;	/* a0 */				\
-    register word_t sp_r asm("$5") = sp;	/* a1 */				\
-    register word_t ip_r asm("$6") = ip;	/* a2 */				\
-    register word_t flg asm("$7") = flags;	/* a3 */				\
-    register word_t pgr asm("$8") = pager.get_raw();	/* t0 */			\
-    register word_t hdl asm("$9") = handle;	/* t1 */				\
-											\
-    __asm__ __volatile__ (								\
-	"" : : "r" (ctrl), "r" (sp_r), "r" (ip_r),					\
-	"r" (flg), "r" (pgr), "r" (hdl)							\
-    );											\
-    return ((result).get_raw());							\
-}
-
-
-/**
- * Return from sys_thread_switch
- */
-#define return_thread_switch() return
-
-
-/**
- * Return from sys_unmap
- */
-#define return_unmap() return
-
-
-/**
- * Preload registers and return from sys_thread_switch
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- */
-//#define return_space_control(result, control)	return
-#define return_space_control(result, control)				\
-{									\
-    register word_t c asm("$4") = control; /* a0 */			\
-    __asm__ __volatile__ (						\
-	"" : : "r" (c)							\
-    );									\
-    return (result);							\
-}
-
-
-
-/**
- * Preload registers and return from sys_schedule
- * @param result The RESULT value after the system call
- * @param time_control The TIME_CONTROL value after the system call
- */
-//#define return_schedule( result, time_control )
-#define return_schedule(result, time_control)				\
-{									\
-    register word_t c asm("$4") = time_control;	/* a0 */    		\
-    __asm__ __volatile__ (						\
-	"" : : "r" (c)							\
-    );									\
-    return (result);							\
-}
-
-/**
- * Return from sys_memory_control
- */
-#define return_memory_control(result)	return (result)
-
-
-/**
- * Return from sys_processor_control
- */
-#define return_processor_control() return
-
-
-#endif
-
-#endif /* !__GLUE__V4_MIPS32__SYSCALLS_H__ */
diff --git a/kernel/src/glue/v4-mips32/tcb.h b/kernel/src/glue/v4-mips32/tcb.h
deleted file mode 100644
index 1b202faa..00000000
--- a/kernel/src/glue/v4-mips32/tcb.h
+++ /dev/null
@@ -1,611 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/tcb.h
- * Description:   TCB related functions for Version 4, MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tcb.h,v 1.3 2006/10/20 21:31:55 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__TCB_H__
-#define __GLUE__V4_MIPS32__TCB_H__
-
-#ifndef __API__V4__TCB_H__
-#error not for stand-alone inclusion
-#endif
-
-
-#include INC_API(syscalls.h)		/* for sys_ipc */
-#include INC_GLUE(context.h)
-#include INC_GLUE(config.h)
-#include INC_ARCH(cp0regs.h)
-
-#include <debug.h>
-
-INLINE void tcb_t::set_cpu(cpuid_t cpu) { 
-    return;
-}
-
-INLINE word_t tcb_t::get_utcb_location() {
-    return( myself_local.get_raw() );
-}
-
-INLINE void tcb_t::set_utcb_location(word_t utcb_location) {
-    return( myself_local.set_raw( utcb_location ) );
-}
-
-/**
- * read value of message register
- * @param index number of message register
- */
-INLINE word_t tcb_t::get_mr(word_t index) {
-    return get_utcb()->mr[index];
-}
-
-/**
- * set the value of a message register
- * @param index number of message register
- * @param value value to set
- */
-INLINE void tcb_t::set_mr(word_t index, word_t value) {
-    get_utcb()->mr[index] = value;
-}
-
-
-/**
- * copies a set of message registers from one UTCB to another
- * @param dest destination TCB
- * @param start MR start index
- * @param count number of MRs to be copied
- */
-INLINE void tcb_t::copy_mrs(tcb_t * dest, word_t start, word_t count) {
-    utcb_t *my_utcb, *other_utcb;
-	
-    my_utcb = get_utcb();
-    other_utcb = dest->get_utcb();
-
-    for(word_t idx = start; idx < start + count; idx++) { // XXX do asm
-        other_utcb->mr[idx] = my_utcb->mr[idx];
-        //dest->set_mr(idx, this->get_mr(idx));
-    }
-}
-
-
-/**
- * read value of buffer register
- * @param index number of buffer register
- */
-INLINE word_t tcb_t::get_br(word_t index) {
-    return get_utcb()->br[index];
-}
-
-/**
- * set the value of a buffer register
- * @param index number of buffer register
- * @param value value to set
- */
-INLINE void tcb_t::set_br(word_t index, word_t value) {
-    get_utcb()->br[index] = value;
-}
-
-
-/**
- * allocate the tcb
- * The tcb pointed to by this will be allocated.
- */
-INLINE void tcb_t::allocate() {
-    this->kernel_stack[0] = 0;
-}
-
-
-/**
- * set the address space a TCB belongs to
- * @param space address space the TCB will be associated with
- */
-INLINE void tcb_t::set_space(space_t * space) {
-    this->space = space;
-}
-
-
-
-
-
-/**
- * Short circuit a return path from an IPC system call.  The error
- * code TCR and message registers are already set properly.  The
- * function only needs to restore the appropriate user context and
- * return execution to the instruction directly following the IPC
- * system call.
- */
-
-/* XXX FIXME - This does not always get stack right! */
-INLINE void tcb_t::return_from_ipc (void) {
-	
-    mips32_irq_context_t * context = (mips32_irq_context_t *) get_stack_top () - 1;
-	
-    __asm__ __volatile__ (
-        "move	$29, %0				\n"
-        "subu	$29, 0x10			\n"		/* this is because mips32_l4sysipc_return's o32 conventions */
-        "j	mips32_l4sysipc_return	\n"
-        : 
-        : "r" (context)
-        );
-}
-
-
-/**
- * Short circuit a return path from a user-level interruption or
- * exception.  That is, restore the complete exception context and
- * resume execution at user-level.
- */
-INLINE void tcb_t::return_from_user_interruption (void) {
-    mips32_irq_context_t * context = (mips32_irq_context_t *) get_stack_top () - 1;
-    __asm__ __volatile__ (
-        "move	$29, %0			\n"
-        "j	mips32_restore_user	\n"
-        : 
-        : "r" (context)
-        );
-}
-
-
-/********************************************************************** 
- *
- *                      thread switch routines
- *
- **********************************************************************/
-
-extern word_t K_STACK_BOTTOM;
-
-#define mips32_initial_switch_to(d_stack, d_asid, d_space)							\
-__asm__ __volatile__ (												\
-    "mtc0   %[asid], "STR(CP0_ENTRYHI)"\n\t"	/* Set new ASID */						\
-    "move    $29, %[stack]\n\t"			/* Install the new stack */					\
-    "ori    %[stack], 4096-1\n\t"										\
-    "addiu  %[stack], 1\n\t"											\
-    "sw     %[stack], 0(%[stack_bot])\n\t"									\
-														\
-    "lw      $31,16($29)\n\r"											\
-    "lw      $16,0($29)\n\t"											\
-    "lw      $17,4($29)\n\t"											\
-    "lw      $30,8($29)\n\t"											\
-    "lw      $28,12($29)\n\t"											\
-    "addiu   $29,$29,20\n\t"			/* clean stack */						\
-														\
-    "jr	     $31\n\t"												\
-    "0:		\t\t"				/* Return Address */						\
-    :														\
-	: [stack] "r" (d_stack), [asid]  "r" (d_asid), [space] "r" (d_space), [stack_bot]"r" (&K_STACK_BOTTOM)	\
-	: "$1", "$31"												\
-);														\
-__asm__ __volatile__ ("" ::: "$2", "$3", "$4", "$5", "$6", "$7" );						\
-__asm__ __volatile__ ("" ::: "$8", "$9", "$10", "$23", "$24", "$25" );  					\
-__asm__ __volatile__ ("" ::: "$11", "$12", "$13", "$14", "$15" );	    					\
-__asm__ __volatile__ ("" ::: "$18", "$19", "$20", "$21", "$22" );
-
-
-/**
- * switch to initial thread
- * @param tcb TCB of initial thread
- *
- * Initializes context of initial thread and switches to it.  The
- * context (e.g., instruction pointer) has been generated by inserting
- * a notify procedure context on the stack.  We simply restore this
- * context.
- */
-
-INLINE void NORETURN initial_switch_to (tcb_t * tcb) {
-
-    ASSERT( tcb->get_space() == 0 || tcb->get_space() == get_kernel_space() );
-	
-    //printf("\nTHREAD: (2) Inital switch to Thread. IP = 0x%x, TCB = 0x%x, Stack = 0x%x\n", *(((word_t*)tcb->stack)+2) ,tcb, (word_t)tcb->stack );
-	
-    mips32_initial_switch_to((word_t)tcb->stack, KERNEL_ASID, (word_t)tcb->get_space());
-
-}
-
-
-extern "C" void touch_tcb( void* tcb );
-
-/**
- * switches to another tcb thereby switching address spaces if needed
- * @param dest tcb to switch to
- */
-INLINE void tcb_t::switch_to( tcb_t * dest ) {
-
-    word_t new_asid, wired, entryhi;
-    space_t* space;	
-
-    entryhi = ( (word_t)dest & 0xffffe000 ) | KERNEL_ASID;
-    wired = ((word_t)dest >= KTCB_AREA_START) ? 1 : 0;
-	
-    ASSERT( (word_t)(dest->stack) < (word_t)dest + 4096  );		
-    ASSERT( (void*)(dest->stack) > (void*)((word_t)dest + 500) ); // XXX stupid stack overflow test
-	
-    space = dest->get_space();
-
-    if( space == NULL ) {
-        space = get_kernel_space();
-        new_asid = KERNEL_ASID;
-    }
-    else {
-        if( !space->get_asid()->is_valid() ) {
-            // get new asid and preemt another one if necessary
-            new_asid = space->get_asid()->get();
-            get_tlb()->flush( (word_t)new_asid );
-        }
-        else {
-            new_asid = space->get_asid()->value();
-        }
-    }
-
-    if( this->resource_bits )
-        resources.save( this );
-
-    /**
-     * So the most indented part following is my personal wire
-     * action. Its sole purpose is to keep the currently running
-     * threads' kernel stack (in the TCB) hard wired in the TLB. This
-     * turned out to be useful cause if it's not, the following might
-     * happen: On an exception, the kernel tries to save some context
-     * on the (faulting threads) stack. If it's not (TLB-)mapped
-     * though, a subsequent (Tlb-miss) exception would try the same
-     * thing and cause another (Tlb-miss) excpetion and so on.
-     * 
-     * No doubt there are other (and probably way better) solutions
-     * around that (see e.g. Mips64 port). It's just: This one is
-     * simple and seems to work out (so far) and I havn't gotten
-     * around to change it.
-     **/ 
-	
-    __asm__ __volatile__ (
-        /* I'm the old thread :) */
-        "addiu  $29,$29,-20				\n\t"
-        "la     $31,0f					\n\t"	/* ra */
-        "sw     $16,0($29)				\n\t"	/* save s0 */
-        "sw     $17,4($29)				\n\t"	/* save s1 */
-        "sw     $30,8($29)				\n\t"	/* save s8 */
-        "sw     $28,12($29)				\n\t"	/* save gp */
-        "sw     $31,16($29)				\n\t"	/* save ra */
-
-        "sw	    $29, 0(%[old_stack])		\n\t"	/* Store current stack in old_stack */
-
-        "beqz %[wired], 4f				\n\t"	/* nothing to hard-wire cause TCB is not in virt mem */
-
-        "1:						\n\t"	/* check whether dest-TCB is in TLB (most likely) */
-        "mtc0 %[entryhi], "STR(CP0_ENTRYHI)"		\n\t"
-        "nop;nop;nop					\n\t"
-        "tlbp						\n\t"
-        "nop;nop					\n\t"
-
-        "mfc0 $8, "STR(CP0_INDEX)"			\n\t"	/* find out where exactly it is: */
-        "nop;nop;nop					\n\t"
-        "beqz $8, 3f					\n\t"	/*   seems to be at the proper location already */
-        "bgtz $8, 2f					\n\t"	/*   seems to be at the wrong location */
-        "move $4, %[new_stack]				\n\t"	/*   seems to be not in the TLB -> put it in there  */
-        "jal  touch_tcb					\n\t"	/*     this is ugly. bother. probably never happens */
-        "b 1b						\n\t"
-        "2:						\n\t"	/* swap TLB[0] and TLB[index] and avoid trashing */
-        "tlbr						\n\t"
-        "nop;nop;nop					\n\t"
-        "mfc0 $10, "STR(CP0_ENTRYHI)"			\n\t"	/* get TLB[index] */
-        "mfc0 $11, "STR(CP0_ENTRYLO0)"			\n\t"
-        "mfc0 $12, "STR(CP0_ENTRYLO1)"			\n\t"
-        "mtc0 $0, "STR(CP0_INDEX)"			\n\t"
-        "nop;nop					\n\t"
-        "tlbr						\n\t"
-        "mfc0 $13, "STR(CP0_ENTRYHI)"			\n\t"	/* get TLB[0] */
-        "mfc0 $14, "STR(CP0_ENTRYLO0)"			\n\t"
-        "mfc0 $15, "STR(CP0_ENTRYLO1)"			\n\t"
-        "mtc0 %[invalid], "STR(CP0_ENTRYHI)"		\n\t"	/* invalidate TLB[0] and avoid a temp duplicate entry */
-        "mtc0 $0, "STR(CP0_ENTRYLO0)"			\n\t"	/*   XXX not sure whether this is necessary */
-        "mtc0 $0, "STR(CP0_ENTRYLO1)"			\n\t"
-        "nop;nop					\n\t"
-        "tlbwi; nop;nop;nop				\n\t"
-        "mtc0 $8, "STR(CP0_INDEX)"			\n\t"	/* write TLB[index] */
-        "mtc0 $13, "STR(CP0_ENTRYHI)"			\n\t"
-        "mtc0 $14, "STR(CP0_ENTRYLO0)"			\n\t"
-        "mtc0 $15, "STR(CP0_ENTRYLO1)"			\n\t"
-        "nop;nop					\n\t"
-        "tlbwi; nop;nop;nop				\n\t"
-        "mtc0 $0, "STR(CP0_INDEX)"			\n\t"	/* write TLB[0] */
-        "mtc0 $10, "STR(CP0_ENTRYHI)"			\n\t"
-        "mtc0 $11, "STR(CP0_ENTRYLO0)"			\n\t"
-        "mtc0 $12, "STR(CP0_ENTRYLO1)"			\n\t"
-        "nop;nop					\n\t"
-        "tlbwi; nop;nop;nop				\n\t"
-        "3:						\n\t"
-        "mtc0 %[wired], "STR(CP0_WIRED)"		\n\t"
-        "b 5f						\n\t"
-        "4:						\n\t"
-        "mtc0 $0, "STR(CP0_WIRED)"			\n\t"
-        "nop						\n\t"
-        "5:						\n\t"
-        "nop;nop					\n\t"
-        "mtc0   %[asid], "STR(CP0_ENTRYHI)"		\n\t"	/* Set new ASID */
-        "move   $29, %[new_stack]			\n\t"	/* Install the new stack */
-        "or	    %[new_stack], 4096-1		\n\t"
-        "addiu  %[new_stack], 1				\n\t"
-        "sw     %[new_stack], 0(%[stack_bot])		\n\t"	/* I'm the new thread :) */
-        "lw     $31,16($29)				\n\t"	/* load ra */
-        "lw     $16,0($29)				\n\t"	/* load s0 */
-        "lw     $17,4($29)				\n\t"	/* load s1 */
-        "lw     $30,8($29)				\n\t"   /* load s8 */
-        "lw     $28,12($29)				\n\t"	/* load gp */
-        "addiu  $29,$29,20				\n\t"
-        "jr	    $31					\n\t"
-        "0:						\n\t"	/* Return Address */
-
-        :: [old_stack] "r" ((word_t)&this->stack), [new_stack] "r" ((word_t)dest->stack), [asid] "r"(new_asid),
-        [stack_bot]"r" (&K_STACK_BOTTOM), [wired] "r"(wired), [entryhi] "r"(entryhi), [invalid] "r"(get_tlb()->get_invalid() )
-        : "$1", "$4","$8", "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$31"
-	);
-
-    __asm__ __volatile__ ("" ::: "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$23", "$24", "$25", "$11", "$12",
-                          "$13", "$14", "$15", "$18", "$19", "$20", "$21", "$22" );
-
-    if( this->resource_bits )
-        resources.load(this);
-}
-
-
-
-INLINE word_t *tcb_t::get_stack_top(void) {
-    return (word_t *)((char*)this + KTCB_SIZE);
-}
-
-
-
-/**
- * intialize stack for given thread
- */
-INLINE void tcb_t::init_stack() {
-	
-    mips32_irq_context_t * context = (mips32_irq_context_t*)get_stack_top() - 1;
-
-    this->stack = (word_t *) context;/* Update new stack position */
-
-    for (word_t* t = (word_t *) context; t < get_stack_top(); t++) {
-        *t = 0;
-    }
-
-}
-
-
-
-
-/**********************************************************************
- *
- *                        notification functions
- *
- **********************************************************************/
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)()) {
-	
-    //printf("\nTHREAD: (1) Create new Thread ( tcb_t::notify ). IP = 0x%x, TCB = 0x%x, UserStack = 0x%x\n", func, this, this->stack);
-    mips32_switch_stack_t* stack = reinterpret_cast< mips32_switch_stack_t*>(this->stack);
-    stack--;
-    stack->s8 = (word_t) func;
-    stack->ra = (word_t) mips32_return_from_notify0;
-    this->stack = reinterpret_cast<word_t*>(stack);
-}
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)(word_t), word_t arg1) {
-    //printf("\nTHREAD: (1.1) Create new Thread ( tcb_t::notify ). IP = 0x%x, TCB = 0x%x, Stack = 0x%x\n", func, this, this->stack);
-
-    mips32_switch_stack_t* stack = reinterpret_cast< mips32_switch_stack_t*>(this->stack);
-    stack--;
-    stack->s8 = (word_t) func;
-    stack->s0 = arg1;
-    stack->ra = (word_t) mips32_return_from_notify1;
-    this->stack = reinterpret_cast<word_t*>(stack);
-}
-
-INLINE void tcb_t::notify (void (*func)(word_t, word_t), word_t arg1, word_t arg2) {
-    //printf("\nTHREAD: (1.2) Create new Thread ( tcb_t::notify ). IP = 0x%x, TCB = 0x%x, UserStack = 0x%x\n", func, this, this->stack);
-    mips32_switch_stack_t* stack = reinterpret_cast< mips32_switch_stack_t*>(this->stack);
-    stack--;
-    stack->s8 = (word_t) func;
-    stack->s0 = arg1;
-    stack->s1 = arg2;
-    stack->ra = (word_t) mips32_return_from_notify2;
-    this->stack = reinterpret_cast<word_t*>(stack);
-}
-
-
-
-
-/**********************************************************************
- * 
- *            access functions for ex-regs'able registers
- *
- **********************************************************************/
-
-/**
- * read the user-level instruction pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_ip()
-{
-    mips32_irq_context_t * context = (mips32_irq_context_t *) get_stack_top () - 1;
-    return (addr_t) (context)->epc;
-}
-
-/**
- * read the user-level stack pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_sp()
-{
-    mips32_irq_context_t* context = (mips32_irq_context_t *) get_stack_top () - 1;
-    return (addr_t) (context)->sp;
-}
-
-/**
- * set the user-level instruction pointer
- * @param ip	new user-level instruction pointer
- */
-INLINE void tcb_t::set_user_ip(addr_t ip)
-{
-    mips32_irq_context_t * context = (mips32_irq_context_t *) get_stack_top () - 1;
-    context->epc = (word_t)ip;
-}
-
-/**
- * set the user-level stack pointer
- * @param sp	new user-level stack pointer
- */
-INLINE void tcb_t::set_user_sp(addr_t sp)
-{
-    mips32_irq_context_t * context = (mips32_irq_context_t *) get_stack_top () - 1;
-    context->sp = (word_t)sp;
-}
-
-
-/**
- * read the user-level flags (one word)
- * @return	the user-level flags
- */
-INLINE word_t tcb_t::get_user_flags (void)
-{
-    mips32_irq_context_t * context = (mips32_irq_context_t *) get_stack_top () - 1;
-    return context->status;
-}
-
-/**
- * set the user-level flags
- * @param flags	new user-level flags
- */
-INLINE void tcb_t::set_user_flags (const word_t flags)
-{
-    UNIMPLEMENTED();
-}
-
-/**********************************************************************
- *
- *                  copy-area related functions
- *
- **********************************************************************/
-
-/**
- * Enable copy area for current thread.
- *
- * @param dst		destination TCB for IPC copy operation
- * @param s		source address
- * @param d		destination address
- */
-INLINE void tcb_t::adjust_for_copy_area (tcb_t * dst, addr_t * s, addr_t * d) {
-    resources.enable_copy_area( this, s, dst, d );
-}
-
-/**
- * Release copy area(s) for current thread.
- */
-INLINE void tcb_t::release_copy_area (void) {
-    resources.release_copy_area( this );
-}
-
-/**
- * Retrieve the real address associated with a copy area address.
- *
- * @param addr		address within copy area
- *
- * @return address translated into a regular user-level address
- */
-INLINE addr_t tcb_t::copy_area_real_address (addr_t addr) {
-    return( resources.copy_area_real_address( addr ) );
-}
-
-/**********************************************************************
- *
- *                        global tcb functions
- *
- **********************************************************************/
-
-/**
- * Locate current TCB by using current stack pointer and return it.
- */
-INLINE tcb_t * get_current_tcb (void)
-{
-    register word_t stack_var asm("$29");
-    return( (tcb_t *)(stack_var & KTCB_MASK) );
-};
-
-
-/**
- * invoke an IPC from within the kernel
- *
- * @param to_tid destination thread id
- * @param from_tid from specifier
- * @param timeout IPC timeout
- * @return IPC message tag (MR0)
- */
-INLINE msg_tag_t tcb_t::do_ipc (threadid_t to_tid, threadid_t from_tid, timeout_t timeout) {
-
-    msg_tag_t tag;
-
-    sys_ipc( to_tid, from_tid, timeout );
-    tag.raw = get_mr( 0 );
-
-    return tag;
-}
-
-INLINE tcb_t * addr_to_tcb (addr_t addr){
-    return (tcb_t *) ((word_t) addr & KTCB_MASK);
-}
-
-/**********************************************************************
- *
- *                  architecture-specific functions
- *
- **********************************************************************/
-
-/**
- * initialize architecture-dependent root server properties based on
- * values passed via KIP
- * @param space the address space this server will run in   
- * @param ip the initial instruction pointer           
- * @param sp the initial stack pointer
- */
-INLINE void tcb_t::arch_init_root_server (space_t * space, word_t ip, word_t sp)
-{ 
-}
-
-#endif /* !__GLUE__V4_MIPS32__TCB_H__ */
diff --git a/kernel/src/glue/v4-mips32/thread.cc b/kernel/src/glue/v4-mips32/thread.cc
deleted file mode 100644
index 75c4acfb..00000000
--- a/kernel/src/glue/v4-mips32/thread.cc
+++ /dev/null
@@ -1,61 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/thread.cc
- * Description:   MIPS32 specific thread management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: thread.cc,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(tcb.h)
-
-extern "C" void mips32_restore_user(void);
-extern "C" void mips32_restore_user_o32(void);
-
-
-/**
- * Setup TCB to execute a function when switched to
- *
- * @param func pointer to function
- *
- * The old stack state of the TCB does not matter.
- */
-void tcb_t::create_startup_stack (void (*func)()) {
-
-    /* Re-init the stack */
-    // XXX wtf: init_stack();
-
-    notify(mips32_restore_user_o32);
-
-    notify(func);
-
-    mips32_irq_context_t *context = (mips32_irq_context_t *)get_stack_top() - 1;
-
-    /* Set user mode */
-    //context->status = ST_FR | ST_KX | ST_SX | ST_UX | ST_U | ST_EXL | ST_IE;
-    context->status = ST_UM | ST_EXL | ST_IE;
-}
diff --git a/kernel/src/glue/v4-mips32/timer.cc b/kernel/src/glue/v4-mips32/timer.cc
deleted file mode 100644
index 6ab5144f..00000000
--- a/kernel/src/glue/v4-mips32/timer.cc
+++ /dev/null
@@ -1,118 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/timer.cc
- * Description:   MIPS32 CP0 Timer implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.cc,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-
-#include INC_API(schedule.h)
-
-#include INC_GLUE(timer.h)
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(syscalls.h)
-
-#include INC_ARCH(cp0regs.h)
-
-
-timer_t timer;
-
-unsigned timer_interrupt;
-
-static u64_t ticks_passed;
-
-
-extern "C" SYS_CLOCK() {
-    //printf("SysClock returns %x %x\n", (word_t)(ticks_passed >> 32), (word_t)(ticks_passed & 0xffffffff) );
-    return_clock( ticks_passed );
-}
-
-
-extern "C" void handle_timer_interrupt(word_t irq, mips32_irq_context_t* frame) {
-
-    u32_t compare = (u32_t)read_32bit_cp0_register(CP0_COMPARE);
-    u32_t counter = (u32_t)read_32bit_cp0_register(CP0_COUNT);
-    u32_t difference;
-
-    u32_t pmclach;
-    timer_interrupt = 1;
-	
-    if( EXPECT_TRUE( counter > compare ) ) {
-        difference = counter - compare;
-        pmclach = difference / TIMER_PERIOD + 1;
-    }
-    else if( counter < compare ) {
-        difference = (u32_t)0xffffffff - compare + 1 + counter;
-        pmclach = difference / TIMER_PERIOD + 1;
-    }
-    else {
-        //difference = 1;
-        pmclach = 1;
-    }
-	
-    ticks_passed += pmclach;
-    compare += pmclach * TIMER_PERIOD;
-    ASSERT( compare > counter );
-    write_32bit_cp0_register (CP0_COMPARE, compare);
-
-    while( 1 ) {
-        counter = (u32_t)read_32bit_cp0_register(CP0_COUNT);
-        if( counter > compare ) {
-            compare += TIMER_PERIOD;
-            ticks_passed++;
-            write_32bit_cp0_register (CP0_COMPARE, compare);
-        }
-        else {
-            break;
-        }
-    }
-
-    //u32_t counter = (u32_t)read_32bit_cp0_register(CP0_COUNT);
-    //timer_interrupt = 1;
-    //write_32bit_cp0_register (CP0_COMPARE, counter + TIMER_PERIOD);
-    //MAGIC_BREAKPOINT;
-	
-    get_current_scheduler()->handle_timer_interrupt();
-}
-
-
-void SECTION (".init") timer_t::init_global(void) {
-
-    get_interrupt_ctrl()->register_interrupt_handler(7, handle_timer_interrupt);
-}
-
-
-void SECTION (".init") timer_t::init_cpu(void) {
-
-    write_32bit_cp0_register(CP0_COUNT, 0);
-    write_32bit_cp0_register(CP0_COMPARE, TIMER_PERIOD );
-    ticks_passed = 0;
-
-    get_interrupt_ctrl()->unmask(7);
-}
diff --git a/kernel/src/glue/v4-mips32/timer.h b/kernel/src/glue/v4-mips32/timer.h
deleted file mode 100644
index f3719938..00000000
--- a/kernel/src/glue/v4-mips32/timer.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/timer.h
- * Description:   MIPS32 timer
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.h,v 1.1 2006/02/23 21:07:40 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__TIMER_H__
-#define __GLUE__V4_MIPS32__TIMER_H__
-
-#include <timer.h>
-
-class timer_t : public generic_periodic_timer_t {
-  public:
-    void init_global();
-    void init_cpu();
-    u32_t compare;
-};
-
-INLINE timer_t * get_timer() {
-    extern timer_t timer;
-    return &timer;
-}
-
-#endif /* !__GLUE__V4_MIPS32__TIMER_H__ */
diff --git a/kernel/src/glue/v4-mips32/user.S b/kernel/src/glue/v4-mips32/user.S
deleted file mode 100644
index 11096ca5..00000000
--- a/kernel/src/glue/v4-mips32/user.S
+++ /dev/null
@@ -1,65 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/user.S
- * Description:   User space system call entry points for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: user.S,v 1.1 2006/02/23 21:07:46 ud3 Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(regdef.h)
-#include INC_GLUE(syscalls.h)
-
-#define SYSCALL(name)               \
-.section    .user.##name, "ax";	    \
-BEGIN_PROC(user_##name);	    \
-    li	v0, SYSCALL_##name;	    \
-    syscall;			    \
-    j	ra;			    \
-END_PROC(user_##name);		    \
-.previous
-
-#define SYSCALL_UNIMPLEMENTED(name) \
-.section    .user.##name, "ax";	    \
-BEGIN_PROC(user_##name);	    \
-    j	ra;			    \
-END_PROC(user_##name);		    \
-.previous
-
-SYSCALL(ipc)
-SYSCALL(thread_switch)
-SYSCALL(thread_control)
-SYSCALL(exchange_registers)
-SYSCALL(schedule)
-SYSCALL(unmap)
-SYSCALL(space_control)
-SYSCALL(processor_control)
-SYSCALL(memory_control)
-SYSCALL(system_clock)
-
-SYSCALL_UNIMPLEMENTED(lipc)
-
diff --git a/kernel/src/glue/v4-mips32/utcb.h b/kernel/src/glue/v4-mips32/utcb.h
deleted file mode 100644
index 09018fe7..00000000
--- a/kernel/src/glue/v4-mips32/utcb.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-mips32/utcb.h
- * Description:   UTCBs for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: utcb.h,v 1.3 2006/10/20 16:30:30 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS32__UTCB_H__
-#define __GLUE__V4_MIPS32__UTCB_H__
-
-#include INC_API(types.h)
-#include INC_API(thread.h)
-
-class utcb_t {
-
-public:
-    
-    bool allocate(threadid_t tid);
-    void free();
-
-public:
-	
-    threadid_t          my_global_id;           /* 0 */
-    word_t              processor_no;           /* 4 */
-    word_t              user_defined_handle;    /* 8 */ 
-    threadid_t          pager;                  /* 12 */ 
-    threadid_t          exception_handler;      /* 16 */ 
-    
-    u8_t                preempt_flags;          /* 20 */ 
-    u8_t                cop_flags;              /* 21 */ 
-    u16_t				__reserved0;			/* 22 */
-	
-    timeout_t           xfer_timeout;           /* 24 */ 
-    word_t              error_code;             /* 28 */ 
-    threadid_t          intended_receiver;      /* 32 */ 
-    threadid_t          virtual_sender;         /* 36 */  
-
-    word_t				__padding0[6];			/* 40 */
-    
-    word_t              mr[IPC_NUM_MR];         /* 64 .. 320 */
-    word_t              br[IPC_NUM_BR];         /* 320 .. 452 */
-    
-    word_t              __padding1[15];         /* 452 .. 512 */
-	
-public:
-    void set_my_global_id(threadid_t tid);
-    word_t get_user_defined_handle();
-    void set_user_defined_handle(word_t handle);
-    threadid_t get_pager();
-    void set_pager(threadid_t tid);
-    threadid_t get_exception_handler();
-    void set_exception_handler(threadid_t tid);
-    u8_t get_preempt_flags();
-    void set_preempt_flags(u8_t flags);
-    u8_t get_cop_flags();
-    word_t get_error_code();
-    void set_error_code(word_t err);
-    timeout_t get_xfer_timeout();
-    threadid_t get_intended_receiver();
-    threadid_t get_virtual_sender();
-    void set_virtual_sender(threadid_t tid);
-
-}__attribute__((packed));
-
-#include INC_API(generic-utcb.h)
-
-/**
- * try to allocate a UTCB and mark it as used
- * @param tid the global ID of the associated thread
- * @return true on success, false if UTCB is already allocated
- */
-INLINE bool utcb_t::allocate(threadid_t tid)
-{
-    UNIMPLEMENTED();
-    return false;
-
-    // do something magic, like:
-    //   touch *this and check whether it worked
-    //   mark it as used, maybe by writing the global it into it
-    //return result;
-}
-
-/**
- * mark a UTCB as free
- */
-INLINE void utcb_t::free()
-{
-    UNIMPLEMENTED();
-    
-    //this->my_global_id = NILTHREAD;
-}
-
-#endif /* !__GLUE__V4_MIPS32__UTCB_H__ */
diff --git a/kernel/src/glue/v4-mips64/Makeconf b/kernel/src/glue/v4-mips64/Makeconf
deleted file mode 100644
index 3fb643f4..00000000
--- a/kernel/src/glue/v4-mips64/Makeconf
+++ /dev/null
@@ -1,19 +0,0 @@
-
-SOURCES+= src/glue/v4-mips64/space.cc \
-	  src/glue/v4-mips64/thread.cc \
-	  src/glue/v4-mips64/exception.cc \
-	  src/glue/v4-mips64/init.cc \
-	  src/glue/v4-mips64/intctrl.cc \
-	  src/glue/v4-mips64/timer.cc \
-	  src/glue/v4-mips64/tlb.cc \
-	  src/glue/v4-mips64/smp.cc \
-	  src/glue/v4-mips64/resources.cc \
-	  src/glue/v4-mips64/memcontrol.cc \
-	  src/glue/v4-mips64/syscalls.S \
-	  src/glue/v4-mips64/fastpath.S \
-	  src/glue/v4-mips64/traps.S \
-	  src/glue/v4-mips64/user.S
-
-SOURCES+=       src/generic/linear_ptab_walker.cc \
-                src/generic/mapping_alloc.cc \
-                src/generic/mapping.cc
diff --git a/kernel/src/glue/v4-mips64/asmsyms.cc b/kernel/src/glue/v4-mips64/asmsyms.cc
deleted file mode 100644
index 790d6038..00000000
--- a/kernel/src/glue/v4-mips64/asmsyms.cc
+++ /dev/null
@@ -1,52 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/asmsyms.cc
- * Description:   Various asm definitions for mips64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asmsyms.cc,v 1.4 2003/09/24 19:05:36 skoglund Exp $
- *                
- ********************************************************************/
-#include <mkasmsym.h>
-
-#include INC_API(tcb.h)
-#include INC_GLUE(space.h)
-#include INC_GLUE(config.h)
-#include INC_GLUE(context.h)
-
-/* Mips64 defines */
-MKASMSYM (MIPS64_SWITCH_STACK_SIZE, sizeof(mips64_switch_stack_t));
-MKASMSYM (UTCB_MR_OFFSET, (word_t) ((utcb_t *) 0)->mr);
-MKASMSYM (ASM_KTCB_MASK, KTCB_MASK);
-MKASMSYM (ASM_KTCB_BITS, KTCB_BITS);
-MKASMSYM (ASM_KTCB_SIZE, KTCB_SIZE);
-MKASMSYM (ASM_KTCB_AREA_START, KTCB_AREA_START);
-//MKASMSYM (SWITCH_STACK_RA, offsetof(alpha_switch_stack_t, ra));
-//
-MKASMSYM( TSTATE_RUNNING, (word_t) thread_state_t::running );
-MKASMSYM( TSTATE_WAITING_FOREVER, (word_t) thread_state_t::waiting_forever );
-MKASMSYM( TSTATE_POLLING, (word_t) thread_state_t::polling);
-
-MKASMSYM (SPACE_ASID_OFFSET, (word_t) &((space_t *) 0)->asid);
diff --git a/kernel/src/glue/v4-mips64/config.h b/kernel/src/glue/v4-mips64/config.h
deleted file mode 100644
index 631cda44..00000000
--- a/kernel/src/glue/v4-mips64/config.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/config.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.17 2004/12/02 00:06:19 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_MIPS64__CONFIG_H__
-#define __GLUE__V4_MIPS64__CONFIG_H__
-
-#include INC_API(config.h)
-#include INC_ARCH(page.h)
-
-/**
- * Size of a kernel TCB in bytes
- */
-#define KTCB_SIZE	4096
-#define KTCB_BITS       12
-#define KTCB_MASK       (~((1 << KTCB_BITS) - 1))
-
-#define UTCB_SIZE       1024
-#define UTCB_BITS       10
-#define UTCB_MASK       (~((1 << UTCB_BITS) - 1))
-
-
-/**
-   attributes for system call functions
-   @param x is the name of the system call lacking the leading sys_ .
-   This makes it possible to place every system call in its own section
-   if required. Default is empty.
- */
-#define KIP_SYSCALL(x)          ((word_t) (x) - (word_t) &kip)
-
-/*
- * Values for Kernel Interface Page (KIP).
- */
-#if CONFIG_MIPS64_LITTLE_ENDIAN
-  #define KIP_API_FLAGS	{endian:0, word_size:1} /* 64-bit, little endian */
-#else
-  #define KIP_API_FLAGS	{SHUFFLE2(endian:1, word_size:1)} /* 64-bit, big endian */
-#endif
-
-
-/*
- * minimum size of UTCB area and number of UTCBs in this
- */
-/* 8 byte aligned, 1KB size, 4KB area size */
-#define KIP_UTCB_INFO		{SHUFFLE3(multiplier:1, alignment:UTCB_BITS, size:MIPS64_PAGE_BITS)}
-
-/*
- * size of kernel interface page
- */
-#define KIP_KIP_AREA	{size:MIPS64_PAGE_BITS}   /* 4KB */
-
-
-#define KIP_ARCH_PAGEINFO {SHUFFLE2(rwx:3, size_mask:\
-						HW_VALID_PGSIZES >> 10)}
-
-
-/* Shared */
-
-/* VALID_THREADNO_BITS:
- *  As Simon says, Somewhat arbitrary ... just give them 1 top level PT..
- * Perhaps we should define this more intelligently. 
- *  eg. half the size of the XKSEG (mappings fit there too??)
- */
-#define VALID_THREADNO_BITS	(TOPLEVEL_PT_BITS - KTCB_BITS)
-#define VALID_THREADNO_MASK	((1ul << VALID_THREADNO_BITS)-1)
-#define KTCB_AREA_SIZE		(1UL << (KTCB_BITS + VALID_THREADNO_BITS))
-#define KTCB_AREA_START		AS_XKSEG_START
-#define KTCB_AREA_END		(KTCB_AREA_START + KTCB_AREA_SIZE - 1)
-
-#define COPY_AREA_START		(AS_CKSEG3_START)
-#define COPY_AREA_SIZE		(AS_CKSEG3_SIZE)
-#define COPY_AREA_END		(COPY_AREA_START + COPY_AREA_SIZE - 1)
-
-#define CPU_AREA_START		(AS_CKSSEG_START)
-#define CPU_AREA_SIZE		(64*1024)
-#define CPU_AREA_END		(CPU_AREA_START + CPU_AREA_SIZE)
-
-#define USER_AREA_START		AS_XKUSEG_START
-#define USER_AREA_END		AS_XKUSEG_END
-
-#define ROOT_UTCB_START		(1UL << 32)
-#define ROOT_KIP_START		(1UL << 33)
-
-#define CACHE_LINE_SIZE		(CONFIG_MIPS64_CACHE_LINE_SIZE)
-
-/* Number of usec in a timer tick. NB CONFIG_CPU_CLOCK_SPEED in kHz!! */
-#ifdef CONFIG_PLAT_SB1
-# define TIMER_PERIOD		(CONFIG_CPU_CLOCK_SPEED*2)
-#else
-# define TIMER_PERIOD		(CONFIG_CPU_CLOCK_SPEED)
-#endif
-/* This works because:
- * 500 ints/sec,
- * CPU_CLOCK_SPEED/2 timer ticks/sec
- * PERIOD = (CPU_CLOCK_SPEED/2)/500
- *	  = CPU_CLOCK_SPEED/1000
- *	  = CONFIG_CPU_CLOCK (kHz)
- */
-
-#define TIMER_TICK_LENGTH	(2000) /* usec */
-
-#endif /* !__GLUE__V4_MIPS64__CONFIG_H__ */
diff --git a/kernel/src/glue/v4-mips64/context.h b/kernel/src/glue/v4-mips64/context.h
deleted file mode 100644
index c32d4e8d..00000000
--- a/kernel/src/glue/v4-mips64/context.h
+++ /dev/null
@@ -1,425 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/context.h
- * Description:   Various context management classes
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: context.h,v 1.26 2004/12/02 00:05:27 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_MIPS64__CONTEXT_H__
-#define __GLUE__V4_MIPS64__CONTEXT_H__
-
-#include INC_PLAT(config.h)
-
-#if !defined(ASSEMBLY)
-
-#include <asid.h>
-
-/* These functions deal with switching to a thread (and saving its context), and
- * the associated notification functions */
-
-extern "C" void mips64_return_from_notify0 (void);
-extern "C" void mips64_return_from_notify1 (void);
-extern "C" void mips64_return_from_notify2 (void);
-extern "C" void mips64_return_to_user (void);
-
-class mips64_switch_stack_t {
-public:
-    word_t  s0; /* 0 */
-    word_t  s1; /* 8 */
-    word_t  s8; /* 16 */
-    word_t  gp; /* 24 */
-    word_t  ra; /* 32 */
-};
-
-#define MIPS64_SWITCH_STACK_SIZE (5*8)
-
-/* must match #defines below */
-class mips64_irq_context_t
-{
-public:
-    word_t	epc;    /*-0 -*/
-    word_t	sp;	/* 8  */ 
-    word_t	status; /* 16 */
-    word_t	ra;     /* 24 */
-    word_t	v0;	/*-32-*/
-    word_t	v1;     /* 40 */
-    word_t	a1;     /* 48 */
-    word_t	cause;  /* 56 */
-    word_t	a2;     /*-64-*/
-    word_t	a3;	/* 72 */
-    word_t	t9;     /* 80 */
-    word_t	a0;     /* 88 */
-    word_t	gp;     /*-96-*/
-    word_t	at;     /* 104 */
-    word_t	t0;     /* 112 */
-    word_t	t1;     /* 120 */
-    word_t	hi;     /*-128-*/
-    word_t	t2;     /* 136 */
-    word_t	t3;     /* 144 */
-    word_t	lo;     /* 152 */
-    word_t	t4;     /*-160-*/
-    word_t	t5;     /* 168 */
-    word_t	t6;     /* 176 */
-    word_t	t7;     /* 184 */
-    word_t	t8;     /*-192-*/
-    word_t	s0;     /* 200 */
-    word_t	s1;     /* 208 */
-    word_t	s2;     /* 216 */
-    word_t	s3;     /*-224-*/
-    word_t	s4;     /* 232 */
-    word_t	s5;     /* 240 */
-    word_t	s6;     /* 248 */
-    word_t	s7;     /*-256-*/
-    word_t	s8;     /* 264 */
-    word_t	badvaddr;   /* 272 */
-    word_t	x1;	/* 280 */   /* fills to make frame cache aligned */
-};
-
-#else
-
-/* Context save / restore : check, this is cache optimised */
-
-#include INC_ARCH(regdef.h)
-#include INC_ARCH(mipsregs.h)
-
-/**** Switch ****/
-
-/* If changing this, modify class above */
-#define SAVE_SWITCH_STACK			\
-/* Save the Callee-saved registers:	*/	\
-/* s0..s2 ($16..$18)			*/	\
-/* gp     ($28)				*/	\
-/* s8     ($30)                         */	\
-/* ra     ($31)				*/	\
-    dsubu   sp, sp, MIPS64_SWITCH_STACK_SIZE;	\
-    sd	    s0, 0(sp);				\
-    sd	    s1, 8(sp);				\
-    sd	    s8, 16(sp);				\
-    sd	    gp, 24(sp);				\
-    sd	    ra, 32(sp);
-
-#define RESTORE_SWITCH_STACK			\
-    ld	    ra, 32(sp);				\
-    ld	    s0, 0(sp);				\
-    ld	    s1, 8(sp);				\
-    ld	    s8, 16(sp);				\
-    ld	    gp, 24(sp);				\
-    daddu   sp, sp, MIPS64_SWITCH_STACK_SIZE;
-
-/**** Full Context ****/
-
-#define PT_EPC		0
-#define PT_SP		8
-#define PT_STATUS	16
-#define PT_RA		24
-#define PT_V0		32
-#define PT_V1		40
-#define PT_A1		48
-#define PT_CAUSE	56
-#define PT_A2		64
-#define PT_A3		72
-#define PT_T9		80
-#define PT_A0		88
-#define PT_GP		96
-#define PT_AT		104
-#define PT_T0		112
-#define PT_T1		120
-#define PT_HI		128
-#define PT_T2		136
-#define PT_T3		144
-#define PT_LO		152
-#define PT_T4		160
-#define PT_T5		168
-#define PT_T6		176
-#define PT_T7		184
-#define PT_T8		192
-#define PT_S0		200
-#define PT_S1		208
-#define PT_S2		216
-#define PT_S3		224
-#define PT_S4		232
-#define PT_S5		240
-#define PT_S6		248
-#define PT_S7		256
-#define PT_S8		264
-#define PT_BADVADDR	272
-#define PT_X1		280
-
-#define PT_SIZE		288
-
-#define	SAVE_ALL_INT			\
-	.set	push;			\
-	.set	reorder;		\
-	.set	noat;			\
-	mfc0	k1, CP0_STATUS;		/* get STATUS register k1 */	\
-	li	k0, 0xffffffffffffffe0;	/* clear IE, EXL, ERL, KSU */	\
-	and	k0, k0, k1;		\
-	mtc0	k0, CP0_STATUS;		/* Enter kernel mode */		\
-	andi	k0, k1, ST_KSU;		/* Isolate KSU bits */		\
-					\
-	.set	noreorder;		\
-	beq	k0, zero, 8f;		/* Branch if from KERNEL mode */	\
-	lui	k0, %hi(K_STACK_BOTTOM);	\
-	.set	reorder;			\
-	sd	t2, %lo(K_TEMP2)(k0);		\
-	sd	t0, %lo(K_TEMP0)(k0);		\
-	sd	t1, %lo(K_TEMP1)(k0);		\
-	sd	t3, %lo(K_TEMP3)(k0);		\
-	sd	t4, %lo(K_TEMP4)(k0);		\
-						\
-	dmfc0	t2, CP0_EPC;			\
-	mfc0	t3, CP0_CAUSE;			\
-	dmfc0	t4, CP0_BADVADDR;		\
-	ld	t0, %lo(K_STACK_BOTTOM)(k0);	/* Load saved stack */	\
-	move	t1, k1;				\
-	sd	t1, PT_STATUS-PT_SIZE(t0);	/* Save status */	\
-	sd	sp, PT_SP-PT_SIZE(t0);		/* Save old stack */	\
-	sd	t2, PT_EPC-PT_SIZE(t0);		/* Save EPC */		\
-	sd	t3, PT_CAUSE-PT_SIZE(t0);	/* Save CAUSE */	\
-	sd	t4, PT_BADVADDR-PT_SIZE(t0);	/* Save BADVADDR */	\
-	dsub	sp, t0, PT_SIZE;		/* New stack pointer */	\
-	lui	k0, %hi(K_STACK_BOTTOM);	\
-	ld	t0, %lo(K_TEMP0)(k0);		\
-	ld	t1, %lo(K_TEMP1)(k0);		\
-	ld	t2, %lo(K_TEMP2)(k0);		\
-	ld	t3, %lo(K_TEMP3)(k0);		\
-	ld	t4, %lo(K_TEMP4)(k0);		\
-	b	9f;				\
-8:;						\
-	sd	t3, %lo(K_TEMP3)(k0);		\
-	sd	t2, %lo(K_TEMP2)(k0);		\
-	sd	t1, %lo(K_TEMP1)(k0);		\
-	sd	t0, %lo(K_TEMP0)(k0);		\
-	lui	t2, 0x8000;			\
-	and	t1, sp, t2;			\
-	beq	t1, t2, 7f;			\
-	li	t2, 4;				\
-	dsll	t2, 60;				\
-	and	t1, sp, t2;			\
-	beq	t1, t2, 7f;			\
-	li	AT, 2;				\
-	break;					\
-7:						\
-	dmfc0	t2, CP0_EPC;			\
-	mfc0	t3, CP0_CAUSE;			\
-	dmfc0	t0, CP0_BADVADDR;		\
-	move	t1, k1;				\
-	sd	t1, PT_STATUS-PT_SIZE(sp);	/* Save status */	\
-	sd	t3, PT_CAUSE-PT_SIZE(sp);	/* Save CAUSE */	\
-	sd	sp, PT_SP-PT_SIZE(sp);		/* Save old stack */	\
-	sd	t0, PT_BADVADDR-PT_SIZE(sp);	/* Save BADVADDR */	\
-	dsub	sp, sp, PT_SIZE;		/* New stack pointer */	\
-	sd	t2, PT_EPC(sp);			/* Save EPC */		\
-	lui	k0, %hi(K_STACK_BOTTOM);	\
-	ld	t0, %lo(K_TEMP0)(k0);		\
-	ld	t1, %lo(K_TEMP1)(k0);		\
-	ld	t2, %lo(K_TEMP2)(k0);		\
-	ld	t3, %lo(K_TEMP3)(k0);		\
-9:;					\
-	sd	ra, PT_RA(sp);		\
-	sd	v0, PT_V0(sp);		\
-	sd	v1, PT_V1(sp);		\
-	sd	a1, PT_A1(sp);		\
-	sd	a2, PT_A2(sp);		\
-	sd	a3, PT_A3(sp);		\
-	sd	t9, PT_T9(sp);		\
-	sd	a0, PT_A0(sp);		\
-	sd	gp, PT_GP(sp);		\
-	sd	$1, PT_AT(sp);		\
-	.set	at;			\
-	mfhi	v0;			\
-	sd	t0, PT_T0(sp);		\
-	sd	t1, PT_T1(sp);		\
-	sd	v0, PT_HI(sp);		\
-	mflo	v1;			\
-	sd	t2, PT_T2(sp);		\
-	sd	t3, PT_T3(sp);		\
-	sd	v1, PT_LO(sp);		\
-	sd	t4, PT_T4(sp);		\
-	sd	t5, PT_T5(sp);		\
-	sd	t6, PT_T6(sp);		\
-	sd	t7, PT_T7(sp);		\
-	sd	t8, PT_T8(sp);		\
-	sd	s0, PT_S0(sp);		\
-	sd	s1, PT_S1(sp);		\
-	sd	s2, PT_S2(sp);		\
-	sd	s3, PT_S3(sp);		\
-	sd	s4, PT_S4(sp);		\
-	sd	s5, PT_S5(sp);		\
-	sd	s6, PT_S6(sp);		\
-	sd	s7, PT_S7(sp);		\
-	sd	s8, PT_S8(sp);
-
-#define	SAVE_ALL_XTLB		\
-	.set	push;		\
-	.set	reorder;	\
-	.set	noat;		\
-	la	sp, XTLB_REFILL_STACK_end - PT_SIZE;	/* Static stack */	\
-	sd	ra, PT_RA(sp);	\
-	sd	k0, PT_X1(sp);	/* Save UTCB in k0 */		\
-	sd	k1, PT_SP(sp);	/* Save old stack in k1 */	\
-	dmfc0	k0, CP0_EPC;	\
-	sd	v0, PT_V0(sp);	\
-	sd	k0, PT_EPC(sp);	\
-	sd	v1, PT_V1(sp);	\
-	mfc0	k0, CP0_CAUSE;	\
-	sd	a1, PT_A1(sp);	\
-	sd	a2, PT_A2(sp);	\
-	sd	k0, PT_CAUSE(sp);	\
-	sd	a3, PT_A3(sp);	\
-	sd	t9, PT_T9(sp);	\
-	sd	a0, PT_A0(sp);	\
-	sd	gp, PT_GP(sp);	\
-	sd	$1, PT_AT(sp);	\
-	.set	at;		\
-	mfhi	v0;		\
-	sd	t0, PT_T0(sp);	\
-	sd	t1, PT_T1(sp);	\
-	sd	v0, PT_HI(sp);	\
-	mflo	v1;		\
-	sd	t2, PT_T2(sp);	\
-	sd	t3, PT_T3(sp);	\
-	sd	v1, PT_LO(sp);	\
-	sd	t4, PT_T4(sp);	\
-	sd	t5, PT_T5(sp);	\
-	sd	t6, PT_T6(sp);	\
-	sd	t7, PT_T7(sp);	\
-	sd	t8, PT_T8(sp);	\
-	sd	s0, PT_S0(sp);	\
-	sd	s1, PT_S1(sp);	\
-	sd	s2, PT_S2(sp);	\
-	sd	s3, PT_S3(sp);	\
-	sd	s4, PT_S4(sp);	\
-	sd	s5, PT_S5(sp);	\
-	sd	s6, PT_S6(sp);	\
-	sd	s7, PT_S7(sp);	\
-	sd	s8, PT_S8(sp);
-
-#define RESTORE_ALL		\
-	.set	push;		\
-	.set	reorder;	\
-	ld	a2, PT_A2(sp);	\
-	ld	a3, PT_A3(sp);	\
-	ld	t9, PT_T9(sp);	\
-	ld	a0, PT_A0(sp);	\
-	ld	gp, PT_GP(sp);	\
-	.set	noat;		\
-	ld	$1, PT_AT(sp);	\
-	ld	t0, PT_T0(sp);	\
-	ld	t1, PT_T1(sp);	\
-	ld	s0, PT_HI(sp);	\
-	ld	t2, PT_T2(sp);	\
-	ld	t3, PT_T3(sp);	\
-	ld	s1, PT_LO(sp);	\
-	mthi	s0;		\
-	ld	t4, PT_T4(sp);	\
-	ld	t5, PT_T5(sp);	\
-	ld	t6, PT_T6(sp);	\
-	mtlo	s1;		\
-	ld	t7, PT_T7(sp);	\
-	ld	t8, PT_T8(sp);	\
-	ld	s0, PT_S0(sp);	\
-	ld	s1, PT_S1(sp);	\
-	ld	s2, PT_S2(sp);	\
-	ld	s3, PT_S3(sp);	\
-	ld	s4, PT_S4(sp);	\
-	ld	s5, PT_S5(sp);	\
-	ld	s6, PT_S6(sp);	\
-	ld	s7, PT_S7(sp);	\
-	ld	s8, PT_S8(sp);	\
-	\
-	mfc0	a1, CP0_STATUS;	/* Status in v1 */	\
-	ld	v1, PT_EPC(sp);	/* is out of order bad for cache? (still same cache line?) */\
-	ld	v0, PT_STATUS(sp);	\
-	/* XXX - NOTE, Status register updates are not ATOMIC!!!, Interrupt Mask bits can change */ \
-	ori	a1, a1, ST_EXL; /* set Exception Level */	\
-	mtc0	a1, CP0_STATUS;	/* to disable interrupts, we now can set EPC */		\
-	li	ra, CONFIG_MIPS64_STATUS_MASK; /* compute new status register */	\
-	\
-	and	a1, ra, a1;	\
-	nor	ra, zero, ra;	\
-	and	v0, ra, v0;	\
-	ld	ra, PT_RA(sp);	\
-	or	k1, a1, v0;	\
-	dmtc0	v1, CP0_EPC;	/* restore EPC */	\
-	ld	v0, PT_V0(sp);	\
-	dsrl	k0, sp, 12;	\
-	ld	v1, PT_V1(sp);	\
-	ld	a1, PT_A1(sp);	\
-	ld	sp, PT_SP(sp);	/* restore stack */	\
-	mtc0	k1, CP0_STATUS;	/* new status value */	\
-	dsll	k0, k0, 12;	/* Get TCB pointer */	\
-	ld	k0, OFS_TCB_MYSELF_LOCAL(k0);	/* Load UTCB into k0 */	\
-	nop
-
-
-#define RESTORE_XTLB		\
-	.set	push;		\
-	.set	reorder;	\
-	ld	a2, PT_A2(sp);	\
-	ld	a3, PT_A3(sp);	\
-	ld	t9, PT_T9(sp);	\
-	ld	a0, PT_A0(sp);	\
-	ld	gp, PT_GP(sp);	\
-	.set	noat;		\
-	ld	$1, PT_AT(sp);	\
-	ld	t0, PT_T0(sp);	\
-	ld	t1, PT_T1(sp);	\
-	ld	s0, PT_HI(sp);	\
-	ld	t2, PT_T2(sp);	\
-	ld	t3, PT_T3(sp);	\
-	ld	s1, PT_LO(sp);	\
-	mthi	s0;		\
-	ld	t4, PT_T4(sp);	\
-	ld	t5, PT_T5(sp);	\
-	ld	t6, PT_T6(sp);	\
-	mtlo	s1;		\
-	ld	t7, PT_T7(sp);	\
-	ld	t8, PT_T8(sp);	\
-	ld	s0, PT_S0(sp);	\
-	ld	s1, PT_S1(sp);	\
-	ld	s2, PT_S2(sp);	\
-	ld	s3, PT_S3(sp);	\
-	ld	s4, PT_S4(sp);	\
-	ld	s5, PT_S5(sp);	\
-	ld	s6, PT_S6(sp);	\
-	ld	s7, PT_S7(sp);	\
-	ld	s8, PT_S8(sp);	\
-	\
-	ld	a1, PT_EPC(sp);	\
-	ld	v0, PT_V0(sp);	\
-	dmtc0	a1, CP0_EPC;	/* restore EPC */   \
-	ld	v1, PT_V1(sp);	\
-	ld	ra, PT_RA(sp);	\
-	ld	a1, PT_A1(sp);	\
-	ld	k0, PT_X1(sp);	/* Restore UTCB in k0 */	\
-	ld	sp, PT_SP(sp);	/* restore stack */
-
-#endif
-
-#endif /* __GLUE__V4_MIPS64__CONTEXT_H__ */
diff --git a/kernel/src/glue/v4-mips64/exception.cc b/kernel/src/glue/v4-mips64/exception.cc
deleted file mode 100644
index 3b64f38e..00000000
--- a/kernel/src/glue/v4-mips64/exception.cc
+++ /dev/null
@@ -1,557 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- * Copyright (C) 2003,  National ICT Australia
- *                
- * File path:     glue/v4-mips64/exception.cc
- * Description:   Mips64 exception handling
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: exception.cc,v 1.37 2005/07/12 07:35:45 cgray Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(tcb.h)
-#include INC_API(schedule.h)
-#include INC_API(kernelinterface.h)
-#include INC_API(syscalls.h)
-#include INC_GLUE(context.h)
-#include INC_GLUE(syscalls.h)
-#include INC_GLUE(exception.h)
-
-#include <kdb/tracepoints.h>
-#ifdef CONFIG_DEBUG
-#include <kdb/console.h>
-#endif
-
-DECLARE_TRACEPOINT(EXCEPTION_IPC_SYSCALL);
-DECLARE_TRACEPOINT(EXCEPTION_IPC_GENERAL);
-
-extern "C" void mips64_exception(mips64_irq_context_t *context);
-
-#define GENERIC_SAVED_REGISTERS (EXCEPT_IPC_GEN_MR_NUM+1)
-
-static bool send_exception_ipc( word_t exc_no, word_t exc_code, mips64_irq_context_t *context )
-{
-    tcb_t *current = get_current_tcb();
-    if( current->get_exception_handler().is_nilthread() )
-    {
-	return false;
-    }
-
-    TRACEPOINT (EXCEPTION_IPC_GENERAL,
-		printf ("EXCEPTION_IPC_GENERAL: (%p) exc_no %d, exc_code %016lx, IP = %p\n",
-			current, exc_no, exc_code, (word_t)current->get_user_ip()));
-
-    // Save message registers on the stack
-    word_t saved_mr[GENERIC_SAVED_REGISTERS];
-    msg_tag_t tag;
-
-    // Save message registers.
-    for( int i = 0; i < GENERIC_SAVED_REGISTERS; i++ )
-	saved_mr[i] = current->get_mr(i);
-    current->set_saved_partner( current->get_partner() );
-    current->set_saved_state( current->get_state() );
-
-    // Create the message tag.
-    tag.set( 0, EXCEPT_IPC_GEN_MR_NUM, EXCEPT_IPC_GEN_LABEL);
-    current->set_tag( tag );
-
-    // Create the message.
-    current->set_mr( EXCEPT_IPC_GEN_MR_IP, (word_t)current->get_user_ip() );
-    current->set_mr( EXCEPT_IPC_GEN_MR_SP, (word_t)current->get_user_sp() );
-    current->set_mr( EXCEPT_IPC_GEN_MR_FLAGS, (word_t)current->get_user_flags() |
-			    (context->cause & CAUSE_BD ? 1 : 0) );
-    current->set_mr( EXCEPT_IPC_GEN_MR_EXCEPTNO, exc_no );
-    current->set_mr( EXCEPT_IPC_GEN_MR_ERRORCODE, exc_code );
-    current->set_mr( EXCEPT_IPC_GEN_MR_LOCALID, current->get_local_id().get_raw() );
-
-    // For fast path, we need to indicate that we are doing exception ipc
-    current->resources.set_exception_ipc( current );
-
-    // Deliver the exception IPC.
-    tag = current->do_ipc( current->get_exception_handler(),
-	    current->get_exception_handler(), timeout_t::never() );
-
-    current->resources.clear_exception_ipc( current );
-
-    // Alter the user context if necessary.
-    if( !tag.is_error() )
-    {
-	current->set_user_ip( (addr_t)current->get_mr(EXCEPT_IPC_GEN_MR_IP) );
-	current->set_user_sp( (addr_t)current->get_mr(EXCEPT_IPC_GEN_MR_SP) );
-	current->set_user_flags( current->get_mr(EXCEPT_IPC_GEN_MR_FLAGS) );
-    }
-    else
-	printf( "Unable to deliver user exception: IPC error.\n" );
-
-    // Clean-up.
-    for( int i = 0; i < GENERIC_SAVED_REGISTERS; i++ )
-	current->set_mr( i, saved_mr[i] );
-
-    current->set_partner( current->get_saved_partner() );
-    current->set_saved_partner( NILTHREAD );
-    current->set_state( current->get_saved_state() );
-    current->set_saved_state( thread_state_t::aborted );
-
-    return !tag.is_error();
-}
-
-extern "C" word_t sys_clock(void)
-{
-    return get_current_scheduler()->get_current_time();
-}
-
-extern "C" bool mips64_break(mips64_irq_context_t *context)
-{
-    switch (context->at) {
-    /* Debug functions */
-#if defined(CONFIG_DEBUG)
-    case L4_TRAP_KPUTC:	    putc((char)context->a0);	break;
-    case L4_TRAP_KGETC:	    context->v0 = getc(true);	break;
-    case L4_TRAP_KGETC_NB:  context->v0 = getc(false);	break;
-    case L4_TRAP_KDEBUG: {
-	pgent_t * pg;
-	pgent_t::pgsize_e pgsize;
-	space_t * space = get_current_tcb ()->get_space();
-	if (space == NULL)
-	    space = get_kernel_space();
-
-	if (EXPECT_TRUE(get_kip()->kdebug_entry == NULL))
-	    return false;
-
-	printf( TXT_BRIGHT "--- KD# " );
-	if (context->status & ST_KSU)
-	    printf( "<User> " );
-
-	if ( (!(context->status & ST_KSU)) ||
-	    (space->lookup_mapping((addr_t)context->v0, &pg, &pgsize)) )
-	{
-	    printf( "%s ", (char*)context->v0 );
-	}
-
-	printf( "---\n" TXT_NORMAL );
-
-	get_kip()->kdebug_entry(context);
-	break;
-	}
-#ifdef CONFIG_CPU_MIPS64_SB1
-    case L4_TRAP_READ_PERF:
-	context->a0 = mips_cpu::get_cp0_perf_control0();
-	context->a1 = mips_cpu::get_cp0_perf_counter0();
-	context->a2 = mips_cpu::get_cp0_perf_control1();
-	context->a3 = mips_cpu::get_cp0_perf_counter1();
-	context->t0 = mips_cpu::get_cp0_perf_control2();
-	context->t1 = mips_cpu::get_cp0_perf_counter2();
-	context->t2 = mips_cpu::get_cp0_perf_control3();
-	context->t3 = mips_cpu::get_cp0_perf_counter3();
-	break;
-    case L4_TRAP_WRITE_PERF:
-	switch(context->a0) {
-	case 0: mips_cpu::set_cp0_perf_control0(context->a1); break;
-	case 1: mips_cpu::set_cp0_perf_counter0(context->a1); break;
-	case 2: mips_cpu::set_cp0_perf_control1(context->a1); break;
-	case 3: mips_cpu::set_cp0_perf_counter1(context->a1); break;
-	case 4: mips_cpu::set_cp0_perf_control2(context->a1); break;
-	case 5: mips_cpu::set_cp0_perf_counter2(context->a1); break;
-	case 6: mips_cpu::set_cp0_perf_control3(context->a1); break;
-	case 7: mips_cpu::set_cp0_perf_counter3(context->a1); break;
-	default:
-	    return false;
-	}
-	break;
-#endif
-#endif
-    default:
-	return false;
-    }
-    ASSERT(!(context->cause & CAUSE_BD));
-
-    context->epc += 4;
-    return true;	    // Succesfully handled
-}
-
-static word_t get_reg(mips64_irq_context_t *context, word_t num)
-{
-    switch (num)
-    {
-    case 0: return 0;
-    case 1: return context->at; case 2: return context->v0;
-    case 3: return context->v1; case 4: return context->a0;
-    case 5: return context->a1; case 6: return context->a2;
-    case 7: return context->a3; case 8: return context->t0;
-    case 9: return context->t1; case 10: return context->t2;
-    case 11: return context->t3; case 12: return context->t4;
-    case 13: return context->t5; case 14: return context->t6;
-    case 15: return context->t7; case 16: return context->s0;
-    case 17: return context->s1; case 18: return context->s2;
-    case 19: return context->s3; case 20: return context->s4;
-    case 21: return context->s5; case 22: return context->s6;
-    case 23: return context->s7; case 24: return context->t8;
-    case 25: return context->t9; case 28: return context->gp;
-    case 29: return context->sp; case 30: return context->s8;
-    case 31: return context->ra;
-    default:
-	   printf("Read k-register\n"); 
-    }
-    return 0;
-}
-
-static void set_reg(mips64_irq_context_t *context, word_t num, word_t val)
-{
-    switch (num)
-    {
-    case 0: return;
-    case 1: context->at = val; break; case 2: context->v0 = val; break;
-    case 3: context->v1 = val; break; case 4: context->a0 = val; break;
-    case 5: context->a1 = val; break; case 6: context->a2 = val; break;
-    case 7: context->a3 = val; break; case 8: context->t0 = val; break;
-    case 9: context->t1 = val; break; case 10: context->t2 = val; break;
-    case 11: context->t3 = val; break; case 12: context->t4 = val; break;
-    case 13: context->t5 = val; break; case 14: context->t6 = val; break;
-    case 15: context->t7 = val; break; case 16: context->s0 = val; break;
-    case 17: context->s1 = val; break; case 18: context->s2 = val; break;
-    case 19: context->s3 = val; break; case 20: context->s4 = val; break;
-    case 21: context->s5 = val; break; case 22: context->s6 = val; break;
-    case 23: context->s7 = val; break; case 24: context->t8 = val; break;
-    case 25: context->t9 = val; break; case 28: context->gp = val; break;
-    case 29: context->sp = val; break; case 30: context->s8 = val; break;
-    case 31: context->ra = val; break;
-    default:
-	printf("Write k-register\n");
-    }
-}
-
-typedef struct {
-    union {
-	u32_t raw;
-	struct {
-	    s32_t offset : 16;
-	    u32_t rt : 5;
-	    u32_t base : 5;
-	    u32_t op : 6;
-	} x;
-    };
-} load_instr;
-
-static struct {
-    word_t address;
-    word_t space;
-} llval;
-
-extern "C" bool mips64_illegal(mips64_irq_context_t *context, word_t* code)
-{
-    if (context->at == MAGIC_KIP_REQUEST)
-    {
-	//TRACEF("KernelInterface() at %p\n", context->epc);
-        space_t * space = get_current_space ();
-    
-	context->t0 = (u64_t) space->get_kip_page_area ().get_base ();
-	context->t1 = get_kip ()->api_version;
-	context->t2 = get_kip ()->api_flags;
-	context->t3 = (NULL != get_kip()->kernel_desc_ptr) ?
-		    *(word_t *)((word_t)get_kip() + get_kip()->kernel_desc_ptr) : 0;
-    }
-    else
-    {
-	pgent_t * pg;
-	pgent_t::pgsize_e pgsize;
-
-	space_t::access_e access = space_t::read;
-
-	/* Check for emulated instructions */
-	load_instr op = *(load_instr *)context->epc;
-	*code = *(u32_t *)context->epc;
-
-	switch(op.x.op)    /* Get instruction Op */
-	{
-	case 0x38:  /* SC   Store Conditional Word	*/
-	case 0x3c:  /* SCD  Store Conditional Double	*/
-	    access = space_t::write;
-	case 0x30:  /* LL   Load Linked Word		*/
-	case 0x34:  /* LLD  Load Linked Double		*/
-	    break;
-	default:
-	    return false;
-	}
-
-	word_t address = get_reg(context, op.x.base) + op.x.offset;
-
-	space_t * space = get_current_tcb ()->get_space();
-	if(space == NULL)
-	    space = get_kernel_space();
-
-	// Check if address exists in page table and is writeable if needed
-	while (!space->lookup_mapping ((addr_t)address, &pg, &pgsize) ||
-	      ((access == space_t::write) && (!pg->is_writable(space, pgsize))))
-	{
-	    space->handle_pagefault ((addr_t)address, (addr_t)context->epc, access, false);
-	}
-
-	addr_t paddr = pg->address (space, pgsize);
-	paddr = addr_offset (paddr, address & page_mask (pgsize));
-
-	word_t align = 0x3;
-	// Word access is properly aligned?
-	switch(op.x.op)    /* Get instruction Op */
-	{
-	case 0x34:  /* LLD  Load Linked Double		*/
-	case 0x3c:  /* SCD  Store Conditional Double	*/
-	    align = 0x7;
-	    break;
-	}
-	if (address & align)
-	{
-	    /* Fake an exception frame */
-	    mips64_irq_context_t *old = context;
-	    context--;
-	    context->cause = (old->cause & ~CAUSE_EXCCODE) | (space_t::write ? (5<<2) : (4<<2));
-	    context->epc = old->epc;
-	    context->badvaddr = address;
-	    mips64_exception(context);
-	    context++;
-	}
-
-	switch(op.x.op)    /* Get instruction Op */
-	{
-	case 0x30:  /* LL   Load Linked Word		*/
-	    llval.address = (word_t)paddr; llval.space = (word_t)space;
-	    set_reg(context, op.x.rt, *(s32_t *)address); break;
-	case 0x34:  /* LLD  Load Linked Double		*/
-	    llval.address = (word_t)paddr; llval.space = (word_t)space;
-	    set_reg(context, op.x.rt, *(word_t *)address); break;
-	case 0x38:  /* SC   Store Conditional Word	*/
-	    if ((llval.address == (word_t)paddr)&&(llval.space == (word_t)space))
-	    {
-		*(u32_t *)address = (u32_t)get_reg(context, op.x.rt);
-		set_reg(context, op.x.rt, 1);
-	    } else
-	    {
-		set_reg(context, op.x.rt, 0);
-	    }
-	    break;
-	case 0x3c:  /* SCD  Store Conditional Double	*/
-	    if ((llval.address == (word_t)paddr)&&(llval.space == (word_t)space))
-	    {
-		*(word_t *)address = get_reg(context, op.x.rt);
-		set_reg(context, op.x.rt, 1);
-	    } else
-	    {
-		set_reg(context, op.x.rt, 0);
-	    }
-	    break;
-	}
-    }
-    ASSERT(!(context->cause & CAUSE_BD));
-
-    context->epc += 4;
-    return true;	    // Succesfully handled
-}
-
-extern "C" bool mips64_watch(mips64_irq_context_t *context, word_t *code)
-{
-    /* Kernel should check if kdb wants this exception */
-    return false;
-}
-
-extern "C" bool mips64_cpu_unavail(mips64_irq_context_t *context, word_t *code)
-{
-    /* Check if it is a Floating Point unavailable exception */
-    if (CAUSE_CE_NUM(context->cause) == 1)
-    {
-        tcb_t *current_tcb = get_current_tcb();
-	ASSERT(context->status & ST_KSU);
-
-	current_tcb->resources.mips64_fpu_unavail_exception( current_tcb, context );
-        return true;
-    }
-
-    *code = CAUSE_CE_NUM(context->cause);
-    return false;
-}
-
-INLINE void halt_user_thread( void )
-{
-    tcb_t *current = get_current_tcb();
-
-    current->set_state( thread_state_t::halted );
-    current->switch_to_idle();
-}
-
-extern "C" void mips64_exception(mips64_irq_context_t *context)
-{
-    char * exception = NULL;
-    bool result = false;
-    word_t exc_no = CAUSE_EXCCODE_NUM(context->cause);
-    word_t exc_code = 0;
-
-    switch (exc_no) {
-	case 4:  exception = "Address error (load/execute)";
-		 exc_code = context->badvaddr;			break;
-	case 5:  exception = "Address error (store)";
-		 exc_code = context->badvaddr;			break;
-	case 6:	 exception = "Bus error (instruction fetch)";	break;
-	case 7:	 exception = "Bus error (data load/store)";	break;
-	case 9:  exception = "Breakpoint";
-		 result = mips64_break(context);		break;
-	case 10: exception = "Illegal instruction";
-		 result = mips64_illegal(context, &exc_code);	break;
-	case 11: exception = "Coprocessor unavailable";
-		 result = mips64_cpu_unavail(context, &exc_code); break;
-	case 12: exception = "Arithmetic overflow";		break;
-	case 13: exception = "Trap exception";			break;
-	case 14: exception = "Virtual coherency exception (instruction)"; break;
-	case 15: exception = "Floating point exception";	break;
-	case 18: exception = "Coprocessor 2 exception";		break;
-	case 22: exception = "MDMX Unusable";			break;
-	case 23: exception = "Watchpoint";
-		 result = mips64_watch(context, &exc_code);	break;
-	case 24: exception = "Machine check";			break;
-	case 30: exception = "Cache error in debug mode";	break;
-	case 31: exception = "Virtual coherency exception (data)"; break;
-	default: break;
-    }
-
-    if (result == false) {
-	if (!send_exception_ipc(exc_no, exc_code, context)) {
-
-	    if( EXPECT_FALSE(get_kip()->kdebug_entry != NULL) )
-	    {
-		printf( TXT_BRIGHT "--- KD# Unhandled Exception [");
-		if (exception)
-		    printf( "%s", exception );
-		else
-		    printf( "%d", exc_no );
-		printf( "] ---\n" TXT_NORMAL );
-
-		get_kip()->kdebug_entry(context);
-	    }
-
-	    halt_user_thread();
-	}
-    }
-}
-
-#define SYSCALL_SAVED_REGISTERS (EXCEPT_IPC_SYS_MR_NUM+1)
-
-static bool send_syscall_ipc( mips64_irq_context_t *context )
-{
-    tcb_t *current = get_current_tcb();
-    if( current->get_exception_handler().is_nilthread() )
-    {
-	printf( "Unable to deliver user exception: no exception handler.\n" );
-	return false;
-    }
-
-    TRACEPOINT (EXCEPTION_IPC_SYSCALL,
-		printf ("EXCEPTION_IPC_SYSCALL: (%p) IP = %p, v0 = 0x%016lx\n",
-			current, (word_t)current->get_user_ip(), context->v0));
-
-    // Save message registers on the stack
-    word_t saved_mr[SYSCALL_SAVED_REGISTERS];
-    msg_tag_t tag;
-
-    // Save message registers.
-    for( int i = 0; i < SYSCALL_SAVED_REGISTERS; i++ )
-	saved_mr[i] = current->get_mr(i);
-    current->set_saved_partner( current->get_partner() );
-    current->set_saved_state( current->get_state() );
-
-    // Create the message tag.
-    tag.set( 0, EXCEPT_IPC_SYS_MR_NUM, EXCEPT_IPC_SYS_LABEL);
-    current->set_tag( tag );
-
-    // Create the message.
-    current->set_mr( EXCEPT_IPC_SYS_MR_V0, context->v0 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_V1, context->v1 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A0, context->a0 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A1, context->a1 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A2, context->a2 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A3, context->a3 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A4, context->t0 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A5, context->t1 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A6, context->t2 );
-    current->set_mr( EXCEPT_IPC_SYS_MR_A7, context->t3 );
-
-    current->set_mr( EXCEPT_IPC_SYS_MR_IP, (word_t)current->get_user_ip() );
-    current->set_mr( EXCEPT_IPC_SYS_MR_SP, (word_t)current->get_user_sp() );
-    current->set_mr( EXCEPT_IPC_SYS_MR_FLAGS, (word_t)current->get_user_flags() |
-			    (context->cause & CAUSE_BD ? 1 : 0));
-
-    // For fast path, we need to indicate that we are doing exception ipc
-    current->resources.set_exception_ipc( current );
-
-    // Deliver the exception IPC.
-    tag = current->do_ipc( current->get_exception_handler(),
-	    current->get_exception_handler(), timeout_t::never() );
-
-    current->resources.clear_exception_ipc( current );
-
-    // Alter the user context if necessary.
-    if( !tag.is_error() )
-    {
-	current->set_user_ip( (addr_t)current->get_mr( EXCEPT_IPC_SYS_MR_IP ) );
-	current->set_user_sp( (addr_t)current->get_mr( EXCEPT_IPC_SYS_MR_SP ) );
-	current->set_user_flags( current->get_mr(EXCEPT_IPC_SYS_MR_FLAGS) );
-
-	context->v0 = current->get_mr( EXCEPT_IPC_SYS_MR_V0 );
-	context->v1 = current->get_mr( EXCEPT_IPC_SYS_MR_V1 );
-	context->a0 = current->get_mr( EXCEPT_IPC_SYS_MR_A0 );
-	context->a1 = current->get_mr( EXCEPT_IPC_SYS_MR_A1 );
-	context->a2 = current->get_mr( EXCEPT_IPC_SYS_MR_A2 );
-	context->a3 = current->get_mr( EXCEPT_IPC_SYS_MR_A3 );
-	context->t0 = current->get_mr( EXCEPT_IPC_SYS_MR_A4 );
-	context->t1 = current->get_mr( EXCEPT_IPC_SYS_MR_A5 );
-	context->t2 = current->get_mr( EXCEPT_IPC_SYS_MR_A6 );
-	context->t3 = current->get_mr( EXCEPT_IPC_SYS_MR_A7 );
-    }
-    else {
-	printf( "Unable to deliver user exception: IPC error.\n" );
-    }
-
-    // Clean-up.
-    for( int i = 0; i < SYSCALL_SAVED_REGISTERS; i++ )
-	current->set_mr( i, saved_mr[i] );
-
-    current->set_partner( current->get_saved_partner() );
-    current->set_saved_partner( NILTHREAD );
-    current->set_state( current->get_saved_state() );
-    current->set_saved_state( thread_state_t::aborted );
-
-    return !tag.is_error();
-}
-
-extern "C" void syscall_exception(mips64_irq_context_t *context)
-{
-    if (!send_syscall_ipc(context))
-    {
-	if (EXPECT_FALSE(get_kip()->kdebug_entry != NULL))
-	{
-	    printf( TXT_BRIGHT "--- KD# %s ---\n" TXT_NORMAL, "Unhandled User SYSCALL" );
-
-	    get_kip()->kdebug_entry(context);
-	}
-	halt_user_thread();
-    }
-}
diff --git a/kernel/src/glue/v4-mips64/exception.h b/kernel/src/glue/v4-mips64/exception.h
deleted file mode 100644
index 1cb6d385..00000000
--- a/kernel/src/glue/v4-mips64/exception.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002-2003, University of New South Wales
- *
- * File path:	glue/v4-mips64/exception.h
- * Description:	Exception IPC message definitions.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: exception.h,v 1.3 2004/12/02 00:04:57 cvansch Exp $
- *
- ***************************************************************************/
-
-#ifndef __GLUE__V4_MIPS64__EXCEPTION_H__
-#define __GLUE__V4_MIPS64__EXCEPTION_H__
-
-/*
- * Generic exception message format
- * All exceptions not handled by the kernel or other exception
- * message.
- */
-
-#define EXCEPT_IPC_GEN_MR_IP		1
-#define EXCEPT_IPC_GEN_MR_SP		2
-#define EXCEPT_IPC_GEN_MR_FLAGS		3
-#define EXCEPT_IPC_GEN_MR_EXCEPTNO	4
-#define EXCEPT_IPC_GEN_MR_ERRORCODE	5
-#define EXCEPT_IPC_GEN_MR_LOCALID	6
-#define EXCEPT_IPC_GEN_MR_NUM		6
-
-#define EXCEPT_IPC_GEN_LABEL		(-5ul << 4)
-#define EXCEPT_IPC_GEN_TAG		((EXCEPT_IPC_GEN_LABEL << 16) | EXCEPT_IPC_GEN_MR_NUM)
-
-/*
- * System call exception
- * System calls not handled by L4 are redirected via system call exception IPC
- */
-
-#define EXCEPT_IPC_SYS_MR_IP		1
-#define EXCEPT_IPC_SYS_MR_SP		2
-#define EXCEPT_IPC_SYS_MR_FLAGS		3
-#define EXCEPT_IPC_SYS_MR_V0		4
-#define EXCEPT_IPC_SYS_MR_V1		5
-#define EXCEPT_IPC_SYS_MR_A0		6
-#define EXCEPT_IPC_SYS_MR_A1		7
-#define EXCEPT_IPC_SYS_MR_A2		8
-#define EXCEPT_IPC_SYS_MR_A3		9
-#define EXCEPT_IPC_SYS_MR_A4		10
-#define EXCEPT_IPC_SYS_MR_A5		11
-#define EXCEPT_IPC_SYS_MR_A6		12
-#define EXCEPT_IPC_SYS_MR_A7		13
-#define EXCEPT_IPC_SYS_MR_NUM		13
-
-#define EXCEPT_IPC_SYS_LABEL		(-5ul << 4)
-#define EXCEPT_IPC_SYS_TAG		((EXCEPT_IPC_SYS_LABEL << 16) | EXCEPT_IPC_SYS_MR_NUM)
-
-#endif /* __GLUE__V4_MIPS64__EXCEPTION_H__ */
diff --git a/kernel/src/glue/v4-mips64/fastpath.S b/kernel/src/glue/v4-mips64/fastpath.S
deleted file mode 100644
index 663738dc..00000000
--- a/kernel/src/glue/v4-mips64/fastpath.S
+++ /dev/null
@@ -1,580 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/fastpath.S
- * Created:       20/08/2002 by Carl van Schaik
- * Description:   Kernel entry points for syscalls
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fastpath.S,v 1.17 2004/12/01 23:53:19 cvansch Exp $
- *
- ********************************************************************/
-
-#if CONFIG_IPC_FASTPATH
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(regdef.h)
-#include INC_GLUE(context.h)
-#include INC_GLUE(syscalls.h)
-#include <asmsyms.h>
-#include <tcb_layout.h>
-
-
-#if 0
-#define	START_SYSCALL_COUNTER	    \
-	mfc0	k0, CP0_COUNT;	    \
-	nop;			    \
-	nop;			    \
-	mtc0	k0, CP0_ERROREPC
-
-#if CONFIG_PLAT_SB1
-#define STOP_SYSCALL_COUNTER	    \
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	mfc0	t2, CP0_COUNT;	    \
-	mfc0	t3, CP0_ERROREPC;   \
-	nop;	\
-	nop;	\
-	dsub	AT, t2, t3
-#else
-#define STOP_SYSCALL_COUNTER	    \
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	mfc0	t2, CP0_COUNT;	    \
-	mfc0	t3, CP0_ERROREPC;   \
-	nop;	\
-	nop;	\
-	dsub	AT, t2, t3;	    \
-	dsll	AT, AT, 1;
-#endif
-
-#if CONFIG_PLAT_ERPCN01
-#define d0 k0
-#define d1 k1
-#define PRINT_SYSCALL_TIMES	\
-	li	t2, 28;		\
-1:;	\
-	dsrlv	t3, AT, t2;	\
-	andi	t3, 0xf;	\
-	sub	t3, 10;		\
-	bgez	t3, 2f;		\
-	add	t3, '0'+10;	\
-	b 3f;			\
-2:;	\
-	add	t3, 'a';	\
-3:;	\
-	dla     d0, propane_uart;   \
-	ld	d0, 0(d0);	\
-4:;	\
-	lw      d1,8(d0);	\
-	andi    d1,d1,0xf;	\
-	sltiu   d1,d1,13;	\
-	beqz    d1,4b;		\
-	sw      t3,4(d0);	\
-	sub	t2, 4;		\
-	bgez	t2, 1b;		\
-	\
-	li	t3, '\r';	\
-4:;	\
-	lw      d1,8(d0);	\
-	andi    d1,d1,0xf;	\
-	sltiu   d1,d1,13;	\
-	beqz    d1,4b;		\
-	sw      t3,4(d0);	\
-	li	t3, '\n';	\
-4:;	\
-	lw      d1,8(d0);	\
-	andi    d1,d1,0xf;	\
-	sltiu   d1,d1,13;	\
-	beqz    d1,4b;		\
-	sw      t3,4(d0)
-
-#endif
-
-#if CONFIG_PLAT_U4600
-#define CS1_BASE		0x1c800000
-#define Z85230_BASE		(CS1_BASE | 0x30)
-#define MPSC_BASE		Z85230_BASE
-#define PHYS_TO_CKSEG1(n)	(CKSEG1 | (n))
-#define PHYS_TO_K1(x)		PHYS_TO_CKSEG1(x)
-#define U4600_PORT0		PHYS_TO_K1(MPSC_BASE+2)
-#define zRR0_TXEMPTY		0004
-
-/* print a single character to the serial port  (k1) */
-#define U4600_PUTC					\
-	/* wait for device to become ready */		\
-1:	dla	k0, U4600_PORT0;			\
-	lb	k0, 0(k0);				\
-	andi	k0, zRR0_TXEMPTY;			\
-	beqz	k0, 1b;					\
-							\
-	/* transmit by writing to the second byte */	\
-	dla     k0, U4600_PORT0;			\
-	sb      k1, 1(k0);				\
-	sync
-
-
-#define PRINT_SYSCALL_TIMES	\
-	li	t2, 28;		\
-1:;	\
-	dsrlv	k1, AT, t2;	\
-	andi	k1, 0xf;	\
-	sub	k1, 10;		\
-	bgez	k1, 2f;		\
-	add	k1, '0'+10;	\
-	b 3f;			\
-2:;	\
-	add	k1, 'a';	\
-3:;	\
-4:	dla	k0, U4600_PORT0;			\
-	lb	k0, 0(k0);				\
-	andi	k0, zRR0_TXEMPTY;			\
-	beqz	k0, 4b;					\
-							\
-	/* transmit by writing to the second byte */	\
-	dla     k0, U4600_PORT0;			\
-	sb      k1, 1(k0);				\
-	sync;			\
-	sub	t2, 4;		\
-	bgez	t2, 1b;		\
-	\
-	li	k1, '\n';	\
-4:	dla	k0, U4600_PORT0;			\
-	lb	k0, 0(k0);				\
-	andi	k0, zRR0_TXEMPTY;			\
-	beqz	k0, 4b;					\
-							\
-	/* transmit by writing to the second byte */	\
-	dla     k0, U4600_PORT0;			\
-	sb      k1, 1(k0);				\
-	sync
-#endif
-
-#if CONFIG_PLAT_SB1
-#define CKSEG1      0xffffffffa0000000
-#define PHYS_TO_CKSEG1(n)     (CKSEG1 | (n))
-#define DUART_PHYS		0x0010060000
-#define DUART_PHYS_SIZE		0x100
-#define DUART_STATUS            0x120
-#define DUART_TX_HOLD		0x170
-#define DUART_TX_RDY		(1<<2)
-
-#define DUART_REG(chan,r)	(DUART_PHYS_SIZE*(chan) + (r))
-#define DUART_REG_PHYS(chan,r)	(DUART_PHYS + DUART_REG(chan,r))
-
-#define PRINT_SYSCALL_TIMES	\
-	li	t2, 28;		\
-1:;	\
-	dsrlv	k1, AT, t2;	\
-	andi	k1, 0xf;	\
-	sub	k1, 10;		\
-	bgez	k1, 2f;		\
-	add	k1, '0'+10;	\
-	b 3f;			\
-2:;	\
-	add	k1, 'a';	\
-3:;	\
-4:	dla	k0, PHYS_TO_CKSEG1(DUART_REG_PHYS(0,DUART_STATUS));			\
-	ld	k0, 0(k0);				\
-	andi	k0, DUART_TX_RDY;			\
-	beqz	k0, 4b;					\
-							\
-	/* transmit by writing to the second byte */	\
-	dla     k0, PHYS_TO_CKSEG1(DUART_REG_PHYS(0,DUART_TX_HOLD));			\
-	sd      k1, 0(k0);				\
-	sub	t2, 4;		\
-	bgez	t2, 1b;		\
-	\
-	li	k1, '\r';	\
-4:	dla	k0, PHYS_TO_CKSEG1(DUART_REG_PHYS(0,DUART_STATUS));			\
-	ld	k0, 0(k0);				\
-	andi	k0, DUART_TX_RDY;			\
-	beqz	k0, 4b;					\
-							\
-	/* transmit by writing to the second byte */	\
-	dla     k0, PHYS_TO_CKSEG1(DUART_REG_PHYS(0,DUART_TX_HOLD));			\
-	sd      k1, 0(k0);	\
-	li	k1, '\n';	\
-4:	dla	k0, PHYS_TO_CKSEG1(DUART_REG_PHYS(0,DUART_STATUS));			\
-	ld	k0, 0(k0);				\
-	andi	k0, DUART_TX_RDY;			\
-	beqz	k0, 4b;					\
-							\
-	/* transmit by writing to the second byte */	\
-	dla     k0, PHYS_TO_CKSEG1(DUART_REG_PHYS(0,DUART_TX_HOLD));			\
-	sd      k1, 0(k0)
-#endif
-
-#else
-#define	START_SYSCALL_COUNTER
-#define STOP_SYSCALL_COUNTER
-#define PRINT_SYSCALL_TIMES
-#endif
-
-	.set noat
-	.set noreorder
-BEGIN_PROC(__mips64_interrupt_fp)
-	START_SYSCALL_COUNTER
-	mfc0    k1, CP0_CAUSE			/* get interrupt cause */
-	li	k0, 8<<2
-	andi    k1, k1, 0x7c
-	bne	k0, k1, other_exception		/* If not SYSCALL, goto normal path */
-	mfc0	k0, CP0_STATUS			/* get STATUS register */
-	li	$1, SYSCALL_ipc
-	bne	v0, $1, _goto_mips64_l4syscall	/* if not IPC goto normal syscall entry */
-	lui     t5, %hi(K_STACK_BOTTOM)		/* Load kernel stack base address */
-
-	j	_mips64_fastpath
-	move	t7, k0
-
-_goto_mips64_l4syscall:
-	j _mips64_l4syscall
-	nop
-	
-other_exception:
-	dsll    k1, k1, 1
-	lui	k0, %hi(exception_handlers)
-	add	k0, k0, k1
-	ld      k0, %lo(exception_handlers)(k0)
-	jr      k0
-	nop
-END_PROC(__mips64_interrupt_fp)
-
-/* Pistachio defines */
-
-#define to_tid	    a0
-#define from_tid    a1 
-#define timeout	    a2
-#define current	    a3
-#define to_tcb	    t0
-#define from_tcb    t1
-#define to_state    t2
-#define dest_partner	t3
-#define current_global	v0
-
-#define tmp0	    t4
-#define tmp1	    t5
-#define tmp2	    t6
-#define tmp3	    t7
-#define tmp4	    t8
-#define tmp5	    t9
-#define tmp6	    t3
-
-#define mr0	    v1
-#define mr1	    s0
-#define mr2	    s1
-#define mr3	    s2
-#define mr4	    s3
-#define mr5	    s4
-#define mr6	    s5
-#define mr7	    s6
-#define mr8	    s7
-
-	.set reorder
-BEGIN_PROC(_mips64_fastpath)
-	.set noat
-	srl	t6, t7, 5		/* clear IE, EXL, ERL, KSU */
-	move	t4, sp
-	sll	t6, t6, 5
-	mtc0	t6, CP0_STATUS		/* Enter kernel mode */
-
-	ld	sp, %lo(K_STACK_BOTTOM)(t5)	/* Load saved stack */
-	dmfc0   t6, CP0_EPC
-
-	sd	ra, PT_RA-PT_SIZE(sp)	/* Save RA */
-	sd	t7, PT_STATUS-PT_SIZE(sp) /* Save status */
-	sd	t4, PT_SP-PT_SIZE(sp)	/* Save stack */
-
-	daddu	t6, t6, 4		/* Calc New EPC */
-	dsubu	sp, sp, PT_SIZE		/* New stack pointer */
-
-	dli	tmp4, -4096		/* tcb mask */		/* CALC2 */
-	sd	t6, PT_EPC(sp)		/* Save EPC */
-
-/*** START FASTPATH ***/
-send_path:
-	.set	noreorder
-	/* Look for a nil from-tid / to-tid. */			/* TEST0 */
-	beqz	to_tid, _mips64_slowpath			/* TEST0 */
-	and	current, sp, tmp4	/* get current tcb */	/* CALC2 */
-
-	andi	tmp0, mr0, 0xffc0				/* TEST1 | Bits 15 through 6 should be zero for fast path in mr0 */
-
-	dsrl    tmp5, to_tid, 32	/* calculate to_tcb */	/* CALC1 */
-	li      to_tcb, 0x4					/* CALC1 */
-	dsll    tmp5, 12					/* CALC1 */
-	dsll    to_tcb, 60					/* CALC1 */
-	/* Check that the receive timeout is infinite */	/* TEST3 | (lower 16 timeout bits == 0) */
-	andi	tmp2, timeout, 0xffff				/* TEST3 */
-	or      to_tcb, tmp5, to_tcb				/* CALC1 */
-	/* We don't do typed words or propagation.*/		/* TEST1 */
-	bnez	tmp0, _mips64_slowpath				/* TEST1 */
-
-	/* Check if any resource bits are set */		/* TEST9 & TEST10 */
-	ld	tmp3, OFS_TCB_RESOURCE_BITS(to_tcb)		/* TEST9 */
-	ld	tmp0, OFS_TCB_RESOURCE_BITS(current)		/* TEST10 */
-
-	bnez	tmp3, _mips64_slowpath				/* TEST9 */
-	ld	tmp1, OFS_TCB_MYSELF_GLOBAL(to_tcb)		/* TEST4 */
-
-	bnez	tmp0, _mips64_slowpath				/* TEST10 */
-	ld	to_state, OFS_TCB_THREAD_STATE(to_tcb)		/* TEST5 */
-        /*
-	 * Check partner ID	CALC1, TEST4
-	 */
-
-	/* Check to_tcb->get_global_id == to_tid */		/* TEST4 */
-	bne	tmp1, to_tid, _mips64_slowpath			/* TEST4 | May be an error, may be just a receive etc. */
-
-	/*
-	 * Check partner is waiting				   TEST5
-	 */
-
-	/* is_waiting */
-#if ((TSTATE_WAITING_FOREVER != (0xffffffffffffffff)) && defined(__ASMSYMS_H__))  /* Don't let the preprocessor die due to no asmsyms */
-# error "expecting thread_state_t::waiting_forever to be -1ull"
-#endif
-	dli	tmp3, -1					/* TEST5 & TEST6 & TEST7 *
-	bnez	tmp2, _mips64_slowpath				/* TEST3 */
-	ld	dest_partner, OFS_TCB_PARTNER(to_tcb)		/* TEST6 */
-
-	bne	to_state, tmp3, _mips64_slowpath		/* TEST5 */
-	ld	current_global, OFS_TCB_MYSELF_GLOBAL(current)	/* TEST6 */
-
-	/* IS_WAITING_GLOBAL:   (tcb->get_partner() == current->get_global_id()) || tcb->get_partner().is_anythread() */
-	/* is_anythread() */					/* TEST6 */
-
-	beq	tmp3, dest_partner, 1f				/* TEST6 */
-	lui	ra, %hi(ipc_finish)				/* RA CALC */
-
-	/* tcb->get_partner() == current->get_global_id() */	/* TEST6 */
-	bne	current_global, dest_partner, _mips64_slowpath	/* TEST6 */
-
-#ifdef CONFIG_SMP
-        /* check that both threads are on the same CPU */
-1:	ld	tmp0, OFS_TCB_CPU(to_tcb)
-	ld	tmp1, OFS_TCB_CPU(current)
-	nop
-	bne	tmp0, tmp1, _mips64_slowpath
-	nop
-#else
-1:
-#endif
-	ld	tmp4, OFS_TCB_SPACE(to_tcb)			/* TEST11 - get: to_tcb->space */
-	andi	tmp5, mr0, 0x3f					/* TEST2 */ 
-	beqz	tmp4, _mips64_slowpath				/* TEST11 - Null space = interrupt thread */
-	sub	tmp5, 8						/* TEST2 */
-
-	/*
-	 * Check that receive phase blocks			   TEST7
-	 */
-	beq	to_tid, from_tid, 2f				/* Call ? */
-	daddiu	ra, %lo(ipc_finish)				/* RA CALC */
-
-	ld	tmp6, OFS_TCB_SEND_HEAD(current)		/* TEST8 | Require send_head to be empty */
-	nop
-	bnez	tmp6, _mips64_slowpath				/* TEST8 */
-	nop
-	bne	tmp3, from_tid, check_other_tcb			/* TEST7 */
-	nop
-2:
-
-// continue starts here
-	sd	tmp3, OFS_TCB_THREAD_STATE(current)		/* STORE1 */
-
-        /* FALLTHRU */
-continue_ipc:
-	/* This is the point of no return --- after this we cannot go to the slow path */
-
-	sd	from_tid, OFS_TCB_PARTNER(current)
-	blez	tmp5, switch_to					/* TEST2 */
-	sd	s8, PT_S8(sp)
-
-	ld	tmp0, OFS_TCB_UTCB(current)			/* tmp0 = current utcb */
-	sll	tmp2, tmp5, 3					/* number to copy * 8 */
-	ld	tmp1, OFS_TCB_UTCB(to_tcb)			/* tmp1 = to utcb */
-
-	andi	tmp6, tmp5, 1
-	daddu	tmp2, tmp2, tmp0
-
-	beqz	tmp6, 10f
-	ld	tmp3, 200(tmp0)
-	daddiu	tmp0, 8
-	daddiu	tmp1, 8
-	beq	tmp0, tmp2, switch_to 
-	sd	tmp3, 192(tmp1)
-copy_loop:
-	ld	tmp3, 200(tmp0)
-10:
-	ld	tmp6, 208(tmp0)
-	daddiu	tmp1, 16
-	daddiu	tmp0, 16
-	sd	tmp3, 184(tmp1)
-	bne	tmp0, tmp2, copy_loop
-	sd	tmp6, 192(tmp1)
-switch_to:
-
-	/*
-	 * Set thread state to waiting				   STORE1
-	 */
-
-/* mips switch_to */
-	/* At this point, we have set up the sending thread's TCB state.  We now setup the
-	 * stack so that when we are next switched to we do the right thing (set state to running
-	 * and return partner) --- this only happens in the generic send case.
-	 */
-	dsubu	sp, sp,	MIPS64_SWITCH_STACK_SIZE
-	lw	tmp1, SPACE_ASID_OFFSET(tmp4)	/* get: space->asid (assume no asid management) */
-
-	sd	ra, 32(sp)			/* RA CALC */
-
-	lui     tmp5, %hi(K_STACK_BOTTOM)	/* Load kernel stack base address */
-	sd	sp, OFS_TCB_STACK(current)	/* Store current stack in old_stack */
-
-	.set at
-	dmtc0	tmp1, CP0_ENTRYHI	/* Set new ASID */
-	daddiu	sp, to_tcb, 4096	/* STACK TOP CALC */
-	dsll	tmp4, tmp4, 32
-	sd	sp, %lo(K_STACK_BOTTOM)(tmp5)	/* Set current TCB */
-	dli	tmp0, TSTATE_RUNNING
-
-	dmtc0	tmp4, CP0_CONTEXT	/* Save current Page Table */
-
-	/* Mark self as runnable */
-	sd	tmp0, OFS_TCB_THREAD_STATE(to_tcb)
-
-	/* Set return value to sender's global ID (already in v0)*/
-
-	mfc0	t6, CP0_STATUS
-	ld	t7, PT_SP-PT_SIZE(sp)		/* load stack */
-	ori	t6, t6, ST_EXL		/* set Exception Level */
-	ld	t0, OFS_TCB_MYSELF_LOCAL(to_tcb)    /* Load UTCB */
-
-	/* Clean up mr0 (clear receive flags) */
-	and	mr0, ~(0xe << 12)
-
-	mtc0	t6, CP0_STATUS		/* to disable interrupts, we now can set EPC */
-	ld	t4, PT_STATUS-PT_SIZE(sp)	/* load status */
-	ld	t5, PT_EPC-PT_SIZE(sp)		/* load epc */
-	ld	ra, PT_RA-PT_SIZE(sp)		/* load ra */
-
-	.set	reorder
-
-	STOP_SYSCALL_COUNTER
-	PRINT_SYSCALL_TIMES
-
-	dmtc0	t5, CP0_EPC		/* restore EPC */ 
-	ld	s8, PT_S8-PT_SIZE(sp)		/* restore s8 */
-
-	dli	t3, CONFIG_MIPS64_STATUS_MASK
-	move	sp, t7			/* restore stack */
-	and	t6, t3, t6		/* compute new status register */
-	nor	t3, zero, t3
-	and	t4, t3, t4
-	or	t7, t6, t4		/*            " "              */
-	mtc0	t7, CP0_STATUS		/* new status value */
-	move	k0, t0			/* Load UTCB into k0 */
-nop
-	eret
-
-	.set	reorder
-ipc_finish:	/* Return Address */
-	dli	tmp0, -4096			/* tcb mask */
-	dli	tmp1, TSTATE_RUNNING
-	and	current, sp, tmp0		/* t5 = current tcb */
-
-	daddu	sp, current, 4096-PT_SIZE
-
-        /* first the state */
-	sd	tmp1, OFS_TCB_THREAD_STATE(current)
-
-	ld	v0, OFS_TCB_PARTNER(current)
-
-	j	_mips64_l4sysipc_return
-
-check_other_tcb:
-	.set	noreorder
-	beqz	from_tid, _mips64_slowpath
-        dsrl    tmp0, from_tid, 32                /* calculate from_tcb */
-	li      from_tcb, 0x4
-	dsll    tmp0, 12
-	dsll    from_tcb, 60
-	or      from_tcb, tmp0, from_tcb
-
-	/* Check global ID */
-	ld	tmp0, OFS_TCB_MYSELF_GLOBAL(from_tcb)
-	ld	tmp1, OFS_TCB_THREAD_STATE(from_tcb)
-	bne	tmp0, from_tid, _mips64_slowpath
-
-	/*
-	 * Check if the thread is polling us --- if so, go to slow path
-	 */
-
-	/* is_polling() */
-	li	tmp2, TSTATE_POLLING
-	bnel	tmp1, tmp2, continue_ipc	/* from_tcb isn't polling */
-	sd	tmp3, OFS_TCB_THREAD_STATE(current)		/* STORE1 */ /* from continue ipc */
-	
-	/* partner == current->global_id */
-	ld	tmp1, OFS_TCB_PARTNER(from_tcb)
-	beq	tmp1, current_global, _mips64_slowpath	/* If the other thread is polling us, goto the slowpath */
-
-	/* partner == current->local_id */
-	ld	tmp2, OFS_TCB_MYSELF_LOCAL(current)
-	bnel	tmp1, tmp2, continue_ipc
-	sd	tmp3, OFS_TCB_THREAD_STATE(current)		/* STORE1 */ /* from continue ipc */
-
-	j	_mips64_slowpath
-	nop
-
-END_PROC(_mips64_fastpath)
-
-	.set reorder
-BEGIN_PROC(_mips64_slowpath)
-	lui	ra, %hi(_mips64_l4sysipc_return)
-	ld	t5, OFS_TCB_UTCB(current)
-	daddiu	ra, %lo(_mips64_l4sysipc_return)
-	sd	s8, PT_S8(sp)
-	sd	mr0, 128(t5)
-	sd	mr1, 136(t5)
-	sd	mr2, 144(t5)
-	sd	mr3, 152(t5)
-	sd	mr4, 160(t5)
-	sd	mr5, 168(t5)
-	sd	mr6, 176(t5)
-	sd	mr7, 184(t5)
-	sd	mr8, 192(t5)
-	j	sys_ipc
-END_PROC(_mips64_slowpath)
-
-#endif /* CONFIG_IPC_FASTPATH */
-
diff --git a/kernel/src/glue/v4-mips64/fpage.h b/kernel/src/glue/v4-mips64/fpage.h
deleted file mode 100644
index 97f9f620..00000000
--- a/kernel/src/glue/v4-mips64/fpage.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-mips64/fpage.h
- * Description:   architecture specific flexpage declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fpage.h,v 1.3 2005/05/19 08:38:10 stoess Exp $
- *                
- ********************************************************************/
-
-
-#ifndef __GLUE__V4_MIPS64__FPAGE_H__
-#define __GLUE__V4_MIPS64__FPAGE_H__
-
-#include INC_API(generic-archfpage.h)
-
-#endif /* !__GLUE__V4_MIPS64__FPAGE_H__ */
diff --git a/kernel/src/glue/v4-mips64/hwspace.h b/kernel/src/glue/v4-mips64/hwspace.h
deleted file mode 100644
index a1b17baf..00000000
--- a/kernel/src/glue/v4-mips64/hwspace.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/hwspace.h
- * Description:   Conversion between kernel addrs and physical addrs 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: hwspace.h,v 1.5 2003/09/24 19:04:50 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_MIPS64__HWSPACE_H__
-#define __GLUE__V4_MIPS64__HWSPACE_H__
-
-#include <debug.h>
-#include INC_ARCH(types.h)
-#include INC_API(config.h)
-
-#include INC_ARCH(page.h)
-
-INLINE addr_t virt_to_phys(addr_t addr)
-{
-    ASSERT(addr >= (addr_t) AS_KSEG_START && addr < (addr_t) AS_KSEG_END);
-    return (addr_t) ((word_t) addr - AS_KSEG_START);
-}
-
-INLINE addr_t phys_to_virt(addr_t addr)
-{
-    return (addr_t) ((word_t) addr +  AS_KSEG_START);
-}
-
-INLINE addr_t tree_to_addr(addr_t addr)
-{
-    return (addr_t) ((((word_t) addr)&0x00FFFFFFFFFFFFFF)  | (AS_KSEG_START&0xFF00000000000000));
-}
-
-#endif /* __GLUE__V4_MIPS64__HWSPACE_H__ */
diff --git a/kernel/src/glue/v4-mips64/init.cc b/kernel/src/glue/v4-mips64/init.cc
deleted file mode 100644
index 0472b5f1..00000000
--- a/kernel/src/glue/v4-mips64/init.cc
+++ /dev/null
@@ -1,361 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     glue/v4-mips64/init.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: init.cc,v 1.23 2004/05/14 05:07:15 cvansch Exp $
- *                
- ********************************************************************/
-
-#include <mapping.h>
-
-#include INC_API(kernelinterface.h)
-#include INC_API(schedule.h)
-#include INC_API(space.h)
-
-#include INC_GLUE(memory.h)
-#include INC_GLUE(intctrl.h)
-#include INC_GLUE(timer.h)
-#include INC_ARCH(tlb.h)
-#include INC_API(syscalls.h)
-#include INC_GLUE(syscalls.h)
-#include INC_PLAT(cache.h)
-#include INC_API(processor.h)
-#ifdef CONFIG_SMP
-#include INC_GLUE(smp.h)
-#endif
-
-#define BOOTMEM_PAGES (CONFIG_BOOTMEM_PAGES)
-
-#ifdef CONFIG_SMP
-word_t plat_cpu_freq[CONFIG_SMP_MAX_CPUS], plat_bus_freq[CONFIG_SMP_MAX_CPUS];
-#else
-word_t plat_cpu_freq[1], plat_bus_freq[1];
-#endif
-
-static void SECTION (".init") dump_info(void)
-{
-    TRACE_INIT("Kernel configuration:\n");
-    TRACE_INIT("\tKTCB area: 0x%lx -> 0x%lx (0x%lx)\n", KTCB_AREA_START, KTCB_AREA_END, KTCB_AREA_SIZE);
-}
-
-static void SECTION (".init") init_cpu_cache(void)
-{
-    cache_t::init_cpu();
-}
-
-/*
- * Initialize kernel debugger with initial boot memory, and register
- * kernel memory in the kernel info page.
- */
-static void SECTION (".init") init_bootmem (void)
-{
-    word_t bootmem_size = BOOTMEM_PAGES<<MIPS64_PAGE_BITS;
-
-    extern char _bootstack_top[];
-    addr_t start_bootmem = (addr_t)(_bootstack_top);
-    addr_t start_bootmem_phys = virt_to_phys(start_bootmem);
-
-    if ((word_t)start_bootmem_phys < (word_t)get_kip()->sigma0.mem_region.high)
-	start_bootmem_phys = get_kip()->sigma0.mem_region.high;
-    if ((word_t)start_bootmem_phys < (word_t)get_kip()->sigma1.mem_region.high)
-	start_bootmem_phys = get_kip()->sigma1.mem_region.high;
-    if ((word_t)start_bootmem_phys < (word_t)get_kip()->root_server.mem_region.high)
-	start_bootmem_phys = get_kip()->root_server.mem_region.high;
-
-    start_bootmem = phys_to_virt(start_bootmem_phys);
-#ifdef CONFIG_SMP
-    // Define the area reserved for the exception vectors.
-    start_bootmem = phys_to_virt((addr_t)0x1900000);	// XXX - fix this properly
-#endif
-
-    addr_t end_bootmem = (addr_t)((word_t)start_bootmem + bootmem_size);
-    addr_t end_bootmem_phys = (addr_t)((word_t)start_bootmem_phys + bootmem_size);
-
-    kmem.init (start_bootmem, end_bootmem);
-
-    /* Register reservations in kernel info page. */
-    /* feed the kernel memory allocator */
-
-    // Define the user's virtual address space.
-    get_kip ()->memory_info.insert( memdesc_t::conventional, true,
-	    (addr_t)0, (addr_t)(1ULL<<CONFIG_MIPS64_ADDRESS_BITS));
-
-    /* Register reservations in kernel interface page. */
-    get_kip ()->memory_info.insert( memdesc_t::conventional, false, 
-	    (addr_t)MIPS64_PAGE_SIZE, addr_align (get_kip()->main_mem.high, KB(4)));
-    get_kip ()->memory_info.insert( memdesc_t::reserved, false, 
-	    addr_align_up (get_kip()->main_mem.high, KB(4)), (addr_t)~0UL);
-
-    get_kip ()->memory_info.insert (memdesc_t::reserved, false,
-		    addr_align (start_text_phys, KB(4)),
-		    addr_align_up (end_text_phys, KB (4)));
-
-    get_kip ()->memory_info.insert (memdesc_t::reserved, false,
-		    addr_align (start_bootmem_phys, KB(4)),
-		    addr_align_up (end_bootmem_phys, KB (4)));
-
-    // Define the area reserved for the exception vectors.
-    get_kip ()->memory_info.insert( memdesc_t::reserved, false, 
-	    (addr_t)0, (addr_t)MIPS64_PAGE_SIZE);
-
-#ifdef CONFIG_PLAT_ERPCN01
-    get_kip ()->dedicated_mem0.set ((addr_t)0x14000000, (addr_t)0x14001000);
-    get_kip ()->memory_info.insert( memdesc_t::dedicated, false, 
-	    (addr_t)0x14000000, (addr_t)0x14001000);
-#elif CONFIG_PLAT_U4600
-    get_kip ()->dedicated_mem0.set ((addr_t)0x10000000, (addr_t)0x14001000);
-    get_kip ()->memory_info.insert( memdesc_t::dedicated, false, 
-	    (addr_t)0x10000000, (addr_t)0x14001000);
-    get_kip ()->dedicated_mem1.set ((addr_t)0x1c000000, (addr_t)0x1cc00000);
-    get_kip ()->memory_info.insert( memdesc_t::dedicated, false, 
-	    (addr_t)0x1c000000, (addr_t)0x1cc00000);
-#elif CONFIG_PLAT_SB1
-#endif
-
-#ifdef CONFIG_SMP
-    // Define the area reserved for the exception vectors.
-    get_kip ()->memory_info.insert( memdesc_t::reserved, false, 
-	    (addr_t)0x1800000, (addr_t)0x1840000);
-#endif
-}
-
-#if defined(CONFIG_SMP)
-void SECTION (".init") init_processors()
-{
-    word_t smp_cpu;
-    smp_cpu = 1;
-
-    while (mips64_is_processor_available(smp_cpu))
-    {
-	if (smp_cpu > CONFIG_SMP_MAX_CPUS)
-	{
-	    printf("found more CPUs than Pistachio supports\n");
-	    spin_forever();
-	}
-	cache_t::flush_cache_all();
-	mips64_start_processor(smp_cpu);
-	if (! mips64_wait_for_processor (smp_cpu))
-	    printf ("Failed to start processor %d\n", smp_cpu);
-	smp_cpu ++;
-    }
-}
-#endif
-
-static void SECTION (".init") finalize_cpu_init (word_t cpu_id)
-{
-    cpuid_t cpuid = cpu_id;
-
-#if defined(CONFIG_SMP)
-    // Mark CPU as being active
-    mips64_processor_online(cpuid);
-
-    if (cpuid == 0)
-	init_processors ();
-#endif
-    TRACE_INIT("Finalized CPU %d\n", cpuid);
-}
-
-/*
- * Setup MIPS CPU
- */
-extern "C" void init_cpu(void);
-
-/*
- * Setup the Page tables and ASIDs
- */
-extern "C" void SECTION(".init") init_pageing(void)
-{
-    /* Create and init kernel space */
-    init_kernel_space();
-}
-
-extern word_t _start_cpu_local;
-
-#if defined(CONFIG_SMP)
-void SECTION (".init") init_cpulocal(int cpuid)
-{
-    int wired = 1, index = 0, i;
-    word_t pagemask = (0xf<<12);
-    word_t entryhi, entrylo0, entrylo1;
-
-    TRACE_INIT("Initialize CPU Local (%d)\n", cpuid);
-
-    // we make a 16kb cpu local area
-    __asm__ __volatile__ (
-	"mtc0 %0,"STR(CP0_WIRED)"\n\t"
-	:: "r" (wired)
-    );
-
-    __asm__ __volatile__ (
-	"mtc0 %0,"STR(CP0_PAGEMASK)"\n\t"
-	:: "r" (pagemask)
-    );
-
-    entryhi = (3ul<<62) | (((word_t)0xffffffffc0000000ul>>13)<<13);
-    entrylo0 = ((((0x1800000+0x40000*cpuid)&0xfffffff)>>12)<<6) | (3<<3) | 7; // XXX
-    entrylo1 = 1;
-
-    __asm__ __volatile__ (
-	"mtc0  %0,"STR(CP0_INDEX)"\n\t"
-	"dmtc0 %1,"STR(CP0_ENTRYHI)"\n\t"
-	"dmtc0 %2,"STR(CP0_ENTRYLO0)"\n\t"
-	"dmtc0 %3,"STR(CP0_ENTRYLO1)"\n\t"
-	"nop;nop;nop;\n\t"
-	"tlbwi\n\t"
-	:: "r" (index), "r" (entryhi), "r" (entrylo0), "r" (entrylo1)
-    );
-
-    __asm__ __volatile__ (
-	"nop;nop;nop;\n\t"
-	"mtc0 $0,"STR(CP0_ENTRYHI)"\n\t"
-	"mtc0 %0,"STR(CP0_PAGEMASK)"\n\t"
-	:
-	: "r" (CONFIG_MIPS64_PAGEMASK_4K)
-    );
-
-    /* Zero out region */
-    for (i = 0; i < 0x4000; i++)
-	*(char*)(0xffffffffc0000000+i) = 0;
-}
-#endif
-
-
-/*
- * Setup MIPS Architecture
- */
-extern "C" void SECTION(".init") init_arch(void)
-{
-    init_tlb();
-
-    /* configure IRQ hardware - global part */
-    get_interrupt_ctrl()->init_arch();
-
-#if defined(CONFIG_SMP)
-    init_cpulocal(0);
-#endif
-
-    /* configure IRQ hardware - local part */
-    get_interrupt_ctrl()->init_cpu();
-
-    get_asid_cache()->init();
-    get_asid_cache()->set_valid(0, CONFIG_MAX_NUM_ASIDS-1);
-
-    init_bootmem();
-    
-    /* initialize kernel interface page */
-    get_kip()->init();
-
-    /* initialise page tables */
-    init_pageing();
-
-    /* initialize mapping database */
-    init_mdb ();
-    
-    /* initialize kernel debugger if any */
-    if (get_kip()->kdebug_init)
-	get_kip()->kdebug_init();
-
-    /* initialize the kernel's timer source */
-    get_timer()->init_global();
-    get_timer()->init_cpu();
-
-#if defined(CONFIG_SMP)
-    init_xcpu_handling (0);
-#endif
-
-    init_processor( 0, plat_bus_freq[0]/1000, plat_cpu_freq[0]/1000);
-}
-
-extern void init_platform(word_t arg);
-
-/*
- * Entry point from ASM into C kernel
- * Precondition: paging is initialized with init_paging
- */
-
-extern "C" void SECTION(".init") startup_system(word_t a0, word_t a1, word_t a2, word_t a3)
-{
-    init_cpu();
-    init_cpu_cache();
-    
-    init_platform(a0);
-
-    init_console();
-
-    init_hello();
-
-    init_arch();
-
-    dump_info();
-
-    /* initialize the scheduler */
-    get_current_scheduler()->init(true);
-
-    get_idle_tcb ()->notify (finalize_cpu_init, 0);
-
-    /* get the thing going - we should never return */
-    get_current_scheduler()->start();
-    
-    printf("\nShould never get here!\nKernel Halted\n");
-    /* make sure we don't fall off the edge */
-    spin_forever(1);
-}
-
-#if defined(CONFIG_SMP)
-
-extern "C" void SECTION (".init") startup_cpu (cpuid_t cpuid)
-{
-    init_cpu();
-    init_cpu_cache();
-
-    TRACE_INIT("CPU %d startup\n", cpuid);
-
-    init_tlb();
-    init_cpulocal(cpuid);
-    // Define the area reserved for the exception vectors.
-    get_kip ()->memory_info.insert( memdesc_t::reserved, false, 
-	    (addr_t)(0x1800000ul+(0x40000*cpuid)), (addr_t)(0x1840000ul+(0x40000*cpuid)));
-
-    get_asid_cache()->init();
-    get_asid_cache()->set_valid(0, CONFIG_MAX_NUM_ASIDS-1);
-
-    get_interrupt_ctrl()->init_cpu();
-    get_timer()->init_cpu();
-    init_xcpu_handling (cpuid);
-
-    init_processor( cpuid, plat_bus_freq[cpuid]/1000, plat_cpu_freq[cpuid]/1000);
-
-    get_current_scheduler()->init (false);
-
-    get_idle_tcb ()->notify (finalize_cpu_init, cpuid);
-
-    get_current_scheduler()->start (cpuid);
-
-    spin_forever(1);
-}
-
-#endif
diff --git a/kernel/src/glue/v4-mips64/intctrl.cc b/kernel/src/glue/v4-mips64/intctrl.cc
deleted file mode 100644
index 9f67ccd7..00000000
--- a/kernel/src/glue/v4-mips64/intctrl.cc
+++ /dev/null
@@ -1,139 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/intctrl.cc
- * Description:   Implementation of interrupt control functionality 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.cc,v 1.16 2004/04/05 06:21:53 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_API(tcb.h)
-#include INC_GLUE(intctrl.h)
-#include INC_ARCH(addrspace.h)
-#include INC_ARCH(mips_cpu.h)
-#include INC_PLAT(cache.h)
-
-/* XXX - Should be in a header file. Need to provide an optimised version */
-extern "C" void *memcpy( void *dst, const void *src, word_t size );
-
-intctrl_t intctrl;
-
-word_t exception_handlers[32];
-word_t interrupt_handlers[8];
-
-extern "C" void spurious_interrupt(word_t irq, mips64_irq_context_t * frame)
-{
-    printf("L4 Mips: Spurious interrupt %d\n", irq);
-    enter_kdebug("Spurious interrupt");
-}
-
-extern "C" void intctrl_t_handle_irq(word_t irq, mips64_irq_context_t * frame)
-{
-    get_interrupt_ctrl()->mask(irq);
-    handle_interrupt(irq);
-}
-
-/**
- * Setup MIPS exception vector jump table
- */
-static void SECTION (".init")
-setup_exception_vectors()
-{
-    extern void (*_mips64_interrupt);
-    extern void (*_mips64_tlb_mod);
-    extern void (*_mips64_stlb_miss);
-    extern void (*_mips64_l4syscall);
-
-    get_interrupt_ctrl()->register_exception_handler(0, &_mips64_interrupt);
-    get_interrupt_ctrl()->register_exception_handler(1, &_mips64_tlb_mod);
-
-    get_interrupt_ctrl()->register_exception_handler(2, &_mips64_stlb_miss);
-    get_interrupt_ctrl()->register_exception_handler(3, &_mips64_stlb_miss);
-
-    get_interrupt_ctrl()->register_exception_handler(8, &_mips64_l4syscall);
-
-    get_interrupt_ctrl()->register_interrupt_handler(2, intctrl_t_handle_irq);
-    get_interrupt_ctrl()->register_interrupt_handler(3, intctrl_t_handle_irq);
-    get_interrupt_ctrl()->register_interrupt_handler(4, intctrl_t_handle_irq);
-    get_interrupt_ctrl()->register_interrupt_handler(5, intctrl_t_handle_irq);
-    get_interrupt_ctrl()->register_interrupt_handler(6, intctrl_t_handle_irq);
-    cache_t::flush_cache_all();
-}
-
-#if CONFIG_IPC_FASTPATH
-#define __mips64_interrupt __mips64_interrupt_fp
-#endif
-
-/**
- * Setup the MIPS architecture interrupts
- */
-void SECTION (".init")
-intctrl_t::init_arch(void) 
-{
-    unsigned int i;
-    /* declare assembly functions */
-    extern char __mips64_tlb_refill;
-    extern char __mips64_xtlb_refill;
-    extern char __mips64_cache_error;
-    extern char __mips64_interrupt;
-    extern char __mips64_extra_vector;
-    extern void (*_mips64_exception);
-
-#if CONFIG_IPC_FASTPATH
-    TRACE_INIT("init_arch: MIPS64 using FASTPATH\n");
-#endif
-
-    mips_cpu::cli();
-
-    /* Copy the MIPS exception vectors to KSEG0 0xFFFFFFFF80000000  */
-    memcpy((void *)(KSEG0), &__mips64_tlb_refill, 0x80);
-    memcpy((void *)(KSEG0 + 0x080), &__mips64_xtlb_refill, 0x80);
-    memcpy((void *)(KSEG0 + 0x100), &__mips64_cache_error, 0x80);
-    memcpy((void *)(KSEG0 + 0x180), &__mips64_interrupt, 0x80);
-    /* Some MIPS CPU's have an extra vector for interrupts */
-    memcpy((void *)(KSEG0 + 0x200), &__mips64_extra_vector, 0x80);
-
-    cache_t::flush_cache_all();
-
-    for (i=0; i<32; i++)
-	exception_handlers[i] = (word_t)&_mips64_exception;
-    for (i=0; i<8; i++)
-	interrupt_handlers[i] = (word_t)spurious_interrupt;
-
-    setup_exception_vectors();
-}
-
-void SECTION (".init")
-intctrl_t::init_cpu(void) 
-{
-    /* Mask out all interrupts */
-    mips_cpu::clear_cp0_status(ST_IM);
-    get_idle_tcb()->arch.int_mask = 0;
-
-    /* Clear BEV: set vector base to 0xFFFFFFFF80000000 */
-    mips_cpu::clear_cp0_status(ST_BEV);
-}
-
diff --git a/kernel/src/glue/v4-mips64/intctrl.h b/kernel/src/glue/v4-mips64/intctrl.h
deleted file mode 100644
index 014c75cb..00000000
--- a/kernel/src/glue/v4-mips64/intctrl.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/intctrl.h
- * Description:   MIPS64 interrupt controller
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.13 2004/06/04 02:32:31 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__INTCTRL_H__
-#define __GLUE__V4_MIPS64__INTCTRL_H__
-
-#include <intctrl.h>
-#include INC_GLUE(context.h)
-#include INC_ARCH(mips_cpu.h)
-
-extern word_t exception_handlers[32];
-extern word_t interrupt_handlers[8];
-
-class intctrl_t : public generic_intctrl_t {
- public:
-	void init_arch();
-	void init_cpu();
-
-	void register_exception_handler (word_t vector, void *handler)
-	{
-	    ASSERT(vector < 32);
-	    exception_handlers[vector] = (word_t)handler;
-	    TRACE_INIT("exception vector[%d] = %p\n", vector, exception_handlers[vector]);
-	}
-
-	void register_interrupt_handler (word_t vector, void (*handler)(word_t, mips64_irq_context_t *))
-	{
-	    ASSERT(vector < 8);
-	    interrupt_handlers[vector] = (word_t) handler;
-	    TRACE_INIT("interrupt vector[%d] = %p\n", vector, interrupt_handlers[vector]);
-	}
-
-	static inline void mask(word_t irq)
-	{
-	    ASSERT(irq<8);
-	    get_idle_tcb()->arch.int_mask &= ~(1<<irq);
-	    mips_cpu::clear_cp0_status((1<<8)<<irq);
-	}
-	static inline bool unmask(word_t irq)
-	{
-	    ASSERT(irq<8);
-	    get_idle_tcb()->arch.int_mask |= 1<<irq;
-	    mips_cpu::set_cp0_status((1<<8)<<irq);
-	    return false;
-	}
-	static inline void disable(word_t irq)
-	{
-	    ASSERT(irq<8);
-	    get_idle_tcb()->arch.int_mask &= ~(1<<irq);
-	    mips_cpu::clear_cp0_status((1<<8)<<irq);
-	}
-	static inline bool enable(word_t irq)
-	{
-	    ASSERT(irq<8);
-	    get_idle_tcb()->arch.int_mask |= 1<<irq;
-	    mips_cpu::set_cp0_status((1<<8)<<irq);
-	    return false;
-	}
-	static inline void mask_and_ack(word_t irq)        { UNIMPLEMENTED(); }
-	static inline void ack(word_t irq)                 { UNIMPLEMENTED(); }
-
-	word_t get_number_irqs(void) 
-	{ return 7; }
-
-	bool is_irq_available(int irq) 
-	{ return (irq < 7) && (irq >= 2); }
-
-	void set_cpu(word_t irq, word_t cpu) {}
-};
-
-
-/**
- * @return pointer to interrupt controller
- */
-INLINE intctrl_t * get_interrupt_ctrl() 
-{
-    extern intctrl_t intctrl;
-    return &intctrl;
-}
-
-#endif /* !__GLUE__V4_MIPS64__INTCTRL_H__ */
diff --git a/kernel/src/glue/v4-mips64/ktcb.h b/kernel/src/glue/v4-mips64/ktcb.h
deleted file mode 100644
index 58dbfcba..00000000
--- a/kernel/src/glue/v4-mips64/ktcb.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/ktcb.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ktcb.h,v 1.6 2004/06/04 02:32:31 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__KTCB_H__
-#define __GLUE__V4_MIPS64__KTCB_H__
-
-class arch_ktcb_t {
-	/* TCB_START_MARKER */
- public:
-	word_t int_mask;    /* In the idle tcb - per cpu interrupt mask */
-	/* TCB_END_MARKER */
-};
-
-#endif /* !__GLUE__V4_MIPS64__KTCB_H__ */
diff --git a/kernel/src/glue/v4-mips64/map.h b/kernel/src/glue/v4-mips64/map.h
deleted file mode 100644
index 36d76f7a..00000000
--- a/kernel/src/glue/v4-mips64/map.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2005,  Karlsruhe University
- *                
- * File path:     glue/v4-mips64/map.h
- * Description:   architecture specific mapping declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: map.h,v 1.3 2005/05/19 08:39:49 stoess Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_MIPS64__MAP_H__
-#define __GLUE__V4_MIPS64__MAP_H__
-
-#include INC_API(generic-archmap.h)
-
-#endif /* !__GLUE__V4_MIPS64__MAP_H__ */
diff --git a/kernel/src/glue/v4-mips64/memcontrol.cc b/kernel/src/glue/v4-mips64/memcontrol.cc
deleted file mode 100644
index 15236015..00000000
--- a/kernel/src/glue/v4-mips64/memcontrol.cc
+++ /dev/null
@@ -1,268 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/memcontrol.cc
- * Description:   Temporary memory_control implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: memcontrol.cc,v 1.12 2005/02/22 05:29:09 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_API(config.h)
-#include INC_API(tcb.h)
-#include INC_API(thread.h)
-#include INC_API(fpage.h)
-#include INC_GLUE(syscalls.h)
-#include INC_API(syscalls.h)
-#include INC_PLAT(cache.h)
-
-#include <kdb/tracepoints.h>
-
-DECLARE_TRACEPOINT(SYSCALL_MEMORY_CONTROL);
-
-enum attribute_e {
-    a_l4default		= 0,
-    a_uncached		= 1,
-    a_write_back	= 2,
-    a_write_through	= 3,
-    a_write_through_noalloc = 4,
-#ifdef CONFIG_SMP
-    a_coherent		= 5,
-#endif
-    a_flush_i		= 29,
-    a_flush_d		= 30,
-    a_flush		= 31,
-};
-
-
-#include INC_ARCH(pgent.h)
-#include INC_API(space.h)
-#include INC_GLUE(space.h)
-#include <linear_ptab.h>
-
-/**
- * @param fpage		fpage to change
- * @param attrib	new fpage attributes
- *
- * @returns 
- */
-word_t attrib_fpage (tcb_t *current, fpage_t fpage, attribute_e attrib)
-{
-    pgent_t::pgsize_e size, pgsize;
-    pgent_t * pg;
-    addr_t vaddr;
-    word_t num, modify = 1;
-
-    pgent_t *r_pg[pgent_t::size_max];
-    word_t r_num[pgent_t::size_max];
-    space_t *space = current->get_space();
-
-    num = fpage.get_size_log2 ();
-    vaddr = address (fpage, num);
-
-    if (num < hw_pgshifts[0])
-    {
-	current->set_error_code(EINVALID_PARAM);  /* Invalid fpage */
-	return 1;
-    }
-
-    /*
-     * Some architectures may not support a complete virtual address
-     * space.  Enforce attrib to only cover the supported space.
-     */
-
-    if (num > hw_pgshifts[pgent_t::size_max+1])
-	num = hw_pgshifts[pgent_t::size_max+1];
-
-    /*
-     * Find pagesize to use, and number of pages to map.
-     */
-
-    for (pgsize = pgent_t::size_max; hw_pgshifts[pgsize] > num; pgsize--) {}
-
-    num = 1UL << (num - hw_pgshifts[pgsize]);
-    size = pgent_t::size_max;
-    pg = space->pgent (page_table_index (size, vaddr));
-
-    while (num)
-    {
-	translation_t::memattrib_e new_att = translation_t::l4default;
-
-	if (! space->is_user_area (vaddr))
-	    /* Do not mess with kernel area. */
-	    break;
-
-	if (size > pgsize)
-	{
-	    /* We are operating on too large page sizes. */
-	    if (! pg->is_valid (space, size))
-		break;
-	    else if (pg->is_subtree (space, size))
-	    {
-		size--;
-		pg = pg->subtree (space, size+1)->next
-		    (space, size, page_table_index (size, vaddr));
-		continue;
-	    }
-	    else
-	    {
-		/* page is too large */
-		current->set_error_code(EINVALID_PARAM);  /* Invalid fpage */
-		return 1;
-	    }
-	}
-
-	if (! pg->is_valid (space, size))
-	    goto Next_entry;
-
-	if (pg->is_subtree (space, size))
-	{
-	    /* We have to modify each single page in the subtree. */
-	    size--;
-	    r_pg[size] = pg;
-	    r_num[size] = num - 1;
-
-	    pg = pg->subtree (space, size+1);
-	    num = page_table_size (size);
-	    continue;
-	}
-
-	if (space->is_mappable (vaddr))
-	{
-	    switch (attrib)
-	    {
-	    case a_l4default: new_att = translation_t::l4default; break;
-	    case a_uncached: new_att = translation_t::uncached; break;
-	    case a_write_back: new_att = translation_t::write_back; break;
-	    case a_write_through: new_att = translation_t::write_through; break;
-	    case a_write_through_noalloc: new_att = translation_t::write_through_noalloc; break;
-#ifdef CONFIG_SMP
-	    case a_coherent: new_att = translation_t::coherent; break;
-#endif
-	    case a_flush_d:
-		cache_t::flush_cache_page((unsigned long)vaddr, size);
-		modify = 0; break;
-	    case a_flush_i:
-		cache_t::flush_icache_page((unsigned long)vaddr, size);
-		modify = 0; break;
-	    case a_flush:
-		cache_t::flush_cache_page((unsigned long)vaddr, size);
-		cache_t::flush_icache_page((unsigned long)vaddr, size);
-		modify = 0; break;
-	    default:
-		/* invalid attribute */
-		current->set_error_code(EINVALID_PARAM);
-		return 1;
-	    }
-	    if (modify)
-	    {
-		space->flush_tlbent (space, vaddr, page_shift (size));
-		pg->translation() -> set_attrib (new_att);
-	    }
-	}
-
-    Next_entry:
-
-	pg = pg->next (space, size, 1);
-	vaddr = addr_offset (vaddr, page_size (size));
-	num--;
-    }
-
-    return 0;
-}
-
-SYS_MEMORY_CONTROL (word_t control, word_t attribute0, word_t attribute1,
-		    word_t attribute2, word_t attribute3)
-{
-    tcb_t * current = get_current_tcb();
-    space_t *space = current->get_space();
-    word_t fp_idx, att;
-
-    TRACEPOINT (SYSCALL_MEMORY_CONTROL, 
-		printf ("SYS_MEMORY_CONTROL: control=%lx, attribute0=%lx, "
-			"attribute1=%lx, attribute2=%lx, attribute3=%lx\n",
-    			control, attribute0, attribute1, attribute2,
-    			attribute3));
-
-    // flush cpu cache
-    if (control == -2UL)
-    {
-	cache_t::flush_cache_all();
-	return_memory_control(1);
-    }
-
-    if (control >= IPC_NUM_MR)
-    {
-        current->set_error_code(EINVALID_PARAM);
-	return_memory_control(0);
-    }
-
-    for (fp_idx = 0; fp_idx <= control; fp_idx++)
-    {
-	fpage_t fpage;
-	addr_t addr;
-	pgent_t * pg;
-	pgent_t::pgsize_e pgsize;
-
-	fpage.raw = current->get_mr(fp_idx);
-
-	/* nil pages act as a no-op */
-	if (fpage.is_nil_fpage() )
-	    continue;
-
-	switch(fpage.raw & 0x3)
-	{
-	    case 0: att = attribute0; break;
-	    case 1: att = attribute1; break;
-	    case 2: att = attribute2; break;
-	    default: att = attribute3; break;
-	}
-
-	// invalid request - thread not privileged
-	if (!is_privileged_space(get_current_space()) && (att < 29))
-	{
-	    current->set_error_code(ENO_PRIVILEGE); /* No priviledge */
-	    return_memory_control(0);
-	}
-
-	addr = address (fpage, fpage.get_size_log2 ());
-	// Check if mapping exist in page table
-	if (!space->lookup_mapping (addr, &pg, &pgsize))
-	{
-	    if (!is_sigma0_space(current->get_space()))
-	    {
-		current->set_error_code(ENO_PRIVILEGE);
-		return_memory_control(0);
-	    }
-
-	    space->map_sigma0(addr);
-	}
-
-	if (attrib_fpage(current, fpage, (attribute_e)att))
-	    return_memory_control(0);
-    }
-
-    return_memory_control(1);
-}
diff --git a/kernel/src/glue/v4-mips64/memory.h b/kernel/src/glue/v4-mips64/memory.h
deleted file mode 100644
index d95332e4..00000000
--- a/kernel/src/glue/v4-mips64/memory.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     glue/v4-mips64/memory.h
- * Description:   V4 MIPS-64 memory defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: memory.h,v 1.4 2003/09/24 19:04:50 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__MEMORY_H__
-#define __GLUE__V4_MIPS64__MEMORY_H__
-
-/*
- * Symbols defined by linker script.
- */
-
-/* Kernel code and data */
-extern char _start_text_phys[];
-extern char _end_text_phys[];
-extern char _start_text[];
-extern char _end_text[];
-
-
-/*
- * Wrapper macros to access linker symbols.
- */
-
-#define start_text_phys		((addr_t) _start_text_phys)
-#define end_text_phys		((addr_t) _end_text_phys)
-
-
-#endif /* !__GLUE__V4_IA64__MEMORY_H__ */
diff --git a/kernel/src/glue/v4-mips64/offsets.h b/kernel/src/glue/v4-mips64/offsets.h
deleted file mode 100644
index 1b884ad1..00000000
--- a/kernel/src/glue/v4-mips64/offsets.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/offsets.h
- * Description:   Addresses used for C++, asm AND linker scripts
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: offsets.h,v 1.3 2003/09/24 19:04:50 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_POWERPC__OFFSETS_H__
-#define __GLUE__V4_POWERPC__OFFSETS_H__
-
-
-/* DON'T USE 0x........UL HERE. THE LINKER WILL NOT UNDERSTAND THAT */
-
-/* The offset of the .text section's virtual address.
- * Must be a multiple of the largest page hash table size, 32MB.
- */
-#define KERNEL_OFFSET	0xFFFFFFFF80000000
-
-#endif /* !__GLUE__V4_POWERPC__OFFSETS_H__ */
diff --git a/kernel/src/glue/v4-mips64/resource_functions.h b/kernel/src/glue/v4-mips64/resource_functions.h
deleted file mode 100644
index a5386292..00000000
--- a/kernel/src/glue/v4-mips64/resource_functions.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     glue/v4-mips64/resource_fucntions.h
- * Description:   Resource helpers for mips64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resource_functions.h,v 1.2 2004/06/04 02:32:31 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_MIPS64__RESOURCE_FUNCTIONS_H__
-#define __GLUE__V4_MIPS64__RESOURCE_FUNCTIONS_H__
-
-#include INC_API(tcb.h)
-#include INC_API(resources.h)
-
-/**
- * Mark the thread as being in an exception IPC
- *
- * @param tcb			current TCB
- */
-INLINE void thread_resources_t::set_exception_ipc (tcb_t * tcb)
-{
-    tcb->resource_bits += EXCEPTION;
-}
-
-
-/**
- * Clear the exception IPC bit
- *
- * @param tcb			current TCB
- */
-INLINE void thread_resources_t::clear_exception_ipc (tcb_t * tcb)
-{
-    tcb->resource_bits -= EXCEPTION;
-}
-
-#endif /*__GLUE__V4_MIPS64__RESOURCE_FUNCTIONS_H__*/
diff --git a/kernel/src/glue/v4-mips64/resources.cc b/kernel/src/glue/v4-mips64/resources.cc
deleted file mode 100644
index 1abe78df..00000000
--- a/kernel/src/glue/v4-mips64/resources.cc
+++ /dev/null
@@ -1,225 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     glue/v4-mips64/resources.cc
- * Description:   thread resource management
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.cc,v 1.6 2004/04/07 03:09:18 cvansch Exp $
- *                
- ********************************************************************/
-#include INC_API(tcb.h)
-#include INC_ARCH(mips_cpu.h)
-
-#include <kdb/tracepoints.h>
-
-/* Processor specific resources that are handled lazily
- * such as the floating point registers. This keeps a copy
- * of the resource owner for lazy replacement
- */
-processor_resources_t processor_resources UNIT("cpulocal");
-
-DECLARE_TRACEPOINT (DISABLED_FPU);
-
-void thread_resources_t::save (tcb_t * tcb)
-{
-}
-
-void thread_resources_t::load (tcb_t * tcb)
-{
-}
-
-void thread_resources_t::purge (tcb_t * tcb)
-{
-}
-
-void thread_resources_t::free (tcb_t * tcb)
-{
-}
-
-void thread_resources_t::init (tcb_t * tcb)
-{
-    tcb->resource_bits.init ();
-
-    get_resources()->clear_fp_lazy_tcb();
-    this->fpu_fpcsr = 0;
-}
-
-INLINE void thread_resources_t::deactivate_fpu( tcb_t *tcb )
-{
-    get_resources()->clear_fp_lazy_tcb();
-
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) tcb->get_stack_top () - 1;
-
-    context->status &= ~ST_CU1;
-}
-
-INLINE void thread_resources_t::activate_fpu( tcb_t *tcb )
-{
-    get_resources()->set_fp_lazy_tcb( tcb );
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) tcb->get_stack_top () - 1;
-
-    context->status |= ST_CU1;
-}
-
-void thread_resources_t::spill_fpu( tcb_t *tcb )
-{
-    // Spill the registers.
-    u64_t *start = this->fpu_gprs;
-    asm volatile (
-	    "s.d  $f0,	  0(%0) ;"
-	    "s.d  $f1,    8(%0) ;"
-	    "s.d  $f2,   16(%0) ;"
-	    "s.d  $f3,   24(%0) ;"
-	    "s.d  $f4,   32(%0) ;"
-	    "s.d  $f5,   40(%0) ;"
-	    "s.d  $f6,   48(%0) ;"
-	    "s.d  $f7,   56(%0) ;"
-	    "s.d  $f8,   64(%0) ;"
-	    "s.d  $f9,   72(%0) ;"
-	    "s.d  $f10,  80(%0) ;"
-	    "s.d  $f11,  88(%0) ;"
-	    "s.d  $f12,  96(%0) ;"
-	    "s.d  $f13, 104(%0) ;"
-	    "s.d  $f14, 112(%0) ;"
-	    "s.d  $f15, 120(%0) ;"
-	    "s.d  $f16, 128(%0) ;"
-	    "s.d  $f17, 136(%0) ;"
-	    "s.d  $f18, 144(%0) ;"
-	    "s.d  $f19, 152(%0) ;"
-	    "s.d  $f20, 160(%0) ;"
-	    "s.d  $f21, 168(%0) ;"
-	    "s.d  $f22, 176(%0) ;"
-	    "s.d  $f23, 184(%0) ;"
-	    "s.d  $f24, 192(%0) ;"
-	    "s.d  $f25, 200(%0) ;"
-	    "s.d  $f26, 208(%0) ;"
-	    "s.d  $f27, 216(%0) ;"
-	    "s.d  $f28, 224(%0) ;"
-	    "s.d  $f29, 232(%0) ;"
-	    "s.d  $f30, 240(%0) ;"
-	    "s.d  $f31, 248(%0) ;"
-	    : /* ouputs */
-	    : /* inputs */
-	      "b" (start)
-	    );
-
-    // Save the FPCSR
-    asm volatile (
-	    "cfc1   %0, $31 ;"
-	    : /* outputs */
-	      "=r" (this->fpu_fpcsr)
-	    );
-
-    this->deactivate_fpu( tcb );
-}
-
-INLINE void thread_resources_t::restore_fpu( tcb_t *tcb )
-{
-    this->activate_fpu( tcb );
-
-    // Restore the registers.
-    u64_t *start = this->fpu_gprs;
-    asm volatile (
-	    "l.d  $f0,	  0(%0) ;"
-	    "l.d  $f1,    8(%0) ;"
-	    "l.d  $f2,   16(%0) ;"
-	    "l.d  $f3,   24(%0) ;"
-	    "l.d  $f4,   32(%0) ;"
-	    "l.d  $f5,   40(%0) ;"
-	    "l.d  $f6,   48(%0) ;"
-	    "l.d  $f7,   56(%0) ;"
-	    "l.d  $f8,   64(%0) ;"
-	    "l.d  $f9,   72(%0) ;"
-	    "l.d  $f10,  80(%0) ;"
-	    "l.d  $f11,  88(%0) ;"
-	    "l.d  $f12,  96(%0) ;"
-	    "l.d  $f13, 104(%0) ;"
-	    "l.d  $f14, 112(%0) ;"
-	    "l.d  $f15, 120(%0) ;"
-	    "l.d  $f16, 128(%0) ;"
-	    "l.d  $f17, 136(%0) ;"
-	    "l.d  $f18, 144(%0) ;"
-	    "l.d  $f19, 152(%0) ;"
-	    "l.d  $f20, 160(%0) ;"
-	    "l.d  $f21, 168(%0) ;"
-	    "l.d  $f22, 176(%0) ;"
-	    "l.d  $f23, 184(%0) ;"
-	    "l.d  $f24, 192(%0) ;"
-	    "l.d  $f25, 200(%0) ;"
-	    "l.d  $f26, 208(%0) ;"
-	    "l.d  $f27, 216(%0) ;"
-	    "l.d  $f28, 224(%0) ;"
-	    "l.d  $f29, 232(%0) ;"
-	    "l.d  $f30, 240(%0) ;"
-	    "l.d  $f31, 248(%0) ;"
-	    : /* ouputs */
-	    : /* inputs */
-	      "b" (start)
-	    );
-
-    // Restore the FPCSR
-    asm volatile (
-	    "ctc1   %0, $31 ;"
-	    : /* outputs */
-	    : /* inputs */
-	      "r" (this->fpu_fpcsr)
-	    );
-}
-
-void thread_resources_t::mips64_fpu_unavail_exception( tcb_t *tcb, mips64_irq_context_t *context )
-{
-    tcb_t * fp_tcb = get_resources()->get_fp_lazy_tcb();
-
-    TRACEPOINT (DISABLED_FPU,
-		printf ("FPU disabled exception:  cur=%p  owner=%p\n",
-			tcb, fp_tcb));
-
-    /* In our lazy floating point model, we should never see a floating point
-     * exception if the current tcb already owns the floating point register
-     * file.
-     */
-    ASSERT( fp_tcb != tcb );
-
-    mips_cpu::enable_fpu();
-
-    if( fp_tcb )
-	fp_tcb->resources.spill_fpu( fp_tcb );
-
-    this->restore_fpu( tcb );
-}
-
-void thread_resources_t::mips64_fpu_spill( tcb_t *tcb )
-{
-    tcb_t * fp_tcb = get_resources()->get_fp_lazy_tcb();
-
-    ASSERT( tcb );
-
-    if (tcb == fp_tcb) {
-	mips_cpu::enable_fpu();
-	fp_tcb->resources.spill_fpu( fp_tcb );
-    }
-}
diff --git a/kernel/src/glue/v4-mips64/resources.h b/kernel/src/glue/v4-mips64/resources.h
deleted file mode 100644
index 2571dacc..00000000
--- a/kernel/src/glue/v4-mips64/resources.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/resources.h
- * Description:   Resource bit definitions for mips64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.h,v 1.8 2004/06/04 02:32:31 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_MIPS64__RESOURCES_H__
-#define __GLUE__V4_MIPS64__RESOURCES_H__
-
-#include INC_GLUE(context.h)
-
-#define HAVE_RESOURCE_TYPE_E
-enum resource_type_e {
-    COPY_AREA	= 0,
-    EXCEPTION	= 1,
-};
-
-class thread_resources_t : public generic_thread_resources_t
-{
-public:
-    void save(tcb_t * tcb);
-    void load(tcb_t * tcb);
-    void purge(tcb_t * tcb);
-    void init(tcb_t * tcb);
-    void free(tcb_t * tcb);
-
-    void set_exception_ipc(tcb_t * tcb);
-    void clear_exception_ipc(tcb_t * tcb);
-
-    void mips64_fpu_unavail_exception( tcb_t *tcb, mips64_irq_context_t *context );
-    void mips64_fpu_spill( tcb_t *tcb );
-
-private:
-    void spill_fpu( tcb_t *tcb );
-    void restore_fpu( tcb_t *tcb );
-    void deactivate_fpu( tcb_t *tcb );
-    void activate_fpu( tcb_t *tcb );
-
-private:
-    u64_t fpu_gprs[32];	/* 32 FPRs */
-    u64_t fpu_fpcsr;	/* FPU control/status register */
-};
-
-
-class processor_resources_t {
- public:
-    void init_cpu(void) { fp_lazy_tcb = NULL; }
-
- public:
-    tcb_t *get_fp_lazy_tcb() { return fp_lazy_tcb; }
-
-    void set_fp_lazy_tcb( tcb_t *tcb ) { fp_lazy_tcb = tcb; }
-    void clear_fp_lazy_tcb() { fp_lazy_tcb = NULL; }
-    
- private:
-    tcb_t *fp_lazy_tcb;
-};
-
-INLINE processor_resources_t *get_resources(void) 
-{
-    extern processor_resources_t processor_resources;
-    return &processor_resources;
-}
-
-#endif /* !__GLUE__V4_MIPS64__RESOURCES_H__ */
diff --git a/kernel/src/glue/v4-mips64/schedule.h b/kernel/src/glue/v4-mips64/schedule.h
deleted file mode 100644
index 599f6c7c..00000000
--- a/kernel/src/glue/v4-mips64/schedule.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-template/schedule.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: schedule.h,v 1.8 2004/06/04 02:32:31 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__SCHEDULE_H__
-#define __GLUE__V4_MIPS64__SCHEDULE_H__
-
-#include INC_API(tcb.h)
-#include INC_GLUE(config.h)
-#include INC_ARCH(mips_cpu.h)
-
-/**
- * @todo document me
- */
-INLINE u64_t get_timer_tick_length()
-{
-    return TIMER_TICK_LENGTH;
-}
-
-
-/**
- * send the current processor to sleep
- */
-INLINE void processor_sleep()
-{
-    mips_cpu::sti();
-    mips_cpu::sleep();
-    mips_cpu::cli();
-    mips_cpu::restore_mask(get_idle_tcb()->arch.int_mask);
-}
-
-#endif /* !__GLUE__V4_MIPS64__SCHEDULE_H__ */
diff --git a/kernel/src/glue/v4-mips64/smp.cc b/kernel/src/glue/v4-mips64/smp.cc
deleted file mode 100644
index 3b8e5a23..00000000
--- a/kernel/src/glue/v4-mips64/smp.cc
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/smp.cc
- * Description:   mips64 MP implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: smp.cc,v 1.5 2006/03/01 14:10:32 ud3 Exp $
- *                
- ********************************************************************/
-#if defined(CONFIG_SMP)
-
-#include INC_API(tcb.h)
-#include INC_GLUE(intctrl.h)
-#include INC_API(smp.h)
-
-extern "C" void handle_ipi(word_t irq, mips64_irq_context_t * frame)
-{
-    cpuid_t cpu = get_current_cpu();
-    // TRACEF("Mips 64 IPI (%d)\n", cpu);
-
-    mips64_clear_ipi(cpu);
-
-    process_xcpu_mailbox ();
-}
-
-void SECTION (".init") init_xcpu_handling (cpuid_t cpu)
-{
-    TRACE_INIT("IPI - mailbox setup %d\n", cpu);
-    mips64_init_ipi(cpu);
-}
-
-#endif /* CONFIG_SMP */
-
diff --git a/kernel/src/glue/v4-mips64/smp.h b/kernel/src/glue/v4-mips64/smp.h
deleted file mode 100644
index fe6d8e8b..00000000
--- a/kernel/src/glue/v4-mips64/smp.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     glue/v4-msip64/smp.h
- * Description:   SMP definitions for mips64 V4.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id$
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__SMP_H__
-#define __GLUE__V4_MIPS64__SMP_H__
-#if defined(CONFIG_SMP)
-
-#include INC_PLAT(smp.h)
-
-void mips64_start_processor (cpuid_t cpu);
-bool mips64_wait_for_processor (cpuid_t cpu);
-bool mips64_is_processor_available (cpuid_t cpu);
-void mips64_processor_online (cpuid_t cpu);
-cpuid_t mips64_get_cpuid (void);
-void mips64_init_ipi(cpuid_t cpu);
-void mips64_clear_ipi(cpuid_t cpu);
-
-void init_xcpu_handling(cpuid_t cpu);
-
-INLINE void smp_xcpu_trigger (cpuid_t cpu)
-{
-    // TRACEF("Send IPI to (%d)\n", cpu);
-    mips64_send_ipi(cpu);
-}
-
-
-#endif /* CONFIG_SMP */
-#endif /* !__GLUE__V4_MIPS64__SMP_H__ */
diff --git a/kernel/src/glue/v4-mips64/space.cc b/kernel/src/glue/v4-mips64/space.cc
deleted file mode 100644
index 3b32ad10..00000000
--- a/kernel/src/glue/v4-mips64/space.cc
+++ /dev/null
@@ -1,464 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003, 2006,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/space.cc
- * Description:   VAS implementation 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.cc,v 1.27 2006/11/17 17:14:30 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <kmemory.h>
-
-#include INC_API(space.h)		/* space_t		*/
-#include INC_API(kernelinterface.h)
-#include INC_API(tcb.h)
-
-#include INC_ARCH(pgent.h)
-#include <linear_ptab.h>
-
-EXTERN_KMEM_GROUP (kmem_space);
-DECLARE_KMEM_GROUP (kmem_tcb);
-DECLARE_KMEM_GROUP (kmem_utcb);
-
-#define PGSIZE_KTCB	(pgent_t::size_4k)
-#define PGSIZE_KIP	(pgent_t::size_4k)
-#define PGSIZE_UTCB	(pgent_t::size_4k)
-
-asid_cache_t asid_cache UNIT("cpulocal");
-space_t * kernel_space = NULL;
-tcb_t *dummy_tcb = NULL;
-
-void SECTION(".init.memory") space_t::init_kernel_mappings()
-{
-    int ktcb_idx = page_table_index(pgent_t::size_max,
-		    (addr_t) (KTCB_AREA_START | (1UL << (hw_pgshifts[pgent_t::size_max+1]-1))));
-
-    /* Set up ktcb area (allocate page) */
-    pgent(ktcb_idx)->make_subtree(this, pgent_t::size_max, true);
-}
-
-INLINE word_t pagedir_idx (addr_t addr)
-{
-    return page_table_index (pgent_t::size_max, addr);
-}
-
-/**
- * initialize THE kernel space
- * @see get_kernel_space()
- */
-void SECTION(".init.memory") init_kernel_space()
-{
-    ASSERT(!kernel_space);
-    kernel_space = allocate_space();
-    ASSERT(kernel_space);
-
-    kernel_space->get_asid()->init();
-    kernel_space->init_kernel_mappings();
-
-    /* Allocate dummy tcb */
-    ASSERT(!dummy_tcb);
-    dummy_tcb = (tcb_t *) kmem.alloc(kmem_tcb, MIPS64_PAGE_SIZE);
-    ASSERT(dummy_tcb);
-
-    TRACE_INIT ("Allocated kernel space of size 0x%x @ %p\n",
-		sizeof (space_t), kernel_space);
-}
-
-/**
- * initialize a space
- *
- * @param utcb_area	fpage describing location of UTCB area
- * @param kip_area	fpage describing location of KIP
- */
-void space_t::init (fpage_t utcb_area, fpage_t kip_area)
-{
-    int ktcb_idx = page_table_index(pgent_t::size_max,
-		    (addr_t) (KTCB_AREA_START | (1UL << (hw_pgshifts[pgent_t::size_max+1]-1))));
-
-    this->utcb_area = utcb_area;
-    this->kip_area = kip_area;
-
-    get_asid()->init();
-
-    /* Copy top level entries for the ktcb areas */
-    pgent(ktcb_idx)->set_entry(this, pgent_t::size_max,
-		    *get_kernel_space()->pgent(ktcb_idx));
-
-    add_mapping(kip_area.get_base(), virt_to_phys((addr_t)get_kip ()),
-		PGSIZE_KIP, false, false);
-}
-
-/**
- * Release mappings that belong to the kernel (UTCB, KIP)
- * @param vaddr		virtual address in the space
- * @param paddr		physical address the mapping refers to
- * @param log2size	log2(size of mapping)
- */
-void space_t::release_kernel_mapping (addr_t vaddr, addr_t paddr,
-				      word_t log2size)
-{
-    /* Free up memory used for UTCBs */
-    if (get_utcb_page_area ().is_addr_in_fpage (vaddr))
-	kmem.free (kmem_utcb, phys_to_virt (paddr), 1UL << log2size);
-}
-
-/**
- * establish a mapping in sigma0's space
- * @param addr	the fault address in sigma0
- *
- * This function should install a mapping that allows sigma0 to make
- * progress. Sigma0's space is available as this.
- */
-void space_t::map_sigma0(addr_t addr)
-{
-    //TRACEF("%p\n", addr);
-    add_mapping(addr, addr, pgent_t::size_4k, true, false);
-}
-
-/**
- * Try to copy a mapping from kernel space into the current space
- * @param addr the address for which the mapping should be copied
- * @return true if something was copied, false otherwise.
- * Synchronization must happen at the highest level, allowing sharing.
- */
-bool space_t::sync_kernel_space(addr_t addr)
-{
-    /* We set everything up at initialisation time */
-    return false;
-}
-
-/**
- * Install a dummy TCB
- * @param addr	address where the dummy TCB should be installed
- *
- * The dummy TCB must be read-only and fail all validity tests.
- */
-void space_t::map_dummy_tcb (addr_t addr)
-{
-    //TRACEF("%p %p\n", addr, (addr_t)dummy_tcb);
-    add_mapping(addr, virt_to_phys((addr_t)dummy_tcb), PGSIZE_KTCB, false, true);
-}
-
-/**
- * Allocate a UTCB
- * @param tcb	Owner of the utcb
- *
- */
-utcb_t * space_t::allocate_utcb (tcb_t * tcb)
-{
-    ASSERT (tcb);
-    addr_t utcb = (addr_t) tcb->get_utcb_location ();
-
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-
-    if (lookup_mapping ((addr_t) utcb, &pg, &pgsize))
-    {
-        addr_t kaddr = addr_mask (pg->address(this, pgsize),
-                                  ~page_mask (pgsize));
-        return (utcb_t *) phys_to_virt
-            (addr_offset (kaddr, (word_t) utcb & page_mask (pgsize)));
-    }
-
-#define MIPS64_ALIGN    ((ICACHE_SIZE/MIPS64_PAGE_SIZE/CACHE_WAYS - 1ul) << MIPS64_PAGE_BITS)
-
-    addr_t page = kmem.alloc_aligned (kmem_utcb, page_size (PGSIZE_UTCB),
-    					(word_t) utcb, MIPS64_ALIGN);
-
-    add_mapping((addr_t) utcb, virt_to_phys(page), 
-		PGSIZE_UTCB, true, false);
-
-    return (utcb_t *)
-        addr_offset (page, addr_mask (utcb, page_size (PGSIZE_UTCB) - 1));
-}
-
-/**
- * Map memory usable for TCB
- * @param addr address of the TCB that should be made usable
- *
- * This function is called when a TCB should be made usable the first
- * time. Usually, this happens when a) no page is mapped at the TCB
- * address at all, or b) a read-only page is mapped and now a write
- * access to the TCB occured.
- *
- * @see space_t::map_dummy_tcb
- */
-void space_t::allocate_tcb(addr_t addr)
-{
-    addr_t page = kmem.alloc (kmem_tcb, MIPS64_PAGE_SIZE);
-    //TRACEF("page = %p\n", page);
-
-    kernel_space->add_mapping(addr, virt_to_phys(page), PGSIZE_KTCB, true, true);
-}
-
-/**
- * Translate a user accessible UTCB address to a kernel accessible one
- * @param utcb	user accessible address of UTCB
- * @returns kernel accessible address of UTCB
- *
- * The returned address must be accessible in the current address
- * space. This is required for checking values in the UTCB of a thread
- * in a different address space.
- */
-utcb_t * space_t::utcb_to_kernel_space(utcb_t * utcb)
-{
-    /* (cvs) check this */
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-
-    if (lookup_mapping ((addr_t) utcb, &pg, &pgsize))
-    {
-	addr_t kaddr = pg->translation ()->phys_addr ();
-	return (utcb_t *)phys_to_virt(kaddr);
-    }
-
-    return NULL;
-}
-
-DEFINE_SPINLOCK (tlb_lock);	// XXX
-/**
- * Handle a XTLB Refill
- * @param faddr  faulting address
- * @param frame  context frame of saved process
- */
-extern "C" void handle_xtlb_miss (addr_t faddr, mips64_irq_context_t * frame)
-{
-    space_t * space = get_saved_pagetable();
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-    bool tcb = false;
-
-    if(space == NULL)
-	space = get_kernel_space();
-
-    if ((word_t)faddr & KTCB_AREA_START)
-    {
-	faddr = (addr_t)((word_t)faddr | (1UL << (hw_pgshifts[pgent_t::size_max+1]-1)));
-	tcb = true;
-    }
-
-    // TRACEF("(%016lx, %p) %d\n", faddr, space, get_current_cpu());
-
-    // Check if mapping exist in page table
-    if (space->lookup_mapping (faddr, &pg, &pgsize))
-    {
-	/* matthewc HACK: fill out both halves of the pair straight away
-	 * or things can get nasty with nested faults (TCB case).
-         */
-	word_t temp, mapsize = (1 << MIPS64_PAGE_BITS);
-	bool odd = (word_t)faddr & mapsize;
-	pgent_t * buddy, * pg1, * pg2;
-	if (space->lookup_mapping (addr_offset(faddr, odd ? -mapsize : mapsize), &buddy, &pgsize))
-	{
-	    pg1 = odd ? buddy : pg;
-	    pg2 = odd ? pg : buddy;
-	    faddr = (addr_t)((word_t)faddr & ~(1UL << (hw_pgshifts[pgent_t::size_max+1]-1)));
-	    __asm__ __volatile__ (
-		"dmfc0  %0,"STR(CP0_ENTRYHI)"\n\t"
-		"nop;\n\t"
-		"dmtc0  %1,"STR(CP0_ENTRYHI)"\n\t"
-		"dmtc0  %2,"STR(CP0_ENTRYLO0)"\n\t"
-		"dmtc0  %3,"STR(CP0_ENTRYLO1)"\n\t"
-		"nop;nop;nop;\n\t"
-		"tlbwr\n\t"
-		"nop;nop;nop;\n\t"
-		"dmtc0  %0,"STR(CP0_ENTRYHI)"\n\t"
-		: "=r" (temp) : "r" ((((word_t)faddr>>13)<<13) | space->get_asid()->get()),
-		  "r" (pg1->translation()->get_raw()), "r" (pg2->translation()->get_raw())
-	    );
-	    return;
-	}
-	pg->translation ()->put_tc (faddr, page_shift (pgsize),
-					space->get_asid()->get());
-	return;
-    }
-
-    while (1) {
-	__asm__ __volatile__ (
-	    "move	$29, %0	    \n\r"
-	    "j	_mips64_xtlb_fall_through \n\r"
-	    :: "r" (frame)
-	);
-    }
-}
-
-/**
- * Handle a TLB and Software TLB Cache miss
- * @param faddr  faulting address
- * @param frame  context frame of saved process
- */
-extern "C" void handle_stlb_miss (addr_t faddr, mips64_irq_context_t * frame)
-{
-    space_t * space = get_current_tcb ()->get_space();
-    pgent_t::pgsize_e pgsize;
-    space_t::access_e access;
-    pgent_t * pg;
-    bool kernel, twice;
-
-    if(space == NULL)
-	space = get_kernel_space();
-
-    if ((word_t)faddr & KTCB_AREA_START)
-    {
-	faddr = (addr_t)((word_t)faddr | (1UL << (hw_pgshifts[pgent_t::size_max+1]-1)));
-    }
-
-    // TRACEF("(%016lx, %p) %d\n", faddr, space, get_current_cpu());
-
-    access = (frame->cause & CAUSE_EXCCODE) == (3<<2) ? /* TLBS (write) */
-	    space_t::write : space_t::read;
-
-    twice = false;
-
-    while (1)
-    {
-	// Check if mapping exist in page table
-	if (space->lookup_mapping (faddr, &pg, &pgsize))
-	{
-	    if (((access == space_t::write) && pg->is_writable(space, pgsize)) ||
-		((access == space_t::read) && pg->is_readable(space, pgsize)) )
-	    {
-		pg->translation ()->put_tc (faddr, page_shift (pgsize),
-			    space->get_asid()->get());
-		return;
-	    }
-	}
-	if (twice) return;
-
-	if (space->is_user_area(faddr))
-	    kernel = frame->status & ST_KSU ? false : true;
-	else
-	    kernel = true;	/* User-space will cause address error */
-
-	space->handle_pagefault (faddr, (addr_t)frame->epc, access, kernel);
-
-	twice = true;
-    }
-}
-
-/**
- * Handle a TLB MOD exception
- * @param faddr  faulting address
- * @param frame  context frame of saved process
- */
-extern "C" void handle_tlb_mod (addr_t faddr, mips64_irq_context_t * frame)
-{
-    space_t * space = get_current_tcb ()->get_space();
-    pgent_t::pgsize_e pgsize;
-    pgent_t * pg;
-
-    if(space == NULL)
-	space = get_kernel_space();
-
-    if ((word_t)faddr & KTCB_AREA_START)
-    {
-	faddr = (addr_t)((word_t)faddr | (1UL << (hw_pgshifts[pgent_t::size_max+1]-1)));
-    }
-
-    // Check if mapping exist in page table
-    if (space->lookup_mapping (faddr, &pg, &pgsize))
-    {
-	if (pg->is_writable (space, pgsize))
-	{
-	    pg->translation ()->put_tc (faddr, page_shift (pgsize),
-					space->get_asid()->get());
-	    return;
-	}
-    }
-
-    // TRACEF("(%016lx, %p) %d\n", faddr, space, get_current_cpu());
-
-    space->handle_pagefault (faddr, (addr_t)frame->epc, space_t::write,
-			frame->status & ST_KSU ? false : true);
-}
-
-/**
- * Add a mapping into this address space
- */
-void space_t::add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size, 
-			  bool writable, bool kernel)
-{
-    pgent_t * pg = this->pgent (pagedir_idx (vaddr), 0);
-    pgent_t::pgsize_e pgsize = pgent_t::size_max;
-
-    /*
-     * Sanity checking on page size
-     */
-
-    if (! is_page_size_valid (size))
-    {
-	printf ("Mapping invalid pagesize (%dKB)\n", page_size (pgsize) >> 10);
-	enter_kdebug ("invalid page size");
-	return;
-    }
-
-    /*
-     * Lookup mapping
-     */
-
-    tlb_lock.lock();
-    while (pgsize > size)
-    {
-	if (pg->is_valid (this, pgsize))
-	{
-	    // Sanity check
-	    if (! pg->is_subtree (this, pgsize))
-	    {
-		printf ("%dKB mapping @ %p space %p already exists.\n",
-			page_size (pgsize) >> 10, vaddr, this);
-		enter_kdebug ("mapping exists");
-
-		tlb_lock.unlock();
-		return;
-	    }
-	}
-	else
-	{
-	    // Create subtree
-	    pg->make_subtree (this, pgsize, kernel);
-	}
-
-	pg = pg->subtree (this, pgsize)->next
-	    (this, pgsize-1, page_table_index (pgsize-1, vaddr));
-	pgsize--;
-    }
-
-    /*
-     * Modify page table
-     */
-
-    pg->set_entry (this, pgsize, paddr, 7, kernel);
-    pg->translation ()->set (
-		    translation_t::l4default,
-		    true, writable, kernel, paddr);
-    tlb_lock.unlock();
-
-    /*
-     * Insert translation into TLB
-     */
-
-    pg->translation ()->put_tc (vaddr, page_shift (pgsize), this->get_asid()->get());
-}
diff --git a/kernel/src/glue/v4-mips64/space.h b/kernel/src/glue/v4-mips64/space.h
deleted file mode 100644
index 53dad823..00000000
--- a/kernel/src/glue/v4-mips64/space.h
+++ /dev/null
@@ -1,308 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003, 2006,   University of New South Wales
- *                
- * File path:     glue/v4-mips64/space.h
- * Description:   MIPS64 specific space implementation.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.h,v 1.22 2006/11/14 18:44:56 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__SPACE_H__
-#define __GLUE__V4_MIPS64__SPACE_H__
-
-#include <debug.h> /* for UNIMPLMENTED() */
-
-#include INC_API(types.h)
-
-#include INC_API(fpage.h)			/* fpage_t	*/
-#include INC_API(thread.h)			/* threadid_t	*/
-#include INC_GLUE(config.h)
-#include INC_ARCH(pgent.h)
-#include INC_ARCH(tlb.h)
-#include <asid.h>
-
-// Even if new MDB is not used we need the mdb_t::ctrl_t
-#include <mdb.h>
-
-/* forward declarations - space_t depends on tcb_t and utcb_t */
-class tcb_t;
-class utcb_t;
-
-/**
- * The address space representation
- */
-class space_t {
-
-public:
-    /* TCB management */
-    void allocate_tcb(addr_t addr);
-    void map_dummy_tcb(addr_t addr);
-    utcb_t * allocate_utcb (tcb_t * tcb);
-
-    tcb_t * get_tcb(threadid_t tid);
-    tcb_t * get_tcb(void * ptr);
-
-    /* Address ranges */
-    inline bool is_user_area (addr_t addr);
-    bool is_user_area (fpage_t fpage);
-    bool is_tcb_area (addr_t addr);
-    bool is_mappable (addr_t addr);
-    bool is_mappable (fpage_t addr);
-    bool is_arch_mappable (addr_t addr, size_t size) { return true; }
-
-    /* Copy area related methods */
-    bool is_copy_area (addr_t addr);
-    word_t get_copy_limit (addr_t addr, word_t limit);
-
-    /* kip and utcb handling */
-    fpage_t get_kip_page_area();
-    fpage_t get_utcb_page_area();
-
-    /* reference counting */
-    void add_tcb(tcb_t * tcb);
-    bool remove_tcb(tcb_t * tcb);
-
-    /* space control */
-    word_t space_control (word_t ctrl) { return 0; }
-
-    /* space update hooks */
-    static void begin_update (void) {}
-    static void end_update (void) {}
-
-    bool is_initialized();
-
-    void map_fpage(fpage_t snd_fpage, word_t snd_base, space_t * dst_space, fpage_t rcv_fpage, bool grant);
-    fpage_t unmap_fpage(fpage_t fpage, bool flush, bool unmap_all);
-    fpage_t mapctrl (fpage_t fpage, mdb_t::ctrl_t ctrl,
-		     word_t attribute, bool unmap_all);
-    void init(fpage_t utcb_area, fpage_t kip_area);
-    void free();
-
-    enum access_e {
-	read, write, readwrite, execute,
-    };
-    void handle_pagefault(addr_t addr, addr_t ip, access_e access, bool kernel);
-    void map_sigma0(addr_t addr);
-    bool sync_kernel_space(addr_t addr);
-    utcb_t * map_utcb(utcb_t * utcb);
-    utcb_t * utcb_to_kernel_space(utcb_t * utcb);
-
-    /* Methods needed by linear page table walker. */
-    pgent_t * pgent (word_t num, word_t cpu = 0);
-    bool lookup_mapping (addr_t vaddr, pgent_t ** pg,
-			 pgent_t::pgsize_e * size);
-    bool readmem (addr_t vaddr, word_t * contents);
-    static word_t readmem_phys (addr_t paddr)
-	{ return *(word_t*)phys_to_virt((word_t*)paddr); }
-    void release_kernel_mapping (addr_t vaddr, addr_t paddr, word_t log2size);
-
-    void init_kernel_mappings(void);
-    void add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size, bool writable, bool kernel);
-
-    /* TLB releated methods used by linear page table walker. */
-    void flush_tlb (space_t * curspace);
-    void flush_tlbent (space_t * curspace, addr_t vaddr, word_t log2size);
-    bool does_tlbflush_pay (word_t log2size)
-	{ return false; }
-
-    /* MIPS64 specific */
-    asid_t *get_asid(void) 
-	{ return &asid; }
-
-private:
-
-    union {
-	struct {
-	    u64_t maps[(1 << 10) - 4];
-	    fpage_t kip_area;
-	    fpage_t utcb_area;
-	    word_t thread_count;
-	    /* MIPS sepecific */
-	    asid_t asid;
-	};
-	u64_t pagedir[(1 << 10)];
-    };
-};
-
-
-/**
- * get the KIP area of an address space
- * @returns the KIP area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_kip_page_area (void)
-{
-    return kip_area;
-}
-
-/**
- * get the UTCB area of an address space
- * @returns the utcb area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_utcb_page_area (void)
-{
-    return utcb_area;
-}
-
-INLINE bool space_t::is_user_area (addr_t addr)
-{
-    return (addr >= (addr_t) USER_AREA_START && 
-	    addr <= (addr_t) USER_AREA_END);
-}
-        
-INLINE bool space_t::is_tcb_area (addr_t addr)
-{
-    /* carl page table hack */
-    addr = (addr_t)((word_t)addr & (~(1UL << (hw_pgshifts[pgent_t::size_max+1]-1))));
-    return (addr >= (addr_t) KTCB_AREA_START &&
-	    addr <= (addr_t) KTCB_AREA_END);
-}
-
-/**
- * Check whether address resides within copy area.
- *
- * @param addr			address to check against
- *
- * @return true if address is within copy area; false otherwise
- */
-INLINE bool space_t::is_copy_area (addr_t addr)
-{
-    return (addr >= (addr_t)COPY_AREA_START &&
-	    addr < (addr_t)COPY_AREA_END);
-}
-
-/**
- * Get the limit of an IPC copy operation (e.g., copy from operation
- * is not allowed to go beyond the boundaries of the user area).
- *
- * @param addr			address to copy from/to
- * @param limit			intended copy size
- *
- * @return limit clipped to the allowed copy size
- */
-INLINE word_t space_t::get_copy_limit (addr_t addr, word_t limit)
-{
-    word_t end = (word_t)addr + limit;
-
-    if (is_user_area (addr))
-    {
-	// Address in user area.  Do not go beyond user-area boundary.
-	if (end >= USER_AREA_END)
-	    return (USER_AREA_END - (word_t) addr);
-    }
-    else
-    {
-	// Address in copy-area.  Make sure that we do not go beyond
-	// the boundary of current copy area.
-	ASSERT (is_copy_area (addr));
-	if (addr_align (addr, COPY_AREA_SIZE) !=
-	    addr_align ((addr_t) end, COPY_AREA_SIZE))
-	{
-	    return (word_t) addr_align_up (addr, COPY_AREA_SIZE) -     
-		(word_t) addr;
-	}
-    }
-
-    return limit;
-}
-
-INLINE space_t* get_kernel_space()
-{
-    extern space_t * kernel_space;
-    return kernel_space;
-}
-
-INLINE space_t * get_saved_pagetable(void)
-{
-    word_t  saved_page_table;
-    asm (
-	"dmfc0	%0, "STR(CP0_CONTEXT)"\n\t"
-	"dsra	%0, %0, 32\n\t"
-	: "=r" (saved_page_table)
-    );
-
-    return (space_t *) saved_page_table;
-};
-
-
-/**
- * translates a global thread ID into a valid tcb pointer
- * @param tid thread ID
- * @returns pointer to the TCB of thread tid
- */
-INLINE tcb_t * space_t::get_tcb( threadid_t tid )
-{
-    return (tcb_t *) (KTCB_AREA_START +
-		    ((tid.get_threadno() & (VALID_THREADNO_MASK)) * KTCB_SIZE));
-}
-
-/**
- * translates a pointer within a tcb into a valid tcb pointer
- * @param ptr pointer to somewhere in the TCB
- * @returns pointer to the TCB
- */
-INLINE tcb_t * space_t::get_tcb (void * ptr)
-{
-    return (tcb_t *)((word_t)(ptr) & KTCB_MASK);
-}
-
-
-/**
- * adds a thread to the space
- * @param tcb pointer to thread control block
- */
-INLINE void space_t::add_tcb(tcb_t * tcb)
-{
-    thread_count++;
-}
-
-/**
- * removes a thread from a space
- * @param tcb_t thread control block
- * @return true if it was the last thread
- */
-INLINE bool space_t::remove_tcb(tcb_t * tcb)
-{
-    thread_count--;
-    return (thread_count == 0);
-}
-
-INLINE pgent_t *space_t::pgent (word_t num, word_t cpu)
-{
-    return ((pgent_t *)this)->next(this, pgent_t::size_max, num);
-}
-
-INLINE void space_t::flush_tlb(space_t * curspace)
-{
-    flush_tc (this->get_asid()->get());
-}
-
-INLINE void space_t::flush_tlbent(space_t * curspace, addr_t vaddr, word_t log2size)
-{
-    purge_tc (vaddr, log2size, this->get_asid()->get());
-}
-
-void init_kernel_space(void);
-
-#endif /* !__GLUE__V4_MIPS64__SPACE_H__ */
diff --git a/kernel/src/glue/v4-mips64/syscalls.S b/kernel/src/glue/v4-mips64/syscalls.S
deleted file mode 100644
index 92d0b863..00000000
--- a/kernel/src/glue/v4-mips64/syscalls.S
+++ /dev/null
@@ -1,324 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/syscalls.S
- * Created:       20/08/2002 by Carl van Schaik
- * Description:   Kernel entry points for syscalls
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.S,v 1.24 2004/12/09 01:11:33 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(regdef.h)
-#include INC_GLUE(context.h)
-#include INC_GLUE(syscalls.h)
-#include <asmsyms.h>
-#include <tcb_layout.h>
-
-#define mr0	    v1
-#define mr1	    s0
-#define mr2	    s1
-#define mr3	    s2
-#define mr4	    s3
-#define mr5	    s4
-#define mr6	    s5
-#define mr7	    s6
-#define mr8	    s7
-
-#define DECODE_SYSCALL_IPC		    \
-1:;					    \
-	.set push;			    \
-	.set noreorder;			    \
-	li	t4, SYSCALL_ipc;	    \
-	bne	v0, t4, 1f;		    \
-	lui	ra, %hi(_mips64_l4sysipc_return);		    \
-	dli	t4, -4096;		    /* tcb mask */	    \
-	and	t5, sp, t4;		    /* t5 = current tcb */  \
-	ld	t5, OFS_TCB_UTCB(t5);	    /* t5 = current utcb */ \
-	daddiu	ra, %lo(_mips64_l4sysipc_return);		    \
-	sd	s8, PT_S8(sp);		    \
-	sd	mr0, 128(t5);		    \
-	sd	mr1, 136(t5);		    \
-	sd	mr2, 144(t5);		    \
-	sd	mr3, 152(t5);		    \
-	sd	mr4, 160(t5);		    \
-	sd	mr5, 168(t5);		    \
-	sd	mr6, 176(t5);		    \
-	sd	mr7, 184(t5);		    \
-	j	sys_ipc;		    \
-	sd	mr8, 192(t5);		    \
-1:;	\
-	lui	ra, %hi(_mips64_l4syscall_return);	\
-	dsubu	t4, t4, 1;		    \
-	.set pop;
-
-#define DECODE_SYSCALL(name, vector)	    \
-	.set push;			    \
-	.set noreorder;			    \
-1:	bne	v0, t4, 1f;		    \
-	dsubu	t4, t4, 1;		    \
-	j	sys_##name;		    \
-	daddiu	ra, %lo(_mips64_l4syscall_return);   \
-	.set pop;
-
-#define SKIPDECODE_SYSCALL(name, vector)    \
-	.set push;			    \
-	.set noreorder;			    \
-1:	bne	v0, t4, 1f;		    \
-	dsubu	t4, t4, 1;		    \
-	li	AT, L4_TRAP_KDEBUG;	    \
-	dla	v0, 2f;			    \
-	break;				    \
-	.data;				    \
-2:	.string "Unsupported SYSCALL";	    \
-	.previous;			    \
-	.set pop;
-
-
-#if 0
-#define	START_SYSCALL_COUNTER	    \
-	mfc0	k0, CP0_COUNT;	    \
-	nop;			    \
-	nop;			    \
-	mtc0	k0, CP0_ERROREPC
-
-#define STOP_SYSCALL_COUNTER	    \
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	nop;	\
-	mfc0	t2, CP0_COUNT;	    \
-	mfc0	t3, CP0_ERROREPC;   \
-	nop;	\
-	nop;	\
-	dsub	AT, t2, t3;	    \
-	dsll	AT, AT, 1;
-
-#if CONFIG_PLAT_ERPCN01
-#define d0 k0
-#define d1 k1
-#define PRINT_SYSCALL_TIMES	\
-	li	t2, 28;		\
-1:;	\
-	dsrlv	t3, AT, t2;	\
-	andi	t3, 0xf;	\
-	sub	t3, 10;		\
-	bgez	t3, 2f;		\
-	add	t3, '0'+10;	\
-	b 3f;			\
-2:;	\
-	add	t3, 'a';	\
-3:;	\
-	dla     d0, propane_uart;   \
-	ld	d0, 0(d0);	\
-4:;	\
-	lw      d1,8(d0);	\
-	andi    d1,d1,0xf;	\
-	sltiu   d1,d1,13;	\
-	beqz    d1,4b;		\
-	sw      t3,4(d0);	\
-	sub	t2, 4;		\
-	bgez	t2, 1b;		\
-	\
-	li	t3, '\r';	\
-4:;	\
-	lw      d1,8(d0);	\
-	andi    d1,d1,0xf;	\
-	sltiu   d1,d1,13;	\
-	beqz    d1,4b;		\
-	sw      t3,4(d0);	\
-	li	t3, '\n';	\
-4:;	\
-	lw      d1,8(d0);	\
-	andi    d1,d1,0xf;	\
-	sltiu   d1,d1,13;	\
-	beqz    d1,4b;		\
-	sw      t3,4(d0)
-
-#endif
-
-#if CONFIG_PLAT_U4600
-#define PRINT_SYSCALL_TIMES	\
-	SAVE_ALL_INT		\
-	\
-	li	t2, 60;		\
-1:;	\
-	dsrlv	a0, AT, t2;	\
-	andi	a0, 0xf;	\
-	sub	a0, 10;		\
-	bgez	a0, 2f;		\
-	add	a0, '0'+10;	\
-	b 3f;			\
-2:;	\
-	add	a0, 'a';	\
-3:;	\
-	jal	_Z11putc_serialc;\
-	sub	t2, 4;		\
-	bgez	t2, 1b;		\
-	\
-	li	a0, '\n';	\
-	jal	_Z11putc_serialc;\
-	\
-	RESTORE_ALL
-#endif
-
-#else
-#define	START_SYSCALL_COUNTER
-#define STOP_SYSCALL_COUNTER
-#define PRINT_SYSCALL_TIMES
-#endif
-
-	.set noat
-	.set noreorder
-BEGIN_PROC(__mips64_interrupt)
-	mfc0    k1, CP0_CAUSE
-	lui	k0, %hi(exception_handlers)
-	andi    k1, k1, 0x7c
-	dsll    k1, k1, 1
-	add	k0, k0, k1
-	ld      k0, %lo(exception_handlers)(k0)
-	jr      k0
-	nop
-END_PROC(__mips64_interrupt)
-
-	.set reorder
-BEGIN_PROC(_mips64_l4syscall)
-	START_SYSCALL_COUNTER
-	/* Trashed registers:
-	 *   t4, t5, t6, t7
-	 * Calling Registers:
-	 *   v0 : syscall number
-	 *   a0, a1, a2, a3 : arguments 1 - 4
-	 *   t0, t1, t2, t3 : arguments 5 - 8
-	 * Returned Registers:
-	 *   v0	    : returned 1
-	 *   a0..a3 : returned 2 - 5
-	 *   t0..t1 : returned 6 - 7
-	 */
-	.set noat
-	bgez	v0, _mips64_syscall_exception	/* Not an L4 system call? */
-	mfc0	t7, CP0_STATUS		/* get STATUS register */
-	lui	t5, %hi(K_STACK_BOTTOM)	/* Load kernel stack base address */
-	move	t4, sp			/* Old stack in t4 */
-
-	srl	t6, t7, 5		/* clear IE, EXL, ERL, KSU */
-	sll	t6, t6, 5
-	mtc0	t6, CP0_STATUS		/* Enter kernel mode */
-	andi	t6, t7, ST_KSU		/* Isolate KSU bits */
-
-	.set noreorder
-	beq	t6, zero, 9f		/* Branch if from KERNEL mode */
-	dmfc0	t6, CP0_EPC		/* Branch delay */
-	.set reorder
-
-	ld	sp, %lo(K_STACK_BOTTOM)(t5)	/* Load saved stack */
-
-9:
-	daddu	t6, t6, 4		/* Calc New EPC */
-	dsubu	sp, sp, PT_SIZE		/* New stack pointer */
-	sd	ra, PT_RA(sp)		/* Save RA */
-	sd	t7, PT_STATUS(sp)	/* Save status */
-	sd	t4, PT_SP(sp)		/* Save stack */
-	sd	t6, PT_EPC(sp)		/* Save EPC */
-
-	/* XXX decode must be in this order ! */
-	DECODE_SYSCALL_IPC					/* 3 in, 1 out */
-	DECODE_SYSCALL(thread_switch, SYSCALL_thread_switch)	/* 1 in, 0 out */
-	DECODE_SYSCALL(thread_control, SYSCALL_thread_control)	/* 5 in, 1 out */
-	DECODE_SYSCALL(exchange_registers, SYSCALL_exchange_registers)	/* 8 in, 7 out */
-	DECODE_SYSCALL(schedule, SYSCALL_schedule)		/* 5 in, 2 out */
-	DECODE_SYSCALL(unmap, SYSCALL_unmap)			/* 1 in, 0 out */
-	DECODE_SYSCALL(space_control, SYSCALL_space_control)	/* 5 in, 2 out */
-	SKIPDECODE_SYSCALL(processor_control,SYSCALL_processor_control)
-	DECODE_SYSCALL(memory_control,SYSCALL_memory_control)   /* 3 in, 1 out */
-	DECODE_SYSCALL(clock,SYSCALL_system_clock)		/* 0 in, 1 out */
-	nop
-
-1:
-	li	AT, L4_TRAP_KDEBUG
-	dla	v0, 2f
-	break
-	.data
-2:	.string "Unknown SYSCALL"
-	.previous
-	.set at
-END_PROC(_mips64_l4syscall)
-
-BEGIN_PROC(_mips64_l4sysipc_return)
-	dli	t4, -4096		    /* tcb mask */
-	and	t5, sp, t4		    /* t5 = current tcb */
-	ld	t5, OFS_TCB_UTCB(t5)	    /* t5 = current utcb */
-	ld	s8, PT_S8(sp)
-	ld	mr0, 128(t5)
-	ld	mr1, 136(t5)
-	ld	mr2, 144(t5)
-	ld	mr3, 152(t5)
-	ld	mr4, 160(t5)
-	ld	mr5, 168(t5)
-	ld	mr6, 176(t5)
-	ld	mr7, 184(t5)
-	ld	mr8, 192(t5)
-
-_mips64_l4syscall_return:
-	mfc0	t6, CP0_STATUS
-	ld	t7, PT_SP(sp)		/* load stack */
-	ori	t6, t6, ST_EXL		/* set Exception Level */
-	mtc0	t6, CP0_STATUS		/* to disable interrupts, we now can set EPC */
-	ld	t4, PT_STATUS(sp)	/* load status */
-	ld	t5, PT_EPC(sp)		/* load epc */
-	ld	ra, PT_RA(sp)		/* load ra */
-
-	STOP_SYSCALL_COUNTER
-	PRINT_SYSCALL_TIMES
-
-	dmtc0	t5, CP0_EPC		/* restore EPC */ 
-	li	t3, CONFIG_MIPS64_STATUS_MASK
-	dsrl	t5, sp, 12
-	move	sp, t7			/* restore stack */
-	and	t6, t3, t6		/* compute new status register */
-	nor	t3, zero, t3
-	and	t4, t3, t4
-	or	t7, t6, t4		/*            " "              */
-	mtc0	t7, CP0_STATUS		/* new status value */
-	dsll	t5, t5, 12		/* Get TCB pointer */
-	ld	k0, OFS_TCB_MYSELF_LOCAL(t5)	/* Load UTCB into k0 */
-nop
-	eret
-
-.set at
-END_PROC(_mips64_l4sysipc_return)
-
-	.set reorder
-BEGIN_PROC(_mips64_syscall_exception)
-	SAVE_ALL_INT
-
-	move	a0, sp
-	jal	syscall_exception
-
-	j	_mips64_restore_user
-END_PROC(_mips64_syscall_exception)
diff --git a/kernel/src/glue/v4-mips64/syscalls.h b/kernel/src/glue/v4-mips64/syscalls.h
deleted file mode 100644
index eaaea513..00000000
--- a/kernel/src/glue/v4-mips64/syscalls.h
+++ /dev/null
@@ -1,230 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/syscalls.h
- * Description:   Syscall specific macros
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.20 2005/02/22 05:29:10 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__SYSCALLS_H__
-#define __GLUE__V4_MIPS64__SYSCALLS_H__
-
-#if defined(ASSEMBLY)
-#define UL(x)	(x)
-#else
-#define UL(x)	(x##ul)
-#endif
-
-
-#define L4_TRAP_KPUTC			UL(-100)
-#define L4_TRAP_KGETC			UL(-101)
-#define L4_TRAP_KDEBUG			UL(-102)
-#define L4_TRAP_UNUSED			UL(-103)
-#define L4_TRAP_KGETC_NB		UL(-104)
-#define L4_TRAP_READ_PERF		UL(-110)
-#define L4_TRAP_WRITE_PERF		UL(-111)
-#define L4_TRAP_KSET_THRD_NAME		UL(-120)
-
-/* The syscall assembler depends on the values below */
-#define SYSCALL_ipc			UL(-101)
-#define SYSCALL_thread_switch		UL(-102)
-#define SYSCALL_thread_control		UL(-103)
-#define SYSCALL_exchange_registers	UL(-104)
-#define SYSCALL_schedule		UL(-105)
-#define SYSCALL_unmap			UL(-106)
-#define SYSCALL_space_control		UL(-107)
-#define SYSCALL_processor_control	UL(-108)
-#define SYSCALL_memory_control		UL(-109)
-#define SYSCALL_system_clock		UL(-110)
-
-#if !defined(ASSEMBLY)
-
-//
-// System call function attributes.
-//
-
-#define SYSCALL_ATTR(sec_name)
-
-#define SYS_IPC_RETURN_TYPE                     threadid_t
-#define SYS_THREAD_CONTROL_RETURN_TYPE          word_t
-#define SYS_EXCHANGE_REGISTERS_RETURN_TYPE      threadid_t
-#define SYS_SPACE_CONTROL_RETURN_TYPE           word_t
-#define SYS_SCHEDULE_RETURN_TYPE                word_t
-#define SYS_MEMORY_CONTROL_RETURN_TYPE          word_t
-
-//
-// Syscall declaration wrappers.
-//
-
-#define SYS_IPC(to, from, timeout)				\
-  SYS_IPC_RETURN_TYPE SYSCALL_ATTR ("ipc") 			\
-  sys_ipc (to, from, timeout)
-
-#define SYS_THREAD_CONTROL(dest, space, scheduler, pager, utcb)	\
-  SYS_THREAD_CONTROL_RETURN_TYPE SYSCALL_ATTR ("thread_control")\
-  sys_thread_control (dest, space, scheduler, pager, utcb)
-
-#define SYS_SPACE_CONTROL(space, control, kip_area, utcb_area,	\
-			  redirector)				\
-  SYS_SPACE_CONTROL_RETURN_TYPE SYSCALL_ATTR ("space_control")	\
-  sys_space_control (space, control, kip_area, utcb_area,	\
-		     redirector)
-
-#define SYS_SCHEDULE(dest, time_control, processor_control,	\
-		     prio, preemption_control)			\
-  SYS_SCHEDULE_RETURN_TYPE SYSCALL_ATTR ("schedule")		\
-  sys_schedule (dest, time_control, processor_control,		\
-		prio, preemption_control)
-
-#define SYS_EXCHANGE_REGISTERS(dest, control, usp, uip, uflags,	\
-			uhandle, pager, is_local)		\
-  SYS_EXCHANGE_REGISTERS_RETURN_TYPE SYSCALL_ATTR ("exchange_registers")	\
-  sys_exchange_registers (dest, control, usp, uip,		\
-			  uflags, uhandle, pager, is_local)
-
-#define SYS_THREAD_SWITCH(dest)					\
-  void SYSCALL_ATTR ("thread_switch")				\
-  sys_thread_switch (dest)
-
-#define SYS_UNMAP(control)					\
-  void SYSCALL_ATTR ("unmap") sys_unmap (control)
-
-#define SYS_PROCESSOR_CONTROL(processor_no, internal_frequency,	\
-			      external_frequency, voltage)	\
-  void SYSCALL_ATTR ("processor_control")			\
-  sys_processor_control (processor_no, internal_frequency,	\
-			 external_frequency, voltage)
-
-#define SYS_MEMORY_CONTROL(control, attribute0, attribute1,	\
-			   attribute2, attribute3)		\
-  SYS_MEMORY_CONTROL_RETURN_TYPE SYSCALL_ATTR ("memory_control")	\
-  sys_memory_control (control, attribute0, attribute1,		\
-		      attribute2, attribute3)
-
-/**
- * The application gets the kernel info page by doing some illegal instruction, with 
- * at ($1) == 0x1face (interface) ca11 (call) 14 (L4) e1f (ELF) 64 (MIPS64)
- */
-#define MAGIC_KIP_REQUEST          (0x1FACECA1114e1f64ULL)
-
-
-/**
- * Preload registers and return from sys_ipc
- * @param from The FROM value after the system call
- */
-
-#define return_ipc(from)	return (from)
-
-
-/**
- * Preload registers and return from sys_thread_control
- * @param result The RESULT value after the system call
- */
-
-#define return_thread_control(result)	return (result)
-
-/**
- * Preload registers and return from sys_exchange_registers
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- * @param sp The SP value after the system call
- * @param ip The IP value after the system call
- * @param flags The FLAGS value after the system call
- * @param pager The PAGER value after the system call
- * @param handle The USERDEFINEDHANDLE value after the system call
- */
-
-#define return_exchange_registers(result, control, sp, ip, flags, pager, handle)    \
-{								\
-    register word_t ctrl asm("$4") = control;	/* a0 */	\
-    register word_t sp_r asm("$5") = sp;	/* a1 */	\
-    register word_t ip_r asm("$6") = ip;	/* a2 */	\
-    register word_t flg asm("$7") = flags;	/* a3 */	\
-    register word_t pgr asm("$8") = pager.get_raw();	/* t0 */	\
-    register word_t hdl asm("$9") = handle;	/* t1 */	\
-\
-    __asm__ __volatile__ (					\
-	"" : : "r" (ctrl), "r" (sp_r), "r" (ip_r),		\
-	"r" (flg), "r" (pgr), "r" (hdl)				\
-    );								\
-    return (result);						\
-}
-
-
-/**
- * Return from sys_thread_switch
- */
-#define return_thread_switch()	return
-
-
-/**
- * Return from sys_unmap
- */
-#define return_unmap() return
-
-
-/**
- * Preload registers and return from sys_thread_switch
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- */
-#define return_space_control(result, control)		\
-{   \
-    register word_t c asm("$4") = control; /* a0 */	\
-    __asm__ __volatile__ (				\
-	"" : : "r" (c)					\
-    );							\
-    return (result);					\
-}
-
-
-/**
- * Preload registers and return from sys_schedule
- * @param result The RESULT value after the system call
- * @param time_control The TIME_CONTROL value after the system call
- */
-#define return_schedule(result, time_control)		    \
-{   \
-    register word_t c asm("$4") = time_control;	/* a0 */    \
-    __asm__ __volatile__ (				    \
-	"" : : "r" (c)					    \
-    );							    \
-    return (result);					    \
-}
-
-/**
- * Return from sys_memory_control
- */
-#define return_memory_control(result)	return (result)
-
-/**
- * Return from sys_processor_control
- */
-#define return_processor_control() return
-
-#endif /* !ASSEMBLY */
-
-#endif /* !__GLUE__V4_MIPS64__SYSCALLS_H__ */
diff --git a/kernel/src/glue/v4-mips64/tcb.h b/kernel/src/glue/v4-mips64/tcb.h
deleted file mode 100644
index bee6c1f1..00000000
--- a/kernel/src/glue/v4-mips64/tcb.h
+++ /dev/null
@@ -1,623 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004, 2006,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/tcb.h
- * Description:   TCB related functions for Version 4, MIPS64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tcb.h,v 1.53 2006/10/20 21:32:09 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__TCB_H__
-#define __GLUE__V4_MIPS64__TCB_H__
-
-#ifndef __API__V4__TCB_H__
-#error not for stand-alone inclusion
-#endif
-
-#include <debug.h>
-
-#include INC_ARCH(types.h)
-#include INC_API(syscalls.h)		/* for sys_ipc */
-#include INC_API(space.h)
-#include INC_ARCH(page.h)
-#include INC_GLUE(context.h)
-#include INC_GLUE(resource_functions.h)
-#include INC_PLAT(cache.h)
-
-/**
- * read value of message register
- * @param index number of message register
- */
-INLINE word_t tcb_t::get_mr(word_t index)
-{
-    return get_utcb()->mr[index];
-}
-
-/**
- * set the value of a message register
- * @param index number of message register
- * @param value value to set
- */
-INLINE void tcb_t::set_mr(word_t index, word_t value)
-{
-    get_utcb()->mr[index] = value;
-}
-
-
-/**
- * copies a set of message registers from one UTCB to another
- * @param dest destination TCB
- * @param start MR start index
- * @param count number of MRs to be copied
- */
-
-INLINE void tcb_t::copy_mrs(tcb_t * dest, word_t start, word_t count)
-{
-    ASSERT(start + count <= IPC_NUM_MR);
-    word_t tmp1, tmp2, tmp3, tmp4, tmp5;
-    tcb_t * myself = this;
-
-    __asm__ __volatile__ (
-	".set noreorder					\n"
-	"ld	%[dst_utcb], %[UTCB_OFF](%[dst]);	\n"
-	"ld	%[src_utcb], %[UTCB_OFF](%[src]);	\n"
-	"dsll	%[limit], %[count], 3;			\n"
-	"daddu	%[dst_utcb], %[start];			\n"
-	"daddu	%[src_utcb], %[start];			\n"
-	"andi	%[d2], %[count], 1;			\n"
-	"daddu	%[limit], %[src_utcb];			\n"
-	"beqz	%[d2], 2f;				\n"
-	"ld	%[d1], 128(%[src_utcb]);		\n"
-	"daddiu	%[src_utcb], 8;				\n"
-	"daddiu	%[dst_utcb], 8;				\n"
-	"beq	%[src_utcb], %[limit], 3f;		\n"
-	"sd	%[d1], 120(%[dst_utcb]);		\n"
-	"1:						\n"
-	"ld	%[d1], 128(%[src_utcb]);		\n"
-	"2:						\n"
-	"ld	%[d2], 136(%[src_utcb]);		\n"
-	"daddiu	%[dst_utcb], 16;			\n"
-	"daddiu	%[src_utcb], 16;			\n"
-	"sd	%[d1], 112(%[dst_utcb]);		\n"
-	"bne	%[src_utcb], %[limit], 1b;		\n"
-	"sd	%[d2], 120(%[dst_utcb]);		\n"
-	"3:						\n"
-	".set reorder					\n"
-	: [dst_utcb] "=r" (tmp1), [src_utcb] "=r" (tmp2),
-	  [limit] "=r" (tmp3), [d1] "=r" (tmp4), [d2] "=r" (tmp5),
-	  [count] "+r" (count), [dst] "+r" (dest),
-	  [src] "+r" (myself), [start] "+r" (start*8)
-	:
-	  [UTCB_OFF] "i" ((word_t)&this->utcb - (word_t)this)
-    );
-}
-
-/**
- * read value of buffer register
- * @param index number of buffer register
- */
-INLINE word_t tcb_t::get_br(word_t index)
-{
-    return get_utcb()->br[index];
-}
-
-/**
- * set the value of a buffer register
- * @param index number of buffer register
- * @param value value to set
- */
-INLINE void tcb_t::set_br(word_t index, word_t value)
-{
-    get_utcb()->br[index] = value;
-}
-
-
-/**
- * allocate the tcb
- * The tcb pointed to by this will be allocated.
- */
-INLINE void tcb_t::allocate()
-{
-    this->kernel_stack[0] = 0;
-
-/**
- * tcb_t::allocate: allocate memory for TCB
- *
- * Allocate memory for the given TCB.  We do this by generating a
- * write to the TCB area.  If TCB area is not backed by writable
- * memory (i.e., already allocated) the pagefault handler will
- * allocate the memory and map it.
- */
-
-}
-
-
-/**
- * set the address space a TCB belongs to
- * @param space address space the TCB will be associated with
- */
-INLINE void tcb_t::set_space(space_t * space)
-{
-    this->space = space;
-    // sometimes it might be desirable to use a pdir cache,
-    // like in cases where it's not cheap to derive the page
-    // directory from the space
-    //this->pdir_cache = (word_t)space->get_pdir();
-}
-
-
-/**
- * set the cpu in a TCB
- * @param cpu	new cpu number
- */
-
-INLINE void tcb_t::set_cpu(cpuid_t cpu) 
-{ 
-    this->cpu = cpu;
-    get_utcb()->processor_no = cpu;
-}
-
-
-/* XXX FIXME - This does not always get stack right! */
-INLINE void tcb_t::return_from_ipc (void)
-{
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-
-    __asm__ __volatile__ (
-	"move	$29, %0				\n"
-	"j	_mips64_l4sysipc_return	\n"
-	: : "r" (context)
-    );
-    while (1);
-    // NOT REACHED
-}
-
-/**
- * Short circuit a return path from a user-level interruption or
- * exception.  That is, restore the complete exception context and
- * resume execution at user-level.
- */
-INLINE void tcb_t::return_from_user_interruption (void)
-{
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-
-    __asm__ __volatile__ (
-	"move	$29, %0			\n"
-	"j	_mips64_restore_user	\n"
-	: : "r" (context)
-    );
-    while (1);
-    // NOT REACHED
-}
-
-/********************************************************************** 
- *
- *                      thread switch routines
- *
- **********************************************************************/
-
-extern word_t K_STACK_BOTTOM;
-
-#define mips64_initial_switch_to(d_stack, d_asid, d_space)	\
-__asm__ __volatile__ (		\
-    "dmtc0   %[asid], "STR(CP0_ENTRYHI)"\n\t" /* Set new ASID */		\
-    "move    $29, %[stack]\n\t"	    /* Install the new stack */		\
-    ".set noat;\n\t"	\
-    "dsll    $1, %[space], 32\n\t"	    \
-    "dmtc0   $1, "STR(CP0_CONTEXT)"\n\t" /* Save current Page Table */		\
-    ".set at;\n\t"	\
-    "or	    %[stack], 4096-1\n\t"	    \
-    "daddiu  %[stack], 1\n\t"		\
-    "sd     %[stack], 0(%[stack_bot])\n\t"	    \
-	    \
-    "ld      $31,32($29)\n\r"	    \
-    "ld      $16,0($29)\n\t"	    \
-    "ld      $17,8($29)\n\t"	    \
-    "ld      $30,16($29)\n\t"	    \
-    "ld      $28,24($29)\n\t"	    \
-    "daddiu  $29,$29,40\n\t"	    \
-    "jr	     $31\n\t"		    \
-    "0:		\t\t"		 /* Return Address */   \
-    : : [stack] "r" (d_stack),	    \
-        [asid]  "r" (d_asid),		    \
-	[space] "r" (d_space),		    \
-	[stack_bot]"r" (&K_STACK_BOTTOM)    \
-    : "$1", "$31", "memory"		    \
-    );	\
-    __asm__ __volatile__ ("" ::: "$2", "$3", "$4", "$5", "$6", "$7" );	    \
-    __asm__ __volatile__ ("" ::: "$8", "$9", "$10", "$23", "$24", "$25" );  \
-    __asm__ __volatile__ ("" ::: "$11", "$12", "$13", "$14", "$15" );	    \
-    __asm__ __volatile__ ("" ::: "$18", "$19", "$20", "$21", "$22" );
-
-/**
- * switch to initial thread
- * @param tcb TCB of initial thread
- *
- * Initializes context of initial thread and switches to it.  The
- * context (e.g., instruction pointer) has been generated by inserting
- * a notify procedure context on the stack.  We simply restore this
- * context.
- */
-INLINE void NORETURN initial_switch_to (tcb_t * tcb)
-{
-    hw_asid_t new_asid = get_kernel_space()->get_asid()->get();
-
-    //TRACEF("(%p), %p\n", tcb, tcb->stack);
-    cache_t::flush_cache_all();
-    mips64_initial_switch_to((word_t)tcb->stack, new_asid, (word_t)tcb->get_space());
-
-    ASSERT(!"We shouldn't get here!");
-    while(true) {}
-}
-
-/**
- * read the current instruction pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t get_my_ip(tcb_t *tcb)
-{
-    mips64_switch_stack_t * context = (mips64_switch_stack_t *)tcb->stack;
-
-    return (addr_t) (context)->ra;
-}
-
-/**
- * read the current stack pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t get_my_sp(tcb_t *tcb)
-{
-    mips64_switch_stack_t * context = (mips64_switch_stack_t *)tcb->stack;
-    context++;
-
-    return (addr_t) (context);
-}
-
-#define mips64_switch_to(t_stack, d_stack, d_asid, d_space)	\
-__asm__ __volatile__ (		    \
-    "daddiu  $29,$29,-40\n\t"	    \
-    "dla     $31,0f\n\t"	    \
-    "sd      $16,0($29)\n\t"		    /* save s0 */	\
-    "sd      $17,8($29)\n\t"	    	    /* save s1 */	\
-    "sd      $30,16($29)\n\t"	    	    /* save s8 */	\
-    "sd      $28,24($29)\n\t"	    	    /* save gp */	\
-    "sd      $31,32($29)\n\r"		    /* save ra */	\
-    \
-    "sd	    $29, 0(%[old_stack])\n\t"	    /* Store current stack in old_stack */	    \
-    \
-    "dmtc0   %[asid], "STR(CP0_ENTRYHI)"\n\t" /* Set new ASID */		\
-    "move    $29, %[new_stack]\n\t"	    /* Install the new stack */		\
-    ".set noat;\n\t"	\
-    "dsll    $1, %[space], 32\n\t"	    \
-    "dmtc0   $1, "STR(CP0_CONTEXT)"\n\t" /* Save current Page Table */		\
-    ".set at;\n\t"	\
-    "or	    %[new_stack], 4096-1\n\t"	    \
-    "daddiu  %[new_stack], 1\n\t"	    \
-    "sd     %[new_stack], 0(%[stack_bot])\n\t"	\
-	    \
-    "ld      $31,32($29)\n\r"		/* load ra */	\
-    "ld      $16,0($29)\n\t"		/* load s0 */	\
-    "ld      $17,8($29)\n\t"		/* load s1 */	\
-    "ld      $30,16($29)\n\t"	    	/* load s8 */	\
-    "ld      $28,24($29)\n\t"		/* load gp */	\
-    "daddiu  $29,$29,40\n\t"	    \
-    "jr	     $31\n\t"		    \
-    "0:		\t\t"		 /* Return Address */   \
-    : : [old_stack] "r" (t_stack),  \
-	[new_stack] "r" (d_stack),  \
-        [asid]  "r" (d_asid),	    \
-	[space] "r" (d_space),	    \
-	[stack_bot]"r" (&K_STACK_BOTTOM) :  \
-	"$1", "$31", "memory"		    \
-    );	\
-    __asm__ __volatile__ ("" ::: "$2", "$3", "$4", "$5", "$6", "$7" );	    \
-    __asm__ __volatile__ ("" ::: "$8", "$9", "$10", "$23", "$24", "$25" );  \
-    __asm__ __volatile__ ("" ::: "$11", "$12", "$13", "$14", "$15" );	    \
-    __asm__ __volatile__ ("" ::: "$18", "$19", "$20", "$21", "$22" );
-
-/**
- * switches to another tcb thereby switching address spaces if needed
- * @param dest tcb to switch to
- */
-INLINE void tcb_t::switch_to(tcb_t * dest)
-{
-    space_t *space = dest->get_space();
-    if (space == NULL)
-	space = get_kernel_space();
-    hw_asid_t new_asid = space->get_asid()->get();
-    mips64_switch_to((word_t)&this->stack, (word_t)dest->stack, new_asid, (word_t)space);
-}
-
-INLINE word_t *tcb_t::get_stack_top(void)
-{
-    /* Simon says : Evil? */
-    return (word_t *) ((char *) this + KTCB_SIZE);
-}
-
-
-/**
- * intialize stack for given thread
- */
-INLINE void tcb_t::init_stack()
-{
-    /* Create space for an exception context */
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-    stack = (word_t *) context; /* Update new stack position */
-
-    /* Clear whole context */
-    for (word_t * t = (word_t *) context; t < get_stack_top (); t++)
-	*t = 0;
-
-    //TRACEF("[%p] stack = %p\n", this, stack);
-}
-
-
-
-
-/**********************************************************************
- *
- *                        notification functions
- *
- **********************************************************************/
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)())
-{
-    stack = (word_t*)((mips64_switch_stack_t *)stack - 1);
-    ((mips64_switch_stack_t *)stack)->s8 = (word_t) func;
-    ((mips64_switch_stack_t *)stack)->ra = (word_t) mips64_return_from_notify0;
-
-    //TRACEF("%p (%p) , %016lx\n", this, func, (word_t)stack);
-}
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)(word_t), word_t arg1)
-{
-    stack = (word_t*)((mips64_switch_stack_t *)stack - 1);
-    ((mips64_switch_stack_t *)stack)->s8 = (word_t) func;
-    ((mips64_switch_stack_t *)stack)->s0 = arg1;
-    ((mips64_switch_stack_t *)stack)->ra = (word_t) mips64_return_from_notify1;
-
-    //TRACEF("%p (%p)(0x%x), %016lx\n", this, func, arg1, (word_t)stack);
-}
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- * @param arg2 2nd argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-
-INLINE void tcb_t::notify (void (*func)(word_t, word_t), word_t arg1, word_t arg2)
-{
-    stack = (word_t*)((mips64_switch_stack_t *)stack - 1);
-    ((mips64_switch_stack_t *)stack)->s8 = (word_t) func;
-    ((mips64_switch_stack_t *)stack)->s0 = arg1;
-    ((mips64_switch_stack_t *)stack)->s1 = arg2;
-    ((mips64_switch_stack_t *)stack)->ra = (word_t) mips64_return_from_notify2;
-
-    //TRACEF("%p (%p)(0x%x,0x%x), %016lx\n", this, func, arg1, arg2, (word_t)stack);
-}
-
-/**********************************************************************
- * 
- *            access functions for ex-regs'able registers
- *
- **********************************************************************/
-
-/**
- * read the user-level instruction pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_ip()
-{
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-
-    return (addr_t) (context)->epc;
-}
-
-/**
- * read the user-level stack pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_sp()
-{
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-
-    return (addr_t) (context)->sp;
-}
-
-
-/**
- * set the user-level instruction pointer
- * @param ip	new user-level instruction pointer
- */
-INLINE void tcb_t::set_user_ip(addr_t ip)
-{
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-
-    context->epc = (word_t)ip;
-}
-
-/**
- * set the user-level stack pointer
- * @param sp	new user-level stack pointer
- */
-INLINE void tcb_t::set_user_sp(addr_t sp)
-{
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-
-    context->sp = (word_t)sp;
-}
-
-INLINE word_t tcb_t::get_utcb_location()
-{
-    return myself_local.get_raw();
-}
-
-INLINE void tcb_t::set_utcb_location(word_t utcb_location)
-{
-    myself_local.set_raw (utcb_location);
-}
-
-
-/**
- * read the user-level flags (one word)
- * @return	the user-level flags
- */
-INLINE word_t tcb_t::get_user_flags (void)
-{
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-
-    return (context->status & USER_FLAG_READ_MASK);
-}
-
-/**
- * set the user-level flags
- * @param flags	new user-level flags
- */
-INLINE void tcb_t::set_user_flags (const word_t flags)
-{
-    mips64_irq_context_t * context =
-	(mips64_irq_context_t *) get_stack_top () - 1;
-
-    context->status = (context->status & ~USER_FLAG_WRITE_MASK) |
-		      (flags & USER_FLAG_WRITE_MASK);
-}
-
-/**********************************************************************
- *
- *                  copy-area related functions
- *
- **********************************************************************/
-
-INLINE void tcb_t::adjust_for_copy_area (tcb_t * dst, addr_t * s, addr_t * d)
-{
-    UNIMPLEMENTED ();
-}
-
-INLINE void tcb_t::release_copy_area (void)
-{
-//    UNIMPLEMENTED (); XXX if should not be a problem as long as get_copy_area is UNIMPLENTED
-}
-
-INLINE addr_t tcb_t::copy_area_real_address (addr_t addr)
-{
-    UNIMPLEMENTED ();
-    return addr;
-}
-
-
-/**********************************************************************
- *
- *                        global tcb functions
- *
- **********************************************************************/
-
-INLINE tcb_t * addr_to_tcb (addr_t addr)
-{
-    return (tcb_t *) ((word_t) addr & KTCB_MASK);
-}
-
-/**
- * Locate current TCB by using current stack pointer and return it.
- */
-INLINE tcb_t * get_current_tcb (void)
-{
-    register word_t stack_var asm("$29");
-
-    return (tcb_t *) (stack_var & KTCB_MASK);
-
-};
-
-#if defined(CONFIG_SMP)
-INLINE cpuid_t get_current_cpu (void)
-{
-    return get_idle_tcb ()->get_cpu ();
-}
-#endif
-
-/**
- * invoke an IPC from within the kernel
- *
- * @param to_tid destination thread id
- * @param from_tid from specifier
- * @param timeout IPC timeout
- * @return IPC message tag (MR0)
- */
-INLINE msg_tag_t tcb_t::do_ipc (threadid_t to_tid, threadid_t from_tid,
-                                timeout_t timeout)
-{
-    msg_tag_t tag;
-    sys_ipc(to_tid, from_tid, timeout);
-    tag.raw = get_mr (0);
-
-    return tag;
-}
-
-
-/**********************************************************************
- *
- *                  architecture-specific functions
- *
- **********************************************************************/
-
-/**
- * initialize architecture-dependent root server properties based on
- * values passed via KIP
- * @param space the address space this server will run in   
- * @param ip the initial instruction pointer           
- * @param sp the initial stack pointer
- */
-INLINE void tcb_t::arch_init_root_server (space_t * space, word_t ip, word_t sp)
-{ 
-}
-
-
-#endif /* !__GLUE__V4_MIPS64__TCB_H__ */
diff --git a/kernel/src/glue/v4-mips64/thread.cc b/kernel/src/glue/v4-mips64/thread.cc
deleted file mode 100644
index dede4d5b..00000000
--- a/kernel/src/glue/v4-mips64/thread.cc
+++ /dev/null
@@ -1,57 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     glue/v4-tmplarch/thread.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: thread.cc,v 1.7 2003/12/30 09:25:24 cvansch Exp $
- *                
- ********************************************************************/
-
-
-#include <debug.h>
-#include INC_API(tcb.h)
-
-extern "C" void _mips64_restore_user(void);
-/**
- * Setup TCB to execute a function when switched to
- * @param func pointer to function
- *
- * The old stack state of the TCB does not matter.
- */
-void tcb_t::create_startup_stack (void (*func)())
-{
-    /* Re-init the stack */
-    init_stack();
-
-    notify(_mips64_restore_user);
-
-    notify(func);
-
-    mips64_irq_context_t *context = (mips64_irq_context_t *) get_stack_top() - 1;
-
-    /* Set user mode */
-    context->status = ST_FR | ST_KX | ST_SX | ST_UX | ST_U | ST_EXL | ST_IE;
-}
diff --git a/kernel/src/glue/v4-mips64/timer.cc b/kernel/src/glue/v4-mips64/timer.cc
deleted file mode 100644
index 1fcf3c03..00000000
--- a/kernel/src/glue/v4-mips64/timer.cc
+++ /dev/null
@@ -1,77 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/timer.cc
- * Description:   Periodic timer handling 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.cc,v 1.12 2004/04/05 06:19:28 cvansch Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(schedule.h)
-#include INC_GLUE(timer.h)
-#include INC_GLUE(intctrl.h)
-
-#include INC_ARCH(addrspace.h)
-#include INC_ARCH(mips_cpu.h)
-
-timer_t timer UNIT("cpulocal");
-
-extern void putc(char chr);
-
-extern "C" void handle_timer_interrupt(word_t irq, mips64_irq_context_t * frame)
-{
-    s64_t compare = (u32_t)get_timer()->compare;
-    u32_t counter = (u32_t)read_32bit_cp0_register(CP0_COUNT);
-
-    s64_t difference = (counter < compare) ? (s64_t)counter + (1ul<<32) - compare : counter - compare;
-
-    while ((difference > 0)) {
-	    compare += TIMER_PERIOD;
-	    difference -= TIMER_PERIOD;
-    }
-
-    write_32bit_cp0_register (CP0_COMPARE, compare);
-    get_timer()->compare = (u32_t)compare;
-
-    get_current_scheduler()->handle_timer_interrupt();
-}
-
-void SECTION (".init")
-timer_t::init_global(void)
-{
-    get_interrupt_ctrl()->register_interrupt_handler(7, handle_timer_interrupt);
-}
-
-void SECTION (".init")
-timer_t::init_cpu(void)
-{
-    write_32bit_cp0_register(CP0_COUNT, 0);
-    write_32bit_cp0_register(CP0_COMPARE, TIMER_PERIOD);
-    compare = TIMER_PERIOD;
-
-    get_interrupt_ctrl()->unmask(7);
-}
diff --git a/kernel/src/glue/v4-mips64/timer.h b/kernel/src/glue/v4-mips64/timer.h
deleted file mode 100644
index a8304c16..00000000
--- a/kernel/src/glue/v4-mips64/timer.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/timer.h
- * Description:   MIPS64 timer handler 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.h,v 1.5 2003/09/24 19:04:50 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_MIPS64__TIMER_H__
-#define __GLUE__V4_MIPS64__TIMER_H__
-
-#include <timer.h>
-
-class timer_t : public generic_periodic_timer_t {
-public:
-    void init_global();
-    void init_cpu();
-    u32_t compare;
-};
-
-INLINE timer_t * get_timer()
-{
-    extern timer_t timer;
-    return &timer;
-}
-
-#endif /* __GLUE__V4_MIPS64__TIMER_H__ */
diff --git a/kernel/src/glue/v4-mips64/tlb.cc b/kernel/src/glue/v4-mips64/tlb.cc
deleted file mode 100644
index ebeb06d6..00000000
--- a/kernel/src/glue/v4-mips64/tlb.cc
+++ /dev/null
@@ -1,116 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/space.cc
- * Description:   VAS implementation 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tlb.cc,v 1.9 2003/11/17 05:30:19 cvansch Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>			/* for UNIMPLEMENTED	*/
-#include INC_ARCH(tlb.h)
-#include INC_PLAT(config.h)
-#include INC_ARCH(mipsregs.h)
-#include INC_GLUE(context.h)
-
-
-void SECTION (".init") init_tlb(void)
-{
-    word_t i;
-    TRACEF("Initialize TLB\n");
-
-    __asm__ __volatile__ (
-	"mtc0 %0,"STR(CP0_PAGEMASK)"\n\t"
-	"mtc0 $0,"STR(CP0_WIRED)"\n\t"
-	:
-	: "r" (CONFIG_MIPS64_PAGEMASK_4K)
-    );
-
-
-    for (i=0; i<CONFIG_MIPS64_TLB_SIZE; i++)
-	__asm__ __volatile__ (
-	    "mtc0 %0,"STR(CP0_INDEX)"\n\t"
-	    "dmtc0 %0,"STR(CP0_ENTRYHI)"\n\t"
-	    "dmtc0 $0,"STR(CP0_ENTRYLO0)"\n\t"
-	    "dmtc0 $0,"STR(CP0_ENTRYLO1)"\n\t"
-	    "nop;nop;nop;\n\t"
-	    "tlbwi\n\t"
-	    :
-	    : "r" (i)
-	);
-
-    __asm__ __volatile__ (
-	"nop;nop;nop;\n\t"
-	"mtc0 $0,"STR(CP0_ENTRYHI)"\n\t"
-    );
-}
-
-void mips64_dump_tlb()
-{
-    word_t i, save;
-    printf("-------------------------TLB DUMP-----------------------------\n");
-
-    __asm__ __volatile__ (
-	"dmfc0	%0, "STR(CP0_ENTRYHI)"\n\t"
-	: "=r" (save)
-    );
-
-    for (i=0; i<CONFIG_MIPS64_TLB_SIZE; i++)
-    {
-	word_t hi, lo0, lo1;
-	__asm__ __volatile__ (
-	    "mtc0 %3,"STR(CP0_INDEX)"\n\t"
-	    "nop;nop;nop;tlbr;nop;nop;nop;nop\n\t"
-	    "dmfc0 %0,"STR(CP0_ENTRYHI)"\n\t"
-	    "dmfc0 %1,"STR(CP0_ENTRYLO0)"\n\t"
-	    "dmfc0 %2,"STR(CP0_ENTRYLO1)"\n\t"
-	    : "=r" (hi), "=r" (lo0), "=r" (lo1)
-	    : "r" (i)
-	);
-	printf("%2d: [%p] %08lx / %08lx\n", i, hi, lo0, lo1);
-    }
-
-    __asm__ __volatile__ (
-	"dmtc0	%0, "STR(CP0_ENTRYHI)"\n\t"
-	: : "r" (save)
-    );
-
-    printf("-------------------------TLB DUMP-----------------------------\n");
-}
-
-extern "C" void mips64_dump_memory(mips64_irq_context_t *context)
-{
-    unsigned int i;
-
-    mips64_dump_tlb();
-
-    printf("-------------------------EPC DUMP-----------------------------\n");
-    printf("EPC = %16lx\n", context->epc);
-    for (i=0; i<32; i+= 4)
-    {
-	printf("%c [%16lx] = 0x%08lx\n",i==24? '*' : ' ', context->epc-24+i, *(unsigned int*)(context->epc-24+i));
-    }
-}
diff --git a/kernel/src/glue/v4-mips64/traps.S b/kernel/src/glue/v4-mips64/traps.S
deleted file mode 100644
index bbb9c5a4..00000000
--- a/kernel/src/glue/v4-mips64/traps.S
+++ /dev/null
@@ -1,244 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/traps.S
- * Created:       20/08/2002 by Carl van Schaik
- * Description:   Kernel entry points for various traps 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: traps.S,v 1.31 2005/07/12 07:36:55 cgray Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_GLUE(context.h)
-#include <tcb_layout.h>
-
-//#define DEBUG_TRAPS
-
-#define _mips64_debug	    \
-1:	.set	noat;	    \
-	li	AT, 2;	    \
-	break;		    \
-	.set	at;	    \
-	b 1b;
-
-	.set noat
-	.set reorder
-BEGIN_PROC(__mips64_tlb_refill) /* we could be from user space 0x0 */
-
-	j	_mips64_xtlb_miss
-	move	k1, sp
-
-END_PROC(__mips64_tlb_refill)
-
-	.set noat
-	.set noreorder
-BEGIN_PROC(__mips64_xtlb_refill)
-
-	j	_mips64_xtlb_miss
-	move	k1, sp
-
-END_PROC(__mips64_xtlb_refill)
-
-	.set noat
-	.set noreorder
-BEGIN_PROC(__mips64_cache_error)
-
-#ifdef	CONFIG_DEBUG
-	dla	sp, 0xffffffff80008000
-	dla	a0, CACHE_STR
-	jal	printf
-	nop
-#endif
-
-	_mips64_debug
-
-END_PROC(__mips64_cache_error)
-
-	.set noat
-	.set noreorder
-BEGIN_PROC(__mips64_extra_vector)
-	eret
-END_PROC(__mips64_extra_vector)
-
-	.set reorder
-BEGIN_PROC(_mips64_restore_user)
-	RESTORE_ALL
-	eret
-END_PROC(_mips64_restore_user)
-
-	.set reorder
-BEGIN_PROC(_mips64_interrupt)
-	SAVE_ALL_INT
-
-	mfc0    t1, CP0_CAUSE
-	mfc0    t0, CP0_STATUS
-	li	a0, 7		/* Interrupt source - start at 7 */
-	and     t1, t1, t0
-
-	.set	noreorder
-	andi	t0, t1, INT_IRQ5
-	bnez	t0, 1f
-	andi	t0, t1, INT_IRQ4
-	bnez	t0, 1f
-	li	a0, 6
-	andi	t0, t1, INT_IRQ3
-	bnez	t0, 1f
-	li	a0, 5
-	andi	t0, t1, INT_IRQ2
-	bnez	t0, 1f
-	li	a0, 4
-	andi	t0, t1, INT_IRQ1
-	bnez	t0, 1f
-	li	a0, 3
-	andi	t0, t1, INT_IRQ0
-	bnez	t0, 1f
-	li	a0, 2
-	andi	t0, t1, INT_SW0
-	bnez	t0, 1f
-	li	a0, 0
-	andi	t0, t1, INT_SW1
-	bnez	t0, 1f
-	li	a0, 1
-	/* No interrupt occured, can happen on R4000 (see refman 5.3.20) */
-	b	_mips64_restore_user
-	nop
-
-	.set	reorder
-1:
-	sll	a1, a0, 3
-	ld      t0, interrupt_handlers(a1)
-	move	a1, sp
-	jal     t0
-
-	j	_mips64_restore_user
-END_PROC(_mips64_interrupt)
-
-
-	.set reorder
-BEGIN_PROC(_mips64_exception)
-	SAVE_ALL_INT
-
-	move	a0, sp
-	jal	mips64_exception
-
-	j	_mips64_restore_user
-END_PROC(_mips64_exception)
-
-
-	.set reorder
-BEGIN_PROC(_mips64_xtlb_miss)
-	SAVE_ALL_XTLB
-
-	/* Here we have space to insert NOPs to change the instruction count
-	 * of this xtlb handler. This is because currently the length of the
-	 * C code depends on your compiler and if it's a multiple of 48 cycles
-	 * you can hard-lock. It sux. CEG
-	 */
-	nop
-	
-#ifdef DEBUG_TRAPS
-	mfc0	a3, CP0_STATUS
-	dmfc0	a2, CP0_BADVADDR
-	dmfc0	a1, CP0_EPC
-	dla	a0, XTLB_STR
-	jal	printf
-#endif
-
-	dmfc0	a0, CP0_BADVADDR
-	move	a1, sp
-	jal	handle_xtlb_miss
-
-	RESTORE_XTLB
-	eret
-END_PROC(_mips64_xtlb_miss)
-
-	.set reorder
-BEGIN_PROC(_mips64_xtlb_fall_through)
-	RESTORE_XTLB
-END_PROC(_mips64_xtlb_fall_through)
-
-BEGIN_PROC(_mips64_stlb_miss)
-	SAVE_ALL_INT
-
-#ifdef DEBUG_TRAPS
-	ld	a3, PT_STATUS(sp)
-	ld	a2, PT_BADVADDR(sp)
-	dmfc0	a1, CP0_EPC
-	dla	a0, STLB_STR
-	jal	printf
-#endif
-
-	ld	a0, PT_BADVADDR(sp)
-	move	a1, sp
-	jal	handle_stlb_miss
-
-	j	_mips64_restore_user
-END_PROC(_mips64_stlb_miss)
-
-	.set reorder
-BEGIN_PROC(_mips64_tlb_mod)
-	SAVE_ALL_INT
-
-#ifdef DEBUG_TRAPS
-	ld	a2, PT_BADVADDR(sp)
-	dmfc0	a1, CP0_EPC
-	dla	a0, MTLB_STR
-	jal	printf
-	nop
-#endif
-
-	ld	a0, PT_BADVADDR(sp)
-	move	a1, sp
-	dla	t0, handle_tlb_mod
-	jal	t0
-
-	j	_mips64_restore_user
-END_PROC(_mips64_tlb_mod)
-
-
-#ifndef CONFIG_SMP
-	.data
-#else
-	.section .base
-#endif
-	.align 3
-XTLB_REFILL_STACK:
-	.space 1024
-XTLB_REFILL_STACK_end:
-
-	.data
-
-#ifdef DEBUG_TRAPS
-XTLB_STR:
-	.string ":XTLB Refill: EPC=0x%16lx VA=0x%16lx STATUS=0x%16lx\n"
-STLB_STR:
-	.string ":STLB Refill: EPC=0x%16lx VA=0x%16lx STATUS=0x%16lx\n"
-MTLB_STR:
-	.string ":TLB Mod: EPC=0x%16lx VA=0x%16lx\n"
-#endif
-
-CACHE_STR:
-	.string ":Cache error occured:\n"
diff --git a/kernel/src/glue/v4-mips64/user.S b/kernel/src/glue/v4-mips64/user.S
deleted file mode 100644
index c563642b..00000000
--- a/kernel/src/glue/v4-mips64/user.S
+++ /dev/null
@@ -1,79 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/syscalls.S
- * Created:       20/08/2002 by Carl van Schaik
- * Description:   Kernel entry points for syscalls
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: user.S,v 1.9 2004/12/01 23:51:16 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(regdef.h)
-#include INC_GLUE(context.h)
-#include INC_GLUE(syscalls.h)
-
-#define SYSCALL(name)	    \
-.section    .user.##name, "ax";	    \
-BEGIN_PROC(user_##name);	    \
-    li	v0, SYSCALL_##name;	    \
-    syscall;			    \
-    j	ra;			    \
-END_PROC(user_##name);		    \
-.previous
-
-#define SYSCALL_EXCH(name)	    \
-.section    .user.##name, "ax";	    \
-BEGIN_PROC(user_##name);	    \
-    andi v0, a0, ((1 << L4_LOCAL_ID_ZERO_BITS)-1);		    \
-    sltiu a7, v0, 1;		    \
-12:;				    \
-    li	v0, SYSCALL_##name;	    \
-    syscall;			    \
-    j	ra;			    \
-END_PROC(user_##name);		    \
-.previous
-
-#define SYSCALL_UNIMPLEMENTED(name) \
-.section    .user.##name, "ax";	    \
-BEGIN_PROC(user_##name);	    \
-    j	ra;			    \
-END_PROC(user_##name);		    \
-.previous
-
-SYSCALL(ipc)
-SYSCALL(thread_switch)
-SYSCALL(thread_control)
-SYSCALL_EXCH(exchange_registers)
-SYSCALL(schedule)
-SYSCALL(unmap)
-SYSCALL(space_control)
-SYSCALL(processor_control)
-SYSCALL(memory_control)
-SYSCALL(system_clock)
-
-SYSCALL_UNIMPLEMENTED(lipc)
-
diff --git a/kernel/src/glue/v4-mips64/utcb.h b/kernel/src/glue/v4-mips64/utcb.h
deleted file mode 100644
index 5cf39b87..00000000
--- a/kernel/src/glue/v4-mips64/utcb.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004, 2006,  University of New South Wales
- *                
- * File path:     glue/v4-mips64/utcb.h
- * Description:   UTCB definition
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: utcb.h,v 1.12 2006/10/20 16:30:37 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_MIPS64__UTCB_H__
-#define __GLUE__V4_MIPS64__UTCB_H__
-
-#include INC_API(thread.h)
-#include INC_API(types.h)
-
-class utcb_t {
-public:
-    bool allocate(threadid_t tid);
-    void free();
-
-public:
-    threadid_t		my_global_id;		/* 0 */
-    word_t		processor_no;		/* 8 */
-    word_t		user_defined_handle;	/* 16 */
-    threadid_t		pager;			/* 24 */
-    threadid_t		exception_handler;	/* 32 */
-    u8_t		preempt_flags;		/* 40 */
-    u8_t		cop_flags;              /* 41 */
-    u16_t		__reserved0;            /* 42 */
-    u32_t               __reserved1;		/* 44 */
-    timeout_t		xfer_timeout;		/* 48 */
-    word_t		error_code;		/* 56 */
-    threadid_t		intended_receiver;	/* 64 */
-    threadid_t		virtual_sender;		/* 72 */
-    word_t              __padding0[6];          /* 80 .. 128 */
-    word_t		mr[IPC_NUM_MR];		/* 128 .. 640 */
-    word_t		br[IPC_NUM_BR];		/* 640 .. 904 */
-    word_t              __padding1[15];         /* 904 .. 1024 */
-
-public:
-    void set_my_global_id(threadid_t tid);
-    word_t get_user_defined_handle();
-    void set_user_defined_handle(word_t handle);
-    threadid_t get_pager();
-    void set_pager(threadid_t tid);
-    threadid_t get_exception_handler();
-    void set_exception_handler(threadid_t tid);
-    u8_t get_preempt_flags();
-    void set_preempt_flags(u8_t flags);
-    u8_t get_cop_flags();
-    word_t get_error_code();
-    void set_error_code(word_t err);
-    timeout_t get_xfer_timeout();
-    threadid_t get_intended_receiver();
-    threadid_t get_virtual_sender();
-    void set_virtual_sender(threadid_t tid);
-
-//}__attribute__((packed));
-};
-
-#include INC_API(generic-utcb.h)
-
-#endif /* !__GLUE__V4_MIPS64__UTCB_H__ */
diff --git a/kernel/src/glue/v4-ofsparc64/offsets.h b/kernel/src/glue/v4-ofsparc64/offsets.h
deleted file mode 100644
index 285e773f..00000000
--- a/kernel/src/glue/v4-ofsparc64/offsets.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003  University of New South Wales
- *                
- * File path:     glue/v4-ofsparc64/offsets.h
- * Description:   Addresses used for C++, asm AND linker scripts
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: offsets.h,v 1.2 2003/09/24 19:04:50 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_OFSPARC64__OFFSETS_H__
-#define __GLUE__V4_OFSPARC64__OFFSETS_H__
-
-#define KERNEL_OFFSET 0xFFFFF80000000000
-#define BOOT_OFFSET   0x0
-
-
-#endif /* !__GLUE__V4_OFSPARC64__OFFSETS_H__ */
diff --git a/kernel/src/glue/v4-sparc64/Makeconf b/kernel/src/glue/v4-sparc64/Makeconf
deleted file mode 100644
index d84b6c6a..00000000
--- a/kernel/src/glue/v4-sparc64/Makeconf
+++ /dev/null
@@ -1,6 +0,0 @@
-SOURCES += $(addprefix src/glue/v4-sparc64/, exception.cc init.cc thread.cc \
-	     space.cc syscalls.S trap.S user.S window_trap.S)
-
-SOURCES += src/generic/linear_ptab_walker.cc \
-	   src/generic/mapping.cc \
-	   src/generic/mapping_alloc.cc
diff --git a/kernel/src/glue/v4-sparc64/asmsyms.cc b/kernel/src/glue/v4-sparc64/asmsyms.cc
deleted file mode 100644
index 42c3a67f..00000000
--- a/kernel/src/glue/v4-sparc64/asmsyms.cc
+++ /dev/null
@@ -1,100 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/asmsyms.cc
- * Description:   Various asm definitions for sparc64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asmsyms.cc,v 1.4 2004/06/28 06:51:35 philipd Exp $
- *                
- ********************************************************************/
-#include <mkasmsym.h>
-
-#include INC_API(tcb.h)
-#include INC_ARCH(frame.h)
-#include INC_GLUE(config.h)
-
-MKASMSYM(TRAP_FRAME_SIZE, sizeof(trap_frame_t));
-MKASMSYM(TRAP_FRAME_G1, offsetof(trap_frame_t, g1));
-MKASMSYM(TRAP_FRAME_G2, offsetof(trap_frame_t, g2));
-MKASMSYM(TRAP_FRAME_G3, offsetof(trap_frame_t, g3));
-MKASMSYM(TRAP_FRAME_G4, offsetof(trap_frame_t, g4));
-MKASMSYM(TRAP_FRAME_G5, offsetof(trap_frame_t, g5));
-MKASMSYM(TRAP_FRAME_O0, offsetof(trap_frame_t, o0));
-MKASMSYM(TRAP_FRAME_O1, offsetof(trap_frame_t, o1));
-MKASMSYM(TRAP_FRAME_O2, offsetof(trap_frame_t, o2));
-MKASMSYM(TRAP_FRAME_O3, offsetof(trap_frame_t, o3));
-MKASMSYM(TRAP_FRAME_O4, offsetof(trap_frame_t, o4));
-MKASMSYM(TRAP_FRAME_O5, offsetof(trap_frame_t, o5));
-MKASMSYM(TRAP_FRAME_O6, offsetof(trap_frame_t, o6));
-MKASMSYM(TRAP_FRAME_O7, offsetof(trap_frame_t, o7));
-MKASMSYM(TRAP_FRAME_I6, offsetof(trap_frame_t, i6));
-MKASMSYM(TRAP_FRAME_I7, offsetof(trap_frame_t, i7));
-MKASMSYM(TRAP_FRAME_ARG6, offsetof(trap_frame_t, args[6]));
-MKASMSYM(TRAP_FRAME_ARG7, offsetof(trap_frame_t, args[7]));
-
-MKASMSYM(WINDOW_FRAME_SIZE, sizeof(window_frame_t));
-MKASMSYM(WINDOW_FRAME_L0, offsetof(window_frame_t, l0));
-MKASMSYM(WINDOW_FRAME_L1, offsetof(window_frame_t, l1));
-MKASMSYM(WINDOW_FRAME_L2, offsetof(window_frame_t, l2));
-MKASMSYM(WINDOW_FRAME_L3, offsetof(window_frame_t, l3));
-MKASMSYM(WINDOW_FRAME_L4, offsetof(window_frame_t, l4));
-MKASMSYM(WINDOW_FRAME_L5, offsetof(window_frame_t, l5));
-MKASMSYM(WINDOW_FRAME_L6, offsetof(window_frame_t, l6));
-MKASMSYM(WINDOW_FRAME_L7, offsetof(window_frame_t, l7));
-MKASMSYM(WINDOW_FRAME_I0, offsetof(window_frame_t, i0));
-MKASMSYM(WINDOW_FRAME_I1, offsetof(window_frame_t, i1));
-MKASMSYM(WINDOW_FRAME_I2, offsetof(window_frame_t, i2));
-MKASMSYM(WINDOW_FRAME_I3, offsetof(window_frame_t, i3));
-MKASMSYM(WINDOW_FRAME_I4, offsetof(window_frame_t, i4));
-MKASMSYM(WINDOW_FRAME_I5, offsetof(window_frame_t, i5));
-MKASMSYM(WINDOW_FRAME_I6, offsetof(window_frame_t, i6));
-MKASMSYM(WINDOW_FRAME_I7, offsetof(window_frame_t, i7));
-
-MKASMSYM(SWITCH_FRAME_SIZE, sizeof(switch_frame_t));
-MKASMSYM(SWITCH_FRAME_O7, offsetof(switch_frame_t, o7));
-MKASMSYM(SWITCH_FRAME_I6, offsetof(switch_frame_t, i6));
-MKASMSYM(SWITCH_FRAME_I7, offsetof(switch_frame_t, i7));
-MKASMSYM(SWITCH_FRAME_O0, offsetof(switch_frame_t, o0));
-MKASMSYM(SWITCH_FRAME_O1, offsetof(switch_frame_t, o1));
-MKASMSYM(SWITCH_FRAME_O2, offsetof(switch_frame_t, o2));
-MKASMSYM(SWITCH_FRAME_Y, offsetof(switch_frame_t, y));
-
-MKASMSYM(TCB_PINNED_STACK_TOP, offsetof(tcb_t, arch.pinned_stack_top));
-MKASMSYM(TCB_TSTATE, offsetof(tcb_t, arch.tstate));
-MKASMSYM(TCB_TPC, offsetof(tcb_t, arch.tpc));
-MKASMSYM(TCB_TNPC, offsetof(tcb_t, arch.tnpc));
-MKASMSYM(TCB_TL, offsetof(tcb_t, arch.tl));
-MKASMSYM(TCB_PIL, offsetof(tcb_t, arch.pil));
-MKASMSYM(TCB_SAVED_WINDOWS, offsetof(tcb_t, arch.saved_windows));
-MKASMSYM(TCB_SAVED_CWP, offsetof(tcb_t, arch.saved_cwp));
-MKASMSYM(TCB_MYSELF_LOCAL, offsetof(tcb_t, myself_local));
-
-MKASMSYM(THREAD_STATE_RUNNING, thread_state_t::running);
-MKASMSYM(THREAD_STATE_WAITING_FOREVER, thread_state_t::waiting_forever);
-
-MKASMSYM(SPACE_PGDIR_CONTEXT, offsetof(space_t, pgdir_context));
-
-MKASMSYM(UTCB_MR_BASE, offsetof(utcb_t, mr[0]));
-MKASMSYM(UTCB_WINDOW_SAVE_AREA, offsetof(utcb_t, reg_win[0]));
diff --git a/kernel/src/glue/v4-sparc64/config.h b/kernel/src/glue/v4-sparc64/config.h
deleted file mode 100644
index 1c0ae02e..00000000
--- a/kernel/src/glue/v4-sparc64/config.h
+++ /dev/null
@@ -1,169 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:   glue/v4-sparc64/config.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.6 2004/02/12 01:35:22 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__CONFIG_H__
-#define __GLUE__V4_SPARC64__CONFIG_H__
-
-#include INC_CPU(mmu.h)
-#include INC_GLUE_API_ARCH(utcb.h)
-
-#warning awiggins (26-07-03): 4KB for the KTCB might be excessive.
-/**
- * Size of a kernel TCB in bytes
- */
-#define KTCB_BITS       12 // 4KB
-#define KTCB_SIZE	(1 << KTCB_BITS)
-#define KTCB_MASK	(~(KTCB_SIZE - 1))
-
-/*************
-* KIP Fields *
-*************/
-
-/**
-   attributes for system call functions
-   @param x is the name of the system call lacking the leading sys_ .
-   This makes it possible to place every system call in its own section
-   if required. Default is empty.
- */
-#define KIP_SYSCALL(x)  ((word_t) (x) - (word_t) &kip)
-
-/**
- * endianess and word size
- */
-#define KIP_API_FLAGS	{SHUFFLE2(endian:1, word_size:1)} // 64-bit, big endian
-
-#warning awiggins (26-07-03): Need to check a single page is enough for KIP.
-/**
- * size of kernel interface page
- */
-#define KIP_AREA_BITS   SPARC64_PAGE_BITS
-#define KIP_AREA_SIZE   (1L << KIP_AREA_BITS)
-#define KIP_KIP_AREA	{size:KIP_AREA_BITS}
-
-/**
- * minimum size of UTCB area and number of UTCBs in this
- */
-/* 8 byte aligned, 1KB size, 8KB area size */
-#define KIP_UTCB_INFO {SHUFFLE3(multiplier:1, alignment:UTCB_BITS, \
-                                size:SPARC64_PAGE_BITS)}
-
-/**
- * supported page sizes and access bits
- */
-#define KIP_ARCH_PAGEINFO {SHUFFLE2(rwx:HW_ACCESS_BITS, \
-                                    size_mask:(HW_VALID_PGSIZES >> 10))}
-
-/*******************************
-* Virtual Address Space Layout *
-*******************************/
-
-#ifdef SPARC64_HAS_ASI_NUCLEUS
-/** If the processor supports a NUCLEUS address-space we can map the kernel
- *  into its own private address space giving the user space the full 64-bit
- *  address space to use. 
- */
-
-/* User area (Full address space) */
-
-#if (SPARC64_VIRTUAL_ADDRESS_BITS < 64)
-
-#define USER_AREA_LOWER_START (0x0L)
-#define USER_AREA_LOWER_LIMIT ((1L << (SPARC64_VIRTUAL_ADDRESS_BITS - 1)) - 1)
-#define USER_AREA_UPPER_START (0L - (1L  << (SPARC64_VIRTUAL_ADDRESS_BITS - 1)))
-#define USER_AREA_UPPER_LIMIT (-1L)
-
-#else /* SPARC64_VIRTUAL_ADDRESS_BITS == 64 */
-
-#define USER_AREA_START (0x0L)
-#define USER_AREA_LIMIT (-1L)
-
-#endif /* (SPARC64_VIRTUAL_ADDRESS_BITS < 64) */
-
-/* Copy area (Not required) */
-
-/**
- *  We split the virtual address space between KTCB_AREA and the rest of the
- *  kernel, with the kernel mapped in the upper half and the KTCB area starting
- *  in the middle of the lower half.
- */
-
-/* Kernel thread control blocks */
-#define KTCB_AREA_START (1ULL << (SPARC64_VIRTUAL_ADDRESS_BITS - 2))
-#define KTCB_AREA_SIZE  (1ULL << (KTCB_BITS + VALID_THREADNO_BITS))
-#define KTCB_AREA_END   (KTCB_AREA_START + KTCB_AREA_SIZE)
-
-#if (SPARC64_VIRTUAL_ADDRESS_BITS < (L4_GLOBAL_THREADNO_BITS + KTCB_BITS + 2))
-
-#define VALID_THREADNO_BITS (SPARC64_VIRTUAL_ADDRESS_BITS - (KTCB_BITS + 2))
-
-#else
-
-#define VALID_THREADNO_BITS L4_GLOBAL_THREADNO_BITS
-
-#endif /* (SPARC64_VIRTUAL_ADDRESS_BITS < ...) */
-
-#define THREADNO_MASK ((1L << VALID_THREADNO_BITS) - 1)
-
-/* Kernel area. KERNEL_AREA_START *must* be 32KB aligned */
-
-#define KERNEL_AREA_START (KERNEL_AREA_LIMIT - KERNEL_AREA_SIZE + 1)
-#define KERNEL_AREA_BITS  (SPARC64_VIRTUAL_ADDRESS_BITS - 1) /* Half Virt AS */
-#define KERNEL_AREA_SIZE  (1 << KERNEL_AREA_BITS)
-#define KERNEL_AREA_LIMIT (-1) /* Top of the virtual address space */
-
-/* CPU local area stick it at the top of the kernel address space. */
-#define KERNEL_CPULOCAL_START (KERNEL_AREA_LIMIT + 1 - KERNEL_CPULOCAL_SIZE)
-#define KERNEL_CPULOCAL_SIZE  CPULOCALPAGE_SIZE
-#define KERNEL_CPULOCAL_LIMIT KERNEL_AREA_LIMIT
-
-/* Kernel doesn't use trap instructions, so we can use the smaller trap table */
-#define TTABLE_SHORT 1
-
-/**
- * Base address of the root task's UTCB area
- */
-#define ROOT_UTCB_START (0x0UL - (ROOT_MAX_THREADS << UTCB_BITS))
-
-/**
- * Address of the KIP in the root task
- */
-#define ROOT_KIP_START (ROOT_UTCB_START - KIP_AREA_SIZE)
-
-#else
-
-#error awiggins (26-07-03): Need to add support for CPUs without ASI_NUCLEUS
-
-#endif /* SPARC64_HAS_ASI_NUCLEUS */
-
-#define TIMER_TICK_LENGTH	(2000) /* usec */
-
-#endif /* !__GLUE__V4_SPARC64__CONFIG_H__ */
diff --git a/kernel/src/glue/v4-sparc64/exception.cc b/kernel/src/glue/v4-sparc64/exception.cc
deleted file mode 100644
index 2615ceb9..00000000
--- a/kernel/src/glue/v4-sparc64/exception.cc
+++ /dev/null
@@ -1,165 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/exception.cc
- * Description:   Exception and high-level system call handling for SPARCv9
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: exception.cc,v 1.2 2004/02/22 23:16:03 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_API(space.h)
-#include INC_API(tcb.h)
-#include INC_API(kernelinterface.h)
-#include INC_ARCH(frame.h)
-#include INC_ARCH(registers.h)
-
-extern "C" void
-send_exception(void) {
-    tt_t tt;
-    tpc_t tpc;
-    tnpc_t tnpc;
-
-    tt.get();
-    tpc.get();
-    tnpc.get();
-
-    tcb_t* current = get_current_tcb();
-
-    if(current->get_exception_handler().is_nilthread()) {
-	TRACEF("Unhandled exception 0x%x @ %p in user thread %p\n", tt.tt,
-	       tpc.tpc, current->get_global_id().get_raw());
-	current->set_state(thread_state_t::halted);
-	current->switch_to_idle();
-    }
-
-    /* setup exception IPC */
-    word_t saved_mr[8];
-    word_t saved_br0;
-    msg_tag_t tag;
-
-    for(int i = 0; i < 8; i++) {
-	saved_mr[i] = current->get_mr(i);
-    }
-    saved_br0 = current->get_br(0);
-    
-    tag.set(0, 8, -5 << 4);
-    current->set_mr(0, tag.raw);
-    current->set_mr(1, tpc.tpc);
-    current->set_mr(2, tnpc.tnpc);
-    current->set_mr(3, (word_t)current->get_user_sp());
-    current->set_mr(4, current->get_user_flags());
-    current->set_mr(5, tt.tt);
-    current->set_mr(6, current->get_local_id().get_raw());
-    current->set_mr(7, (word_t)mmu_t::get_d_sfar());
-
-    tag = current->do_ipc(current->get_exception_handler(),
-			  current->get_exception_handler(),
-			  timeout_t::never());
-
-    if(!tag.is_error() && tag.get_untyped() >= 3) {
-	tpc.tpc = current->get_mr(1);
-	tnpc.tnpc = current->get_mr(2);
-	current->set_user_sp((addr_t)current->get_mr(3));
-	current->set_user_flags(current->get_mr(4));
-	tpc.set();
-	tnpc.set();
-    } else {
-	printf("Unable to deliver user exception: IPC error\n");
-    }
-
-    for(int i = 0; i < 8; i++) {
-	current->set_mr(i, saved_mr[i]);
-    }
-    current->set_br(0, saved_br0);
-}
-
-extern "C" word_t
-send_syscall_ipc(word_t o0, word_t o1, word_t o2, word_t o3, word_t o4, word_t o5)
-{
-    register word_t trap_number asm("g1");
-    tpc_t tpc;
-    tcb_t* current = get_current_tcb();
-
-    tpc.get();
-
-    if(current->get_exception_handler().is_nilthread()) {
-	TRACEF("Unhandled syscall %x @ %p in user thread %p\n", trap_number,
-	       tpc.tpc, current->get_global_id().get_raw());
-	current->set_state(thread_state_t::halted);
-	current->switch_to_idle();
-    }
-
-    /* setup exception IPC */
-    msg_tag_t tag;
-
-    tag.set(0, 10, -5 << 4);
-    current->set_mr(0, tag.raw);
-    current->set_mr(1, o0);
-    current->set_mr(2, o1);
-    current->set_mr(3, o2);
-    current->set_mr(4, o3);
-    current->set_mr(5, o4);
-    current->set_mr(6, o5);
-    current->set_mr(7, trap_number);
-    current->set_mr(8, tpc.tpc);
-    current->set_mr(9, (word_t)current->get_user_sp());
-    current->set_mr(10, (word_t)current->get_user_flags());
-
-    tag = current->do_ipc(current->get_exception_handler(),
-			  current->get_exception_handler(),
-			  timeout_t::never());
-
-    if(!tag.is_error()) {
-	word_t o0_r = current->get_mr(1);
-	register word_t o1_r asm ("o1") = current->get_mr(2);
-	register word_t o2_r asm ("o2") = current->get_mr(3);
-	register word_t o3_r asm ("o3") = current->get_mr(4);
-	register word_t o4_r asm ("o4") = current->get_mr(5);
-	register word_t o5_r asm ("o5") = current->get_mr(6);
-	
-	asm volatile ("" :: "r" (o1_r), "r" (o2_r), "r" (o3_r), "r" (o4_r), "r" (o5_r));
-	
-	return o0_r;
-    } else {
-	printf("Unable to deliver user exception: IPC error\n");
-	return 0;
-    }
-}
-
-extern "C" word_t
-sys_kernel_interface(void)
-{
-    space_t* space = get_current_space();
-
-    word_t kip_location = (word_t)space->get_kip_page_area().get_base();
-    register word_t o1 asm ("o1") = get_kip()->api_version;
-    register word_t o2 asm ("o2") = get_kip()->api_flags;
-    register word_t o3 asm ("o3") = get_kip()->get_kernel_descriptor()->kernel_id.get_raw();
-
-    asm volatile ("" :: "r" (o1), "r" (o2), "r" (o3));
-
-    return kip_location;
-}
diff --git a/kernel/src/glue/v4-sparc64/fpage.h b/kernel/src/glue/v4-sparc64/fpage.h
deleted file mode 100644
index 5be8ab01..00000000
--- a/kernel/src/glue/v4-sparc64/fpage.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-sparc64/fpage.h
- * Description:   architecture specific flexpage declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fpage.h,v 1.3 2005/05/19 08:38:14 stoess Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_SPARC64__FPAGE_H__
-#define __GLUE__V4_SPARC64__FPAGE_H__
-
-#include INC_API(generic-archfpage.h)
-
-#endif /* !__GLUE__V4_SPARC64__FPAGE_H__ */
diff --git a/kernel/src/glue/v4-sparc64/hwspace.h b/kernel/src/glue/v4-sparc64/hwspace.h
deleted file mode 100644
index 0f8ee077..00000000
--- a/kernel/src/glue/v4-sparc64/hwspace.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/hwspace.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: hwspace.h,v 1.4 2004/02/22 23:09:26 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__HWSPACE_H__
-#define __GLUE__V4_SPARC64__HWSPACE_H__
-
-#include INC_API(kernelinterface.h)
-
-INLINE addr_t virt_to_phys(addr_t addr)
-{
-    extern word_t _start_text[];
-    extern kernel_interface_page_t kip[];
-    memdesc_t* memdesc = kip->memory_info.get_memdesc(0);
-    return (addr_t)((word_t)addr - (word_t)_start_text + (word_t)memdesc->low());
-}
-
-INLINE addr_t phys_to_virt(addr_t addr)
-{
-    extern word_t _start_text[];
-    extern kernel_interface_page_t kip[];
-    memdesc_t* memdesc = kip->memory_info.get_memdesc(0);
-    return (addr_t)((word_t)addr - (word_t)memdesc->low() + (word_t)_start_text);
-}
-
-#endif /* !__GLUE__V4_SPARC64__HWSPACE_H__ */
diff --git a/kernel/src/glue/v4-sparc64/init.cc b/kernel/src/glue/v4-sparc64/init.cc
deleted file mode 100644
index ca6812a1..00000000
--- a/kernel/src/glue/v4-sparc64/init.cc
+++ /dev/null
@@ -1,204 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/init.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: init.cc,v 1.5 2004/05/21 02:34:56 philipd Exp $
- *                
- ********************************************************************/
-
-#include <mapping.h>
-
-#include INC_API(schedule.h)
-#include INC_API(processor.h)
-#include INC_API(kernelinterface.h)
-#include INC_CPU(mmu.h)
-#include INC_GLUE_API_ARCH(space.h)
-#include INC_GLUE_API_ARCH(timer.h)
-
-extern bool SECTION(".init") init_bootmem(void);
-
-/**
- *  trap_kdebug()
- *  used by unused and unimplemented trap handlers to entry KDB.
- */
-extern "C" void
-trap_kdebug(char * reason, word_t pc)
-{
-    tl_t     tl_old;
-    tl_t     tl_new;
-    tpc_t    tpc;
-    tnpc_t   tnpc;
-    tt_t     tt;
-    tstate_t tstate;
-    ver_t    ver;
-
-    printf("trap_kdebug: Unimplemented trap 0x%lx\n", pc);
-
-    tl_old.get();                                 /* Save the current TL.   */
-    ver.get();                                    /* We need rev.maxtl.     */
-    for(u8_t i = 1; i <= ver.ver.maxtl; i++) {    /* For every TL.          */
-	tl_new.tl = i;                            /* Set TL we want.        */
-	tl_new.set();
-	tpc.get();
-	tnpc.get();
-	tt.get();
-	tstate.get();                             /* Get the trap state.    */
-	tl_new.print(), printf(" "), tpc.print(), /* Print the results.     */
-	printf("\t"), tnpc.print(), printf("\t"),
-	tt.print(), printf(" "), tstate.print();
-    }
-    tl_old.set();                                 /* Restore original TL.   */
-
-    enter_kdebug(reason);
-}
-
-/**
- *  init_rest_bootmem()
- *  Sets up kernel allocated memory past the pinned bootpage.
- */
-void SECTION(".init")
-init_rest_bootmem(void)
-{
-    extern word_t _start_text[];
-    word_t bootmem_size = CONFIG_BOOTMEM_PAGES << SPARC64_PAGE_BITS;
-
-    /**
-     *  Feed additional memory to kernel memory allocator.
-     */
-
-    addr_t rest_bootmem_start = (addr_t)((word_t)_start_text + BOOTPAGE_SIZE);
-    word_t rest_bootmem_size = bootmem_size - BOOTPAGE_SIZE;
-    //kmem.add(rest_bootmem_start, rest_bootmem_size); // need to map it.
-
-    /**
-     *  Add kernel reserved memory descriptors.
-     */
-
-    tlb_t tlb_entry;
-    tlb_entry.get(TLB_KERNEL_LOCKED, tlb_t::d_tlb); // Get kernel TLB entry.
-    addr_t bootmem_paddr_start = tlb_entry.get_pa();
-    addr_t bootmem_paddr_end = addr_offset(bootmem_paddr_start,  bootmem_size);
-
-    get_kip()->memory_info.insert(memdesc_t::reserved, false,
-				  bootmem_paddr_start, bootmem_paddr_end);
-
-} // init_rest_bootmem()
-
-/**
- *  init_paging()
- *  ...
- */
-void SECTION(".init")
-init_paging(void)
-{
-    /**
-     *  Set up memory descriptors for virtual memory avaliable to user.
-     */
-
-#if (SPARC64_VIRTUAL_ADDRESS_BITS < 64)
-
-    get_kip()->memory_info.insert(memdesc_t::conventional, true,
-				  (addr_t)USER_AREA_LOWER_START,
-				  (addr_t)(USER_AREA_LOWER_LIMIT + 1));
-    get_kip()->memory_info.insert(memdesc_t::conventional, true,
-				  (addr_t)USER_AREA_UPPER_START,
-				  (addr_t)(USER_AREA_UPPER_LIMIT + 1));
-
-#else /* SPARC64_VIRTUAL_ADDRESS_BITS == 64 */
-
-    get_kip()->memory_info.insert(memdesc_t::conventional, true,
-				  (addr_t)USER_AREA_START,
-				  (addr_t)(USER_AREA_LIMIT + 1));
-
-#endif /* (SPARC64_VIRTUAL_ADDRESS_BITS < 64) */
-
-    space_t::init_kernel_space();
-
-} // init_paging()
-
-/**
- *  init_arch()
- *  Initialises architecture dependent parts of the system.
- */
-void SECTION(".init")
-init_arch(void)
-{
-    bool more_bootmem;
-
-    more_bootmem = init_bootmem();
-
-    /* Initialise kernel interface page */
-    get_kip()->init();
-
-    /* Initialise kernel debugger if any */
-    if (get_kip()->kdebug_init)
-	get_kip()->kdebug_init();
-
-    /* Initialise page tables */
-    init_paging();
-
-    if(more_bootmem) {
-	init_rest_bootmem();
-    }
-
-    /* Initialise mapping database */
-    init_mdb();
-
-    /* Initialise the kernel's timer source */
-    get_timer()->init_global();
-    get_timer()->init_cpu();
-
-    /* Initialise main cpu. */
-    extern word_t plat_bus_freq;
-    extern word_t plat_cpu_freq;
-
-    init_processor(0, plat_bus_freq/1000, plat_cpu_freq/1000);
-
-} // init_arch()
-
-/**
- * Entry point from ASM into C kernel
- * Precondition: BOOTPAGE (supperpage) is mapped in.
- */
-extern "C" void SECTION(".init")
-startup_system()
-{
-    init_console();
-
-    init_hello();
-
-    init_arch();
-
-    /* initialize the scheduler */
-    get_current_scheduler()->init();
-
-    /* start the scheduler - this should never return */
-    get_current_scheduler()->start();
-
-    /* make sure we don't fall off the edge */
-    spin_forever(1);
-}
diff --git a/kernel/src/glue/v4-sparc64/intctrl.h b/kernel/src/glue/v4-sparc64/intctrl.h
deleted file mode 100644
index ff11e0a2..00000000
--- a/kernel/src/glue/v4-sparc64/intctrl.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.3 2004/02/03 02:07:19 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__INTCTRL_H__
-#define __GLUE__V4_SPARC64__INTCTRL_H__
-
-#include INC_GLUE_API_CPU(intctrl.h)
-
-/**
- * @return pointer to interrupt controller
- */
-INLINE intctrl_t * get_interrupt_ctrl() 
-{
-    extern intctrl_t intctrl;
-    return &intctrl;
-}
-
-#endif /* !__GLUE__V4_SPARC64__INTCTRL_H__ */
diff --git a/kernel/src/glue/v4-sparc64/ktcb.h b/kernel/src/glue/v4-sparc64/ktcb.h
deleted file mode 100644
index b4593a71..00000000
--- a/kernel/src/glue/v4-sparc64/ktcb.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/ktcb.h
- * Description:   Kernel TCB state 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ktcb.h,v 1.5 2004/06/28 06:53:19 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__KTCB_H__
-#define __GLUE__V4_SPARC64__KTCB_H__
-
-class arch_ktcb_t {
-public:
-    /* Top of the KTCB stack inside the kernel's pinned area. */
-    word_t pinned_stack_top;
-
-    /* Area used to save trap state registers on thread switches. */
-    tstate_t tstate;  // (u64_t)  Trap State.
-    tpc_t    tpc;     // (word_t) Trap PC.
-    tnpc_t   tnpc;    // (word_t) Trap Next PC.
-    tl_t     tl;      // (u8_t)   Trap Level Register.
-    pil_t    pil;     // (u8_t)   Processor Interrupt Level.
-
-    /* Number of window frames saved in the UTCB. */
-    word_t saved_windows;
-
-    /* CWP saved in switch_to */
-    cwp_t saved_cwp;
-};
-
-
-#endif /* !__GLUE__V4_SPARC64__KTCB_H__ */
diff --git a/kernel/src/glue/v4-sparc64/map.h b/kernel/src/glue/v4-sparc64/map.h
deleted file mode 100644
index d9ea9a5c..00000000
--- a/kernel/src/glue/v4-sparc64/map.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2005,  Karlsruhe University
- *                
- * File path:     glue/v4-sparc64/map.h
- * Description:   architecture specific mapping declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: map.h,v 1.3 2005/05/19 08:39:52 stoess Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_SPARC64__MAP_H__
-#define __GLUE__V4_SPARC64__MAP_H__
-
-#include INC_API(generic-archmap.h)
-
-#endif /* !__GLUE__V4_SPARC64__MAP_H__ */
diff --git a/kernel/src/glue/v4-sparc64/resources.h b/kernel/src/glue/v4-sparc64/resources.h
deleted file mode 100644
index d1ec9f03..00000000
--- a/kernel/src/glue/v4-sparc64/resources.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/resources.h
- * Description:    
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: resources.h,v 1.3 2003/09/24 19:04:52 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__RESOURCES_H__
-#define __GLUE__V4_SPARC64__RESOURCES_H__
-
-#warning PORTME
-class thread_resources_t : public generic_thread_resources_t {};
-
-
-#endif /* !__GLUE__V4_SPARC64__RESOURCES_H__ */
diff --git a/kernel/src/glue/v4-sparc64/schedule.h b/kernel/src/glue/v4-sparc64/schedule.h
deleted file mode 100644
index 968f8e11..00000000
--- a/kernel/src/glue/v4-sparc64/schedule.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/schedule.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: schedule.h,v 1.5 2004/06/28 06:54:30 philipd Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_SPARC64__SCHEDULE_H__
-#define __GLUE__V4_SPARC64__SCHEDULE_H__
-
-/**
- * @todo document me
- */
-INLINE u64_t get_timer_tick_length()
-{
-    return TIMER_TICK_LENGTH;
-}
-
-
-/**
- * send the current processor to sleep
- */
-INLINE void processor_sleep()
-{
-    pstate_t pstate;
-
-    pstate.get();
-
-    pstate.pstate.ie = 1;
-    pstate.set();
-    
-    for(int i = 0; i < 100; i++) {
-	asm volatile ("nop");
-    }
-
-    pstate.pstate.ie = 0;
-    pstate.set();
-}
-
-
-#endif /* !__GLUE__V4_SPARC64__SCHEDULE_H__ */
diff --git a/kernel/src/glue/v4-sparc64/space.cc b/kernel/src/glue/v4-sparc64/space.cc
deleted file mode 100644
index c37eb78e..00000000
--- a/kernel/src/glue/v4-sparc64/space.cc
+++ /dev/null
@@ -1,158 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/space.cc
- * Description:  space_t implementation for SPARC v9
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.cc,v 1.5 2004/05/21 02:34:56 philipd Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>			/* for UNIMPLEMENTED */
-#include <kmemory.h>
-
-#include INC_API(tcb.h)
-
-#include INC_GLUE_API_ARCH(space.h)	/* space_t           */
-
-DECLARE_KMEM_GROUP(kmem_utcb);
-DECLARE_KMEM_GROUP(kmem_tcb);
-
-space_t kernel_space;
-
-/*************************
-* space_t implementation *
-*************************/
-
-word_t space_t::space_control(word_t ctrl)
-{
-    /* The control field of space control is currently unused in sparc64 */
-    return 0;
-
-} // space_t::space_control()
-
-/**
- * Release mappings that belong to the kernel (UTCB, KIP)
- * @param vaddr		virtual address in the space
- * @param paddr		physical address the mapping refers to
- * @param log2size	log2(size of mapping)
- */
-void space_t::release_kernel_mapping (addr_t vaddr, addr_t paddr,
-				      word_t log2size)
-{
-    // Free up memory used for UTCBs
-    if (get_utcb_page_area ().is_addr_in_fpage (vaddr))
-	kmem.free (kmem_utcb, phys_to_virt (paddr), 1UL << log2size);
-}
-
-utcb_t * space_t::allocate_utcb(tcb_t *tcb)
-{
-    ASSERT(tcb != NULL);
-    addr_t utcb = (addr_t)tcb->get_utcb_location();
-    addr_t page;
-    pgent_t::pgsize_e size;
-    pgent_t *pgent;
-
-    if (this->lookup_mapping(utcb, &pgent, &size)) {
-	// there's already a mapping at the UTCB address
-	// philipd (10/12/03): the mask is only right if it's an 8k page
-	return (utcb_t*)
-	    phys_to_virt(addr_offset(pgent->address(this, size),
-				     (word_t)utcb & (~SPARC64_PAGE_MASK)));
-    }
-
-    // allocate a new UTCB page
-    page = kmem.alloc_aligned(kmem_utcb, SPARC64_PAGE_SIZE,
-			      (word_t)utcb, SPARC64_CACHE_ALIGN);
-    ASSERT(page != NULL);
-    // XXX size_8k is ultrasparc-specific
-    add_mapping((addr_t)utcb, virt_to_phys(page), pgent_t::size_8k,
-		tlb_t::cache_vir, true, false, false);
-
-    return (utcb_t*) addr_offset(page, (word_t)utcb & (~SPARC64_PAGE_MASK));
-}
-
-/**
- * establish a mapping in sigma0's space
- * @param addr	the fault address in sigma0
- *
- * This function should install a mapping that allows sigma0 to make
- * progress. Sigma0's space is available as this.
- */
-void space_t::map_sigma0(addr_t addr)
-{
-    // philipd (10/12/03) XXX: use a superpage once they are working
-    this->add_mapping(addr, addr, pgent_t::size_8k, tlb_t::cache_vir,
-		      true, true, false);
-}
-
-/**
- * Try to copy a mapping from kernel space into the current space
- * @param addr the address for which the mapping should be copied
- * @return true if something was copied, false otherwise.
- * Synchronization must happen at the highest level, allowing sharing.
- */
-bool space_t::sync_kernel_space(addr_t addr)
-{
-    // philipd (10/12/03) XXX: is this necessary?
-    return false;
-}
-
-/**
- * Install a dummy TCB
- * @param addr	address where the dummy TCB should be installed
- *
- * The dummy TCB must be read-only and fail all validity tests.
- */
-void space_t::map_dummy_tcb (addr_t addr)
-{
-    static tcb_t* dummy_tcb = NULL;
-
-    if(dummy_tcb == NULL) {
-	dummy_tcb = (tcb_t *) kmem.alloc(kmem_tcb, SPARC64_PAGE_SIZE);
-    }
-
-    add_mapping(addr, virt_to_phys((addr_t)dummy_tcb), PGSIZE_KTCB,
-		tlb_t::cache_phy, false, false, true);
-}
-
-/**
- * Map memory usable for TCB
- * @param addr address of the TCB that should be made usable
- *
- * This function is called when a TCB should be made usable the first
- * time. Usually, this happens when a) no page is mapped at the TCB
- * address at all, or b) a read-only page is mapped and now a write
- * access to the TCB occured.
- *
- * @see space_t::map_dummy_tcb
- */
-void space_t::allocate_tcb(addr_t addr)
-{
-    addr_t page = kmem.alloc_aligned(kmem_tcb, SPARC64_PAGE_SIZE,
-				     (word_t)addr, SPARC64_CACHE_ALIGN);
-    kernel_space.add_mapping(addr, virt_to_phys(page), PGSIZE_KTCB,
-			     tlb_t::cache_vir, true, false, true);
-}
diff --git a/kernel/src/glue/v4-sparc64/space.h b/kernel/src/glue/v4-sparc64/space.h
deleted file mode 100644
index 0475a210..00000000
--- a/kernel/src/glue/v4-sparc64/space.h
+++ /dev/null
@@ -1,174 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *
- * File path:    glue/v4-sparc64/space.h
- * Description:  space_t implmentation for SPARC v9. Includes CPU
- *               specific space.h where space_t is defined and
- *               provides SPARC v9 generic implmenetations of space_t
- *               methods.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: space.h,v 1.7 2005/06/03 15:54:01 joshua Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__SPACE_H__
-#define __GLUE__V4_SPARC64__SPACE_H__
-
-#include INC_GLUE_API_CPU(space.h)
-
-/* space_t: tcb management. */
-  
-INLINE tcb_t * space_t::get_tcb(threadid_t tid)
-{
-    return (tcb_t*)((KTCB_AREA_START) + 
-		    ((tid.get_threadno() & THREADNO_MASK) << KTCB_BITS));
-}
-
-INLINE tcb_t * space_t::get_tcb(void * ptr)
-{
-    return (tcb_t*)((word_t)(ptr) & KTCB_MASK);
-}
-
-/* space_t: address ranges. */
-
-/**
- *  space_t::is_user_area()
- *  User spaces get the full 64-bits of the address space that are implemented.
- */
-INLINE bool space_t::is_user_area(addr_t addr)
-{
-    if(this == get_kernel_space()) {
-	return false;
-    }
-
-#if (SPARC64_VIRTUAL_ADDRESS_BITS < 64)
-
-    return ((addr <  (addr_t)USER_AREA_LOWER_LIMIT) ||
-	    (addr >= (addr_t)USER_AREA_UPPER_START));
-
-#else
-
-    return true;
-
-#endif /* (SPARC64_VIRTUAL_ADDRESS_BITS < 64) */
-
-}
-
-/**
- *  space_t::is_tcb_area()
- *  KTCBs are mapped from KTCB_AREA_START to KTCB_AREA_END in the kernel_space
- *  only.
- */
-INLINE bool space_t::is_tcb_area(addr_t addr)
-{
-    if(this == get_kernel_space()) {
-
-	return (addr < (addr_t)KTCB_AREA_END && addr >= (addr_t)KTCB_AREA_START);
-
-    } else {
-
-	return false;
-    }
-}
-
-/* space_t: copy area related methods. */
-
-/**
- *  space_t::is_copy_area()
- *  Copy areas are not required on SPARC due to load/store alternative space
- *  instructions. Target AS's context is loaded into the secondary context
- *  register.
- */
-INLINE bool space_t::is_copy_area(addr_t addr)
-{
-    return false;
-}
-
-/**
- *  space_t::get_copy_limit()
- *  unused, see above.
- */
-INLINE word_t space_t::get_copy_limit(addr_t addr, word_t limit)
-{
-    return (word_t)-1L;
-}
-
-/* space_t: kip and utcb handling. */
-
-INLINE fpage_t space_t::get_kip_page_area(void)
-{
-    return kip_area;
-}
-
-INLINE fpage_t space_t::get_utcb_page_area(void)
-{
-    return utcb_area;
-}
-
-/* space_t: reference counting. */
-
-INLINE void space_t::add_tcb(tcb_t * tcb)
-{
-    thread_count++;
-}
-
-INLINE bool space_t::remove_tcb(tcb_t * tcb)
-{
-    ASSERT(thread_count != 0);
-    thread_count--;
-
-    return (thread_count == 0);
-}
-
-/* space_t: space control. */
-
-// nothing so far
-
-/* space_t: SPARC v9 specific functions. */
-
-INLINE void space_t::begin_update(void)
-{
-}
-
-INLINE void space_t::end_update(void)
-{
-}
-
-INLINE pgent_t * space_t::pgent(word_t num, word_t cpu)
-{
-    return (this->get_pdir())->next(this, pgent_t::size_8k, num);
-}
-
-INLINE word_t space_t::readmem_phys(addr_t paddr)
-{
-    word_t result;
-    asm volatile ("ldxa [ %1 ] %2, %0"
-		  : "=r" (result)
-		  : "r" (paddr), "i" (ASI_PHYS_USE_EC));
-    return result;
-}
-
-
-#endif /* !__GLUE__V4_SPARC64__SPACE_H__ */
diff --git a/kernel/src/glue/v4-sparc64/syscalls.S b/kernel/src/glue/v4-sparc64/syscalls.S
deleted file mode 100644
index af28bf39..00000000
--- a/kernel/src/glue/v4-sparc64/syscalls.S
+++ /dev/null
@@ -1,349 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/syscall.S
- * Description:  Kernel entry points for system calls
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.S,v 1.5 2004/07/01 00:49:51 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(asi.h)
-#include INC_ARCH(ttable.h)
-#include INC_GLUE(syscalls.h)
-
-#include <asmsyms.h>
-
-/**
- * L4_SYSCALL_TTABLE_ENTRY: trap table entry for all L4 syscalls and KDB traps,
- * except for kernel_interface, ipc, lipc and exchange_registers.
- */
-#define L4_SYSCALL_TTABLE_ENTRY(label)					\
-BEGIN_TTABLE_ENTRY(trap_##label,O)					\
-	ba,pt	%xcc, _enter_##label;					\
-	 nop;								\
-BEGIN_PROC(_enter_##label,".text")					\
-	WINDOW_STATE_SAVE();						\
-	/* Save registers and set up the kernel stack */		\
-	mov	%sp, %g5;						\
-	sub	%g7, TRAP_FRAME_SIZE + STACK_BIAS_64BIT, %sp;		\
-	stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ];	\
-	stx	%o7, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ];	\
-	/* Switch to main globals */					\
-	rdpr	%pstate, %g5;						\
-	wrpr	%g5, PSTATE_AG, %pstate;				\
-	/* Save globals */						\
-	stx	%g2, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ];	\
-	stx	%g3, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ];	\
-	stx	%g4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ];	\
-	/* Jump to the syscall handler */				\
-	setx	normal_syscall_done - 8, %g5, %o7;			\
-	ba,pt	%xcc, label;						\
-	 nop
-
-L4_SYSCALL_TTABLE_ENTRY(sys_thread_control);
-L4_SYSCALL_TTABLE_ENTRY(sys_thread_switch);
-L4_SYSCALL_TTABLE_ENTRY(sys_schedule);
-L4_SYSCALL_TTABLE_ENTRY(sys_unmap);
-L4_SYSCALL_TTABLE_ENTRY(sys_space_control);
-L4_SYSCALL_TTABLE_ENTRY(sys_processor_control);
-
-UNIMPLEMENTED_TTABLE_ENTRY(trap_sys_system_clock,O);
-UNIMPLEMENTED_TTABLE_ENTRY(trap_sys_memory_control,O);
-UNIMPLEMENTED_TTABLE_ENTRY(trap_sys_lipc,O)
-
-/* 
- * ExchangeRegisters needs special treatment, because it has two more arguments
- * than can be passed in o registers. These are passed in two volatile g
- * registers, and have to be moved to the right place on the stack once we
- * get into kernel mode.
- */
-BEGIN_TTABLE_ENTRY(trap_sys_exchange_registers,O)
-	ba,pt	%xcc, _enter_sys_exchange_registers
-	 nop
-
-BEGIN_PROC(_enter_sys_exchange_registers,".text")
-	WINDOW_STATE_SAVE()
-	/* Save registers and set up the kernel stack */
-	mov	%sp, %g5
-	sub	%g7, TRAP_FRAME_SIZE + STACK_BIAS_64BIT, %sp
-	stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ]
-	stx	%o7, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ]
-	/* Switch to main globals */
-	rdpr	%pstate, %g5
-	wrpr	%g5, PSTATE_AG, %pstate
-	/* Save globals */
-	stx	%g2, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ]
-	stx	%g3, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ]
-	/* Put is_local and flags in the extra-argument area on the stack and
-	 * call sys_exchange_registers */
-	stx	%g4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_ARG6 ] /* flags */
-	call	sys_exchange_registers
-	 stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_ARG7 ] /* is_local */
-	/* Load globals */
-	ldx	[ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ], %g3
-	ldx	[ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ], %g4
-	/* Switch to alternate globals. */
-	rdpr    %pstate, %o7
-	wrpr    %o7, PSTATE_AG, %pstate
-	/* Restore registers. */
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ], %o7
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ], %sp
-	WINDOW_STATE_RESTORE()
-	/* Return to user mode */
-	done
-	
-
-BEGIN_TTABLE_ENTRY(trap_sys_ipc,O)
-	ba,pt	%xcc, sys_ipc_slowpath
-	 nop
-
-BEGIN_PROC(sys_ipc_slowpath,".text")
-	WINDOW_STATE_SAVE();
-	/* Find the kernel-space address of the UTCB and save MRs. %g2 currently
-	 * contains a pointer to an empty register window save location in the
-	 * UTCB. */
-	setx	UTCB_MASK, %g5, %g4
-	and	%g2, %g4, %g4
-	stx	%l0, [ %g4 + UTCB_MR_BASE + 0  ]
-	stx	%l1, [ %g4 + UTCB_MR_BASE + 8  ]
-	stx	%l2, [ %g4 + UTCB_MR_BASE + 16 ]
-	stx	%l3, [ %g4 + UTCB_MR_BASE + 24 ]
-	stx	%l4, [ %g4 + UTCB_MR_BASE + 32 ]
-	stx	%l5, [ %g4 + UTCB_MR_BASE + 40 ]
-	stx	%l6, [ %g4 + UTCB_MR_BASE + 48 ]
-	stx	%l7, [ %g4 + UTCB_MR_BASE + 56 ]
-
-	/* Save registers and set up the kernel stack */
-	mov	%sp, %g5
-	sub	%g7, TRAP_FRAME_SIZE + STACK_BIAS_64BIT, %sp
-	stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ]
-	stx	%o7, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ]
-	stx	%i6, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_I6 ]
-	stx	%i7, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_I7 ]
-
-	/* Switch to main globals */
-	rdpr	%pstate, %g5
-	wrpr	%g5, PSTATE_AG, %pstate
-
-	/* Save main globals & call sys_ipc */
-	stx	%g2, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ]
-	stx	%g3, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ]
-	call	sys_ipc
-	 stx	%g4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ]
-
-.globl return_from_ipc
-return_from_ipc:
-	/* Restore main globals */
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ], %g2
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ], %g3
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ], %g4
-
-	/* Switch back to alternate globals. */
-	rdpr    %pstate, %g5
-	wrpr    %g5, PSTATE_AG, %pstate
-
-	/* Recalculate the address of the UTCB (because sys_ipc may have
-	 * switched threads and trashed %g4) and load the new MRs */
-	setx	UTCB_MASK, %g5, %g4
-	and	%g2, %g4, %g4
-	ldx	[ %g4 + UTCB_MR_BASE + 0  ], %l0
-	ldx	[ %g4 + UTCB_MR_BASE + 8  ], %l1
-	ldx	[ %g4 + UTCB_MR_BASE + 16 ], %l2
-	ldx	[ %g4 + UTCB_MR_BASE + 24 ], %l3
-	ldx	[ %g4 + UTCB_MR_BASE + 32 ], %l4
-	ldx	[ %g4 + UTCB_MR_BASE + 40 ], %l5
-	ldx	[ %g4 + UTCB_MR_BASE + 48 ], %l6
-	ldx	[ %g4 + UTCB_MR_BASE + 56 ], %l7
-	/* Restore the trap frame. */
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_I6 ], %i6
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_I7 ], %i7
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ], %o7
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ], %sp
-	WINDOW_STATE_RESTORE()
-	/* Return to user mode */
-	done
-
-/**
- * normal_syscall_done: restore state and return from a normal syscall.
- */
-normal_syscall_done:
-	/* Restore registers. */
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ], %g2
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ], %g3
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ], %g4
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ], %o7
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ], %sp
-	/* Switch to alternate globals and restore window state */
-	rdpr    %pstate, %g6
-	wrpr    %g6, PSTATE_AG, %pstate
-	WINDOW_STATE_RESTORE()
-	/* Return to user mode */
-	done
- 
-/*
- * KernelInterface must preserve all registers other than the outputs. However,
- * it cannot switch threads or pagefault, so there's no need to mess with
- * register windows.
- */
-BEGIN_TTABLE_ENTRY(trap_sys_kernel_interface,O)
-	ba,pt	%xcc, _enter_sys_kernel_interface
-	 nop
-BEGIN_PROC(_enter_sys_kernel_interface,".text")
-	/* Save registers and set up the kernel stack */
-	mov	%sp, %g5
-	sub	%g7, TRAP_FRAME_SIZE + STACK_BIAS_64BIT, %sp
-	/* Save preserved out registers. */
-	stx	%o4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O4 ]
-	stx	%o5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O5 ]
-	stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ]
-	stx	%o7, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ]
-	/* Switch to main globals and save preserved globals */
-	rdpr	%pstate, %g5
-	wrpr	%g5, PSTATE_AG, %pstate
-	stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G1 ]
-	call	sys_kernel_interface
-	 stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G5 ]
-	
-	/* Restore registers and return */
-	ldx	[ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O4 ], %o4
-	ldx	[ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O5 ], %o5
-	ldx	[ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ], %o7
-	ldx	[ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G1 ], %g1
-	ldx	[ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G5 ], %g5
-	ldx	[ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ], %sp
-	done
-
-
-/**
- * SYSCALL_TRAP_TTABLE_ENTRY: send a syscall trap IPC to the thread's exception
- * handler, with the trap number in g1. Software traps that are not used by L4
- * have trap table entries defined by this macro.
- */
-#define SYSCALL_TRAP_TTABLE_ENTRY(trap_number)\
-BEGIN_TTABLE_ENTRY(trap_##trap_number,O)				\
-	b	_enter_syscall_ipc;					\
-	 set	trap_number, %g1
-
-BEGIN_PROC(_enter_syscall_ipc,".text")
-	WINDOW_STATE_SAVE()
-	/* Save registers and set up the kernel stack */
-	mov	%sp, %g5
-	sub	%g7, TRAP_FRAME_SIZE + STACK_BIAS_64BIT, %sp
-	stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ]
-	stx	%o7, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ]
-	/* Switch to main globals */
-	rdpr	%pstate, %g5
-	wrpr	%g5, PSTATE_AG, %pstate
-	setx	normal_syscall_done - 8, %g5, %o7
-	ba,pt	%xcc, send_syscall_ipc
-	 nop
-
-#define SYSCALL_TRAP_16_TTABLE_ENTRIES(x) \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##0); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##1); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##2); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##3); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##4); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##5); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##6); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##7); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##8); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##9); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##a); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##b); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##c); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##d); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##e); \
-	SYSCALL_TRAP_TTABLE_ENTRY(x##f)
-
-SYSCALL_TRAP_16_TTABLE_ENTRIES(0x0)
-SYSCALL_TRAP_16_TTABLE_ENTRIES(0x1)
-SYSCALL_TRAP_16_TTABLE_ENTRIES(0x2)
-SYSCALL_TRAP_16_TTABLE_ENTRIES(0x3)
-SYSCALL_TRAP_16_TTABLE_ENTRIES(0x4)
-SYSCALL_TRAP_16_TTABLE_ENTRIES(0x5)
-SYSCALL_TRAP_16_TTABLE_ENTRIES(0x6)
-
-#if CONFIG_KDB
-L4_SYSCALL_TTABLE_ENTRY(sys_enter_kdebug);
-L4_SYSCALL_TTABLE_ENTRY(sys_kdebug_putc);
-L4_SYSCALL_TTABLE_ENTRY(sys_kdebug_getc);
-L4_SYSCALL_TTABLE_ENTRY(sys_kdebug_getc_nonblock);
-#else /* !CONFIG_KDB */
-SYSCALL_TRAP_TTABLE_ENTRY(0x7c);
-SYSCALL_TRAP_TTABLE_ENTRY(0x7d);
-SYSCALL_TRAP_TTABLE_ENTRY(0x7e);
-SYSCALL_TRAP_TTABLE_ENTRY(0x7f);
-#endif /* CONFIG_KDB */
-
-#if CONFIG_KDB
-/**
- * sys_enter_kdebug: print the user-space string that %o0 is pointing to, then
- * enter kdb.
- */
-#define ENTER_KDB_STRING_MAX	256
-BEGIN_PROC(sys_enter_kdebug,".text")
-	/* Copy string from user-space */
-	setx	2f, %g5, %l0
-	mov	%l0, %o1
-	set	ENTER_KDB_STRING_MAX, %l1
-3:
-	lduba	[ %o0 ] ASI_AIUP, %l2
-	subcc	%l1, 1, %l1
-	bz,pn	%xcc, 4f
-	 add	%o0, 1, %o0
-	brz,pn	%l2, 4f
-	 stb	%l2, [ %l0 ]
-	b	3b
-	 add	%l0, 1, %l0
-4:
-	stb	%g0, [ %l0 ]
-	setx	1f, %g5, %o0
-	call	printf
-	 nop
-	call	_Z12kdebug_entryPv
-	 nop
-	ba,pt	%xcc, normal_syscall_done
-	 nop
-.data
-1:	.string "%s\n"
-2:	.space	ENTER_KDB_STRING_MAX
-.previous
-
-BEGIN_PROC(sys_kdebug_putc,".text")
-	ba,pt	%xcc, _Z4putcc
-	 nop
-
-BEGIN_PROC(sys_kdebug_getc,".text")
-	ba,pt	%xcc, _Z4getcb
-	 set	1, %o0
-
-BEGIN_PROC(sys_kdebug_getc_nonblock,".text")
-	ba,pt	%xcc, _Z4getcb
-	 set	0, %o0
-
-#endif /* CONFIG_KDB */
diff --git a/kernel/src/glue/v4-sparc64/syscalls.h b/kernel/src/glue/v4-sparc64/syscalls.h
deleted file mode 100644
index 9f9cbde8..00000000
--- a/kernel/src/glue/v4-sparc64/syscalls.h
+++ /dev/null
@@ -1,229 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/syscalls.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.4 2004/02/12 01:38:11 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__SYSCALLS_H__
-#define __GLUE__V4_SPARC64__SYSCALLS_H__
-
-//
-// System call trap numbers
-//
-
-#define SYSCALL_kernel_interface	0x70
-#define SYSCALL_ipc			0x71
-#define SYSCALL_lipc			0x72
-#define SYSCALL_exchange_registers	0x73
-#define SYSCALL_thread_control		0x74
-#define SYSCALL_system_clock		0x75
-#define SYSCALL_thread_switch		0x76
-#define SYSCALL_schedule		0x77
-#define SYSCALL_unmap			0x78
-#define SYSCALL_space_control		0x79
-#define SYSCALL_processor_control	0x7a
-#define SYSCALL_memory_control		0x7b
-
-//
-// System call function attributes.
-//
-
-#define SYSCALL_ATTR(sec_name)
-
-#define SYS_IPC_RETURN_TYPE                     threadid_t
-#define SYS_THREAD_CONTROL_RETURN_TYPE          word_t
-#define SYS_EXCHANGE_REGISTERS_RETURN_TYPE      threadid_t
-#define SYS_SPACE_CONTROL_RETURN_TYPE           word_t
-#define SYS_SCHEDULE_RETURN_TYPE                word_t
-#define SYS_MEMORY_CONTROL_RETURN_TYPE          word_t
-#define SYS_USER_STATE_RETURN_TYPE		word_t
-
-//
-// Syscall declaration wrappers.
-//
-
-/**********************
-* ExchangeRegisters() *
-**********************/
-
-#define SYS_EXCHANGE_REGISTERS(dest, control, usp, uip,				\
-			       uflags, uhandle, pager, is_local)		\
-  SYS_EXCHANGE_REGISTERS_RETURN_TYPE SYSCALL_ATTR ("exchange_registers")	\
-  sys_exchange_registers (dest, control, usp, uip,				\
-			  uhandle, pager, uflags, is_local)
-
-/**
- * Preload registers and return from sys_exchange_registers
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- * @param sp The SP value after the system call
- * @param ip The IP value after the system call
- * @param flags The FLAGS value after the system call
- * @param pager The PAGER value after the system call
- * @param handle The USERDEFINEDHANDLE value after the system call
- */
-#define return_exchange_registers(result, control, sp, ip, flags, pager, handle) 	\
-do {											\
-    register word_t o1 asm ("o1") = control;						\
-    register word_t o2 asm ("o2") = sp;							\
-    register word_t o3 asm ("o3") = ip;							\
-    register threadid_t o4 asm ("o4") = pager;						\
-    register word_t o5 asm ("o5") = handle;						\
-    register word_t g4 asm ("g4") = flags;						\
-    asm volatile ("" :: "r" (o1), "r" (o2), "r" (o3), "r" (o4), "r" (o5), "r" (g4));	\
-    return result;									\
-} while (0);
-
-/******************
-* ThreadControl() *
-******************/
-
-#define SYS_THREAD_CONTROL(dest, space, scheduler, pager,		\
-			   utcb_location)      		  		\
-  SYS_THREAD_CONTROL_RETURN_TYPE SYSCALL_ATTR ("thread_control")	\
-  sys_thread_control (dest, space, scheduler, pager,            	\
-                      utcb_location)
-
-/**
- * Preload registers and return from sys_thread_control
- * @param result The RESULT value after the system call
- */
-#define return_thread_control(result)	return (result)
-
-/*****************
-* ThreadSwitch() *
-*****************/
-
-#define SYS_THREAD_SWITCH(dest)					\
-  void SYSCALL_ATTR ("thread_switch")				\
-  sys_thread_switch (dest)
-
-
-/**
- * Return from sys_thread_switch
- */
-#define return_thread_switch() return
-
-/*************
-* Schedule() *
-*************/
-
-#define SYS_SCHEDULE(dest, time_control, processor_control,	\
-		     prio, preemption_control)			\
-  SYS_SCHEDULE_RETURN_TYPE SYSCALL_ATTR ("schedule")		\
-  sys_schedule (dest, time_control, processor_control,		\
-		prio, preemption_control)
-
-/**
- * Preload registers and return from sys_schedule
- * @param result The RESULT value after the system call
- * @param time_control The TIME_CONTROL value after the system call
- */
-#define return_schedule( result, time_control )						\
-do {											\
-    register word_t o1 asm ("o1") = time_control;					\
-    asm volatile ("" :: "r" (o1));							\
-    return result;									\
-} while (0);
-
-/********
-* Ipc() *
-********/
-
-#define SYS_IPC(to, from, timeout)				\
-  SYS_IPC_RETURN_TYPE SYSCALL_ATTR ("ipc") 			\
-  sys_ipc (to, from, timeout)
-
-/**
- * Preload registers and return from sys_ipc
- * @param from The FROM value after the system call
- */
-#define return_ipc(from)	return (from)
-
-/**********
-* Unmap() *
-**********/
-
-#define SYS_UNMAP(control)					\
-  void SYSCALL_ATTR ("unmap") sys_unmap (control)
-
-/**
- * Return from sys_unmap
- */
-#define return_unmap() return
-
-/*****************
-* SpaceControl() *
-*****************/
-
-#define SYS_SPACE_CONTROL(space, control, kip_area, utcb_area,	\
-			  redirector)				\
-  SYS_SPACE_CONTROL_RETURN_TYPE SYSCALL_ATTR ("space_control")	\
-  sys_space_control (space, control, kip_area, utcb_area,	\
-		     redirector)
-
-/**
- * Preload registers and return from sys_thread_switch
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- */
-#define return_space_control(result, control)						\
-do {											\
-    register word_t o1 asm ("o1") = control;						\
-    asm volatile ("" :: "r" (o1));							\
-    return result;									\
-} while (0);
-
-/*******************
-* ProcessorControl *
-*******************/
-
-#define SYS_PROCESSOR_CONTROL(processor_no, internal_frequency,	\
-			      external_frequency, voltage)	\
-  void SYSCALL_ATTR ("processor_control")			\
-  sys_processor_control (processor_no, internal_frequency,	\
-			 external_frequency, voltage)
-
-#define return_processor_control() return
-
-/******************
-* MemoryControl() *
-******************/
-
-#define SYS_MEMORY_CONTROL(control, attribute0, attribute1,	\
-			   attribute2, attribute3)		\
-  SYS_MEMORY_CONTROL_RETURN_TYPE SYSCALL_ATTR ("memory_control")\
-  sys_memory_control (control, attribute0, attribute1,		\
-		      attribute2, attribute3)
-
-
-#define return_memory_control() return
-
-
-#endif /* !__GLUE__V4_SPARC64__SYSCALLS_H__ */
diff --git a/kernel/src/glue/v4-sparc64/tcb.h b/kernel/src/glue/v4-sparc64/tcb.h
deleted file mode 100644
index 8a26282e..00000000
--- a/kernel/src/glue/v4-sparc64/tcb.h
+++ /dev/null
@@ -1,761 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, 2006, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/tcb.h
- * Description:  TCB related functions for Version 4, Sparc64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tcb.h,v 1.25 2006/10/20 21:32:38 reichelt Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__TCB_H__
-#define __GLUE__V4_SPARC64__TCB_H__
-
-#ifndef __API__V4__TCB_H__
-#error not for stand-alone inclusion
-#endif
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(types.h)
-#include INC_ARCH(frame.h)
-#include INC_API(syscalls.h)	/* for sys_ipc */
-#include <linear_ptab.h>
-
-#ifndef MKASMSYM /* prevent trying to include asmsyms.h while generating it */
-#include <asmsyms.h>
-#endif
-
-INLINE void tcb_t::set_utcb_location(word_t utcb_location)
-{
-    myself_local.set_raw (utcb_location);
-}
-
-INLINE word_t tcb_t::get_utcb_location()
-{
-    return myself_local.get_raw();
-}
-
-INLINE void tcb_t::set_cpu(cpuid_t cpu)
-{
-    this->cpu = cpu;
-    get_utcb()->processor_no = cpu;
-}
-
-/**
- * read value of message register
- * @param index number of message register
- */
-INLINE word_t tcb_t::get_mr(word_t index)
-{
-    return get_utcb()->mr[index];
-}
-
-/**
- * set the value of a message register
- * @param index number of message register
- * @param value value to set
- */
-INLINE void tcb_t::set_mr(word_t index, word_t value)
-{
-    get_utcb()->mr[index] = value;
-}
-
-
-/**
- * copies a set of message registers from one UTCB to another
- * @param dest destination TCB
- * @param start MR start index
- * @param count number of MRs to be copied
- */
-INLINE void tcb_t::copy_mrs(tcb_t * dest, word_t start, word_t count)
-{
-    ASSERT(start + count <= IPC_NUM_MR);
-
-    for (word_t idx = start; idx < start + count; idx++)
-	dest->set_mr(idx, this->get_mr(idx));
-}
-
-
-/**
- * read value of buffer register
- * @param index number of buffer register
- */
-INLINE word_t tcb_t::get_br(word_t index)
-{
-    return get_utcb()->br[index];
-}
-
-/**
- * set the value of a buffer register
- * @param index number of buffer register
- * @param value value to set
- */
-INLINE void tcb_t::set_br(word_t index, word_t value)
-{
-    get_utcb()->br[index] = value;
-}
-
-
-/**
- * allocate the tcb
- * The tcb pointed to by this will be allocated.
- */
-INLINE void tcb_t::allocate()
-{
-    // Ensure that a page is allocated for this tcb, by writing to it. If no
-    // page is allocated yet, the page fault handler will allocate one.
-    this->kernel_stack[0] = 0;
-}
-
-
-/**
- * set the address space a TCB belongs to
- * @param space address space the TCB will be associated with
- */
-INLINE void tcb_t::set_space(space_t * space)
-{
-    this->space = space;
-    // sometimes it might be desirable to use a pdir cache,
-    // like in cases where it's not cheap to derive the page
-    // directory from the space
-    //this->pdir_cache = (word_t)space->get_pdir();
-}
-
-/**
- * Short circuit a return path from an IPC system call.  The error
- * code TCR and message registers are already set properly.  The
- * function only needs to restore the appropriate user context and
- * return execution to the instruction directly following the IPC
- * system call.
- */
-INLINE void tcb_t::return_from_ipc (void)
-{
-    register trap_frame_t* trap_frame asm ("g1") =
-	((trap_frame_t*) this->arch.pinned_stack_top) - 1;
-    cwp_t cwp = this->arch.tstate.get_cwp();
-
-    asm volatile (
-	/* switch to the thread's stack */
-	"wrpr	%[trap_cwp], 0, %%cwp\n\t"
-	"sub    %[trap_frame], "STR(STACK_BIAS_64BIT)", %%sp\n\t"
-
-	/* jump to return_from_ipc, which will load MRs into local registers,
-	 * restore %sp and %o7 and return */
-	"ba,pt  %%xcc, return_from_ipc\n\t"
-	 "nop"
-	::
-	[trap_frame] "r" (trap_frame),
-	[trap_cwp] "r" (cwp.cwp)
-    );
-}
-
-
-/**
- * Short circuit a return path from a user-level interruption or
- * exception.  That is, restore the complete exception context and
- * resume execution at user-level.
- */
-INLINE void tcb_t::return_from_user_interruption (void)
-{
-    register trap_frame_t* trap_frame asm("g1") =
-	((trap_frame_t*) this->arch.pinned_stack_top) - 1;
-    cwp_t cwp = this->arch.tstate.get_cwp();
-
-    asm volatile (
-	/* make sure we're at TL=1 */
-	"wrpr   %%g0, 1, %%tl\n\t"
-
-	/* switch to the thread's stack */
-	"wrpr   %[trap_cwp], 0, %%cwp\n\t"
-	"sub    %[trap_frame], "STR(STACK_BIAS_64BIT)", %%sp\n\t"
-
-	/* restore in and local registers */
-	/* XXX this assumes a flushw was done on context switch */
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_L0)" ], %%l0\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_L1)" ], %%l1\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_L2)" ], %%l2\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_L3)" ], %%l3\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_L4)" ], %%l4\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_L5)" ], %%l5\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_L6)" ], %%l6\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_L7)" ], %%l7\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_I0)" ], %%i0\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_I1)" ], %%i1\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_I2)" ], %%i2\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_I3)" ], %%i3\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_I4)" ], %%i4\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_I5)" ], %%i5\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_I6)" ], %%fp\n\t"
-	"ldx	[ %%sp + "STR(STACK_BIAS_64BIT)" + "STR(WINDOW_FRAME_I7)" ], %%i7\n\t"
-
-	/* jump to otrap_retry which will restore out registers and return */
-	"ba,pt  %%xcc, otrap_retry\n\t"
-	 "nop\n\t"
-	::
-	[trap_frame] "r" (trap_frame),
-	[trap_cwp] "r" (cwp.cwp)
-    );
-}
-
-
-/********************************************************************** 
- *
- *                      thread switch routines
- *
- **********************************************************************/
-
-/**
- * switch to initial thread
- * @param tcb TCB of initial thread
- *
- * Initializes context of initial thread and switches to it.  The
- * context (e.g., instruction pointer) has been generated by inserting
- * a notify procedure context on the stack.  We simply restore this
- * context.
- */
-INLINE void NORETURN initial_switch_to (tcb_t * tcb)
-{
-    asm volatile (
-	/* Make sure we're at trap level 1 */
-	"wrpr   %%g0, 1, %%tl\n\t"
-
-	/* Set the initial register window state */
-	"wrpr	%%g0, %%canrestore\n\t"
-	"wrpr	%%g0, %%cleanwin\n\t"
-	"wrpr	%%g0, %%otherwin\n\t"
-	"wrpr	("STR(NWINDOWS)"-2), %%cansave\n\t"
-
-	".register %%g7,kstack\n\t"
-	/* Load the new thread's alternate %g1, %g2 and %g7. */
-	"rdpr	%%pstate, %%o0\n\t"
-	"wrpr	%%o0, "STR(PSTATE_AG)", %%pstate\n\t"
-	".register %%g2,#scratch\n\t"
-	"mov	%[new_window_save_area], %%g2\n\t"
-	"mov	%[new_pinned_stack_top], %%g7\n\t"
-	"mov	%[new_saved_windows], %%g1\n\t"
-	"wrpr	%%o0, %%pstate\n\t"
-
-	/* Set the new stack and restore registers */
-	"sub	%[stack], "STR(STACK_BIAS_64BIT)", %%sp\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_O7)" + "STR(STACK_BIAS_64BIT)" ], %%o7\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_O0)" + "STR(STACK_BIAS_64BIT)" ], %%o0\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_O1)" + "STR(STACK_BIAS_64BIT)" ], %%o1\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_O2)" + "STR(STACK_BIAS_64BIT)" ], %%o2\n\t"
-	"add	%%sp, "STR(SWITCH_FRAME_SIZE)", %%sp\n\t"
-
-	/* Now jump to sparc64_do_notify */
-	"jmp	%%o7\n\t"
-	"nop\n\t"
-	::
-	[stack] "r" (tcb->stack),
-	[new_pinned_stack_top] "r" (tcb->arch.pinned_stack_top),
-	[new_saved_windows] "r" (tcb->arch.saved_windows),
-	[new_window_save_area] "r" (&tcb->get_utcb()->reg_win[0])
-	: "l0", "o0"
-    );
-
-    ASSERT(!"initial_switch_to should not return");
-    while (1);
-}
-
-/**
- * switches to another tcb thereby switching address spaces if needed
- * @param dest tcb to switch to
- */
-INLINE void tcb_t::switch_to(tcb_t * dest)
-{
-    //TRACEF("this: %p dest: %p dest->stack: %p\n", this, dest, dest->stack);
-    space_t *newspace = dest->get_space();
-    space_t *oldspace = get_space();
-
-    if(newspace == NULL) {
-	newspace = get_kernel_space();
-    }
-    if(oldspace == NULL) {
-	oldspace = get_kernel_space();
-    }
-
-    asm volatile (
-	/* Flush the register windows to the stack / UTCB. */
-	"flushw\n\t"
-
-	/* Save the trap state */
-	"rdpr	%%tstate, %%o2\n\t"
-	"stx	%%o2, [ %[from_tcb] + "STR(TCB_TSTATE)" ]\n\t"
-	"rdpr	%%tpc, %%o3\n\t"
-	"stx	%%o3, [ %[from_tcb] + "STR(TCB_TPC)" ]\n\t"
-	"rdpr	%%tnpc, %%o4\n\t"
-	"stx	%%o4, [ %[from_tcb] + "STR(TCB_TNPC)" ]\n\t"
-	"rdpr	%%pil, %%g1\n\t"
-	"stb	%%g1, [ %[from_tcb] + "STR(TCB_PIL)" ]\n\t"
-	"rdpr	%%tl, %%o5\n\t"
-	"stb	%%o5, [ %[from_tcb] + "STR(TCB_TL)" ]\n\t"
-
-	/* Restore the destination thread's trap state */
-	"ldub	[ %[to_tcb] + "STR(TCB_TL)" ], %%o5\n\t"
-	"wrpr	%%o5, %%tl\n\t"
-	"ldx	[ %[to_tcb] + "STR(TCB_TSTATE)" ], %%o2\n\t"
-	"wrpr	%%o2, %%tstate\n\t"
-	"ldx	[ %[to_tcb] + "STR(TCB_TPC)" ], %%o3\n\t"
-	"wrpr	%%o3, %%tpc\n\t"
-	"ldx	[ %[to_tcb] + "STR(TCB_TNPC)" ], %%o4\n\t"
-	"wrpr	%%o4, %%tnpc\n\t"
-	"ldub	[ %[to_tcb] + "STR(TCB_PIL)" ], %%g1\n\t"
-	"wrpr	%%g1, %%pil\n\t"
-
-	/* Save some registers on the stack */
-	"sub	%%sp, "STR(SWITCH_FRAME_SIZE)", %%sp\n\t"
-	"setx	1f, %%g1, %%o7\n\t"
-	"stx	%%o7, [ %%sp + "STR(SWITCH_FRAME_O7)" + "STR(STACK_BIAS_64BIT)" ]\n\t"
-	"stx	%%i6, [ %%sp + "STR(SWITCH_FRAME_I6)" + "STR(STACK_BIAS_64BIT)" ]\n\t"
-	"stx	%%i7, [ %%sp + "STR(SWITCH_FRAME_I7)" + "STR(STACK_BIAS_64BIT)" ]\n\t"
-	"stx	%%o0, [ %%sp + "STR(SWITCH_FRAME_O0)" + "STR(STACK_BIAS_64BIT)" ]\n\t"
-	"stx	%%o1, [ %%sp + "STR(SWITCH_FRAME_O1)" + "STR(STACK_BIAS_64BIT)" ]\n\t"
-	"stx	%%o2, [ %%sp + "STR(SWITCH_FRAME_O2)" + "STR(STACK_BIAS_64BIT)" ]\n\t"
-	"mov	%%y, %%g1\n\t"
-	"stx	%%g1, [ %%sp + "STR(SWITCH_FRAME_Y)" + "STR(STACK_BIAS_64BIT)" ]\n\t"
-	"rdpr	%%cwp, %%g1\n\t"
-	"stb	%%g1, [ %[from_tcb] + "STR(TCB_SAVED_CWP)" ]\n\t"
-
-	/* Save the current thread's stack pointer */
-	"add	%%sp, "STR(STACK_BIAS_64BIT)", %%g1\n\t"
-	"stx	%%g1, [ %[stack_save] ]\n\t"
-
-	/* Set the new primary context */
-	"set	"STR(PRIMARY_CONTEXT)", %%g1\n\t"
-	"stxa	%[new_context], [ %%g1 ] "STR(ASI_DMMU)"\n\t"
-	/* Note: The secondary context will be kept invalid except in the fast
-	 * path.  So we don't need to touch it here. */
-
-	/* Save the old thread's alternate %g1, and load the new thread's
-	 * alternate %g1, %g2 and %g7. */
-	"rdpr	%%pstate, %%o0\n\t"
-	"wrpr	%%o0, "STR(PSTATE_AG)", %%pstate\n\t"
-	"stx	%%g1, [ %[old_saved_windows] ]\n\t"
-	".register %%g2,#scratch\n\t"
-	"mov	%[new_window_save_area], %%g2\n\t"
-	".register %%g7,kstack\n\t"
-	"mov	%[new_pinned_stack_top], %%g7\n\t"
-	"mov	%[new_saved_windows], %%g1\n\t"
-	"wrpr	%%o0, %%pstate\n\t"
-
-	/* Store the new thread's local thread ID in main %g7 */
-	"mov	%[new_local_id], %%g7\n\t"
-
-	/* Set up the register window state */
-	"wrpr       %%g0, %%cleanwin\n\t"
-
-	/* Set the new stack and cwp, and load registers. Note that cwp may
-	 * change at this point, so all parameters which might be in windowed
-	 * registers become invalid. */
-	"sub	%[new_stack], "STR(STACK_BIAS_64BIT)", %%g1\n\t"
-	"ldub	[ %[to_tcb] + "STR(TCB_SAVED_CWP)" ], %%l0\n\t"
-	"wrpr	%%l0, 0, %%cwp\n\t"
-	"mov	%%g1, %%sp\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_Y)" + "STR(STACK_BIAS_64BIT)" ], %%g1\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_O7)" + "STR(STACK_BIAS_64BIT)" ], %%o7\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_I6)" + "STR(STACK_BIAS_64BIT)" ], %%i6\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_I7)" + "STR(STACK_BIAS_64BIT)" ], %%i7\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_O0)" + "STR(STACK_BIAS_64BIT)" ], %%o0\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_O1)" + "STR(STACK_BIAS_64BIT)" ], %%o1\n\t"
-	"ldx	[ %%sp + "STR(SWITCH_FRAME_O2)" + "STR(STACK_BIAS_64BIT)" ], %%o2\n\t"
-	"mov	%%g1, %%y\n\t"
-	"add	%%sp, "STR(SWITCH_FRAME_SIZE)", %%sp\n\t"
-
-	/* jump to the return address */
-	"jmp	%%o7\n\t"
-	"1:  nop\n\t"
-	::
-	[from_tcb] "r" (this),
-	[to_tcb] "r" (dest),
-	[new_stack] "r" (dest->stack),
-	[stack_save] "r" (&this->stack),
-	[new_context] "r" (newspace->get_context()),
-	[new_pinned_stack_top] "r" (dest->arch.pinned_stack_top),
-	[new_saved_windows] "r" (dest->arch.saved_windows),
-	[old_saved_windows] "r" (&this->arch.saved_windows),
-	[new_window_save_area] "r" (&dest->get_utcb()->reg_win[0]),
-	[new_local_id] "r" (dest->get_utcb_location())
-	: "g1", "g2", "g3", "g4", "g5", "o0", "o1", "o2", "o3",
-	  "o4", "o5", "o7", "memory", "cc"
-    );
-
-    /* Trash the other registers, to make sure the compiler saves them if
-     * necessary. */
-    asm volatile ("" ::: 
-		  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
-		  "i0", "i1", "i2", "i3", "i4", "i5");
-}
-
-/**
- * intialize stack for given thread
- */
-INLINE void tcb_t::init_stack()
-{
-    /* Find the top of the stack in pinned memory and allocate space for
-     * a trap frame on it */
-    arch.pinned_stack_top = (word_t)get_stack_top();
-    trap_frame_t* frame = (trap_frame_t*)arch.pinned_stack_top - 1;
-    stack = (word_t*)frame;
-
-    /* clear the trap frame */
-    for (word_t * t = stack; t < (word_t*)arch.pinned_stack_top; t++)
-	*t = 0;
-
-    utcb_t* utcb = get_utcb();
-    if(utcb != NULL) {
-	/* since the trap frame only saves out registers, we must also clean a
-	 * UTCB window that can be restored to clear the in and local registers,
-	 * and ensure that it is the window that is active when the thread
-	 * starts. */
-	cwp_t cwp;
-	cwp.cwp = 0;
-	arch.tstate.set_cwp(cwp);
-	arch.saved_windows = 1;
-	word_t* w = (word_t*)&utcb->reg_win[0];
-	for(int i = 0; i < 16; i++)
-	    w[i] = 0;
-	
-    }
-
-    arch.tl.tl = 1;
-}
-
-INLINE word_t * tcb_t::get_stack_top()
-{
-    /* The stack must be pinned in the TLB to avoid infinite recursion in the
-     * page fault handler. So we must look up this ktcb's physical address and
-     * translate it into an address in the kernel pinned region. */
-    extern word_t _start_text[];
-    if((word_t*)this > _start_text) {
-	return (word_t*)((char*)this + KTCB_SIZE);
-    }
-
-    pgent_t* pg;
-    pgent_t::pgsize_e size;
-    if(!get_kernel_space()->lookup_mapping(this, &pg, &size)) {
-	ASSERT(0);
-    }
-
-    addr_t phys_addr = (addr_t)((word_t)pg->address(get_kernel_space(), size) +
-				((word_t)this % page_size(size)) + KTCB_SIZE);
-    return (word_t*)phys_to_virt(phys_addr);
-}
-
-/**********************************************************************
- *
- *                        notification functions
- *
- **********************************************************************/
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)())
-{
-    ((switch_frame_t *)stack)--;
-    ((switch_frame_t *)stack)->o7 = (word_t)sparc64_do_notify;
-    ((switch_frame_t *)stack)->o2 = (word_t)func;
-}
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)(word_t), word_t arg1)
-{
-    ((switch_frame_t *)stack)--;
-    ((switch_frame_t *)stack)->o7 = (word_t)sparc64_do_notify;
-    ((switch_frame_t *)stack)->o2 = (word_t)func;
-    ((switch_frame_t *)stack)->o0 = arg1;
-}
-
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- * @param arg2 2nd argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)(word_t, word_t), word_t arg1, word_t arg2)
-{
-    ((switch_frame_t *)stack)--;
-    ((switch_frame_t *)stack)->o7 = (word_t)sparc64_do_notify;
-    ((switch_frame_t *)stack)->o2 = (word_t)func;
-    ((switch_frame_t *)stack)->o0 = arg1;
-    ((switch_frame_t *)stack)->o1 = arg2;
-}
-
-/**********************************************************************
- *
- *                  copy-area related functions
- *
- **********************************************************************/
-
-/**
- * Enable copy area for current thread.
- *
- * @param dst		destination TCB for IPC copy operation
- * @param s		source address
- * @param d		destination address
- */
-INLINE void tcb_t::adjust_for_copy_area (tcb_t * dst, addr_t * s, addr_t * d)
-{
-    UNIMPLEMENTED ();
-}
-
-/**
- * Release copy area(s) for current thread.
- */
-INLINE void tcb_t::release_copy_area (void)
-{
-    // No need for this as long as get_copy_area is unimplemented & unused
-    //UNIMPLEMENTED ();
-}
-
-/**
- * Retrieve the real address associated with a copy area address.
- *
- * @param addr		address within copy area
- *
- * @return address translated into a regular user-level address
- */
-INLINE addr_t tcb_t::copy_area_real_address (addr_t addr)
-{
-    UNIMPLEMENTED ();
-
-    return addr;
-}
-
-/**********************************************************************
- *
- *                        global tcb functions
- *
- **********************************************************************/
-
-INLINE tcb_t * addr_to_tcb(addr_t addr)
-{
-    return (tcb_t *) ((word_t) addr & KTCB_MASK);
-}
-
-/**
- * Locate current TCB by using current stack pointer and return it.
- */
-INLINE tcb_t * get_current_tcb (void)
-{
-    register word_t stack_var asm("sp");
-
-    tcb_t* pinned_tcb = addr_to_tcb((addr_t*)(stack_var + STACK_BIAS_64BIT));
-
-    if(pinned_tcb == get_idle_tcb()) {
-	return pinned_tcb;
-    } else {
-	return get_kernel_space()->get_tcb(pinned_tcb->myself_global);
-    }
-}
-
-
-/**
- * invoke an IPC from within the kernel
- *
- * @param to_tid destination thread id
- * @param from_tid from specifier
- * @param timeout IPC timeout
- * @return IPC message tag (MR0)
- */
-INLINE msg_tag_t tcb_t::do_ipc (threadid_t to_tid, threadid_t from_tid,
-				timeout_t timeout)
-{
-    msg_tag_t tag;
-    sys_ipc (to_tid, from_tid, timeout);
-    tag.raw = get_mr (0);
-
-    return tag;
-}
-
-/**********************************************************************
- * 
- *            access functions for ex-regs'able registers
- *
- **********************************************************************/
-
-/**
- * read the user-level instruction pointer
- * @return	the user-level instruction pointer
- */
-INLINE addr_t tcb_t::get_user_ip()
-{
-    if(this == get_current_tcb()) {
-	tl_t tl, saved_tl;
-	tpc_t tpc;
-
-	saved_tl.get();
-	tl.tl = 1;
-	tl.set();
-	tpc.get();
-	saved_tl.set();
-
-	return (addr_t)tpc.tpc;
-    }
-
-    return (addr_t) arch.tpc.tpc;
-}
-
-/**
- * read the user-level stack pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_sp()
-{
-    trap_frame_t * trapframe =
-	(trap_frame_t *) arch.pinned_stack_top - 1;
-
-    return (addr_t) trapframe->o6;
-}
-
-/**
- * set the user-level instruction pointer
- * @param ip	new user-level instruction pointer
- */
-INLINE void tcb_t::set_user_ip(addr_t ip)
-{
-    if(this == get_current_tcb()) {
-	tl_t tl, saved_tl;
-	saved_tl.get();
-	tl.tl = 1;
-	tl.set();
-
-	tpc_t tpc;
-	tpc.tpc = (word_t)ip;
-	tpc.set();
-
-	tnpc_t tnpc;
-	tnpc.tnpc = (word_t)ip + 4;
-	tnpc.set();
-
-	saved_tl.set();
-	return;
-    }
-
-    arch.tpc.tpc = (word_t)ip;
-    arch.tnpc.tnpc = (word_t)ip + 4;
-}
-
-/**
- * set the user-level stack pointer
- * @param sp	new user-level stack pointer
- */
-INLINE void tcb_t::set_user_sp(addr_t sp)
-{
-    trap_frame_t * trapframe =
-	(trap_frame_t *) arch.pinned_stack_top - 1;
-
-    /* adjust for stack bias if necessary */
-    if(!((word_t)sp & 1)) {
-	sp = (addr_t)((word_t)sp - STACK_BIAS_64BIT);
-    }
-
-    trapframe->o6 = (word_t)sp;
-}
-
-
-/**
- * read the user-level flags (one word)
- * @return	the user-level flags
- */
-INLINE word_t tcb_t::get_user_flags (void)
-{
-    if(this == get_current_tcb()) {
-	tl_t tl, saved_tl;
-	saved_tl.get();
-	tl.tl = 1;
-	tl.set();
-
-	tstate_t tstate;
-	tstate.get();
-
-	saved_tl.set();
-	return tstate.get_pstate().raw;
-    }
-
-    return arch.tstate.get_pstate().raw;
-}
-
-/**
- * set the user-level flags
- * @param flags	new user-level flags
- */
-INLINE void tcb_t::set_user_flags (const word_t flags)
-{
-    pstate_t pstate;
-
-    pstate.raw = (get_user_flags() & (~PSTATE_USER_MASK)) |
-	(flags & PSTATE_USER_MASK);
-
-    if(this == get_current_tcb()) {
-	tl_t tl, saved_tl;
-	saved_tl.get();
-	tl.tl = 1;
-	tl.set();
-
-	tstate_t tstate;
-	tstate.set_pstate(pstate);
-	tstate.set();
-
-	saved_tl.set();
-	return;
-    }
-
-    arch.tstate.set_pstate(pstate);
-}
-
-/**********************************************************************
- *
- *                  architecture-specific functions
- *
- **********************************************************************/
-
-/**
- * initialize architecture-dependent root server properties based on
- * values passed via KIP
- * @param space the address space this server will run in   
- * @param ip the initial instruction pointer           
- * @param sp the initial stack pointer
- */
-INLINE void tcb_t::arch_init_root_server (space_t * space, word_t ip, word_t sp)
-{ 
-}
-
-#endif /* !__GLUE__V4_SPARC64__TCB_H__ */
diff --git a/kernel/src/glue/v4-sparc64/thread.cc b/kernel/src/glue/v4-sparc64/thread.cc
deleted file mode 100644
index aad6933a..00000000
--- a/kernel/src/glue/v4-sparc64/thread.cc
+++ /dev/null
@@ -1,66 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/thread.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: thread.cc,v 1.3 2004/02/03 05:57:32 philipd Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(tcb.h)
-
-extern "C" void sparc64_initial_to_user(void);
-
-/**
- * Setup TCB to execute a function when switched to
- * @param func pointer to function
- *
- * The old stack state of the TCB does not matter.
- */
-void tcb_t::create_startup_stack(void (*func)())
-{
-    init_stack();
-
-    ((trap_frame_t *)stack)--;
-    ((trap_frame_t *)stack)->o6 = 0;
-    
-    notify(sparc64_initial_to_user); 
-    
-    notify(func);
-
-    /* Set up the new thread's initial trap state */
-    asi_t asi;
-    pstate_t pstate;
-
-    asi.asi = ASI_PNF; /* SCD 2.4.1, p. 3P-10 */
-    pstate.raw = 0;
-    pstate.pstate.ie = 1; /* Enable interrupts; all other state flags false */
-    
-    arch.tstate.set_asi(asi);
-    arch.tstate.set_pstate(pstate);
-    arch.pil.pil = 0;
-}
diff --git a/kernel/src/glue/v4-sparc64/timer.h b/kernel/src/glue/v4-sparc64/timer.h
deleted file mode 100644
index 41511962..00000000
--- a/kernel/src/glue/v4-sparc64/timer.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C)  2003,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/timer.h
- * Description:
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.h,v 1.3 2004/02/03 02:41:11 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__TIMER_H__
-#define __GLUE__V4_SPARC64__TIMER_H__
-
-#include INC_GLUE_API_CPU(timer.h)
-
-#endif /* !__GLUE__V4_SPARC64__TIMER_H__ */
diff --git a/kernel/src/glue/v4-sparc64/trap.S b/kernel/src/glue/v4-sparc64/trap.S
deleted file mode 100644
index f7229312..00000000
--- a/kernel/src/glue/v4-sparc64/trap.S
+++ /dev/null
@@ -1,172 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/trap.S
- * Description:
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: trap.S,v 1.8 2004/07/01 04:03:09 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(ttable.h)
-
-DECLAR_STRING(unused_trap, ".rodata", "Unused trap vector!\n")
-DECLAR_STRING(unimplemented_trap, ".rodata", "Unimplemented trap vector!\n")
-
-/* USED user traps that need to be implemented. */
-UNIMPLEMENTED_TTABLE_ENTRY(fp_disabled,O)         /* Think about this more.   */
-UNIMPLEMENTED_TTABLE_ENTRY(internal_processor_error,O)/* Look up details on this. */
-UNIMPLEMENTED_TTABLE_ENTRY(async_data_error,O)    /* Look up details on this. */
-
-/*****************************
-* Used Kernel (TL > 0) traps *
-*****************************/
-
-
-/**
- *  illegal_instruction,X: Used to trap to KDB from kernel.
- *  Contraints: 8 instructions or less.
- */
-BEGIN_TTABLE_ENTRY(illegal_instruction,X)
-	call	_Z12kdebug_entryPv	! kdebug_entry()	/* Inst 1. */
-	 nop							/* Inst 2. */
-	done							/* Inst 3. */
-	
-/* END_TTABLE_ENTRY(illegal_instruction,X) */
-
-/* USED Kernel traps that need to be implemented. */
-UNIMPLEMENTED_TTABLE_ENTRY(internal_processor_error,X)/* Look up details on this. */
-UNIMPLEMENTED_TTABLE_ENTRY(async_data_error,X)    /* Look up details on this. */
-	
-/* Since the kernel doesn't use trap inst (trap_instruction,X) isn't used   */
-
-/***********************
-* User (TL = 0) traps. *
-***********************/	
-
-TRAP_C_GLUE(send_exception)
-
-/* These are all turned into exception IPCs */
-EXCEPTION_TTABLE_ENTRY(illegal_instruction)
-EXCEPTION_TTABLE_ENTRY(privileged_opcode)
-EXCEPTION_TTABLE_ENTRY(unimplemented_LDD)
-EXCEPTION_TTABLE_ENTRY(unimplemented_STD)
-EXCEPTION_TTABLE_ENTRY(fp_exception_ieee_754)
-EXCEPTION_TTABLE_ENTRY(fp_exception_other)
-EXCEPTION_TTABLE_ENTRY(tag_overflow)
-EXCEPTION_TTABLE_ENTRY(division_by_zero)
-EXCEPTION_TTABLE_ENTRY(mem_address_non_aligned)
-EXCEPTION_TTABLE_ENTRY(LDDF_mem_address_not_aligned)
-EXCEPTION_TTABLE_ENTRY(STDF_mem_address_not_aligned)
-EXCEPTION_TTABLE_ENTRY(privileged_action)
-EXCEPTION_TTABLE_ENTRY(LDQF_mem_address_not_aligned)
-EXCEPTION_TTABLE_ENTRY(STQF_mem_address_not_aligned)
-
-/* These shouldn't get to the kernel or shouldn't happen */	
-UNUSED_TTABLE_ENTRY(power_on_reset,O)
-UNUSED_TTABLE_ENTRY(watchdog_reset,O)
-UNUSED_TTABLE_ENTRY(externally_initiated_reset,O)
-UNUSED_TTABLE_ENTRY(software_initiated_reset,O)
-UNUSED_TTABLE_ENTRY(RED_state_exception,O)
-
-/*******************************
-* Unused Kernel (TL > 0) traps *
-*******************************/
-
-/* These shouldn't get to the kernel or shouldn't happen */
-
-UNUSED_TTABLE_ENTRY(interrupt_level_n,X)
-UNUSED_TTABLE_ENTRY(power_on_reset,X)
-UNUSED_TTABLE_ENTRY(watchdog_reset,X)
-UNUSED_TTABLE_ENTRY(externally_initiated_reset,X)
-UNUSED_TTABLE_ENTRY(software_initiated_reset,X)
-UNUSED_TTABLE_ENTRY(RED_state_exception,X)
-UNUSED_TTABLE_ENTRY(privileged_opcode,X)
-UNUSED_TTABLE_ENTRY(unimplemented_LDD,X)
-UNUSED_TTABLE_ENTRY(unimplemented_STD,X)
-UNUSED_TTABLE_ENTRY(fp_disabled,X)                /* Not sure about this one */
-UNUSED_TTABLE_ENTRY(fp_exception_ieee_754,X)
-UNUSED_TTABLE_ENTRY(fp_exception_other,X)
-UNUSED_TTABLE_ENTRY(tag_overflow,X)
-UNUSED_TTABLE_ENTRY(division_by_zero,X)
-UNUSED_TTABLE_ENTRY(mem_address_non_aligned,X)
-UNUSED_TTABLE_ENTRY(LDDF_mem_address_not_aligned,X)
-UNUSED_TTABLE_ENTRY(STDF_mem_address_not_aligned,X)
-UNUSED_TTABLE_ENTRY(privileged_action,X)
-UNUSED_TTABLE_ENTRY(LDQF_mem_address_not_aligned,X)
-UNUSED_TTABLE_ENTRY(STQF_mem_address_not_aligned,X)
-
-
-/*******************************
-* Return-from-trap routines    *
-*******************************/
-
-/**
- * xtrap_retry: Restore state and retry, for TL>1 traps
- */
-BEGIN_PROC(xtrap_retry,".text")
-	/* Restore the out & global registers from the trap frame, %sp last */
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O0 ], %o0
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O1 ], %o1
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O2 ], %o2
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O3 ], %o3
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O4 ], %o4
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O5 ], %o5
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ], %o7
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G1 ], %g1
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ], %g2
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ], %g3
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ], %g4
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G5 ], %g5
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ], %sp
-	/* Return to the previous trap */
-	retry
-
-/**
- * otrap_retry: Restore state and retry, for TL=1 traps
- */
-BEGIN_PROC(otrap_retry,".text")
-	/* Restore the trap frame. */
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O0 ], %o0
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O1 ], %o1
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O2 ], %o2
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O3 ], %o3
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O4 ], %o4
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O5 ], %o5
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ], %o7
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G1 ], %g1
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ], %g2
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ], %g3
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ], %g4
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G5 ], %g5
-	ldx     [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ], %sp
-	/* Switch to alternate globals. */
-	rdpr    %pstate, %g6
-	wrpr    %g6, PSTATE_AG, %pstate
-	/* Restore the register window state. */
-	WINDOW_STATE_RESTORE();
-	/* Return to user mode */
-	retry
diff --git a/kernel/src/glue/v4-sparc64/ttable.h b/kernel/src/glue/v4-sparc64/ttable.h
deleted file mode 100644
index ec05fef6..00000000
--- a/kernel/src/glue/v4-sparc64/ttable.h
+++ /dev/null
@@ -1,252 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/ttable.h
- * Description:  Assembler macros for L4 v4, SPARC v9 Trap Table.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ttable.h,v 1.8 2004/07/01 04:02:17 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE_V4_SPARC64__TTABLE_H__
-#define __GLUE_V4_SPARC64__TTABLE_H__
-
-#include INC_ARCH(frame.h)
-#include INC_ARCH(asm.h)
-
-#include <asmsyms.h>
-
-#ifdef __ASSEMBLER__
-.register %g2,#ignore
-.register %g3,#ignore
-.register %g6,#scratch
-.register %g7,kstack
-#endif
-
-/**
- *  UNIMPLEMENTED_O_TRAP: Unimplmented user trap handler.
- *  Trap to KDB. 
- *  Contraints: 8 instructions or less.
- */
-#define UNIMPLEMENTED_O_TRAP()                                  \
-1:	setx	unimplemented_trap, %o1, %o0; /* Inst 1 - 6. */ \
-	call	trap_kdebug;                  /* Inst 7.     */ \
-	 rd	%pc, %o1;                     /* Inst 8.     */
-
-/**
- *  UNIMPLEMENTED_X_TRAP: Unimplmented kernel trap handler.
- *  Trap to KDB.
- *  Contraints: 8 instructions or less.
- */
-#define UNIMPLEMENTED_X_TRAP()                                  \
-1:	setx	unimplemented_trap, %o1, %o0; /* Inst 1 - 6. */ \
-	call	trap_kdebug;                  /* Inst 7.     */ \
-	 rd	%pc, %o1;                     /* Inst 8.     */
-
-/**
- *  UNUSED_O_TRAP: Unused user (TL = 0) trap handler.
- *  Forward exception to the users exception handler via IPC.
- *  Contraints: 8 instructions or less.
- */
-#warning IMPLEMENTME!
-#define UNUSED_O_TRAP() UNIMPLEMENTED_O_TRAP()
-
-
-/**
- *  UNUSED_X_TRAP: Unused kernel (TL > 0) trap handler.
- *  Shouldn't happen, trap to the debugger.
- *  Contraints: 8 instructions or less.
- */
-#warning IMPLEMENTME!
-#define UNUSED_X_TRAP()                                  \
-1:	setx	unused_trap, %o1, %o0; /* Inst 1 - 6. */ \
-	call	trap_kdebug;           /* Inst 7.     */ \
-	 rd	%pc, %o1;              /* Inst 8.     */
-
-/**
- * WINDOW_STATE_SAVE: Before entering the kernel, save the register window state
- * so that save / restore / flushw instructions will behave correctly and not
- * touch user space
- */
-#define WINDOW_STATE_SAVE() \
-	/* save the number of windows in the UTCB in %g1 */		\
-	rdpr    %otherwin, %g1;						\
-	/* set OTHERWIN to the number of windows currently in use */	\
-	rdpr	%canrestore, %g5;					\
-	wrpr	%g5, %otherwin;						\
-	/* clear CANRESTORE */						\
-	wrpr	%g0, %canrestore;					\
-	/* set CANSAVE to the number of windows remaining */		\
-	set	NWINDOWS-2, %g6;					\
-	sub	%g6, %g5, %g6;						\
-	wrpr	%g6, %cansave;						\
-	/* no need to clean windows for the kernel */			\
-	set	NWINDOWS-1, %g5;					\
-	wrpr	%g5, %cleanwin
-
-/**
- * WINDOW_STATE_RESTORE: On leaving the kernel, set the register window state
- * so any windows saved by the kernel will be correctly restored.
- */
-#define WINDOW_STATE_RESTORE() \
-	/* Find the number of user windows and move it to CANRESTORE */	\
-	rdpr	%otherwin, %g5;						\
-	wrpr	%g5, %canrestore;					\
-	/* Set OTHERWIN to the number of UTCB windows */		\
-	wrpr	%g1, %otherwin;						\
-	/* Adjust CANSAVE */						\
-	set	NWINDOWS-2, %g6;					\
-	sub     %g6, %g1, %g6;						\
-	sub     %g6, %g5, %g6;						\
-	wrpr    %g6, %cansave;						\
-	/* make sure that windows the kernel has used get cleaned */	\
-	wrpr	%g0, %cleanwin
-
-	
-/**
- * DEFINE_OTRAP_GLUE: Define an assembler routine that saves state and jumps
- * to a given C function, to be called from inside a TL=0 (O) trap.
- */
-#define OTRAP_C_ENTRY(label) otrap_##label##_glue
-#define DEFINE_OTRAP_GLUE(func) \
-BEGIN_PROC(OTRAP_C_ENTRY(func),".text")					\
-	WINDOW_STATE_SAVE();						\
-	/* Save the in and local regs in a register window and set up   \
-	 * the kernel stack */						\
-	mov	%sp, %g6;						\
-	add	%g7, - TRAP_FRAME_SIZE - STACK_BIAS_64BIT, %sp;		\
-	/* spill the out regs */					\
-	stx	%o0, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O0 ];	\
-	stx	%o1, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O1 ];	\
-	stx	%o2, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O2 ];	\
-	stx	%o3, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O3 ];	\
-	stx	%o4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O4 ];	\
-	stx	%o5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O5 ];	\
-	stx	%g6, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O6 ];	\
-	stx	%g4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ];	\
-	/* switch to the main globals and save %g1 and %g5 */		\
-	rdpr	%pstate, %o0;						\
-	wrpr	%o0, PSTATE_AG, %pstate;				\
-	stx	%g1, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G1 ];	\
-	stx	%g2, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ];	\
-	stx	%g3, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ];	\
-	stx	%g4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ];	\
-	stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G5 ];	\
-	/* call the kernel function, and then return to TL=0 */		\
-	call	func;							\
-	nop;								\
-	call	otrap_retry;						\
-	nop
-
-/**
- * DEFINE_XTRAP_GLUE: Define an assembler routine that saves state and jumps
- * to a given C function, to be called from inside a TL>0 (X) trap.
- */
-#define XTRAP_C_ENTRY(label) xtrap_##label##_glue
-#define DEFINE_XTRAP_GLUE(func) \
-BEGIN_PROC(XTRAP_C_ENTRY(func),".text")					\
-	/* Check to see if this trap was caused by a TL=0 spill/fill    \
-	 * handler. If so, pretend that the spill/fill never happened.*/\
-	rdpr    %tl, %g5;						\
-	cmp     %g5, 2;							\
-	bne,a   %xcc, 1f;						\
-	 nop;								\
-	set     1, %g5;							\
-	wrpr    %g5, %tl;						\
-	rdpr    %tt, %g3;						\
-	set     2, %g5;							\
-	cmp     %g3, 0x80;						\
-	bl,a    %xcc, 1f;						\
-	 wrpr    %g5, %tl;						\
-	cmp     %g3, 0xff;						\
-	bg,a    %xcc, 1f;						\
-	 wrpr    %g5, %tl;						\
-	/* A window trap occurred. Restore the cwp at the time of the	\
-	 * original fault, as the trap will have changed it. */		\
-	rdpr	%tstate, %g5;						\
-	and	%g5, 0x1f, %g5;						\
-	wrpr	%g5, %cwp;						\
-	/* Jump to the O-trap handler. */				\
-	ba,pt   %xcc, OTRAP_C_ENTRY(func);				\
-	 wrpr    %g0, %tt; /* prevent this test succeeding again */     \
-1:      /* Now save the out registers to the trap frame. */		\
-    	sub	%sp, TRAP_FRAME_SIZE, %g6;				\
-	stx	%sp, [ %g6 + STACK_BIAS_64BIT + TRAP_FRAME_O6 ];	\
-	mov	%g6, %sp;						\
-	stx	%o0, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O0 ];	\
-	stx	%o1, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O1 ];	\
-	stx	%o2, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O2 ];	\
-	stx	%o3, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O3 ];	\
-	stx	%o4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O4 ];	\
-	stx	%o5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O5 ];	\
-	stx	%g4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_O7 ];/* saved o7 */\
-	/* switch to the main globals and save %g1 and %g5 */		\
-	rdpr	%pstate, %o0;						\
-	wrpr	%o0, PSTATE_AG, %pstate;				\
-	stx	%g1, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G1 ];	\
-	stx	%g2, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G2 ];	\
-	stx	%g3, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G3 ];	\
-	stx	%g4, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G4 ];	\
-	stx	%g5, [ %sp + STACK_BIAS_64BIT + TRAP_FRAME_G5 ];	\
-	/* call the kernel function, and then return from the trap */   \
-	call	func;							\
-	nop;								\
-	call	xtrap_retry;						\
-	nop
-
-/**
- * OTRAP_C_CALL: jump to the given C function, via glue code which fixes
- * up the stack and saves registers assuming that the trap was taken from TL=0
- */
-#define OTRAP_C_CALL(label) \
-	mov		%o7, %g4; \
-	call		OTRAP_C_ENTRY(label)
-
-/**
- * XTRAP_C_CALL: jump to the given C function, via glue code which fixes
- * up the stack and saves registers assuming that the trap was taken from TL>0
- */
-#define XTRAP_C_CALL(label) \
-	mov		%o7, %g4; \
-	call		XTRAP_C_ENTRY(label)
-
-/**
- * TRAP_C_GLUE: given a function name, define assembler procedures to be used
- * by [OX]TRAP_C_ENTRY to call that function.
- */
-#define TRAP_C_GLUE(func) \
-	DEFINE_OTRAP_GLUE(func); \
-	DEFINE_XTRAP_GLUE(func)
-
-/**
- * EXCEPTION_TTABLE_ENTRY: Create a trap table entry that calls send_exception
- * to handle a user-level trap.
- */
-#define EXCEPTION_TTABLE_ENTRY(label)							\
-BEGIN_TTABLE_ENTRY(label,O)								\
-	OTRAP_C_CALL(send_exception);							\
-	nop
-
-#endif /* !__GLUE_V4_SPARC64__TTABLE_H__ */
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/Makeconf b/kernel/src/glue/v4-sparc64/ultrasparc/Makeconf
deleted file mode 100644
index 137c2b2a..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES +=$(addprefix src/glue/v4-sparc64/ultrasparc/, interrupt.S space.cc timer.cc mmu_trap.S mmu.cc)
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/intctrl.h b/kernel/src/glue/v4-sparc64/ultrasparc/intctrl.h
deleted file mode 100644
index 561c6243..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/intctrl.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/ultrasparc/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.1 2004/02/03 02:07:50 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64_ULTRASPARC__INTCTRL_H__
-#define __GLUE__V4_SPARC64_ULTRASPARC__INTCTRL_H__
-
-#include <intctrl.h>
-
-class intctrl_t : public generic_intctrl_t {
-public:
-    void mask(word_t irq)		 { UNIMPLEMENTED(); }
-    // unmask returns true if an IRQ was already pending
-    bool unmask(word_t irq)		 { UNIMPLEMENTED(); return false; }
-    void mask_and_ack(word_t irq)	 { UNIMPLEMENTED(); }
-    void ack(word_t irq)		 { UNIMPLEMENTED(); }
-    void enable(word_t irq)		 { UNIMPLEMENTED(); }
-    void disable(word_t irq)		 { UNIMPLEMENTED(); }
-
-    /* set affinity/routing */
-    void set_cpu(word_t irq, word_t cpu) { UNIMPLEMENTED(); }
-
-    /* system-global initialization */
-    void init_arch()			 { UNIMPLEMENTED(); }
-    /* cpu-local initialization */
-    void init_cpu()			 { UNIMPLEMENTED(); }
-
-    word_t get_number_irqs()		 { return 0; }
-    bool is_irq_available(word_t irq)	 { UNIMPLEMENTED(); return false; }
-
-    /* handler invoked on interrupt */
-    void handle_irq(word_t irq)		 { UNIMPLEMENTED(); }
-};
-
-#endif /* !__GLUE__V4_SPARC64_ULTRASPARC__INTCTRL_H__ */
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/interrupt.S b/kernel/src/glue/v4-sparc64/ultrasparc/interrupt.S
deleted file mode 100644
index d3077305..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/interrupt.S
+++ /dev/null
@@ -1,60 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/ultrasparc/interrupt.S
- * Description:
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: interrupt.S,v 1.1 2004/02/12 06:14:54 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(ttable.h)
-
-TRAP_C_GLUE(timer_interrupt)
-
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_1,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_2,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_3,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_4,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_5,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_6,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_7,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_8,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_9,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_10,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_11,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_12,O)
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_13,O)
-
-BEGIN_TTABLE_ENTRY(interrupt_level_14,O)
-	/* XXX check that it's really a timer interrupt and not a level 14
-	 * SOFTINT */
-	OTRAP_C_CALL(timer_interrupt)
-	nop
-
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_level_15,O)
-
-UNIMPLEMENTED_TTABLE_ENTRY(interrupt_vector, O)
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/mmu.cc b/kernel/src/glue/v4-sparc64/ultrasparc/mmu.cc
deleted file mode 100644
index cbd33851..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/mmu.cc
+++ /dev/null
@@ -1,120 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/ultrasparc/mmu.cc
- * Description:  C handlers for MMU faults
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mmu.cc,v 1.2 2004/02/22 23:49:53 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_API(tcb.h)
-#include INC_GLUE(space.h)
-
-extern "C" void itsb_miss_handler(void)
-{
-    tpc_t tpc;
-    tpc.get();
-
-    //TRACEF("tpc = %p\n", tpc.tpc);
-    
-    space_t *space = get_current_tcb()->get_space();
-    if (EXPECT_FALSE(space == NULL)) {
-	space = get_kernel_space();
-    }
-
-    /* Try to add the mapping to the TSB. */
-    if(space->handle_tsb_miss((addr_t)tpc.tpc, tlb_t::i_tlb)) {
-	return;
-    }
-
-    /* No mapping found. Generate a page fault. */
-    tstate_t tstate;
-    tstate.get();
-
-    space->handle_pagefault((addr_t)tpc.tpc, (addr_t)tpc.tpc, space_t::execute,
-	    		    tstate.get_pstate().pstate.priv);
-
-}
-
-extern "C" void dtsb_miss_handler(void)
-{
-    word_t access_reg = tlb_t::get_tag_access(tlb_t::d_tlb);
-    hw_asid_t context = access_reg & ((1ULL << SPARC64_PAGE_BITS) - 1);
-    addr_t vaddr = (addr_t)(access_reg & ~((1ULL << SPARC64_PAGE_BITS) - 1));
-
-    //TRACEF("context = %x vaddr = %p\n", context, vaddr);
-
-    space_t *space = space_t::lookup_space(context);
-    if (EXPECT_FALSE(space == NULL)) {
-	space = get_kernel_space();
-    }
-
-    /* Try to add the mapping to the TSB. */
-    if(space->handle_tsb_miss(vaddr, tlb_t::d_tlb)) {
-	return;
-    }
-
-    /* No mapping found. Generate a page fault. */
-    tpc_t tpc;
-    sfsr_t sfsr;
-    tstate_t tstate;
-
-    tpc.get();
-    tstate.get();
-    sfsr.get(sfsr_t::data);
-
-    space->handle_pagefault(vaddr, (addr_t)tpc.tpc,
-	    		    sfsr.sfsr.w ? space_t::write : space_t::read,
-	    		    tstate.get_pstate().pstate.priv);
-}
-
-extern "C" void data_fault_handler(void)
-{
-    word_t access_reg = tlb_t::get_tag_access(tlb_t::d_tlb);
-    hw_asid_t context = access_reg & ((1ULL << SPARC64_PAGE_BITS) - 1);
-    addr_t vaddr = (addr_t)(access_reg & ~((1ULL << SPARC64_PAGE_BITS) - 1));
-
-    //TRACEF("context = %x vaddr = %p\n", context, vaddr);
-    
-    /* Look up the faulting page */
-    space_t *space = space_t::lookup_space(context);
-    if (EXPECT_FALSE(space == NULL)) {
-	space = get_kernel_space();
-    }
-
-    /* determine the faulting address and handle the fault */
-    tpc_t tpc;
-    sfsr_t sfsr;
-    tstate_t tstate;
-
-    tpc.get();
-    tstate.get();
-    sfsr.get(sfsr_t::data);
-
-    space->handle_pagefault(vaddr, (addr_t)tpc.tpc,
-	    		    sfsr.sfsr.w ? space_t::write : space_t::read,
-	    		    tstate.get_pstate().pstate.priv);
-}
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/mmu_trap.S b/kernel/src/glue/v4-sparc64/ultrasparc/mmu_trap.S
deleted file mode 100644
index bd197a34..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/mmu_trap.S
+++ /dev/null
@@ -1,298 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/ultrasparc/mmu_trap.S
- * Description:  UltraSPARC MMU trap handlers.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mmu_trap.S,v 1.7 2004/05/24 03:06:10 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(ttable.h)
-#include INC_ARCH(asi.h)
-#include INC_CPU(asi.h)
-
-#include <asmsyms.h>
-
-/* glue procedures for C functions called in this file */
-/* these functions are defined in glue/v4-sparc64/ultrasparc/mmu.c */
-TRAP_C_GLUE(itsb_miss_handler)
-TRAP_C_GLUE(dtsb_miss_handler)
-TRAP_C_GLUE(data_fault_handler)
-
-/* User-mode faults which cause an exception ipc */
-EXCEPTION_TTABLE_ENTRY(instruction_access_exception)
-EXCEPTION_TTABLE_ENTRY(data_access_exception)
-EXCEPTION_TTABLE_ENTRY(instruction_access_error)
-EXCEPTION_TTABLE_ENTRY(data_access_error)
-
-/**
- * fast_instruction_access_MMU_miss,X: I-TLB miss in kernel mode
- * Constraints: 32 instructions or less
- */
-BEGIN_TTABLE_ENTRY(fast_instruction_access_MMU_miss,O)
-	/* check for 8kb page tsb hit */
-	ldxa		[ %g0 ] ASI_IMMU_TSB_8KB_PTR, %g4
-	ldxa		[ %g0 ] ASI_IMMU, %g1
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	brgez,pn	%g3, 1f
-	xorcc		%g1, %g2, %g0 /* test tag (global bit ignored) */
-	bz,pt		%xcc, 2f
-	or		%g3, 0x400, %g3 /* XXX */
-1:	/* check for 64kb page tsb hit */
-	ldxa		[ %g0 ] ASI_IMMU_TSB_64KB_PTR, %g4
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	brgez,pn	%g3, 1f
-	xorcc		%g1, %g2, %g0
-	bz,pt		%xcc, 2f
-	or		%g3, 0x400, %g3 /* XXX */
-	/* tsb miss, call the tsb miss handler */
-1:	rdpr		%pstate, %g5
-	wrpr		%g5, (PSTATE_MG | PSTATE_AG), %pstate
-	OTRAP_C_CALL(itsb_miss_handler)
-	nop
-2:	/* tsb hit. set execute access bit in the tsb and load the tlb */
-	stx		%g3, [ %g4 + 8 ] 
-	stxa		%g3, [ %g0 ] ASI_ITLB_DATA_IN
-	retry
-
-/**
- * fast_data_access_MMU_miss,O: D-TLB miss in user mode
- * Constraints: 32 instructions or less
- */
-BEGIN_TTABLE_ENTRY(fast_data_access_MMU_miss,O)
-	/* check for 8kb page tsb hit */
-	ldxa		[ %g0 ] ASI_DMMU_TSB_8KB_PTR, %g4
-	ldxa		[ %g0 ] ASI_DMMU, %g1
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	brgez,pn	%g3, 1f
-	xorcc		%g1, %g2, %g0 /* test tag (global bit ignored) */
-	bz,pt		%xcc, 2f
-	sethi		%hi(0x1000), %g6 /* XXX */ 
-1:	/* check for 64kb page tsb hit */
-	ldxa		[ %g0 ] ASI_DMMU_TSB_64KB_PTR, %g4
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	brgez,pn	%g3, 1f
-	xorcc		%g1, %g2, %g0
-	bz,pt		%xcc, 2f
-	sethi		%hi(0x1000), %g6 /* XXX */ 
-	/* tsb miss, call the tsb miss handler */
-1:	rdpr		%pstate, %g5
-	wrpr		%g5, (PSTATE_MG | PSTATE_AG), %pstate
-	OTRAP_C_CALL(dtsb_miss_handler)
-	nop
-2:	/* tsb hit. set read access bit in the tsb and load the tlb */
-	or		%g3, %g6, %g3
-	stx		%g3, [ %g4 + 8 ] 
-	stxa		%g3, [ %g0 ] ASI_DTLB_DATA_IN
-	retry
-
-/**
- * fast_data_access_protection,O: protection violation during data access
- * Constraints: 32 instructions or less
- */
-BEGIN_TTABLE_ENTRY(fast_data_access_protection,O)
-	/* the MMU has given us a pointer to a TSB entry, but we must still
-	 * check that it's the right entry - for superpage mappings it will
-	 * point to the 8kb half of the TSB, while the mapping is actually in
-	 * the 64kb half. Also, the TSB entry might have been replaced. */
-	ldxa		[ %g0 ] ASI_DMMU_TSB_DIRECT_PTR, %g4
-	ldxa		[ %g0 ] ASI_DMMU, %g1
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	xorcc		%g1, %g2, %g0
-	bnz,pn		%xcc, 1f /* not the right entry? */
-	/* load the TSB data, and check the w access and valid bits */
-	brgez,pn	%g3, 1f /* not a valid entry? */
-	andcc		%g3, 0x100, %g0 /* mask access w bit */
-	bz,pn		%xcc, 2f /* mapping not writable? */
-	/* set the write-reference and tlb_writable bits, store back into TSB */
-	or		%g3, 0x802, %g3 /* XXX */
-	stx		%g3, [ %g4 + 8 ]
-	/* now flush the entry from the TLB... */
-	set		TLB_SFSR, %g5
-	ldxa		[ %g5 ] ASI_DMMU, %g5
-	set		TLB_SFAR, %g1
-	ldxa		[ %g1 ] ASI_DMMU, %g1
-	set		0x1fff, %g6
-	andn		%g1, %g6, %g1 /* copy page number */
-	and		%g5, 0x30, %g5 /* copy context register select bits */
-	or		%g1, %g5, %g5 /* construct address for demap */
-	stxa		%g0, [ %g5 ] ASI_DMMU_DEMAP
-	/* ... and reload it */
-	stxa		%g3, [ %g0 ] ASI_DTLB_DATA_IN
-	retry
-1:	/* call handler for superpage accesses and TSB misses */
-	rdpr		%pstate, %g5
-	wrpr		%g5, (PSTATE_MG | PSTATE_AG), %pstate
-	OTRAP_C_CALL(dtsb_miss_handler)
-	nop
-2:	/* call handler for protection faults */
-	rdpr		%pstate, %g5
-	wrpr		%g5, (PSTATE_MG | PSTATE_AG), %pstate
-	OTRAP_C_CALL(data_fault_handler)
-	nop
-
-/* USED kernel traps that need to be implemented. */
-UNIMPLEMENTED_TTABLE_ENTRY(instruction_access_exception,X)
-UNIMPLEMENTED_TTABLE_ENTRY(instruction_access_error,X)
-UNIMPLEMENTED_TTABLE_ENTRY(data_access_exception,X)
-UNIMPLEMENTED_TTABLE_ENTRY(data_access_error,X)
-
-/**
- * fast_instruction_access_MMU_miss,X: I-TLB miss in kernel mode
- * Constraints: 32 instructions or less
- */
-BEGIN_TTABLE_ENTRY(fast_instruction_access_MMU_miss,X)
-	/* check for 8kb page tsb hit */
-	ldxa		[ %g0 ] ASI_IMMU_TSB_8KB_PTR, %g4
-	ldxa		[ %g0 ] ASI_IMMU, %g1
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	brgez,pn	%g3, 1f
-	xorcc		%g1, %g2, %g0 /* test tag (global bit ignored) */
-	bz,pt		%xcc, 2f
-	or		%g3, 0x400, %g3 /* XXX */
-1:	/* check for 64kb page tsb hit */
-	ldxa		[ %g0 ] ASI_IMMU_TSB_64KB_PTR, %g4
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	brgez,pn	%g3, 1f
-	xorcc		%g1, %g2, %g0
-	bz,pt		%xcc, 2f
-	or		%g3, 0x400, %g3 /* XXX */
-	/* tsb miss, call the tsb miss handler */
-1:	rdpr		%pstate, %g5
-	wrpr		%g5, (PSTATE_MG | PSTATE_AG), %pstate
-	XTRAP_C_CALL(itsb_miss_handler)
-	nop
-2:	/* tsb hit. set execute access bit in the tsb and load the tlb */
-	stx		%g3, [ %g4 + 8 ] 
-	stxa		%g3, [ %g0 ] ASI_ITLB_DATA_IN
-	retry
-
-/**
- * fast_data_access_MMU_miss,X: D-TLB miss in kernel mode
- * Constraints: 32 instructions or less
- */
-BEGIN_TTABLE_ENTRY(fast_data_access_MMU_miss,X)
-	/* check for 8kb page tsb hit */
-	ldxa		[ %g0 ] ASI_DMMU_TSB_8KB_PTR, %g4
-	ldxa		[ %g0 ] ASI_DMMU, %g1
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	brgez,pn	%g3, 1f
-	xorcc		%g1, %g2, %g0 /* test tag (global bit ignored) */
-	bz,pt		%xcc, 2f
-	sethi		%hi(0x1000), %g6 /* XXX */ 
-1:	/* check for 64kb page tsb hit */
-	ldxa		[ %g0 ] ASI_DMMU_TSB_64KB_PTR, %g4
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	brgez,pn	%g3, 1f
-	xorcc		%g1, %g2, %g0
-	bz,pt		%xcc, 2f
-	sethi		%hi(0x1000), %g6 /* XXX */ 
-	/* tsb miss, call the tsb miss handler */
-1:	rdpr		%pstate, %g5
-	wrpr		%g5, (PSTATE_MG | PSTATE_AG), %pstate
-	XTRAP_C_CALL(dtsb_miss_handler)
-	nop
-2:	/* tsb hit. set read access bit in the tsb and load the tlb */
-	or		%g3, %g6, %g3
-	stx		%g3, [ %g4 + 8 ] 
-	stxa		%g3, [ %g0 ] ASI_DTLB_DATA_IN
-	retry
-
-/**
- * fast_data_access_protection,X: protection violation during data access
- * Constraints: 32 instructions or less
- */
-BEGIN_TTABLE_ENTRY(fast_data_access_protection,X)
-	/* the MMU has given us a pointer to a TSB entry, but we must still
-	 * check that it's the right entry - for superpage mappings it will
-	 * point to the 8kb half of the TSB, while the mapping is actually in
-	 * the 64kb half. Also, the TSB entry might have been replaced. */
-	ldxa		[ %g0 ] ASI_DMMU_TSB_DIRECT_PTR, %g4
-	ldxa		[ %g0 ] ASI_DMMU, %g1
-	ldda		[ %g4 ] ASI_NUCLEUS_QUAD_LDD, %g2
-	xorcc		%g1, %g2, %g0
-	bnz,pn		%xcc, 1f /* not the right entry? */
-	/* load the TSB data, and check the w access and valid bits */
-	brgez,pn	%g3, 1f /* not a valid entry? */
-	andcc		%g3, 0x100, %g0 /* mask access w bit */
-	bz,pn		%xcc, 2f /* mapping not writable? */
-	/* set the write-reference and tlb_writable bits, store back into TSB */
-	or		%g3, 0x802, %g3 /* XXX */
-	stx		%g3, [ %g4 + 8 ]
-	/* now flush the entry from the TLB... */
-	set		TLB_SFSR, %g5
-	ldxa		[ %g5 ] ASI_DMMU, %g5
-	set		TLB_SFAR, %g1
-	ldxa		[ %g1 ] ASI_DMMU, %g1
-	set		0x1fff, %g6
-	andn		%g1, %g6, %g1 /* copy page number */
-	and		%g5, 0x30, %g5 /* copy context register select bits */
-	or		%g1, %g5, %g5 /* construct address for demap */
-	stxa		%g0, [ %g5 ] ASI_DMMU_DEMAP
-	/* ... and reload it */
-	stxa		%g3, [ %g0 ] ASI_DTLB_DATA_IN
-	retry
-1:	/* call handler for superpage accesses and TSB misses */
-	rdpr		%pstate, %g5
-	wrpr		%g5, (PSTATE_MG | PSTATE_AG), %pstate
-	XTRAP_C_CALL(dtsb_miss_handler)
-	nop
-2:	/* call handler for protection faults */
-	rdpr		%pstate, %g5
-	wrpr		%g5, (PSTATE_MG | PSTATE_AG), %pstate
-	XTRAP_C_CALL(data_fault_handler)
-	nop
-
-#ifdef CONFIG_KDB
-/* Kernel PA and VA watchpoints */
-BEGIN_TTABLE_ENTRY(VA_watchpoint,X)
-	/* Disable the watchpoint */
-	setx		0x600000, %g3, %g4
-	ldxa		[ %g0 ] ASI_LSU_CONTROL_REG, %g3
-	andn		%g3, %g4, %g3
-	stxa		%g3, [ %g0 ] ASI_LSU_CONTROL_REG
-	/* Jump to the debugger */
-	call		_Z12kdebug_entryPv
-	 nop
-
-BEGIN_TTABLE_ENTRY(PA_watchpoint,X)
-	/* Disable the watchpoint */
-	setx		0x1800000, %g3, %g4
-	ldxa		[ %g0 ] ASI_LSU_CONTROL_REG, %g3
-	andn		%g3, %g4, %g3
-	stxa		%g3, [ %g0 ] ASI_LSU_CONTROL_REG
-	/* Jump to the debugger */
-	call		_Z12kdebug_entryPv
-	 nop
-#endif
-
-/**
- *  The following MMU traps are not supported by UltraSPARC CPUs:
- *
- *  - instruction_access_MMU_miss, replaced by fast_instruction_access_MMU_miss.
- *  - data_access_MMU_miss, replaced by fast_data_access_MMU_miss.
- *  - data_access_protection, replaced by fast_data_access_protection.
- */
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/pgent.h b/kernel/src/glue/v4-sparc64/ultrasparc/pgent.h
deleted file mode 100644
index 82f8264b..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/pgent.h
+++ /dev/null
@@ -1,183 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, 2006, University of New South Wales
- *                
- * File path:   glue/v4-sparc64/ultrasparc/pgent.h
- * Description: Page table manipulation for the UltraSPARC CPU
- *              implementation of SPARC v9.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pgent.h,v 1.4 2006/11/17 17:00:38 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__ULTRASPARC__PGENT_H__
-#define __GLUE__V4_SPARC64__ULTRASPARC__PGENT_H__
-
-#include <debug.h> /* for UNIMPLEMENTED() */
-
-#include INC_GLUE_API_ARCH(hwspace.h)
-#include INC_CPU(mmu.h)
-#include INC_CPU(tsb.h)
-
-/**
- *  Note: MDB_SHIFTS and the page table layout are defined in INC_CPU(mmu.h)
- *  as they depend on the mmu.
- */
-
-/***********************
- * Forward declarations *
- ***********************/
-
-class mapnode_t;
-class space_t;
-
-struct tsb_data_t;
-
-class pgent_t
-{
-
-private:
-    union {
-	word_t raw;
-	struct {
-	    BITFIELD5(u64_t,
-		      subtree     : 50, /* Pointer to subtree.   */
-		      is_subtree  : 1,  /* 1 for valid subtree.  */
-		      is_valid    : 1,  /* 0 for subtree.        */
-		      __spare     : 9,  /* Can use later.        */		
-		      pgsize      : 3   /* Size this entry maps. */
-
-		     ) // BITFIELD5()
-	} tree; 
-
-	struct {
-	    BITFIELD13(u64_t,
-		__rv1       : 7,  /* Defined by tlb_data_t in INC_CPU(tlb.h) */
-		access_bits : 3,  /* Page is r/w/x.          Ignored by TLB. */
-		ref_bits    : 3,  /* Page has been r/w/x.    Ignored by TLB. */
-		__rv2       : 37, /* Defined by tlb_data_t.                  */
-		is_subtree  : 1,  /* 0 for leaf entry.       Ignored by TLB. */
-		is_valid    : 1,  /* 1 for valid leaf entry. Ignored by TLB. */
-		in_itsb     : 1,  /* Entry exists in I-TSB.  Ignored by TLB. */
-		in_dtsb     : 1,  /* Entry exists in D-TSB.  Ignored by TLB. */
-		__spare     : 4,  /* Can use later.          Ignored by TLB. */
-		__rv3       : 1,  /* Defined by tsb_data_t.  Ignored by TLB. */
-		__rv4       : 2,  /* Defined by tlb_data_t.                  */
-		pgsize      : 2,  /* See pgsize_e below (4m & smaller only). */
-		__rv5       : 1   /* Defined by tlb_data_t.                  */
-
-		      ) // BITFIELD13()
-	} leaf;
-
-    }; // union
-
-public:
-
-    enum pgsize_e {
-	size_8k = 0,
-	size_64k,  // 1, HW supported
-	size_512k, // 2, HW supported
-	size_4m,   // 3, HW supported
-	size_16m,  // 4, Level 3/5, 24 bits
-	size_16g,  // 5, Level 2/4, 34 bits
-
-#if (SPARC64_VIRTUAL_ADDRESS_BITS == 44)
-
-	size_16t,  // 6, Level 1, 44 bits
-	size_max = size_16g
-
-#elif (SPARC64_VIRTUAL_ADDRESS_BITS == 64)
-
-	size_16t,  // 6, Level 3, 44 bits
-	size_16p,  // 7, Level 2, 54 bits
-	size_16e,  // 8, Level 1, 64 bits
-	size_max = size_16p
-
-#else
-
-#warning Currently only support 44 or 64 bit virtual address spaces!
-
-#endif /* SPARC64_VIRTUAL_ADDRESS_BITS == * */
-
-    }; // pgsize_e
-
-    /**********
-     * Methods *
-     **********/
-
-public:
-
-    tsb_data_t* tsb_data(void);
-
-    // Predicates
-
-    bool is_valid(space_t * s, pgsize_e pgsize);
-    bool is_subtree(space_t * s, pgsize_e pgsize);
-    bool is_readable(space_t * s, pgsize_e pgsize);
-    bool is_writable(space_t * s, pgsize_e pgsize);
-    bool is_executable(space_t * s, pgsize_e pgsize);
-    bool is_kernel(space_t * s, pgsize_e pgsize);
-
-    // Retrieval
-
-    addr_t address(space_t * s, pgsize_e pgsize);
-    pgent_t * subtree(space_t * s, pgsize_e pgsize);
-    mapnode_t * mapnode(space_t * s, pgsize_e pgsize, addr_t vaddr);
-    addr_t vaddr(space_t * s, pgsize_e pgsize, mapnode_t * map);
-    word_t reference_bits(space_t * s, pgsize_e pgsize, addr_t vaddr);
-    word_t attributes(space_t * s, pgsize_e pgsize);
-
-    // Modification
-
-    void clear(space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr);
-    void insert(space_t * s, pgent_t::pgsize_e pgsize,
-		addr_t vaddr, tsb_t::tsb_e tsb);
-    void flush(space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr);
-    void make_subtree(space_t * s, pgsize_e pgsize, bool kernel);
-    void remove_subtree(space_t * s, pgsize_e pgsize, bool kernel);
-    void set_entry(space_t * s, pgsize_e pgsize, addr_t paddr,
-		   word_t rwx, word_t attrib, bool kernel);
-    void revoke_rights(space_t * s, pgsize_e pgsize, word_t rwx);
-    void update_rights(space_t * s, pgsize_e pgsize, word_t rwx);
-    void reset_reference_bits(space_t * s, pgsize_e pgsize);
-    void update_reference_bits(space_t *s, pgsize_e pgsize, word_t rwx);
-    void set_attributes(space_t * s, pgsize_e pgsize, word_t attrib);
-    void set_linknode(space_t * s, pgsize_e pgsize, 
-		      mapnode_t * map, addr_t vaddr);
-
-    // Movement
-
-    pgent_t * next(space_t * s, pgsize_e pgsize, word_t num);
-
-private:
-    // Linknode access
-
-    u64_t get_linknode(void);
-    void set_linknode(u64_t val);
-
-}; // pgent_t
-
-
-#endif /* !__GLUE__V4_SPARC64__ULTRASPARC__PGENT_H__ */
-
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/pgent_inline.h b/kernel/src/glue/v4-sparc64/ultrasparc/pgent_inline.h
deleted file mode 100644
index a547701c..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/pgent_inline.h
+++ /dev/null
@@ -1,345 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, 2006, University of New South Wales
- *                
- * File path:   glue/v4-sparc64/ultrasparc/pgent_inline.h
- * Description: Inlined functions for pgent_t
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pgent_inline.h,v 1.6 2006/11/17 17:00:38 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__ULTRASPARC__PGENT_INLINE_H__
-#define __GLUE__V4_SPARC64__ULTRASPARC__PGENT_INLINE_H__
-
-#include <kmemory.h>
-
-#include INC_GLUE_API_ARCH(space.h)
-
-EXTERN_KMEM_GROUP(kmem_space);
-
-INLINE tsb_data_t* pgent_t::tsb_data(void)
-{
-    return (tsb_data_t*)&this->raw;
-}
-
-// Predicates
-
-INLINE bool pgent_t::is_valid(space_t * s, pgsize_e pgsize)
-{
-    return leaf.is_valid || is_subtree(s, pgsize);
-}
-
-INLINE bool pgent_t::is_subtree(space_t * s, pgsize_e pgsize)
-{
-    if(pgsize < size_16m) {
-	return leaf.pgsize < (word_t)pgsize;
-    } else {
-	return tree.is_subtree;
-    }
-}
-
-INLINE bool pgent_t::is_readable(space_t * s, pgsize_e pgsize)
-{
-    return leaf.access_bits & READ_ACCESS_BIT;
-}
-
-INLINE bool pgent_t::is_writable(space_t * s, pgsize_e pgsize)
-{    
-    return leaf.access_bits & WRITE_ACCESS_BIT;
-}
-
-INLINE bool pgent_t::is_executable(space_t * s, pgsize_e pgsize)
-{
-    return leaf.access_bits & EXECUTE_ACCESS_BIT;
-}
-
-INLINE bool pgent_t::is_kernel(space_t * s, pgsize_e pgsize)
-{
-    return tsb_data()->privileged;
-}
-
-// Retrieval
-
-INLINE addr_t pgent_t::address(space_t * s, pgsize_e pgsize)
-{
-    return (addr_t)(tsb_data()->pfn << SPARC64_PAGE_BITS);
-}
-
-INLINE pgent_t * pgent_t::subtree(space_t * s, pgsize_e pgsize)
-{
-    if (pgsize < size_16m) {
-	return this;
-    } else {
-	return (pgent_t *) phys_to_virt((addr_t)tree.subtree);
-    }
-}
-
-INLINE mapnode_t * pgent_t::mapnode(space_t * s, pgsize_e pgsize, addr_t vaddr)
-{
-    return (mapnode_t *) (this->get_linknode() ^ (word_t) vaddr);
-}
-
-INLINE addr_t pgent_t::vaddr(space_t * s, pgsize_e pgsize, mapnode_t * map)
-{
-    return (addr_t) (this->get_linknode() ^ (word_t) map);
-}
-
-INLINE word_t pgent_t::reference_bits(space_t * s, pgsize_e pgsize, addr_t vaddr)
-{
-    tsbent_t *tsbent;
-    u16_t index = tsb_t::index(vaddr, (tlb_t::pgsize_e)pgsize);
-
-    if(pgsize == size_512k || pgsize == size_4m) {
-	/* have to search multiple TSB entries */
-	UNIMPLEMENTED();
-    }
-
-    if(leaf.in_itsb) {
-	tsb_t::get(index, &tsbent, 
-		   (pgsize == size_8k) ? tsb_t::i8k_tsb : tsb_t::i64k_tsb);
-
-	leaf.ref_bits |= tsbent->get_ref_bits();
-    }
-
-    if(leaf.in_dtsb) {
-	tsb_t::get(index, &tsbent, 
-		   (pgsize == size_8k) ? tsb_t::d8k_tsb : tsb_t::d64k_tsb);
-
-	leaf.ref_bits |= tsbent->get_ref_bits();
-    }
-
-    return leaf.ref_bits;
-}
-
-INLINE word_t pgent_t::attributes(space_t * s, pgsize_e pgsize)
-{
-    tsb_data_t* tsbent = this->tsb_data();
-    return tsbent->cache_attrib;
-}
-
-// Modification
-
-INLINE void pgent_t::clear(space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr)
-{
-    pgent_t tmp;
-    tmp.raw = raw;
-
-    raw = 0;
-    if(!kernel) {
-	set_linknode(0);
-    }
-
-    tmp.flush(s, pgsize, kernel, vaddr);
-}
-
-INLINE void pgent_t::insert(space_t * s, pgent_t::pgsize_e pgsize,
-			    addr_t vaddr, tsb_t::tsb_e tsb)
-{
-    u16_t index = tsb_t::index(vaddr, (tlb_t::pgsize_e)pgsize);
-
-    tsbent_t* tsbent;
-    tsb_t::get(index, &tsbent, tsb);
-
-    if(tsbent->get_ref_bits() &&
-       tsbent->get_asid() != INVALID_CONTEXT
-       && tsbent->get_tlb_valid())
-    {
-	space_t* evicted_space;
-	pgent_t* evicted_pgent;
-	pgent_t::pgsize_e evicted_pgsize;
-
-	evicted_space = space_t::lookup_space(tsbent->get_asid());
-	if(evicted_space == NULL) {
-	    evicted_space = get_kernel_space();
-	}
-
-	if(!evicted_space->lookup_mapping(tsbent->get_va(index),
-					  &evicted_pgent, &evicted_pgsize))
-	{
-	    enter_kdebug("Evicting invalid mapping!\n");
-	}
-
-	evicted_pgent->leaf.ref_bits |= tsbent->get_ref_bits();
-    }
-
-    tsbent->set_data(tsb_data());
-    tsbent->set_va(vaddr);
-    tsbent->set_asid(s->get_context());
-
-    if(tsb == tsb_t::d8k_tsb || tsb == tsb_t::d64k_tsb) {
-	leaf.in_dtsb = 1;
-    } else {
-	leaf.in_itsb = 1;
-    }
-}
-
-INLINE void pgent_t::flush(space_t * s, pgsize_e pgsize, bool kernel, addr_t vaddr)
-{
-    if(pgsize == size_512k || pgsize == size_4m) {
-	/* have to search multiple TSB entries */
-	UNIMPLEMENTED();
-    }
-
-    /* remove the entry from the TSBs, updating reference bits in the process */
-    tsbent_t *tsbent;
-    u16_t index = tsb_t::index(vaddr, (tlb_t::pgsize_e)pgsize);
-
-    if(leaf.in_itsb) {
-	tsb_t::get(index, &tsbent, 
-		   (pgsize == size_8k) ? tsb_t::i8k_tsb : tsb_t::i64k_tsb);
-
-	leaf.ref_bits |= tsbent->get_ref_bits();
-	tsbent->set_asid(INVALID_CONTEXT);
-	leaf.in_itsb = 0;
-    }
-
-    if(leaf.in_dtsb) {
-	tsb_t::get(index, &tsbent, 
-		   (pgsize == size_8k) ? tsb_t::d8k_tsb : tsb_t::d64k_tsb);
-
-	leaf.ref_bits |= tsbent->get_ref_bits();
-	tsbent->set_asid(INVALID_CONTEXT);
-	leaf.in_dtsb = 0;
-    }
-
-    mmu_t::unmap(s->get_context(), vaddr, tlb_t::all_tlb);
-}
-
-INLINE void pgent_t::make_subtree(space_t * s, pgsize_e pgsize, bool kernel)
-{
-    if(pgsize >= size_16m) {
-	/* All levels are 10 bits worth of VA, except for the leaf level which has 
-	 * 11 bits and is also twice the size to accomodate the SPT */
-	addr_t page = kmem.alloc(kmem_space, sizeof(word_t) * 
-				 ((pgsize == size_16m) ? (1 << 11) * 2 : (1 << 10)));
-	this->tree.subtree = (word_t)virt_to_phys(page);
-	this->tree.is_subtree = 1;
-	this->tree.is_valid = 0;
-    } else {
-	leaf.is_valid = 0;
-	leaf.pgsize = pgsize - 1;
-    }
-}
-
-INLINE void pgent_t::remove_subtree(space_t * s, pgsize_e pgsize, bool kernel)
-{
-    if(pgsize >= size_16m) {
-	addr_t page = this->subtree(s, pgsize);
-	this->raw = 0;
-
-	kmem.free(kmem_space, page, sizeof(word_t) *
-		  (pgsize == size_16m) ? (1 << 11) * 2 : (1 << 10));
-    }
-}
-
-INLINE void pgent_t::set_entry(space_t * s, pgsize_e pgsize, addr_t paddr,
-			       word_t rwx, word_t attrib, bool kernel)
-{
-    this->raw = 0;
-    this->leaf.access_bits = (rwx & 4 ? READ_ACCESS_BIT : 0) |
-	(rwx & 2 ? WRITE_ACCESS_BIT : 0) |
-	(rwx & 1 ? EXECUTE_ACCESS_BIT : 0);
-    this->leaf.pgsize = pgsize;
-
-    tsb_data_t* tsbent = this->tsb_data();
-    tsbent->privileged = kernel;
-    tsbent->pfn = (word_t)paddr >> SPARC64_PAGE_BITS;
-    tsbent->tlb_valid = 1;
-    tsbent->cache_attrib = attrib;
-
-    this->leaf.is_valid = 1;
-}
-
-INLINE void pgent_t::revoke_rights(space_t * s, pgsize_e pgsize, word_t rwx)
-{
-    this->leaf.access_bits &= ~rwx;
-}
-
-INLINE void pgent_t::update_rights(space_t * s, pgsize_e pgsize, word_t rwx)
-{
-    this->leaf.access_bits |= rwx;
-}
-
-INLINE void pgent_t::reset_reference_bits(space_t * s, pgsize_e pgsize)
-{
-    leaf.ref_bits = 0;
-}
-
-INLINE void pgent_t::update_reference_bits(space_t *s, pgsize_e pgsize,
-					   word_t rwx)
-{
-    leaf.ref_bits |= rwx;
-}
-
-INLINE void pgent_t::set_attributes(space_t * s, pgsize_e pgsize,
-				    word_t attrib)
-{
-    tsb_data_t* tsbent = this->tsb_data();
-    tsbent->cache_attrib = attrib;
-}
-
-
-INLINE void pgent_t::set_linknode(space_t * s, pgsize_e pgsize, 
-				  mapnode_t * map, addr_t vaddr)
-{
-    set_linknode((word_t) map ^ (word_t) vaddr);
-}
-
-// Movement
-
-INLINE pgent_t * pgent_t::next(space_t * s, pgsize_e pgsize, word_t num)
-{
-    switch(pgsize) {
-	/* Following four sizes are the MMU-supported leaf entry sizes; all appear
-	 * in the bottom level of the page table */
-    case size_8k:
-	return this + num;
-    case size_64k:
-	return this + 8*num;
-    case size_512k:
-	return this + 64*num;
-    case size_4m:
-	return this + 512*num;
-
-    default:
-	return this + num;
-    }
-}
-
-// Linknode access
-
-#define PT_BOTTOMLEVEL_SIZE	((1 << 11) * sizeof(pgent_t))
-
-INLINE u64_t pgent_t::get_linknode(void)
-{
-    return *(word_t *)((word_t) this + PT_BOTTOMLEVEL_SIZE);
-}
-
-INLINE void pgent_t::set_linknode(u64_t val)
-{
-    *(word_t *)((word_t) this + PT_BOTTOMLEVEL_SIZE) = val;
-}
-
-#endif /* !__GLUE__V4_SPARC64__ULTRASPARC__PGENT_INLINE_H__ */
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/space.cc b/kernel/src/glue/v4-sparc64/ultrasparc/space.cc
deleted file mode 100644
index 9ac3c00b..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/space.cc
+++ /dev/null
@@ -1,184 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, 2006, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/ultrasparc/space.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: space.cc,v 1.7 2006/11/17 17:01:04 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include <kmemory.h>
-#include <linear_ptab.h>
-
-#include INC_GLUE_API_ARCH(space.h)
-#include INC_CPU(tsb.h)
-#include INC_API(kernelinterface.h)
-
-EXTERN_KMEM_GROUP(kmem_space);
-
-tsbarrays_t tsb_t::arrays SECTION(".tsb");
-asid_cache_t asid_cache UNIT("cpulocal");
-
-/************************
-* System initialisation *
-************************/
-
-/**
- *  space_t::init_kernel_space()
- *  Initialize kernel space_t.
- *  Notes: The space_t fields kip_area, utcb_area and thread_count unused by
- *  kernel space_t.
- */
-void SECTION(".init.memory")
-space_t::init_kernel_space()
-{
-    extern space_t kernel_space;
-
-    mmu_t::init();
-
-    /* Allocate kernel page directory. */
-
-    kernel_space.pgdir =
-	(u64_t)kmem.alloc(kmem_space, sizeof(pgent_t) * PT_LEVEL1ENTRIES) >>
-	SPARC64_PAGE_BITS;
-    ASSERT(kernel_space.pgdir);
-
-    /* Initialise TSB and pinned TSB kernel mappings for physical memory. */
-    tsb_t tsb;
-
-    tsb.init();
-
-    /**
-     *  Allocate asids and asid cache and kernel asid.
-     *  Notes: The UltraSPARC implements 13 bits of ASID tag.
-     *  context 0 is the hardware defined asid of the NUCLEUS or kernel context.
-     *  context (NUM_CONTEXTS-1) is used to mark invalid TSB entries.
-     */
-
-    word_t last_asid;
-
-    if(CONFIG_MAX_NUM_ASIDS < NUM_CONTEXTS - 1) {
-	last_asid = CONFIG_MAX_NUM_ASIDS;
-    } else {
-	last_asid = NUM_CONTEXTS - 2;
-    }
-
-    get_asid_cache()->init();
-    get_asid_cache()->set_valid(2, last_asid);
-
-    kernel_space.asid.init_kernel(NUCLEUS_CONTEXT);
-    kernel_space.context = NUCLEUS_CONTEXT;
-
-    kernel_space->enqueue_spaces();
-} // space_t::init_kernel_space()
-
-/*************************
- * space_t implementation *
- *************************/
-
-/**
- * initialize a space
- *
- * @param utcb_area	fpage describing location of UTCB area
- * @param kip_area	fpage describing location of KIP
- */
-void space_t::init (fpage_t utcb_area, fpage_t kip_area)
-{
-    this->utcb_area = utcb_area;
-    this->kip_area = kip_area;
-
-    /* Allocate page directory. */
-    pgdir =
-	(u64_t)kmem.alloc(kmem_space, sizeof(pgent_t) * PT_LEVEL1ENTRIES) >>
-	SPARC64_PAGE_BITS;
-    ASSERT(pgdir);
-
-    asid.init();
-
-    /* Map the KIP */
-    add_mapping(kip_area.get_base(), virt_to_phys((addr_t)get_kip()), 
-		pgent_t::size_8k, tlb_t::cache_phy, false, false, false);
-}
-
-
-/**
- * Add a mapping to this address space
- */
-void space_t::add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size,
-			  tlb_t::cache_attrib_e cache, bool writable,
-			  bool executable, bool kernel)
-{
-    pgent_t * pg = this->pgent(page_table_index(pgent_t::size_max, vaddr), 0);
-    pgent_t::pgsize_e pgsize = pgent_t::size_max;
-
-    /* 
-     * Sanity check page size 
-     */
-    // philipd (11/12/03) XXX: 8k only at first
-    ASSERT(size == pgent_t::size_8k);
-
-    /*
-     * Lookup mapping
-     */
-    while (pgsize > size)
-    {
-	if (pg->is_valid (this, pgsize))
-	{
-	    if (! pg->is_subtree (this, pgsize))
-	    {
-		printf ("%dKB mapping @ %p space %p already exists.\n",
-			page_size (pgsize) >> 10, vaddr, this);
-		enter_kdebug ("mapping exists");
-
-		return;
-	    }
-	}
-	else
-	{
-	    // Create subtree
-	    pg->make_subtree (this, pgsize, kernel);
-	}
-
-	pg = pg->subtree (this, pgsize)->next
-	    (this, pgsize-1, page_table_index (pgsize-1, vaddr));
-	pgsize--;
-    }
-
-    /*
-     * Modify page table and set TSB entries
-     */
-    pg->set_entry (this, pgsize, paddr,
-		   4 | (writable ? 2 : 0) | (executable ? 1 : 0),
-		   cache, kernel);
-    if(executable) {
-	pg->insert(this, pgsize, vaddr,
-		   pgsize == pgent_t::size_8k ?
-		   	tsb_t::i8k_tsb : tsb_t::i64k_tsb);
-    }
-    pg->insert(this, pgsize, vaddr,
-	       pgsize == pgent_t::size_8k ? tsb_t::d8k_tsb : tsb_t::d64k_tsb);
-}
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/space.h b/kernel/src/glue/v4-sparc64/ultrasparc/space.h
deleted file mode 100644
index ba5441bb..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/space.h
+++ /dev/null
@@ -1,300 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, 2006, University of New South Wales
- *
- * File path:    glue/v4-sparc64/ultrasparc/space.h
- * Description:  space_t implmentation for UltraSPARC CPUs.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: space.h,v 1.8 2006/11/14 18:44:57 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__ULTRASPARC__SPACE_H__
-#define __GLUE__V4_SPARC64__ULTRASPARC__SPACE_H__
-
-#include <asid.h>
-#include <debug.h>           /* for UNIMPLEMENTED() */
-
-#include INC_API(types.h)
-#include INC_API(fpage.h)    /* fpage_t    */
-#include INC_API(thread.h)   /* threadid_t */
-#include INC_API(queueing.h)
-#include INC_GLUE_API_CPU(pgent.h)
-#include INC_CPU(tsb.h)
-
-// Even if new MDB is not used we need the mdb_t::ctrl_t
-#include <mdb.h>
-
-#define PGSIZE_KTCB	(pgent_t::size_8k)
-#define PGSIZE_KIP	(pgent_t::size_8k)
-#define PGSIZE_UTCB	(pgent_t::size_8k)
-
-/*******************
-* inline functions *
-*******************/
-
-INLINE space_t * get_kernel_space()
-{
-    extern space_t kernel_space;
-
-    return &kernel_space;
-}
-
-/* forward declarations - space_t depends on tcb_t and utcb_t */
-class tcb_t;
-class utcb_t;
-
-/**
- * The address space representation
- */
-class space_t {
-public:
-    enum access_e {
-	read,
-	write,
-	readwrite,
-	execute
-
-    }; // access_e
-
-    void init(fpage_t utcb_area, fpage_t kip_area);
-    void free();
-    bool sync_kernel_space(addr_t addr);
-    void handle_pagefault(addr_t addr, addr_t ip, access_e access, bool kernel);
-    bool is_initialized();
-
-    /* mapping */
-    void map_sigma0(addr_t addr);
-    void map_fpage(fpage_t snd_fp, word_t base, 
-		   space_t * t_space, fpage_t rcv_fp, bool grant);
-    fpage_t unmap_fpage(fpage_t fpage, bool flush, bool unmap_all);
-    fpage_t mapctrl (fpage_t fpage, mdb_t::ctrl_t ctrl,
-		     word_t attribute, bool unmap_all);
-
-    /* tcb management */
-    void allocate_tcb(addr_t addr);
-    void map_dummy_tcb(addr_t addr);
-    utcb_t * allocate_utcb(tcb_t * tcb);
-
-    tcb_t * get_tcb(threadid_t tid);
-    tcb_t * get_tcb(void * ptr);
-
-    ringlist_t<space_t> get_spaces_list() {
-	return spaces_list;
-    }
-    tcb_t * get_thread_list() {
-	return thread_list;
-    }
-    void enqueue_spaces();
-    void dequeue_spaces();
-
-    /* address ranges */
-    bool is_user_area(addr_t addr);
-    bool is_user_area(fpage_t fpage);
-    bool is_tcb_area(addr_t addr);
-    bool is_mappable(addr_t addr);
-    bool is_mappable(fpage_t fpage);
-    bool is_arch_mappable(addr_t addr, size_t size) { return true; }
-
-    /* Copy area related methods */
-    bool is_copy_area(addr_t addr);
-    word_t get_copy_limit(addr_t addr, word_t limit);
-
-    /* kip and utcb handling */
-    fpage_t get_kip_page_area();
-    fpage_t get_utcb_page_area();
-
-    /* reference counting */
-    void add_tcb(tcb_t * tcb);
-    bool remove_tcb(tcb_t * tcb);
-
-    /* space control */
-    word_t space_control(word_t ctrl);
-
-public: /* SPARC v9 specific functions. */
-
-    /* update hooks */
-    static void begin_update(void);
-    static void end_update(void);
-
-    /* linear page table walker methods */
-    pgent_t * pgent(word_t num, word_t cpu = 0);
-    void release_kernel_mapping(addr_t vaddr, addr_t paddr, word_t log2size);
-    bool lookup_mapping(addr_t vaddr, pgent_t ** pg, pgent_t::pgsize_e * size);
-    bool readmem(addr_t vaddr, word_t * contents);
-    static word_t readmem_phys(addr_t paddr);
-
-    void add_mapping(addr_t vaddr, addr_t paddr, pgent_t::pgsize_e size,
-		     tlb_t::cache_attrib_e cache, bool writable, bool executable,
-		     bool kernel);
-
-public: /* UltraSPARC specific functions. */
-
-    bool handle_tsb_miss(addr_t vaddr, tlb_t::tlb_e tsb);
-    word_t get_context() { return asid.get(); }
-    pgent_t* get_pdir() { return (pgent_t*)(pgdir << SPARC64_PAGE_BITS); }
-    static space_t* lookup_space(hw_asid_t hw_asid);
-
-    /* linear page table walker TLB maintainence methods. */
-    void flush_tlb(space_t * curspace);
-    void flush_tlbent(space_t * curspace, addr_t vaddr, word_t log2size);
-    bool does_tlbflush_pay(word_t log2size);
-
-    /* Kernel space. */
-    static void SECTION(".init.memory") init_kernel_space(void);
-
-private: /* SPARC v9 specific fields. */
-
-    fpage_t kip_area;
-    fpage_t utcb_area;
-    word_t  thread_count;
-    ringlist_t<space_t>	spaces_list;
-    tcb_t * thread_list;
-
-private: /* UltraSPARC specific fields. */
-
-    struct {
-	BITFIELD2(u64_t,
-		  pgdir   : 51, /* */
-		  context : 13  /* */
-
-		 ) // BITFIELD2()
-
-    }; // struct
-    asid_t asid;
-
-}__attribute__((packed)); // space_t
-
-#include INC_GLUE_API_CPU(pgent_inline.h)
-
-/**
- * enqueue a spaces into the spaces list
- * the present list primarily exists for debugging reasons
- */
-#ifdef CONFIG_DEBUG
-extern space_t * global_spaces_list;
-extern spinlock_t spaces_list_lock;
-#endif
-
-INLINE void space_t::enqueue_spaces()
-{
-#ifdef CONFIG_DEBUG
-    spaces_list_lock.lock();
-    ENQUEUE_LIST_TAIL(global_spaces_list, this, spaces_list);
-    spaces_list_lock.unlock();
-#endif
-}
-
-INLINE void space_t::dequeue_spaces()
-{
-#ifdef CONFIG_DEBUG
-    spaces_list_lock.lock();
-    DEQUEUE_LIST(global_spaces_list, this, spaces_list);
-    spaces_list_lock.unlock();
-#endif
-}
-
-/* space_t: UltraSPARC specific functions. */
-
-INLINE bool
-space_t::handle_tsb_miss(addr_t vaddr, tlb_t::tlb_e tlb)
-{
-    pgent_t *pg;
-    pgent_t::pgsize_e size;
-    tsb_t::tsb_e tsb;
-
-    if(!lookup_mapping(vaddr, &pg, &size)) {
-	return false;
-    }
-
-    if(tlb == tlb_t::d_tlb || tlb == tlb_t::all_tlb) {
-	tsb = (size == pgent_t::size_8k) ? tsb_t::d8k_tsb : tsb_t::d64k_tsb;
-	pg->insert(this, size, vaddr, tsb);
-    }
-
-    if(tlb == tlb_t::i_tlb || tlb == tlb_t::all_tlb) {
-	tsb = (size == pgent_t::size_8k) ? tsb_t::i8k_tsb : tsb_t::i64k_tsb;
-	pg->insert(this, size, vaddr, tsb);
-    }
-
-    return true;
-}
-
-INLINE space_t *
-space_t::lookup_space(hw_asid_t hw_asid)
-{
-    asid_cache_t* asid_cache = get_asid_cache();
-    asid_t* asid = asid_cache->lookup(hw_asid);
-    if(asid == (asid_t*)-1) { return NULL; }
-    return (space_t*)((word_t)asid - offsetof(space_t, asid));
-}
-
-INLINE void
-space_t::flush_tlb(space_t * curspace)
-{
-    if(this == get_kernel_space()) {
-	/**
-	 *  The kernel context must not be flushed otherwise the pinned mappings
-	 *  for the Trap Table, etc will be flushed and the system will end up
-	 *  in a bad state. If we ever need to implment this the handler will
-	 *  need to manually sift through the TLB entries one at a time and
-	 *  flush the unlocked ones only.
-	 */
-	UNIMPLEMENTED();
-
-    } else { // User space.
-	//if(this->context.is_valid()) { // An invalid context has no TLB entries.
-	//  mmu_t::unmap(this->context, (this == curspace) ? 
-	//		   context_t::primary : context_t::secondary,
-	//		   tlb_t::all_tlb);
-	//}
-    }
-}
-
-INLINE void
-space_t::flush_tlbent(space_t * curspace, addr_t vaddr, word_t log2size)
-{
-    if(this == get_kernel_space()) {
-	//mmu_t::unmap(this->context, context_t::nucleus, vaddr, tlb_t::all_tlb);
-
-    } else { // User space.
-
-	//if(this->context.is_valid()) { // An invalid context has no TLB entries.
-	//  mmu_t::unmap(this->context,(this == curspace) ?
-	//		   context_t::primary : context_t::secondary,
-	//		   vaddr, tlb_t::all_tlb);
-	//}
-    }
-}
-
-INLINE bool
-space_t::does_tlbflush_pay(word_t log2size)
-{
-    UNIMPLEMENTED();
-
-    return false;
-}
-
-
-#endif /* !__GLUE__V4_SPARC64__SPACE_H__ */
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/timer.cc b/kernel/src/glue/v4-sparc64/ultrasparc/timer.cc
deleted file mode 100644
index 69c0d5c6..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/timer.cc
+++ /dev/null
@@ -1,105 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/timer.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.cc,v 1.3 2004/07/01 04:09:33 philipd Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(schedule.h)
-#include INC_GLUE_API_ARCH(timer.h)
-#include INC_CPU(asi.h)
-
-timer_t timer UNIT("cpulocal");
-
-static word_t timer_interval;
-
-INLINE void
-set_tick_cmpr(word_t tick_cmpr)
-{
-    asm volatile (
-	"1: wr	%0, 0, %%tick_cmpr\n\t"
-	  :: "r" (tick_cmpr)
-    );
-}
-
-INLINE word_t
-get_tick(void)
-{
-    word_t tick;
-    asm volatile (
-	"rdpr	%%tick, %0\n\t"
-	: "=r" (tick)
-    );
-    return tick;
-}
-
-INLINE void
-set_tick(word_t tick)
-{
-    asm volatile (
-	"wrpr	%0, %%tick\n\t"
-	:: "r" (tick)
-    );
-}
-
-void SECTION(".init")
-timer_t::init_global(void)
-{
-    extern word_t plat_cpu_freq;
-    
-    timer_interval = TIMER_TICK_LENGTH * plat_cpu_freq / 1000000;
-
-    TRACE_INIT("Timebase frequency %dHz\n", plat_cpu_freq);
-}
-
-void SECTION(".init")
-timer_t::init_cpu(void)
-{
-    set_tick_cmpr(timer_interval);
-    
-    last_tick = 0;
-
-    set_tick(0);
-}
-
-extern "C" void timer_interrupt(void)
-{
-    word_t new_tick;
-    timer_t* timer = get_timer();
-
-    do {
-	timer->last_tick += timer_interval;
-	set_tick_cmpr(timer->last_tick);
-	new_tick = get_tick();
-    } while(timer->last_tick < new_tick);
-
-    asm volatile ("wr %g0, 1, %clear_softint");
-    
-    get_current_scheduler()->handle_timer_interrupt();
-}
diff --git a/kernel/src/glue/v4-sparc64/ultrasparc/timer.h b/kernel/src/glue/v4-sparc64/ultrasparc/timer.h
deleted file mode 100644
index 278bd68e..00000000
--- a/kernel/src/glue/v4-sparc64/ultrasparc/timer.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C)  2003-2004,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/ultrasparc/timer.h
- * Description:
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: timer.h,v 1.2 2004/05/21 02:34:53 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__ULTRASPARC__TIMER_H__
-#define __GLUE__V4_SPARC64__ULTRASPARC__TIMER_H__
-
-#include <timer.h>
-
-class timer_t : public generic_periodic_timer_t {
-public:
-    void init_global();
-    void init_cpu();
-    word_t last_tick;
-}; // timer_t
-
-INLINE timer_t * get_timer()
-{
-    extern timer_t timer;
-
-    return &timer;
-
-} // get_timer()
-
-
-#endif /* !__GLUE__V4_SPARC64__ULTRASPARC__TIMER_H__ */
diff --git a/kernel/src/glue/v4-sparc64/user.S b/kernel/src/glue/v4-sparc64/user.S
deleted file mode 100644
index 0a232b56..00000000
--- a/kernel/src/glue/v4-sparc64/user.S
+++ /dev/null
@@ -1,58 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/user.S
- * Description:  User-level entry points for system calls
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: user.S,v 1.1 2004/02/12 05:48:52 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_GLUE(syscalls.h)
-
-#define SYSCALL(name)						\
-BEGIN_PROC(user_##name,".user."STR(name))			\
-	ta	SYSCALL_##name;					\
-	retl;							\
-	 nop
-
-#define SYSCALL_UNIMPLEMENTED(name)				\
-BEGIN_PROC(user_##name,".user."STR(name))			\
-	retl;							\
-	 nop
-
-SYSCALL(ipc)
-SYSCALL(exchange_registers)
-SYSCALL(thread_control)
-SYSCALL(thread_switch)
-SYSCALL(schedule)
-SYSCALL(unmap)
-SYSCALL(space_control)
-SYSCALL(memory_control)
-
-SYSCALL_UNIMPLEMENTED(system_clock)
-SYSCALL_UNIMPLEMENTED(lipc)
-SYSCALL_UNIMPLEMENTED(processor_control)
diff --git a/kernel/src/glue/v4-sparc64/utcb.h b/kernel/src/glue/v4-sparc64/utcb.h
deleted file mode 100644
index e13df108..00000000
--- a/kernel/src/glue/v4-sparc64/utcb.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, 2006,  University of New South Wales
- *                
- * File path:     glue/v4-sparc64/utcb.h
- * Description:
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: utcb.h,v 1.6 2006/10/20 16:30:59 reichelt Exp $
- *                
- ********************************************************************/
-
-#ifndef __GLUE__V4_SPARC64__UTCB_H__
-#define __GLUE__V4_SPARC64__UTCB_H__
-
-#include INC_ARCH(registers.h)
-
-/* Find how big the register window backing area needs to be. */
-#if (NWINDOWS <= 8)        /* Can we fit it into 1KB?   */
-
-#define NWINDOWS_MAX 8
-#define UTCB_WIN_BITS   1  /* assuming UTCB_BITS == 10! */
-
-#elif (NWINDOWS <= 24)     /* Can we fit it into 3KB?   */
-
-#define NWINDOWS_MAX 24
-#define UTCB_WIN_BITS   2  /* assuming UTCB_BITS == 10! */
-
-#else
-
-#error SPARC64 cpu register file is too big for UTCB!
-
-#endif /* SPARC64_REG_WIN <= * */
-
-#define UTCB_BITS (10 /* 1KB */ + UTCB_WIN_BITS)
-#define PADDING_0 ((248 - 80) / sizeof(word_t))
-
-#define UTCB_MASK (~((1 << UTCB_BITS) - 1))
-
-#ifndef ASSEMBLY
-
-#include INC_ARCH(types.h)
-#include INC_API(types.h)
-#include INC_API(thread.h)
-#include INC_ARCH(frame.h)
-
-class utcb_t {
-public:
-    threadid_t my_global_id;          /* 0    .. 8    */
-    threadid_t pager;                 /* 8    .. 16   */
-    threadid_t exception_handler;     /* 16   .. 24   */
-    word_t     user_defined_handle;   /* 24   .. 32   */
-    timeout_t  xfer_timeout;          /* 32   .. 40   */
-    word_t     error_code;            /* 40   .. 48   */
-    threadid_t intended_receiver;     /* 48   .. 56   */
-    threadid_t virtual_sender;        /* 56   .. 64   */
-    word_t     processor_no;          /* 64   .. 72   */
-    u8_t       preempt_flags;         /* 72   .. 73   */
-    u8_t       cop_flags;             /* 73   .. 74   */
-    u16_t      __reserved0;           /* 74   .. 76   */
-    u32_t      __reserved1;           /* 76   .. 80   */
-    word_t     __padding0[PADDING_0]; /* 80   .. 248  */
-    word_t     br[IPC_NUM_BR];        /* 248  .. 512  */
-    word_t     mr[IPC_NUM_MR];        /* 512  .. 1024 */
-
-    /********************************************************************
-     * Register windows are normally spilled to/filled from the users   *
-     * stack. However if we switch threads we need somewhere to         *
-     * temporarily store the windows (and avoid touching user space)    *
-     * so we stick them in the UTCB at 'reg_win'. SPARC v9 has a max of *
-     * 32 windows but we can only fit a maximum of 24 in here and stay  *
-     * under 4KB. So far this isn't a problem as the UltraSPARC I/II    *
-     * have 8 windows while the UltraSPARC III has 16 windows.          *
-     ********************************************************************/
-
-    window_frame_t reg_win[NWINDOWS_MAX];
-
-public:
-    void set_my_global_id(threadid_t tid);
-    word_t get_user_defined_handle();
-    void set_user_defined_handle(word_t handle);
-    threadid_t get_pager();
-    void set_pager(threadid_t tid);
-    threadid_t get_exception_handler();
-    void set_exception_handler(threadid_t tid);
-    u8_t get_preempt_flags();
-    void set_preempt_flags(u8_t flags);
-    u8_t get_cop_flags();
-    word_t get_error_code();
-    void set_error_code(word_t err);
-    timeout_t get_xfer_timeout();
-    threadid_t get_intended_receiver();
-    threadid_t get_virtual_sender();
-    void set_virtual_sender(threadid_t tid);
-
-} __attribute__((packed)); // utcb_t
-
-#include INC_API(generic-utcb.h)
-
-#endif /* !ASSEMBLY */
-
-
-#endif /* !__GLUE__V4_SPARC64__UTCB_H__ */
diff --git a/kernel/src/glue/v4-sparc64/window_trap.S b/kernel/src/glue/v4-sparc64/window_trap.S
deleted file mode 100644
index b4346665..00000000
--- a/kernel/src/glue/v4-sparc64/window_trap.S
+++ /dev/null
@@ -1,393 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    glue/v4-sparc64/window_trap.S
- * Description:  Inline trap handlers for window spills/fills/cleans.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: window_trap.S,v 1.9 2004/07/01 04:05:43 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asi.h)
-#include INC_ARCH(asm.h)
-#include INC_ARCH(ttable.h)
-
-#include <asmsyms.h>
-
-/**
- * FIND_UTCB_SAVE_AREA
- * Using %g2 as a pointer to the bottom of the UTCB save area, find the location
- * in the UTCB that must be used to spill / fill the current window.
- */
-#define FIND_UTCB_SAVE_AREA(reg) \
-	rdpr	%cwp, reg;					\
-	mulx	reg, WINDOW_FRAME_SIZE, reg;			\
-	add	reg, %g2, reg
-
-/**
- *  WINDOW_CLEAN
- *  Window clean handler.
- *  Constraints: 32 Instructions or less.	
- */
-#define WINDOW_CLEAN                                             \
-	rdpr	%cleanwin, %l0;                                  \
-	inc	%l0;                                             \
-	wrpr	%l0, %cleanwin;                                  \
-	clr	%l0;                                             \
-	clr	%l1;                                             \
-	clr	%l2;                                             \
-	clr	%l3;                                             \
-	clr	%l4;                                             \
-	clr	%l5;                                             \
-	clr	%l6;                                             \
-	clr	%l7;                                             \
-	clr	%o0;                                             \
-	clr	%o1;                                             \
-	clr	%o2;                                             \
-	clr	%o3;                                             \
-	clr	%o4;                                             \
-	clr	%o5;                                             \
-	clr	%o6;                                             \
-	clr	%o7;                                             \
-	retry
-
-/* End WINDOW_CLEAN */
-
-/**
- * WINDOW_SPILL
- * Spill the local and in registers of a window to a given frame
- */
-#define WINDOW_SPILL(frame)					\
-	stx	%l0, [frame + WINDOW_FRAME_L0];			\
-	stx	%l1, [frame + WINDOW_FRAME_L1];			\
-	stx	%l2, [frame + WINDOW_FRAME_L2];			\
-	stx	%l3, [frame + WINDOW_FRAME_L3];			\
-	stx	%l4, [frame + WINDOW_FRAME_L4];			\
-	stx	%l5, [frame + WINDOW_FRAME_L5];			\
-	stx	%l6, [frame + WINDOW_FRAME_L6];			\
-	stx	%l7, [frame + WINDOW_FRAME_L7];			\
-	stx	%i0, [frame + WINDOW_FRAME_I0];			\
-	stx	%i1, [frame + WINDOW_FRAME_I1];			\
-	stx	%i2, [frame + WINDOW_FRAME_I2];			\
-	stx	%i3, [frame + WINDOW_FRAME_I3];			\
-	stx	%i4, [frame + WINDOW_FRAME_I4];			\
-	stx	%i5, [frame + WINDOW_FRAME_I5];			\
-	stx	%i6, [frame + WINDOW_FRAME_I6];			\
-	stx	%i7, [frame + WINDOW_FRAME_I7]
-	
-/**
- * WINDOW_FILL
- * Fill the local and in registers of a window from a given frame
- */
-#define WINDOW_FILL(frame)					\
-	ldx	[frame + WINDOW_FRAME_L0], %l0;			\
-	ldx	[frame + WINDOW_FRAME_L1], %l1;			\
-	ldx	[frame + WINDOW_FRAME_L2], %l2;			\
-	ldx	[frame + WINDOW_FRAME_L3], %l3;			\
-	ldx	[frame + WINDOW_FRAME_L4], %l4;			\
-	ldx	[frame + WINDOW_FRAME_L5], %l5;			\
-	ldx	[frame + WINDOW_FRAME_L6], %l6;			\
-	ldx	[frame + WINDOW_FRAME_L7], %l7;			\
-	ldx	[frame + WINDOW_FRAME_I0], %i0;			\
-	ldx	[frame + WINDOW_FRAME_I1], %i1;			\
-	ldx	[frame + WINDOW_FRAME_I2], %i2;			\
-	ldx	[frame + WINDOW_FRAME_I3], %i3;			\
-	ldx	[frame + WINDOW_FRAME_I4], %i4;			\
-	ldx	[frame + WINDOW_FRAME_I5], %i5;			\
-	ldx	[frame + WINDOW_FRAME_I6], %i6;			\
-	ldx	[frame + WINDOW_FRAME_I7], %i7
-
-/**
- * WINDOW_SPILL_ASI
- * Spill the local and in registers of a window to a given frame,
- * which is in the address space %asi
- */
-#define WINDOW_SPILL_ASI(frame)					\
-	stxa	%l0, [frame + WINDOW_FRAME_L0] %asi;		\
-	stxa	%l1, [frame + WINDOW_FRAME_L1] %asi;		\
-	stxa	%l2, [frame + WINDOW_FRAME_L2] %asi;		\
-	stxa	%l3, [frame + WINDOW_FRAME_L3] %asi;		\
-	stxa	%l4, [frame + WINDOW_FRAME_L4] %asi;		\
-	stxa	%l5, [frame + WINDOW_FRAME_L5] %asi;		\
-	stxa	%l6, [frame + WINDOW_FRAME_L6] %asi;		\
-	stxa	%l7, [frame + WINDOW_FRAME_L7] %asi;		\
-	stxa	%i0, [frame + WINDOW_FRAME_I0] %asi;		\
-	stxa	%i1, [frame + WINDOW_FRAME_I1] %asi;		\
-	stxa	%i2, [frame + WINDOW_FRAME_I2] %asi;		\
-	stxa	%i3, [frame + WINDOW_FRAME_I3] %asi;		\
-	stxa	%i4, [frame + WINDOW_FRAME_I4] %asi;		\
-	stxa	%i5, [frame + WINDOW_FRAME_I5] %asi;		\
-	stxa	%i6, [frame + WINDOW_FRAME_I6] %asi;		\
-	stxa	%i7, [frame + WINDOW_FRAME_I7] %asi
-	
-/**
- * WINDOW_FILL_ASI
- * Fill the local and in registers of a window from a given frame,
- * which is in the address space %asi
- */
-#define WINDOW_FILL_ASI(frame)					\
-	ldxa	[frame + WINDOW_FRAME_L0] %asi, %l0;		\
-	ldxa	[frame + WINDOW_FRAME_L1] %asi, %l1;		\
-	ldxa	[frame + WINDOW_FRAME_L2] %asi, %l2;		\
-	ldxa	[frame + WINDOW_FRAME_L3] %asi, %l3;		\
-	ldxa	[frame + WINDOW_FRAME_L4] %asi, %l4;		\
-	ldxa	[frame + WINDOW_FRAME_L5] %asi, %l5;		\
-	ldxa	[frame + WINDOW_FRAME_L6] %asi, %l6;		\
-	ldxa	[frame + WINDOW_FRAME_L7] %asi, %l7;		\
-	ldxa	[frame + WINDOW_FRAME_I0] %asi, %i0;		\
-	ldxa	[frame + WINDOW_FRAME_I1] %asi, %i1;		\
-	ldxa	[frame + WINDOW_FRAME_I2] %asi, %i2;		\
-	ldxa	[frame + WINDOW_FRAME_I3] %asi, %i3;		\
-	ldxa	[frame + WINDOW_FRAME_I4] %asi, %i4;		\
-	ldxa	[frame + WINDOW_FRAME_I5] %asi, %i5;		\
-	ldxa	[frame + WINDOW_FRAME_I6] %asi, %i6;		\
-	ldxa	[frame + WINDOW_FRAME_I7] %asi, %i7
-
-/**
- *  WINDOW_SPILL_KERNEL
- *  Kernel spill handler.
- *  Constraints: 32 Instructions or less.
- */
-#define WINDOW_SPILL_KERNEL			   \
-	WINDOW_SPILL(%sp + STACK_BIAS_64BIT);	   \
-	saved;                                     \
-	retry
-
-/* End WINDOW_SPILL_KERNEL */
-	
-/**
- *  WINDOW_FILL_KERNEL
- *  Kernel fill handler.
- *  Constraints: 32 Instructions or less.
- */	
-#define WINDOW_FILL_KERNEL                         \
-	WINDOW_FILL(%sp + STACK_BIAS_64BIT);	   \
-	restored;                                  \
-	retry
-
-/* End WINDOW_FILL_KERNEL */
-
-/**
- *  WINDOW_SPILL_KERNEL_UTCB
- *  Kernel spill handler for user windows.
- *  Constraints: 32 Instructions or less.
- */
-#define WINDOW_SPILL_KERNEL_UTCB		   \
-	FIND_UTCB_SAVE_AREA(%g3);		   \
-	WINDOW_SPILL(%g3);			   \
-	add     %g1, 1, %g1;                       \
-	saved;                                     \
-	retry
-
-/* End WINDOW_SPILL_KERNEL */
-	
-/**
- *  WINDOW_FILL_KERNEL_UTCB
- *  Kernel fill handler for user windows.
- *  Constraints: 32 Instructions or less.
- */	
-#define WINDOW_FILL_KERNEL_UTCB                    \
-	FIND_UTCB_SAVE_AREA(%g3);		   \
-	WINDOW_FILL(%g3);			   \
-	sub     %g1, 1, %g1;                       \
-	restored;                                  \
-	retry
-
-/* End WINDOW_FILL_KERNEL */
-
-/**
- *  WINDOW_SPILL_USER_NORMAL_ABI64
- *  User spill handler (normal) for standard 64bit ABI.
- *  Constraints: 32 Instructions or less.
- */
-#define WINDOW_SPILL_USER_NORMAL_ABI64                                     \
-	wr	%g0, ASI_AIUP, %asi;                                       \
-	WINDOW_SPILL_ASI(%sp + STACK_BIAS_64BIT);			   \
-	saved;                                                             \
-	retry
-
-/* End WINDOW_SPILL_USER_NORMAL_ABI64 */
-	
-/**
- *  WINDOW_FILL_USER_NORMAL_ABI64
- *  User fill handler (normal, from user stack) for standard 64bit ABI.
- *  Constraints: 32 Instructions or less.
- */	
-#define WINDOW_FILL_USER_NORMAL_ABI64                                      \
-	wr	%g0, ASI_AIUP, %asi;                                       \
-	WINDOW_FILL_ASI(%sp + STACK_BIAS_64BIT);			   \
-	restored;                                                          \
-	retry
-
-/**
- *  WINDOW_SPILL_USER_OTHER_ABI64
- *  User spill handler (other, from utcb save area) for standard 64bit ABI.
- *  Constraints: 32 Instructions or less.
- */
-/* This trap is supposed to be spilling a register window, but it isn't really
- * filled yet; it's marked as an "other" window because it was saved to the UTCB
- * on a trap or thread switch. To avoid running out of space in the UTCB window
- * save area, the saved window must be moved to the user's stack, so this
- * handler fills from the UTCB and then spills to the stack. */
-#define WINDOW_SPILL_USER_OTHER_ABI64					\
-	FIND_UTCB_SAVE_AREA(%g3);					\
-	WINDOW_FILL(%g3);						\
-	/* need to find the correct %sp to save to. If this is the	\
-	 * last other window (ie %otherwin == 1), then it's in %sp	\
-	 * and we can just jump to the normal spill handler. Else	\
-	 * it's in %fp of the next saved window in the UTCB. */ 	\
-	rdpr	%otherwin, %g4;						\
-	xorcc	%g4, 1, %g0;						\
-	beq	%xcc, ttable_O_spill_0_normal;				\
-	 ldx     [%g3 + WINDOW_FRAME_I7], %i7;				\
-	rdpr	%cwp, %g3;						\
-	inc	%g3;							\
-	and	%g3, (NWINDOWS-1), %g3;					\
-	mulx	%g3, WINDOW_FRAME_SIZE, %g3;				\
-	add	%g3, %g2, %g3;						\
-	ba,pt	%xcc, ttable_O_spill_0_normal;				\
-	 ldx	[%g3 + WINDOW_FRAME_I6], %sp
-
-/**
- *  WINDOW_FILL_USER_OTHER_ABI64
- *  User fill handler (other, from utcb save area) for standard 64bit ABI.
- *  Constraints: 32 Instructions or less.
- */	
-#define WINDOW_FILL_USER_OTHER_ABI64			\
-	FIND_UTCB_SAVE_AREA(%g3);			\
-	WINDOW_FILL(%g3);				\
-	restored;					\
-	retry
-
-/* End WINDOW_FILL_USER_NORMAL_ABI64 */
-
-/***************************
-* Used User (TL = 0) traps *
-***************************/
-
-BEGIN_TTABLE_ENTRY(clean_window,O)
-	WINDOW_CLEAN
-
-BEGIN_TTABLE_ENTRY(spill_0_normal,O)
-	WINDOW_SPILL_USER_NORMAL_ABI64
-
-BEGIN_TTABLE_ENTRY(fill_0_normal,O)
-	WINDOW_FILL_USER_NORMAL_ABI64
-
-BEGIN_TTABLE_ENTRY(spill_0_other,O)
-	WINDOW_SPILL_USER_OTHER_ABI64
-
-BEGIN_TTABLE_ENTRY(fill_0_other,O)
-	WINDOW_FILL_USER_OTHER_ABI64
-
-/*****************************
-* Used Kernel (TL > 0) traps *
-*****************************/
-
-BEGIN_TTABLE_ENTRY(clean_window,X)
-	rdpr	%cleanwin, %l0
-	inc	%l0
-	wrpr	%l0, %cleanwin
-	retry
-
-BEGIN_TTABLE_ENTRY(spill_0_normal,X)
-	WINDOW_SPILL_KERNEL
-
-BEGIN_TTABLE_ENTRY(fill_0_normal,X)
-	WINDOW_FILL_KERNEL
-
-BEGIN_TTABLE_ENTRY(spill_0_other,X)
-	WINDOW_SPILL_KERNEL_UTCB
-
-BEGIN_TTABLE_ENTRY(fill_0_other,X)
-	WINDOW_FILL_KERNEL_UTCB
-
-/****************
-* Unused traps. *
-****************/
-
-UNUSED_TTABLE_ENTRY(spill_1_normal,O)
-UNUSED_TTABLE_ENTRY(spill_2_normal,O)
-UNUSED_TTABLE_ENTRY(spill_3_normal,O)
-UNUSED_TTABLE_ENTRY(spill_4_normal,O)
-UNUSED_TTABLE_ENTRY(spill_5_normal,O)
-UNUSED_TTABLE_ENTRY(spill_6_normal,O)
-UNUSED_TTABLE_ENTRY(spill_7_normal,O)
-
-UNUSED_TTABLE_ENTRY(spill_1_other,O)
-UNUSED_TTABLE_ENTRY(spill_2_other,O)
-UNUSED_TTABLE_ENTRY(spill_3_other,O)
-UNUSED_TTABLE_ENTRY(spill_4_other,O)
-UNUSED_TTABLE_ENTRY(spill_5_other,O)
-UNUSED_TTABLE_ENTRY(spill_6_other,O)
-UNUSED_TTABLE_ENTRY(spill_7_other,O)
-	
-UNUSED_TTABLE_ENTRY(fill_1_normal,O)
-UNUSED_TTABLE_ENTRY(fill_2_normal,O)
-UNUSED_TTABLE_ENTRY(fill_3_normal,O)
-UNUSED_TTABLE_ENTRY(fill_4_normal,O)
-UNUSED_TTABLE_ENTRY(fill_5_normal,O)
-UNUSED_TTABLE_ENTRY(fill_6_normal,O)
-UNUSED_TTABLE_ENTRY(fill_7_normal,O)
-
-UNUSED_TTABLE_ENTRY(fill_1_other,O)
-UNUSED_TTABLE_ENTRY(fill_2_other,O)
-UNUSED_TTABLE_ENTRY(fill_3_other,O)
-UNUSED_TTABLE_ENTRY(fill_4_other,O)
-UNUSED_TTABLE_ENTRY(fill_5_other,O)
-UNUSED_TTABLE_ENTRY(fill_6_other,O)
-UNUSED_TTABLE_ENTRY(fill_7_other,O)
-
-UNUSED_TTABLE_ENTRY(spill_1_normal,X)
-UNUSED_TTABLE_ENTRY(spill_2_normal,X)
-UNUSED_TTABLE_ENTRY(spill_3_normal,X)
-UNUSED_TTABLE_ENTRY(spill_4_normal,X)
-UNUSED_TTABLE_ENTRY(spill_5_normal,X)
-UNUSED_TTABLE_ENTRY(spill_6_normal,X)
-UNUSED_TTABLE_ENTRY(spill_7_normal,X)
-
-UNUSED_TTABLE_ENTRY(spill_1_other,X)
-UNUSED_TTABLE_ENTRY(spill_2_other,X)
-UNUSED_TTABLE_ENTRY(spill_3_other,X)
-UNUSED_TTABLE_ENTRY(spill_4_other,X)
-UNUSED_TTABLE_ENTRY(spill_5_other,X)
-UNUSED_TTABLE_ENTRY(spill_6_other,X)
-UNUSED_TTABLE_ENTRY(spill_7_other,X)
-
-UNUSED_TTABLE_ENTRY(fill_1_normal,X)
-UNUSED_TTABLE_ENTRY(fill_2_normal,X)
-UNUSED_TTABLE_ENTRY(fill_3_normal,X)
-UNUSED_TTABLE_ENTRY(fill_4_normal,X)
-UNUSED_TTABLE_ENTRY(fill_5_normal,X)
-UNUSED_TTABLE_ENTRY(fill_6_normal,X)
-UNUSED_TTABLE_ENTRY(fill_7_normal,X)
-
-UNUSED_TTABLE_ENTRY(fill_1_other,X)
-UNUSED_TTABLE_ENTRY(fill_2_other,X)
-UNUSED_TTABLE_ENTRY(fill_3_other,X)
-UNUSED_TTABLE_ENTRY(fill_4_other,X)
-UNUSED_TTABLE_ENTRY(fill_5_other,X)
-UNUSED_TTABLE_ENTRY(fill_6_other,X)
-UNUSED_TTABLE_ENTRY(fill_7_other,X)
diff --git a/kernel/src/glue/v4-tmplarch/Makeconf b/kernel/src/glue/v4-tmplarch/Makeconf
deleted file mode 100644
index ea2ae135..00000000
--- a/kernel/src/glue/v4-tmplarch/Makeconf
+++ /dev/null
@@ -1,11 +0,0 @@
-$(warning Check paths!)
-
-SOURCES+=$(addprefix src/glue/v4-tmplarch/, \
-	space.cc thread.cc init.cc )
-
-# use linear_ptab_walker if need be
-ifeq (1,0)
-SOURCES+=src/generic/linear_ptab_walker.cc
-else
-SOURCES+=src/glue/v4-tmplarch/space-stub.cc
-endif
diff --git a/kernel/src/glue/v4-tmplarch/config.h b/kernel/src/glue/v4-tmplarch/config.h
deleted file mode 100644
index e666faf6..00000000
--- a/kernel/src/glue/v4-tmplarch/config.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-tmplarch/config.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.5 2003/09/24 19:04:53 skoglund Exp $
- *                
- ********************************************************************/
-
-
-#warning PORTME
-/**
- * Size of a kernel TCB in bytes
- */
-#define KTCB_SIZE	1024
-
-
-/**
-   attributes for system call functions
-   @param x is the name of the system call lacking the leading sys_ .
-   This makes it possible to place every system call in its own section
-   if required. Default is empty.
- */
-#define SYSCALL_ATTR(x)
-
-
-#warning PORTME
-/**
- * endianess and word size
- */
-#define KIP_API_FLAGS	{endian:0, word_size:0} // 32-bit, little endian
-
-#warning PORTME
-/**
- * minimum size of UTCB area and number of UTCBs in this
- */
-#define KIP_UTCB_AREA	{size:12, no:8}   // 8 treads, 4KB
-
-#warning PORTME
-/**
- * size of kernel interface page
- */
-#define KIP_KIP_AREA	{size:12}   // 4KB
-
-#warning PORTME
-/**
- * supported page sizes and access bits
- */
-#define KIP_ARCH_PAGEINFO {rwx:6, size_mask:(0) >> 10}
-
-#warning PORTME
-/**
- * Base address of the root task's UTCB area
- */
-#define ROOT_UTCB_START		0
-
-#warning PORTME
-/**
- * Address of the KIP in the root task
- */
-#define ROOT_KIP_START		0
diff --git a/kernel/src/glue/v4-tmplarch/fpage.h b/kernel/src/glue/v4-tmplarch/fpage.h
deleted file mode 100644
index 98e71e60..00000000
--- a/kernel/src/glue/v4-tmplarch/fpage.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2005,  Karlsruhe University
- *                
- * File path:     glue/v4-tmplarch/fpage.h
- * Description:   architecture specific fpage declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: fpage.h,v 1.3 2005/05/19 08:38:15 stoess Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_TMPLARCH__FPAGE_H__
-#define __GLUE__V4_TMPLARCH__FPAGE_H__
-
-#include INC_API(generic-archfpage.h)
-
-#endif /* !__GLUE__V4_TMPLARCH__FPAGE_H__ */
diff --git a/kernel/src/glue/v4-tmplarch/init.cc b/kernel/src/glue/v4-tmplarch/init.cc
deleted file mode 100644
index f71c7f50..00000000
--- a/kernel/src/glue/v4-tmplarch/init.cc
+++ /dev/null
@@ -1,73 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-tmplarch/init.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: init.cc,v 1.2 2003/09/24 19:05:43 skoglund Exp $
- *                
- ********************************************************************/
-
-#include INC_API(kernelinterface.h)
-#include INC_API(schedule.h)
-
-/**
- * Entry point from ASM into C kernel
- * Precondition: paging is initialized with init_paging
- */
-extern "C" void SECTION(".init") startup_system()
-{
-    /* feed the kernel memory allocator */
-#warning PORTME
-    //init_bootmem();
-    
-    /* initialize kernel interface page */
-    get_kip()->init();
-    
-    /* initialize mapping database */
-    //init_mdb ();
-    
-    /* initialize kernel debugger if any */
-    if (get_kip()->kdebug_init)
-	get_kip()->kdebug_init();
-
-    /* configure IRQ hardware - global part */
-    //get_interrupt_ctrl()->init_arch();
-    /* configure IRQ hardware - local part */
-    //get_interrupt_ctrl()->init_cpu();
-    
-    /* initialize the kernel's timer source */
-    //get_timer()->init_global();
-    //get_timer()->init_cpu();
-
-
-    /* initialize the scheduler */
-    get_current_scheduler()->init();
-    /* get the thing going - we should never return */
-    get_current_scheduler()->start();
-    
-    /* make sure we don't fall off the edge */
-    spin_forever(1);
-}
diff --git a/kernel/src/glue/v4-tmplarch/intctrl.h b/kernel/src/glue/v4-tmplarch/intctrl.h
deleted file mode 100644
index 4e3733ca..00000000
--- a/kernel/src/glue/v4-tmplarch/intctrl.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-tmplarch/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.4 2003/09/24 19:04:53 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <intctrl.h>
-
-class intctrl_t : public generic_intctrl_t {
-#warning PORTME
-    /* currently inherits stubs from porting helper class */
-};
-
-
-/**
- * @return pointer to interrupt controller
- */
-INLINE intctrl_t * get_interrupt_ctrl() 
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return NULL;
-    //extern intctrl_t intctrl;
-    //return &intctrl;
-}
diff --git a/kernel/src/glue/v4-tmplarch/ktcb.h b/kernel/src/glue/v4-tmplarch/ktcb.h
deleted file mode 100644
index 898b41df..00000000
--- a/kernel/src/glue/v4-tmplarch/ktcb.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-template/ktcb.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ktcb.h,v 1.2 2003/09/24 19:04:53 skoglund Exp $
- *                
- ********************************************************************/
-
-class arch_ktcb_t {
-};
diff --git a/kernel/src/glue/v4-tmplarch/map.h b/kernel/src/glue/v4-tmplarch/map.h
deleted file mode 100644
index 01c7486b..00000000
--- a/kernel/src/glue/v4-tmplarch/map.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2005,  Karlsruhe University
- *                
- * File path:     glue/v4-tmplarch/map.h
- * Description:   architecture specific mapping declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: map.h,v 1.3 2005/05/19 08:39:52 stoess Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_TMPLARCH__MAP_H__
-#define __GLUE__V4_TMPLARCH__MAP_H__
-
-#include INC_API(generic-archmap.h)
-
-#endif /* !__GLUE__V4_TMPLARCH__MAP_H__ */
diff --git a/kernel/src/glue/v4-tmplarch/schedule.h b/kernel/src/glue/v4-tmplarch/schedule.h
deleted file mode 100644
index a9a6b90f..00000000
--- a/kernel/src/glue/v4-tmplarch/schedule.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-template/schedule.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: schedule.h,v 1.2 2003/09/24 19:04:53 skoglund Exp $
- *                
- ********************************************************************/
-
-
-#warning PORTME
-/**
- * @todo document me
- */
-INLINE u64_t get_timer_tick_length()
-{
-    UNIMPLEMENTED();
-}
-
-
-#warning PORTME
-/**
- * send the current processor to sleep
- */
-INLINE void processor_sleep()
-{
-    UNIMPLEMENTED();
-}
diff --git a/kernel/src/glue/v4-tmplarch/space-stub.cc b/kernel/src/glue/v4-tmplarch/space-stub.cc
deleted file mode 100644
index 40a702be..00000000
--- a/kernel/src/glue/v4-tmplarch/space-stub.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002, Karlsruhe University
- *
- * File path:	glue/v4-tmplarch/space-stub.cc
- * Description:	Part of the space_t template.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: space-stub.cc,v 1.6 2003/09/24 19:05:43 skoglund Exp $
- *
- ***************************************************************************/
-
-#include <debug.h>
-#include INC_GLUE(space.h)
-
-#warning PORTME
-
-/* if not using linear_ptab_walker, use these */
-void space_t::map_fpage(fpage_t snd_fp, word_t base, space_t * t_space, fpage_t rcv_fp, bool grant)
-{
-}
-
-fpage_t space_t::unmap_fpage(fpage_t fpage, bool flush, bool unmap_all)
-{
-}
diff --git a/kernel/src/glue/v4-tmplarch/space.cc b/kernel/src/glue/v4-tmplarch/space.cc
deleted file mode 100644
index 370b3da1..00000000
--- a/kernel/src/glue/v4-tmplarch/space.cc
+++ /dev/null
@@ -1,160 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002, Karlsruhe University
- *
- * File path:	glue/v4-tmplarch/space.cc
- * Description:	Template for space_t implementation.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: space.cc,v 1.6 2005/06/03 15:54:16 joshua Exp $
- *
- ***************************************************************************/
-
-#include <debug.h>			/* for UNIMPLEMENTED	*/
-#include INC_API(space.h)		/* space_t		*/
-
-
-/**
- * initialize THE kernel space
- * @see get_kernel_space()
- */
-void SECTION(".init.memory") init_kernel_space()
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    // may need to allocate it and update pointer
-    //   (see get_kernel_space())
-}
-
-/**
- * initialize a space
- *
- * @param utcb_area	fpage describing location of UTCB area
- * @param kip_area	fpage describing location of KIP
- */
-void space_t::init (fpage_t utcb_area, fpage_t kip_area)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    //this->utcb_area = utcb_area;
-    //this->kip_area = kip_area;
-    // - may need to map the kernel area and
-    //   initializes shadow ptabs and the like
-}
-
-/**
- * add a kernel mapping for a UTCB
- * @param utcb the user-visible address of the UTCB to add the mapping for
- * @return the kernel-accessible address of the UTCB
- */
-utcb_t * space_t::map_utcb(utcb_t * utcb)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return NULL;
-}
-
-/**
- * Release mappings that belong to the kernel (UTCB, KIP)
- * @param vaddr		virtual address in the space
- * @param paddr		physical address the mapping refers to
- * @param log2size	log2(size of mapping)
- */
-void space_t::release_kernel_mapping (addr_t vaddr, addr_t paddr,
-				      word_t log2size)
-{
-    UNIMPLEMENTED();
-    // Free up memory used for UTCBs
-    //   if (get_utcb_page_area ().is_addr_in_fpage (vaddr))
-    //     kmem.free (kmem_utcb, phys_to_virt (paddr), 1UL << log2size);
-    // Forget about the KIP - it's shared
-}
-
-/**
- * establish a mapping in sigma0's space
- * @param addr	the fault address in sigma0
- *
- * This function should install a mapping that allows sigma0 to make
- * progress. Sigma0's space is available as this.
- */
-void space_t::map_sigma0(addr_t addr)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-}
-
-/**
- * Try to copy a mapping from kernel space into the current space
- * @param addr the address for which the mapping should be copied
- * @return true if something was copied, false otherwise.
- * Synchronization must happen at the highest level, allowing sharing.
- */
-bool space_t::sync_kernel_space(addr_t addr)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return false;
-}
-
-/**
- * Install a dummy TCB
- * @param addr	address where the dummy TCB should be installed
- *
- * The dummy TCB must be read-only and fail all validity tests.
- */
-void space_t::map_dummy_tcb (addr_t addr)
-{
-    UNIMPLEMENTED();
-}
-
-/**
- * Map memory usable for TCB
- * @param addr address of the TCB that should be made usable
- *
- * This function is called when a TCB should be made usable the first
- * time. Usually, this happens when a) no page is mapped at the TCB
- * address at all, or b) a read-only page is mapped and now a write
- * access to the TCB occured.
- *
- * @see space_t::map_dummy_tcb
- */
-void space_t::allocate_tcb(addr_t addr)
-{
-    UNIMPLEMENTED();
-    // addr_t page = kmem.alloc( kmem_tcb, PAGE_SIZE );
-    // kernel_space->add_mapping(addr, page, ...);
-    // sync_kernel_space (addr);
-}
-
-/**
- * Translate a user accessible UTCB address to a kernel accessible one
- * @param utcb	user accessible address of UTCB
- * @returns kernel accessible address of UTCB
- *
- * The returned address must be accessible in the current address
- * space. This is required for checking values in the UTCB of a thread
- * in a different address space.
- */
-utcb_t * space_t::utcb_to_kernel_space(utcb_t * utcb)
-{
-}
diff --git a/kernel/src/glue/v4-tmplarch/space.h b/kernel/src/glue/v4-tmplarch/space.h
deleted file mode 100644
index 3b36f775..00000000
--- a/kernel/src/glue/v4-tmplarch/space.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002, Karlsruhe University
- *
- * File path:	glue/v4-tmplarch/space.h
- * Description:	Template class definition for space_t.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: space.h,v 1.19 2006/11/14 18:44:57 skoglund Exp $
- *
- ***************************************************************************/
-
-#include INC_API(fpage.h)			/* fpage_t	*/
-#include INC_API(thread.h)			/* threadid_t	*/
-
-#include INC_GLUE(config.h)
-
-// Even if new MDB is not used we need the mdb_t::ctrl_t
-#include <mdb.h>
-
-/* forward declarations - space_t depends on tcb_t and utcb_t */
-class tcb_t;
-class utcb_t;
-
-/**
- * The address space representation
- */
-class space_t {
-public:
-    /**
-     * Test whether an address is in a mappable page, that is, no
-     * kernel pages, not the KIP and not within the UTCB area.
-     * @param addr address to test
-     * Returns true if address is in a mappable page.
-     */
-    bool is_mappable(addr_t addr);
-
-    /**
-     * test whether an fpage is mappable
-     */
-    /* Address ranges */
-    bool is_mappable(fpage_t);
-    bool is_user_area(addr_t);
-    bool is_user_area(fpage_t);
-    bool is_tcb_area(addr_t addr);
-    bool is_arch_mappable(addr_t addr, size_t size) { return true; }
-
-    /* Copy area related methods */
-    bool is_copy_area (addr_t addr);
-    word_t get_copy_limit (addr_t addr, word_t limit);
-
-    /* kip and utcb handling */
-    fpage_t get_kip_page_area();
-    fpage_t get_utcb_page_area();
-
-    /* space control */
-    word_t space_control (word_t ctrl) { return 0; }
-
-    bool is_initialized();
-
-    tcb_t * get_tcb(threadid_t tid);
-    tcb_t * get_tcb(void *ptr);
-
-    void map_fpage(fpage_t snd_fp, word_t base, space_t * t_space, fpage_t rcv_fp, bool grant);
-    fpage_t unmap_fpage(fpage_t fpage, bool flush, bool unmap_all);
-    fpage_t mapctrl (fpage_t fpage, mdb_t::ctrl_t ctrl,
-		     word_t attribute, bool unmap_all);
-    bool allocate_utcb(tcb_t * tcb, utcb_t * &kern_utcb, utcb_t * &user_utcb);
-    void init(fpage_t utcb_area, fpage_t kip_area);
-    void add_tcb(tcb_t * tcb);
-    bool remove_tcb(tcb_t * tcb);
-    void allocate_tcb(addr_t addr);
-    void free();
-
-    enum access_e {
-	read, write, readwrite, execute,
-    };
-    void handle_pagefault(addr_t addr, addr_t ip, access_e access, bool kernel);
-    void map_sigma0(addr_t addr);
-    bool sync_kernel_space(addr_t addr);
-    utcb_t * map_utcb(utcb_t * utcb);
-    void map_dummy_tcb(addr_t addr);
-    utcb_t * utcb_to_kernel_space(utcb_t * utcb);
-
-    /* Methods needed by linear page table walker. */
-    pgent_t * pgent (word_t num, word_t cpu = 0);
-    bool lookup_mapping (addr_t vaddr, pgent_t ** pg,
-			 pgent_t::pgsize_e * size);
-    bool readmem (addr_t vaddr, word_t * contents);
-    static word_t readmem_phys (addr_t paddr)
-	{ return *phys_to_virt((word_t*)paddr); }
-    void release_kernel_mapping (addr_t vaddr, addr_t paddr, word_t log2size);
-
-    /* TLB releated methods used by linear page table walker. */
-    void flush_tlb (space_t * curspace);
-    void flush_tlbent (space_t * curspace, addr_t vaddr, word_t log2size);
-    bool does_tlbflush_pay (word_t log2size);
-
-    /* Update hooks to allow for efficient XCPU TLB updates and
-     * invalidations, invoked by the linear ptab walker */
-    static void begin_update();
-    static void end_update();
-};
-
-
-/**
- * get the KIP area of an address space
- * @returns the KIP area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_kip_page_area (void)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return fpage_t::nilpage();
-    //return kip_area;
-}
-
-/**
- * get the UTCB area of an address space
- * @returns the utcb area of the address space as an fpage
- */
-INLINE fpage_t space_t::get_utcb_page_area (void)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return fpage_t::nilpage();
-    //return utcb_area;
-}
-
-INLINE bool space_t::is_user_area (addr_t addr)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return false;
-}
-        
-INLINE bool space_t::is_tcb_area (addr_t addr)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return false;
-}
-
-
-/**
- * Check whether address resides within copy area.
- *
- * @param addr			address to check against
- *
- * @return true if address is within copy area; false otherwise
- */
-INLINE bool space_t::is_copy_area (addr_t addr)
-{
-#warning PORTME
-    UNIMPLEMENTED ();
-    return addr;
-}
-
-/**
- * Get the limit of an IPC copy operation (e.g., copy from operation
- * is not allowed to go beyond the boundaries of the user area).
- *
- * @param addr			address to copy from/to
- * @param limit			intended copy size
- *
- * @return limit clipped to the allowed copy size
- */
-INLINE word_t space_t::get_copy_limit (addr_t addr, word_t limit)
-{
-#warning PORTME
-    UNIMPLEMENTED ();
-    return limit;
-}
-
-
-#warning PORTME
-INLINE space_t* get_kernel_space()
-{
-    UNIMPLEMENTED();
-    return NULL;
-
-    //extern space_t * kernel_space;
-    //return kernel_space;
-}
-
-
-/**
- * translates a global thread ID into a valid tcb pointer
- * @param tid thread ID
- * @returns pointer to the TCB of thread tid
- */
-INLINE tcb_t * space_t::get_tcb( threadid_t tid )
-{
-#warning PORTME
-    UNIMPLEMENTED();
-
-    return NULL;
-}
-
-/**
- * translates a pointer within a tcb into a valid tcb pointer
- * @param ptr pointer to somewhere in the TCB
- * @returns pointer to the TCB
- */
-INLINE tcb_t * space_t::get_tcb (void * ptr)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-
-    return NULL;
-}
-
-
-/**
- * adds a thread to the space
- * @param tcb pointer to thread control block
- */
-INLINE void space_t::add_tcb(tcb_t * tcb)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    //x.thread_count++;
-}
-
-/**
- * removes a thread from a space
- * @param tcb_t thread control block
- * @return true if it was the last thread
- */
-INLINE bool space_t::remove_tcb(tcb_t * tcb)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return false;
-//    x.thread_count--;
-//    return (x.thread_count == 0);
-}
-
diff --git a/kernel/src/glue/v4-tmplarch/syscalls.h b/kernel/src/glue/v4-tmplarch/syscalls.h
deleted file mode 100644
index 2ba87f47..00000000
--- a/kernel/src/glue/v4-tmplarch/syscalls.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     glue/v4-tmplarch/syscalls.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.6 2003/09/24 19:04:53 skoglund Exp $
- *                
- ********************************************************************/
-
-//
-// System call function attributes.
-//
-
-#define SYSCALL_ATTR(sec_name)
-
-
-//
-// Syscall declaration wrappers.
-//
-
-#define SYS_IPC(to, from, timeout)				\
-  void SYSCALL_ATTR ("ipc") 					\
-  sys_ipc (to, from, timeout)
-
-#define SYS_THREAD_CONTROL(dest, space, scheduler, pager)	\
-  void SYSCALL_ATTR ("thread_control")				\
-  sys_thread_control (dest, space, scheduler, pager)
-
-#define SYS_SPACE_CONTROL(space, control, kip_area, utcb_area,	\
-			  redirector)				\
-  void SYSCALL_ATTR ("space_control")				\
-  sys_space_control (space, control, kip_area, utcb_area,	\
-		     redirector)
-
-#define SYS_SCHEDULE(dest, time_control, processor_control,	\
-		     prio, preemption_control)			\
-  void SYSCALL_ATTR ("schedule")				\
-  sys_schedule (dest, time_control, processor_control,		\
-		prio, preemption_control)
-
-#define SYS_EXCHANGE_REGISTERS(dest, control, usp, uip,		\
-			       uflags, uhandle, pager, is_local)\
-  void SYSCALL_ATTR ("exchange_registers")			\
-  sys_exchange_registers (dest, control, usp, uip,		\
-			  uflags, uhandle, pager, is_local)
-
-#define SYS_THREAD_SWITCH(dest)					\
-  void SYSCALL_ATTR ("thread_switch")				\
-  sys_thread_switch (dest)
-
-#define SYS_UNMAP(control)					\
-  void SYSCALL_ATTR ("unmap") sys_unmap (control)
-
-#define SYS_PROCESSOR_CONTROL(processor_no, internal_frequency,	\
-			      external_frequency, voltage)	\
-  void SYSCALL_ATTR ("processor_control")			\
-  sys_processor_control (processor_no, internal_frequency,	\
-			 external_frequency, voltage)
-
-#define SYS_MEMORY_CONTROL(control, attribute0, attribute1,	\
-			   attribute2, attribute3)		\
-  void SYSCALL_ATTR ("memory_control")				\
-  sys_memory_control (control, attribute0, attribute1,		\
-		      attribute2, attribute3)
-
-
-
-#warning PORTME
-/**
- * Preload registers and return from sys_ipc
- * @param from The FROM value after the system call
- */
-#define return_ipc(from)	return
-
-
-#warning PORTME
-/**
- * Preload registers and return from sys_thread_control
- * @param result The RESULT value after the system call
- */
-#define return_thread_control(result)	return
-
-
-#warning PORTME
-/**
- * Preload registers and return from sys_exchange_registers
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- * @param sp The SP value after the system call
- * @param ip The IP value after the system call
- * @param flags The FLAGS value after the system call
- * @param pager The PAGER value after the system call
- * @param handle The USERDEFINEDHANDLE value after the system call
- */
-#define return_exchange_registers(result, control, sp, ip, flags, pager, handle)	return
-
-
-#warning PORTME
-/**
- * Return from sys_thread_switch
- */
-#define return_thread_switch() return
-
-
-#warning PORTME
-/**
- * Return from sys_unmap
- */
-#define return_unmap() return
-
-
-#warning PORTME
-/**
- * Preload registers and return from sys_thread_switch
- * @param result The RESULT value after the system call
- * @param control The CONTROL value after the system call
- */
-#define return_space_control(result, control)	return
-
-
-#warning PORTME
-/**
- * Preload registers and return from sys_schedule
- * @param result The RESULT value after the system call
- * @param time_control The TIME_CONTROL value after the system call
- */
-#define return_schedule( result, time_control )
diff --git a/kernel/src/glue/v4-tmplarch/tcb.h b/kernel/src/glue/v4-tmplarch/tcb.h
deleted file mode 100644
index 7741a2c4..00000000
--- a/kernel/src/glue/v4-tmplarch/tcb.h
+++ /dev/null
@@ -1,472 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004, 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-tmplarch/tcb.h
- * Description:   TCB related functions for Version 4, template arch
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tcb.h,v 1.26 2006/10/20 21:32:45 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_TEMPLATE__TCB_H__
-#define __GLUE__V4_TEMPLATE__TCB_H__
-
-#ifndef __API__V4__TCB_H__
-#error not for stand-alone inclusion
-#endif
-
-
-#include INC_API(syscalls.h)		/* for sys_ipc */
-
-
-#warning PORTME
-/**
- * read value of message register
- * @param index number of message register
- */
-INLINE word_t tcb_t::get_mr(word_t index)
-{
-    UNIMPLEMENTED();
-    return 0;
-
-    //return get_utcb()->mr[index];
-}
-
-#warning PORTME
-/**
- * set the value of a message register
- * @param index number of message register
- * @param value value to set
- */
-INLINE void tcb_t::set_mr(word_t index, word_t value)
-{
-    UNIMPLEMENTED();
-
-    //get_utcb()->mr[index] = value;
-}
-
-
-#warning PORTME
-/**
- * copies a set of message registers from one UTCB to another
- * @param dest destination TCB
- * @param start MR start index
- * @param count number of MRs to be copied
- */
-INLINE void tcb_t::copy_mrs(tcb_t * dest, word_t start, word_t count)
-{
-    ASSERT(start + count < IPC_NUM_MR);
-    UNIMPLEMENTED();
-
-    // for (word_t idx = start; idx < start + count; idx++)
-    //      dest->set_mr(idx, this->get_mr(idx));
-}
-
-
-#warning PORTME
-/**
- * read value of buffer register
- * @param index number of buffer register
- */
-INLINE word_t tcb_t::get_br(word_t index)
-{
-    UNIMPLEMENTED();
-    return 0;
-
-    //return get_utcb()->br[index];
-}
-
-#warning PORTME
-/**
- * set the value of a buffer register
- * @param index number of buffer register
- * @param value value to set
- */
-INLINE void tcb_t::set_br(word_t index, word_t value)
-{
-    UNIMPLEMENTED();
-
-    //get_utcb()->br[index] = value;
-}
-
-
-/**
- * allocate the tcb
- * The tcb pointed to by this will be allocated.
- */
-INLINE void tcb_t::allocate()
-{
-    UNIMPLEMENTED();
-
-    // possible implementation: touch *this
-}
-
-
-#warning PORTME
-/**
- * set the address space a TCB belongs to
- * @param space address space the TCB will be associated with
- */
-INLINE void tcb_t::set_space(space_t * space)
-{
-    UNIMPLEMENTED();
-
-    this->space = space;
-    // sometimes it might be desirable to use a pdir cache,
-    // like in cases where it's not cheap to derive the page
-    // directory from the space
-    //this->pdir_cache = (word_t)space->get_pdir();
-}
-
-
-
-
-#warning PORTME
-/**
- * set local ID of a thread
- * @param utcb ???
- *
- * For some reason we generally use a utcb pointer to derive the local
- * ID from.  For IA-32 the local ID is specified to be a pointer into
- * the UTCB, but this is not a must.
- */
-INLINE void tcb_t::set_local_id(utcb_t * utcb)
-{
-    UNIMPLEMENTED();
-
-    //myself_local.set_raw((word_t)&utcb->mr[0]);
-}
-
-#warning PORTME
-/**
- * get a thread's send transfer timeout
- *
- * The transfer timeout is stored in a TCR, probably in the UTCB
- */
-INLINE time_t tcb_t::get_xfer_timeout_snd (void)
-{
-    UNIMPLEMENTED();
-    return time_t::never();
-}
-
-#warning PORTME
-/**
- * get a thread's receive transfer timeout
- *
- * The transfer timeout is stored in a TCR, probably in the UTCB
- */
-INLINE time_t tcb_t::get_xfer_timeout_rcv (void)
-{
-    UNIMPLEMENTED();
-    return time_t::never();
-}
-
-#warning PORTME
-/**
- * Short circuit a return path from an IPC system call.  The error
- * code TCR and message registers are already set properly.  The
- * function only needs to restore the appropriate user context and
- * return execution to the instruction directly following the IPC
- * system call.
- */
-INLINE void tcb_t::return_from_ipc (void)
-{
-    UNIMPLEMENTED();
-}
-
-
-#warning PORTME
-/**
- * Short circuit a return path from a user-level interruption or
- * exception.  That is, restore the complete exception context and
- * resume execution at user-level.
- */
-INLINE void tcb_t::return_from_user_interruption (void)
-{
-    UNIMPLEMENTED();
-}
-
-
-/********************************************************************** 
- *
- *                      thread switch routines
- *
- **********************************************************************/
-
-#warning PORTME
-/**
- * switch to initial thread
- * @param tcb TCB of initial thread
- *
- * Initializes context of initial thread and switches to it.  The
- * context (e.g., instruction pointer) has been generated by inserting
- * a notify procedure context on the stack.  We simply restore this
- * context.
- */
-INLINE void NORETURN initial_switch_to (tcb_t * tcb)
-{
-    UNIMPLEMENTED();
-}
-
-#warning PORTME
-/**
- * switches to another tcb thereby switching address spaces if needed
- * @param dest tcb to switch to
- */
-INLINE void tcb_t::switch_to(tcb_t * dest)
-{
-    UNIMPLEMENTED();
-}
-
-#warning PORTME
-/**
- * switch to idle thread
- */
-INLINE void tcb_t::switch_to_idle()
-{
-    UNIMPLEMENTED();
-}
-
-
-
-
-/**
- * intialize stack for given thread
- */
-INLINE void tcb_t::init_stack()
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    // stack = get_stack_top();
-}
-
-
-
-
-/**********************************************************************
- *
- *                        notification functions
- *
- **********************************************************************/
-
-#warning PORTME
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)())
-{
-    UNIMPLEMENTED();
-}
-
-#warning PORTME
-/**
- * create stack frame to invoke notify procedure
- * @param func notify procedure to invoke
- * @param arg1 1st argument to notify procedure
- *
- * Create a stack frame in TCB so that next thread switch will invoke
- * the indicated notify procedure.
- */
-INLINE void tcb_t::notify (void (*func)(word_t), word_t arg1)
-{
-    UNIMPLEMENTED();
-}
-
-
-
-
-
-/**********************************************************************
- * 
- *            access functions for ex-regs'able registers
- *
- **********************************************************************/
-
-#warning PORTME
-/**
- * read the user-level instruction pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_ip()
-{
-    UNIMPLEMENTED();
-    return NULL;
-}
-
-#warning PORTME
-/**
- * read the user-level stack pointer
- * @return	the user-level stack pointer
- */
-INLINE addr_t tcb_t::get_user_sp()
-{
-    UNIMPLEMENTED();
-    return NULL;
-}
-
-#warning PORTME
-/**
- * set the user-level instruction pointer
- * @param ip	new user-level instruction pointer
- */
-INLINE void tcb_t::set_user_ip(addr_t ip)
-{
-    UNIMPLEMENTED();
-}
-
-#warning PORTME
-/**
- * set the user-level stack pointer
- * @param sp	new user-level stack pointer
- */
-INLINE void tcb_t::set_user_sp(addr_t sp)
-{
-    UNIMPLEMENTED();
-}
-
-
-/**
- * read the user-level flags (one word)
- * @return	the user-level flags
- */
-INLINE word_t tcb_t::get_user_flags (void)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-    return 0;
-}
-
-/**
- * set the user-level flags
- * @param flags	new user-level flags
- */
-INLINE void tcb_t::set_user_flags (const word_t flags)
-{
-#warning PORTME
-    UNIMPLEMENTED();
-}
-
-/**********************************************************************
- *
- *                  copy-area related functions
- *
- **********************************************************************/
-
-/**
- * Enable copy area for current thread.
- *
- * @param dst		destination TCB for IPC copy operation
- * @param s		source address
- * @param d		destination address
- */
-INLINE void tcb_t::adjust_for_copy_area (tcb_t * dst, addr_t * s, addr_t * d)
-{
-#warning PORTME
-    UNIMPLEMENTED ();
-}
-
-/**
- * Release copy area(s) for current thread.
- */
-INLINE void tcb_t::release_copy_area (void)
-{
-#warning PORTME
-    UNIMPLEMENTED ();
-}
-
-/**
- * Retrieve the real address associated with a copy area address.
- *
- * @param addr		address within copy area
- *
- * @return address translated into a regular user-level address
- */
-INLINE addr_t tcb_t::copy_area_real_address (addr_t addr)
-{
-#warning PORTME
-    UNIMPLEMENTED ();
-    return addr;
-}
-
-/**********************************************************************
- *
- *                        global tcb functions
- *
- **********************************************************************/
-
-#warning PORTME
-/**
- * Locate current TCB by using current stack pointer and return it.
- */
-INLINE tcb_t * get_current_tcb (void)
-{
-    UNIMPLEMENTED();
-    return NULL;
-};
-
-
-/**
- * invoke an IPC from within the kernel
- *
- * @param to_tid destination thread id
- * @param from_tid from specifier
- * @param timeout IPC timeout
- * @return IPC message tag (MR0)
- */
-INLINE msg_tag_t tcb_t::do_ipc (threadid_t to_tid, threadid_t from_tid,
-                                timeout_t timeout)
-{
-#warning PORTME
-    msg_tag_t tag;
-
-    sys_ipc (to_tid, from_tid, timeout);
-    tag.raw = get_mr (0);
-
-    return tag;
-}
-
-
-/**********************************************************************
- *
- *                  architecture-specific functions
- *
- **********************************************************************/
-
-/**
- * initialize architecture-dependent root server properties based on
- * values passed via KIP
- * @param space the address space this server will run in   
- * @param ip the initial instruction pointer           
- * @param sp the initial stack pointer
- */
-INLINE void tcb_t::arch_init_root_server (space_t * space, word_t ip, word_t sp)
-{ 
-}
-
-
-#endif /* !__GLUE__V4_TEMPLATE__TCB_H__ */
diff --git a/kernel/src/glue/v4-tmplarch/thread.cc b/kernel/src/glue/v4-tmplarch/thread.cc
deleted file mode 100644
index cdb7b12d..00000000
--- a/kernel/src/glue/v4-tmplarch/thread.cc
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     glue/v4-tmplarch/thread.cc
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: thread.cc,v 1.3 2003/09/24 19:05:43 skoglund Exp $
- *                
- ********************************************************************/
-
-
-#include <debug.h>
-#include INC_API(tcb.h)
-
-/**
- * Setup TCB to execute a function when switched to
- * @param func pointer to function
- *
- * The old stack state of the TCB does not matter.
- */
-void tcb_t::create_startup_stack (void (*func)())
-{
-#warning PORTME
-    UNIMPLEMENTED();
-}
diff --git a/kernel/src/glue/v4-tmplarch/utcb.h b/kernel/src/glue/v4-tmplarch/utcb.h
deleted file mode 100644
index b8a2bcfe..00000000
--- a/kernel/src/glue/v4-tmplarch/utcb.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2006,  Karlsruhe University
- *                
- * File path:     glue/v4-template/utcb.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: utcb.h,v 1.4 2006/10/20 16:31:07 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __GLUE__V4_TEMPLATE__UTCB_H__
-#define __GLUE__V4_TEMPLATE__UTCB_H__
-
-#include INC_API(types.h)
-#include INC_API(thread.h)
-
-class utcb_t {
-public:
-    bool allocate(threadid_t tid);
-    void free();
-
-public:
-    void set_my_global_id(threadid_t tid);
-    word_t get_user_defined_handle();
-    void set_user_defined_handle(word_t handle);
-    threadid_t get_pager();
-    void set_pager(threadid_t tid);
-    threadid_t get_exception_handler();
-    void set_exception_handler(threadid_t tid);
-    u8_t get_preempt_flags();
-    void set_preempt_flags(u8_t flags);
-    u8_t get_cop_flags();
-    word_t get_error_code();
-    void set_error_code(word_t err);
-    timeout_t get_xfer_timeout();
-    threadid_t get_intended_receiver();
-    threadid_t get_virtual_sender();
-    void set_virtual_sender(threadid_t tid);
-
-};
-
-#include INC_API(generic-utcb.h)
-
-/**
- * try to allocate a UTCB and mark it as used
- * @param tid the global ID of the associated thread
- * @return true on success, false if UTCB is already allocated
- */
-INLINE bool utcb_t::allocate(threadid_t tid)
-{
-    UNIMPLEMENTED();
-    return false;
-
-    // do something magic, like:
-    //   touch *this and check whether it worked
-    //   mark it as used, maybe by writing the global it into it
-    //return result;
-}
-
-/**
- * mark a UTCB as free
- */
-INLINE void utcb_t::free()
-{
-    UNIMPLEMENTED();
-    
-    //this->my_global_id = NILTHREAD;
-}
-
-#endif /* !__GLUE__V4_TEMPLATE__UTCB_H__ */
diff --git a/kernel/src/platform/csb337/Makeconf b/kernel/src/platform/csb337/Makeconf
deleted file mode 100644
index 4a5bf696..00000000
--- a/kernel/src/platform/csb337/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/platform/csb337/, timer.cc irq.cc plat.cc )
diff --git a/kernel/src/platform/csb337/aic.h b/kernel/src/platform/csb337/aic.h
deleted file mode 100644
index d2a4d303..00000000
--- a/kernel/src/platform/csb337/aic.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/csb337/aic.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: aic.h,v 1.1 2004/08/12 10:58:53 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__CSB337__AIC_H__
-#define __PLATFORM__CSB337__AIC_H__
-
-/* Atmel AT91RM9200 Advanced Interrupt Controller (AIC) */
-#define		AIC_OFFSET	0x000
-#define		AIC_VADDR	(SYS_VADDR | AIC_OFFSET)
-
-#define		AIC(x)		*((volatile word_t*)(AIC_VADDR + (x)))
-
-#define		AIC_SMR(n)  (0x00+4*((n)&31))/* Source Mode Registers Read/Write	*/
-#define		AIC_SVR(n)  (0x80+4*((n)&31))/* Source Vector Registers Read/Write	*/
-
-#define		AIC_IVR		0x100	/* Interrupt Vector Register Read-only 0x0	*/
-#define		AIC_FVR		0x104	/* Fast Interrupt Vector Register Read-only 0x0	*/
-#define		AIC_ISR		0x108	/* Interrupt Status Register Read-only 0x0	*/
-#define		AIC_IPR		0x10C	/* Interrupt Pending Register Read-only 0x0(1)	*/
-#define		AIC_IMR		0x110	/* Interrupt Mask Register Read-only 0x0	*/
-#define		AIC_CISR	0x114	/* Core Interrupt Status Register Read-only 0x0	*/
-
-#define		AIC_IECR	0x120	/* Interrupt Enable Command Register Write-only	*/
-#define		AIC_IDCR	0x124	/* Interrupt Disable Command Register Write-only*/
-#define		AIC_ICCR	0x128	/* Interrupt Clear Command Register Write-only	*/
-#define		AIC_ISCR	0x12C	/* Interrupt Set Command Register Write-only	*/
-#define		AIC_EOICR	0x130	/* End of Interrupt Command Register Write-only	*/
-#define		AIC_SPU		0x134	/* Spurious Interrupt Vector Register Read/Write 0x0 */
-#define		AIC_DCR		0x138	/* Debug Control Register Read/Write 0x0	*/
-
-#define		AIC_FFER	0x140	/* Fast Forcing Enable Register Write-only	*/
-#define		AIC_FFDR	0x144	/* Fast Forcing Disable Register Write-only	*/
-#define		AIC_FFSR	0x148	/* Fast Forcing Status Register Read-only 0x0	*/
-
-/* Some hardcoded interrupt numbers */
-#define		AIC_IRQ_FIQ	0
-#define		AIC_IRQ_SYS	1	/* System interrupt - multiplexed ST/RTC/PMC/DBGU/MC */
-
-union aic_smr {
-    struct {
-	BITFIELD4(word_t,
-	    prior	: 3,
-	    res1	: 2,
-	    src_type    : 2,
-	    res2	: 25
-	);
-    };
-    word_t raw;
-};
-
-#define		AIC_SMR_PRIOR_MIN	0
-#define		AIC_SMR_PRIOR_MAX	7
-#define		AIC_SMR_SRC_LEVEL_LOW	0
-#define		AIC_SMR_SRC_EDGE_LOW	1
-#define		AIC_SMR_SRC_LEVEL_HIGH	2
-#define		AIC_SMR_SRC_EDGE_HIGH	3
-
-union aic_isr {
-    struct {
-	BITFIELD2(word_t,
-	    irqid	: 3,
-	    res1	: 29
-	);
-    };
-    word_t raw;
-};
-
-union aic_csir {
-    struct {
-	BITFIELD3(word_t,
-	    nifq	: 1,	/* nFIQ line active/deactivated */
-	    nirq	: 1,	/* nIRQ line active/deactivated */
-	    res1	: 30
-	);
-    };
-    word_t raw;
-};
-
-union aic_debug {
-    struct {
-	BITFIELD3(word_t,
-	    prot	: 1,	/* Protection Mode (Safe reads of AIC_IVR) */
-	    gmsk	: 1,	/* Global Mask */
-	    res1	: 30
-	);
-    };
-    word_t raw;
-};
-
-#endif /* __PLATFORM__CSB337__AIC_H__ */
diff --git a/kernel/src/platform/csb337/console.h b/kernel/src/platform/csb337/console.h
deleted file mode 100644
index 64be1b6e..00000000
--- a/kernel/src/platform/csb337/console.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/csb337/console.h
- * Description:   Cogent-CSB337 console constants
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.h,v 1.1 2004/08/12 10:58:53 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__CSB337__CONSOLE_H_
-#define __PLATFORM__CSB337__CONSOLE_H_
-
-#include	INC_PLAT(offsets.h)
-
-/* Atmel AT91RM9200 Debug Serial Port */
-#define CONSOLE_OFFSET	0x200
-#define CONSOLE_VADDR	(SYS_VADDR | CONSOLE_OFFSET)
-
-#endif /* __PLATFORM__CSB337__CONSOLE_H_ */
diff --git a/kernel/src/platform/csb337/intctrl.h b/kernel/src/platform/csb337/intctrl.h
deleted file mode 100644
index 084358ea..00000000
--- a/kernel/src/platform/csb337/intctrl.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/csb337/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: intctrl.h,v 1.1 2004/08/12 10:58:53 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__CSB337__INTCTRL_H__
-#define __PLATFORM__CSB337__INTCTRL_H__
-
-#include	INC_PLAT(aic.h)
-
-/* Atmel AT91RM9200 Advanced Interrupt Controller (AIC) */
-#define IRQS	32
-
-extern word_t arm_high_vector; 
-
-class intctrl_t : public generic_intctrl_t {
-
-public:
-    void init_arch();
-    void init_cpu();
-
-    word_t get_number_irqs(void)
-    {
-	return IRQS;
-    }
-
-    void register_interrupt_handler (word_t vector, void (*handler)(word_t,
-	    arm_irq_context_t *))
-    {
-	ASSERT(vector < IRQS);
-	AIC(AIC_SVR(vector)) = (word_t)handler;
-	TRACE_INIT("interrupt vector[%d] = %p\n", vector, 
-		(word_t*)AIC(AIC_SVR(vector)));
-    }
-
-    static inline void mask(word_t irq)
-    {
-	ASSERT(irq < IRQS);
-	AIC(AIC_IDCR) = (1ul << irq);
-	AIC(AIC_EOICR) = 0;	/* Signal that we have handled this interrupt */
-    }
-
-    static inline bool unmask(word_t irq)
-    {
-	ASSERT(irq < IRQS);
-	AIC(AIC_IECR) = (1ul << irq);
-	return false;
-//        return (AIC(AIC_IPR) & (1 << irq)) != 0;
-    }
-
-    static inline void disable(word_t irq)
-    {  
-	mask(irq);
-    }
-
-    static inline bool enable(word_t irq)
-    {
-	return unmask(irq);
-    }
-
-    static inline void ack(word_t irq)
-    {
-	ASSERT(irq < IRQS);
-	AIC(AIC_EOICR) = 0;	/* Signal that we have handled this interrupt */
-    }
-
-    void disable_fiq(void)
-    {
-	AIC(AIC_FFDR) = ~(0ul);	/* Disable Fast Forwarding */
-    }
-
-    bool is_irq_available(int irq)
-    { 
-	/* IRQ0 - Fast Interrupt not available */
-	return (irq >= 1) && (irq < IRQS);  
-    }
-
-    void set_cpu(word_t irq, word_t cpu) {}
-}; 
-
-#endif /*__PLATFORM__CSB337__INTCTRL_H__ */
diff --git a/kernel/src/platform/csb337/irq.cc b/kernel/src/platform/csb337/irq.cc
deleted file mode 100644
index ab9c1d02..00000000
--- a/kernel/src/platform/csb337/irq.cc
+++ /dev/null
@@ -1,66 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/csb337/irq.cc
- * Description:   Cogent-CSB337 interrupt demultiplexing 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: irq.cc,v 1.1 2004/08/12 11:17:37 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include <linear_ptab.h>
-#include INC_API(tcb.h)
-#include INC_API(syscalls.h)
-#include INC_API(kernelinterface.h)
-#include INC_ARCH(thread.h)
-#include INC_PLAT(console.h)
-#include INC_GLUE(syscalls.h)
-#include INC_GLUE(intctrl.h)
-#include INC_CPU(cpu.h)
-
-extern "C" void spurious_interrupt_handler(word_t , arm_irq_context_t *);
-
-extern "C" void arm_irq(arm_irq_context_t *context)
-{
-    void (*irq_handler)(int, arm_irq_context_t *) =
-	    (void (*)(int, arm_irq_context_t *))AIC(AIC_IVR);
-
-    irq_handler(AIC(AIC_ISR), context); 
-}
-
-void intctrl_t::init_arch()
-{
-    int i;
-
-    /* Program interrupt number into AIC_SVR */
-    for (i=0; i < 32; i++)
-	AIC(AIC_SVR(i)) = (word_t)spurious_interrupt_handler;
-
-    AIC(AIC_IDCR) = ~(0ul);	/* Disable all interrupts */
-    AIC(AIC_FFDR) = ~(0ul);	/* Disable all fast forwarding */
-    AIC(AIC_DCR) = 0;	/* Turn off protection / global mask */
-}
-
diff --git a/kernel/src/platform/csb337/linker.lds b/kernel/src/platform/csb337/linker.lds
deleted file mode 100644
index 113d072d..00000000
--- a/kernel/src/platform/csb337/linker.lds
+++ /dev/null
@@ -1,115 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/csb337/linker.lds
- * Description:   Cogent-CSB337 Linker Script
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: linker.lds,v 1.2 2004/08/21 12:24:25 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_PLAT(offsets.h)
-
-ENTRY(_start)
-_start_text		= VIRT_ADDR_BASE;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-		*(.base)
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-	_end_kip = .;
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	. = ALIGN(32K);
-	_start_data = .;
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.data.kspace)
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-
-	. = ALIGN(4K);
-
-	.init . : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-                *(.init.head)
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-
-		. = ALIGN(4K);
-		_bootstack_bottom = .;
-		. = . + 8K;
-		_bootstack_top = .;
-		_bootstack_top_phys = . - KERNEL_OFFSET;
-	}
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K);
-	/DISCARD/ :
-	{
-/*		*(*)            <-- THIS CAUSES SEGFAULT!!! */
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/csb337/offsets.h b/kernel/src/platform/csb337/offsets.h
deleted file mode 100644
index 131b2584..00000000
--- a/kernel/src/platform/csb337/offsets.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/csb337/offsets.h
- * Description:   Offsets for Cogent-CSB337
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: offsets.h,v 1.1 2004/08/12 10:58:53 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__CSB337__OFFSETS_H__
-#define __PLATFORM__CSB337__OFFSETS_H__
-
-#define		PHYS_ADDR_BASE		0x20000000
-
-/* These must correspond with glue/v4-arm/config.h */
-/* VIRT_ADDR_BASE must be 0xF0000000 */
-#define		VIRT_ADDR_BASE		0xF0000000
-/* UNCACHED_ADDR_BASE must be 0xF4000000 */
-#define		UNCACHED_ADDR_BASE	0xF4000000
-#define		KERNEL_OFFSET		(VIRT_ADDR_BASE-PHYS_ADDR_BASE)
-#define		UNCACHED_OFFSET		(UNCACHED_ADDR_BASE-PHYS_ADDR_BASE)
-
-/* Devices */
-#define		SYS_PADDR		0xFFFFF000
-#define		SYS_VADDR		IO_AREA0_VADDR
-
-#endif /*__PLATFORM__CSB337__OFFSETS_H__*/
diff --git a/kernel/src/platform/csb337/plat.cc b/kernel/src/platform/csb337/plat.cc
deleted file mode 100644
index 2cb5e189..00000000
--- a/kernel/src/platform/csb337/plat.cc
+++ /dev/null
@@ -1,117 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/csb337/plat.cc
- * Description:   
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: plat.cc,v 1.3 2004/08/21 13:31:33 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_API(kernelinterface.h)
-#include INC_GLUE(space.h)
-#include INC_PLAT(console.h)
-#include INC_PLAT(timer.h)
-#include INC_ARCH(bootdesc.h)
-
-// Cogent CSB337 - Atmel AT91RM9200
-#define RAM_SDRAM_START	    0x20000000
-#define RAM_SDRAM_END	    0x22000000
-
-#define RAM_SRAM_START	    0x00200000	/* Internal SRAM */
-#define RAM_SRAM_END	    0x00204000
-#define RAM_ROM_START	    0x00100000	/* Internal ROM */
-#define RAM_ROM_END	    0x00120000
-#define RAM_USB_START	    0x00300000	/* Internal USB Host Port */
-#define RAM_USB_END	    0x00400000
-#define RAM_FLASH1_START    0x10000000	/* Strata Flash */
-#define RAM_FLASH1_END      0x11000000
-#define RAM_LCD1_START	    0x30000000	/* LCD Device Registers */
-#define RAM_LCD1_END	    0x30000200
-#define RAM_LCD2_START	    0x30040000	/* LCD Device 80k Buffer */
-#define RAM_LCD2_END	    0x30070000
-#define RAM_EXP0_START	    0x40000000	/* Expansion Slot 0 */
-#define RAM_EXP0_END	    0x50000000
-#define RAM_CF0_START	    0x60000000	/* Compact Flash 0 */
-#define RAM_CF0_END	    0x70000000
-#define RAM_CF1_START	    0x70000000	/* Compact Flash 1 */
-#define RAM_CF1_END	    0x80000000
-#define RAM_EXP1_START	    0x80000000	/* Expansion Slot 1 */
-#define RAM_EXP1_END	    0x90000000
-#define RAM_PERIPH_START    0xFFFFF000	/* Expansion Slot 1 */
-#define RAM_PERIPH_END	    0xFFFFFFFF
-
-/*
- * Initialize the platform specific mappings needed
- * to start the kernel.
- * Add other hardware initialization here as well
- */
-extern "C" void SECTION(".init") init_platform(void)
-{
-    space_t *space = get_kernel_space();
-
-    /* Map the AT91RM9200 system peripherals */
-    space->add_mapping((addr_t)SYS_VADDR, (addr_t)SYS_PADDR,
-		    pgent_t::size_4k, true, true, true);
-}
-
-/*
- * Platform memory descriptors
- */
-struct arm_bootdesc SECTION(".init.data") platform_memory[] = {
-	{ RAM_SDRAM_START,  RAM_SDRAM_END,	memdesc_t::conventional},
-	{ RAM_SRAM_START,   RAM_SRAM_END,	memdesc_t::dedicated },
-	{ RAM_ROM_START,    RAM_ROM_END,	memdesc_t::dedicated },
-	{ RAM_USB_START,    RAM_USB_END,	memdesc_t::dedicated },
-	{ RAM_FLASH1_START, RAM_FLASH1_END,	memdesc_t::dedicated },
-	{ RAM_LCD1_START,   RAM_LCD1_END,	memdesc_t::dedicated },
-	{ RAM_LCD2_START,   RAM_LCD2_END,	memdesc_t::dedicated },
-	{ RAM_EXP0_START,   RAM_EXP0_END,	memdesc_t::dedicated },
-	{ RAM_CF0_START,    RAM_CF0_END,	memdesc_t::dedicated },
-	{ RAM_CF1_START,    RAM_CF1_END,	memdesc_t::dedicated },
-	{ RAM_EXP1_START,   RAM_EXP1_END,	memdesc_t::dedicated },
-	{ RAM_PERIPH_START, RAM_PERIPH_END,	memdesc_t::dedicated },
-	{ 0, 0, 0 }
-};
-
-extern "C" struct arm_bootdesc* SECTION(".init") init_platform_mem(void)
-{
-    return (struct arm_bootdesc*)virt_to_phys(&platform_memory);
-}
-
-extern "C" void SECTION(".init") init_cpu_mappings(void)
-{
-}
-
-extern "C" void init_cpu(void)
-{
-    arm_cache::cache_invalidate_d();
-    arm_cache::tlb_flush();
-
-    /* Program the Address Remap Register to map Internal SRAM */
-    *((volatile word_t *)(SYS_PADDR + 0xf00)) = 1;
-
-    *((volatile word_t *)(SYS_PADDR + 0xf78)) = 0x1100318a;
-}
diff --git a/kernel/src/platform/csb337/timer.cc b/kernel/src/platform/csb337/timer.cc
deleted file mode 100644
index db1410c9..00000000
--- a/kernel/src/platform/csb337/timer.cc
+++ /dev/null
@@ -1,91 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/csb337/timer.cc
- * Description:   Periodic timer handling
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.cc,v 1.2 2004/08/21 13:31:33 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(schedule.h)
-#include INC_GLUE(timer.h)
-#include INC_GLUE(intctrl.h)
-#include INC_PLAT(timer.h)
-
-timer_t timer;
-extern "C" void intctrl_t_handle_irq(word_t , arm_irq_context_t *);
-
-struct timer_at91rm9200 {
-    word_t  st_cr;	/* Control Register */
-    word_t  st_pimr;	/* Period Interval Mode Register */
-    word_t  st_wdmr;	/* Watchdog Mode Register */
-    word_t  st_rtmr;	/* Real-time Mode Register */
-    word_t  st_sr;	/* Status Register */
-    word_t  st_ier;	/* Interrupt Enable Register */
-    word_t  st_idr;	/* Interrupt Disable Register */
-    word_t  st_imr;	/* Interrupt Mask Register */
-    word_t  st_rtar;	/* Real-time Alarm Register */
-    word_t  st_crtr;	/* Current Real-time Register */
-};
-
-static volatile struct timer_at91rm9200* st =
-	    (struct timer_at91rm9200*)ST_VADDR;
-
-extern "C" void handle_timer_interrupt(word_t irq, arm_irq_context_t *context)
-{
-    word_t status = st->st_sr;
-
-    if (status & ST_SR_PITS)
-    {
-	get_current_scheduler()->handle_timer_interrupt();
-
-	if ((status & st->st_imr) & (~ST_SR_PITS))
-	    intctrl_t_handle_irq(irq, context);
-	else
-	    get_interrupt_ctrl()->ack(irq);
-    } else
-    {
-	intctrl_t_handle_irq(irq, context);
-    }
-}
-
-void timer_t::init_global(void)
-{
-    UNIMPLEMENTED();
-}
-
-void timer_t::init_cpu(void)
-{
-    get_interrupt_ctrl()->register_interrupt_handler(AIC_IRQ_SYS, 
-            handle_timer_interrupt);
-
-    st->st_pimr = TIMER_PERIOD;
-    st->st_idr = ~(0ul);	/* Disable all system interrupts */
-    st->st_ier = ST_SR_PITS;	/* Enable timer interrupts */
-
-    get_interrupt_ctrl()->unmask(AIC_IRQ_SYS);
-}
diff --git a/kernel/src/platform/csb337/timer.h b/kernel/src/platform/csb337/timer.h
deleted file mode 100644
index 615b0c5f..00000000
--- a/kernel/src/platform/csb337/timer.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/csb337/timer.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.h,v 1.1 2004/08/12 10:58:53 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__CSB337__TIMER_H__
-#define __PLATFORM__CSB337__TIMER_H__
-
-#include	INC_PLAT(offsets.h)
-
-/* Atmel AT91RM9200 System Timer */
-#define ST_OFFSET	0xd00
-#define ST_VADDR	(SYS_VADDR | ST_OFFSET)
-
-#define		ST_SR_PITS	1	/* Period Interval Timer Status */
-#define		ST_SR_WDOVF	2	/* Watchdog Overflow */
-#define		ST_SR_RTTINC	4	/* Real-time Timer Increment */
-#define		ST_SR_ALMS	8	/* Alarm Status */
-
-#define		SLCK_RATE	32768
-#define		TIMER_TICK_LENGTH	15625 /* usec */
-#define		TIMER_PERIOD	512
-
-#endif /*__PLATFORM__CSB337__TIMER_H__ */
diff --git a/kernel/src/platform/erpcn01/Makeconf b/kernel/src/platform/erpcn01/Makeconf
deleted file mode 100644
index 087d0f2a..00000000
--- a/kernel/src/platform/erpcn01/Makeconf
+++ /dev/null
@@ -1,4 +0,0 @@
-ifeq ("$(CONFIG_PLAT_ERPCN01)","y")
-SOURCES += src/platform/erpcn01/plat.cc
-endif
-
diff --git a/kernel/src/platform/erpcn01/cache.h b/kernel/src/platform/erpcn01/cache.h
deleted file mode 100644
index 01ffa7ec..00000000
--- a/kernel/src/platform/erpcn01/cache.h
+++ /dev/null
@@ -1,278 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:	  arch/mips64/cache.h
- * Description:   Functions which manipulate the MIPS cache
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cache.h,v 1.10 2004/12/02 00:01:28 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__ERPCN01__CACHE_H__
-#define __PLATFORM__ERPCN01__CACHE_H__
-
-#include INC_ARCH(cache.h)
-#include INC_ARCH(mipsregs.h)
-#include INC_ARCH(addrspace.h)
-#include "linear_ptab.h"
-
-#define CONFIG_MIPS64_DCACHE_SIZE	(32*1024)
-#define CONFIG_MIPS64_ICACHE_SIZE	(32*1024)
-#define CONFIG_MIPS64_CACHE_LINE_SIZE	32
-#define CONFIG_MIPS64_CACHE_WAYS	2
-
-#define CACHE_WAYS		CONFIG_MIPS64_CACHE_WAYS
-//#define CACHE_LINE_SIZE		CONFIG_MIPS64_CACHE_LINE_SIZE	in config.h
-#define DCACHE_SIZE		CONFIG_MIPS64_DCACHE_SIZE
-#define ICACHE_SIZE		CONFIG_MIPS64_ICACHE_SIZE
-
-/*
- * Cache Operations
- */
-#define Index_Invalidate_I      0x00
-#define Index_Writeback_Inv_D   0x01
-#define Index_Invalidate_SI     0x02
-#define Index_Writeback_Inv_SD  0x03
-#define Index_Load_Tag_I        0x04
-#define Index_Load_Tag_D        0x05
-#define Index_Load_Tag_SI       0x06
-#define Index_Load_Tag_SD       0x07
-#define Index_Store_Tag_I       0x08
-#define Index_Store_Tag_D       0x09
-#define Index_Store_Tag_SI      0x0A
-#define Index_Store_Tag_SD      0x0B
-#define Create_Dirty_Excl_D     0x0d
-#define Create_Dirty_Excl_SD    0x0f
-#define Hit_Invalidate_I        0x10
-#define Hit_Invalidate_D        0x11
-#define Hit_Invalidate_SI       0x12
-#define Hit_Invalidate_SD       0x13
-#define Fill                    0x14
-#define Hit_Writeback_Inv_D     0x15
-                                        /* 0x16 is unused */
-#define Hit_Writeback_Inv_SD    0x17
-#define Hit_Writeback_I         0x18
-#define Hit_Writeback_D         0x19
-                                        /* 0x1a is unused */
-#define Hit_Writeback_SD        0x1b
-                                        /* 0x1c is unused */
-                                        /* 0x1e is unused */
-#define Hit_Set_Virtual_SI      0x1e
-#define Hit_Set_Virtual_SD      0x1f
-
-#define cache32_unroll32(base,op)                               \
-	__asm__ __volatile__("                                  \
-		.set noreorder;                                 \
-		cache %1, 0x000(%0); cache %1, 0x020(%0);       \
-		cache %1, 0x040(%0); cache %1, 0x060(%0);       \
-		cache %1, 0x080(%0); cache %1, 0x0a0(%0);       \
-		cache %1, 0x0c0(%0); cache %1, 0x0e0(%0);       \
-		cache %1, 0x100(%0); cache %1, 0x120(%0);       \
-		cache %1, 0x140(%0); cache %1, 0x160(%0);       \
-		cache %1, 0x180(%0); cache %1, 0x1a0(%0);       \
-		cache %1, 0x1c0(%0); cache %1, 0x1e0(%0);       \
-		cache %1, 0x200(%0); cache %1, 0x220(%0);       \
-		cache %1, 0x240(%0); cache %1, 0x260(%0);       \
-		cache %1, 0x280(%0); cache %1, 0x2a0(%0);       \
-		cache %1, 0x2c0(%0); cache %1, 0x2e0(%0);       \
-		cache %1, 0x300(%0); cache %1, 0x320(%0);       \
-		cache %1, 0x340(%0); cache %1, 0x360(%0);       \
-		cache %1, 0x380(%0); cache %1, 0x3a0(%0);       \
-		cache %1, 0x3c0(%0); cache %1, 0x3e0(%0);       \
-		.set reorder"                                   \
-		:                                               \
-		: "r" (base),                                   \
-		  "i" (op));
-
-static inline void blast_dcache32(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + DCACHE_SIZE);
-
-    while(start < end) {
-	cache32_unroll32(start,Index_Writeback_Inv_D);
-        start += 0x400;
-    }
-}
-
-static inline void blast_icache32(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    while(start < end) {
-	cache32_unroll32(start,Index_Invalidate_I);
-	start += 0x400;
-    }
-}
-
-static inline void init_dcache32(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + DCACHE_SIZE);
-
-    asm (
-	"mtc0	$0, "STR(CP0_TAGLO)"\n\t"
-	"mtc0	$0, "STR(CP0_TAGHI)"\n\t"
-    );
-
-    while(start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_D)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-static inline void init_icache32(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    asm (
-	"mtc0	$0, "STR(CP0_TAGLO)"\n\t"
-	"mtc0	$0, "STR(CP0_TAGHI)"\n\t"
-    );
-
-    while(start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-
-INLINE void cache_t::init_cpu(void)
-{
-    word_t temp;
-
-    __asm__ __volatile__ (
-	"la	%0, 1f\n\t"
-	"or	%0, 0xffffffffa0000000\n\t"
-	"jr	%0\n\t"
-	"1:\n\t"
-	"mfc0	%0, "STR(CP0_CONFIG)"\n\t"
-	: "=r" (temp)
-    );
-    temp &= (~CONFIG_CACHE_MASK);
-#if CONFIG_UNCACHED
-    temp |= CONFIG_NOCACHE;
-#else
-    temp |= CONFIG_CACHABLE_NONCOHERENT;
-#endif
-
-    __asm__ __volatile__ (
-	"mtc0	%0, "STR(CP0_CONFIG)"\n\t"
-	: : "r" (temp)
-    );
-
-    /* Important that these inline! */
-    init_dcache32();
-    init_icache32();
-
-    __asm__ __volatile__ (
-	"la	%0, 2f\n\t"
-	"jr	%0\n\t"
-	"2:\n\t"
-	: : "r" (temp)
-    );
-}
-
-INLINE void cache_t::flush_cache_all(void)
-{
-    blast_dcache32(); blast_icache32();
-}
-
-INLINE void cache_t::flush_cache_l1(void)
-{
-    blast_dcache32(); blast_icache32();
-}
-
-INLINE void cache_t::flush_cache_range(unsigned long start, unsigned long end)
-{
-    start &= (~CACHE_LINE_SIZE);
-    end = (end + (CACHE_LINE_SIZE-1)) & (~CACHE_LINE_SIZE);
-
-    if (end > (start + DCACHE_SIZE))
-	end = start + DCACHE_SIZE;
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_D)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-INLINE void cache_t::flush_icache_range(unsigned long start, unsigned long end)
-{
-    start &= (~CACHE_LINE_SIZE);
-    end = (end + (CACHE_LINE_SIZE-1)) & (~CACHE_LINE_SIZE);
-
-    if (end > (start + ICACHE_SIZE))
-	end = start + ICACHE_SIZE;
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-INLINE void cache_t::flush_cache_page(unsigned long page, pgent_t::pgsize_e pgsize)
-{
-    unsigned long start = page & (~page_mask(pgsize));
-    unsigned long end = start + page_size(pgsize);
-
-    if (end > (start + DCACHE_SIZE))
-	end = start + DCACHE_SIZE;
-
-    while (start < end) {
-	cache32_unroll32(start, Index_Writeback_Inv_D);
-	start += 0x400;
-    }
-}
-
-INLINE void cache_t::flush_icache_page(unsigned long page, pgent_t::pgsize_e pgsize)
-{
-    unsigned long start = page & (~page_mask(pgsize));
-    unsigned long end = start + page_size(pgsize);
-
-    if (end > (start + ICACHE_SIZE))
-	end = start + ICACHE_SIZE;
-
-    while (start < end) {
-	cache32_unroll32(start, Index_Invalidate_I);
-	start += 0x400;
-    }
-}
-
-#endif
diff --git a/kernel/src/platform/erpcn01/config.h b/kernel/src/platform/erpcn01/config.h
deleted file mode 100644
index 75f174fe..00000000
--- a/kernel/src/platform/erpcn01/config.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     platform/erpcn01/config.cc
- * Description:   Platform specific configuration
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.10 2004/06/04 07:03:39 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__EPRCN01__CONFIG_H__
-#define __PLATFORM__ERPCN01__CONFIG_H__
-
-
-#define CONFIG_MIPS64_ADDRESS_BITS	    40
-#define CONFIG_MIPS64_PHYS_ADDRESS_BITS	    36
-#define CONFIG_MIPS64_VPN_SHIFT		    12
-#define CONFIG_MIPS64_PAGEMASK_4K	    0
-
-#define CONFIG_MIPS64_CONSOLE_RESERVE (0)
-
-#define CONFIG_MIPS64_TLB_SIZE 48
-
-#define CONFIG_MIPS64_STATUS_MASK 0x8fffff00
-
-#if !defined(__ASSEMBLER__)
-
-#else /* ASSEMBLER */
-
-/* 64-bit virtual memory kernel mode */
-/* 64-bit virtual memory supervisor mode */
-/* 64-bit virtual memory user mode */
-/* 32 FPU registers */
-/* disable parity/ECC */
-/* CU3 -> MIPS IV instructions */
-#define	INIT_CP0_STATUS_SET			\
-    (ST_KX|ST_SX|ST_UX|ST_FR|ST_DE|ST_XX)
-
-/* disable reverse endian */
-/* go into kernel mode */
-/* remove error condition */
-/* remove exception level */
-/* FPU is disabled */
-/* clear NMI/soft reset */
-#define	INIT_CP0_STATUS_CLEAR			\
-    (ST_RE|ST_KSU|ST_ERL|ST_EXL|ST_CU1|ST_SR)
-
-#endif
-
-#endif /* __PLATFORM__ERPCN01__CONFIG_H__ */
diff --git a/kernel/src/platform/erpcn01/gt64115.h b/kernel/src/platform/erpcn01/gt64115.h
deleted file mode 100644
index 0fd5e9be..00000000
--- a/kernel/src/platform/erpcn01/gt64115.h
+++ /dev/null
@@ -1,486 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     platform/erpcn01/gt64115.h
- * Description:   Galileo GT64115 definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: gt64115.h,v 1.4 2003/09/24 19:04:55 skoglund Exp $
- *                
- ********************************************************************/
-/*
- * Carl van Schaik - Openfuel Pty Ltd.
- */
-
-#ifndef _gt64115_h 
-#define _gt64115_h
-
-#define GT64115
-
-/* Important remark:
- * All 0x0 defines have no meaning for the GT64115 and are here for compatability */ 
-
-
-#define XKPHYS2     0x9000000000000000 /* Uncached */
-
-/****************************************/
-/* Default Memory Map					*/
-/****************************************/
-
-#define GTREGS_BASE											0xB4000000
-#define BOOT_BASE											0xBFC00000
-#define SRAM_BASE											0xBC000000
-#define SDRAM_BASE											0xA0000000
-
-/****************************************/
-/* CPU Configuration 					*/
-/****************************************/
-
-#define GT_CPU_INTERFACE_CONFIGURATION						0x000
-
-#define gt_CPU_CFG_WriteMode								(1<<11)
-#define gt_CPU_CFG_Endianess								(1<<12)
-#define gt_CPU_CFG_PCI_Override(x)							((x & 3)<<13)
-#define gt_PCI_NO_OVERIDE									0x00
-#define gt_PCI_1GB_MEM										0x01
-#define gt_PCI_2GB_MEM										0x02
-#define gt_PCI_NO_MATCH										0x03
-#define gt_CPU_CFG_Stop_Retry								(1<<15)
-
-/****************************************/
-/* Processor Address Space				*/
-/****************************************/
-
-#define GT_SCS_1_0_LOW_DECODE_ADDRESS						0x008
-#define GT_SCS_1_0_HIGH_DECODE_ADDRESS						0x010
-#define GT_SCS_3_2_LOW_DECODE_ADDRESS						0x018
-#define GT_SCS_3_2_HIGH_DECODE_ADDRESS						0x020
-#define GT_CS_2_0_LOW_DECODE_ADDRESS						0x028
-#define GT_CS_2_0_HIGH_DECODE_ADDRESS						0x030
-#define GT_CS_3_BOOTCS_LOW_DECODE_ADDRESS					0x038
-#define GT_CS_3_BOOTCS_HIGH_DECODE_ADDRESS 					0x040
-#define GT_PCI_0I_O_LOW_DECODE_ADDRESS						0x048
-#define GT_PCI_0I_O_HIGH_DECODE_ADDRESS						0x050
-#define GT_PCI_0MEMORY0_LOW_DECODE_ADDRESS					0x058
-#define GT_PCI_0MEMORY0_HIGH_DECODE_ADDRESS					0x060
-#define GT_PCI_0MEMORY1_LOW_DECODE_ADDRESS					0x080
-#define GT_PCI_0MEMORY1_HIGH_DECODE_ADDRESS					0x088
-#define GT_PCI_1I_O_LOW_DECODE_ADDRESS						0x0
-#define GT_PCI_1I_O_HIGH_DECODE_ADDRESS						0x0
-#define GT_PCI_1MEMORY0_LOW_DECODE_ADDRESS					0x0
-#define GT_PCI_1MEMORY0_HIGH_DECODE_ADDRESS					0x0
-#define GT_PCI_1MEMORY1_LOW_DECODE_ADDRESS					0x0
-#define GT_PCI_1MEMORY1_HIGH_DECODE_ADDRESS					0x0
-#define GT_INTERNAL_SPACE_DECODE							0x068
-#define GT_CPU_BUS_ERROR_ADDRESS 							0x070
-#define GT_SCS_1_0_ADDRESS_REMAP							0x090
-#define GT_SCS_3_2_ADDRESS_REMAP							0x098
-#define GT_CS_2_0_ADDRESS_REMAP								0x0A0
-#define GT_CS_3_BOOTCS_ADDRESS_REMAP						0x0A8
-#define GT_PCI_0I_O_ADDRESS_REMAP							0x0B0
-#define GT_PCI_0MEMORY0_ADDRESS_REMAP						0x0B8
-#define GT_PCI_0MEMORY1_ADDRESS_REMAP						0x0C0
-#define GT_PCI_1IO_ADDRESS_REMAP							0x0
-#define GT_PCI_1MEMORY0_ADDRESS_REMAP						0x0
-#define GT_PCI_1MEMORY1_ADDRESS_REMAP						0x0
-
-/****************************************/
-/* SDRAM and Device Address Space		*/
-/****************************************/
-	
-#define GT_SCS_0_LOW_DECODE_ADDRESS							0x400
-#define GT_SCS_0_HIGH_DECODE_ADDRESS						0x404
-#define GT_SCS_1_LOW_DECODE_ADDRESS							0x408
-#define GT_SCS_1_HIGH_DECODE_ADDRESS						0x40C
-#define GT_SCS_2_LOW_DECODE_ADDRESS							0x410
-#define GT_SCS_2_HIGH_DECODE_ADDRESS						0x414
-#define GT_SCS_3_LOW_DECODE_ADDRESS							0x418
-#define GT_SCS_3_HIGH_DECODE_ADDRESS						0x41C
-#define GT_CS_0_LOW_DECODE_ADDRESS							0x420
-#define GT_CS_0_HIGH_DECODE_ADDRESS							0x424
-#define GT_CS_1_LOW_DECODE_ADDRESS							0x428
-#define GT_CS_1_HIGH_DECODE_ADDRESS							0x42C
-#define GT_CS_2_LOW_DECODE_ADDRESS							0x430
-#define GT_CS_2_HIGH_DECODE_ADDRESS							0x434
-#define GT_CS_3_LOW_DECODE_ADDRESS							0x438
-#define GT_CS_3_HIGH_DECODE_ADDRESS							0x43C
-#define GT_BOOTCS_LOW_DECODE_ADDRESS						0x440
-#define GT_BOOTCS_HIGH_DECODE_ADDRESS						0x444
-#define GT_ADDRESS_DECODE_ERROR								0x470
-#define GT_ADDRESS_DECODE									0x47C
-
-/****************************************/
-/* SDRAM Configuration					*/
-/****************************************/
-
-#define GT_SDRAM_CONFIGURATION	 							0x448
-#define gt_SDRAM_CFG_RefIntCnt								(x & 0x00003FFF)
-#define gt_SDRAM_CFG_RMW									(1<<15)
-#define gt_SDRAM_StagRef									(1<<16)
-#define gt_SDRAM_Mask										0xF8000000
-
-#define GT_SDRAM_OPERATION_MODE								0x474
-#define gt_SDRAM_OP_Normal									0x00
-#define gt_SDRAM_OP_NOP										0x01
-#define gt_SDRAM_OP_Precharge								0x02
-#define gt_SDRAM_OP_Mode_Reg_CMD							0x03
-#define gt_SDRAM_OP_CBR_Cycle								0x04
-
-#define GT_SDRAM_ADDRESS_DECODE								0x47C
-
-/****************************************/
-/* SDRAM Parameters						*/
-/****************************************/
-			
-#define GT_SDRAM_BANK0PARAMETERS							0x44C
-#define GT_SDRAM_BANK1PARAMETERS							0x450
-#define GT_SDRAM_BANK2PARAMETERS							0x454
-#define GT_SDRAM_BANK3PARAMETERS							0x458
-
-#define gt_SDRAM_PARAM_2CYC									0x01
-#define gt_SDRAM_PARAM_3CYC									0x02
-#define gt_SDRAM_PARAM_FlowThrough							(1<<2)
-#define gt_SDRAM_PARAM_SRAS_Precharge_2CYC					0x00
-#define gt_SDRAM_PARAM_SRAS_Precharge_3CYC					(1<<3)
-#define gt_SDRAM_PARAM_Interleave_2way						0x00
-#define gt_SDRAM_PARAM_Interleave_4way						(1<<5)
-#define gt_SDRAM_PARAM_No_Parity							0x00
-#define gt_SDRAM_PARAM_Parity								(1<<8)
-#define gt_SDRAM_PARAM_No_Bypass							0x00
-#define gt_SDRAM_PARAM_Bypass								(1<<9)
-#define gt_SDRAM_PARAM_RAS_CAS_2CYC							0x00
-#define gt_SDRAM_PARAM_RAS_CAS_3CYC							(1<<10)
-#define gt_SDRAM_PARAM_16Mbit								0x00
-#define gt_SDRAM_PARAM_128Mbit								(1<<11)
-#define gt_SDRAM_PARAM_Burst_8								0x00
-#define gt_SDRAM_PARAM_Burst_4								(1<<13)
-
-/****************************************/
-/* Device Parameters					*/
-/****************************************/
-
-#define GT_DEVICE_BANK0PARAMETERS							0x45C
-#define GT_DEVICE_BANK1PARAMETERS							0x460
-#define GT_DEVICE_BANK2PARAMETERS							0x464
-#define GT_DEVICE_BANK3PARAMETERS							0x468
-#define GT_DEVICE_BOOT_BANK_PARAMETERS						0x46C
-
-#define gt_DEV_PARAM_TurnOff(x)								(x & 0x07)
-#define gt_DEV_PARAM_AccToFirst(x)							((x & 0x07)<<3)
-#define gt_DEV_PARAM_AccToNext(x)							((x & 0x07)<<7)
-#define gt_DEV_PARAM_ALEtoWR(x)								((x & 0x07)<<11)
-#define gt_DEV_PARAM_WrActive(x)							((x & 0x07)<<14)
-#define gt_DEV_PARAM_WrHigh(x)								((x & 0x07)<<17)
-#define gt_DEV_PARAM_8_bit									0x00
-#define gt_DEV_PARAM_16_bit									(0x01<<20)
-#define gt_DEV_PARAM_32_bit									(0x02<<20)
-#define gt_DEV_PARAM_No_Parity								0x00
-#define gt_DEV_PARAM_Parity									(1<<30)
-
-/****************************************/
-/* MPP Configuration					*/
-/****************************************/
-
-#define GT_MULTI_PURPOSE_PINS_CONFIGURATION				   	0x480
-#define gt_MPP_Config(n,x)								((x & 0x7) << (n*3)
-#define gt_MPP_0_3_DMAReq									0x0
-#define gt_MPP_EOT											0x1
-#define gt_MPP_BypsOE										0x4
-#define gt_MPP_4_7_Parity									0x0
-#define gt_MPP_0_MREQ										0x3
-#define gt_MPP_1_MGNT										0x3
-#define gt_MPP_2_TREQ										0x3
-#define gt_MPP_4_MREQ										0x3
-#define gt_MPP_5_MGNT										0x3
-#define gt_MPP_6_TREQ										0x3
-
-/****************************************/
-/* DMA Record							*/
-/****************************************/
-
-#define GT_CHANNEL0_DMA_BYTE_COUNT							0x800
-#define GT_CHANNEL1_DMA_BYTE_COUNT	 						0x804
-#define GT_CHANNEL2_DMA_BYTE_COUNT	 						0x808
-#define GT_CHANNEL3_DMA_BYTE_COUNT	 						0x80C
-#define GT_CHANNEL0_DMA_SOURCE_ADDRESS						0x810
-#define GT_CHANNEL1_DMA_SOURCE_ADDRESS						0x814
-#define GT_CHANNEL2_DMA_SOURCE_ADDRESS						0x818
-#define GT_CHANNEL3_DMA_SOURCE_ADDRESS						0x81C
-#define GT_CHANNEL0_DMA_DESTINATION_ADDRESS					0x820
-#define GT_CHANNEL1_DMA_DESTINATION_ADDRESS					0x824
-#define GT_CHANNEL2_DMA_DESTINATION_ADDRESS					0x828
-#define GT_CHANNEL3_DMA_DESTINATION_ADDRESS					0x82C
-#define GT_CHANNEL0NEXT_RECORD_POINTER						0x830
-#define GT_CHANNEL1NEXT_RECORD_POINTER						0x834
-#define GT_CHANNEL2NEXT_RECORD_POINTER						0x838
-#define GT_CHANNEL3NEXT_RECORD_POINTER						0x83C
-#define GT_CHANNEL0CURRENT_DESCRIPTOR_POINTER				0x870
-#define GT_CHANNEL1CURRENT_DESCRIPTOR_POINTER				0x874
-#define GT_CHANNEL2CURRENT_DESCRIPTOR_POINTER				0x878
-#define GT_CHANNEL3CURRENT_DESCRIPTOR_POINTER				0x87C
-
-/****************************************/
-/* DMA Channel Control					*/
-/****************************************/
-
-#define GT_CHANNEL0CONTROL									0x840
-#define GT_CHANNEL1CONTROL									0x844
-#define GT_CHANNEL2CONTROL									0x848
-#define GT_CHANNEL3CONTROL									0x84C
-
-#define gt_DMA_CTL_FlyBy									(1<<0)
-#define gt_DMA_CTL_RdFly									0x00
-#define gt_DMA_CTL_WrFly									(1<<1)
-#define gt_DMA_CTL_Src_Inc									0x00
-#define gt_DMA_CTL_Src_Dec									(1<<2)
-#define gt_DMA_CTL_Src_Hold									(2<<2)
-#define gt_DMA_CTL_Dst_Inc									0x00
-#define gt_DMA_CTL_Dst_Dec									(1<<4)
-#define gt_DMA_CTL_Dst_Hold									(2<<4)
-#define gt_DMA_CTL_Limit_1B									(5<<6)
-#define gt_DMA_CTL_Limit_2B									(6<<6)
-#define gt_DMA_CTL_Limit_4B									(0<<6)
-#define gt_DMA_CTL_Limit_8B									(1<<6)
-#define gt_DMA_CTL_Limit_16B								(3<<6)
-#define gt_DMA_CTL_Limit_32B								(7<<7)
-#define gt_DMA_CTL_Chained									0x00
-#define gt_DMA_CTL_Non_Chained								(1<<9)
-#define gt_DMA_CTL_Int_Normal								0x00
-#define gt_DMA_CTL_Int_Chained								(1<<10)
-#define gt_DMA_CTL_Transfer_Demand							0x00
-#define gt_DMA_CTL_Transfer_Block							(1<<11)
-#define gt_DMA_CTL_Ch_Disable								0x00
-#define gt_DMA_CTL_Ch_Enable								(1<<12)
-#define gt_DMA_CTL_FetNexRec								(1<<13)
-#define gt_DMA_CTL_DMAAct_Mask								(1<<14)
-#define gt_DMA_CTL_SDA_Src									0x00
-#define gt_DMA_CTL_SDA_Dst									(1<<15)
-#define gt_DMA_CTL_Mask_DMA									(1<<16)
-#define gt_DMA_CTL_CDE										(1<<17)
-#define gt_DMA_CTL_EOT_En									(1<<18)
-#define gt_DMA_CTL_EOT_Int_En								(1<<19)
-#define gt_DMA_CTL_Abort									(1<<20)
-#define gt_DMA_CTL_SLP_PCI									(1<<21)
-#define gt_DMA_CTL_DLP_PCI									(1<<23)
-#define gt_DMA_CTL_RLP_PCI									(1<<25)
-#define gt_DMA_CTL_DMA_Request_Ext							0x00
-#define gt_DMA_CTL_DMA_Request_Timer						(1<<28)
-
-/****************************************/
-/* DMA Arbiter							*/
-/****************************************/
-
-#define GT_ARBITER_CONTROL									0x860
-
-#define gt_ARB_10_Round_Robin								0x00
-#define gt_ARB_10_Priority1									0x01
-#define gt_ARB_10_Priority0									0x02
-#define gt_ARB_23_Round_Robin								0x00
-#define gt_ARB_23_Priority3									(0x01<<2)
-#define gt_ARB_23_Priority2									(0x02<<2)
-#define gt_ARB_GRP_Round_Robin								0x00
-#define gt_ARB_GRP_Priority23								(0x01<<4)
-#define gt_ARB_GRP_Priority01								(0x02<<4)
-#define gt_ARB_PrioOpt										(1<<6)
-
-/****************************************/
-/* Timer_Counter 						*/
-/****************************************/
-
-#define GT_TIMER_COUNTER0									0x850
-#define GT_TIMER_COUNTER1									0x854
-#define GT_TIMER_COUNTER2									0x858
-#define GT_TIMER_COUNTER3									0x85C
-#define GT_TIMER_COUNTER_CONTROL							0x864
-
-#define gt_TC_CTL_T0_En										(1<<0)
-#define gt_TC_CTL_T0_Counter								0x00
-#define gt_TC_CTL_T0_Timer									(1<<1)
-#define gt_TC_CTL_T1_En										(1<<2)
-#define gt_TC_CTL_T1_Counter								0x00
-#define gt_TC_CTL_T1_Timer									(1<<3)
-#define gt_TC_CTL_T2_En										(1<<4)
-#define gt_TC_CTL_T2_Counter								0x00
-#define gt_TC_CTL_T2_Timer									(1<<5)
-#define gt_TC_CTL_T3_En										(1<<6)
-#define gt_TC_CTL_T3_Counter								0x00
-#define gt_TC_CTL_T3_Timer									(1<<7)
-
-/****************************************/
-/* PCI Internal  						*/
-/****************************************/
-
-#define GT_PCI_0COMMAND										0xC00
-#define gt_PCI_0CMD_NoByteSwap								(1<<0)
-#define gt_PCI_0CMD_SyncMode_Default						0x00
-#define gt_PCI_0CMD_SyncMode_Semi							(0x1<<1)
-#define gt_PCI_0CMD_SyncMode_Sync							(0x2<<1)
-#define gt_PCI_0CMD_RemapWrDis								(1<<16)
-
-#define GT_PCI_0TIMEOUT_RETRY								0xC04
-#define gt_PCI_OTimeout0(x)									(x & 0xFF)
-#define gt_PCI_0Timeout1(x)									((x & 0xFF)<<8)
-#define gt_PCI_0RetryCtr(x)									((x & 0xFF)<<16)
-
-#define GT_PCI_0SCS_1_0_BANK_SIZE							0xC08
-#define GT_PCI_0SCS_3_2_BANK_SIZE							0xC0C
-#define GT_PCI_0CS_2_0_BANK_SIZE							0xC10
-#define GT_PCI_0CS_3_BOOTCS_BANK_SIZE						0xC14
-#define GT_PCI_0BASE_ADDRESS_REGISTERS_ENABLE 				0xC3C
-#define gt_PCI_0BAR_DIS_BootCS_SwCS3						(1<<0)
-#define gt_PCI_0BAR_DIS_SwSCS3_2							(1<<1)
-#define gt_PCI_0BAR_DIS_SwSCS1_0							(1<<2)
-#define gt_PCI_0BAR_DIS_IntIO								(1<<3)
-#define gt_PCI_0BAR_DIS_IntME								(1<<4)
-#define gt_PCI_0BAR_DIS_CS3_BootCS							(1<<5)
-#define gt_PCI_0BAR_DIS_CS2_1_0								(1<<6)
-#define gt_PCI_0BAR_DIS_SCS3_2								(1<<7)
-#define gt_PCI_0BAR_DIS_SCS1_0								(1<<8)
-
-#define GT_PCI_0SCS_1_0_BASE_ADDRESS_REMAP					0xC48
-#define GT_PCI_0SCS_3_2_BASE_ADDRESS_REMAP					0xC4C
-#define GT_PCI_0CS_2_0_BASE_ADDRESS_REMAP					0xC50
-#define GT_PCI_0CS_3_BOOTCS_ADDRESS_REMAP					0xC54
-#define GT_PCI_0SWAPPED_SCS_1_0_BASE_ADDRESS_REMAP			0xC58
-#define GT_PCI_0SWAPPED_SCS_3_2_BASE_ADDRESS_REMAP			0xC5C
-#define GT_PCI_0SWAPPED_CS_3_BOOTCS_BASE_ADDRESS_REMAP		0xC64
-#define GT_PCI_0CONFIGURATION_ADDRESS 						0xCF8
-#define gt_PCI_0CONF_RegNum(x)								((x & 0x1F)<<2)
-#define gt_PCI_0CONF_FunctNum(x)							((x & 0x7)<<8)
-#define gt_PCI_0CONF_DevNum(x)								((x & 0x1F)<<11)
-#define gt_PCI_0CONF_BusNum(x)								((x & 0xFF)<<16)
-#define gt_PCI_0CONF_ConfigEn								(1<<31)
-
-#define GT_PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER			0xCFC
-#define GT_PCI_0INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER		0xC34
-#define GT_PCI_1COMMAND										0x0
-#define GT_PCI_1TIMEOUT_RETRY								0x0
-#define GT_PCI_1SCS_1_0_BANK_SIZE							0x0
-#define GT_PCI_1SCS_3_2_BANK_SIZE							0x0
-#define GT_PCI_1CS_2_0_BANK_SIZE							0x0
-#define GT_PCI_1CS_3_BOOTCS_BANK_SIZE						0x0
-#define GT_PCI_1BASE_ADDRESS_REGISTERS_ENABLE 				0x0
-#define GT_PCI_1SCS_1_0_BASE_ADDRESS_REMAP					0x0
-#define GT_PCI_1SCS_3_2_BASE_ADDRESS_REMAP					0x0
-#define GT_PCI_1CS_2_0_BASE_ADDRESS_REMAP					0x0
-#define GT_PCI_1CS_3_BOOTCS_ADDRESS_REMAP					0x0
-#define GT_PCI_1SWAPPED_SCS_1_0_BASE_ADDRESS_REMAP			0x0
-#define GT_PCI_1SWAPPED_SCS_3_2_BASE_ADDRESS_REMAP			0x0
-#define GT_PCI_1SWAPPED_CS_3_BOOTCS_BASE_ADDRESS_REMAP		0x0
-#define GT_PCI_1CONFIGURATION_ADDRESS 						0x0
-#define GT_PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER			0x0
-#define GT_PCI_1INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER		0x0
-
-/****************************************/
-/* Interrupts	  						*/
-/****************************************/
-			
-#define GT_CPU_INTERRUPT_CAUSE_REGISTER						0xC18
-#define gt_INT_MASK_Sum										(1<<0)
-#define gt_INT_MASK_MemOut									(1<<1)
-#define gt_INT_MASK_DMAOut									(1<<2)
-#define gt_INT_MASK_CPUOut									(1<<3)
-#define gt_INT_MASK_DMA0Comp								(1<<4)
-#define gt_INT_MASK_DMA1Comp								(1<<5)
-#define gt_INT_MASK_DMA2Comp								(1<<6)
-#define gt_INT_MASK_DMA3Comp								(1<<7)
-#define gt_INT_MASK_T0Exp									(1<<8)
-#define gt_INT_MASK_T1Exp									(1<<9)
-#define gt_INT_MASK_T2Exp									(1<<10)
-#define gt_INT_MASK_T3Exp									(1<<11)
-#define gt_INT_MASK_MasRdErr								(1<<12)
-#define gt_INT_MASK_SlvWrErr								(1<<13)
-#define gt_INT_MASK_MaxWrErr								(1<<14)
-#define gt_INT_MASK_SlvRdErr								(1<<15)
-#define gt_INT_MASK_AddrErr									(1<<16)
-#define gt_INT_MASK_MemErr									(1<<17)
-#define gt_INT_MASK_MasAbort								(1<<18)
-#define gt_INT_MASK_TarAbort								(1<<19)
-#define gt_INT_MASK_RetryCtr								(1<<20)
-#define gt_INT_MASK_PMCInt									(1<<21)
-#define gt_INT_MASK_CPUInt(x)								((x & 0xF)<<22)
-#define gt_INT_MASK_PCIInt0									(1<<26)
-#define gt_INT_MASK_PCIInt1									(1<<27)
-#define gt_INT_MASK_PCIInt2									(1<<28)
-#define gt_INT_MASK_PCIInt3									(1<<29)
-#define gt_INT_MASK_CPUIntSum								(1<<30)
-#define gt_INT_MASK_PCIIntSum								(1<<31)
-
-#define GT_CPU_INTERRUPT_MASK_REGISTER						0xC1C
-#define GT_PCI_0INTERRUPT_CAUSE_MASK_REGISTER				0xC24
-#define GT_PCI_0SERR0_MASK									0xC28
-#define gt_PCI_0SERR_MASK_AddrErr							(1<<0)
-#define gt_PCI_0SERR_MASK_MasWrErr							(1<<1)
-#define gt_PCI_0SERR_MASK_MasRdErr							(1<<2)
-#define gt_PCI_0SERR_MASK_MemErr							(1<<3)
-#define gt_PCI_0SERR_MASK_MasAbort							(1<<4)
-#define gt_PCI_0SERR_MASK_TarAbort							(1<<5)
-
-#define GT_PCI_1INTERRUPT_CAUSE_MASK_REGISTER				0x0
-#define GT_PCI_1SERR0_MASK									0x0
-
-/****************************************/
-/* PCI Configuration   					*/
-/****************************************/
-
-#define GT_PCI_0DEVICE_AND_VENDOR_ID 						0x000
-#define GT_PCI_0STATUS_AND_COMMAND							0x004
-#define GT_PCI_0CLASS_CODE_AND_REVISION_ID 					0x008
-#define GT_PCI_0BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 	0x00C
-#define GT_PCI_0SCS_1_0_BASE_ADDRESS	 					0x010
-#define GT_PCI_0SCS_3_2_BASE_ADDRESS 						0x014
-#define GT_PCI_0CS_2_0_BASE_ADDRESS 						0x018
-#define GT_PCI_0CS_3_BOOTCS_BASE_ADDRESS					0x01C
-#define GT_PCI_0INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS	0x020
-#define GT_PCI_0INTERNAL_REGISTERS_I_OMAPPED_BASE_ADDRESS	0x024
-#define GT_PCI_0SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID		0x02C
-#define GT_EXPANSION_ROM_BASE_ADDRESS_REGISTER				0x030
-#define GT_PCI_0INTERRUPT_PIN_AND_LINE 						0x03C
-#define GT_PMC_REGISTER										0x040
-#define GT_PMC_SR_REGISTER									0x044
-#define GT_PCI_1DEVICE_AND_VENDOR_ID 						0x0
-#define GT_PCI_1STATUS_AND_COMMAND							0x0
-#define GT_PCI_1CLASS_CODE_AND_REVISION_ID 					0x0
-#define GT_PCI_1BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 	0x0
-#define GT_PCI_1SCS_1_0_BASE_ADDRESS	 					0x0
-#define GT_PCI_1SCS_3_2_BASE_ADDRESS 						0x0
-#define GT_PCI_1CS_2_0_BASE_ADDRESS 						0x0
-#define GT_PCI_1CS_3_BOOTCS_BASE_ADDRESS					0x0
-#define GT_PCI_1INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS	0x0
-#define GT_PCI_1INTERNAL_REGISTERSI_OMAPPED_BASE_ADDRESS	0x0
-#define GT_PCI_1SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID		0x0
-#define GT_PCI_1INTERRUPT_PIN_AND_LINE 						0x0
-
-/****************************************/
-/* PCI Configuration, Function 1		*/
-/****************************************/
-
-#define GT_PCI_0SWAPPED_SCS_1_0_BASE_ADDRESS 				0x110
-#define GT_PCI_0SWAPPED_SCS_3_2_BASE_ADDRESS 				0x114
-#define GT_PCI_0SWAPPED_CS_3_BOOTCS_BASE_ADDRESS			0x11C
-#define GT_PCI_1SWAPPED_SCS_1_0_BASE_ADDRESS 				0x0
-#define GT_PCI_1SWAPPED_SCS_3_2_BASE_ADDRESS 				0x0
-#define GT_PCI_1SWAPPED_CS_3_BOOTCS_BASE_ADDRESS			0x0
-
-#endif
diff --git a/kernel/src/platform/erpcn01/linker.lds b/kernel/src/platform/erpcn01/linker.lds
deleted file mode 100644
index 37575040..00000000
--- a/kernel/src/platform/erpcn01/linker.lds
+++ /dev/null
@@ -1,85 +0,0 @@
-/* check ALIGN(4K) before use !!! */
-
-#include INC_GLUE(offsets.h)
-
-ENTRY(_start)
-_start_text_phys	= 0x10000;
-_start_text		= KERNEL_OFFSET + _start_text_phys;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-		*(.base)
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-
-	. = ALIGN(4K);
-	.init _end_text : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-	}
-
-	. = ALIGN(8K);
-	_bootstack_bottom = .;
-	. = . + 8K;
-	_bootstack_top = .;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K) - KERNEL_OFFSET;
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/erpcn01/plat.cc b/kernel/src/platform/erpcn01/plat.cc
deleted file mode 100644
index d01bac03..00000000
--- a/kernel/src/platform/erpcn01/plat.cc
+++ /dev/null
@@ -1,41 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     platform/erpcn01/plat.cc
- * Description:   erpcn01 platform
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: plat.cc,v 1.2 2006/03/01 14:10:32 ud3 Exp $
- *                
- ********************************************************************/
-
-
-extern word_t plat_cpu_freq[1], plat_bus_freq[1];
-
-void SECTION(".init") init_platform(word_t arg)
-{
-    plat_cpu_freq[0] = 200000000ul;
-    plat_bus_freq[0] = 66000000ul;
-}
-
diff --git a/kernel/src/platform/erpcn01/serial.h b/kernel/src/platform/erpcn01/serial.h
deleted file mode 100644
index ab35cbca..00000000
--- a/kernel/src/platform/erpcn01/serial.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     platform/erpcn01/serial.h
- * Description:   Propane serial port defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: serial.h,v 1.4 2003/09/24 19:04:55 skoglund Exp $
- *                
- ********************************************************************/
-/*
- * Carl van Schaik - Openfuel Pty Ltd.
- */
-
-
-/* Serial api definitions */
-
-#ifndef _SERIAL_H_
-#define _SERIAL_H_
-
-#define BAUDRATE_NOT_DEFINED  0
-#define BAUDRATE_075_BPS      1
-#define BAUDRATE_110_BPS      2
-#define BAUDRATE_150_BPS      3
-#define BAUDRATE_300_BPS      4
-#define BAUDRATE_600_BPS      5
-#define BAUDRATE_1200_BPS     6
-#define BAUDRATE_1800_BPS     7
-#define BAUDRATE_2400_BPS     8
-#define BAUDRATE_4800_BPS     9
-#define BAUDRATE_7200_BPS     10
-#define BAUDRATE_9600_BPS     11
-#define BAUDRATE_14400_BPS    12
-#define BAUDRATE_19200_BPS    13
-#define BAUDRATE_38400_BPS    14
-#define BAUDRATE_57600_BPS    15
-#define BAUDRATE_115200_BPS   16
-#define BAUDRATE_230400_BPS   17
-#define BAUDRATE_460800_BPS   18
-#define BAUDRATE_921600_BPS   19
-
-#define SERIAL_DATABITS_5           1
-#define SERIAL_DATABITS_6           2
-#define SERIAL_DATABITS_7           3
-#define SERIAL_DATABITS_8           4
-
-#define SERIAL_PARITY_NONE          1
-#define SERIAL_PARITY_ODD           2
-#define SERIAL_PARITY_EVEN          3
-#define SERIAL_PARITY_MARK          4
-#define SERIAL_PARITY_SPACE         5
-
-#define SERIAL_STOPBITS_10          1
-#define SERIAL_STOPBITS_15          2
-#define SERIAL_STOPBITS_20          3
-
-/* UART structure */
-typedef struct {
-	unsigned int	settings;	/* Masks : 
-									0x000000FF - Baud,
-									0x00000F00 - Databits,
-									0x0000F000 - Parity,
-									0x000F0000 - Stopbits
-								*/
-	int (*change_settings)(unsigned int);
-	int (*read_char)(int);		/* input - '1' - blocking, '0' nonblocking */
-	void (*write_char)(char);
-
-	void (*puts)(char*);
-	int (*gets)(char*, int);
-	int (*data_ready)();
-} serial_uart;
-
-extern serial_uart *uart;
-
-extern serial_uart fpga_uart;
-extern serial_uart puart;
-
-/* Defined in the libraries */
-int mprintf(char *fmt, ...);
-
-#endif
diff --git a/kernel/src/platform/innovator/Makeconf b/kernel/src/platform/innovator/Makeconf
deleted file mode 100644
index 66c2654d..00000000
--- a/kernel/src/platform/innovator/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/platform/innovator/, timer.cc irq.cc plat.cc )
diff --git a/kernel/src/platform/innovator/console.h b/kernel/src/platform/innovator/console.h
deleted file mode 100644
index 2c0d1949..00000000
--- a/kernel/src/platform/innovator/console.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/innovator/console.h
- * Description:   TI Innovator console constants
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.h,v 1.2 2004/06/04 03:27:22 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__INNOVATOR__CONSOLE_H_
-#define __PLATFORM__INNOVATOR__CONSOLE_H_
-
-#include INC_PLAT(reg.h)
-
-#define CONSOLE_PADDR	UART2_BASE   
-
-#endif /* __PLATFORM__INNOVATOR__CONSOLE_H_ */
diff --git a/kernel/src/platform/innovator/intctrl.h b/kernel/src/platform/innovator/intctrl.h
deleted file mode 100644
index 836916ab..00000000
--- a/kernel/src/platform/innovator/intctrl.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/innovator/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: intctrl.h,v 1.2 2004/06/04 03:27:22 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__INNOVATOR__INTCTRL_H__
-#define __PLATFORM__INNOVATOR__INTCTRL_H__
-
-#include INC_CPU(intctrl.h)
-
-#endif /*__PLATFORM__INNOVATOR__INTCTRL_H__ */
diff --git a/kernel/src/platform/innovator/irq.cc b/kernel/src/platform/innovator/irq.cc
deleted file mode 100644
index 0f016ade..00000000
--- a/kernel/src/platform/innovator/irq.cc
+++ /dev/null
@@ -1,96 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/innovator/irq.cc
- * Description:   TI Innovator interrupt demultiplexing 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: irq.cc,v 1.3 2004/08/12 11:15:04 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include <linear_ptab.h>
-#include INC_API(tcb.h)
-#include INC_API(syscalls.h)
-#include INC_API(kernelinterface.h)
-#include INC_ARCH(thread.h)
-#include INC_PLAT(console.h)
-#include INC_GLUE(syscalls.h)
-#include INC_GLUE(intctrl.h)
-#include INC_CPU(cpu.h)
-
-extern "C" void
-arm_irq (arm_irq_context_t * context)
-{
-    word_t irq_code, level, irq_base, irq;
-
-    irq_base = io_to_virt (REG_ARM_IRQHDL1_BASE);
-    irq_code = REG_IRQHDL_IRQ_CODE(irq_base);
-    irq = irq_code;
-
-    if (irq_code == 0)
-    {
-	irq_base = io_to_virt (REG_ARM_IRQHDL2_BASE);
-	irq_code = REG_IRQHDL_IRQ_CODE(irq_base);
-	irq = 32 + irq_code;
-    }
-
-    /* determine whether it is edge triggered or level triggered */
-    level = *((volatile unsigned int *) (irq_base + ILR_BASE +
-			    irq_code * 4)) & 0x2;
-
-    void (*irq_handler) (int, arm_irq_context_t *) =
-	(void (*)(int, arm_irq_context_t *)) interrupt_handlers[irq];
-
-    get_interrupt_ctrl()->mask(irq);
-    if (level)
-    {
-	/* XXX cvansch: I think this should happen before calling the handler? */
-	/* need clear ITR. level trigger will not clear ITR when read IRQ_CODE */
-	irq_handler (irq, context);
-	if (irq >= 32)
-	{
-	    REG_IRQHDL2_CTL |= 1;
-	}
-	REG_IRQHDL_ITR(irq_base) &= ~1;
-	REG_IRQHDL_CTL(irq_base) |= 1;
-    }
-    else /* edge.*/
-    {
-	irq_handler (irq, context);
-	if (irq >= 32)
-	{
-	    REG_IRQHDL2_CTL |= 1;
-	}
-	REG_IRQHDL_ITR(io_to_virt(REG_ARM_IRQHDL1_BASE)) &= ~1;
-	REG_IRQHDL_CTL(io_to_virt(REG_ARM_IRQHDL1_BASE)) |= 1;
-    }
-
-    get_interrupt_ctrl()->unmask(irq);
-}
-
-void intctrl_t::init_arch()
-{
-}
diff --git a/kernel/src/platform/innovator/linker.lds b/kernel/src/platform/innovator/linker.lds
deleted file mode 100644
index 2bc11c90..00000000
--- a/kernel/src/platform/innovator/linker.lds
+++ /dev/null
@@ -1,115 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb/linker.lds
- * Description:   PLEB Linker Script
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: linker.lds,v 1.4 2004/08/21 12:24:25 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_PLAT(offsets.h)
-
-ENTRY(_start)
-_start_text		= VIRT_ADDR_BASE;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-		*(.base)
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-	_end_kip = .;
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	. = ALIGN(32K);
-	_start_data = .;
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.data.kspace)
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-
-	. = ALIGN(4K);
-
-	.init . : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-                *(.init.head)
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-
-		. = ALIGN(4K);
-		_bootstack_bottom = .;
-		. = . + 8K;
-		_bootstack_top = .;
-		_bootstack_top_phys = . - KERNEL_OFFSET;
-	}
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K);
-	/DISCARD/ :
-	{
-/*		*(*)            <-- THIS CAUSES SEGFAULT!!! */
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/innovator/offsets.h b/kernel/src/platform/innovator/offsets.h
deleted file mode 100644
index 2455d435..00000000
--- a/kernel/src/platform/innovator/offsets.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/innovator/offsets.h
- * Description:   Offsets for PLEB
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: offsets.h,v 1.2 2004/06/04 03:27:22 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__INNOVATOR__OFFSETS_H__
-#define __PLATFORM__INNOVATOR__OFFSETS_H__
-
-#define	PHYS_ADDR_BASE		0x10100000
-
-/* These must correspond with glue/v4-arm/config.h */
-/* VIRT_ADDR_BASE must be 0xF0000000 */
-#define	VIRT_ADDR_BASE		0xF0000000
-/* UNCACHED_ADDR_BASE must be 0xF4000000 */
-#define	UNCACHED_ADDR_BASE	0xF4000000
-#define	KERNEL_OFFSET		(VIRT_ADDR_BASE-PHYS_ADDR_BASE)
-#define	UNCACHED_OFFSET		(UNCACHED_ADDR_BASE-PHYS_ADDR_BASE)
-
-#endif /* __PLATFORM__INNOVATOR__OFFSETS_H__ */
diff --git a/kernel/src/platform/innovator/plat.cc b/kernel/src/platform/innovator/plat.cc
deleted file mode 100644
index dc45c2a7..00000000
--- a/kernel/src/platform/innovator/plat.cc
+++ /dev/null
@@ -1,103 +0,0 @@
-/********************************************************************* *                
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/innovator/plat.cc
- * Description:   
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: plat.cc,v 1.3 2004/08/13 10:52:46 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_API(kernelinterface.h)
-#include INC_GLUE(space.h)
-#include INC_PLAT(console.h)
-#include INC_CPU(io.h)
-#include INC_PLAT(reg.h)
-#include INC_ARCH(bootdesc.h)
-
-/* 192k Internal SRAM region. Should be in good use. */
-#define SRAM_START		0x20000000
-#define SRAM_END		0x20030000
-
-/* SDRAM region */
-#define SDRAM_START		0x10000000
-#define SDRAM_END		0x12000000
-
-/* System Reserved Regions, shouldn't be used for any reason. */
-#define RESERVED_1_START	0x02000000
-#define RESERVED_1_END		0x04000000
-#define RESERVED_2_START	0x06000000
-#define RESERVED_2_END		0x08000000
-#define RESERVED_3_START	0x0A000000
-#define RESERVED_3_END		0x0C000000
-#define RESERVED_4_START	0x0E000000
-#define RESERVED_4_END		0x10000000
-#define RESERVED_5_START	0x14000000
-#define RESERVED_5_END		0x20000000
-#define RESERVED_6_START	0x20030000
-#define RESERVED_6_END		0x30000000
-
-/*
- * Initialize the platform specific mappings needed
- * to start the kernel.
- * Add other hardware initialization here as well
- */
-extern "C" void SECTION(".init") init_platform(void)
-{
-    space_t *space = get_kernel_space();
-
-    /* Map peripherals and control registers */
-    space->add_mapping((addr_t)IODEVICE_VADDR, (addr_t)PHYS_CTL_REG_BASE,
-		    pgent_t::size_1m, true, true, true);
-}
-
-/*
- * Platform memory descriptors
- */
-struct arm_bootdesc SECTION(".init.data") platform_memory[] = {
-	{ 0,		SDRAM_START,	memdesc_t::dedicated },
-	{ SDRAM_START,	SDRAM_END,	memdesc_t::conventional },
-	{ SDRAM_END,	0xFFFFFFFF,	memdesc_t::dedicated },
-	{ RESERVED_1_START, RESERVED_1_END,	memdesc_t::reserved },
-	{ RESERVED_2_START, RESERVED_2_END,	memdesc_t::reserved },
-	{ RESERVED_3_START, RESERVED_3_END,	memdesc_t::reserved },
-	{ RESERVED_4_START, RESERVED_4_END,	memdesc_t::reserved },
-	{ RESERVED_5_START, RESERVED_5_END,	memdesc_t::reserved },
-	{ RESERVED_6_START, RESERVED_6_END,	memdesc_t::reserved },
-	{ 0, 0, 0 }
-};
-
-extern "C" struct arm_bootdesc* SECTION(".init") init_platform_mem(void)
-{
-    return (struct arm_bootdesc*)virt_to_phys(&platform_memory);
-}
-
-extern "C" void SECTION(".init") init_cpu_mappings(void)
-{
-}
-
-extern "C" void SECTION(".init") init_cpu(void)
-{
-}
diff --git a/kernel/src/platform/innovator/reg.h b/kernel/src/platform/innovator/reg.h
deleted file mode 100644
index 13dca042..00000000
--- a/kernel/src/platform/innovator/reg.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/innovator/offsets.h
- * Description:   Offsets for TI Innovator
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: reg.h,v 1.2 2004/06/04 03:27:22 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__INNOVATOR__REGS_H__
-#define __PLATFORM__INNOVATOR__REGS_H__
-
-#define SER_UART_REGDELTA	0x4	/* 1 for GP uart, 4 for BT/COM uarts */
-
-#define SER_XTAL	750000
-
-#define UART1_BASE	0xfffb0000	/* Bluetooth UART (UART1) (label="Bluetooth Uart") */
-#define UART2_BASE	0xfffb0800	/* COM UART (UART2) - not on front panel */
-#define UART0_BASE	0xfffce800	/* GP/DSP UART (UART3) (label="modem Uart") */
-
-//#define SER		0
-//#define PAR		1
-
-#define SER_FIFO_ENABLE	0x07
-
-#define SER_RBR		0x00
-#define SER_ISR		0x02
-#define SER_LSR		0x05
-#define SER_MSR		0x06
-#define SER_THR		0x00
-#define SER_DLL		0x00
-#define SER_IER		0x01
-#define SER_DLM		0x01
-#define SER_FCR		0x02
-#define SER_LCR		0x03
-#define SER_MCR		0x04
-#define SER_SCR		0x07
-#define TI_TRIG		0x07
-#define TI_XOFF1	0x06
-#define MODE_DEF	0x08
-#define SER_OSC_12M_SEL	0x13	/* 6.5 divider for UART1 & UART2
-				 * THIS IS INCORRECTLY DOCUMENTED IN
-				 * OMAP1509 TRM (as 0x12 (0x48/4))
-				 */
-
-#define SER_LCR_DLAB 0x80
-#define SER_LSR_THRE 0x20
-#define SER_LSR_BI   0x10
-#define SER_LSR_DR   0x01
-/*
- * Enable receive and transmit FIFOs.
- *
- * FCR<7:6> 00 trigger level = 1 byte
- * FCR<5:4> 00 reserved
- * FCR<3>   0  mode 1 - interrupt on fifo threshold
- * FCR<2>   1  clear xmit fifo
- * FCR<1>   1  clear recv fifo
- * FCR<0>   1  turn on fifo mode
- */
-
-#define WAIT				\
-    asm volatile (			\
-	"mov	r0, #0x1800	\n"	\
-	"subs	r0, r0, #0x1	\n"	\
-	"bne	. - 0x4		\n"	\
-    );
-
-#define OMAP_ARM_CKCTL			0xfffece00
-#define OMAP_ARM_IDLECT1		0xfffece04
-#define OMAP_ARM_IDLECT2		0xfffece08
-#define OMAP_ARM_RSTCT1			0xfffece10
-#define OMAP_ARM_RSTCT2			0xfffece14
-#define OMAP_ARM_SYSST			0xfffece18
-#define OMAP_DPLL1_CTL			0xfffecf00
-#define OMAP_TC_EMIFS_CS0_CONFIG	0xfffecc10
-#define OMAP_TC_EMIFS_CS1_CONFIG	0xfffecc14
-#define OMAP_TC_EMIFS_CS2_CONFIG	0xfffecc18
-#define OMAP_TC_EMIFS_CS3_CONFIG	0xfffecc1c
-#define VAL_ARM_SW_RST			0x0008
-#define VAL_ARM_CKCTL			0x110f
-#define VAL_DPLL1_CTL			0x2710
-#define VAL_TC_EMIFS_CS0_CONFIG		0x002130b0
-#define VAL_TC_EMIFS_CS1_CONFIG		0x0000f559
-#define VAL_TC_EMIFS_CS2_CONFIG		0x000055f0
-#define VAL_TC_EMIFS_CS3_CONFIG		0x00003331
-
-#define REG_OMAP_CKCTL	    *((volatile word_t *) io_to_virt (OMAP_ARM_CKCTL))
-#define REG_OMAP_IDLECT1    *((volatile word_t *) io_to_virt (OMAP_ARM_IDLECT1))
-#define REG_OMAP_IDLECT2    *((volatile word_t *) io_to_virt (OMAP_ARM_IDLECT2))
-
-#endif /* __PLATFORM__INNOVATOR__REGS_H__ */
diff --git a/kernel/src/platform/innovator/timer.cc b/kernel/src/platform/innovator/timer.cc
deleted file mode 100644
index 1f26f4d8..00000000
--- a/kernel/src/platform/innovator/timer.cc
+++ /dev/null
@@ -1,79 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/innovator/timer.cc
- * Description:   Periodic timer handling
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.cc,v 1.3 2004/08/12 11:16:18 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(schedule.h)
-#include INC_GLUE(timer.h)
-#include INC_GLUE(intctrl.h)
-#include INC_PLAT(timer.h)
-#include INC_PLAT(reg.h)
-
-timer_t timer;
-
-extern "C" void
-handle_timer_interrupt (word_t irq, arm_irq_context_t * context)
-{
-    get_current_scheduler ()->handle_timer_interrupt ();
-}
-
-void
-timer_t::init_global (void)
-{
-    UNIMPLEMENTED ();
-}
-
-void
-timer_t::init_cpu (void)
-{
-    /* register irq handler.*/
-    get_interrupt_ctrl ()->register_interrupt_handler (TIMER1_IRQ,
-						       handle_timer_interrupt);
-
-    /* Use externel 12MHz clock.*/
-    REG_OMAP_CKCTL &= ~(1 << 12);
-    /* Allow timers to run while IDLE */
-    REG_OMAP_IDLECT1 &= ~(1 << 9);
-    /* Enable Timer clock */
-    REG_OMAP_IDLECT2 |= (1 << 7);
-
-    /* Using prescale of 16, that gives 1.33us per tick. Autoreload.*/
-    REG_TIMER_CTRL = 0xE;
-
-    /* set 7500 * 1.33 us = 10000us, which is TIMER_TICK_LENGTH.*/
-    REG_TIMER_LOAD = 7500;
-
-    /* enable irq.*/
-    get_interrupt_ctrl ()->unmask (TIMER1_IRQ);
-
-    /* start timer.*/
-    REG_TIMER_CTRL |= 0x21;
-}
diff --git a/kernel/src/platform/innovator/timer.h b/kernel/src/platform/innovator/timer.h
deleted file mode 100644
index ea90e1d1..00000000
--- a/kernel/src/platform/innovator/timer.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/innovator/timer.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.h,v 1.1 2004/08/12 11:00:04 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__INNOVATOR__TIMER_H__
-#define __PLATFORM__INNOVATOR__TIMER_H__
-
-#include INC_CPU(timer.h)
-
-#endif /*__PLATFORM__INNOVATOR__TIMER_H__ */
diff --git a/kernel/src/platform/ixdp425/Makeconf b/kernel/src/platform/ixdp425/Makeconf
deleted file mode 100644
index 687d749f..00000000
--- a/kernel/src/platform/ixdp425/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/platform/ixdp425/, plat.cc timer.cc irq.cc )
diff --git a/kernel/src/platform/ixdp425/cache.h b/kernel/src/platform/ixdp425/cache.h
deleted file mode 100644
index ad0a5033..00000000
--- a/kernel/src/platform/ixdp425/cache.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/ixdp425/cache.h
- * Description:   Platform cache size
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cache.h,v 1.1 2004/12/02 21:56:51 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__IXDP425__CACHE_H_
-#define __PLATFORM__IXDP425__CACHE_H_
-
-#define	    CACHE_SIZE		32*1024
-#define	    CACHE_LINE_SIZE	32
-
-#endif /* __PLATFORM__IXDP425__CACHE_H_ */
diff --git a/kernel/src/platform/ixdp425/console.h b/kernel/src/platform/ixdp425/console.h
deleted file mode 100644
index ee0bc8cd..00000000
--- a/kernel/src/platform/ixdp425/console.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/ixdp425/console.h
- * Description:   Intel IXDP425 console constants
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.h,v 1.3 2004/06/04 02:11:05 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__IXDP425__CONSOLE_H_
-#define __PLATFORM__IXDP425__CONSOLE_H_
-
-#include INC_CPU(cpu.h)
-
-/* Console port */
-#define CONSOLE_OFFSET		0x1000
-
-#endif /* __PLATFORM__IXDP425__CONSOLE_H_ */
diff --git a/kernel/src/platform/ixdp425/intctrl.h b/kernel/src/platform/ixdp425/intctrl.h
deleted file mode 100644
index c750c4f1..00000000
--- a/kernel/src/platform/ixdp425/intctrl.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/ixdp425/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: intctrl.h,v 1.4 2004/12/02 21:56:51 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__IXDP425__INTCTRL_H__
-#define __PLATFORM__IXDP425__INTCTRL_H__
-
-#include <intctrl.h>
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(thread.h)
-#include INC_API(space.h)
-#include INC_PLAT(timer.h)
-#include INC_CPU(cpu.h)
-
-#define IRQS			32
-
-/* Interrupt Controller */
-#define INTERRUPT_OFFSET	0x3000
-#define XSCALE_IRQ_OS_TIMER	5
-
-#define XSCALE_INT		(IODEVICE_VADDR + INTERRUPT_OFFSET)
-
-#define XSCALE_INT_STATUS	(*(volatile word_t *)(XSCALE_INT + 0x00))
-#define XSCALE_INT_ENABLE	(*(volatile word_t *)(XSCALE_INT + 0x04))
-#define XSCALE_INT_SELECT	(*(volatile word_t *)(XSCALE_INT + 0x08))
-#define XSCALE_INT_IRQ_STATUS	(*(volatile word_t *)(XSCALE_INT + 0x0c))
-#define XSCALE_INT_FIQ_STATUS	(*(volatile word_t *)(XSCALE_INT + 0x10))
-#define XSCALE_INT_PRIORITY	(*(volatile word_t *)(XSCALE_INT + 0x14))
-#define XSCALE_INT_IRQ_PRIO	(*(volatile word_t *)(XSCALE_INT + 0x18))
-#define XSCALE_INT_FIQ_PRIO	(*(volatile word_t *)(XSCALE_INT + 0x1c))
-
-extern word_t arm_high_vector; 
-extern word_t interrupt_handlers[IRQS];
-
-class intctrl_t : public generic_intctrl_t {
-
-public:
-    void init_arch();
-    void init_cpu();
-
-    word_t get_number_irqs(void)
-    {
-	return IRQS;
-    }
-
-    void register_interrupt_handler (word_t vector, void (*handler)(word_t,
-            arm_irq_context_t *))
-    {
-        ASSERT(vector < IRQS);
-        interrupt_handlers[vector] = (word_t) handler;
-        TRACE_INIT("interrupt vector[%d] = %p\n", vector, 
-                interrupt_handlers[vector]);
-    }
-
-    static inline void mask(word_t irq)
-    {
-        ASSERT(irq < IRQS);
-        XSCALE_INT_ENABLE &= ~(1 << irq);
-    }
-
-    static inline bool unmask(word_t irq)
-    {
-        ASSERT(irq < IRQS);
-        XSCALE_INT_ENABLE |= (1 << irq);
-        return false;
-    }
-
-    static inline void disable(word_t irq)
-    {  
-        mask(irq);
-    }
-
-    static inline bool enable(word_t irq)
-    {
-        return unmask(irq);
-    }
-
-    void disable_fiq(void)
-    {
-	XSCALE_INT_SELECT = 0x00; /* No FIQs for now */
-    }
-
-    bool is_irq_available(int irq)
-    { 
-	return (irq >= 0) && (irq < IRQS) && (irq != XSCALE_IRQ_OS_TIMER);  
-    }
-
-    void set_cpu(word_t irq, word_t cpu) {}
-
-}; 
-
-#endif /*__PLATFORM__IXDP425__INTCTRL_H__ */
diff --git a/kernel/src/platform/ixdp425/irq.cc b/kernel/src/platform/ixdp425/irq.cc
deleted file mode 100644
index 3de847b6..00000000
--- a/kernel/src/platform/ixdp425/irq.cc
+++ /dev/null
@@ -1,60 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/ixdp425/irq.cc
- * Description:   Xscale ixdp425 platform demultiplexing 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: irq.cc,v 1.3 2004/08/12 11:15:04 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include <linear_ptab.h>
-#include INC_API(tcb.h)
-#include INC_GLUE(intctrl.h)
-#include INC_CPU(cpu.h)
-
-extern "C" void arm_irq(arm_irq_context_t *context)
-{
-    word_t status = XSCALE_INT_IRQ_STATUS;
-
-    /* XXX Use the clz instruction */
-    for (int i = 0; i < IRQS; ++i)
-    {
-	if (status & (1 << i)) {
-	    void (*irq_handler)(int, arm_irq_context_t *) =
-		    (void (*)(int, arm_irq_context_t *))interrupt_handlers[i];
-	   
-	    irq_handler(i, context); 
-	    return;
-	}
-    }
-
-    ASSERT(!"die");
-}
-
-void intctrl_t::init_arch()
-{
-}
diff --git a/kernel/src/platform/ixdp425/linker.lds b/kernel/src/platform/ixdp425/linker.lds
deleted file mode 100644
index fb5d53e7..00000000
--- a/kernel/src/platform/ixdp425/linker.lds
+++ /dev/null
@@ -1,115 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/ixdp425/linker.lds
- * Description:   Intel IXDP425 Linker Script
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: linker.lds,v 1.4 2004/08/21 12:24:27 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_PLAT(offsets.h)
-
-ENTRY(_start)
-_start_text		= VIRT_ADDR_BASE;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-		*(.base)
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-	_end_kip = .;
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	. = ALIGN(32K);
-	_start_data = .;
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.data.kspace)
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-
-	. = ALIGN(4K);
-
-	.init . : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-                *(.init.head)
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-
-		. = ALIGN(4K);
-		_bootstack_bottom = .;
-		. = . + 8K;
-		_bootstack_top = .;
-		_bootstack_top_phys = . - KERNEL_OFFSET;
-	}
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K);
-	/DISCARD/ :
-	{
-/*		*(*)            <-- THIS CAUSES SEGFAULT!!! */
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/ixdp425/offsets.h b/kernel/src/platform/ixdp425/offsets.h
deleted file mode 100644
index 834a7e21..00000000
--- a/kernel/src/platform/ixdp425/offsets.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/ixdp425/offsets.h
- * Description:   Offsets for IXDP425
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: offsets.h,v 1.4 2004/12/02 21:56:51 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__IXDP425__OFFSETS_H__
-#define __PLATFORM__IXDP425__OFFSETS_H__
-
-#define		PHYS_ADDR_BASE		0x00100000
-
-#define		XSCALE_DEV_PHYS		0xc8000000
-
-/* These must correspond with glue/v4-arm/config.h */
-/* VIRT_ADDR_BASE must be 0xF0000000 */
-#define		VIRT_ADDR_BASE		0xF0000000
-/* UNCACHED_ADDR_BASE must be 0xF4000000 */
-#define		UNCACHED_ADDR_BASE	0xF4000000
-#define		KERNEL_OFFSET		(VIRT_ADDR_BASE-PHYS_ADDR_BASE)
-#define		UNCACHED_OFFSET		(UNCACHED_ADDR_BASE-PHYS_ADDR_BASE)
-
-#endif /*__PLATFORM__IXDP425__OFFSETS_H__*/
diff --git a/kernel/src/platform/ixdp425/plat.cc b/kernel/src/platform/ixdp425/plat.cc
deleted file mode 100644
index d204776c..00000000
--- a/kernel/src/platform/ixdp425/plat.cc
+++ /dev/null
@@ -1,85 +0,0 @@
-/********************************************************************* *                
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/ixdp425/plat.cc
- * Description:   
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: plat.cc,v 1.4 2004/08/13 10:52:46 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_API(kernelinterface.h)
-#include INC_GLUE(space.h)
-#include INC_PLAT(console.h)
-#include INC_PLAT(timer.h)
-#include INC_CPU(cpu.h)
-#include INC_ARCH(bootdesc.h)
-
-// XXX FIXME
-#define RAM_START    0x00000000
-#define RAM_END      0x10000000
-
-/*
- * Initialize the platform specific mappings needed
- * to start the kernel.
- * Add other hardware initialization here as well
- */
-extern "C" void SECTION(".init") init_platform(void)
-{
-    space_t *space = get_kernel_space();
-
-    /* Map in the control registers */
-    space->add_mapping((addr_t)IODEVICE_VADDR, (addr_t)XSCALE_DEV_PHYS,
-		    pgent_t::size_64k, true, true, true);
-}
-
-/*
- * Platform memory descriptors
- */
-struct arm_bootdesc SECTION(".init.data") platform_memory[] = {
-	{ RAM_START,	RAM_END,	memdesc_t::conventional },
-	/* PCI Data + Expansion Bus + Queue Manager */
-	{ 0x48000000, 	0x64000000,	memdesc_t::dedicated },	
-	/* PCI Controller Config/Status + Expansion Bus Config/Status + IO Devices */
-	{ 0xC0000000, 	0xC800C000,	memdesc_t::dedicated },	
-	/* SDRAM Config */
-	{ 0xCC000000, 	0xCC000100,	memdesc_t::dedicated },	
-	{ 0, 0, 0 }
-};
-
-extern "C" struct arm_bootdesc* SECTION(".init") init_platform_mem(void)
-{
-    return (struct arm_bootdesc*)virt_to_phys(&platform_memory);
-}
-
-extern "C" void SECTION(".init") init_cpu_mappings(void)
-{
-}
-
-extern "C" void SECTION(".init") init_cpu(void)
-{
-    arm_cache::cache_invalidate_d();
-    arm_cache::tlb_flush();
-}
diff --git a/kernel/src/platform/ixdp425/timer.cc b/kernel/src/platform/ixdp425/timer.cc
deleted file mode 100644
index b6e2e473..00000000
--- a/kernel/src/platform/ixdp425/timer.cc
+++ /dev/null
@@ -1,62 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/ixdp425/timer.cc
- * Description:   Periodic timer handling
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.cc,v 1.4 2005/01/12 02:51:17 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(schedule.h)
-#include INC_GLUE(timer.h)
-#include INC_GLUE(intctrl.h)
-#include INC_PLAT(timer.h)
-
-timer_t timer;
-
-extern "C" void handle_timer_interrupt(word_t irq, arm_irq_context_t *context)
-{
-    XSCALE_OS_TIMER_STATUS = 0x01;  /* Clear timer */
-
-    get_current_scheduler()->handle_timer_interrupt();
-}
-
-SECTION(".init") void timer_t::init_global(void)
-{
-    UNIMPLEMENTED();
-}
-
-SECTION(".init") void timer_t::init_cpu(void)
-{
-    get_interrupt_ctrl()->register_interrupt_handler(XSCALE_IRQ_OS_TIMER, 
-            handle_timer_interrupt);
-
-    XSCALE_OS_TIMER_STATUS = 0xff;
-    XSCALE_OS_TIMER_RELOAD = ((TIMER_PERIOD) & (~2ul)) | 1;
-
-    get_interrupt_ctrl()->unmask(XSCALE_IRQ_OS_TIMER);
-}
diff --git a/kernel/src/platform/ixdp425/timer.h b/kernel/src/platform/ixdp425/timer.h
deleted file mode 100644
index 047cec4c..00000000
--- a/kernel/src/platform/ixdp425/timer.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/ixp425/timer.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.h,v 1.2 2004/12/02 21:56:51 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__IXP425__TIMER_H__
-#define __PLATFORM__IXP425__TIMER_H__
-
-/* IXP400 Timer */
-#define TIMER_TICK_LENGTH	10000
-#define TIMER_OFFSET		0x5000
-
-#define TIMER_MAX_RATE          66660000
-#define TIMER_PERIOD            (TIMER_MAX_RATE/100)
-
-
-#if !defined(ASSEMBLY)
-
-#include INC_CPU(cpu.h)
-
-#define XSCALE_TIMERS		(IODEVICE_VADDR + TIMER_OFFSET)
-
-#define XSCALE_OS_TIMER		(*(volatile word_t *)(XSCALE_TIMERS + 0x04))
-#define XSCALE_OS_TIMER_RELOAD	(*(volatile word_t *)(XSCALE_TIMERS + 0x08))
-#define XSCALE_OS_TIMER_STATUS	(*(volatile word_t *)(XSCALE_TIMERS + 0x20))
-
-#define XSCALE_WATCHDOG_TIMER   (*(volatile word_t *)(XSCALE_TIMERS + 0x14))
-#define XSCALE_WATCHDOG_EN      (*(volatile word_t *)(XSCALE_TIMERS + 0x18))
-#define XSCALE_WATCHDOG_KEY     (*(volatile word_t *)(XSCALE_TIMERS + 0x1c))
-
-#endif
-
-#endif /*__PLATFORM__IXP425__TIMER_H__ */
diff --git a/kernel/src/platform/malta/Makeconf b/kernel/src/platform/malta/Makeconf
deleted file mode 100644
index ae46301e..00000000
--- a/kernel/src/platform/malta/Makeconf
+++ /dev/null
@@ -1,32 +0,0 @@
-######################################################################
-##                
-## Copyright (C) 2006,  Karlsruhe University
-##                
-## File path:     platform/malta/Makeconf
-## Description:   
-##                
-## Redistribution and use in source and binary forms, with or without
-## modification, are permitted provided that the following conditions
-## are met:
-## 1. Redistributions of source code must retain the above copyright
-##    notice, this list of conditions and the following disclaimer.
-## 2. Redistributions in binary form must reproduce the above copyright
-##    notice, this list of conditions and the following disclaimer in the
-##    documentation and/or other materials provided with the distribution.
-## 
-## THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-## ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-## IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-## ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-## FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-## DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-## OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-## LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-## OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-## SUCH DAMAGE.
-##                
-## $Id: Makeconf,v 1.1 2006/02/23 21:07:48 ud3 Exp $
-##                
-######################################################################
-
diff --git a/kernel/src/platform/malta/linker.lds b/kernel/src/platform/malta/linker.lds
deleted file mode 100644
index 024673b0..00000000
--- a/kernel/src/platform/malta/linker.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     platform/malta/linker.lds
- * Description:   Linker script for the Malta platform (mips32)
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: linker.lds,v 1.2 2006/10/27 17:34:57 reichelt Exp $
- *                
- ********************************************************************/
-
-
-ENTRY(_start)
-
-KERNEL_OFFSET = 0;
-
-/* 0x0 - 0x400 = exception vectors */
-_start_text_phys	= 0xA0000400; 
-
-_start_text		= KERNEL_OFFSET + _start_text_phys;
-
-SECTIONS
-{
-	.text _start_text : 
-	{
-		. = ALIGN(0x100);
-		*(.text.startup)
-		*(.text)
-		*(.base)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.rodata . :
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : 
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	.data . :
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.sbss)
-		*(.bss)
-	}
-
-	.kdebug . :
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-
-		.sets . :
-        {
-                . = ALIGN(16);
-                _start_setlist = .;
-                *(.setlist)
-                _end_setlist = .;
-                . = ALIGN(16);
-                _start_sets = .;
-                *(SORT(set_*))
-                _end_sets = .;
-        }
-
-	_end_text = ALIGN(4K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-
-	. = ALIGN(4K);
-	.init _end_text :
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-	}
-
-	. = ALIGN(8K);
-	_bootstack_bottom = .;
-	. = . + 8K;
-	_bootstack_top = .;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K) - KERNEL_OFFSET;
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/malta/malta.h b/kernel/src/platform/malta/malta.h
deleted file mode 100644
index 996218d5..00000000
--- a/kernel/src/platform/malta/malta.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     platform/malta/malta.h
- * Description:   Malta platform definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: malta.h,v 1.1 2006/02/23 21:07:42 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__MALTA__MALTA_H__
-#define __PLATFORM__MALTA__MALTA_H__
-
-#define MALTA_BASE          0xbf000000
-#define MALTA_DISPLAY_BASE  0xbf000400
-
-#define MALTA_LEDBAR      0x08
-#define MALTA_ASCIIWORD   0x10
-#define MALTA_ASCII_POS0  0x18
-#define MALTA_ASCII_POS1  0x20
-#define MALTA_ASCII_POS2  0x28
-#define MALTA_ASCII_POS3  0x30
-#define MALTA_ASCII_POS4  0x38
-#define MALTA_ASCII_POS5  0x40
-#define MALTA_ASCII_POS6  0x48
-#define MALTA_ASCII_POS7  0x50
-
-#endif /* !__PLATFORM__MALTA__MALTA_H__ */
diff --git a/kernel/src/platform/miata/82C59.h b/kernel/src/platform/miata/82C59.h
deleted file mode 100644
index edae8d90..00000000
--- a/kernel/src/platform/miata/82C59.h
+++ /dev/null
@@ -1,160 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     platform/miata/82C59.h
- * Description:   implementation for the 2 cascaded 82C59 PICs
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: 82C59.h,v 1.5 2003/10/19 06:15:22 sjw Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__MIATA__82C59_H__
-#define __PLATFORM__MIATA__82C59_H__
-
-#include INC_ARCH(devspace.h)
-
-class PIC82C59_t {
- private:
-    /* one for primary, one for secondary */
-    u8_t mask[2];
-    u8_t level[2];
-
- public:
-    enum trigger_e {
-	IST_EDGE = 0,
-	IST_LEVEL = 1
-    };
-
-    enum addrs_e {
-	ICU_LEN = 16,
-	IO_ICU0 = 0x020,
-	IO_ICU1 = 0x0A0,
-	IO_ICU_SIZE = 2,
-	IO_ELCR = 0x4D0,
-	IO_ELCR_SIZE = 2
-    };
-
-    void init() {
-	/* All are initially edge */
-	level[0] = 0;
-	level[1] = 0;
-
-	/* This may not always be necessary, but it can't hurt:
-	 * Initialise primary controller.
-	 */
-	
-	/* Write an initialise command (bit 4 for ICW select, bit 0 for ICW4 Write Required), */
-	devspace_t::outb(IO_ICU0, 1 << 4 | 1);
-	
-	/* Write ICW2: 0 (not sure what Interrupt Vector Base Address should be) */
-	devspace_t::outb(IO_ICU0 + 1, 0);
-
-	/* Write ICW3: set cascade mode (bit 2) */
-	devspace_t::outb(IO_ICU0 + 1, 1 << 2);
-
-	/* Write ICW4: set bit 0, Microprocessor Mode (???) */
-	devspace_t::outb(IO_ICU0 + 1, 1);
-	
-	/* Initialise the secondary controller */
-	
-	/* Write an initialise command (bit 4 for ICW select, bit 0 for ICW4 Write Required), */
-	devspace_t::outb(IO_ICU1, 1 << 4 | 1);
-	
-	/* Write ICW2: 0 (not sure what Interrupt Vector Base Address should be) */
-	devspace_t::outb(IO_ICU1 + 1, 0);
-
-	/* Write ICW3: set slave id code (??) */
-	devspace_t::outb(IO_ICU1 + 1, 1 << 1);
-
-	/* Write ICW4: set bit 0, Microprocessor Mode (???) */
-	devspace_t::outb(IO_ICU1 + 1, 1);
-
-	mask[0] = (u8_t) ~0;
-	mask[1] = (u8_t) ~0;
-
-	printf("Mask is 0x%x 0x%x\n", mask[0], mask[1]);
-
-	/* Mask all interrupts */
-	devspace_t::outb(IO_ICU0 + 1, mask[0]);
-	devspace_t::outb(IO_ICU1 + 1, mask[1]);
-	
-	/* unmask the cascade */
-	enable(2);
-    }
-
-    void set_trigger(int irq, enum trigger_e trigger) {
-	int ctrl = irq / 8;
-	int bit = irq % 8;
-
-	if(trigger == IST_LEVEL)
-	    level[irq] |= (1 << bit);
-	else
-	    level[irq] &= ~(1 << bit);
-	
-	devspace_t::outb(IO_ELCR + ctrl, level[irq]);
-    }
-
-    /* I prefer this terminology to mask and unmask --- they can be ambiguous */
-    void enable(int irq) {
-	if(irq < 8) {
-	    mask[0] &= ~(1 << irq);
-	    devspace_t::outb(IO_ICU0 + 1, mask[0]);
-	} else {
-	    mask[1] &= ~(1 << (irq - 8));
-	    devspace_t::outb(IO_ICU1 + 1, mask[1]);
-	}
-    }
-
-    void disable(int irq) {
-	if(irq < 8) {
-	    mask[0] |= (1 << irq);
-	    devspace_t::outb(IO_ICU0 + 1, mask[0]);
-	} else {
-	    mask[1] |= (1 << (irq - 8));
-	    devspace_t::outb(IO_ICU1 + 1, mask[1]);
-	}
-    }
-
-    void ack(int irq) {
-	if(irq > 7) 
-	    devspace_t::outb(IO_ICU1, (0x3 << 5) | irq - 8);
-
-	/* ack int or cascade int */
-	devspace_t::outb(IO_ICU0, (0x3 << 5) | (irq > 7 ? 2 : irq));
-    }
-
-    void print_status(void) {
-	word_t mask = 0;
-	word_t req = 0;
-
-	mask = devspace_t::inb(IO_ICU0 + 1) | (devspace_t::inb(IO_ICU1 + 1) << 8);
-	req = devspace_t::inb(IO_ICU0) | (devspace_t::inb(IO_ICU1) << 8);
-	
-	printf("82C59:\n");
-	printf("\tMask:    0x%x\n", mask);
-	printf("\tRequest: 0x%x\n", req);
-    }
-};
-
-#endif /* !__PLATFORM__MIATA__82C59_H__ */
diff --git a/kernel/src/platform/miata/devspace.h b/kernel/src/platform/miata/devspace.h
deleted file mode 100644
index 09e52fa5..00000000
--- a/kernel/src/platform/miata/devspace.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     platform/miata/devspace.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: devspace.h,v 1.3 2003/09/24 19:04:56 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM_DEVSPACE_H__
-#define __PLATFORM_DEVSPACE_H__
-
-#include INC_ARCH(page.h)
-
-class devspace_t {
- private:
-    /* Various PCI spaces */
-    enum pci_space {
-	PCI_SPARSE_OFFSET = (AS_KSEG_START + 0x8000000000ull),
-	PCI_IO_OFFSET = (AS_KSEG_START + 0x8580000000ull),
-	PCI_DENSE_OFFSET = (AS_KSEG_START + 0x8600000000ull)
-    };
-
-    /* sjw (28/01/2003): Hopefully these will be optimised away */
-    
-    /* we don't support tri-bytes, so don't ask.  Will break for 64bit */
-     __inline__ static word_t mk_cpu_addr(word_t space, word_t pci_addr, int nbytes) {
-	word_t size = ((nbytes - 1) & 0x3) << 3;
-	return space | (pci_addr << 5) | size;
-    }
-
-     __inline__ static u8_t extbl(u32_t data, int offset) {
-	u8_t ret;
-	__asm__ ("extbl %2,%1,%0" : "=r"(ret) : "rI"(offset), "r"(data));
-	return ret;
-    }
-
-     __inline__ static u32_t insbl(u8_t data, int offset) {
-	u32_t ret;
-	__asm__ ("insbl %2,%1,%0" : "=r"(ret) : "rI"(offset), "r"(data));
-	return ret;
-    }
-
- public:
-    __inline__ static void mb() {
-	__asm__ __volatile__("mb": : :"memory");
-    }
-
-    /* Reads a byte from PCI space */
-    __inline__ static u8_t read8(word_t pci_addr) {
-	volatile u32_t *addr = 
-	    (volatile u32_t *) mk_cpu_addr(PCI_SPARSE_OFFSET, pci_addr, 1);
-
-	mb();
-	return extbl(*addr, pci_addr & 0x3);
-    }
-
-    __inline__ static void write8(word_t pci_addr, u8_t data) {
-	volatile u32_t *addr = 
-	    (volatile u32_t *) mk_cpu_addr(PCI_SPARSE_OFFSET, pci_addr, 1);
-
-	*addr = insbl(data, pci_addr & 0x3);
-	mb();
-    }
-
-
-    __inline__ static u8_t dense_read8(word_t pci_addr) {
-	volatile u8_t *val = (volatile u8_t *) (PCI_DENSE_OFFSET + pci_addr);
-
-	return *val;
-    }
-
-    __inline__ static void dense_write8(word_t pci_addr, u8_t data) {
-	volatile u8_t *val = (volatile u8_t *) (PCI_DENSE_OFFSET + pci_addr);
-
-	*val = data;
-    }
-
-    /* Reads a quadword from PCI space */
-    __inline__ static u8_t read64(u32_t pci_addr) {
-	volatile u64_t *addr = 
-	    (volatile u64_t *) mk_cpu_addr(PCI_SPARSE_OFFSET, pci_addr, 1);
-
-	mb();
-	return *addr;
-    }
-
-    __inline__ static void write64(word_t pci_addr, u64_t data) {
-	volatile u32_t *addr = 
-	    (volatile u32_t *) mk_cpu_addr(PCI_SPARSE_OFFSET, pci_addr, 1);
-
-	*addr = data;	
-	mb();
-    }
-
-    /* sjw (28/01/2003): Is this correct? */
-    /* ISA/IO-space compat. methods */
-    __inline__ static u8_t inb(int port) {
-	volatile u32_t *addr = 
-	    (volatile u32_t *) mk_cpu_addr(PCI_IO_OFFSET, port, 1);
-	
-	mb();
-	return extbl(*addr, port & 0x3); 
-    }
-
-
-    /* sjw (28/01/2003): Is this correct? */
-    /* ISA/IO-space compat. methods */
-    __inline__ static void outb(int port, u8_t data) {
-	volatile u32_t *addr = 
-	    (volatile u32_t *) mk_cpu_addr(PCI_IO_OFFSET, port, 1);
-
-	*addr = insbl(data, port & 0x3);
-	mb();
-    }
-};
-
-
-#endif /* __PLATFORM_DEVSPACE_H__ */
diff --git a/kernel/src/platform/miata/intctrl.h b/kernel/src/platform/miata/intctrl.h
deleted file mode 100644
index 647af914..00000000
--- a/kernel/src/platform/miata/intctrl.h
+++ /dev/null
@@ -1,173 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     platform/miata/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.8 2003/10/19 06:15:22 sjw Exp $
- *                
- ********************************************************************/
-
-
-#ifndef __PLATFORM__INTCTRL_H_
-#define __PLATFORM__INTCTRL_H_
-
-#include INC_ARCH(intctrl.h)
-#include INC_PLAT(82C59.h)
-
-/* sjw (29/01/2003): Yuck */
-#define PYXIS_IRQ_MASK (AS_KSEG_START + 0x87A0000040ull)
-#define PYXIS_IRQ_REQ  (AS_KSEG_START + 0x87A0000000ull)
-
-#define	NUM_SPECIAL_IRQS  8
-#define	NUM_ISA_IRQS  16
-#define	NUM_PCI_IRQS  32
-#define	NUM_IRQS  (NUM_SPECIAL_IRQS + NUM_ISA_IRQS + NUM_PCI_IRQS)
-
-#define	BASE_SPECIAL_IRQ  0
-#define	BASE_ISA_IRQ (NUM_SPECIAL_IRQS + BASE_SPECIAL_IRQ)
-#define	BASE_PCI_IRQ (NUM_ISA_IRQS + BASE_ISA_IRQ)
-	
-#define	PYXIS_PCI_OFFSET 8
-
-#define	MCHECK_IRQ  2
-#define PERF_IRQ    4
-#define RTC_IRQ     (0 + BASE_PCI_IRQ)
-
-class intctrl_t : public alpha_intctrl_t {
- private:
-
-    word_t cached_irq_mask;
-    PIC82C59_t sio;
-
- public:
-    word_t get_number_irqs(void) 
-	{ return NUM_IRQS; }
-
-    bool is_irq_available(int irq) 
-	{ return irq < NUM_IRQS && (irq >= BASE_ISA_IRQ || irq == MCHECK_IRQ || irq == PERF_IRQ); }
-
-    void set_cpu(word_t irq, word_t cpu) {}
-
-    word_t decode_irq(word_t irq) {
-	word_t ret = 0;
-
-	if (irq >= 0x800) {
-	    ret = NUM_SPECIAL_IRQS + ((irq - 0x800) >> 4);
-	} else {
-	    printf("Got a weird device interrupt (vector 0x%lx)\n", irq);
-	    enter_kdebug("Weird int");
-	}
-	
-	return ret;
-    }
-
-    void mask(word_t irq) {
-	volatile word_t *irq_mask = (word_t *) PYXIS_IRQ_MASK;
-
-	if (irq >= BASE_PCI_IRQ) {
-	    /* PCI Interrupt */
-	    cached_irq_mask &= ~ (1 << (irq - BASE_PCI_IRQ + PYXIS_PCI_OFFSET));
-	    *irq_mask = cached_irq_mask;
-
-	} else if (irq >= BASE_ISA_IRQ) {
-	    /* ISA Interrupt */
-	    sio.disable(irq - BASE_ISA_IRQ);
-	    sio.ack(irq - BASE_ISA_IRQ);
-	} else {
-	    /* `Special' interrupt */
-	}
-    }
-
-    bool unmask(word_t irq) {
-	volatile word_t * irq_mask = (word_t *) PYXIS_IRQ_MASK;
-
-	if (irq >= BASE_PCI_IRQ) {
-	    /* PCI Interrupt */
-	    cached_irq_mask |= (1 << (irq - BASE_PCI_IRQ + PYXIS_PCI_OFFSET));
-	    *irq_mask = cached_irq_mask;
-
-	} else if (irq >= BASE_ISA_IRQ) {
-	    sio.enable(irq - BASE_ISA_IRQ);
-	    sio.ack(irq - BASE_ISA_IRQ);
-	    /* ISA Interrupt */
-	} else {
-	    /* `Special' interrupt */
-	}
-
-	/* sjw (11/04/2003): HACK */
-	return false;
-    }
-
-    void enable(word_t irq) {
-	unmask(irq);
-    }
-
-    bool disable(word_t irq) {
-	mask(irq);
-	return false;
-    }
-
-    void ack(word_t irq) {
-	volatile word_t * irq_req = (volatile word_t *) PYXIS_IRQ_REQ;
-
-	if (irq >= BASE_PCI_IRQ) {
-	    /* PCI Interrupt */
-	    *irq_req = (1ull << (irq - BASE_PCI_IRQ + PYXIS_PCI_OFFSET));
-
-	} else if (irq >= BASE_ISA_IRQ) {
-	    sio.ack(irq - BASE_ISA_IRQ);
-	    /* ISA Interrupt */
-	} else {
-	    /* `Special' interrupt */
-	}
-    }
-
-    void init_arch() {
-	volatile word_t * irq_mask = (volatile word_t *) PYXIS_IRQ_MASK;
-	volatile word_t * irq_req = (volatile word_t *) PYXIS_IRQ_REQ;
-	
-	sio.init();
-
-	/* Ack pending */
-	*irq_req = ~0ull;
-
-	cached_irq_mask =  *irq_mask;
-    }
-
-    void init_cpu() {}
-
-    void print_status(void) {
-	sio.print_status(); 
-	printf("PYXIS:\n");
-	printf("\tMask:     0x%08lx\n", *(volatile word_t *) PYXIS_IRQ_MASK);
-	printf("\tRequest:  0x%08lx\n", *(volatile word_t *) PYXIS_IRQ_REQ);
-	printf("\tActual:   0x%08lx\n", *(volatile word_t *) PYXIS_IRQ_MASK & *(volatile word_t *) PYXIS_IRQ_REQ);
-    }
-};
-
-
-
-#endif /* __PLATFORM__INTCTRL_H__ */
diff --git a/kernel/src/platform/miata/linker.lds b/kernel/src/platform/miata/linker.lds
deleted file mode 100644
index 9e6aed2a..00000000
--- a/kernel/src/platform/miata/linker.lds
+++ /dev/null
@@ -1,2 +0,0 @@
-
-#include INC_ARCH(linker.lds)
diff --git a/kernel/src/platform/multia/linker.lds b/kernel/src/platform/multia/linker.lds
deleted file mode 100644
index e4ddbcea..00000000
--- a/kernel/src/platform/multia/linker.lds
+++ /dev/null
@@ -1,96 +0,0 @@
-/* check ALIGN(4K) before use !!! */
-
-OUTPUT_FORMAT("elf64-alpha")
-
-/* Evil */
-#include INC_API(config.h)
-
-ENTRY(_start)
-#if 1
-#if CONFIG_ALPHA_ADDRESS_BITS == 43
-_start_text = (0xfffffc0000000000 + CONFIG_ALPHA_CONSOLE_RESERVE);
-#else
-_start_text = (0xffff800000000000 + CONFIG_ALPHA_CONSOLE_RESERVE);
-#endif /* CONFIG_ALPHA_ADDRESS_BITS */
-#endif
-
-BOOTMEM_SIZE	= 1024K;
-KERNEL_OFFSET   = 0;
-
-SECTIONS
-{
-	_start_image = _start_text;
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-	.got : AT (ADDR(.got) - KERNEL_OFFSET)
-	{
-		*(.got) *(.got.plt)
-	}
-	. = ALIGN(8K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		*(.user.*)
-	}
-	. = ALIGN(8K);
-
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.sbss) 
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(8K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-
-	. = ALIGN(8K);
-	_start_bootmem = .;
-	_start_bootmem_phys = _start_bootmem - KERNEL_OFFSET;
-	. = . + BOOTMEM_SIZE;
-	_end_bootmem = .;
-	_end_bootmem_phys = _end_bootmem - KERNEL_OFFSET;
-
-	.init _end_bootmem : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-	}
-
-	. = ALIGN(8K);
-	_bootstack_bottom = .;
-	. = . + 8K;
-	_bootstack_top = .;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-	_end_image = .;
-}
diff --git a/kernel/src/platform/ofsparc64/Makeconf b/kernel/src/platform/ofsparc64/Makeconf
deleted file mode 100644
index 3fb527c7..00000000
--- a/kernel/src/platform/ofsparc64/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/platform/ofsparc64/, init.cc head.S)
diff --git a/kernel/src/platform/ofsparc64/head.S b/kernel/src/platform/ofsparc64/head.S
deleted file mode 100644
index e8474eb8..00000000
--- a/kernel/src/platform/ofsparc64/head.S
+++ /dev/null
@@ -1,131 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004, University of New South Wales
- *                
- * File path:    platform/ofsparc64/head.S
- * Description:  Kernel entry point for Open Firmware (OpenBoot)
- *               based SPARC v9 systems.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: head.S,v 1.6 2004/07/01 04:10:51 philipd Exp $
- *                
- ********************************************************************/
-
-#include INC_ARCH(asm.h)
-#include INC_ARCH(asi.h)
-#include INC_ARCH(registers.h)
-	
-/**************
-* Entry point *
-**************/
-
-/**
- *  Assume that we have a one-to-one mapping of memory from 0x0 up.
- */
-BEGIN_PROC(_start, .boot)
-
-	/* Clean up the register file */
-	flushw
-	
-	/* Fault in stack via firmware. */
-	setx	_bootstack_bottom, %g6, %g7
-	stx	%g0, [%g7]
-	setx	_bootstack_top, %g6, %g7
-	stx	%g0, [%g7]
-
-	/* Take over from firmware. */
-	mov	(PSTATE_TSO | PSTATE_PRIV), %g7
-	wrpr	%g7, %pstate			! Set processor state.
-	setx	ttable, %g6, %g7
-	wrpr	%g7, %tba			! Set trap table base address.
-	wrpr	0x1, %tl			! Set trap level (TL = 1).
-
-	/* Setup register windows. */
-	wrpr	0x0, %cwp			! First reg window is current.
-	wrpr	(NWINDOWS - 2), %cansave	! All windows avaliable.
-	wrpr	0x0, %canrestore		! Start of stack.
-	wrpr	0x0, %otherwin			! No other address spaces.
-	wrpr	(NWINDOWS - 2), %cleanwin	! All windows clean.
-	wrpr	0x0, %wstate			! Use spill/fill handlers '0'.
-
-	/* Setup boot stack. */
-	setx	_bootstack_top, %g7, %sp		 
-	sub	%sp, STACK_BIAS_64BIT, %sp	! Setup biased stack top.
-	sub	%sp, STACK_FRAME_64BIT, %sp	! Allocate a frame for _start.
-	mov	0, %fp				! Previous frame is invalid.
-	
-	/* Call platform init code. */
-	call	ofsparc64_init
-	 nop	
-
-	/* Setup kernel stack. */
-	setx	_init_stack_top, %g7, %sp	! Setup initial (pinned) stack 
-	sub	%sp, STACK_BIAS_64BIT, %sp	! Setup biased stack top.
-	sub	%sp, STACK_FRAME_64BIT, %sp	! Allocate a frame for _start.
-	
-	/* Start kernel - Long jump. */
-	setx	startup_system, %g6, %g7
-	call	%g7
-	 nop	
-
-	/* Shouldn't get here. */
-	sir	0x0
-
-/* END_PROC(_start) */
-
-#warning awiggins (12-09-03): putc_boot needs to be removed from this file!
-/**
- *  Startup debugging.
- */
-BEGIN_PROC(putc_boot, .boot)
-	setx	0x1FFF1400000, %g6, %g7	! Serial port base address
-/* Check if TX buffer has space. */
-1:	mov	0x60, %g6		! Channel B status register
-	lduba	[%g7 + %g6] ASI_PHYS_BYPASS_EC_E_L, %g6
-	btst	(1 << 6), %g6		! Test XFW bit 
-	bz	1b
-	 nop
-/* Poll ready to give command. */
-	btst	(1 << 2), %g6		! Test CEC bit
-	bnz	1b
-	 nop
-/* Put charactor. */
-	mov	0x40, %g6		! Channel B transmit FIFO
-	stba	%o0, [%g7 + %g6] ASI_PHYS_BYPASS_EC_E_L
-	mov	0x60, %g6		! Channel B control register
-	mov	(1 << 3), %o0		! XF, ie transmit
-	retl
-	 stba	%o0, [%g7 + %g6] ASI_PHYS_BYPASS_EC_E_L
-
-/* END_PROC(putc_boot) */
-
-#define		INIT_STACK_SIZE		8192
-
-/* Initial stack (separate from bootstack, which is used before
- * the kernel's pinned mapping is established) */
-.section ".init.data"
-	.align 16
-_init_stack_bottom:
-	.space	(INIT_STACK_SIZE)
-_init_stack_top:
-
diff --git a/kernel/src/platform/ofsparc64/init.cc b/kernel/src/platform/ofsparc64/init.cc
deleted file mode 100644
index 6eed3e8e..00000000
--- a/kernel/src/platform/ofsparc64/init.cc
+++ /dev/null
@@ -1,117 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003, University of New South Wales
- *                
- * File path:    platform/ofsparc64/init.cc
- * Description:  Kernel initialisation for Open Firmware (OpenBoot)
- *               based SPARC v9 systems.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: init.cc,v 1.5 2004/05/21 03:59:24 philipd Exp $
- *                
- ********************************************************************/
-
-#include <kmemory.h>
-#include INC_API(kernelinterface.h)
-#include INC_CPU(tlb.h)
-#include INC_ARCH(asi.h)
-#include INC_GLUE(hwspace.h)
-
-extern word_t _start_text[];
-
-word_t plat_bus_freq;
-word_t plat_cpu_freq;
-
-extern "C" void SECTION(".boot")
-ofsparc64_init(void)
-{
-    /**
-     *  Load locked mappings for kernel pages.
-     */
-    hw_asid_t asid = NUCLEUS_CONTEXT;
-    tlb_t tlb_entry;
-
-    /**
-     *  check the first memory descriptor to work out where the kernel BOOTPAGE
-     *  is located in physical memory.
-     */
-    extern kernel_interface_page_t kip_laddr[];
-    memdesc_t * memdesc =
-	(memdesc_t *)((word_t)kip_laddr + (word_t)(kip_laddr->memory_info.memdesc_ptr));
-    addr_t base_paddr = memdesc->low();
-
-    tlb_entry.clear();
-    tlb_entry.set_asid(asid);
-    tlb_entry.set_va(_start_text);
-    tlb_entry.set_writable(true);
-    tlb_entry.set_privileged(true);
-    tlb_entry.set_lock(true);
-    tlb_entry.set_valid(true);
-    tlb_entry.set_size(tlb_t::BOOTPAGE_PGSIZE);
-    tlb_entry.set_cache_attrib(tlb_t::cache_vir);
-    tlb_entry.set_pa(base_paddr);
-
-    /* Add kernel data/code BOOTPAGE mappings. */
-    tlb_entry.set(TLB_KERNEL_LOCKED, tlb_t::all_tlb);
-
-    /**
-     *  Setup cpu and bus frequencies from open firmware. 
-     */
-#warning philipd (02/02/04) XXX: hardcoded for the ultra 10
-    plat_bus_freq = 100000000; /* root node, property "clock-frequency" */
-    plat_cpu_freq = 300000000; /* cpu device node, property "clock-frequency" */
-} // init_ofsparc64()
-
-/**
- *  init_bootmem()
- *  Initialises kip memory descriptors for memory at boot time.
- *  returns true if more bootmem needs to be added to kmem.
- */
-bool SECTION(".init")
-init_bootmem(void)
-{
-    bool more_bootmem = 0;
-    word_t bootmem_size = CONFIG_BOOTMEM_PAGES << SPARC64_PAGE_BITS;
-    extern word_t _end_init[];
-    addr_t start_bootmem = _end_init;
-    addr_t end_bootmem;
-
-    /**
-     *  Feed kernel memory allocator initial memory.
-     */
-
-    if(bootmem_size > BOOTPAGE_SIZE) { // Only BOOTPAGE is mapped at this point.
-	more_bootmem = 1;
-	bootmem_size = BOOTPAGE_SIZE;
-    }
-
-    end_bootmem = addr_offset(_start_text, bootmem_size);
-    kmem.init(start_bootmem, end_bootmem);
-
-    /**
-     *  Setup additional memory descriptors. Loader has set up some already.
-     */
-
-    return more_bootmem;
-
-} // init_bootmem()
diff --git a/kernel/src/platform/ofsparc64/linker.lds b/kernel/src/platform/ofsparc64/linker.lds
deleted file mode 100644
index 83ccdf50..00000000
--- a/kernel/src/platform/ofsparc64/linker.lds
+++ /dev/null
@@ -1,156 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003, University of New South Wales
- *
- * File path:	 platform/ofsparc64/linker.lds
- * Description:	 Kernel linker script for SPARC v9 architectures with OpenBoot
- *               (Open Firmware) running on them.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: linker.lds,v 1.4 2004/02/12 02:02:25 philipd Exp $
- *
- ***************************************************************************/
-
-OUTPUT_FORMAT("elf64-sparc")
-
-ENTRY(_start)
-
-#include INC_GLUE_API_PLAT(offsets.h)
-
-_start_text = KERNEL_AREA_START;
-_start_text_laddr = _start_text - KERNEL_OFFSET;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-#ifndef CONFIG_SMP
-		*(.tsb)	      /* TSB (software TLB). */	
-#endif /* !CONFIG_SMP */
-		ttable = .;
-		ttable_laddr = ttable - KERNEL_OFFSET;
-#include INC_ARCH(ttable.ldi) /* Trap Table */
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-	. = ALIGN(8K);
-	.kip . : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-		kip_laddr = . - KERNEL_OFFSET;
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(8K);
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-        _memory_descriptors_size =
-                (8K - ((memory_descriptors - kip) & (8K-1))) / 16;
-
-	_start_data = .;
-
-#ifdef CONFIG_SMP
-#error awiggins (08-09-03): SMP does not work fix this and TRAPTYPE2ADDR().
-	/* CPU local data section */
-	_start_cpu_local = KERNEL_CPULOCAL_START;
-	.cpulocal _start_cpu_local : AT(_end)
-	{
-		*(.tsb)           /* TSB (software TLB). */
-		*(.data.cpulocal)
-	}
-	_end_cpu_local = .;
-
-#endif /* CONFIG_SMP */
-
-	.data _start_data : AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.sbss) 
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-
-		. = ALIGN(8K);
-		_kdebugstack_bottom = .;
-		. = . + 8K;
-		_kdebugstack_top = .;
-	}
-
-#include <generic/linkersets.ldi>
-
-	. = ALIGN(8K);
-	_end_text = .;
-
-	.init _end_text : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-	}
-
-	. = ALIGN(8K);
-	_end_init = .;
-	_end_init_laddr = _end_init - KERNEL_OFFSET;
-
-	/**
-	 *  Boot area is a one-one mapping area used to kickstart
-	 *  the kernel. We have to do this because OpenBoot refused
-	 *  to map in the upper half of the virtual address space
-         *  for us.
-	 */
-	.boot _end_init_laddr : AT(ADDR(.boot) - BOOT_OFFSET)
-	{
-		*(.boot)
-		*(.boot.*)
-
-		. = ALIGN(8k);
-		_bootstack_bottom = .;
-		. = . + 8K;
-		_bootstack_top = .;
-	}
-
-	/* Required for user code! */
-	_end = ALIGN(8K) - BOOT_OFFSET;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/pleb/Makeconf b/kernel/src/platform/pleb/Makeconf
deleted file mode 100644
index 5ef1e114..00000000
--- a/kernel/src/platform/pleb/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/platform/pleb/, timer.cc irq.cc plat.cc )
diff --git a/kernel/src/platform/pleb/console.h b/kernel/src/platform/pleb/console.h
deleted file mode 100644
index 8e7f69b3..00000000
--- a/kernel/src/platform/pleb/console.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb/console.h
- * Description:   SA-1100 console constants
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.h,v 1.4 2004/06/04 02:11:07 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__PLEB__CONSOLE_H_
-#define __PLATFORM__PLEB__CONSOLE_H_
-
-#define CONSOLE_PADDR   0x80050000
-#define CONSOLE_VADDR   IO_AREA0_VADDR
-
-#endif /* __PLATFORM__PLEB__CONSOLE_H_ */
diff --git a/kernel/src/platform/pleb/intctrl.h b/kernel/src/platform/pleb/intctrl.h
deleted file mode 100644
index 988b47db..00000000
--- a/kernel/src/platform/pleb/intctrl.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/pleb/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: intctrl.h,v 1.3 2004/06/04 02:11:07 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__PLEB__INTCTRL_H__
-#define __PLATFORM__PLEB__INTCTRL_H__
-
-#include INC_CPU(intctrl.h)
-
-#endif /*__PLATFORM__PLEB__INTCTRL_H__ */
diff --git a/kernel/src/platform/pleb/irq.cc b/kernel/src/platform/pleb/irq.cc
deleted file mode 100644
index f9d9946c..00000000
--- a/kernel/src/platform/pleb/irq.cc
+++ /dev/null
@@ -1,61 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb/irq.cc
- * Description:   SA-1100 interrupt demultiplexing 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: irq.cc,v 1.5 2004/08/12 11:15:05 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include <linear_ptab.h>
-#include INC_API(tcb.h)
-#include INC_API(syscalls.h)
-#include INC_API(kernelinterface.h)
-#include INC_ARCH(thread.h)
-#include INC_PLAT(console.h)
-#include INC_GLUE(syscalls.h)
-#include INC_GLUE(intctrl.h)
-#include INC_CPU(cpu.h)
-
-extern "C" void arm_irq(arm_irq_context_t *context)
-{
-    for (int i = 0; i < IRQS; ++i)
-    {
-	if (SA1100_ICIP & (1 << i)) {
-	    void (*irq_handler)(int, arm_irq_context_t *) =
-		    (void (*)(int, arm_irq_context_t *))interrupt_handlers[i];
-	   
-	    irq_handler(i, context); 
-	    SA1100_ICIP |= (1 << i);
-	    return;
-	}
-    }
-}
-
-void intctrl_t::init_arch()
-{
-}
diff --git a/kernel/src/platform/pleb/linker.lds b/kernel/src/platform/pleb/linker.lds
deleted file mode 100644
index 49761360..00000000
--- a/kernel/src/platform/pleb/linker.lds
+++ /dev/null
@@ -1,115 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb/linker.lds
- * Description:   PLEB Linker Script
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: linker.lds,v 1.9 2004/08/21 12:24:27 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_PLAT(offsets.h)
-
-ENTRY(_start)
-_start_text		= VIRT_ADDR_BASE;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-		*(.base)
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-	_end_kip = .;
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	. = ALIGN(32K);
-	_start_data = .;
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.data.kspace)
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-
-	. = ALIGN(4K);
-
-	.init . : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-                *(.init.head)
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-
-		. = ALIGN(4K);
-		_bootstack_bottom = .;
-		. = . + 8K;
-		_bootstack_top = .;
-		_bootstack_top_phys = . - KERNEL_OFFSET;
-	}
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K);
-	/DISCARD/ :
-	{
-/*		*(*)            <-- THIS CAUSES SEGFAULT!!! */
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/pleb/offsets.h b/kernel/src/platform/pleb/offsets.h
deleted file mode 100644
index 9ad2ff63..00000000
--- a/kernel/src/platform/pleb/offsets.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb/offsets.h
- * Description:   Offsets for PLEB
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: offsets.h,v 1.7 2004/08/12 11:56:31 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__PLEB__OFFSETS_H__
-#define __PLATFORM__PLEB__OFFSETS_H__
-
-#define		PHYS_ADDR_BASE		0xC0500000
-
-/* These must correspond with glue/v4-arm/config.h */
-/* VIRT_ADDR_BASE must be 0xF0000000 */
-#define		VIRT_ADDR_BASE		0xF0000000
-/* UNCACHED_ADDR_BASE must be 0xF4000000 */
-#define		UNCACHED_ADDR_BASE	0xF4000000
-#define		KERNEL_OFFSET		(VIRT_ADDR_BASE-PHYS_ADDR_BASE)
-#define		UNCACHED_OFFSET		(UNCACHED_ADDR_BASE-PHYS_ADDR_BASE)
-
-#endif /*__PLATFORM__PLEB__OFFSETS_H__*/
diff --git a/kernel/src/platform/pleb/plat.cc b/kernel/src/platform/pleb/plat.cc
deleted file mode 100644
index 6a85ec42..00000000
--- a/kernel/src/platform/pleb/plat.cc
+++ /dev/null
@@ -1,89 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/pleb/plat.cc
- * Description:   
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: plat.cc,v 1.6 2004/08/13 10:52:45 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_API(kernelinterface.h)
-#include INC_GLUE(space.h)
-#include INC_PLAT(console.h)
-#include INC_PLAT(timer.h)
-#include INC_ARCH(bootdesc.h)
-
-// XXX FIXME
-#define RAM_B1_START    0xC0000000
-#define RAM_B1_END      0xC1000000
-#define RAM_B2_START    0xC8000000
-#define RAM_B2_END      0xC9000000
-
-/*
- * Initialize the platform specific mappings needed
- * to start the kernel.
- * Add other hardware initialization here as well
- */
-extern "C" void SECTION(".init") init_platform(void)
-{
-    space_t *space = get_kernel_space();
-
-    /* Map the console */
-    space->add_mapping((addr_t)CONSOLE_VADDR, (addr_t)CONSOLE_PADDR,
-		    pgent_t::size_4k, true, true, true);
-
-    /* Map the timer, interrupt, reset controllers */
-    space->add_mapping((addr_t)SA1100_OS_TIMER_BASE, (addr_t)SA1100_TIMER_PHYS,
-		    pgent_t::size_1m, true, true, true);
-}
-
-/*
- * Platform memory descriptors
- */
-struct arm_bootdesc SECTION(".init.data") platform_memory[] = {
-	{ 0,		RAM_B1_START,	memdesc_t::dedicated },
-	{ RAM_B1_START,	RAM_B1_END,	memdesc_t::conventional },
-	{ RAM_B1_END,	RAM_B2_START,	memdesc_t::dedicated },
-	{ RAM_B2_START, RAM_B2_END, 	memdesc_t::conventional },
-	{ RAM_B2_END, 	0xFFFFFFFF,	memdesc_t::dedicated },
-	{ 0, 0, 0 }
-};
-
-extern "C" struct arm_bootdesc* SECTION(".init") init_platform_mem(void)
-{
-    return (struct arm_bootdesc*)virt_to_phys(&platform_memory);
-}
-
-extern "C" void SECTION(".init") init_cpu_mappings(void)
-{
-    /* Map sa1100 zero bank */
-    get_kernel_space()->add_mapping( (addr_t)ZERO_BANK_VADDR, (addr_t)0xE0000000,
-		    pgent_t::size_1m, true, true );
-}
-
-extern "C" void init_cpu(void)
-{
-}
diff --git a/kernel/src/platform/pleb/timer.cc b/kernel/src/platform/pleb/timer.cc
deleted file mode 100644
index 91914ebf..00000000
--- a/kernel/src/platform/pleb/timer.cc
+++ /dev/null
@@ -1,95 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb/timer.cc
- * Description:   Periodic timer handling
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.cc,v 1.6 2005/01/12 02:51:17 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(schedule.h)
-#include INC_API(processor.h)
-#include INC_GLUE(timer.h)
-#include INC_GLUE(intctrl.h)
-#include INC_PLAT(timer.h)
-
-timer_t timer;
-
-extern "C" void handle_timer_interrupt(word_t irq, arm_irq_context_t *context)
-{
-    get_current_scheduler()->handle_timer_interrupt();
-
-    /* inaccurate */
-    SA1100_OS_TIMER_OSSR = (1 << 0);
-    SA1100_OS_TIMER_OSCR = 0;
-    SA1100_OS_TIMER_OSMR0 = TIMER_PERIOD;
-}
-
-SECTION(".init") void timer_t::init_global(void)
-{
-    UNIMPLEMENTED();
-}
-
-SECTION(".init") void timer_t::init_cpu(void)
-{
-    word_t ccf = SA1000_POWER_PPCR & 0x01f;
-    word_t freq;
-
-    /* Enable clock switching */
-    __asm__  __volatile__ (
-	"   mcr	    p15, 0, r0, c15, c1, 2  \n"
-	::: "r0"
-    );
-
-    // from SA1100-refman table 8-1
-    switch (ccf) {
-    case 0:	freq = 59000; break;
-    case 1:	freq = 73700; break;
-    case 2:	freq = 88500; break;
-    case 3:	freq = 103200; break;
-    case 4:	freq = 118000; break;
-    case 5:	freq = 132700; break;
-    case 6:	freq = 147500; break;
-    case 7:	freq = 162200; break;
-    case 8:	freq = 176900; break;
-    case 9:	freq = 191700; break;
-    case 10:	freq = 206400; break;
-    case 11:	freq = 221200; break;
-    default :	freq = 0; break;
-    }
-    /* initialize V4 processor info */
-    init_processor (0, freq ? freq/2 : 0 /* bus */, freq);
-
-    get_interrupt_ctrl()->register_interrupt_handler(SA1100_IRQ_OS_TIMER_0, 
-            handle_timer_interrupt);
-
-    SA1100_OS_TIMER_OSCR = 0;
-    SA1100_OS_TIMER_OSMR0 = TIMER_PERIOD;
-    SA1100_OS_TIMER_OIER = 0x00000001UL;
-
-    get_interrupt_ctrl()->unmask(SA1100_IRQ_OS_TIMER_0);
-}
diff --git a/kernel/src/platform/pleb/timer.h b/kernel/src/platform/pleb/timer.h
deleted file mode 100644
index 894c5df3..00000000
--- a/kernel/src/platform/pleb/timer.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/pleb/timer.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.h,v 1.3 2004/08/12 11:00:05 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__PLEB__TIMER_H__
-#define __PLATFORM__PLEB__TIMER_H__
-
-#include INC_CPU(timer.h)
-
-#endif /*__PLATFORM__PLEB__TIMER_H__ */
diff --git a/kernel/src/platform/pleb2/Makeconf b/kernel/src/platform/pleb2/Makeconf
deleted file mode 100644
index 6c57c962..00000000
--- a/kernel/src/platform/pleb2/Makeconf
+++ /dev/null
@@ -1 +0,0 @@
-SOURCES += $(addprefix src/platform/pleb2/, plat.cc timer.cc irq.cc )
diff --git a/kernel/src/platform/pleb2/cache.h b/kernel/src/platform/pleb2/cache.h
deleted file mode 100644
index 06725d01..00000000
--- a/kernel/src/platform/pleb2/cache.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb2/cache.h
- * Description:   Platform cache size
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: cache.h,v 1.1 2004/12/02 21:57:41 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__PLEB2__CACHE_H_
-#define __PLATFORM__PLEB2__CACHE_H_
-
-#define	    CACHE_SIZE		32*1024
-#define	    CACHE_LINE_SIZE	32
-
-#endif /* __PLATFORM__PLEB2__CACHE_H_ */
diff --git a/kernel/src/platform/pleb2/console.h b/kernel/src/platform/pleb2/console.h
deleted file mode 100644
index e96107f2..00000000
--- a/kernel/src/platform/pleb2/console.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb2/console.h
- * Description:   PLEB2 console constants
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: console.h,v 1.2 2005/01/12 02:49:03 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__PLEB2__CONSOLE_H_
-#define __PLATFORM__PLEB2__CONSOLE_H_
-
-#include INC_CPU(cpu.h)
-
-/* Console port */
-#define CONSOLE_POFFSET		0x100000
-#define CONSOLE_VOFFSET		0x000000
-
-#endif /* __PLATFORM__PLEB2__CONSOLE_H_ */
diff --git a/kernel/src/platform/pleb2/intctrl.h b/kernel/src/platform/pleb2/intctrl.h
deleted file mode 100644
index a7faaec7..00000000
--- a/kernel/src/platform/pleb2/intctrl.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/pleb2/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: intctrl.h,v 1.3 2005/01/12 02:49:03 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__PLEB2__INTCTRL_H__
-#define __PLATFORM__PLEB2__INTCTRL_H__
-
-#include <intctrl.h>
-#include INC_GLUE(hwspace.h)
-#include INC_ARCH(thread.h)
-#include INC_API(space.h)
-#include INC_PLAT(timer.h)
-#include INC_CPU(cpu.h)
-
-#define IRQS			32
-
-/* Interrupt Controller */
-#define INTERRUPT_POFFSET	0xd00000
-#define INTERRUPT_VOFFSET	0x003000
-#define XSCALE_IRQ_OS_TIMER	26
-
-#define XSCALE_INT		(IODEVICE_VADDR + INTERRUPT_VOFFSET)
-
-#define XSCALE_INT_ICMR		(*(volatile word_t *)(XSCALE_INT + 0x04))   /* Mask register */
-#define XSCALE_INT_ICLR		(*(volatile word_t *)(XSCALE_INT + 0x08))   /* FIQ / IRQ selection */
-#define XSCALE_INT_ICCR		(*(volatile word_t *)(XSCALE_INT + 0x14))   /* Control register */
-#define XSCALE_INT_ICIP		(*(volatile word_t *)(XSCALE_INT + 0x00))   /* IRQ pending */
-#define XSCALE_INT_ICFP		(*(volatile word_t *)(XSCALE_INT + 0x0c))   /* FIQ pending */
-#define XSCALE_INT_ICPR		(*(volatile word_t *)(XSCALE_INT + 0x10))   /* Pending (unmasked) */
-
-extern word_t arm_high_vector; 
-extern word_t interrupt_handlers[IRQS];
-
-class intctrl_t : public generic_intctrl_t {
-
-public:
-    void init_arch();
-    void init_cpu();
-
-    word_t get_number_irqs(void)
-    {
-	return IRQS;
-    }
-
-    void register_interrupt_handler (word_t vector, void (*handler)(word_t,
-            arm_irq_context_t *))
-    {
-        ASSERT(vector < IRQS);
-        interrupt_handlers[vector] = (word_t) handler;
-        TRACE_INIT("interrupt vector[%d] = %p\n", vector, 
-                interrupt_handlers[vector]);
-    }
-
-    static inline void mask(word_t irq)
-    {
-        ASSERT(irq < IRQS);
-        XSCALE_INT_ICMR &= ~(1 << irq);
-    }
-
-    static inline bool unmask(word_t irq)
-    {
-        ASSERT(irq < IRQS);
-        XSCALE_INT_ICMR |= (1 << irq);
-        return false;
-    }
-
-    static inline void disable(word_t irq)
-    {  
-        mask(irq);
-    }
-
-    static inline bool enable(word_t irq)
-    {
-        return unmask(irq);
-    }
-
-    void disable_fiq(void)
-    {
-	XSCALE_INT_ICLR = 0x00; /* No FIQs for now */
-    }
-
-    bool is_irq_available(int irq)
-    { 
-	return (irq >= 7) && (irq < IRQS) && (irq != XSCALE_IRQ_OS_TIMER);  
-    }
-
-    void set_cpu(word_t irq, word_t cpu) {}
-
-}; 
-
-#endif /*__PLATFORM__PLEB2__INTCTRL_H__ */
diff --git a/kernel/src/platform/pleb2/irq.cc b/kernel/src/platform/pleb2/irq.cc
deleted file mode 100644
index 8f3a69b7..00000000
--- a/kernel/src/platform/pleb2/irq.cc
+++ /dev/null
@@ -1,69 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb2/irq.cc
- * Description:   PLEB2 platform demultiplexing 
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: irq.cc,v 1.2 2004/12/02 22:40:43 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include <linear_ptab.h>
-#include INC_API(tcb.h)
-#include INC_GLUE(intctrl.h)
-#include INC_CPU(cpu.h)
-
-extern "C" void arm_irq(arm_irq_context_t *context)
-{
-    word_t status = XSCALE_INT_ICIP;
-
-    /* Handle timer first */
-    if (status & (1ul << XSCALE_IRQ_OS_TIMER))
-    {
-	void (*irq_handler)(int, arm_irq_context_t *) =
-		(void (*)(int, arm_irq_context_t *))interrupt_handlers[XSCALE_IRQ_OS_TIMER];
-	irq_handler(XSCALE_IRQ_OS_TIMER, context);
-	return;
-    }
-
-    /* XXX Use the clz instruction */
-    for (int i = 7; i < IRQS; ++i)  /* 0..6 are reserved */
-    {
-	if (status & (1ul << i)) {
-	    void (*irq_handler)(int, arm_irq_context_t *) =
-		    (void (*)(int, arm_irq_context_t *))interrupt_handlers[i];
-
-	    irq_handler(i, context); 
-	    return;
-	}
-    }
-
-    ASSERT(!"die");
-}
-
-void intctrl_t::init_arch()
-{
-}
diff --git a/kernel/src/platform/pleb2/linker.lds b/kernel/src/platform/pleb2/linker.lds
deleted file mode 100644
index c54fe494..00000000
--- a/kernel/src/platform/pleb2/linker.lds
+++ /dev/null
@@ -1,115 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb2/linker.lds
- * Description:   PLEB2 Linker Script
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: linker.lds,v 1.1 2004/12/02 22:04:07 cvansch Exp $
- *
- ********************************************************************/
-
-#include INC_PLAT(offsets.h)
-
-ENTRY(_start)
-_start_text		= VIRT_ADDR_BASE;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-		*(.base)
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-	_end_kip = .;
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	. = ALIGN(32K);
-	_start_data = .;
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.data.kspace)
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-
-	. = ALIGN(4K);
-
-	.init . : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-                *(.init.head)
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-
-		. = ALIGN(4K);
-		_bootstack_bottom = .;
-		. = . + 8K;
-		_bootstack_top = .;
-		_bootstack_top_phys = . - KERNEL_OFFSET;
-	}
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K);
-	/DISCARD/ :
-	{
-/*		*(*)            <-- THIS CAUSES SEGFAULT!!! */
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/pleb2/offsets.h b/kernel/src/platform/pleb2/offsets.h
deleted file mode 100644
index 9b516cbd..00000000
--- a/kernel/src/platform/pleb2/offsets.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb2/offsets.h
- * Description:   Offsets for PLEB2
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: offsets.h,v 1.1 2004/12/02 21:57:41 cvansch Exp $
- *
- ********************************************************************/
-
-#ifndef __PLATFORM__PLEB2__OFFSETS_H__
-#define __PLATFORM__PLEB2__OFFSETS_H__
-
-#define		PHYS_ADDR_BASE		0xA0100000
-
-#define		XSCALE_DEV_PHYS		0x40000000
-
-/* These must correspond with glue/v4-arm/config.h */
-/* VIRT_ADDR_BASE must be 0xF0000000 */
-#define		VIRT_ADDR_BASE		0xF0000000
-/* UNCACHED_ADDR_BASE must be 0xF4000000 */
-#define		UNCACHED_ADDR_BASE	0xF4000000
-#define		KERNEL_OFFSET		(VIRT_ADDR_BASE-PHYS_ADDR_BASE)
-#define		UNCACHED_OFFSET		(UNCACHED_ADDR_BASE-PHYS_ADDR_BASE)
-
-#endif /*__PLATFORM__PLEB2__OFFSETS_H__*/
diff --git a/kernel/src/platform/pleb2/plat.cc b/kernel/src/platform/pleb2/plat.cc
deleted file mode 100644
index e9d767ae..00000000
--- a/kernel/src/platform/pleb2/plat.cc
+++ /dev/null
@@ -1,102 +0,0 @@
-/********************************************************************* *                
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/pleb2/plat.cc
- * Description:   
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: plat.cc,v 1.2 2005/01/12 02:49:02 cvansch Exp $
- *                
- ********************************************************************/
-
-#include INC_API(kernelinterface.h)
-#include INC_GLUE(space.h)
-#include INC_PLAT(console.h)
-#include INC_PLAT(timer.h)
-#include INC_PLAT(intctrl.h)
-#include INC_CPU(cpu.h)
-#include INC_ARCH(bootdesc.h)
-
-// XXX FIXME
-#define RAM_START    0xa0000000
-#define RAM_END      0xa2000000
-
-/*
- * Initialize the platform specific mappings needed
- * to start the kernel.
- * Add other hardware initialization here as well
- */
-extern "C" void SECTION(".init") init_platform(void)
-{
-    space_t *space = get_kernel_space();
-
-    /* Map in the control registers */
-
-    space->add_mapping((addr_t)(IODEVICE_VADDR + CONSOLE_VOFFSET),
-		    (addr_t)(XSCALE_DEV_PHYS + CONSOLE_POFFSET),
-		    pgent_t::size_4k, true, true, true);
-
-    space->add_mapping((addr_t)(IODEVICE_VADDR + INTERRUPT_VOFFSET),
-		    (addr_t)(XSCALE_DEV_PHYS + INTERRUPT_POFFSET),
-		    pgent_t::size_4k, true, true, true);
-
-    space->add_mapping((addr_t)(IODEVICE_VADDR + TIMER_VOFFSET),
-		    (addr_t)(XSCALE_DEV_PHYS + TIMER_POFFSET),
-		    pgent_t::size_4k, true, true, true);
-
-    space->add_mapping((addr_t)(IODEVICE_VADDR + CLOCKS_VOFFSET),
-		    (addr_t)(XSCALE_DEV_PHYS + CLOCKS_POFFSET),
-		    pgent_t::size_4k, true, true, true);
-}
-
-/*
- * Platform memory descriptors
- */
-struct arm_bootdesc SECTION(".init.data") platform_memory[] = {
-	{ RAM_START,	RAM_END,	memdesc_t::conventional },
-	/* PCMCIA / CF Slot 0 */
-	{ 0x20000000, 	0x30000000,	memdesc_t::dedicated },	
-	/* PCMCIA / CF Slot 1 */
-	{ 0x30000000, 	0x40000000,	memdesc_t::dedicated },	
-	/* IO Devices - Peripherals/LCD/Mem ctrl */
-	{ 0x40000000, 	0x4c000000,	memdesc_t::dedicated },	
-	/* Extras XXX ?? */
-//	{ 0xCC000000, 	0xCC000100,	memdesc_t::dedicated },	
-	{ 0, 0, 0 }
-};
-
-extern "C" struct arm_bootdesc* SECTION(".init") init_platform_mem(void)
-{
-    return (struct arm_bootdesc*)virt_to_phys(&platform_memory);
-}
-
-extern "C" void SECTION(".init") init_cpu_mappings(void)
-{
-}
-
-extern "C" void SECTION(".init") init_cpu(void)
-{
-    arm_cache::cache_invalidate_d();
-    arm_cache::tlb_flush();
-}
diff --git a/kernel/src/platform/pleb2/timer.cc b/kernel/src/platform/pleb2/timer.cc
deleted file mode 100644
index 52ad84b5..00000000
--- a/kernel/src/platform/pleb2/timer.cc
+++ /dev/null
@@ -1,111 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *
- * File path:     platform/pleb2/timer.cc
- * Description:   Periodic timer handling
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.cc,v 1.3 2005/01/12 02:49:02 cvansch Exp $
- *
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(schedule.h)
-#include INC_API(processor.h)
-#include INC_GLUE(timer.h)
-#include INC_GLUE(intctrl.h)
-#include INC_PLAT(timer.h)
-
-timer_t timer;
-
-extern "C" void handle_timer_interrupt(word_t irq, arm_irq_context_t *context)
-{
-    XSCALE_OS_TIMER_TSR = 0x01;  /* Clear timer */
-    XSCALE_OS_TIMER_TCR = 0x00000000;
-
-    get_current_scheduler()->handle_timer_interrupt();
-}
-
-SECTION(".init") void timer_t::init_global(void)
-{
-    UNIMPLEMENTED();
-}
-
-SECTION(".init") void timer_t::init_cpu(void)
-{
-    /* Turn on TURBO mode */
-    __asm__  __volatile__ (
-	"   mov	    r0,	    #1		    \n"
-	"   mcr	    p14, 0, r0, c6, c0, 0   \n"
-	::: "r0"
-    );
-    get_interrupt_ctrl()->register_interrupt_handler(XSCALE_IRQ_OS_TIMER, 
-            handle_timer_interrupt);
-
-    XSCALE_OS_TIMER_TSR = 0x0f;
-    XSCALE_OS_TIMER_MR0 = TIMER_RATE / (1000000/TIMER_TICK_LENGTH);
-    XSCALE_OS_TIMER_TCR = 0x00000000;
-    XSCALE_OS_TIMER_IER = 0x01;	    /* Enable timer channel 0 */
-
-    get_interrupt_ctrl()->unmask(XSCALE_IRQ_OS_TIMER);
-
-    {
-	word_t cccr = XSCALE_CLOCKS_CCCR;
-	word_t x, y, z;
-	word_t bus, cpu;
-
-	switch (cccr & 0x1f)
-	{
-	case 0x1:   x = 27; break;
-	case 0x3:   x = 36; break;
-	case 0x5:   x = 45; break;
-	default:    x = 0;  break;
-	}
-	bus = x * 3686400 / 1000;
-	printf("Mem Speed = %dkHz\n", x * 3686400 / 1000);
-
-	switch ((cccr >> 5) & 0x3)
-	{
-	case 0x1:   y = 1; break;
-	case 0x2:   y = 2; break;
-	case 0x3:   y = 4; break;
-	default:    y = 0;  break;
-	}
-	printf("Run Speed = %dkHz\n", x * 3686400 * y / 1000);
-
-	switch ((cccr >> 7) & 0x7)
-	{
-	case 0x2:   z = 10; break;
-	case 0x3:   z = 15; break;
-	case 0x4:   z = 20; break;
-	case 0x6:   z = 30; break;
-	default:    z = 0;  break;
-	}
-	cpu = x * 36864 * y * z / 100;
-	printf("Turbo Speed = %dkHz\n", x * 36864 * y * z / 100);
-
-	/* initialize V4 processor info */
-	init_processor (0,  bus, cpu);
-    }
-}
diff --git a/kernel/src/platform/pleb2/timer.h b/kernel/src/platform/pleb2/timer.h
deleted file mode 100644
index 399d20d0..00000000
--- a/kernel/src/platform/pleb2/timer.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  National ICT Australia (NICTA)
- *                
- * File path:     platform/pleb2/timer.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: timer.h,v 1.2 2005/01/12 02:49:03 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__PLEB2__TIMER_H__
-#define __PLATFORM__PLEB2__TIMER_H__
-
-/* PXA255 Timer */
-#define TIMER_TICK_LENGTH	5000
-#define TIMER_POFFSET		0x0a00000
-#define TIMER_VOFFSET		0x0001000
-#define CLOCKS_POFFSET		0x1300000
-#define CLOCKS_VOFFSET		0x0002000
-
-#define TIMER_RATE		3686400
-
-#if !defined(ASSEMBLY)
-
-#include INC_CPU(cpu.h)
-
-#define XSCALE_TIMERS		(IODEVICE_VADDR + TIMER_VOFFSET)
-
-/* Match registers */
-#define XSCALE_OS_TIMER_MR0	(*(volatile word_t *)(XSCALE_TIMERS + 0x00))
-#define XSCALE_OS_TIMER_MR1	(*(volatile word_t *)(XSCALE_TIMERS + 0x04))
-#define XSCALE_OS_TIMER_MR2	(*(volatile word_t *)(XSCALE_TIMERS + 0x08))
-#define XSCALE_OS_TIMER_MR3	(*(volatile word_t *)(XSCALE_TIMERS + 0x0c))
-
-/* Interrupt enable register */
-#define XSCALE_OS_TIMER_IER	(*(volatile word_t *)(XSCALE_TIMERS + 0x1c))
-/* Watchdog match enable register */
-#define XSCALE_OS_TIMER_WMER	(*(volatile word_t *)(XSCALE_TIMERS + 0x18))
-/* Timer count register */
-#define XSCALE_OS_TIMER_TCR	(*(volatile word_t *)(XSCALE_TIMERS + 0x10))
-/* Timer status register */
-#define XSCALE_OS_TIMER_TSR	(*(volatile word_t *)(XSCALE_TIMERS + 0x14))
-
-#define XSCALE_CLOCKS		(IODEVICE_VADDR + CLOCKS_VOFFSET)
-
-#define XSCALE_CLOCKS_CCCR	(*(volatile word_t *)(XSCALE_CLOCKS + 0x00))
-
-#endif
-
-#endif /*__PLATFORM__PLEB2__TIMER_H__ */
diff --git a/kernel/src/platform/sb1/Makeconf b/kernel/src/platform/sb1/Makeconf
deleted file mode 100644
index 5f520347..00000000
--- a/kernel/src/platform/sb1/Makeconf
+++ /dev/null
@@ -1,3 +0,0 @@
-ifeq ("$(CONFIG_PLAT_SB1)","y")
-SOURCES += src/platform/sb1/smp.cc src/platform/sb1/cfe.cc
-endif
diff --git a/kernel/src/platform/sb1/cache.h b/kernel/src/platform/sb1/cache.h
deleted file mode 100644
index c6468f84..00000000
--- a/kernel/src/platform/sb1/cache.h
+++ /dev/null
@@ -1,282 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:	  include/platform/sb1/cache.h
- * Description:   Functions which manipulate the MIPS cache
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cache.h,v 1.8 2004/12/02 00:01:29 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__SB1__CACHE_H__
-#define __PLATFORM__SB1__CACHE_H__
-
-#include INC_ARCH(cache.h)
-#include INC_ARCH(mipsregs.h)
-#include INC_ARCH(addrspace.h)
-#include "linear_ptab.h"
-
-#define CONFIG_MIPS64_DCACHE_SIZE	(32*1024)
-#define CONFIG_MIPS64_ICACHE_SIZE	(32*1024)
-#define CONFIG_MIPS64_CACHE_LINE_SIZE	32
-#define CONFIG_MIPS64_CACHE_WAYS	4
-
-#define CACHE_WAYS		CONFIG_MIPS64_CACHE_WAYS
-//#define CACHE_LINE_SIZE		CONFIG_MIPS64_CACHE_LINE_SIZE	in config.h
-#define DCACHE_SIZE		CONFIG_MIPS64_DCACHE_SIZE
-#define ICACHE_SIZE		CONFIG_MIPS64_ICACHE_SIZE
-
-/*
- * Cache Operations
- */
-#define Index_Invalidate_I      0x00
-#define Index_Writeback_Inv_D   0x01
-#define Index_Invalidate_SI     0x02
-#define Index_Writeback_Inv_SD  0x03
-#define Index_Load_Tag_I        0x04
-#define Index_Load_Tag_D        0x05
-#define Index_Load_Tag_SI       0x06
-#define Index_Load_Tag_SD       0x07
-#define Index_Store_Tag_I       0x08
-#define Index_Store_Tag_D       0x09
-#define Index_Store_Tag_SI      0x0A
-#define Index_Store_Tag_SD      0x0B
-#define Create_Dirty_Excl_D     0x0d
-#define Create_Dirty_Excl_SD    0x0f
-#define Hit_Invalidate_I        0x10
-#define Hit_Invalidate_D        0x11
-#define Hit_Invalidate_SI       0x12
-#define Hit_Invalidate_SD       0x13
-#define Fill                    0x14
-#define Hit_Writeback_Inv_D     0x15
-                                        /* 0x16 is unused */
-#define Hit_Writeback_Inv_SD    0x17
-#define Hit_Writeback_I         0x18
-#define Hit_Writeback_D         0x19
-                                        /* 0x1a is unused */
-#define Hit_Writeback_SD        0x1b
-                                        /* 0x1c is unused */
-                                        /* 0x1e is unused */
-#define Hit_Set_Virtual_SI      0x1e
-#define Hit_Set_Virtual_SD      0x1f
-
-#define cache32_unroll32(base,op)                               \
-	__asm__ __volatile__("                                  \
-		.set noreorder;                                 \
-		cache %1, 0x000(%0); cache %1, 0x020(%0);       \
-		cache %1, 0x040(%0); cache %1, 0x060(%0);       \
-		cache %1, 0x080(%0); cache %1, 0x0a0(%0);       \
-		cache %1, 0x0c0(%0); cache %1, 0x0e0(%0);       \
-		cache %1, 0x100(%0); cache %1, 0x120(%0);       \
-		cache %1, 0x140(%0); cache %1, 0x160(%0);       \
-		cache %1, 0x180(%0); cache %1, 0x1a0(%0);       \
-		cache %1, 0x1c0(%0); cache %1, 0x1e0(%0);       \
-		cache %1, 0x200(%0); cache %1, 0x220(%0);       \
-		cache %1, 0x240(%0); cache %1, 0x260(%0);       \
-		cache %1, 0x280(%0); cache %1, 0x2a0(%0);       \
-		cache %1, 0x2c0(%0); cache %1, 0x2e0(%0);       \
-		cache %1, 0x300(%0); cache %1, 0x320(%0);       \
-		cache %1, 0x340(%0); cache %1, 0x360(%0);       \
-		cache %1, 0x380(%0); cache %1, 0x3a0(%0);       \
-		cache %1, 0x3c0(%0); cache %1, 0x3e0(%0);       \
-		.set reorder"                                   \
-		:                                               \
-		: "r" (base),                                   \
-		  "i" (op));
-
-static inline void blast_dcache32(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + DCACHE_SIZE);
-
-    while(start < end) {
-	cache32_unroll32(start,Index_Writeback_Inv_D);
-        start += 0x400;
-    }
-}
-
-static inline void blast_icache32(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    while(start < end) {
-	cache32_unroll32(start,Index_Invalidate_I);
-	start += 0x400;
-    }
-}
-
-static inline void init_dcache32(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + DCACHE_SIZE);
-
-    asm (
-	"mtc0	$0, "STR(CP0_TAGLO)"\n\t"
-	"mtc0	$0, "STR(CP0_TAGHI)"\n\t"
-    );
-
-    while(start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_D)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-static inline void init_icache32(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    asm (
-	"mtc0	$0, "STR(CP0_TAGLO)"\n\t"
-	"mtc0	$0, "STR(CP0_TAGHI)"\n\t"
-    );
-
-    while(start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-static inline void init_icache32_i(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    while(start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Invalidate_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-
-INLINE void cache_t::init_cpu(void)
-{
-    word_t temp;
-
-    __asm__ __volatile__ (
-	"mfc0	%0, "STR(CP0_CONFIG)"\n\t"
-	: "=r" (temp)
-    );
-
-    temp &= (~CONFIG_CACHE_MASK);
-#if CONFIG_UNCACHED
-    temp |= CONFIG_NOCACHE;
-#else
-    temp |= CONFIG_CACHABLE_COW;
-#endif
-
-    __asm__ __volatile__ (
-	"mtc0	%0, "STR(CP0_CONFIG)"\n\t"
-	: : "r" (temp)
-    );
-
-    /* Important that these inline! */
-    init_dcache32();
-    init_icache32_i();
-}
-
-INLINE void cache_t::flush_cache_all(void)
-{
-    blast_dcache32(); blast_icache32();
-}
-
-INLINE void cache_t::flush_cache_l1(void)
-{
-    blast_dcache32(); blast_icache32();
-}
-
-INLINE void cache_t::flush_cache_range(unsigned long start, unsigned long end)
-{
-    start &= (~CACHE_LINE_SIZE);
-    end = (end + (CACHE_LINE_SIZE-1)) & (~CACHE_LINE_SIZE);
-
-    if (end > (start + DCACHE_SIZE))
-	end = start + DCACHE_SIZE;
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_D)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-INLINE void cache_t::flush_icache_range(unsigned long start, unsigned long end)
-{
-    start &= (~CACHE_LINE_SIZE);
-    end = (end + (CACHE_LINE_SIZE-1)) & (~CACHE_LINE_SIZE);
-
-    if (end > (start + ICACHE_SIZE))
-	end = start + ICACHE_SIZE;
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-INLINE void cache_t::flush_cache_page(unsigned long page, pgent_t::pgsize_e pgsize)
-{
-    unsigned long start = page & (~page_mask(pgsize));
-    unsigned long end = start + page_size(pgsize);
-
-    if (end > (start + DCACHE_SIZE))
-	end = start + DCACHE_SIZE;
-
-    while (start < end) {
-	cache32_unroll32(start, Index_Writeback_Inv_D);
-	start += 0x400;
-    }
-}
-
-INLINE void cache_t::flush_icache_page(unsigned long page, pgent_t::pgsize_e pgsize)
-{
-    unsigned long start = page & (~page_mask(pgsize));
-    unsigned long end = start + page_size(pgsize);
-
-    if (end > (start + ICACHE_SIZE))
-	end = start + ICACHE_SIZE;
-
-    while (start < end) {
-	cache32_unroll32(start, Index_Invalidate_I);
-	start += 0x400;
-    }
-}
-
-#endif
diff --git a/kernel/src/platform/sb1/cfe.cc b/kernel/src/platform/sb1/cfe.cc
deleted file mode 100644
index ad4d99e0..00000000
--- a/kernel/src/platform/sb1/cfe.cc
+++ /dev/null
@@ -1,99 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     platform/sb1/smp.cc
- * Description:   mips64 sibyte MP implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cfe.cc,v 1.4 2006/03/01 14:10:32 ud3 Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_ARCH(addrspace.h)
-#include INC_PLAT(cfe_xiocb.h)
-
-#define CFE_EPTSEAL 0x43464531
-#ifdef CONFIG_UNCACHED
-#define CFE_APIENTRY		(0x1FC00500 | KSEG1)
-#define CFE_APISEAL		(0x1FC004E0 | KSEG1)
-#define CFE_APISEAL_RE		(0x1FC004E8 | KSEG1)
-#define CFE_APISEAL_OLD		(0x1FC00508 | KSEG1)
-#else
-#define CFE_APIENTRY		(0x1FC00500 | KSEG0)
-#define CFE_APISEAL		(0x1FC004E0 | KSEG0)
-#define CFE_APISEAL_RE		(0x1FC004E8 | KSEG0)
-#define CFE_APISEAL_OLD		(0x1FC00508 | KSEG0)
-#endif
-
-typedef int (cfe_call_t)(long, cfe_xiocb_t *);
-static int (*cfe_call)(long handle, cfe_xiocb_t *xiocb) = 0;
-
-static cfe_xuint_t cfe_handle = 0;
-
-int cfe_init(word_t arg)
-{
-    u32_t * api = (u32_t *)CFE_APISEAL;
-    u32_t * api_re = (u32_t *)CFE_APISEAL_RE;
-    u32_t * api_old = (u32_t *)CFE_APISEAL_OLD;
-
-    if ((*api != CFE_EPTSEAL) &&
-	(*api_re != CFE_EPTSEAL) &&
-	(*api_old != CFE_EPTSEAL))
-	return -1;
-
-    if (arg != 0) cfe_handle = arg;
-    cfe_call = (cfe_call_t *)CFE_APIENTRY;
-
-    return 0;
-}
-
-int cfe_do(cfe_xiocb_t *xiocb)
-{
-    if (!cfe_call) return -1;
-
-    return (*cfe_call)(cfe_handle,xiocb);
-}
-
-int cfe_start_cpu(int cpu, void (*fn)(void), long sp, long gp, long a1)
-{
-    cfe_xiocb_t xiocb;
-
-    xiocb.xiocb_fcode = CFE_CMD_FW_CPUCTL;
-    xiocb.xiocb_status = 0;
-    xiocb.xiocb_handle = 0;
-    xiocb.xiocb_flags  = 0;
-    xiocb.xiocb_psize = sizeof(xiocb_cpuctl_t);
-    xiocb.plist.xiocb_cpuctl.cpu_number = cpu;
-    xiocb.plist.xiocb_cpuctl.cpu_command = CFE_CPU_CMD_START;
-    xiocb.plist.xiocb_cpuctl.gp_val = gp;
-    xiocb.plist.xiocb_cpuctl.sp_val = sp;
-    xiocb.plist.xiocb_cpuctl.a1_val = a1;
-    xiocb.plist.xiocb_cpuctl.start_addr = (long)fn;
-
-    cfe_do(&xiocb);
-
-    return xiocb.xiocb_status;
-}
-
diff --git a/kernel/src/platform/sb1/cfe_xiocb.h b/kernel/src/platform/sb1/cfe_xiocb.h
deleted file mode 100644
index 75a336ae..00000000
--- a/kernel/src/platform/sb1/cfe_xiocb.h
+++ /dev/null
@@ -1,202 +0,0 @@
-/*  *********************************************************************
-    *  Broadcom Common Firmware Environment (CFE)
-    *  
-    *  IOCB definitions				File: cfe_iocb.h
-    *  
-    *  This module describes CFE's IOCB structure, the main
-    *  data structure used to communicate API requests with CFE.
-    *  
-    *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
-    *  
-    *********************************************************************  
-    *
-    *  Copyright 2000,2001,2002,2003
-    *  Broadcom Corporation. All rights reserved.
-    *  
-    *  This software is furnished under license and may be used and 
-    *  copied only in accordance with the following terms and 
-    *  conditions.  Subject to these conditions, you may download, 
-    *  copy, install, use, modify and distribute modified or unmodified 
-    *  copies of this software in source and/or binary form.  No title 
-    *  or ownership is transferred hereby.
-    *  
-    *  1) Any source code used, modified or distributed must reproduce 
-    *     and retain this copyright notice and list of conditions 
-    *     as they appear in the source file.
-    *  
-    *  2) No right is granted to use any trade name, trademark, or 
-    *     logo of Broadcom Corporation.  The "Broadcom Corporation" 
-    *     name may not be used to endorse or promote products derived 
-    *     from this software without the prior written permission of 
-    *     Broadcom Corporation.
-    *  
-    *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
-    *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
-    *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 
-    *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 
-    *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 
-    *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
-    *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
-    *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
-    *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
-    *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
-    *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 
-    *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 
-    *     THE POSSIBILITY OF SUCH DAMAGE.
-    ********************************************************************* */
-
-#ifndef _CFE_XIOCB_H
-#define _CFE_XIOCB_H
-
-/*  *********************************************************************
-    *  Constants
-    ********************************************************************* */
-
-#define CFE_CMD_FW_GETINFO	0
-#define CFE_CMD_FW_RESTART	1
-#define CFE_CMD_FW_BOOT		2
-#define CFE_CMD_FW_CPUCTL	3
-#define CFE_CMD_FW_GETTIME      4
-#define CFE_CMD_FW_MEMENUM	5
-#define CFE_CMD_FW_FLUSHCACHE	6
-
-#define CFE_CMD_DEV_GETHANDLE	9
-#define CFE_CMD_DEV_ENUM	10
-#define CFE_CMD_DEV_OPEN	11
-#define CFE_CMD_DEV_INPSTAT	12
-#define CFE_CMD_DEV_READ	13
-#define CFE_CMD_DEV_WRITE	14
-#define CFE_CMD_DEV_IOCTL	15
-#define CFE_CMD_DEV_CLOSE	16
-#define CFE_CMD_DEV_GETINFO	17
-
-#define CFE_CMD_ENV_ENUM	20
-#define CFE_CMD_ENV_GET		22
-#define CFE_CMD_ENV_SET		23
-#define CFE_CMD_ENV_DEL		24
-
-#define CFE_CMD_MAX		32
-
-#define CFE_CMD_VENDOR_USE	0x8000	/* codes above this are for customer use */
-
-#define CFE_MI_RESERVED	0		/* memory is reserved, do not use */
-#define CFE_MI_AVAILABLE 1		/* memory is available */
-
-#define CFE_FLG_WARMSTART     0x00000001
-#define CFE_FLG_FULL_ARENA    0x00000001
-#define CFE_FLG_ENV_PERMANENT 0x00000001
-
-#define CFE_CPU_CMD_START 1
-#define CFE_CPU_CMD_STOP 0
-
-#define CFE_STDHANDLE_CONSOLE	0
-
-#define CFE_DEV_NETWORK 	1
-#define CFE_DEV_DISK		2
-#define CFE_DEV_FLASH		3
-#define CFE_DEV_SERIAL		4
-#define CFE_DEV_CPU		5
-#define CFE_DEV_NVRAM		6
-#define CFE_DEV_CLOCK           7
-#define CFE_DEV_OTHER		8
-#define CFE_DEV_MASK		0x0F
-
-#define CFE_CACHE_FLUSH_D	1
-#define CFE_CACHE_INVAL_I	2
-#define CFE_CACHE_INVAL_D	4
-#define CFE_CACHE_INVAL_L2	8
-
-/*  *********************************************************************
-    *  Structures
-    ********************************************************************* */
-
-typedef unsigned long long cfe_xuint_t;
-typedef long long cfe_xint_t;
-typedef long long cfe_xptr_t;
-
-typedef struct xiocb_buffer_s {
-    cfe_xuint_t   buf_offset;		/* offset on device (bytes) */
-    cfe_xptr_t 	  buf_ptr;		/* pointer to a buffer */
-    cfe_xuint_t   buf_length;		/* length of this buffer */
-    cfe_xuint_t   buf_retlen;		/* returned length (for read ops) */
-    cfe_xuint_t   buf_ioctlcmd;		/* IOCTL command (used only for IOCTLs) */
-} xiocb_buffer_t;
-
-#define buf_devflags buf_ioctlcmd	/* returned device info flags */
-
-typedef struct xiocb_inpstat_s {
-    cfe_xuint_t inp_status;		/* 1 means input available */
-} xiocb_inpstat_t;
-
-typedef struct xiocb_envbuf_s {
-    cfe_xint_t enum_idx;		/* 0-based enumeration index */
-    cfe_xptr_t name_ptr;		/* name string buffer */
-    cfe_xint_t name_length;		/* size of name buffer */
-    cfe_xptr_t val_ptr;			/* value string buffer */
-    cfe_xint_t val_length;		/* size of value string buffer */
-} xiocb_envbuf_t;
-
-typedef struct xiocb_cpuctl_s {
-    cfe_xuint_t  cpu_number;		/* cpu number to control */
-    cfe_xuint_t  cpu_command;		/* command to issue to CPU */
-    cfe_xuint_t  start_addr;		/* CPU start address */
-    cfe_xuint_t  gp_val;		/* starting GP value */
-    cfe_xuint_t  sp_val;		/* starting SP value */
-    cfe_xuint_t  a1_val;		/* starting A1 value */
-} xiocb_cpuctl_t;
-
-typedef struct xiocb_time_s {
-    cfe_xint_t ticks;			/* current time in ticks */
-} xiocb_time_t;
-
-typedef struct xiocb_exitstat_s {
-    cfe_xint_t status;
-} xiocb_exitstat_t;
-
-typedef struct xiocb_meminfo_s {
-    cfe_xint_t  mi_idx;			/* 0-based enumeration index */
-    cfe_xint_t  mi_type;		/* type of memory block */
-    cfe_xuint_t mi_addr;		/* physical start address */
-    cfe_xuint_t mi_size;		/* block size */
-} xiocb_meminfo_t;
-
-#define CFE_FWI_64BIT		0x00000001
-#define CFE_FWI_32BIT		0x00000002
-#define CFE_FWI_RELOC		0x00000004
-#define CFE_FWI_UNCACHED	0x00000008
-#define CFE_FWI_MULTICPU	0x00000010
-#define CFE_FWI_FUNCSIM		0x00000020
-#define CFE_FWI_RTLSIM		0x00000040
-
-typedef struct xiocb_fwinfo_s {
-    cfe_xint_t fwi_version;		/* major, minor, eco version */
-    cfe_xint_t fwi_totalmem;		/* total installed mem */
-    cfe_xint_t fwi_flags;		/* various flags */
-    cfe_xint_t fwi_boardid;		/* board ID */
-    cfe_xint_t fwi_bootarea_va;		/* VA of boot area */
-    cfe_xint_t fwi_bootarea_pa;		/* PA of boot area */
-    cfe_xint_t fwi_bootarea_size;	/* size of boot area */
-    cfe_xint_t fwi_reserved1;
-    cfe_xint_t fwi_reserved2;
-    cfe_xint_t fwi_reserved3;
-} xiocb_fwinfo_t;
-
-typedef struct cfe_xiocb_s {
-    cfe_xuint_t xiocb_fcode;		/* IOCB function code */
-    cfe_xint_t  xiocb_status;		/* return status */
-    cfe_xint_t  xiocb_handle;		/* file/device handle */
-    cfe_xuint_t xiocb_flags;		/* flags for this IOCB */
-    cfe_xuint_t xiocb_psize;		/* size of parameter list */
-    union {
-	xiocb_buffer_t  xiocb_buffer;	/* buffer parameters */
-	xiocb_inpstat_t xiocb_inpstat;	/* input status parameters */
-	xiocb_envbuf_t  xiocb_envbuf;	/* environment function parameters */
-	xiocb_cpuctl_t  xiocb_cpuctl;	/* CPU control parameters */
-	xiocb_time_t    xiocb_time;	/* timer parameters */
-	xiocb_meminfo_t xiocb_meminfo;	/* memory arena info parameters */
-	xiocb_fwinfo_t  xiocb_fwinfo;	/* firmware information */
-	xiocb_exitstat_t xiocb_exitstat; /* Exit Status */
-    } plist;
-} cfe_xiocb_t;
-
-#endif
diff --git a/kernel/src/platform/sb1/config.h b/kernel/src/platform/sb1/config.h
deleted file mode 100644
index 9b81a130..00000000
--- a/kernel/src/platform/sb1/config.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     platform/sb1/config.h
- * Description:   Platform specific configuration
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.6 2003/11/28 01:00:26 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__SB1__CONFIG_H__
-#define __PLATFORM__SB1__CONFIG_H__
-
-
-/*#define CONFIG_MIPS64_ADDRESS_BITS 44	    -- Page table bug */
-#define CONFIG_MIPS64_ADDRESS_BITS	    40
-#define CONFIG_MIPS64_PHYS_ADDRESS_BITS	    40
-#define CONFIG_MIPS64_VPN_SHIFT		    12
-#define CONFIG_MIPS64_PAGEMASK_4K	    0
-
-#define CONFIG_MIPS64_CONSOLE_RESERVE (0)
-
-#define CONFIG_MIPS64_TLB_SIZE 64  /* 64 pairs */
-
-#define CONFIG_MIPS64_STATUS_MASK 0xfe7fff00
-
-#if !defined(__ASSEMBLER__)
-
-#else /* ASSEMBLER */
-
-/* 64-bit virtual memory kernel mode */
-/* 64-bit virtual memory supervisor mode */
-/* 64-bit virtual memory user mode */
-/* 32 FPU registers */
-#define	INIT_CP0_STATUS_SET			\
-    (ST_KX|ST_SX|ST_UX|ST_PX|ST_FR|ST_MX)
-
-/* not used here: disable reverse endian */
-/* go into kernel mode */
-/* remove error condition */
-/* remove exception level */
-/* FPU is disabled */
-/* clear NMI/soft reset */
-#define	INIT_CP0_STATUS_CLEAR			\
-    (ST_KSU|ST_ERL|ST_EXL|ST_CU1|ST_SR)
-
-#endif
-
-#endif /* __PLATFORM__SB1__CONFIG_H__ */
diff --git a/kernel/src/platform/sb1/linker.lds b/kernel/src/platform/sb1/linker.lds
deleted file mode 100644
index b6f29948..00000000
--- a/kernel/src/platform/sb1/linker.lds
+++ /dev/null
@@ -1,101 +0,0 @@
-/* check ALIGN(4K) before use !!! */
-
-#include INC_GLUE(offsets.h)
-
-ENTRY(_start)
-_start_text_phys	= 0x10000;
-_start_text		= KERNEL_OFFSET + _start_text_phys;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-#ifndef CONFIG_SMP
-		*(.base)
-#endif
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-#ifdef CONFIG_SMP
-	_start_cpu_local = .;
-/*	.cpulocal 0xc0000000 : AT (ADDR(.cpulocal) - KERNEL_OFFSET)*/
-	.cpulocal 0xc0000000 : AT (_end)
-	{
-		*(.base)
-		*(.data.cpulocal)
-	}
-	. = _start_cpu_local;
-#endif
-
-	. = ALIGN(4K);
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-	}
-
-	. = ALIGN(4K);
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-
-	. = ALIGN(4K);
-	.init _end_text : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-	}
-
-	. = ALIGN(8K);
-	_bootstack_bottom = .;
-	. = . + 8K;
-	_bootstack_top = .;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K) - KERNEL_OFFSET;
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	/*	*(.cpulocal)*/
-	}
-}
diff --git a/kernel/src/platform/sb1/sb1250_defs.h b/kernel/src/platform/sb1/sb1250_defs.h
deleted file mode 100644
index 37e5f440..00000000
--- a/kernel/src/platform/sb1/sb1250_defs.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/*  *********************************************************************
-    *  SB1250 Board Support Package
-    *  
-    *  Global constants and macros		File: sb1250_defs.h	
-    *  
-    *  This file contains macros and definitions used by the other
-    *  include files.
-    *
-    *  SB1250 specification level:  User's manual 1/02/02
-    *  
-    *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
-    *  
-    *********************************************************************  
-    *
-    *  Copyright 2000,2001,2002,2003
-    *  Broadcom Corporation. All rights reserved.
-    *  
-    *  This software is furnished under license and may be used and 
-    *  copied only in accordance with the following terms and 
-    *  conditions.  Subject to these conditions, you may download, 
-    *  copy, install, use, modify and distribute modified or unmodified 
-    *  copies of this software in source and/or binary form.  No title 
-    *  or ownership is transferred hereby.
-    *  
-    *  1) Any source code used, modified or distributed must reproduce 
-    *     and retain this copyright notice and list of conditions 
-    *     as they appear in the source file.
-    *  
-    *  2) No right is granted to use any trade name, trademark, or 
-    *     logo of Broadcom Corporation.  The "Broadcom Corporation" 
-    *     name may not be used to endorse or promote products derived 
-    *     from this software without the prior written permission of 
-    *     Broadcom Corporation.
-    *  
-    *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
-    *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
-    *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 
-    *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 
-    *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 
-    *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
-    *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
-    *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
-    *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
-    *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
-    *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 
-    *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 
-    *     THE POSSIBILITY OF SUCH DAMAGE.
-    ********************************************************************* */
-
-#ifndef _SB1250_DEFS_H
-#define _SB1250_DEFS_H
-
-/*
- * These headers require ANSI C89 string concatenation, and GCC or other
- * 'long long' (64-bit integer) support.
- */
-#if !defined(__STDC__) && !defined(_MSC_VER)
-#error SiByte headers require ANSI C89 support
-#endif
-
-
-/*  *********************************************************************
-    *  Macros for feature tests, used to enable include file features
-    *  for chip features only present in certain chip revisions.
-    *
-    *  SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
-    *  which is to be exposed by the headers.  If undefined, it defaults to
-    *  "all features."
-    *
-    *  Use like:
-    *
-    *    #define SIBYTE_HDR_FEATURES	SIBYTE_HDR_FMASK_112x_PASS1
-    *
-    *		Generate defines only for that revision of chip.
-    *
-    *    #if SIBYTE_HDR_FEATURE(chip,pass)
-    *
-    *		True if header features for that revision or later of
-    *	        that particular chip type are enabled in SIBYTE_HDR_FEATURES.
-    *	        (Use this to bracket #defines for features present in a given
-    *		revision and later.)
-    *
-    *		Note that there is no implied ordering between chip types.
-    *
-    *		Note also that 'chip' and 'pass' must textually exactly
-    *		match the defines below.  So, for example,
-    *		SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
-    *		SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
-    *
-    *    #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
-    *
-    *		Same as SIBYTE_HDR_FEATURE, but true for the named revision
-    *		and earlier revisions of the named chip type.
-    *
-    *    #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
-    *
-    *		Same as SIBYTE_HDR_FEATURE, but only true for the named
-    *		revision of the named chip type.  (Note that this CANNOT
-    *		be used to verify that you're compiling only for that
-    *		particular chip/revision.  It will be true any time this
-    *		chip/revision is included in SIBYTE_HDR_FEATURES.)
-    *
-    *    #if SIBYTE_HDR_FEATURE_CHIP(chip)
-    *
-    *		True if header features for (any revision of) that chip type
-    *		are enabled in SIBYTE_HDR_FEATURES.  (Use this to bracket
-    *		#defines for features specific to a given chip type.)
-    *
-    *  Mask values currently include room for additional revisions of each
-    *  chip type, but can be renumbered at will.  Note that they MUST fit
-    *  into 31 bits and may not include C type constructs, for safe use in
-    *  CPP conditionals.  Bit positions within chip types DO indicate
-    *  ordering, so be careful when adding support for new minor revs.
-    ********************************************************************* */
-
-#define	SIBYTE_HDR_FMASK_1250_ALL		0x00000ff
-#define	SIBYTE_HDR_FMASK_1250_PASS1		0x0000001
-#define	SIBYTE_HDR_FMASK_1250_PASS2		0x0000002
-
-#define	SIBYTE_HDR_FMASK_112x_ALL		0x0000f00
-#define	SIBYTE_HDR_FMASK_112x_PASS1		0x0000100
-#define SIBYTE_HDR_FMASK_112x_PASS3		0x0000200
-
-/* Bit mask for chip/revision.  (use _ALL for all revisions of a chip).  */ 
-#define	SIBYTE_HDR_FMASK(chip, pass)					\
-    (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
-#define	SIBYTE_HDR_FMASK_ALLREVS(chip)					\
-    (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
-
-#define	SIBYTE_HDR_FMASK_ALL						\
-    (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
-
-#ifndef SIBYTE_HDR_FEATURES
-#define	SIBYTE_HDR_FEATURES			SIBYTE_HDR_FMASK_ALL
-#endif
-
-
-/* Bit mask for revisions of chip exclusively before the named revision.  */
-#define	SIBYTE_HDR_FMASK_BEFORE(chip, pass)				\
-    ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
-
-/* Bit mask for revisions of chip exclusively after the named revision.  */
-#define	SIBYTE_HDR_FMASK_AFTER(chip, pass)				\
-    (~(SIBYTE_HDR_FMASK(chip, pass)					\
-     | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
-
-
-/* True if header features enabled for (any revision of) that chip type.  */
-#define SIBYTE_HDR_FEATURE_CHIP(chip)					\
-    (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
-
-/* True if header features enabled for that rev or later, inclusive.  */
-#define SIBYTE_HDR_FEATURE(chip, pass)					\
-    (!! ((SIBYTE_HDR_FMASK(chip, pass)					\
-	  | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
-
-/* True if header features enabled for exactly that rev.  */
-#define SIBYTE_HDR_FEATURE_EXACT(chip, pass)				\
-    (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
-
-/* True if header features enabled for that rev or before, inclusive.  */
-#define SIBYTE_HDR_FEATURE_UP_TO(chip, pass)				\
-    (!! ((SIBYTE_HDR_FMASK(chip, pass)					\
-	 | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
-
-
-/*  *********************************************************************
-    *  Naming schemes for constants in these files:
-    *  
-    *  M_xxx           MASK constant (identifies bits in a register). 
-    *                  For multi-bit fields, all bits in the field will
-    *                  be set.
-    *
-    *  K_xxx           "Code" constant (value for data in a multi-bit
-    *                  field).  The value is right justified.
-    *
-    *  V_xxx           "Value" constant.  This is the same as the 
-    *                  corresponding "K_xxx" constant, except it is
-    *                  shifted to the correct position in the register.
-    *
-    *  S_xxx           SHIFT constant.  This is the number of bits that
-    *                  a field value (code) needs to be shifted 
-    *                  (towards the left) to put the value in the right
-    *                  position for the register.
-    *
-    *  A_xxx           ADDRESS constant.  This will be a physical 
-    *                  address.  Use the PHYS_TO_K1 macro to generate
-    *                  a K1SEG address.
-    *
-    *  R_xxx           RELATIVE offset constant.  This is an offset from
-    *                  an A_xxx constant (usually the first register in
-    *                  a group).
-    *  
-    *  G_xxx(X)        GET value.  This macro obtains a multi-bit field
-    *                  from a register, masks it, and shifts it to
-    *                  the bottom of the register (retrieving a K_xxx
-    *                  value, for example).
-    *
-    *  V_xxx(X)        VALUE.  This macro computes the value of a
-    *                  K_xxx constant shifted to the correct position
-    *                  in the register.
-    ********************************************************************* */
-
-
-
-
-/*
- * Cast to 64-bit number.  Presumably the syntax is different in 
- * assembly language.
- *
- * Note: you'll need to define uint32_t and uint64_t in your headers.
- */
-
-#if !defined(__ASSEMBLER__)
-#define _SB_MAKE64(x) ((u64_t)(x))
-#define _SB_MAKE32(x) ((u32_t)(x))
-#else
-#define _SB_MAKE64(x) (x)
-#define _SB_MAKE32(x) (x)
-#endif
-
-
-/*
- * Make a mask for 1 bit at position 'n'
- */
-
-#define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
-#define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
-
-/*
- * Make a mask for 'v' bits at position 'n'
- */
-
-#define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
-#define _SB_MAKEMASK_32(v,n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
-
-/*
- * Make a value at 'v' at bit position 'n'
- */
-
-#define _SB_MAKEVALUE(v,n) (_SB_MAKE64(v) << _SB_MAKE64(n))
-#define _SB_MAKEVALUE_32(v,n) (_SB_MAKE32(v) << _SB_MAKE32(n))
-
-#define _SB_GETVALUE(v,n,m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
-#define _SB_GETVALUE_32(v,n,m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
-
-/*
- * Macros to read/write on-chip registers
- * XXX should we do the PHYS_TO_K1 here?
- */
-
-
-#if !defined(__ASSEMBLER__)
-#define SBWRITECSR(csr,val) *((volatile word_t *) MIPS64_ADDR_K1(csr)) = (val)
-#define SBREADCSR(csr) (*((volatile word_t *) MIPS64_ADDR_K1(csr)))
-#endif /* __ASSEMBLER__ */
-
-#endif
diff --git a/kernel/src/platform/sb1/sb1250_int.h b/kernel/src/platform/sb1/sb1250_int.h
deleted file mode 100644
index 39713792..00000000
--- a/kernel/src/platform/sb1/sb1250_int.h
+++ /dev/null
@@ -1,263 +0,0 @@
-/*  *********************************************************************
-    *  SB1250 Board Support Package
-    *  
-    *  Interrupt Mapper definitions		File: sb1250_int.h
-    *  
-    *  This module contains constants for manipulating the SB1250's
-    *  interrupt mapper and definitions for the interrupt sources.
-    *  
-    *  SB1250 specification level:  User's manual 1/02/02
-    *  
-    *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
-    *  
-    *********************************************************************  
-    *
-    *  Copyright 2000,2001,2002,2003
-    *  Broadcom Corporation. All rights reserved.
-    *  
-    *  This software is furnished under license and may be used and 
-    *  copied only in accordance with the following terms and 
-    *  conditions.  Subject to these conditions, you may download, 
-    *  copy, install, use, modify and distribute modified or unmodified 
-    *  copies of this software in source and/or binary form.  No title 
-    *  or ownership is transferred hereby.
-    *  
-    *  1) Any source code used, modified or distributed must reproduce 
-    *     and retain this copyright notice and list of conditions 
-    *     as they appear in the source file.
-    *  
-    *  2) No right is granted to use any trade name, trademark, or 
-    *     logo of Broadcom Corporation.  The "Broadcom Corporation" 
-    *     name may not be used to endorse or promote products derived 
-    *     from this software without the prior written permission of 
-    *     Broadcom Corporation.
-    *  
-    *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
-    *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
-    *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 
-    *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 
-    *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 
-    *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
-    *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
-    *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
-    *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
-    *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
-    *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 
-    *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 
-    *     THE POSSIBILITY OF SUCH DAMAGE.
-    ********************************************************************* */
-
-
-#ifndef _SB1250_INT_H
-#define _SB1250_INT_H
-
-#include "sb1250_defs.h"
-
-/*  *********************************************************************
-    *  Interrupt Mapper Constants
-    ********************************************************************* */
-
-/*
- * Interrupt sources (Table 4-8, UM 0.2)
- * 
- * First, the interrupt numbers.
- */
-
-#define K_INT_WATCHDOG_TIMER_0      0
-#define K_INT_WATCHDOG_TIMER_1      1
-#define K_INT_TIMER_0               2
-#define K_INT_TIMER_1               3
-#define K_INT_TIMER_2               4
-#define K_INT_TIMER_3               5
-#define K_INT_SMB_0                 6
-#define K_INT_SMB_1                 7
-#define K_INT_UART_0                8
-#define K_INT_UART_1                9
-#define K_INT_SER_0                 10
-#define K_INT_SER_1                 11
-#define K_INT_PCMCIA                12
-#define K_INT_ADDR_TRAP             13
-#define K_INT_PERF_CNT              14
-#define K_INT_TRACE_FREEZE          15
-#define K_INT_BAD_ECC               16
-#define K_INT_COR_ECC               17
-#define K_INT_IO_BUS                18
-#define K_INT_MAC_0                 19
-#define K_INT_MAC_1                 20
-#define K_INT_MAC_2                 21
-#define K_INT_DM_CH_0               22
-#define K_INT_DM_CH_1               23
-#define K_INT_DM_CH_2               24
-#define K_INT_DM_CH_3               25
-#define K_INT_MBOX_0                26
-#define K_INT_MBOX_1                27
-#define K_INT_MBOX_2                28
-#define K_INT_MBOX_3                29
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define K_INT_CYCLE_CP0_INT	    30
-#define K_INT_CYCLE_CP1_INT	    31
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define K_INT_GPIO_0                32
-#define K_INT_GPIO_1                33
-#define K_INT_GPIO_2                34
-#define K_INT_GPIO_3                35
-#define K_INT_GPIO_4                36
-#define K_INT_GPIO_5                37
-#define K_INT_GPIO_6                38
-#define K_INT_GPIO_7                39
-#define K_INT_GPIO_8                40
-#define K_INT_GPIO_9                41
-#define K_INT_GPIO_10               42
-#define K_INT_GPIO_11               43
-#define K_INT_GPIO_12               44
-#define K_INT_GPIO_13               45
-#define K_INT_GPIO_14               46
-#define K_INT_GPIO_15               47
-#define K_INT_LDT_FATAL             48
-#define K_INT_LDT_NONFATAL          49
-#define K_INT_LDT_SMI               50
-#define K_INT_LDT_NMI               51
-#define K_INT_LDT_INIT              52
-#define K_INT_LDT_STARTUP           53
-#define K_INT_LDT_EXT               54
-#define K_INT_PCI_ERROR             55
-#define K_INT_PCI_INTA              56
-#define K_INT_PCI_INTB              57
-#define K_INT_PCI_INTC              58
-#define K_INT_PCI_INTD              59
-#define K_INT_SPARE_2               60
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define K_INT_MAC_0_CH1		    61
-#define K_INT_MAC_1_CH1		    62
-#define K_INT_MAC_2_CH1		    63
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-/*
- * Mask values for each interrupt
- */
-
-#define M_INT_WATCHDOG_TIMER_0      _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_0)
-#define M_INT_WATCHDOG_TIMER_1      _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_1)
-#define M_INT_TIMER_0               _SB_MAKEMASK1(K_INT_TIMER_0)
-#define M_INT_TIMER_1               _SB_MAKEMASK1(K_INT_TIMER_1)
-#define M_INT_TIMER_2               _SB_MAKEMASK1(K_INT_TIMER_2)
-#define M_INT_TIMER_3               _SB_MAKEMASK1(K_INT_TIMER_3)
-#define M_INT_SMB_0                 _SB_MAKEMASK1(K_INT_SMB_0)
-#define M_INT_SMB_1                 _SB_MAKEMASK1(K_INT_SMB_1)
-#define M_INT_UART_0                _SB_MAKEMASK1(K_INT_UART_0)
-#define M_INT_UART_1                _SB_MAKEMASK1(K_INT_UART_1)
-#define M_INT_SER_0                 _SB_MAKEMASK1(K_INT_SER_0)
-#define M_INT_SER_1                 _SB_MAKEMASK1(K_INT_SER_1)
-#define M_INT_PCMCIA                _SB_MAKEMASK1(K_INT_PCMCIA)
-#define M_INT_ADDR_TRAP             _SB_MAKEMASK1(K_INT_ADDR_TRAP)
-#define M_INT_PERF_CNT              _SB_MAKEMASK1(K_INT_PERF_CNT)
-#define M_INT_TRACE_FREEZE          _SB_MAKEMASK1(K_INT_TRACE_FREEZE)
-#define M_INT_BAD_ECC               _SB_MAKEMASK1(K_INT_BAD_ECC)
-#define M_INT_COR_ECC               _SB_MAKEMASK1(K_INT_COR_ECC)
-#define M_INT_IO_BUS                _SB_MAKEMASK1(K_INT_IO_BUS)
-#define M_INT_MAC_0                 _SB_MAKEMASK1(K_INT_MAC_0)
-#define M_INT_MAC_1                 _SB_MAKEMASK1(K_INT_MAC_1)
-#define M_INT_MAC_2                 _SB_MAKEMASK1(K_INT_MAC_2)
-#define M_INT_DM_CH_0               _SB_MAKEMASK1(K_INT_DM_CH_0)
-#define M_INT_DM_CH_1               _SB_MAKEMASK1(K_INT_DM_CH_1)
-#define M_INT_DM_CH_2               _SB_MAKEMASK1(K_INT_DM_CH_2)
-#define M_INT_DM_CH_3               _SB_MAKEMASK1(K_INT_DM_CH_3)
-#define M_INT_MBOX_0                _SB_MAKEMASK1(K_INT_MBOX_0)
-#define M_INT_MBOX_1                _SB_MAKEMASK1(K_INT_MBOX_1)
-#define M_INT_MBOX_2                _SB_MAKEMASK1(K_INT_MBOX_2)
-#define M_INT_MBOX_3                _SB_MAKEMASK1(K_INT_MBOX_3)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_INT_CYCLE_CP0_INT	    _SB_MAKEMASK1(K_INT_CYCLE_CP0_INT)
-#define M_INT_CYCLE_CP1_INT	    _SB_MAKEMASK1(K_INT_CYCLE_CP1_INT)
-#endif /* 1250 PASS2 || 112x PASS1 */
-#define M_INT_GPIO_0                _SB_MAKEMASK1(K_INT_GPIO_0)
-#define M_INT_GPIO_1                _SB_MAKEMASK1(K_INT_GPIO_1)
-#define M_INT_GPIO_2                _SB_MAKEMASK1(K_INT_GPIO_2)
-#define M_INT_GPIO_3                _SB_MAKEMASK1(K_INT_GPIO_3)
-#define M_INT_GPIO_4                _SB_MAKEMASK1(K_INT_GPIO_4)
-#define M_INT_GPIO_5                _SB_MAKEMASK1(K_INT_GPIO_5)
-#define M_INT_GPIO_6                _SB_MAKEMASK1(K_INT_GPIO_6)
-#define M_INT_GPIO_7                _SB_MAKEMASK1(K_INT_GPIO_7)
-#define M_INT_GPIO_8                _SB_MAKEMASK1(K_INT_GPIO_8)
-#define M_INT_GPIO_9                _SB_MAKEMASK1(K_INT_GPIO_9)
-#define M_INT_GPIO_10               _SB_MAKEMASK1(K_INT_GPIO_10)
-#define M_INT_GPIO_11               _SB_MAKEMASK1(K_INT_GPIO_11)
-#define M_INT_GPIO_12               _SB_MAKEMASK1(K_INT_GPIO_12)
-#define M_INT_GPIO_13               _SB_MAKEMASK1(K_INT_GPIO_13)
-#define M_INT_GPIO_14               _SB_MAKEMASK1(K_INT_GPIO_14)
-#define M_INT_GPIO_15               _SB_MAKEMASK1(K_INT_GPIO_15)
-#define M_INT_LDT_FATAL             _SB_MAKEMASK1(K_INT_LDT_FATAL)
-#define M_INT_LDT_NONFATAL          _SB_MAKEMASK1(K_INT_LDT_NONFATAL)
-#define M_INT_LDT_SMI               _SB_MAKEMASK1(K_INT_LDT_SMI)
-#define M_INT_LDT_NMI               _SB_MAKEMASK1(K_INT_LDT_NMI)
-#define M_INT_LDT_INIT              _SB_MAKEMASK1(K_INT_LDT_INIT)
-#define M_INT_LDT_STARTUP           _SB_MAKEMASK1(K_INT_LDT_STARTUP)
-#define M_INT_LDT_EXT               _SB_MAKEMASK1(K_INT_LDT_EXT)
-#define M_INT_PCI_ERROR             _SB_MAKEMASK1(K_INT_PCI_ERROR)
-#define M_INT_PCI_INTA              _SB_MAKEMASK1(K_INT_PCI_INTA)
-#define M_INT_PCI_INTB              _SB_MAKEMASK1(K_INT_PCI_INTB)
-#define M_INT_PCI_INTC              _SB_MAKEMASK1(K_INT_PCI_INTC)
-#define M_INT_PCI_INTD              _SB_MAKEMASK1(K_INT_PCI_INTD)
-#define M_INT_SPARE_2               _SB_MAKEMASK1(K_INT_SPARE_2)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_INT_MAC_0_CH1		    _SB_MAKEMASK1(K_INT_MAC_0_CH1)
-#define M_INT_MAC_1_CH1		    _SB_MAKEMASK1(K_INT_MAC_1_CH1)
-#define M_INT_MAC_2_CH1		    _SB_MAKEMASK1(K_INT_MAC_2_CH1)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-/*
- * Interrupt mappings
- */
-
-#define K_INT_MAP_I0	0		/* interrupt pins on processor */
-#define K_INT_MAP_I1	1
-#define K_INT_MAP_I2	2
-#define K_INT_MAP_I3	3
-#define K_INT_MAP_I4	4
-#define K_INT_MAP_I5	5
-#define K_INT_MAP_NMI	6		/* nonmaskable */
-#define K_INT_MAP_DINT	7		/* debug interrupt */
-
-/*
- * LDT Interrupt Set Register (table 4-5)
- */
-
-#define S_INT_LDT_INTMSG	      0
-#define M_INT_LDT_INTMSG              _SB_MAKEMASK(3,S_INT_LDT_INTMSG)
-#define V_INT_LDT_INTMSG(x)           _SB_MAKEVALUE(x,S_INT_LDT_INTMSG)
-#define G_INT_LDT_INTMSG(x)           _SB_GETVALUE(x,S_INT_LDT_INTMSG,M_INT_LDT_INTMSG)
-
-#define K_INT_LDT_INTMSG_FIXED	      0
-#define K_INT_LDT_INTMSG_ARBITRATED   1
-#define K_INT_LDT_INTMSG_SMI	      2
-#define K_INT_LDT_INTMSG_NMI	      3
-#define K_INT_LDT_INTMSG_INIT	      4
-#define K_INT_LDT_INTMSG_STARTUP      5
-#define K_INT_LDT_INTMSG_EXTINT	      6
-#define K_INT_LDT_INTMSG_RESERVED     7
-
-#define M_INT_LDT_EDGETRIGGER         0
-#define M_INT_LDT_LEVELTRIGGER        _SB_MAKEMASK1(3)
-
-#define M_INT_LDT_PHYSICALDEST        0
-#define M_INT_LDT_LOGICALDEST         _SB_MAKEMASK1(4)
-
-#define S_INT_LDT_INTDEST             5
-#define M_INT_LDT_INTDEST             _SB_MAKEMASK(10,S_INT_LDT_INTDEST)
-#define V_INT_LDT_INTDEST(x)          _SB_MAKEVALUE(x,S_INT_LDT_INTDEST)
-#define G_INT_LDT_INTDEST(x)          _SB_GETVALUE(x,S_INT_LDT_INTDEST,M_INT_LDT_INTDEST)
-
-#define S_INT_LDT_VECTOR              13
-#define M_INT_LDT_VECTOR              _SB_MAKEMASK(8,S_INT_LDT_VECTOR)
-#define V_INT_LDT_VECTOR(x)           _SB_MAKEVALUE(x,S_INT_LDT_VECTOR)
-#define G_INT_LDT_VECTOR(x)           _SB_GETVALUE(x,S_INT_LDT_VECTOR,M_INT_LDT_VECTOR)
-
-/*
- * Vector format (Table 4-6)
- */
-
-#define M_LDTVECT_RAISEINT		0x00
-#define M_LDTVECT_RAISEMBOX             0x40
-
-
-#endif
diff --git a/kernel/src/platform/sb1/sb1250_regs.h b/kernel/src/platform/sb1/sb1250_regs.h
deleted file mode 100644
index a6a655ad..00000000
--- a/kernel/src/platform/sb1/sb1250_regs.h
+++ /dev/null
@@ -1,744 +0,0 @@
-/*  *********************************************************************
-    *  SB1250 Board Support Package
-    *  
-    *  Register Definitions                     File: sb1250_regs.h
-    *  
-    *  This module contains the addresses of the on-chip peripherals
-    *  on the SB1250.
-    *  
-    *  SB1250 specification level:  0.2
-    *  
-    *  Author:  Mitch Lichtenberg (mitch@sibyte.com)
-    *  
-    *********************************************************************  
-    *
-    *  Copyright 2000,2001
-    *  Broadcom Corporation. All rights reserved.
-    *  
-    *  This program is free software; you can redistribute it and/or 
-    *  modify it under the terms of the GNU General Public License as 
-    *  published by the Free Software Foundation; either version 2 of 
-    *  the License, or (at your option) any later version.
-    *
-    *  This program is distributed in the hope that it will be useful,
-    *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-    *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    *  GNU General Public License for more details.
-    *
-    *  You should have received a copy of the GNU General Public License
-    *  along with this program; if not, write to the Free Software
-    *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, 
-    *  MA 02111-1307 USA
-    ********************************************************************* */
-
-
-#ifndef _SB1250_REGS_H
-#define _SB1250_REGS_H
-
-#include "sb1250_defs.h"
-
-
-/*  *********************************************************************
-    *  Some general notes:
-    *  
-    *  For the most part, when there is more than one peripheral
-    *  of the same type on the SOC, the constants below will be
-    *  offsets from the base of each peripheral.  For example,
-    *  the MAC registers are described as offsets from the first
-    *  MAC register, and there will be a MAC_REGISTER() macro
-    *  to calculate the base address of a given MAC.  
-    *  
-    *  The information in this file is based on the SB1250 SOC
-    *  manual version 0.2, July 2000.
-    ********************************************************************* */
-
-
-/*  ********************************************************************* 
-    * Memory Controller Registers
-    ********************************************************************* */
-
-#define A_MC_BASE_0                 0x0010051000
-#define A_MC_BASE_1                 0x0010052000
-#define MC_REGISTER_SPACING         0x1000
-
-#define A_MC_BASE(ctlid)            ((ctlid)*MC_REGISTER_SPACING+A_MC_BASE_0)
-#define A_MC_REGISTER(ctlid,reg)    (A_MC_BASE(ctlid)+(reg))
-
-#define R_MC_CONFIG                 0x0000000100
-#define R_MC_DRAMCMD                0x0000000120
-#define R_MC_DRAMMODE               0x0000000140
-#define R_MC_TIMING1                0x0000000160
-#define R_MC_TIMING2                0x0000000180
-#define R_MC_CS_START               0x00000001A0
-#define R_MC_CS_END                 0x00000001C0
-#define R_MC_CS_INTERLEAVE          0x00000001E0
-#define S_MC_CS_STARTEND            16
-
-#define R_MC_CSX_BASE               0x0000000200
-#define R_MC_CSX_ROW                0x0000000000	/* relative to CSX_BASE, above */
-#define R_MC_CSX_COL                0x0000000020	/* relative to CSX_BASE, above */
-#define R_MC_CSX_BA                 0x0000000040	/* relative to CSX_BASE, above */
-#define MC_CSX_SPACING              0x0000000060	/* relative to CSX_BASE, above */
-
-#define R_MC_CS0_ROW                0x0000000200
-#define R_MC_CS0_COL                0x0000000220
-#define R_MC_CS0_BA                 0x0000000240
-#define R_MC_CS1_ROW                0x0000000260
-#define R_MC_CS1_COL                0x0000000280
-#define R_MC_CS1_BA                 0x00000002A0
-#define R_MC_CS2_ROW                0x00000002C0
-#define R_MC_CS2_COL                0x00000002E0
-#define R_MC_CS2_BA                 0x0000000300
-#define R_MC_CS3_ROW                0x0000000320
-#define R_MC_CS3_COL                0x0000000340
-#define R_MC_CS3_BA                 0x0000000360
-#define R_MC_CS_ATTR                0x0000000380
-#define R_MC_TEST_DATA              0x0000000400
-#define R_MC_TEST_ECC               0x0000000420
-#define R_MC_MCLK_CFG               0x0000000500
-
-/*  ********************************************************************* 
-    * L2 Cache Control Registers
-    ********************************************************************* */
-
-#define A_L2_READ_ADDRESS           0x0010040018
-#define A_L2_EEC_ADDRESS            0x0010040038
-#define A_L2_WAY_DISABLE            0x0010041000
-#define A_L2_MAKEDISABLE(x)         (A_L2_WAY_DISABLE | (((~(x))&0x0F) << 8))
-#define A_L2_MGMT_TAG_BASE          0x00D0000000
-
-/*  ********************************************************************* 
-    * PCI Interface Registers
-    ********************************************************************* */
-
-#define A_PCI_TYPE00_HEADER         0x00DE000000
-#define A_PCI_TYPE01_HEADER         0x00DE000800
-
-
-/*  ********************************************************************* 
-    * Ethernet DMA and MACs
-    ********************************************************************* */
-
-#define A_MAC_BASE_0                0x0010064000
-#define A_MAC_BASE_1                0x0010065000
-#define A_MAC_BASE_2                0x0010066000
-
-#define MAC_SPACING                 0x1000
-#define MAC_DMA_TXRX_SPACING        0x0400
-#define MAC_DMA_CHANNEL_SPACING     0x0100
-#define DMA_RX                      0
-#define DMA_TX                      1
-#define MAC_NUM_DMACHAN		    2		    /* channels per direction */
-
-#define MAC_NUM_PORTS               3
-
-#define A_MAC_CHANNEL_BASE(macnum)                  \
-            (A_MAC_BASE_0 +                         \
-             MAC_SPACING*(macnum))
-
-#define A_MAC_REGISTER(macnum,reg)                  \
-            (A_MAC_BASE_0 +                         \
-             MAC_SPACING*(macnum) + (reg))
-
-
-#define R_MAC_DMA_CHANNELS		0x800 /* Relative to A_MAC_CHANNEL_BASE */
-
-#define A_MAC_DMA_CHANNEL_BASE(macnum,txrx,chan)    \
-             ((A_MAC_CHANNEL_BASE(macnum)) +        \
-             R_MAC_DMA_CHANNELS +                   \
-             (MAC_DMA_TXRX_SPACING*(txrx)) +        \
-             (MAC_DMA_CHANNEL_SPACING*(chan)))
-
-#define R_MAC_DMA_CHANNEL_BASE(txrx,chan)    \
-             (R_MAC_DMA_CHANNELS +                   \
-             (MAC_DMA_TXRX_SPACING*(txrx)) +        \
-             (MAC_DMA_CHANNEL_SPACING*(chan)))
-
-#define A_MAC_DMA_REGISTER(macnum,txrx,chan,reg)           \
-            (A_MAC_DMA_CHANNEL_BASE(macnum,txrx,chan) +    \
-            (reg))
-
-#define R_MAC_DMA_REGISTER(txrx,chan,reg)           \
-            (R_MAC_DMA_CHANNEL_BASE(txrx,chan) +    \
-            (reg))
-
-/* 
- * DMA channel registers, relative to A_MAC_DMA_CHANNEL_BASE
- */
-
-#define R_MAC_DMA_CONFIG0               0x00000000
-#define R_MAC_DMA_CONFIG1               0x00000008
-#define R_MAC_DMA_DSCR_BASE             0x00000010
-#define R_MAC_DMA_DSCR_CNT              0x00000018
-#define R_MAC_DMA_CUR_DSCRA             0x00000020
-#define R_MAC_DMA_CUR_DSCRB             0x00000028
-#define R_MAC_DMA_CUR_DSCRADDR          0x00000030
-
-/*
- * RMON Counters
- */
-
-#define R_MAC_RMON_TX_BYTES             0x00000000
-#define R_MAC_RMON_COLLISIONS           0x00000008
-#define R_MAC_RMON_LATE_COL             0x00000010
-#define R_MAC_RMON_EX_COL               0x00000018
-#define R_MAC_RMON_FCS_ERROR            0x00000020
-#define R_MAC_RMON_TX_ABORT             0x00000028
-/* Counter #6 (0x30) now reserved */
-#define R_MAC_RMON_TX_BAD               0x00000038
-#define R_MAC_RMON_TX_GOOD              0x00000040
-#define R_MAC_RMON_TX_RUNT              0x00000048
-#define R_MAC_RMON_TX_OVERSIZE          0x00000050
-#define R_MAC_RMON_RX_BYTES             0x00000080
-#define R_MAC_RMON_RX_MCAST             0x00000088
-#define R_MAC_RMON_RX_BCAST             0x00000090
-#define R_MAC_RMON_RX_BAD               0x00000098
-#define R_MAC_RMON_RX_GOOD              0x000000A0
-#define R_MAC_RMON_RX_RUNT              0x000000A8
-#define R_MAC_RMON_RX_OVERSIZE          0x000000B0
-#define R_MAC_RMON_RX_FCS_ERROR         0x000000B8
-#define R_MAC_RMON_RX_LENGTH_ERROR      0x000000C0
-#define R_MAC_RMON_RX_CODE_ERROR        0x000000C8
-#define R_MAC_RMON_RX_ALIGN_ERROR       0x000000D0
-
-/* Updated to spec 0.2 */
-#define R_MAC_CFG                       0x00000100
-#define R_MAC_THRSH_CFG                 0x00000108
-#define R_MAC_VLANTAG                   0x00000110
-#define R_MAC_FRAMECFG                  0x00000118
-#define R_MAC_EOPCNT                    0x00000120
-#define R_MAC_FIFO_PTRS                 0x00000130
-#define R_MAC_ADFILTER_CFG              0x00000200
-#define R_MAC_ETHERNET_ADDR             0x00000208
-#define R_MAC_PKT_TYPE                  0x00000210
-#define R_MAC_HASH_BASE                 0x00000240
-#define R_MAC_ADDR_BASE                 0x00000280
-#define R_MAC_CHLO0_BASE                0x00000300
-#define R_MAC_CHUP0_BASE                0x00000320
-#define R_MAC_ENABLE                    0x00000400
-#define R_MAC_STATUS                    0x00000408
-#define R_MAC_INT_MASK                  0x00000410
-#define R_MAC_TXD_CTL                   0x00000420
-#define R_MAC_MDIO                      0x00000428
-#define R_MAC_DEBUG_STATUS              0x00000448
-
-#define MAC_HASH_COUNT			8
-#define MAC_ADDR_COUNT			8
-#define MAC_CHMAP_COUNT			4
-
-
-/*  ********************************************************************* 
-    * DUART Registers
-    ********************************************************************* */
-
-
-#define R_DUART_NUM_PORTS           2
-
-#define A_DUART                     0x0010060000
-
-#define A_DUART_REG(r)
-
-#define DUART_CHANREG_SPACING       0x100
-#define A_DUART_CHANREG(chan,reg)   (A_DUART + DUART_CHANREG_SPACING*(chan) + (reg))
-#define R_DUART_CHANREG(chan,reg)   (DUART_CHANREG_SPACING*(chan) + (reg))
-
-#define R_DUART_MODE_REG_1	    0x100
-#define R_DUART_MODE_REG_2	    0x110
-#define R_DUART_STATUS              0x120
-#define R_DUART_CLK_SEL             0x130
-#define R_DUART_CMD                 0x150
-#define R_DUART_RX_HOLD             0x160
-#define R_DUART_TX_HOLD             0x170
-
-/*
- * The IMR and ISR can't be addressed with A_DUART_CHANREG,
- * so use this macro instead.
- */
-
-#define R_DUART_AUX_CTRL            0x310
-#define R_DUART_ISR_A               0x320
-#define R_DUART_IMR_A               0x330
-#define R_DUART_ISR_B               0x340
-#define R_DUART_IMR_B               0x350
-#define R_DUART_OUT_PORT            0x360
-#define R_DUART_OPCR                0x370
-
-#define R_DUART_SET_OPR		    0x3B0
-#define R_DUART_CLEAR_OPR	    0x3C0
-
-#define DUART_IMRISR_SPACING        0x20
-
-#define R_DUART_IMRREG(chan)	    (R_DUART_IMR_A + (chan)*DUART_IMRISR_SPACING)
-#define R_DUART_ISRREG(chan)	    (R_DUART_ISR_A + (chan)*DUART_IMRISR_SPACING)
-
-#define A_DUART_IMRREG(chan)	    (A_DUART + R_DUART_IMRREG(chan))
-#define A_DUART_ISRREG(chan)	    (A_DUART + R_DUART_ISRREG(chan))
-
-/*
- * These constants are the absolute addresses.
- */
-
-#define A_DUART_MODE_REG_1_A        0x0010060100
-#define A_DUART_MODE_REG_2_A        0x0010060110
-#define A_DUART_STATUS_A            0x0010060120
-#define A_DUART_CLK_SEL_A           0x0010060130
-#define A_DUART_CMD_A               0x0010060150
-#define A_DUART_RX_HOLD_A           0x0010060160
-#define A_DUART_TX_HOLD_A           0x0010060170
-
-#define A_DUART_MODE_REG_1_B        0x0010060200
-#define A_DUART_MODE_REG_2_B        0x0010060210
-#define A_DUART_STATUS_B            0x0010060220
-#define A_DUART_CLK_SEL_B           0x0010060230
-#define A_DUART_CMD_B               0x0010060250
-#define A_DUART_RX_HOLD_B           0x0010060260
-#define A_DUART_TX_HOLD_B           0x0010060270
-
-#define A_DUART_INPORT_CHNG         0x0010060300
-#define A_DUART_AUX_CTRL            0x0010060310
-#define A_DUART_ISR_A               0x0010060320
-#define A_DUART_IMR_A               0x0010060330
-#define A_DUART_ISR_B               0x0010060340
-#define A_DUART_IMR_B               0x0010060350
-#define A_DUART_OUT_PORT            0x0010060360
-#define A_DUART_OPCR                0x0010060370
-#define A_DUART_IN_PORT             0x0010060380
-#define A_DUART_ISR                 0x0010060390
-#define A_DUART_IMR                 0x00100603A0
-#define A_DUART_SET_OPR             0x00100603B0
-#define A_DUART_CLEAR_OPR           0x00100603C0
-#define A_DUART_INPORT_CHNG_A       0x00100603D0
-#define A_DUART_INPORT_CHNG_B       0x00100603E0
-
-/*  ********************************************************************* 
-    * Synchronous Serial Registers
-    ********************************************************************* */
-
-
-#define A_SER_BASE_0                0x0010060400
-#define A_SER_BASE_1                0x0010060800
-#define SER_SPACING                 0x400
-
-#define SER_DMA_TXRX_SPACING        0x80
-
-#define SER_NUM_PORTS               2
-
-#define A_SER_CHANNEL_BASE(sernum)                  \
-            (A_SER_BASE_0 +                         \
-             SER_SPACING*(sernum))
-
-#define A_SER_REGISTER(sernum,reg)                  \
-            (A_SER_BASE_0 +                         \
-             SER_SPACING*(sernum) + (reg))
-
-
-#define R_SER_DMA_CHANNELS		0   /* Relative to A_SER_BASE_x */
-
-#define A_SER_DMA_CHANNEL_BASE(sernum,txrx)    \
-             ((A_SER_CHANNEL_BASE(sernum)) +        \
-             R_SER_DMA_CHANNELS +                   \
-             (SER_DMA_TXRX_SPACING*(txrx)))
-
-#define A_SER_DMA_REGISTER(sernum,txrx,reg)           \
-            (A_SER_DMA_CHANNEL_BASE(sernum,txrx) +    \
-            (reg))
-
-
-/* 
- * DMA channel registers, relative to A_SER_DMA_CHANNEL_BASE
- */
-
-#define R_SER_DMA_CONFIG0           0x00000000
-#define R_SER_DMA_CONFIG1           0x00000008
-#define R_SER_DMA_DSCR_BASE         0x00000010
-#define R_SER_DMA_DSCR_CNT          0x00000018
-#define R_SER_DMA_CUR_DSCRA         0x00000020
-#define R_SER_DMA_CUR_DSCRB         0x00000028
-#define R_SER_DMA_CUR_DSCRADDR      0x00000030
-
-#define R_SER_DMA_CONFIG0_RX        0x00000000
-#define R_SER_DMA_CONFIG1_RX        0x00000008
-#define R_SER_DMA_DSCR_BASE_RX      0x00000010
-#define R_SER_DMA_DSCR_COUNT_RX     0x00000018
-#define R_SER_DMA_CUR_DSCR_A_RX     0x00000020
-#define R_SER_DMA_CUR_DSCR_B_RX     0x00000028
-#define R_SER_DMA_CUR_DSCR_ADDR_RX  0x00000030
-
-#define R_SER_DMA_CONFIG0_TX        0x00000080
-#define R_SER_DMA_CONFIG1_TX        0x00000088
-#define R_SER_DMA_DSCR_BASE_TX      0x00000090
-#define R_SER_DMA_DSCR_COUNT_TX     0x00000098
-#define R_SER_DMA_CUR_DSCR_A_TX     0x000000A0
-#define R_SER_DMA_CUR_DSCR_B_TX     0x000000A8
-#define R_SER_DMA_CUR_DSCR_ADDR_TX  0x000000B0
-
-#define R_SER_MODE                  0x00000100
-#define R_SER_MINFRM_SZ             0x00000108
-#define R_SER_MAXFRM_SZ             0x00000110
-#define R_SER_ADDR                  0x00000118
-#define R_SER_USR0_ADDR             0x00000120
-#define R_SER_USR1_ADDR             0x00000128
-#define R_SER_USR2_ADDR             0x00000130
-#define R_SER_USR3_ADDR             0x00000138
-#define R_SER_CMD                   0x00000140
-#define R_SER_TX_RD_THRSH           0x00000160
-#define R_SER_TX_WR_THRSH           0x00000168
-#define R_SER_RX_RD_THRSH           0x00000170
-#define R_SER_LINE_MODE		    0x00000178
-#define R_SER_DMA_ENABLE            0x00000180
-#define R_SER_INT_MASK              0x00000190
-#define R_SER_STATUS                0x00000188
-#define R_SER_STATUS_DEBUG          0x000001A8
-#define R_SER_RX_TABLE_BASE         0x00000200
-#define SER_RX_TABLE_COUNT          16
-#define R_SER_TX_TABLE_BASE         0x00000300
-#define SER_TX_TABLE_COUNT          16
-
-/* RMON Counters */
-#define R_SER_RMON_TX_BYTE_LO       0x000001C0
-#define R_SER_RMON_TX_BYTE_HI       0x000001C8
-#define R_SER_RMON_RX_BYTE_LO       0x000001D0
-#define R_SER_RMON_RX_BYTE_HI       0x000001D8
-#define R_SER_RMON_TX_UNDERRUN      0x000001E0
-#define R_SER_RMON_RX_OVERFLOW      0x000001E8
-#define R_SER_RMON_RX_ERRORS        0x000001F0
-#define R_SER_RMON_RX_BADADDR       0x000001F8
-
-/*  ********************************************************************* 
-    * Generic Bus Registers
-    ********************************************************************* */
-
-#define IO_EXT_CFG_COUNT            8
-
-#define A_IO_EXT_BASE		    0x0010061000
-#define A_IO_EXT_REG(r)		    (A_IO_EXT_BASE + (r))
-
-#define A_IO_EXT_CFG_BASE           0x0010061000
-#define A_IO_EXT_MULT_SIZE_BASE     0x0010061100
-#define A_IO_EXT_START_ADDR_BASE    0x0010061200
-#define A_IO_EXT_TIME_CFG0_BASE     0x0010061600
-#define A_IO_EXT_TIME_CFG1_BASE     0x0010061700
-
-#define IO_EXT_REGISTER_SPACING	    8
-#define A_IO_EXT_CS_BASE(cs)	    (A_IO_EXT_CFG_BASE+IO_EXT_REGISTER_SPACING*(cs))
-#define R_IO_EXT_REG(reg,cs)	    ((cs)*IO_EXT_REGISTER_SPACING + (reg))
-
-#define R_IO_EXT_CFG		    0x0000
-#define R_IO_EXT_MULT_SIZE          0x0100
-#define R_IO_EXT_START_ADDR	    0x0200
-#define R_IO_EXT_TIME_CFG0          0x0600
-#define R_IO_EXT_TIME_CFG1          0x0700
-
-
-#define A_IO_INTERRUPT_STATUS       0x0010061A00
-#define A_IO_INTERRUPT_DATA0        0x0010061A10
-#define A_IO_INTERRUPT_DATA1        0x0010061A18
-#define A_IO_INTERRUPT_DATA2        0x0010061A20
-#define A_IO_INTERRUPT_DATA3        0x0010061A28
-#define A_IO_INTERRUPT_ADDR0        0x0010061A30
-#define A_IO_INTERRUPT_ADDR1        0x0010061A40
-#define A_IO_INTERRUPT_PARITY       0x0010061A50
-#define A_IO_PCMCIA_CFG             0x0010061A60
-#define A_IO_PCMCIA_STATUS          0x0010061A70
-#define A_IO_DRIVE_0		    0x0010061300
-#define A_IO_DRIVE_1		    0x0010061308
-#define A_IO_DRIVE_2		    0x0010061310
-#define A_IO_DRIVE_3		    0x0010061318
-
-#define R_IO_INTERRUPT_STATUS       0x0A00
-#define R_IO_INTERRUPT_DATA0        0x0A10
-#define R_IO_INTERRUPT_DATA1        0x0A18
-#define R_IO_INTERRUPT_DATA2        0x0A20
-#define R_IO_INTERRUPT_DATA3        0x0A28
-#define R_IO_INTERRUPT_ADDR0        0x0A30
-#define R_IO_INTERRUPT_ADDR1        0x0A40
-#define R_IO_INTERRUPT_PARITY       0x0A50
-#define R_IO_PCMCIA_CFG             0x0A60
-#define R_IO_PCMCIA_STATUS          0x0A70
-
-/*  ********************************************************************* 
-    * GPIO Registers
-    ********************************************************************* */
-
-#define A_GPIO_CLR_EDGE             0x0010061A80
-#define A_GPIO_INT_TYPE             0x0010061A88
-#define A_GPIO_INPUT_INVERT         0x0010061A90
-#define A_GPIO_GLITCH               0x0010061A98
-#define A_GPIO_READ                 0x0010061AA0
-#define A_GPIO_DIRECTION            0x0010061AA8
-#define A_GPIO_PIN_CLR              0x0010061AB0
-#define A_GPIO_PIN_SET              0x0010061AB8
-
-#define A_GPIO_BASE		    0x0010061A80
-
-#define R_GPIO_CLR_EDGE             0x00
-#define R_GPIO_INT_TYPE             0x08
-#define R_GPIO_INPUT_INVERT         0x10
-#define R_GPIO_GLITCH               0x18
-#define R_GPIO_READ                 0x20
-#define R_GPIO_DIRECTION            0x28
-#define R_GPIO_PIN_CLR              0x30
-#define R_GPIO_PIN_SET              0x38
-
-/*  ********************************************************************* 
-    * SMBus Registers
-    ********************************************************************* */
-
-#define A_SMB_XTRA_0                0x0010060000
-#define A_SMB_XTRA_1                0x0010060008
-#define A_SMB_FREQ_0                0x0010060010
-#define A_SMB_FREQ_1                0x0010060018
-#define A_SMB_STATUS_0              0x0010060020
-#define A_SMB_STATUS_1              0x0010060028
-#define A_SMB_CMD_0                 0x0010060030
-#define A_SMB_CMD_1                 0x0010060038
-#define A_SMB_START_0               0x0010060040
-#define A_SMB_START_1               0x0010060048
-#define A_SMB_DATA_0                0x0010060050
-#define A_SMB_DATA_1                0x0010060058
-#define A_SMB_CONTROL_0             0x0010060060
-#define A_SMB_CONTROL_1             0x0010060068
-#define A_SMB_PEC_0                 0x0010060070
-#define A_SMB_PEC_1                 0x0010060078
-
-#define A_SMB_0                     0x0010060000
-#define A_SMB_1                     0x0010060008
-#define SMB_REGISTER_SPACING        0x8
-#define A_SMB_BASE(idx)             (A_SMB_0+(idx)*SMB_REGISTER_SPACING)
-#define A_SMB_REGISTER(idx,reg)     (A_SMB_BASE(idx)+(reg))
-
-#define R_SMB_XTRA                  0x0000000000
-#define R_SMB_FREQ                  0x0000000010
-#define R_SMB_STATUS                0x0000000020
-#define R_SMB_CMD                   0x0000000030
-#define R_SMB_START                 0x0000000040
-#define R_SMB_DATA                  0x0000000050
-#define R_SMB_CONTROL               0x0000000060
-#define R_SMB_PEC                   0x0000000070
-
-/*  ********************************************************************* 
-    * Timer Registers
-    ********************************************************************* */
-
-/*
- * Watchdog timers
- */
-
-#define A_SCD_WDOG_0		    0x0010020050
-#define A_SCD_WDOG_1                0x0010020150
-#define SCD_WDOG_SPACING            0x100
-#define SCD_NUM_WDOGS		    2
-#define A_SCD_WDOG_BASE(w)          (A_SCD_WDOG_0+SCD_WDOG_SPACING*(w))
-#define A_SCD_WDOG_REGISTER(w,r)    (A_SCD_WDOG_BASE(w) + (r))
-
-#define R_SCD_WDOG_INIT		    0x0000000000
-#define R_SCD_WDOG_CNT		    0x0000000008
-#define R_SCD_WDOG_CFG		    0x0000000010
-
-#define A_SCD_WDOG_INIT_0           0x0010020050
-#define A_SCD_WDOG_CNT_0            0x0010020058
-#define A_SCD_WDOG_CFG_0            0x0010020060
-
-#define A_SCD_WDOG_INIT_1           0x0010020150
-#define A_SCD_WDOG_CNT_1            0x0010020158
-#define A_SCD_WDOG_CFG_1            0x0010020160
-
-/*
- * Generic timers
- */
-
-#define A_SCD_TIMER_0		    0x0010020070
-#define A_SCD_TIMER_1               0x0010020078
-#define A_SCD_TIMER_2		    0x0010020170
-#define A_SCD_TIMER_3               0x0010020178
-#define SCD_NUM_TIMERS		    4
-#define A_SCD_TIMER_BASE(w)         (A_SCD_TIMER_0+0x08*((w)&1)+0x100*(((w)&2)>>1))
-#define A_SCD_TIMER_REGISTER(w,r)   (A_SCD_TIMER_BASE(w) + (r))
-
-#define R_SCD_TIMER_INIT	    0x0000000000
-#define R_SCD_TIMER_CNT		    0x0000000010
-#define R_SCD_TIMER_CFG		    0x0000000020
-
-#define A_SCD_TIMER_INIT_0          0x0010020070
-#define A_SCD_TIMER_CNT_0           0x0010020080
-#define A_SCD_TIMER_CFG_0           0x0010020090
-
-#define A_SCD_TIMER_INIT_1          0x0010020078
-#define A_SCD_TIMER_CNT_1           0x0010020088
-#define A_SCD_TIMER_CFG_1           0x0010020098
-
-#define A_SCD_TIMER_INIT_2          0x0010020170
-#define A_SCD_TIMER_CNT_2           0x0010020180
-#define A_SCD_TIMER_CFG_2           0x0010020190
-
-#define A_SCD_TIMER_INIT_3          0x0010020178
-#define A_SCD_TIMER_CNT_3           0x0010020188
-#define A_SCD_TIMER_CFG_3           0x0010020198
-
-/*  ********************************************************************* 
-    * System Control Registers
-    ********************************************************************* */
-
-#define A_SCD_SYSTEM_REVISION       0x0010020000
-#define A_SCD_SYSTEM_CFG            0x0010020008
-
-#define A_SCD_SCRATCH		    0x0010020C10	/* PASS2 */
-
-/*  ********************************************************************* 
-    * System Address Trap Registers
-    ********************************************************************* */
-
-#define A_ADDR_TRAP_INDEX           0x00100200B0
-#define A_ADDR_TRAP_REG             0x00100200B8
-#define A_ADDR_TRAP_UP_0            0x0010020400
-#define A_ADDR_TRAP_UP_1            0x0010020408
-#define A_ADDR_TRAP_UP_2            0x0010020410
-#define A_ADDR_TRAP_UP_3            0x0010020418
-#define A_ADDR_TRAP_DOWN_0          0x0010020420
-#define A_ADDR_TRAP_DOWN_1          0x0010020428
-#define A_ADDR_TRAP_DOWN_2          0x0010020430
-#define A_ADDR_TRAP_DOWN_3          0x0010020438
-#define A_ADDR_TRAP_CFG_0           0x0010020440
-#define A_ADDR_TRAP_CFG_1           0x0010020448
-#define A_ADDR_TRAP_CFG_2           0x0010020450
-#define A_ADDR_TRAP_CFG_3           0x0010020458
-
-
-/*  ********************************************************************* 
-    * System Interrupt Mapper Registers
-    ********************************************************************* */
-
-#define A_IMR_CPU0_BASE                 0x0010020000
-#define A_IMR_CPU1_BASE                 0x0010022000
-#define IMR_REGISTER_SPACING            0x2000
-
-#define A_IMR_MAPPER(cpu) (A_IMR_CPU0_BASE|(cpu)*IMR_REGISTER_SPACING)
-#define A_IMR_REGISTER(cpu,reg) (A_IMR_MAPPER(cpu)|(reg))
-
-#define R_IMR_INTERRUPT_DIAG            0x0010
-#define R_IMR_INTERRUPT_MASK            0x0028
-#define R_IMR_INTERRUPT_TRACE           0x0038
-#define R_IMR_INTERRUPT_SOURCE_STATUS   0x0040
-#define R_IMR_LDT_INTERRUPT_SET         0x0048
-#define R_IMR_LDT_INTERRUPT             0x0018
-#define R_IMR_LDT_INTERRUPT_CLR         0x0020
-#define R_IMR_MAILBOX_CPU               0x00c0
-#define R_IMR_ALIAS_MAILBOX_CPU         0x1000
-#define R_IMR_MAILBOX_SET_CPU           0x00C8
-#define R_IMR_ALIAS_MAILBOX_SET_CPU     0x1008
-#define R_IMR_MAILBOX_CLR_CPU           0x00D0
-#define R_IMR_INTERRUPT_STATUS_BASE     0x0100
-#define R_IMR_INTERRUPT_STATUS_COUNT    7
-#define R_IMR_INTERRUPT_MAP_BASE        0x0200
-#define R_IMR_INTERRUPT_MAP_COUNT       64
-
-/*  ********************************************************************* 
-    * System Performance Counter Registers
-    ********************************************************************* */
-
-#define A_SCD_PERF_CNT_CFG          0x00100204C0
-#define A_SCD_PERF_CNT_0            0x00100204D0
-#define A_SCD_PERF_CNT_1            0x00100204D8
-#define A_SCD_PERF_CNT_2            0x00100204E0
-#define A_SCD_PERF_CNT_3            0x00100204E8
-
-/*  ********************************************************************* 
-    * System Bus Watcher Registers
-    ********************************************************************* */
-
-#define A_SCD_BUS_ERR_STATUS        0x0010020880
-#define A_BUS_ERR_DATA_0            0x00100208A0
-#define A_BUS_ERR_DATA_1            0x00100208A8
-#define A_BUS_ERR_DATA_2            0x00100208B0
-#define A_BUS_ERR_DATA_3            0x00100208B8
-#define A_BUS_L2_ERRORS             0x00100208C0
-#define A_BUS_MEM_IO_ERRORS         0x00100208C8
-
-/*  ********************************************************************* 
-    * System Debug Controller Registers
-    ********************************************************************* */
-
-#define A_SCD_JTAG_BASE             0x0010000000
-
-/*  ********************************************************************* 
-    * System Trace Buffer Registers
-    ********************************************************************* */
-
-#define A_SCD_TRACE_CFG             0x0010020A00
-#define A_SCD_TRACE_READ            0x0010020A08
-#define A_SCD_TRACE_EVENT_0         0x0010020A20
-#define A_SCD_TRACE_EVENT_1         0x0010020A28
-#define A_SCD_TRACE_EVENT_2         0x0010020A30
-#define A_SCD_TRACE_EVENT_3         0x0010020A38
-#define A_SCD_TRACE_SEQUENCE_0      0x0010020A40
-#define A_SCD_TRACE_SEQUENCE_1      0x0010020A48
-#define A_SCD_TRACE_SEQUENCE_2      0x0010020A50
-#define A_SCD_TRACE_SEQUENCE_3      0x0010020A58
-#define A_SCD_TRACE_EVENT_4         0x0010020A60
-#define A_SCD_TRACE_EVENT_5         0x0010020A68
-#define A_SCD_TRACE_EVENT_6         0x0010020A70
-#define A_SCD_TRACE_EVENT_7         0x0010020A78
-#define A_SCD_TRACE_SEQUENCE_4      0x0010020A80
-#define A_SCD_TRACE_SEQUENCE_5      0x0010020A88
-#define A_SCD_TRACE_SEQUENCE_6      0x0010020A90
-#define A_SCD_TRACE_SEQUENCE_7      0x0010020A98
-
-/*  ********************************************************************* 
-    * System Generic DMA Registers
-    ********************************************************************* */
-
-#define A_DM_0		  	    0x0010020B00
-#define A_DM_1		  	    0x0010020B20
-#define A_DM_2			    0x0010020B40
-#define A_DM_3			    0x0010020B60
-#define DM_REGISTER_SPACING	    0x20
-#define DM_NUM_CHANNELS		    4
-#define A_DM_BASE(idx) (A_DM_0 + ((idx) * DM_REGISTER_SPACING))
-#define A_DM_REGISTER(idx,reg) (A_DM_BASE(idx) + (reg))
-
-#define R_DM_DSCR_BASE		    0x0000000000
-#define R_DM_DSCR_COUNT		    0x0000000008
-#define R_DM_CUR_DSCR_ADDR	    0x0000000010
-#define R_DM_DSCR_BASE_DEBUG	    0x0000000018
-
-
-/*  *********************************************************************
-    *  Physical Address Map
-    ********************************************************************* */
-
-#define A_PHYS_MEMORY_0                 _SB_MAKE64(0x0000000000)
-#define A_PHYS_MEMORY_SIZE              _SB_MAKE64((256*1024*1024))
-#define A_PHYS_SYSTEM_CTL               _SB_MAKE64(0x0010000000)
-#define A_PHYS_IO_SYSTEM                _SB_MAKE64(0x0010060000)
-#define A_PHYS_GENBUS			_SB_MAKE64(0x0010090000)
-#define A_PHYS_GENBUS_END		_SB_MAKE64(0x0040000000)
-#define A_PHYS_LDTPCI_IO_MATCH_BYTES_32 _SB_MAKE64(0x0040000000)
-#define A_PHYS_LDTPCI_IO_MATCH_BITS_32  _SB_MAKE64(0x0060000000)
-#define A_PHYS_MEMORY_1                 _SB_MAKE64(0x0080000000)
-#define A_PHYS_MEMORY_2                 _SB_MAKE64(0x0090000000)
-#define A_PHYS_MEMORY_3                 _SB_MAKE64(0x00C0000000)
-#define A_PHYS_L2_CACHE_TEST            _SB_MAKE64(0x00D0000000)
-#define A_PHYS_LDT_SPECIAL_MATCH_BYTES  _SB_MAKE64(0x00D8000000)
-#define A_PHYS_LDTPCI_IO_MATCH_BYTES    _SB_MAKE64(0x00DC000000)
-#define A_PHYS_LDTPCI_CFG_MATCH_BYTES   _SB_MAKE64(0x00DE000000)
-#define A_PHYS_LDT_SPECIAL_MATCH_BITS   _SB_MAKE64(0x00F8000000)
-#define A_PHYS_LDTPCI_IO_MATCH_BITS     _SB_MAKE64(0x00FC000000)
-#define A_PHYS_LDTPCI_CFG_MATCH_BITS    _SB_MAKE64(0x00FE000000)
-#define A_PHYS_MEMORY_EXP               _SB_MAKE64(0x0100000000)
-#define A_PHYS_MEMORY_EXP_SIZE          _SB_MAKE64((508*1024*1024*1024))
-#define A_PHYS_LDT_EXP                  _SB_MAKE64(0x8000000000)
-#define A_PHYS_PCI_FULLACCESS_BYTES     _SB_MAKE64(0xF000000000)
-#define A_PHYS_PCI_FULLACCESS_BITS      _SB_MAKE64(0xF100000000)
-#define A_PHYS_RESERVED                 _SB_MAKE64(0xF200000000)
-#define A_PHYS_RESERVED_SPECIAL_LDT     _SB_MAKE64(0xFD00000000)
-
-#define A_PHYS_L2CACHE_WAY_SIZE         _SB_MAKE64(0x0000020000)
-#define PHYS_L2CACHE_NUM_WAYS           4
-#define A_PHYS_L2CACHE_TOTAL_SIZE       _SB_MAKE64(0x0000080000)
-#define A_PHYS_L2CACHE_WAY0             _SB_MAKE64(0x00D0180000)
-#define A_PHYS_L2CACHE_WAY1             _SB_MAKE64(0x00D01A0000)
-#define A_PHYS_L2CACHE_WAY2             _SB_MAKE64(0x00D01C0000)
-#define A_PHYS_L2CACHE_WAY3             _SB_MAKE64(0x00D01E0000)
-
-
-#endif
diff --git a/kernel/src/platform/sb1/sb1250_scd.h b/kernel/src/platform/sb1/sb1250_scd.h
deleted file mode 100644
index 315bdf06..00000000
--- a/kernel/src/platform/sb1/sb1250_scd.h
+++ /dev/null
@@ -1,539 +0,0 @@
-/*  *********************************************************************
-    *  SB1250 Board Support Package
-    *  
-    *  SCD Constants and Macros			File: sb1250_scd.h
-    *  
-    *  This module contains constants and macros useful for
-    *  manipulating the System Control and Debug module on the 1250.
-    *  
-    *  SB1250 specification level:  User's manual 1/02/02
-    *  
-    *  Author:  Mitch Lichtenberg (mpl@broadcom.com)
-    *  
-    *********************************************************************  
-    *
-    *  Copyright 2000,2001,2002,2003
-    *  Broadcom Corporation. All rights reserved.
-    *  
-    *  This software is furnished under license and may be used and 
-    *  copied only in accordance with the following terms and 
-    *  conditions.  Subject to these conditions, you may download, 
-    *  copy, install, use, modify and distribute modified or unmodified 
-    *  copies of this software in source and/or binary form.  No title 
-    *  or ownership is transferred hereby.
-    *  
-    *  1) Any source code used, modified or distributed must reproduce 
-    *     and retain this copyright notice and list of conditions 
-    *     as they appear in the source file.
-    *  
-    *  2) No right is granted to use any trade name, trademark, or 
-    *     logo of Broadcom Corporation.  The "Broadcom Corporation" 
-    *     name may not be used to endorse or promote products derived 
-    *     from this software without the prior written permission of 
-    *     Broadcom Corporation.
-    *  
-    *  3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR
-    *     IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED
-    *     WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR 
-    *     PURPOSE, OR NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT 
-    *     SHALL BROADCOM BE LIABLE FOR ANY DAMAGES WHATSOEVER, AND IN 
-    *     PARTICULAR, BROADCOM SHALL NOT BE LIABLE FOR DIRECT, INDIRECT,
-    *     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 
-    *     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
-    *     GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
-    *     BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 
-    *     OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 
-    *     TORT (INCLUDING NEGLIGENCE OR OTHERWISE), EVEN IF ADVISED OF 
-    *     THE POSSIBILITY OF SUCH DAMAGE.
-    ********************************************************************* */
-
-#ifndef _SB1250_SCD_H
-#define _SB1250_SCD_H
-
-#include "sb1250_defs.h"
-
-/*  *********************************************************************
-    *  System control/debug registers
-    ********************************************************************* */
-
-/*
- * System Revision Register (Table 4-1)
- */
-
-#define M_SYS_RESERVED		    _SB_MAKEMASK(8,0)
-
-#define S_SYS_REVISION              _SB_MAKE64(8)
-#define M_SYS_REVISION              _SB_MAKEMASK(8,S_SYS_REVISION)
-#define V_SYS_REVISION(x)           _SB_MAKEVALUE(x,S_SYS_REVISION)
-#define G_SYS_REVISION(x)           _SB_GETVALUE(x,S_SYS_REVISION,M_SYS_REVISION)
-
-#if SIBYTE_HDR_FEATURE_CHIP(1250)
-#define K_SYS_REVISION_BCM1250_PASS1	1
-#define K_SYS_REVISION_BCM1250_PASS2	3
-#define K_SYS_REVISION_BCM1250_PASS2_2	16
-#define K_SYS_REVISION_BCM1250_PASS3	32
-
-/* XXX: discourage people from using these constants.  */
-#define K_SYS_REVISION_PASS1	    K_SYS_REVISION_BCM1250_PASS1
-#define K_SYS_REVISION_PASS2	    K_SYS_REVISION_BCM1250_PASS2
-#define K_SYS_REVISION_PASS2_2	    K_SYS_REVISION_BCM1250_PASS2_2
-#define K_SYS_REVISION_PASS3	    K_SYS_REVISION_BCM1250_PASS3
-#endif /* 1250 */
-
-#if SIBYTE_HDR_FEATURE_CHIP(112x)
-#define K_SYS_REVISION_BCM112x_A1	32
-#define K_SYS_REVISION_BCM112x_A2	33
-#endif /* 112x */
-
-/* XXX: discourage people from using these constants.  */
-#define S_SYS_PART                  _SB_MAKE64(16)
-#define M_SYS_PART                  _SB_MAKEMASK(16,S_SYS_PART)
-#define V_SYS_PART(x)               _SB_MAKEVALUE(x,S_SYS_PART)
-#define G_SYS_PART(x)               _SB_GETVALUE(x,S_SYS_PART,M_SYS_PART)
-
-/* XXX: discourage people from using these constants.  */
-#define K_SYS_PART_SB1250           0x1250
-#define K_SYS_PART_BCM1120          0x1121
-#define K_SYS_PART_BCM1125          0x1123
-#define K_SYS_PART_BCM1125H         0x1124
-
-/* The "peripheral set" (SOC type) is the low 4 bits of the "part" field.  */
-#define S_SYS_SOC_TYPE              _SB_MAKE64(16)
-#define M_SYS_SOC_TYPE              _SB_MAKEMASK(4,S_SYS_SOC_TYPE)
-#define V_SYS_SOC_TYPE(x)           _SB_MAKEVALUE(x,S_SYS_SOC_TYPE)
-#define G_SYS_SOC_TYPE(x)           _SB_GETVALUE(x,S_SYS_SOC_TYPE,M_SYS_SOC_TYPE)
-
-#define K_SYS_SOC_TYPE_BCM1250      0x0
-#define K_SYS_SOC_TYPE_BCM1120      0x1
-#define K_SYS_SOC_TYPE_BCM1250_ALT  0x2		/* 1250pass2 w/ 1/4 L2.  */
-#define K_SYS_SOC_TYPE_BCM1125      0x3
-#define K_SYS_SOC_TYPE_BCM1125H     0x4
-#define K_SYS_SOC_TYPE_BCM1250_ALT2 0x5		/* 1250pass2 w/ 1/2 L2.  */
-
-/*
- * Calculate correct SOC type given a copy of system revision register.
- *
- * (For the assembler version, sysrev and dest may be the same register.
- * Also, it clobbers AT.)
- */
-#ifdef __ASSEMBLER__
-#define SYS_SOC_TYPE(dest, sysrev)					\
-	.set push ;							\
-	.set reorder ;							\
-	dsrl	dest, sysrev, S_SYS_SOC_TYPE ;				\
-	andi	dest, dest, (M_SYS_SOC_TYPE >> S_SYS_SOC_TYPE);		\
-	beq	dest, K_SYS_SOC_TYPE_BCM1250_ALT, 991f ;		\
-	beq	dest, K_SYS_SOC_TYPE_BCM1250_ALT2, 991f	 ;		\
-	b	992f ;							\
-991:	li	dest, K_SYS_SOC_TYPE_BCM1250 ;				\
-992:									\
-	.set pop
-#else
-#define SYS_SOC_TYPE(sysrev)						\
-	((G_SYS_SOC_TYPE(sysrev) == K_SYS_SOC_TYPE_BCM1250_ALT		\
-	  || G_SYS_SOC_TYPE(sysrev) == K_SYS_SOC_TYPE_BCM1250_ALT2)	\
-	 ? K_SYS_SOC_TYPE_BCM1250 : G_SYS_SOC_TYPE(sysrev))
-#endif
-
-#define S_SYS_WID                   _SB_MAKE64(32)
-#define M_SYS_WID                   _SB_MAKEMASK(32,S_SYS_WID)
-#define V_SYS_WID(x)                _SB_MAKEVALUE(x,S_SYS_WID)
-#define G_SYS_WID(x)                _SB_GETVALUE(x,S_SYS_WID,M_SYS_WID)
-
-/*
- * System Config Register (Table 4-2)
- * Register: SCD_SYSTEM_CFG
- */
-
-#define M_SYS_LDT_PLL_BYP           _SB_MAKEMASK1(3)
-#define M_SYS_PCI_SYNC_TEST_MODE    _SB_MAKEMASK1(4)
-#define M_SYS_IOB0_DIV              _SB_MAKEMASK1(5)
-#define M_SYS_IOB1_DIV              _SB_MAKEMASK1(6)
-
-#define S_SYS_PLL_DIV               _SB_MAKE64(7)
-#define M_SYS_PLL_DIV               _SB_MAKEMASK(5,S_SYS_PLL_DIV)
-#define V_SYS_PLL_DIV(x)            _SB_MAKEVALUE(x,S_SYS_PLL_DIV)
-#define G_SYS_PLL_DIV(x)            _SB_GETVALUE(x,S_SYS_PLL_DIV,M_SYS_PLL_DIV)
-
-#define M_SYS_SER0_ENABLE           _SB_MAKEMASK1(12)
-#define M_SYS_SER0_RSTB_EN          _SB_MAKEMASK1(13)
-#define M_SYS_SER1_ENABLE           _SB_MAKEMASK1(14)
-#define M_SYS_SER1_RSTB_EN          _SB_MAKEMASK1(15)
-#define M_SYS_PCMCIA_ENABLE         _SB_MAKEMASK1(16)
-
-#define S_SYS_BOOT_MODE             _SB_MAKE64(17)
-#define M_SYS_BOOT_MODE             _SB_MAKEMASK(2,S_SYS_BOOT_MODE)
-#define V_SYS_BOOT_MODE(x)          _SB_MAKEVALUE(x,S_SYS_BOOT_MODE)
-#define G_SYS_BOOT_MODE(x)          _SB_GETVALUE(x,S_SYS_BOOT_MODE,M_SYS_BOOT_MODE)
-#define K_SYS_BOOT_MODE_ROM32       0
-#define K_SYS_BOOT_MODE_ROM8        1
-#define K_SYS_BOOT_MODE_SMBUS_SMALL 2
-#define K_SYS_BOOT_MODE_SMBUS_BIG   3
-
-#define M_SYS_PCI_HOST              _SB_MAKEMASK1(19)
-#define M_SYS_PCI_ARBITER           _SB_MAKEMASK1(20)
-#define M_SYS_SOUTH_ON_LDT          _SB_MAKEMASK1(21)
-#define M_SYS_BIG_ENDIAN            _SB_MAKEMASK1(22)
-#define M_SYS_GENCLK_EN             _SB_MAKEMASK1(23)
-#define M_SYS_LDT_TEST_EN           _SB_MAKEMASK1(24)
-#define M_SYS_GEN_PARITY_EN         _SB_MAKEMASK1(25)
-
-#define S_SYS_CONFIG                26
-#define M_SYS_CONFIG                _SB_MAKEMASK(6,S_SYS_CONFIG)
-#define V_SYS_CONFIG(x)             _SB_MAKEVALUE(x,S_SYS_CONFIG)
-#define G_SYS_CONFIG(x)             _SB_GETVALUE(x,S_SYS_CONFIG,M_SYS_CONFIG)
-
-/* The following bits are writeable by JTAG only. */
-
-#define M_SYS_CLKSTOP               _SB_MAKEMASK1(32)
-#define M_SYS_CLKSTEP               _SB_MAKEMASK1(33)
-
-#define S_SYS_CLKCOUNT              34
-#define M_SYS_CLKCOUNT              _SB_MAKEMASK(8,S_SYS_CLKCOUNT)
-#define V_SYS_CLKCOUNT(x)           _SB_MAKEVALUE(x,S_SYS_CLKCOUNT)
-#define G_SYS_CLKCOUNT(x)           _SB_GETVALUE(x,S_SYS_CLKCOUNT,M_SYS_CLKCOUNT)
-
-#define M_SYS_PLL_BYPASS            _SB_MAKEMASK1(42)
-
-#define S_SYS_PLL_IREF		    43
-#define M_SYS_PLL_IREF		    _SB_MAKEMASK(2,S_SYS_PLL_IREF)
-
-#define S_SYS_PLL_VCO		    45
-#define M_SYS_PLL_VCO		    _SB_MAKEMASK(2,S_SYS_PLL_VCO)
-
-#define S_SYS_PLL_VREG		    47
-#define M_SYS_PLL_VREG		    _SB_MAKEMASK(2,S_SYS_PLL_VREG)
-
-#define M_SYS_MEM_RESET             _SB_MAKEMASK1(49)
-#define M_SYS_L2C_RESET             _SB_MAKEMASK1(50)
-#define M_SYS_IO_RESET_0            _SB_MAKEMASK1(51)
-#define M_SYS_IO_RESET_1            _SB_MAKEMASK1(52)
-#define M_SYS_SCD_RESET             _SB_MAKEMASK1(53)
-
-/* End of bits writable by JTAG only. */
-
-#define M_SYS_CPU_RESET_0           _SB_MAKEMASK1(54)
-#define M_SYS_CPU_RESET_1           _SB_MAKEMASK1(55)
-
-#define M_SYS_UNICPU0               _SB_MAKEMASK1(56)
-#define M_SYS_UNICPU1               _SB_MAKEMASK1(57)
-
-#define M_SYS_SB_SOFTRES            _SB_MAKEMASK1(58)
-#define M_SYS_EXT_RESET             _SB_MAKEMASK1(59)
-#define M_SYS_SYSTEM_RESET          _SB_MAKEMASK1(60)
-
-#define M_SYS_MISR_MODE             _SB_MAKEMASK1(61)
-#define M_SYS_MISR_RESET            _SB_MAKEMASK1(62)
-
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_SYS_SW_FLAG		    _SB_MAKEMASK1(63)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-
-/*
- * Mailbox Registers (Table 4-3)
- * Registers: SCD_MBOX_CPU_x
- */
-
-#define S_MBOX_INT_3                0
-#define M_MBOX_INT_3                _SB_MAKEMASK(16,S_MBOX_INT_3)
-#define S_MBOX_INT_2                16
-#define M_MBOX_INT_2                _SB_MAKEMASK(16,S_MBOX_INT_2)
-#define S_MBOX_INT_1                32
-#define M_MBOX_INT_1                _SB_MAKEMASK(16,S_MBOX_INT_1)
-#define S_MBOX_INT_0                48
-#define M_MBOX_INT_0                _SB_MAKEMASK(16,S_MBOX_INT_0)
-
-/*
- * Watchdog Registers (Table 4-8) (Table 4-9) (Table 4-10)
- * Registers: SCD_WDOG_INIT_CNT_x
- */
-
-#define V_SCD_WDOG_FREQ             1000000
-
-#define S_SCD_WDOG_INIT             0
-#define M_SCD_WDOG_INIT             _SB_MAKEMASK(23,S_SCD_WDOG_INIT)
-
-#define S_SCD_WDOG_CNT              0
-#define M_SCD_WDOG_CNT              _SB_MAKEMASK(23,S_SCD_WDOG_CNT)
-
-#define M_SCD_WDOG_ENABLE           _SB_MAKEMASK1(0)
-
-/*
- * Timer Registers (Table 4-11) (Table 4-12) (Table 4-13)
- */
-
-#define V_SCD_TIMER_FREQ            1000000
-
-#define S_SCD_TIMER_INIT            0
-#define M_SCD_TIMER_INIT            _SB_MAKEMASK(20,S_SCD_TIMER_INIT)
-#define V_SCD_TIMER_INIT(x)         _SB_MAKEVALUE(x,S_SCD_TIMER_INIT)
-#define G_SCD_TIMER_INIT(x)         _SB_GETVALUE(x,S_SCD_TIMER_INIT,M_SCD_TIMER_INIT)
-
-#define S_SCD_TIMER_CNT             0
-#define M_SCD_TIMER_CNT             _SB_MAKEMASK(20,S_SCD_TIMER_CNT)
-#define V_SCD_TIMER_CNT(x)         _SB_MAKEVALUE(x,S_SCD_TIMER_CNT)
-#define G_SCD_TIMER_CNT(x)         _SB_GETVALUE(x,S_SCD_TIMER_CNT,M_SCD_TIMER_CNT)
-
-#define M_SCD_TIMER_ENABLE          _SB_MAKEMASK1(0)
-#define M_SCD_TIMER_MODE            _SB_MAKEMASK1(1)
-#define M_SCD_TIMER_MODE_CONTINUOUS M_SCD_TIMER_MODE
-
-/*
- * System Performance Counters
- */
-
-#define S_SPC_CFG_SRC0            0
-#define M_SPC_CFG_SRC0            _SB_MAKEMASK(8,S_SPC_CFG_SRC0)
-#define V_SPC_CFG_SRC0(x)         _SB_MAKEVALUE(x,S_SPC_CFG_SRC0)
-#define G_SPC_CFG_SRC0(x)         _SB_GETVALUE(x,S_SPC_CFG_SRC0,M_SPC_CFG_SRC0)
-
-#define S_SPC_CFG_SRC1            8
-#define M_SPC_CFG_SRC1            _SB_MAKEMASK(8,S_SPC_CFG_SRC1)
-#define V_SPC_CFG_SRC1(x)         _SB_MAKEVALUE(x,S_SPC_CFG_SRC1)
-#define G_SPC_CFG_SRC1(x)         _SB_GETVALUE(x,S_SPC_CFG_SRC1,M_SPC_CFG_SRC1)
-
-#define S_SPC_CFG_SRC2            16
-#define M_SPC_CFG_SRC2            _SB_MAKEMASK(8,S_SPC_CFG_SRC2)
-#define V_SPC_CFG_SRC2(x)         _SB_MAKEVALUE(x,S_SPC_CFG_SRC2)
-#define G_SPC_CFG_SRC2(x)         _SB_GETVALUE(x,S_SPC_CFG_SRC2,M_SPC_CFG_SRC2)
-
-#define S_SPC_CFG_SRC3            24
-#define M_SPC_CFG_SRC3            _SB_MAKEMASK(8,S_SPC_CFG_SRC3)
-#define V_SPC_CFG_SRC3(x)         _SB_MAKEVALUE(x,S_SPC_CFG_SRC3)
-#define G_SPC_CFG_SRC3(x)         _SB_GETVALUE(x,S_SPC_CFG_SRC3,M_SPC_CFG_SRC3)
-
-#define M_SPC_CFG_CLEAR		_SB_MAKEMASK1(32)
-#define M_SPC_CFG_ENABLE	_SB_MAKEMASK1(33)
-
-
-/*
- * Bus Watcher
- */
-
-#define S_SCD_BERR_TID            8
-#define M_SCD_BERR_TID            _SB_MAKEMASK(10,S_SCD_BERR_TID)
-#define V_SCD_BERR_TID(x)         _SB_MAKEVALUE(x,S_SCD_BERR_TID)
-#define G_SCD_BERR_TID(x)         _SB_GETVALUE(x,S_SCD_BERR_TID,M_SCD_BERR_TID)
-
-#define S_SCD_BERR_RID            18
-#define M_SCD_BERR_RID            _SB_MAKEMASK(4,S_SCD_BERR_RID)
-#define V_SCD_BERR_RID(x)         _SB_MAKEVALUE(x,S_SCD_BERR_RID)
-#define G_SCD_BERR_RID(x)         _SB_GETVALUE(x,S_SCD_BERR_RID,M_SCD_BERR_RID)
-
-#define S_SCD_BERR_DCODE          22
-#define M_SCD_BERR_DCODE          _SB_MAKEMASK(3,S_SCD_BERR_DCODE)
-#define V_SCD_BERR_DCODE(x)       _SB_MAKEVALUE(x,S_SCD_BERR_DCODE)
-#define G_SCD_BERR_DCODE(x)       _SB_GETVALUE(x,S_SCD_BERR_DCODE,M_SCD_BERR_DCODE)
-
-#define M_SCD_BERR_MULTERRS       _SB_MAKEMASK1(30)
-
-
-#define S_SCD_L2ECC_CORR_D        0
-#define M_SCD_L2ECC_CORR_D        _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_D)
-#define V_SCD_L2ECC_CORR_D(x)     _SB_MAKEVALUE(x,S_SCD_L2ECC_CORR_D)
-#define G_SCD_L2ECC_CORR_D(x)     _SB_GETVALUE(x,S_SCD_L2ECC_CORR_D,M_SCD_L2ECC_CORR_D)
-
-#define S_SCD_L2ECC_BAD_D         8
-#define M_SCD_L2ECC_BAD_D         _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_D)
-#define V_SCD_L2ECC_BAD_D(x)      _SB_MAKEVALUE(x,S_SCD_L2ECC_BAD_D)
-#define G_SCD_L2ECC_BAD_D(x)      _SB_GETVALUE(x,S_SCD_L2ECC_BAD_D,M_SCD_L2ECC_BAD_D)
-
-#define S_SCD_L2ECC_CORR_T        16
-#define M_SCD_L2ECC_CORR_T        _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_T)
-#define V_SCD_L2ECC_CORR_T(x)     _SB_MAKEVALUE(x,S_SCD_L2ECC_CORR_T)
-#define G_SCD_L2ECC_CORR_T(x)     _SB_GETVALUE(x,S_SCD_L2ECC_CORR_T,M_SCD_L2ECC_CORR_T)
-
-#define S_SCD_L2ECC_BAD_T         24
-#define M_SCD_L2ECC_BAD_T         _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_T)
-#define V_SCD_L2ECC_BAD_T(x)      _SB_MAKEVALUE(x,S_SCD_L2ECC_BAD_T)
-#define G_SCD_L2ECC_BAD_T(x)      _SB_GETVALUE(x,S_SCD_L2ECC_BAD_T,M_SCD_L2ECC_BAD_T)
-
-#define S_SCD_MEM_ECC_CORR        0
-#define M_SCD_MEM_ECC_CORR        _SB_MAKEMASK(8,S_SCD_MEM_ECC_CORR)
-#define V_SCD_MEM_ECC_CORR(x)     _SB_MAKEVALUE(x,S_SCD_MEM_ECC_CORR)
-#define G_SCD_MEM_ECC_CORR(x)     _SB_GETVALUE(x,S_SCD_MEM_ECC_CORR,M_SCD_MEM_ECC_CORR)
-
-#define S_SCD_MEM_ECC_BAD         8
-#define M_SCD_MEM_ECC_BAD         _SB_MAKEMASK(8,S_SCD_MEM_ECC_BAD)
-#define V_SCD_MEM_ECC_BAD(x)      _SB_MAKEVALUE(x,S_SCD_MEM_ECC_BAD)
-#define G_SCD_MEM_ECC_BAD(x)      _SB_GETVALUE(x,S_SCD_MEM_ECC_BAD,M_SCD_MEM_ECC_BAD)
-
-#define S_SCD_MEM_BUSERR          16
-#define M_SCD_MEM_BUSERR          _SB_MAKEMASK(8,S_SCD_MEM_BUSERR)
-#define V_SCD_MEM_BUSERR(x)       _SB_MAKEVALUE(x,S_SCD_MEM_BUSERR)
-#define G_SCD_MEM_BUSERR(x)       _SB_GETVALUE(x,S_SCD_MEM_BUSERR,M_SCD_MEM_BUSERR)
-
-
-/*
- * Address Trap Registers
- */
-
-#define M_ATRAP_INDEX		  _SB_MAKEMASK(4,0)
-#define M_ATRAP_ADDRESS		  _SB_MAKEMASK(40,0)
-
-#define S_ATRAP_CFG_CNT            0
-#define M_ATRAP_CFG_CNT            _SB_MAKEMASK(3,S_ATRAP_CFG_CNT)
-#define V_ATRAP_CFG_CNT(x)         _SB_MAKEVALUE(x,S_ATRAP_CFG_CNT)
-#define G_ATRAP_CFG_CNT(x)         _SB_GETVALUE(x,S_ATRAP_CFG_CNT,M_ATRAP_CFG_CNT)
-
-#define M_ATRAP_CFG_WRITE	   _SB_MAKEMASK1(3)
-#define M_ATRAP_CFG_ALL	  	   _SB_MAKEMASK1(4)
-#define M_ATRAP_CFG_INV	   	   _SB_MAKEMASK1(5)
-#define M_ATRAP_CFG_USESRC	   _SB_MAKEMASK1(6)
-#define M_ATRAP_CFG_SRCINV	   _SB_MAKEMASK1(7)
-
-#define S_ATRAP_CFG_AGENTID     8
-#define M_ATRAP_CFG_AGENTID     _SB_MAKEMASK(4,S_ATRAP_CFG_AGENTID)
-#define V_ATRAP_CFG_AGENTID(x)  _SB_MAKEVALUE(x,S_ATRAP_CFG_AGENTID)
-#define G_ATRAP_CFG_AGENTID(x)  _SB_GETVALUE(x,S_ATRAP_CFG_AGENTID,M_ATRAP_CFG_AGENTID)
-
-#define K_BUS_AGENT_CPU0	0
-#define K_BUS_AGENT_CPU1	1
-#define K_BUS_AGENT_IOB0	2
-#define K_BUS_AGENT_IOB1	3
-#define K_BUS_AGENT_SCD	4
-#define K_BUS_AGENT_RESERVED	5
-#define K_BUS_AGENT_L2C	6
-#define K_BUS_AGENT_MC	7
-
-#define S_ATRAP_CFG_CATTR     12
-#define M_ATRAP_CFG_CATTR     _SB_MAKEMASK(3,S_ATRAP_CFG_CATTR)
-#define V_ATRAP_CFG_CATTR(x)  _SB_MAKEVALUE(x,S_ATRAP_CFG_CATTR)
-#define G_ATRAP_CFG_CATTR(x)  _SB_GETVALUE(x,S_ATRAP_CFG_CATTR,M_ATRAP_CFG_CATTR)
-
-#define K_ATRAP_CFG_CATTR_IGNORE	0
-#define K_ATRAP_CFG_CATTR_UNC    	1
-#define K_ATRAP_CFG_CATTR_CACHEABLE	2
-#define K_ATRAP_CFG_CATTR_NONCOH  	3
-#define K_ATRAP_CFG_CATTR_COHERENT	4
-#define K_ATRAP_CFG_CATTR_NOTUNC	5
-#define K_ATRAP_CFG_CATTR_NOTNONCOH	6
-#define K_ATRAP_CFG_CATTR_NOTCOHERENT   7
-
-/*
- * Trace Buffer Config register
- */
-
-#define M_SCD_TRACE_CFG_RESET           _SB_MAKEMASK1(0)
-#define M_SCD_TRACE_CFG_START_READ      _SB_MAKEMASK1(1)
-#define M_SCD_TRACE_CFG_START           _SB_MAKEMASK1(2)
-#define M_SCD_TRACE_CFG_STOP            _SB_MAKEMASK1(3)
-#define M_SCD_TRACE_CFG_FREEZE          _SB_MAKEMASK1(4)
-#define M_SCD_TRACE_CFG_FREEZE_FULL     _SB_MAKEMASK1(5)
-#define M_SCD_TRACE_CFG_DEBUG_FULL      _SB_MAKEMASK1(6)
-#define M_SCD_TRACE_CFG_FULL            _SB_MAKEMASK1(7)
-#if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1)
-#define M_SCD_TRACE_CFG_FORCECNT        _SB_MAKEMASK1(8)
-#endif /* 1250 PASS2 || 112x PASS1 */
-
-#define S_SCD_TRACE_CFG_CUR_ADDR        10
-#define M_SCD_TRACE_CFG_CUR_ADDR        _SB_MAKEMASK(8,S_SCD_TRACE_CFG_CUR_ADDR)
-#define V_SCD_TRACE_CFG_CUR_ADDR(x)     _SB_MAKEVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR)
-#define G_SCD_TRACE_CFG_CUR_ADDR(x)     _SB_GETVALUE(x,S_SCD_TRACE_CFG_CUR_ADDR,M_SCD_TRACE_CFG_CUR_ADDR)
-
-/*
- * Trace Event registers
- */
-
-#define S_SCD_TREVT_ADDR_MATCH          0
-#define M_SCD_TREVT_ADDR_MATCH          _SB_MAKEMASK(4,S_SCD_TREVT_ADDR_MATCH)
-#define V_SCD_TREVT_ADDR_MATCH(x)       _SB_MAKEVALUE(x,S_SCD_TREVT_ADDR_MATCH)
-#define G_SCD_TREVT_ADDR_MATCH(x)       _SB_GETVALUE(x,S_SCD_TREVT_ADDR_MATCH,M_SCD_TREVT_ADDR_MATCH)
-
-#define M_SCD_TREVT_REQID_MATCH         _SB_MAKEMASK1(4)
-#define M_SCD_TREVT_DATAID_MATCH        _SB_MAKEMASK1(5)
-#define M_SCD_TREVT_RESPID_MATCH        _SB_MAKEMASK1(6)
-#define M_SCD_TREVT_INTERRUPT           _SB_MAKEMASK1(7)
-#define M_SCD_TREVT_DEBUG_PIN           _SB_MAKEMASK1(9)
-#define M_SCD_TREVT_WRITE               _SB_MAKEMASK1(10)
-#define M_SCD_TREVT_READ                _SB_MAKEMASK1(11)
-
-#define S_SCD_TREVT_REQID               12
-#define M_SCD_TREVT_REQID               _SB_MAKEMASK(4,S_SCD_TREVT_REQID)
-#define V_SCD_TREVT_REQID(x)            _SB_MAKEVALUE(x,S_SCD_TREVT_REQID)
-#define G_SCD_TREVT_REQID(x)            _SB_GETVALUE(x,S_SCD_TREVT_REQID,M_SCD_TREVT_REQID)
-
-#define S_SCD_TREVT_RESPID              16
-#define M_SCD_TREVT_RESPID              _SB_MAKEMASK(4,S_SCD_TREVT_RESPID)
-#define V_SCD_TREVT_RESPID(x)           _SB_MAKEVALUE(x,S_SCD_TREVT_RESPID)
-#define G_SCD_TREVT_RESPID(x)           _SB_GETVALUE(x,S_SCD_TREVT_RESPID,M_SCD_TREVT_RESPID)
-
-#define S_SCD_TREVT_DATAID              20
-#define M_SCD_TREVT_DATAID              _SB_MAKEMASK(4,S_SCD_TREVT_DATAID)
-#define V_SCD_TREVT_DATAID(x)           _SB_MAKEVALUE(x,S_SCD_TREVT_DATAID)
-#define G_SCD_TREVT_DATAID(x)           _SB_GETVALUE(x,S_SCD_TREVT_DATAID,M_SCD_TREVT_DATID)
-
-#define S_SCD_TREVT_COUNT               24
-#define M_SCD_TREVT_COUNT               _SB_MAKEMASK(8,S_SCD_TREVT_COUNT)
-#define V_SCD_TREVT_COUNT(x)            _SB_MAKEVALUE(x,S_SCD_TREVT_COUNT)
-#define G_SCD_TREVT_COUNT(x)            _SB_GETVALUE(x,S_SCD_TREVT_COUNT,M_SCD_TREVT_COUNT)
-
-/*
- * Trace Sequence registers
- */
-
-#define S_SCD_TRSEQ_EVENT4              0
-#define M_SCD_TRSEQ_EVENT4              _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT4)
-#define V_SCD_TRSEQ_EVENT4(x)           _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT4)
-#define G_SCD_TRSEQ_EVENT4(x)           _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT4,M_SCD_TRSEQ_EVENT4)
-
-#define S_SCD_TRSEQ_EVENT3              4
-#define M_SCD_TRSEQ_EVENT3              _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT3)
-#define V_SCD_TRSEQ_EVENT3(x)           _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT3)
-#define G_SCD_TRSEQ_EVENT3(x)           _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT3,M_SCD_TRSEQ_EVENT3)
-
-#define S_SCD_TRSEQ_EVENT2              8
-#define M_SCD_TRSEQ_EVENT2              _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT2)
-#define V_SCD_TRSEQ_EVENT2(x)           _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT2)
-#define G_SCD_TRSEQ_EVENT2(x)           _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT2,M_SCD_TRSEQ_EVENT2)
-
-#define S_SCD_TRSEQ_EVENT1              12
-#define M_SCD_TRSEQ_EVENT1              _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT1)
-#define V_SCD_TRSEQ_EVENT1(x)           _SB_MAKEVALUE(x,S_SCD_TRSEQ_EVENT1)
-#define G_SCD_TRSEQ_EVENT1(x)           _SB_GETVALUE(x,S_SCD_TRSEQ_EVENT1,M_SCD_TRSEQ_EVENT1)
-
-#define K_SCD_TRSEQ_E0                  0
-#define K_SCD_TRSEQ_E1                  1
-#define K_SCD_TRSEQ_E2                  2
-#define K_SCD_TRSEQ_E3                  3
-#define K_SCD_TRSEQ_E0_E1               4
-#define K_SCD_TRSEQ_E1_E2               5
-#define K_SCD_TRSEQ_E2_E3               6
-#define K_SCD_TRSEQ_E0_E1_E2            7
-#define K_SCD_TRSEQ_E0_E1_E2_E3         8
-#define K_SCD_TRSEQ_E0E1                9
-#define K_SCD_TRSEQ_E0E1E2              10
-#define K_SCD_TRSEQ_E0E1E2E3            11
-#define K_SCD_TRSEQ_E0E1_E2             12
-#define K_SCD_TRSEQ_E0E1_E2E3           13
-#define K_SCD_TRSEQ_E0E1_E2_E3          14
-#define K_SCD_TRSEQ_IGNORED             15
-
-#define K_SCD_TRSEQ_TRIGGER_ALL         (V_SCD_TRSEQ_EVENT1(K_SCD_TRSEQ_IGNORED) | \
-                                         V_SCD_TRSEQ_EVENT2(K_SCD_TRSEQ_IGNORED) | \
-                                         V_SCD_TRSEQ_EVENT3(K_SCD_TRSEQ_IGNORED) | \
-                                         V_SCD_TRSEQ_EVENT4(K_SCD_TRSEQ_IGNORED))
-
-#define S_SCD_TRSEQ_FUNCTION            16
-#define M_SCD_TRSEQ_FUNCTION            _SB_MAKEMASK(4,S_SCD_TRSEQ_FUNCTION)
-#define V_SCD_TRSEQ_FUNCTION(x)         _SB_MAKEVALUE(x,S_SCD_TRSEQ_FUNCTION)
-#define G_SCD_TRSEQ_FUNCTION(x)         _SB_GETVALUE(x,S_SCD_TRSEQ_FUNCTION,M_SCD_TRSEQ_FUNCTION)
-
-#define K_SCD_TRSEQ_FUNC_NOP            0
-#define K_SCD_TRSEQ_FUNC_START          1
-#define K_SCD_TRSEQ_FUNC_STOP           2
-#define K_SCD_TRSEQ_FUNC_FREEZE         3
-
-#define V_SCD_TRSEQ_FUNC_NOP            V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_NOP)
-#define V_SCD_TRSEQ_FUNC_START          V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_START)
-#define V_SCD_TRSEQ_FUNC_STOP           V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_STOP)
-#define V_SCD_TRSEQ_FUNC_FREEZE         V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_FREEZE)
-
-#define M_SCD_TRSEQ_ASAMPLE             _SB_MAKEMASK1(18)
-#define M_SCD_TRSEQ_DSAMPLE             _SB_MAKEMASK1(19)
-#define M_SCD_TRSEQ_DEBUGPIN            _SB_MAKEMASK1(20)
-#define M_SCD_TRSEQ_DEBUGCPU            _SB_MAKEMASK1(21)
-#define M_SCD_TRSEQ_CLEARUSE            _SB_MAKEMASK1(22)
-
-#endif
diff --git a/kernel/src/platform/sb1/sb1250_uart.h b/kernel/src/platform/sb1/sb1250_uart.h
deleted file mode 100644
index 33e83a4b..00000000
--- a/kernel/src/platform/sb1/sb1250_uart.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     sb1250_uart.h
- * Description:   Defines bits we use of the sb1250 uart
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sb1250_uart.h,v 1.3 2003/09/24 19:05:00 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef _SB1250_UART_H
-#define _SB1250_UART_H
-
-/* 
- * DUART MODE REG 1 
- */
-#define OFFSET_DUART_BITS_PER_CHAR  0
-#define OFFSET_DUART_PARITY_MODE    3
-
-#define DUART_BITS_PER_CHAR_7 (2 << OFFSET_DUART_BITS_PER_CHAR)
-#define DUART_BITS_PER_CHAR_8 (3 << OFFSET_DUART_BITS_PER_CHAR)
-
-#define DUART_PARITY_MODE_ADD		(0 << OFFSET_DUART_PARITY_MODE)
-#define DUART_PARITY_MODE_ADD_FIXED	(1 << OFFSET_DUART_PARITY_MODE)
-#define DUART_PARITY_MODE_NONE		(2 << OFFSET_DUART_PARITY_MODE)
-
-/*
- * DUART MODE REG 2
- */
-
-#define DUART_STOP_BIT_LEN_1		(0ULL)
-#define DUART_STOP_BIT_LEN_2		(1ULL << 3)
-
-/*
- * DUART Baud Rate REG
- */
-
-#define DUART_BAUD_RATE(x)			(100000000/((x)*20)-1)
-
-
-/*
- * DUART Command REG
- */
-
-#define DUART_RX_EN		(1ULL<<0)
-#define DUART_RX_DIS		(1ULL<<1)
-#define DUART_TX_EN		(1ULL<<2)
-#define DUART_TX_DIS		(1ULL<<3)
-
-
-/* 
- * DUART Status REG
- */
-
-#define DUART_RX_RDY		(1ULL<<0)
-#define DUART_RX_FFUL		(1ULL<<1)
-#define DUART_TX_RDY		(1ULL<<2)
-#define DUART_TX_EMT		(1ULL<<3)
-#define DUART_OVRUN_ERR		(1ULL<<4)
-#define DUART_PARITY_ERR	(1ULL<<5)
-#define DUART_FRM_ERR		(1ULL<<6)
-#define DUART_RCVD_BRK		(1ULL<<7)
-
-/* 
- * DUART REGISTER ADDRESS
- */
-
-#define DUART_NUM_PORTS		2
-#define DUART_PHYS		0x0010060000
-#define DUART_PHYS_SIZE		0x100
-
-#define DUART_REG(chan,r)	(DUART_PHYS_SIZE*(chan) + (r))
-#define DUART_REG_PHYS(chan,r)	(DUART_PHYS + DUART_REG(chan,r))
-
-
-#define DUART_MODE_REG_1	0x100
-#define DUART_MODE_REG_2	0x110
-#define DUART_STATUS		0x120
-#define DUART_CLK_SEL		0x130
-#define DUART_CMD		0x150
-#define DUART_RX_HOLD		0x160
-#define DUART_TX_HOLD		0x170
-
-
-
-#endif /* !_SB1250_UART_H */
diff --git a/kernel/src/platform/sb1/smp.cc b/kernel/src/platform/sb1/smp.cc
deleted file mode 100644
index 0d7348b0..00000000
--- a/kernel/src/platform/sb1/smp.cc
+++ /dev/null
@@ -1,184 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     platform/sb1/smp.cc
- * Description:   mips64 sibyte MP implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: smp.cc,v 1.6 2006/03/01 14:10:32 ud3 Exp $
- *                
- ********************************************************************/
-
-#include <debug.h>
-#include INC_API(types.h)
-#include INC_API(tcb.h)
-#include INC_GLUE(smp.h)
-#include INC_PLAT(smp.h)
-#include INC_PLAT(cache.h)
-#include INC_GLUE(intctrl.h)
-
-#if defined(CONFIG_SMP)
-
-extern void cfe_init(word_t arg);
-extern int cfe_start_cpu(int cpu, void (*fn)(void), long sp, long gp, long a1);
-extern word_t plat_cpu_freq[CONFIG_SMP_MAX_CPUS], plat_bus_freq[CONFIG_SMP_MAX_CPUS];
-
-bool processor_running[CONFIG_SMP_MAX_CPUS];
-
-extern "C" void handle_ipi(word_t irq, mips64_irq_context_t * frame);
-extern "C" void SECTION (".init") startup_cpu (cpuid_t cpuid);
-
-
-volatile static word_t sim_fn = 0;
-
-void sim_wait(void)
-{
-    int cpu = mips64_get_cpuid();
-
-    while (sim_fn != cpu)
-	cache_t::flush_cache_all();
-
-    startup_cpu(cpu);
-}
-
-void SECTION(".init") init_platform(word_t arg)
-{
-    word_t syscfg = SBREADCSR(A_SCD_SYSTEM_CFG);
-    word_t plldiv = G_SYS_PLL_DIV(syscfg);
-
-    if (mips64_get_cpuid() != 0)    // error
-	sim_wait();
-
-    cfe_init(arg);
-
-    plat_cpu_freq[0] = plldiv * 50000000ul;
-    plat_bus_freq[0] = 100000000;
-}
-
-static void SECTION(".init") mips64_cpu_jump()
-{
-    int cpu = mips64_get_cpuid();
-    startup_cpu(cpu);
-}
-
-void SECTION(".init") mips64_start_processor (cpuid_t cpu)
-{
-    if (cpu != 1)
-	return;
-
-    if (mips64_get_cpuid() != 0)    // error
-	while (1);
-
-    plat_cpu_freq[cpu] = plat_cpu_freq[0];
-    plat_bus_freq[cpu] = plat_bus_freq[0];
-
-    printf("Starting cpu %d\n", cpu);
-
-    cfe_start_cpu(cpu, mips64_cpu_jump, 0xffffffff80800000, 0, 0);
-
-    sim_fn = cpu;
-    cache_t::flush_cache_all();
-}
-
-void SECTION(".init") mips64_processor_online (cpuid_t cpu)
-{
-    processor_running[cpu] = true;
-    cache_t::flush_cache_all();
-}
-
-bool SECTION(".init") mips64_wait_for_processor (cpuid_t cpu)
-{
-    for (word_t i = 0; i < 1000000; i++)
-    {
-	cache_t::flush_cache_all();
-	if (processor_running[cpu])
-	    return true;
-    }
-    return false;
-}
-
-bool SECTION(".init") mips64_is_processor_available (cpuid_t cpu)
-{
-    word_t res;
-    __asm__ __volatile__ (
-	"la	$8,%[sys_rev]\n"
-	"ld	$8,($8)\n"		// Get system revision
-	"dsrl	$8,%[sys_part]\n"	// Shift part # to low bits
-	"dsrl	$8,8\n"			// isolate CPU part of number
-	"and	%[result],$8, 0x0F\n"	// number of CPUs
-	:   [result] "=r" (res)
-	:   [sys_rev] "i" (MIPS64_ADDR_K1(A_SCD_SYSTEM_REVISION)),
-	    [sys_part] "i" (S_SYS_PART)
-	: "$8"
-    );
-
-    if (cpu < res)
-	return true;
-
-    return false;
-}
-
-cpuid_t mips64_get_cpuid (void)
-{
-    cpuid_t res;
-    __asm__ __volatile__ (
-	"mfc0	$8," STR(CP0_PRID) "\n"	    // get CPU PRID register
-	"srl	$8,$8,25\n"		    // determine cpu number
-	"and	%[result],$8,0x07\n"	    // keep only low 3 bits
-	:   [result] "=r" (res)
-	: : "$8"
-    );
-
-    return res;
-}
-
-void SECTION(".init") mips64_init_ipi(cpuid_t cpu)
-{
-    /* Clear out our mailbox registers (both CPUs) */
-    *IMR_POINTER(cpu, R_IMR_MAILBOX_CLR_CPU) = ~(0ul);
-
-    /* Setup the Mailbox interrupts */
-    *IMR_POINTER(cpu, R_IMR_INTERRUPT_MAP_BASE + 8*K_INT_MBOX_3) = 3;		/* Interrupt 3 */
-    *IMR_POINTER(cpu, R_IMR_INTERRUPT_MASK) &= ~((word_t)1 << K_INT_MBOX_3);	/* Unmask interrupt */
-    __asm__ __volatile__ ("sync" : : : "memory");
-
-    get_interrupt_ctrl()->register_interrupt_handler(5, handle_ipi);
-    get_interrupt_ctrl()->unmask(5);	/* Hardware Int 3 */
-    __asm__ __volatile__ ("sync" : : : "memory");
-}
-
-#else
-
-extern word_t plat_cpu_freq[1], plat_bus_freq[1];
-
-void SECTION(".init") init_platform(word_t arg)
-{
-    word_t syscfg = SBREADCSR(A_SCD_SYSTEM_CFG);
-    word_t plldiv = G_SYS_PLL_DIV(syscfg);
-
-    plat_cpu_freq[0] = plldiv * 50000000ul;
-    plat_bus_freq[0] = 100000000;
-}
-
-#endif /* CONFIG_SMP */
diff --git a/kernel/src/platform/sb1/smp.h b/kernel/src/platform/sb1/smp.h
deleted file mode 100644
index ed1bead4..00000000
--- a/kernel/src/platform/sb1/smp.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     platform/sb1/smp.h
- * Description:   mips64 sibyte MP implementation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: smp.h,v 1.3 2006/03/01 14:10:32 ud3 Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__SB1__SMP_H__
-#define __PLATFORM__SB1__SMP_H__
-
-#include INC_API(types.h)
-#include INC_GLUE(smp.h)
-#include INC_PLAT(sb1250_regs.h)
-#include INC_PLAT(sb1250_scd.h)
-#include INC_PLAT(sb1250_int.h)
-#include INC_ARCH(addrspace.h)
-
-#define IMR_POINTER(cpu,reg) \
-    ((volatile word_t*)(MIPS64_ADDR_K1(A_IMR_REGISTER(cpu,reg))))
-
-INLINE void mips64_send_ipi(cpuid_t cpu)
-{
-    *IMR_POINTER(cpu, R_IMR_MAILBOX_SET_CPU) = 1;
-}
-
-INLINE void mips64_clear_ipi(cpuid_t cpu)
-{
-    *IMR_POINTER(cpu, R_IMR_MAILBOX_CLR_CPU) = ~(0ul);
-}
-
-#endif
diff --git a/kernel/src/platform/srm/linker.lds b/kernel/src/platform/srm/linker.lds
deleted file mode 100644
index 873ee219..00000000
--- a/kernel/src/platform/srm/linker.lds
+++ /dev/null
@@ -1,105 +0,0 @@
-/* check ALIGN(4K) before use !!! */
-
-OUTPUT_FORMAT("elf64-alpha")
-
-/* Evil */
-#include INC_API(config.h)
-
-ENTRY(_start)
-#if CONFIG_ALPHA_ADDRESS_BITS == 43
-KERNEL_OFFSET = 0xfffffc0000000000;
-#else
-KERNEL_OFFSET = 0xffff800000000000;
-#endif /* CONFIG_ALPHA_ADDRESS_BITS */
-
-_start_text = (KERNEL_OFFSET + CONFIG_ALPHA_CONSOLE_RESERVE);
-BOOTMEM_SIZE	= 1024K;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	_pal_code_start = .;	
-	.text_pal . : AT (ADDR(.text_pal) - KERNEL_OFFSET)
-	{
-		*(.pal_code)
-	}
-	_pal_code_end = .;	
-
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-	.got : AT (ADDR(.got) - KERNEL_OFFSET)
-	{
-		*(.got)
-	}
-	. = ALIGN(8K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		*(.user.*)
-	}
-	. = ALIGN(8K);
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-        _memory_descriptors_size =
-                (8K - ((memory_descriptors - kip) & (8K-1))) / 8;
-
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-		*(.sbss) 
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(8K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-	_start_text_phys = _start_text - KERNEL_OFFSET;
-	. = ALIGN(8K);
-	_start_bootmem = .;
-	_start_bootmem_phys = _start_bootmem - KERNEL_OFFSET;
-	. = . + BOOTMEM_SIZE;
-	_end_bootmem = .;
-	_end_bootmem_phys = _end_bootmem - KERNEL_OFFSET;
-
-	.init _end_bootmem : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-	}
-
-	. = ALIGN(8K);
-	_bootstack_bottom = .;
-	. = . + 8K;
-	_bootstack_top = .;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K) - KERNEL_OFFSET;
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/tmplplat/linker.lds b/kernel/src/platform/tmplplat/linker.lds
deleted file mode 100644
index 5febff08..00000000
--- a/kernel/src/platform/tmplplat/linker.lds
+++ /dev/null
@@ -1,114 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002, Karlsruhe University
- *
- * File path:	platform/tmplplat/linker.lds
- * Description:	Linker script template.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: linker.lds,v 1.4 2006/10/27 17:35:18 reichelt Exp $
- *
- ***************************************************************************/
-
-
-/* check ALIGN(4K) before use !!! */
-
-BOOTMEM_SIZE	= 512K;
-KERNEL_OFFSET	= 0;
-_start_text	= 0;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(4K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-	.sets . : AT(ADDR(.sets) - KERNEL_OFFSET)
-	{
-		_start_setlist = .;
-		*(.setlist)
-		_end_setlist = .;
-		_start_sets = .;
-		*(SORT(set_*))
-		_end_sets = .;
-	}
-
-	_end_text = ALIGN(4K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-
-	. = ALIGN(4K);
-	_start_bootmem = .;
-	_start_bootmem_phys = _start_bootmem - KERNEL_OFFSET;
-	. = . + BOOTMEM_SIZE;
-	_end_bootmem = .;
-	_end_bootmem_phys = _end_bootmem - KERNEL_OFFSET;
-
-	.init _end_bootmem :
-	{
-		*(.init)
-		*(.roinit)
-		*(.init.data)
-	}
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/tsunami/82C59.h b/kernel/src/platform/tsunami/82C59.h
deleted file mode 100644
index bab24b19..00000000
--- a/kernel/src/platform/tsunami/82C59.h
+++ /dev/null
@@ -1,160 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     platform/tsunami/82C59.h
- * Description:   implementation for the 2 cascaded 82C59 PICs
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: 82C59.h,v 1.4 2003/09/24 19:05:01 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __PLATFORM__TSUNAMI__82C59_H__
-#define __PLATFORM__TSUNAMI__82C59_H__
-
-#include INC_ARCH(devspace.h)
-
-class PIC82C59_t {
- private:
-    /* one for primary, one for secondary */
-    u8_t mask[2];
-    u8_t level[2];
-
- public:
-    enum trigger_e {
-	IST_EDGE = 0,
-	IST_LEVEL = 1
-    };
-
-    enum addrs_e {
-	ICU_LEN = 16,
-	IO_ICU0 = 0x020,
-	IO_ICU1 = 0x0A0,
-	IO_ICU_SIZE = 2,
-	IO_ELCR = 0x4D0,
-	IO_ELCR_SIZE = 2
-    };
-
-    void init() {
-	/* All are initially edge */
-	level[0] = 0;
-	level[1] = 0;
-
-	/* This may not always be necessary, but it can't hurt:
-	 * Initialise primary controller.
-	 */
-	
-	/* Write an initialise command (bit 4 for ICW select, bit 0 for ICW4 Write Required), */
-	devspace_t::outb(IO_ICU0, 1 << 4 | 1);
-	
-	/* Write ICW2: 0 (not sure what Interrupt Vector Base Address should be) */
-	devspace_t::outb(IO_ICU0 + 1, 0);
-
-	/* Write ICW3: set cascade mode (bit 2) */
-	devspace_t::outb(IO_ICU0 + 1, 1 << 2);
-
-	/* Write ICW4: set bit 0, Microprocessor Mode (???) */
-	devspace_t::outb(IO_ICU0 + 1, 1);
-	
-	/* Initialise the secondary controller */
-	
-	/* Write an initialise command (bit 4 for ICW select, bit 0 for ICW4 Write Required), */
-	devspace_t::outb(IO_ICU1, 1 << 4 | 1);
-	
-	/* Write ICW2: 0 (not sure what Interrupt Vector Base Address should be) */
-	devspace_t::outb(IO_ICU1 + 1, 0);
-
-	/* Write ICW3: set slave id code (??) */
-	devspace_t::outb(IO_ICU1 + 1, 1 << 1);
-
-	/* Write ICW4: set bit 0, Microprocessor Mode (???) */
-	devspace_t::outb(IO_ICU1 + 1, 1);
-
-	mask[0] = ~0;
-	mask[1] = ~0;
-
-	printf("Mask is 0x%x 0x%x\n", mask[0], mask[1]);
-
-	/* Mask all interrupts */
-	devspace_t::outb(IO_ICU0 + 1, mask[0]);
-	devspace_t::outb(IO_ICU1 + 1, mask[1]);
-	
-	/* unmask the cascade */
-	enable(2);
-    }
-
-    void set_trigger(int irq, enum trigger_e trigger) {
-	int ctrl = irq / 8;
-	int bit = irq % 8;
-
-	if(trigger == IST_LEVEL)
-	    level[irq] |= (1 << bit);
-	else
-	    level[irq] &= ~(1 << bit);
-	
-	devspace_t::outb(IO_ELCR + ctrl, level[irq]);
-    }
-
-    /* I prefer this terminology to mask and unmask --- they can be ambiguous */
-    void enable(int irq) {
-	if(irq < 8) {
-	    mask[0] &= ~(1 << irq);
-	    devspace_t::outb(IO_ICU0 + 1, mask[0]);
-	} else {
-	    mask[1] &= ~(1 << (irq - 8));
-	    devspace_t::outb(IO_ICU1 + 1, mask[1]);
-	}
-    }
-
-    void disable(int irq) {
-	if(irq < 8) {
-	    mask[0] |= (1 << irq);
-	    devspace_t::outb(IO_ICU0 + 1, mask[0]);
-	} else {
-	    mask[1] |= (1 << (irq - 8));
-	    devspace_t::outb(IO_ICU1 + 1, mask[1]);
-	}
-    }
-
-    void ack(int irq) {
-	if(irq > 7) 
-	    devspace_t::outb(IO_ICU1, (0x3 << 5) | irq - 8);
-
-	/* ack int or cascade int */
-	devspace_t::outb(IO_ICU0, (0x3 << 5) | (irq > 7 ? 2 : irq));
-    }
-
-    void print_status(void) {
-	word_t mask = 0;
-	word_t req = 0;
-
-	mask = devspace_t::inb(IO_ICU0 + 1) | (devspace_t::inb(IO_ICU1 + 1) << 8);
-	req = devspace_t::inb(IO_ICU0) | (devspace_t::inb(IO_ICU1) << 8);
-	
-	printf("82C59:\n");
-	printf("\tMask:    0x%x\n", mask);
-	printf("\tRequest: 0x%x\n", req);
-    }
-};
-
-#endif /* !__PLATFORM__TSUNAMI__82C59_H__ */
diff --git a/kernel/src/platform/tsunami/devspace.h b/kernel/src/platform/tsunami/devspace.h
deleted file mode 100644
index 71de4fa4..00000000
--- a/kernel/src/platform/tsunami/devspace.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     platform/tsunami/devspace.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: devspace.h,v 1.3 2003/09/24 19:05:01 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM_DEVSPACE_H__
-#define __PLATFORM_DEVSPACE_H__
-
-#include INC_ARCH(page.h)
-
-class devspace_t {
- private:
-    /* Various PCI spaces */
-    /* No sparse I/O on the Tsunami */
-    enum pci_space {
-	PCI_DENSE_OFFSET = (AS_KSEG_START + 0x10000000000UL),
-	PCI_IO_OFFSET    = (AS_KSEG_START + 0x101fc000000UL)
-    };
-
- public:
-    __inline__ static void mb() {
-	__asm__ __volatile__("mb": : :"memory");
-    }
-
-    __inline__ static u8_t dense_read8(word_t pci_addr) {
-	volatile u8_t *val = (volatile u8_t *) (PCI_DENSE_OFFSET + pci_addr);
-
-	return *val;
-    }
-
-    __inline__ static void dense_write8(word_t pci_addr, u8_t data) {
-	volatile u8_t *val = (volatile u8_t *) (PCI_DENSE_OFFSET + pci_addr);
-
-	*val = data;
-    }
-
-    __inline__ static u8_t inb(int port) {
-	volatile u8_t *val = (volatile u8_t *) (PCI_IO_OFFSET + port);
-
-	mb();
-	return *val;
-    }
-
-
-    __inline__ static void outb(int port, u8_t data) {
-	volatile u8_t *val = (volatile u8_t *) (PCI_IO_OFFSET + port);
-
-	*val = data;
-	mb();
-    }
-};
-
-
-#endif /* __PLATFORM_DEVSPACE_H__ */
diff --git a/kernel/src/platform/tsunami/intctrl.h b/kernel/src/platform/tsunami/intctrl.h
deleted file mode 100644
index bc6a407c..00000000
--- a/kernel/src/platform/tsunami/intctrl.h
+++ /dev/null
@@ -1,156 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     platform/tsunami/intctrl.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: intctrl.h,v 1.6 2004/03/08 05:26:37 benno Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__INTCTRL_H_
-#define __PLATFORM__INTCTRL_H_
-
-#include INC_ARCH(intctrl.h)
-#include INC_PLAT(82C59.h)
-
-#define TSUNAMI_IRQ_MASK (AS_KSEG_START + 0x101a0000200UL) // DIM0 (assumes CPU0)
-#define TSUNAMI_IRQ_REQ  (AS_KSEG_START + 0x101a0000300UL) // DIRR
-
-#define	NUM_SPECIAL_IRQS  8
-#define	NUM_ISA_IRQS  16
-#define	NUM_PCI_IRQS  64
-#define	NUM_IRQS  (NUM_SPECIAL_IRQS + NUM_ISA_IRQS + NUM_PCI_IRQS)
-
-#define	BASE_SPECIAL_IRQ  0
-#define	BASE_ISA_IRQ (NUM_SPECIAL_IRQS + BASE_SPECIAL_IRQ)
-#define	BASE_PCI_IRQ (NUM_ISA_IRQS + BASE_ISA_IRQ)
-	
-#define	MCHECK_IRQ  2
-#define PERF_IRQ    4
-
-class intctrl_t : public alpha_intctrl_t {
- private:
-
-    word_t cached_irq_mask;
-    PIC82C59_t sio;
-
- public:
-    word_t get_number_irqs(void) 
-	{ return NUM_IRQS; }
-
-    bool is_irq_available(int irq) 
-	{ return irq < NUM_IRQS && (irq >= BASE_ISA_IRQ || irq == MCHECK_IRQ || irq == PERF_IRQ); }
-
-    void set_cpu(word_t irq, word_t cpu) {}
-
-    word_t decode_irq(word_t irq) {
-	word_t ret = 0;
-
-	if (irq >= 0x800) {
-	    ret = NUM_SPECIAL_IRQS + ((irq - 0x800) >> 4);
-	} else {
-	    printf("Got a weird device interrupt (vector 0x%lx)\n", irq);
-	    enter_kdebug("Weird int");
-	}
-	
-	return ret;
-    }
-
-    void mask(word_t irq) {
-	if (irq >= BASE_PCI_IRQ) {
-	    /* PCI Interrupt */
-	    cached_irq_mask &= ~(1UL << (irq - BASE_PCI_IRQ));
-	    *(volatile word_t *)TSUNAMI_IRQ_MASK = cached_irq_mask;
-
-	} else if (irq >= BASE_ISA_IRQ) {
-	    /* ISA Interrupt */
-	    sio.disable(irq - BASE_ISA_IRQ);
-	    sio.ack(irq - BASE_ISA_IRQ);
-	} else {
-	    /* `Special' interrupt */
-	}
-    }
-
-    bool unmask(word_t irq) {
-	if (irq >= BASE_PCI_IRQ) {
-	    /* PCI Interrupt */
-	    cached_irq_mask |= (1UL << (irq - BASE_PCI_IRQ));
-	    *(volatile word_t *)TSUNAMI_IRQ_MASK = cached_irq_mask;
-	} else if (irq >= BASE_ISA_IRQ) {
-	    /* ISA Interrupt */
-	    sio.enable(irq - BASE_ISA_IRQ);
-	    sio.ack(irq - BASE_ISA_IRQ);
-
-	} else {
-	    /* `Special' interrupt */
-	}
-
-	return false;
-    }
-
-    void enable(word_t irq) {
-	unmask(irq);
-    }
-
-    bool disable(word_t irq) {
-	mask(irq);
-	return false;
-    }
-
-    void ack(word_t irq) {
-	if (irq >= BASE_PCI_IRQ) {
-	    /* PCI Interrupt */
-	    /* Necessary? Linux just masks */
-
-	} else if (irq >= BASE_ISA_IRQ) {
-	    /* ISA Interrupt */
-	    sio.ack(irq - BASE_ISA_IRQ);
-
-	} else {
-	    /* `Special' interrupt */
-	}
-    }
-
-    void init_arch() {
-	sio.init();
-	*(volatile word_t *)TSUNAMI_IRQ_MASK = 0;
-	cached_irq_mask = 0;
-    }
-
-    void init_cpu() {}
-
-    void print_status(void) {
-	sio.print_status(); 
-	printf("TSUNAMI:\n");
-	printf("\tMask:     0x%016lx\n", *(volatile word_t *) TSUNAMI_IRQ_MASK);
-	printf("\tRequest:  0x%016lx\n", *(volatile word_t *) TSUNAMI_IRQ_REQ);
-	printf("\tActual:   0x%016lx\n", *(volatile word_t *) TSUNAMI_IRQ_MASK & *(volatile word_t *) TSUNAMI_IRQ_REQ);
-    }
-};
-
-
-
-#endif /* __PLATFORM__INTCTRL_H__ */
diff --git a/kernel/src/platform/tsunami/linker.lds b/kernel/src/platform/tsunami/linker.lds
deleted file mode 100644
index 9e6aed2a..00000000
--- a/kernel/src/platform/tsunami/linker.lds
+++ /dev/null
@@ -1,2 +0,0 @@
-
-#include INC_ARCH(linker.lds)
diff --git a/kernel/src/platform/u4600/Makeconf b/kernel/src/platform/u4600/Makeconf
deleted file mode 100644
index ec61a6d8..00000000
--- a/kernel/src/platform/u4600/Makeconf
+++ /dev/null
@@ -1,4 +0,0 @@
-ifeq ("$(CONFIG_PLAT_U4600)","y")
-SOURCES += src/platform/u4600/plat.cc
-endif
-
diff --git a/kernel/src/platform/u4600/cache.h b/kernel/src/platform/u4600/cache.h
deleted file mode 100644
index c06ecf57..00000000
--- a/kernel/src/platform/u4600/cache.h
+++ /dev/null
@@ -1,280 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:	  arch/mips64/cache.h
- * Description:   Functions which manipulate the MIPS cache
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: cache.h,v 1.6 2004/12/02 00:01:29 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__ERPCN01__CACHE_H__
-#define __PLATFORM__ERPCN01__CACHE_H__
-
-#include INC_ARCH(cache.h)
-#include INC_ARCH(mipsregs.h)
-#include INC_ARCH(addrspace.h)
-#include "linear_ptab.h"
-
-#define CONFIG_MIPS64_DCACHE_SIZE	(16*1024)
-#define CONFIG_MIPS64_ICACHE_SIZE	(16*1024)
-#define CONFIG_MIPS64_CACHE_LINE_SIZE	16
-#define CONFIG_MIPS64_CACHE_WAYS	2
-
-#define CACHE_WAYS		CONFIG_MIPS64_CACHE_WAYS
-//#define CACHE_LINE_SIZE		CONFIG_MIPS64_CACHE_LINE_SIZE	in config.h
-#define DCACHE_SIZE		CONFIG_MIPS64_DCACHE_SIZE
-#define ICACHE_SIZE		CONFIG_MIPS64_ICACHE_SIZE
-
-/*
- * Cache Operations
- */
-#define Index_Invalidate_I      0x00
-#define Index_Writeback_Inv_D   0x01
-#define Index_Invalidate_SI     0x02
-#define Index_Writeback_Inv_SD  0x03
-#define Index_Load_Tag_I        0x04
-#define Index_Load_Tag_D        0x05
-#define Index_Load_Tag_SI       0x06
-#define Index_Load_Tag_SD       0x07
-#define Index_Store_Tag_I       0x08
-#define Index_Store_Tag_D       0x09
-#define Index_Store_Tag_SI      0x0A
-#define Index_Store_Tag_SD      0x0B
-#define Create_Dirty_Excl_D     0x0d
-#define Create_Dirty_Excl_SD    0x0f
-#define Hit_Invalidate_I        0x10
-#define Hit_Invalidate_D        0x11
-#define Hit_Invalidate_SI       0x12
-#define Hit_Invalidate_SD       0x13
-#define Fill                    0x14
-#define Hit_Writeback_Inv_D     0x15
-                                        /* 0x16 is unused */
-#define Hit_Writeback_Inv_SD    0x17
-#define Hit_Writeback_I         0x18
-#define Hit_Writeback_D         0x19
-                                        /* 0x1a is unused */
-#define Hit_Writeback_SD        0x1b
-                                        /* 0x1c is unused */
-                                        /* 0x1e is unused */
-#define Hit_Set_Virtual_SI      0x1e
-#define Hit_Set_Virtual_SD      0x1f
-
-#define cache16_unroll32(base,op)                               \
-	__asm__ __volatile__("                                  \
-		.set noreorder;                                 \
-		cache %1, 0x000(%0); cache %1, 0x010(%0);       \
-		cache %1, 0x020(%0); cache %1, 0x030(%0);       \
-		cache %1, 0x040(%0); cache %1, 0x050(%0);       \
-		cache %1, 0x060(%0); cache %1, 0x070(%0);       \
-		cache %1, 0x080(%0); cache %1, 0x090(%0);       \
-		cache %1, 0x0a0(%0); cache %1, 0x0b0(%0);       \
-		cache %1, 0x0c0(%0); cache %1, 0x0d0(%0);       \
-		cache %1, 0x0e0(%0); cache %1, 0x0f0(%0);       \
-		cache %1, 0x100(%0); cache %1, 0x110(%0);       \
-		cache %1, 0x120(%0); cache %1, 0x130(%0);       \
-		cache %1, 0x140(%0); cache %1, 0x150(%0);       \
-		cache %1, 0x160(%0); cache %1, 0x170(%0);       \
-		cache %1, 0x180(%0); cache %1, 0x190(%0);       \
-		cache %1, 0x1a0(%0); cache %1, 0x1b0(%0);       \
-		cache %1, 0x1c0(%0); cache %1, 0x1d0(%0);       \
-		cache %1, 0x1e0(%0); cache %1, 0x1f0(%0);       \
-		.set reorder"                                   \
-		:                                               \
-		: "r" (base),                                   \
-		  "i" (op));
-
-static inline void blast_dcache16(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + DCACHE_SIZE);
-
-    while (start < end) {
-	cache16_unroll32(start, Index_Writeback_Inv_D);
-	start += 0x200;
-    }
-}
-
-
-static inline void blast_icache16(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    while (start < end) {
-	cache16_unroll32(start, Index_Invalidate_I);
-	start += 0x200;
-    }
-}
-
-
-static inline void init_dcache(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + DCACHE_SIZE);
-
-    asm (
-	"mtc0	$0, "STR(CP0_TAGLO)"\n\t"
-	"mtc0	$0, "STR(CP0_TAGHI)"\n\t"
-    );
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_D)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-static inline void init_icache(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    asm (
-	"mtc0	$0, "STR(CP0_TAGLO)"\n\t"
-	"mtc0	$0, "STR(CP0_TAGHI)"\n\t"
-    );
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-
-INLINE void cache_t::init_cpu(void)
-{
-    word_t temp;
-
-    __asm__ __volatile__ (
-	"la	%0, 1f\n\t"
-	"or	%0, 0xffffffffa0000000\n\t"
-	"jr	%0\n\t"
-	"1:\n\t"
-	"mfc0	%0, "STR(CP0_CONFIG)"\n\t"
-	: "=r" (temp)
-    );
-    temp &= (~CONFIG_CACHE_MASK);
-#if CONFIG_UNCACHED
-    temp |= CONFIG_NOCACHE;
-#else
-    temp |= CONFIG_CACHABLE_NONCOHERENT;
-#endif
-
-    __asm__ __volatile__ (
-	"mtc0	%0, "STR(CP0_CONFIG)"\n\t"
-	: : "r" (temp)
-    );
-
-    /* Important that these inline! */
-    init_dcache();
-    init_icache();
-
-    __asm__ __volatile__ (
-	"la	%0, 2f\n\t"
-	"jr	%0\n\t"
-	"2:\n\t"
-	: : "r" (temp)
-    );
-}
-
-INLINE void cache_t::flush_cache_all(void)
-{
-    blast_dcache16(); blast_icache16();
-}
-
-INLINE void cache_t::flush_cache_l1(void)
-{
-    blast_dcache16(); blast_icache16();
-}
-
-INLINE void cache_t::flush_cache_range(unsigned long start, unsigned long end)
-{
-    start &= (~CACHE_LINE_SIZE);
-    end = (end + (CACHE_LINE_SIZE-1)) & (~CACHE_LINE_SIZE);
-
-    if (end > (start + DCACHE_SIZE))
-	end = start + DCACHE_SIZE;
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_D)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-INLINE void cache_t::flush_icache_range(unsigned long start, unsigned long end)
-{
-    start &= (~CACHE_LINE_SIZE);
-    end = (end + (CACHE_LINE_SIZE-1)) & (~CACHE_LINE_SIZE);
-
-    if (end > (start + ICACHE_SIZE))
-	end = start + ICACHE_SIZE;
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-INLINE void cache_t::flush_cache_page(unsigned long page, pgent_t::pgsize_e pgsize)
-{
-    unsigned long start = page & (~page_mask(pgsize));
-    unsigned long end = start + page_size(pgsize);
-
-    if (end > (start + DCACHE_SIZE))
-	end = start + DCACHE_SIZE;
-
-    while (start < end) {
-	cache16_unroll32(start, Index_Writeback_Inv_D);
-	start += 0x200;
-    }
-}
-
-INLINE void cache_t::flush_icache_page(unsigned long page, pgent_t::pgsize_e pgsize)
-{
-    unsigned long start = page & (~page_mask(pgsize));
-    unsigned long end = start + page_size(pgsize);
-
-    if (end > (start + ICACHE_SIZE))
-	end = start + ICACHE_SIZE;
-
-    while (start < end) {
-	cache16_unroll32(start, Index_Invalidate_I);
-	start += 0x200;
-    }
-}
-
-#endif
diff --git a/kernel/src/platform/u4600/config.h b/kernel/src/platform/u4600/config.h
deleted file mode 100644
index 299eb692..00000000
--- a/kernel/src/platform/u4600/config.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     platform/u4600/config.h
- * Description:   Platform specific configuration
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: config.h,v 1.5 2003/11/18 02:04:31 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__U4600__CONFIG_H__
-#define __PLATFORM__U4600__CONFIG_H__
-
-
-#define CONFIG_MIPS64_ADDRESS_BITS	    40
-#define CONFIG_MIPS64_PHYS_ADDRESS_BITS	    36
-#define CONFIG_MIPS64_VPN_SHIFT		    12
-#define CONFIG_MIPS64_PAGEMASK_4K	    0
-
-#define CONFIG_MIPS64_CONSOLE_RESERVE (0)
-
-#define CONFIG_MIPS64_TLB_SIZE 48
-
-#define CONFIG_MIPS64_STATUS_MASK 0x0fffff00
-
-#if !defined(__ASSEMBLER__)
-
-#else /* ASSEMBLER */
-
-/* 64-bit virtual memory kernel mode */
-/* 64-bit virtual memory supervisor mode */
-/* 64-bit virtual memory user mode */
-/* 32 FPU registers */
-/* disable parity/ECC */
-#define	INIT_CP0_STATUS_SET			\
-    (ST_KX|ST_SX|ST_UX|ST_FR|ST_DE)
-
-/* not used here: disable reverse endian */
-/* go into kernel mode */
-/* remove error condition */
-/* remove exception level */
-/* FPU is disabled */
-/* clear NMI/soft reset */
-#define	INIT_CP0_STATUS_CLEAR			\
-    (ST_RE|ST_KSU|ST_ERL|ST_EXL|ST_CU1|ST_SR)
-
-#endif
-
-#endif /* __PLATFORM__U4600__CONFIG_H__ */
diff --git a/kernel/src/platform/u4600/linker.lds b/kernel/src/platform/u4600/linker.lds
deleted file mode 100644
index 15acb3ff..00000000
--- a/kernel/src/platform/u4600/linker.lds
+++ /dev/null
@@ -1,85 +0,0 @@
-/* check ALIGN(4K) before use !!! */
-
-#include INC_GLUE(offsets.h)
-
-ENTRY(_start)
-_start_text_phys	= 0x50000;
-_start_text		= KERNEL_OFFSET + _start_text_phys;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-		*(.base)
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-
-	. = ALIGN(4K);
-	.init _end_text : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-	}
-
-	. = ALIGN(8K);
-	_bootstack_bottom = .;
-	. = . + 8K;
-	_bootstack_top = .;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K) - KERNEL_OFFSET;
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/u4600/plat.cc b/kernel/src/platform/u4600/plat.cc
deleted file mode 100644
index 0c5162e9..00000000
--- a/kernel/src/platform/u4600/plat.cc
+++ /dev/null
@@ -1,41 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     platform/u4600/plat.cc
- * Description:   u4600 platform
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id$
- *                
- ********************************************************************/
-
-
-extern word_t plat_cpu_freq[1], plat_bus_freq[1];
-
-void SECTION(".init") init_platform(word_t arg)
-{
-    plat_cpu_freq[0] = 100000000ul;
-    plat_bus_freq[0] = 33300000ul;
-}
-
diff --git a/kernel/src/platform/vr41xx/Makeconf b/kernel/src/platform/vr41xx/Makeconf
deleted file mode 100644
index 8e2e873c..00000000
--- a/kernel/src/platform/vr41xx/Makeconf
+++ /dev/null
@@ -1,4 +0,0 @@
-ifeq ("$(CONFIG_PLAT_VR41XX)","y")
-SOURCES += src/platform/vr41xx/plat.cc
-endif
-
diff --git a/kernel/src/platform/vr41xx/cache.h b/kernel/src/platform/vr41xx/cache.h
deleted file mode 100644
index 29e659f5..00000000
--- a/kernel/src/platform/vr41xx/cache.h
+++ /dev/null
@@ -1,277 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  National ICT Australia (NICTA)
- *                
- * File path:	  platform/vr41xx/cache.h
- * Description:   Functions which manipulate the MIPS cache
- * 
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id$
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__VR41XX__CACHE_H__
-#define __PLATFORM__VR41XX__CACHE_H__
-
-#include INC_ARCH(cache.h)
-#include INC_ARCH(mipsregs.h)
-#include INC_ARCH(addrspace.h)
-#include "linear_ptab.h"
-
-#ifdef CONFIG_CPU_MIPS64_VR4121
-
-#define CONFIG_MIPS64_DCACHE_SIZE	(4*1024)
-#define CONFIG_MIPS64_ICACHE_SIZE	(4*1024)
-#define CONFIG_MIPS64_CACHE_LINE_SIZE	16
-#define CONFIG_MIPS64_CACHE_WAYS	1
-
-#elif CONFIG_CPU_MIPS64_VR4181
-
-#define CONFIG_MIPS64_DCACHE_SIZE	(8*1024)
-#define CONFIG_MIPS64_ICACHE_SIZE	(16*1024)
-#define CONFIG_MIPS64_CACHE_LINE_SIZE	16
-#define CONFIG_MIPS64_CACHE_WAYS	1
-
-#else
-
-#error UNKNOWN CPU
-
-#endif
-
-#define CACHE_WAYS		CONFIG_MIPS64_CACHE_WAYS
-//#define CACHE_LINE_SIZE		CONFIG_MIPS64_CACHE_LINE_SIZE   in config.h
-#define DCACHE_SIZE		CONFIG_MIPS64_DCACHE_SIZE
-#define ICACHE_SIZE		CONFIG_MIPS64_ICACHE_SIZE
-
-/*
- * Cache Operations
- */
-#define Index_Invalidate_I      0x00
-#define Index_Writeback_Inv_D   0x01
-#define Index_Load_Tag_I        0x04
-#define Index_Load_Tag_D        0x05
-#define Index_Store_Tag_I       0x08
-#define Index_Store_Tag_D       0x09
-#define Create_Dirty_Excl_D     0x0d
-#define Hit_Invalidate_I        0x10
-#define Hit_Invalidate_D        0x11
-#define Fill                    0x14
-#define Hit_Writeback_I         0x18
-#define Hit_Writeback_D         0x19
-
-#define cache16_unroll32(base,op)                               \
-	__asm__ __volatile__("                                  \
-		.set noreorder;                                 \
-		cache %1, 0x000(%0); cache %1, 0x010(%0);       \
-		cache %1, 0x020(%0); cache %1, 0x030(%0);       \
-		cache %1, 0x040(%0); cache %1, 0x050(%0);       \
-		cache %1, 0x060(%0); cache %1, 0x070(%0);       \
-		cache %1, 0x080(%0); cache %1, 0x090(%0);       \
-		cache %1, 0x0a0(%0); cache %1, 0x0b0(%0);       \
-		cache %1, 0x0c0(%0); cache %1, 0x0d0(%0);       \
-		cache %1, 0x0e0(%0); cache %1, 0x0f0(%0);       \
-		cache %1, 0x100(%0); cache %1, 0x110(%0);       \
-		cache %1, 0x120(%0); cache %1, 0x130(%0);       \
-		cache %1, 0x140(%0); cache %1, 0x150(%0);       \
-		cache %1, 0x160(%0); cache %1, 0x170(%0);       \
-		cache %1, 0x180(%0); cache %1, 0x190(%0);       \
-		cache %1, 0x1a0(%0); cache %1, 0x1b0(%0);       \
-		cache %1, 0x1c0(%0); cache %1, 0x1d0(%0);       \
-		cache %1, 0x1e0(%0); cache %1, 0x1f0(%0);       \
-		.set reorder"                                   \
-		:                                               \
-		: "r" (base),                                   \
-		  "i" (op));
-
-static inline void blast_dcache16(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + DCACHE_SIZE);
-
-    while(start < end) {
-	cache16_unroll32(start,Index_Writeback_Inv_D);
-	start += 0x200;
-    }
-}
-
-
-static inline void blast_icache16(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    while(start < end) {
-	cache16_unroll32(start,Index_Invalidate_I);
-	start += 0x200;
-    }
-}
-
-
-static inline void init_dcache(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + DCACHE_SIZE);
-
-    asm (
-	"mtc0	$0, "STR(CP0_TAGLO)"\n\t"
-	"mtc0	$0, "STR(CP0_TAGHI)"\n\t"
-    );
-
-    while(start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_D)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-static inline void init_icache(void)
-{
-    unsigned long start = KSEG0;
-    unsigned long end = (start + ICACHE_SIZE);
-
-    asm (
-	"mtc0	$0, "STR(CP0_TAGLO)"\n\t"
-	"mtc0	$0, "STR(CP0_TAGHI)"\n\t"
-    );
-
-    while(start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-
-INLINE void cache_t::init_cpu(void)
-{
-    word_t temp;
-
-    __asm__ __volatile__ (
-	"la	%0, 1f\n\t"
-	"or	%0, 0xffffffffa0000000\n\t"
-	"jr	%0\n\t"
-	"1:\n\t"
-	"mfc0	%0, "STR(CP0_CONFIG)"\n\t"
-	: "=r" (temp)
-    );
-    temp &= (~CONFIG_CACHE_MASK);
-#if CONFIG_UNCACHED
-    temp |= CONFIG_NOCACHE;
-#else
-    temp |= CONFIG_CACHABLE_NONCOHERENT;
-#endif
-
-    __asm__ __volatile__ (
-	"mtc0	%0, "STR(CP0_CONFIG)"\n\t"
-	: : "r" (temp)
-    );
-
-    /* Important that these inline! */
-    init_dcache();
-    init_icache();
-
-    __asm__ __volatile__ (
-	"la	%0, 2f\n\t"
-	"jr	%0\n\t"
-	"2:\n\t"
-	: : "r" (temp)
-    );
-}
-
-INLINE void cache_t::flush_cache_all(void)
-{
-    blast_dcache16(); blast_icache16();
-}
-
-INLINE void cache_t::flush_cache_l1(void)
-{
-    blast_dcache16(); blast_icache16();
-}
-
-INLINE void cache_t::flush_cache_range(unsigned long start, unsigned long end)
-{
-    start &= (~CACHE_LINE_SIZE);
-    end = (end + (CACHE_LINE_SIZE-1)) & (~CACHE_LINE_SIZE);
-
-    if (end > (start + DCACHE_SIZE))
-	end = start + DCACHE_SIZE;
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_D)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-INLINE void cache_t::flush_icache_range(unsigned long start, unsigned long end)
-{
-    start &= (~CACHE_LINE_SIZE);
-    end = (end + (CACHE_LINE_SIZE-1)) & (~CACHE_LINE_SIZE);
-
-    if (end > (start + ICACHE_SIZE))
-	end = start + ICACHE_SIZE;
-
-    while (start < end) {
-	asm (
-	    "cache  %1, 0(%0)"
-	    : : "r" (start), "i" (Index_Store_Tag_I)
-	);
-	start += CACHE_LINE_SIZE;
-    }
-}
-
-INLINE void cache_t::flush_cache_page(unsigned long page, pgent_t::pgsize_e pgsize)
-{   
-    unsigned long start = page & (~page_mask(pgsize));
-    unsigned long end = start + page_size(pgsize);
-
-    if (end > (start + DCACHE_SIZE))
-	end = start + DCACHE_SIZE;
-
-    while (start < end) {
-	cache16_unroll32(start, Index_Writeback_Inv_D);
-	start += 0x200;
-    }
-}
-
-INLINE void cache_t::flush_icache_page(unsigned long page, pgent_t::pgsize_e pgsize)
-{   
-    unsigned long start = page & (~page_mask(pgsize));
-    unsigned long end = start + page_size(pgsize);
-
-    if (end > (start + ICACHE_SIZE))
-	end = start + ICACHE_SIZE;
-
-    while (start < end) {
-	cache16_unroll32(start, Index_Invalidate_I);
-	start += 0x200;
-    }
-}
-
-#endif
diff --git a/kernel/src/platform/vr41xx/config.h b/kernel/src/platform/vr41xx/config.h
deleted file mode 100644
index 5dcb083f..00000000
--- a/kernel/src/platform/vr41xx/config.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  National ICT Australia (NICTA)
- *                
- * File path:     platform/vr41xx/config.h
- * Description:   Platform specific configuration
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id$
- *                
- ********************************************************************/
-
-#ifndef __PLATFORM__VR41XX__CONFIG_H__
-#define __PLATFORM__VR41XX__CONFIG_H__
-
-
-#define CONFIG_MIPS64_ADDRESS_BITS	    40
-#define CONFIG_MIPS64_PHYS_ADDRESS_BITS	    32
-#define CONFIG_MIPS64_VPN_SHIFT		    10
-#define CONFIG_MIPS64_PAGEMASK_4K	    0x1800
-
-#define CONFIG_MIPS64_CONSOLE_RESERVE	    (0)
-
-#define CONFIG_MIPS64_TLB_SIZE 32
-
-#define CONFIG_MIPS64_STATUS_MASK 0x0fffff00
-
-#if !defined(__ASSEMBLER__)
-
-#else /* ASSEMBLER */
-
-/* 64-bit virtual memory kernel mode */
-/* 64-bit virtual memory supervisor mode */
-/* 64-bit virtual memory user mode */
-#define	INIT_CP0_STATUS_SET			\
-    (ST_KX|ST_SX|ST_UX)
-
-/* not used here: disable reverse endian */
-/* go into kernel mode */
-/* remove error condition */
-/* remove exception level */
-/* clear NMI/soft reset */
-#define	INIT_CP0_STATUS_CLEAR			\
-    (ST_KSU|ST_ERL|ST_EXL|ST_SR)
-
-#endif
-
-#endif /* __PLATFORM__VR41XX__CONFIG_H__ */
diff --git a/kernel/src/platform/vr41xx/linker.lds b/kernel/src/platform/vr41xx/linker.lds
deleted file mode 100644
index 7435c08c..00000000
--- a/kernel/src/platform/vr41xx/linker.lds
+++ /dev/null
@@ -1,85 +0,0 @@
-/* check ALIGN(4K) before use !!! */
-
-#include INC_GLUE(offsets.h)
-
-ENTRY(_start)
-_start_text_phys	= 0x5000;
-_start_text		= KERNEL_OFFSET + _start_text_phys;
-
-SECTIONS
-{
-	.text _start_text : AT (ADDR(.text) - KERNEL_OFFSET)
-	{
-		. = ALIGN(64K);
-		*(.base)
-		*(.text.startup)
-		*(.text)
-		*(.gnu.linkonce.*)
-	}
-
-	. = ALIGN(4K);
-	.rodata . : AT (ADDR(.rodata) - KERNEL_OFFSET)
-	{
-		*(.rodata)
-		*(.rodata.*)
-	}
-
-	. = ALIGN(4K);
-	.kip .  : AT (ADDR(.kip) - KERNEL_OFFSET)
-	{
-#include INC_API(kip.ldi)
-		. = ALIGN(2K);
-		*(.user.*)
-	}
-	. = ALIGN(4K);
-
-	_memory_descriptors_offset = memory_descriptors - kip;
-	_memory_descriptors_size =
-		(2K - ((memory_descriptors - kip) & (4K-1))) / 16;
-
-	.data . :  AT (ADDR(.data) - KERNEL_OFFSET)
-	{
-		*(.sdata)
-		*(.data)
-		*(.data.*)
-		*(.bss)
-	}
-
-	.kdebug . : AT(ADDR(.kdebug) - KERNEL_OFFSET)
-	{
-		*(.kdebug)
-		*(.kdebug-bss)
-	}
-
-#include <generic/linkersets.ldi>
-
-	_end_text = ALIGN(4K);
-	_end_text_phys = _end_text - KERNEL_OFFSET;
-
-	. = ALIGN(4K);
-	.init _end_text : AT(ADDR(.init) - KERNEL_OFFSET)
-	{
-		*(.init)
-		*(.init.*)
-		*(.roinit)
-		*(.init.data)
-	}
-
-	. = ALIGN(8K);
-	_bootstack_bottom = .;
-	. = . + 8K;
-	_bootstack_top = .;
-
-	/* special section that is discarded during linking
-	   all unwanted sections should go here */
-
-	/* Required for user code! */
-	_end = ALIGN(8K) - KERNEL_OFFSET;
-	/DISCARD/ :
-	{
-		*(*)
-		*(.eh_frame)
-		*(.note)
-		*(.comment)
-	}
-}
diff --git a/kernel/src/platform/vr41xx/plat.cc b/kernel/src/platform/vr41xx/plat.cc
deleted file mode 100644
index e2b22c04..00000000
--- a/kernel/src/platform/vr41xx/plat.cc
+++ /dev/null
@@ -1,41 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  University of New South Wales
- *                
- * File path:     platform/vr41xx/plat.cc
- * Description:   vr41xx platform
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: plat.cc,v 1.2 2006/03/01 14:10:32 ud3 Exp $
- *                
- ********************************************************************/
-
-
-extern word_t plat_cpu_freq[1], plat_bus_freq[1];
-
-void SECTION(".init") init_platform(word_t arg)
-{
-    plat_cpu_freq[0] = 65000000ul;
-    plat_bus_freq[0] = 32800000ul;
-}
-
diff --git a/user/Makefile.in b/user/Makefile.in
index a6d42d8b..40e49d81 100644
--- a/user/Makefile.in
+++ b/user/Makefile.in
@@ -1,8 +1,8 @@
 ######################################################################
 ##                
-## Copyright (C) 2003-2004, 2006,  Karlsruhe University
+## Copyright (C) 2003-2004, 2006-2007,  Karlsruhe University
 ##                
-## File path:     pistachio/user/Makefile.in
+## File path:     Makefile.in
 ##                
 ## Redistribution and use in source and binary forms, with or without
 ## modification, are permitted provided that the following conditions
@@ -35,8 +35,7 @@ top_builddir=	@builddir@
 
 include $(top_srcdir)/Mk/l4.base.mk
 
-HEADER_DIRS=	l4 l4/alpha l4/amd64 l4/arm l4/ia32 l4/ia64 \
-		l4/mips64 l4/powerpc l4/powerpc64 l4/sparc64
+HEADER_DIRS=	l4 l4/amd64 l4/ia32 l4/powerpc l4/powerpc64
 
 HEADER_FILES=	l4io.h \
 		l4/arch.h \
@@ -53,6 +52,11 @@ HEADER_FILES=	l4io.h \
 		l4/space.h \
 		l4/thread.h \
 		l4/types.h \
+		l4/amd64/kdebug.h \
+		l4/amd64/specials.h \
+		l4/amd64/syscalls.h \
+		l4/amd64/types.h \
+		l4/amd64/vregs.h \
 		l4/ia32/arch.h \
 		l4/ia32/kdebug.h \
 		l4/ia32/specials.h \
@@ -60,13 +64,6 @@ HEADER_FILES=	l4io.h \
 		l4/ia32/tracebuffer.h \
 		l4/ia32/types.h \
 		l4/ia32/vregs.h \
-		l4/ia64/arch.h \
-		l4/ia64/kdebug.h \
-		l4/ia64/runconv.h \
-		l4/ia64/specials.h \
-		l4/ia64/syscalls.h \
-		l4/ia64/types.h \
-		l4/ia64/vregs.h \
 		l4/powerpc/kdebug.h \
 		l4/powerpc/specials.h \
 		l4/powerpc/syscalls.h \
@@ -77,29 +74,6 @@ HEADER_FILES=	l4io.h \
 		l4/powerpc64/syscalls.h \
 		l4/powerpc64/types.h \
 		l4/powerpc64/vregs.h \
-		l4/mips64/kdebug.h \
-		l4/mips64/specials.h \
-		l4/mips64/syscalls.h \
-		l4/mips64/types.h \
-		l4/mips64/vregs.h \
-		l4/arm/kdebug.h \
-		l4/arm/specials.h \
-		l4/arm/syscalls.h \
-		l4/arm/types.h \
-		l4/arm/vregs.h \
-	 	l4/alpha/kdebug.h \
-	 	l4/alpha/pal.h \
-		l4/alpha/specials.h \
-		l4/alpha/syscalls.h \
-		l4/alpha/types.h \
-		l4/alpha/vregs.h \
-		l4/alpha/asm.h \
-		l4/alpha/runconv.h \
-		l4/amd64/kdebug.h \
-		l4/amd64/specials.h \
-		l4/amd64/syscalls.h \
-		l4/amd64/types.h \
-		l4/amd64/vregs.h \
 		l4/sparc64/kdebug.h \
 		l4/sparc64/specials.h \
 		l4/sparc64/syscalls.h \
diff --git a/user/apps/bench/pingpong/Makefile.in b/user/apps/bench/pingpong/Makefile.in
index ec062b7b..6e920fde 100644
--- a/user/apps/bench/pingpong/Makefile.in
+++ b/user/apps/bench/pingpong/Makefile.in
@@ -1,6 +1,6 @@
 ######################################################################
 ##                
-## Copyright (C) 2003, 2006,  Karlsruhe University
+## Copyright (C) 2003, 2006-2007,  Karlsruhe University
 ##                
 ## File path:     bench/pingpong/Makefile.in
 ##                
@@ -49,9 +49,6 @@ LDFLAGS+=	-Ttext=$(ROOTTASK_LINKBASE)
 CFLAGS_powerpc+=	-fno-builtin
 CXXFLAGS_powerpc+=	-fno-rtti
 
-CFLAGS_alpha+=	-mno-fp-regs -O2 -freg-struct-return
-CFLAGS_mips32+=	-DUTCB_ADDRESS=0x40000000
-
 CCFLAGS_pingpong-amd64-32 = $(subst -m64,-m32,$(CCFLAGS)) -m32
 
 pingpong-amd64-32.o: pingpong-amd64-32.cc
diff --git a/user/apps/bench/pingpong/alpha.h b/user/apps/bench/pingpong/alpha.h
deleted file mode 100644
index 4a2abbc8..00000000
--- a/user/apps/bench/pingpong/alpha.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  Karlsruhe University
- *                
- * File path:     bench/pingpong/alpha.h
- * Description:   Alpha specific pingpong functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: alpha.h,v 1.1 2004/05/10 15:54:14 skoglund Exp $
- *                
- ********************************************************************/
-#define HAVE_READ_CYCLES
-
-L4_INLINE L4_Word_t read_cycles (void)
-{
-    L4_Word_t ret;
-    asm volatile ("rpcc %0" : "=r" (ret));
-    return ret & 0xffffffffull;
-}
diff --git a/user/apps/bench/pingpong/amd64.h b/user/apps/bench/pingpong/amd64.h
deleted file mode 100644
index 68ab3666..00000000
--- a/user/apps/bench/pingpong/amd64.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004-2006,  Karlsruhe University
- *                
- * File path:     bench/pingpong/amd64.h
- * Description:   AMD64 specific pingpong functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: amd64.h,v 1.7 2006/10/21 04:09:35 reichelt Exp $
- *                
- ********************************************************************/
-#include <l4/arch.h>
-
-#include L4_COMPAT_H_LOCATION
-
-
-#define HAVE_ARCH_SPECIFIC
-#define HAVE_ARCH_IPC
-#define HAVE_HANDLE_ARCH_PAGEFAULT
-#define HAVE_READ_CYCLES
-
-#define L4_REQUEST_MASK		( ~((~0UL) >> ((sizeof (L4_Word_t) * 8) - 20)))
-
-#define L4_IO_PAGEFAULT		(-8UL << 20)
-#define L4_IO_PORT_START	(0)
-#define L4_IO_PORT_END		(1<<16)
-
-
-L4_INLINE L4_Word_t read_cycles (void)
-{
-    L4_Word32_t __eax, __edx;
-
-    asm volatile (
-	"rdtsc"
-	: "=a"(__eax), "=d"(__edx));
-    
-    return ( (((L4_Word_t) __edx) << 32) | ( (L4_Word_t) __eax));	     
-}
-
-
-L4_Fpage_t handle_arch_pagefault (L4_MsgTag_t tag, L4_Word_t faddr, L4_Word_t fip, L4_Word_t log2size)
-{
-    // If pagefault is an IO-Page, return that IO Fpage 
-    L4_Fpage_t fp;
-    fp.raw = faddr;
-    if ((tag.raw & L4_REQUEST_MASK) == L4_IO_PAGEFAULT && L4_IsIoFpage(fp))
-    {
-	return fp;
-    }
-	
-	
-    return L4_FpageLog2 (faddr, log2size);
-}
-
-
-extern L4_ThreadId32_t ping_tid_32;
-extern void pong_32_thread (void);
-
-void arch_specific (void)
-{
-#if 0
-    L4_Word_t cycles1, cycles2;
-    L4_Clock_t usec1, usec2;
-    L4_Word_t tot = 1000, i;
-
-    i = tot;
-    
-    usec1 = L4_SystemClock();
-    cycles1 = read_cycles();
-
-    while (i--)
-	L4_Nop();
-    
-    usec2 = L4_SystemClock();
-    cycles2 = read_cycles();
-
-    
-    printf( "\nNULL system call: %ld cycles1, %ld usec\n",
-	    ((cycles2-cycles1)/tot),((usec2-usec1).raw)/tot);
-#endif
-
-    L4_Word_t control;
-    L4_Msg_t msg;
-
-    INTER_AS=1; MIGRATE=0; SMALL_AS=0; LIPC=0;
-
-    ping_tid_32 = L4_ThreadId32 (ping_tid);
-
-    printf("\nIPC between 32-bit and 64-bit threads:\n\n");
-
-    L4_ThreadControl (ping_tid, ping_tid, master_tid,
-		      L4_nilthread, UTCB(0));
-    L4_ThreadControl (pong_tid, pong_tid, master_tid, 
-		      L4_nilthread, UTCB(1));
-    L4_SpaceControl (ping_tid, 0, kip_area, utcb_area, L4_nilthread,
-		     &control);
-    L4_SpaceControl (pong_tid, 1ULL << 63, kip_area, utcb_area, L4_nilthread,
-		     &control);
-    if (control & (1ULL << 63))
-    {
-	L4_ThreadControl (ping_tid, ping_tid, master_tid, pager_tid, 
-			  NOUTCB);
-	L4_ThreadControl (pong_tid, pong_tid, master_tid, pager_tid, 
-			  NOUTCB);
-
-	L4_Clear (&msg);
-	L4_Append (&msg, START_ADDR (ping_thread));
-	L4_Append (&msg, START_ADDR (pong_32_thread));
-	L4_Load (&msg);
-	L4_Send (pager_tid);
-
-	L4_Receive (ping_tid);
-    }
-    else
-	printf("Compatibility Mode support not compiled in.\n");
-
-    L4_ThreadControl (ping_tid, L4_nilthread, L4_nilthread, 
-		      L4_nilthread, NOUTCB);
-    L4_ThreadControl (pong_tid, L4_nilthread, L4_nilthread, 
-		      L4_nilthread, NOUTCB);
-}
-
-L4_INLINE L4_Word_t pingpong_ipc (L4_ThreadId_t dest, L4_Word_t untyped)
-{
-    L4_Word_t dummy;
-    __asm__ __volatile__ (
-	"/* pingpong_arch_ipc() */\n"
-	"movq   %%rax, %%r9	\n"
-	"xorq	%%r8, %%r8	\n"
-	"pushq	%%rbp		\n"
-	"call	*__L4_Ipc	\n"	/* jump via KIP */
-	"popq	%%rbp		\n"
-	"movq   %%r9, %%rax	\n"
-	: "=S" (dummy), 
-	  "=a" (untyped),
-	  "=d" (dest)
-	: "a" (untyped), 
-	  "d" (dest), 
-	  "S" (dest), 
-	  "D" (__L4_X86_Utcb())
-	: "rbx", "rcx", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15");
-
-    return untyped;
-}
-
diff --git a/user/apps/bench/pingpong/crt0-alpha.S b/user/apps/bench/pingpong/crt0-alpha.S
deleted file mode 100644
index 44930c50..00000000
--- a/user/apps/bench/pingpong/crt0-alpha.S
+++ /dev/null
@@ -1,95 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     sigma0/src/arch/alpha/crt0.S
- * Description:   initial runtime for sigma0 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-alpha.S,v 1.2 2003/09/24 19:05:53 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <l4/alpha/asm.h>
-#include <l4/alpha/pal.h>	
-
-#define STACKSIZE 8192
-	
-BEGIN_PROC(_start)
-	bsr	$27, 1f
-1:	ldgp	$29, 0($27)
-		
-	lda	$30, init_stack
-	lda	$1, STACKSIZE
-	addq	$30, $1, $30
-
-	lda	$27, __L4_Init
-	jsr	$26, ($27)
-
-	ldgp	$29, 0($26)
-	
-	lda	$27, main
-	jsr	$26, ($27), main
-
-	lda	$16, 2
-	call_pal PAL_gentrap		
-END_PROC(_start)
-
-.lcomm init_stack, STACKSIZE
-
-BEGIN_PROC(_start_pager)
-	bsr	$27, 1f
-1:	ldgp	$29,0($27)
-	lda	$27, _Z5pagerv
-	jsr	$26, ($27)
-
-	lda	$16, 2
-	call_pal PAL_gentrap		
-END_PROC(_start_pager)
-	
-
-BEGIN_PROC(_start_ping_thread)
-	bsr	$27, 1f
-1:	ldgp	$29,0($27)
-	lda	$27, _Z11ping_threadv
-	jsr	$26, ($27)
-
-	lda	$16, 2
-	call_pal PAL_gentrap		
-END_PROC(_start_ping_thread)
-
-	
-BEGIN_PROC(_start_pong_thread)
-	bsr	$27, 1f
-1:	ldgp	$29,0($27)
-	lda	$27, _Z11pong_threadv
-	jsr	$26, ($27)
-
-	lda	$16, 2
-	call_pal PAL_gentrap		
-END_PROC(_start_pong_thread)
-
-		
-	
-
-	
\ No newline at end of file
diff --git a/user/apps/bench/pingpong/crt0-arm.S b/user/apps/bench/pingpong/crt0-arm.S
deleted file mode 100644
index f27e753b..00000000
--- a/user/apps/bench/pingpong/crt0-arm.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2004, University of New South Wales
- *
- * File path:     bench/pingpong/crt0-arm.S
- * Description:   Startup code for ARM family processors.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: crt0-arm.S,v 1.4 2004/04/17 15:46:08 htuch Exp $
- *
- ********************************************************************/
-
-#include <config.h>
-#include <l4/arm/asm.h>
-
-BEGIN_PROC(_start)
-	ldr     sp,     2f
-
-        bl      __L4_Init
-
-        bl      main
-
-2:	.word	_sigma0_stack_top
-END_PROC(_start)
-
-/* exreg to here */
-.global _exreg_target
-_exreg_target:
-    ldr     r0, [sp, #0]    /* load IP off the stack */
-    mov     pc, r0          /* jump to the IP */
-
-
-.align
-_sigma0_stack:
-	.space	8192
-_sigma0_stack_top:
diff --git a/user/apps/bench/pingpong/crt0-ia64.S b/user/apps/bench/pingpong/crt0-ia64.S
deleted file mode 100644
index 791330f4..00000000
--- a/user/apps/bench/pingpong/crt0-ia64.S
+++ /dev/null
@@ -1,118 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     bench/pingpong/crt0-ia64.S
- * Description:   Startup code for ia64 processors
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-ia64.S,v 1.5 2003/09/24 19:05:53 skoglund Exp $
- *                
- ********************************************************************/
-#include <config.h>
-
-#define BEG_PROC(func)		\
-	.global	func		;\
-	.align	16		;\
-	.proc	func		;\
-func:
-
-#define END_PROC(func)		\
-	.endp	func
-
-	.text
-BEG_PROC (_start)
-	movl	gp = __gp
-	movl	r8 = main_stack_beg
-	movl	sp = main_stack_end
-	mov	ar.rsc = 0		// turn off RSE
-	;;
-	mov	ar.bspstore = r8
-	;;
-	mov	ar.rsc = 3		// turn RSE back on
-	;;
-	alloc	r8 = ar.pfs,0,0,0,0
-	br.sptk.many main
-
-	/* NOTREACHED */
-END_PROC (_start)
-
-	.bss
-	.align	16
-	.global main_stack_beg
-	.global main_stack_end
-main_stack_beg:	
-	.space	8192-16
-main_stack_end:	
-	.space	16
-	.previous
-
-
-BEG_PROC (_start_pager)
-
-	movl	gp = __gp
-	movl	r8 = pager_stack
-	mov	ar.rsc = 0
-	;;
-	mov	ar.bspstore = r8
-	;;
-	mov	ar.rsc = 3 + (3 << 2)
-	;;
-	alloc	r8 = ar.pfs,0,0,0,0
-	br.sptk.many _Z5pagerv
-
-END_PROC (_start_pager)
-
-
-
-BEG_PROC (_start_ping_thread)
-
-	movl	gp = __gp
-	movl	r8 = ping_stack
-	mov	ar.rsc = 0
-	;;
-	mov	ar.bspstore = r8
-	;;
-	mov	ar.rsc = 3 + (3 << 2)
-	;;
-	alloc	r8 = ar.pfs,0,0,0,0
-	br.sptk.many _Z11ping_threadv
-
-END_PROC (_start_ping_thread)
-
-
-
-BEG_PROC (_start_pong_thread)
-
-	movl	gp = __gp
-	movl	r8 = pong_stack
-	mov	ar.rsc = 0
-	;;
-	mov	ar.bspstore = r8
-	;;
-	mov	ar.rsc = 3 + (3 << 2)
-	;;
-	alloc	r8 = ar.pfs,0,0,0,0
-	br.sptk.many _Z11pong_threadv
-
-END_PROC (_start_ping_thread)
diff --git a/user/apps/bench/pingpong/crt0-mips32.S b/user/apps/bench/pingpong/crt0-mips32.S
deleted file mode 100644
index 85b17c42..00000000
--- a/user/apps/bench/pingpong/crt0-mips32.S
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     bench/pingpong/crt0-mips32.S
- * Description:   Startup code for MIPS32 processors
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-mips32.S,v 1.1 2006/02/23 21:07:50 ud3 Exp $
- *                
- ********************************************************************/
-#include <l4/mips32/asm.h>
-#include <l4/mips32/regdef.h>
-
-#define STACKSIZE 8192
-	
-	.section ".text"
-	.align	4
-	.globl	_start
-_start:
-	la	sp, init_stack
-	addu	sp, STACKSIZE
-	subu	sp, sp, 0x10	
-	jal	__L4_Init
-
-	jal	main
-	nop
-	addu sp, sp, 0x10
-	
-1:
-	b	1b
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/apps/bench/pingpong/crt0-mips64.S b/user/apps/bench/pingpong/crt0-mips64.S
deleted file mode 100644
index 3504b06f..00000000
--- a/user/apps/bench/pingpong/crt0-mips64.S
+++ /dev/null
@@ -1,52 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     apps/bench/pingpong/crt0-mips64.S
- * Description:   initial runtime for pingpong
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-mips64.S,v 1.2 2003/09/24 19:05:53 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <l4/mips64/asm.h>
-#include <l4/mips64/regdef.h>
-
-#define STACKSIZE 8192
-	
-	.section ".text"
-	.align	4
-	.globl	_start
-_start:
-	dla	sp, init_stack
-	daddu	sp, STACKSIZE
-	
-	jal	__L4_Init
-
-	jal	main
-
-1:
-	b	1b
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/apps/bench/pingpong/crt0-sparc64.S b/user/apps/bench/pingpong/crt0-sparc64.S
deleted file mode 100644
index dac5972f..00000000
--- a/user/apps/bench/pingpong/crt0-sparc64.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     sigma0/src/arch/sparc64/crt0.S
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-sparc64.S,v 1.3 2004/02/15 23:01:47 philipd Exp $
- *                
- ********************************************************************/
-
-	.section ".text"
-	.align 8
-	.globl _start
-_start:
-	setx    _stack_top, %g1, %fp
-	sub     %fp, 2047, %fp  ! adjust for stack bias
-	sub     %fp, 128, %sp   ! create a stack frame
-	
-	call    __L4_Init
-	nop
-	
-	call    main
-	nop
-	
-1:      ba,pt   %xcc, 1b
-	nop
-
-#define STACK_SIZE	(4096*4)
-	.section ".bss"
-	.align	16
-_stack_bottom:
-.space	STACK_SIZE
-_stack_top:
-
diff --git a/user/apps/bench/pingpong/ia64.h b/user/apps/bench/pingpong/ia64.h
deleted file mode 100644
index f832512f..00000000
--- a/user/apps/bench/pingpong/ia64.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  Karlsruhe University
- *                
- * File path:     bench/pingpong/ia64.h
- * Description:   IA64 specific pingpong functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ia64.h,v 1.1 2004/05/10 15:54:14 skoglund Exp $
- *                
- ********************************************************************/
-
-#define HAVE_READ_CYCLES
-#define HAVE_ARCH_IPC
-
-L4_INLINE L4_Word_t read_cycles (void)
-{
-    L4_Word_t ret;
-    asm volatile (";; mov %0 = ar.itc ;;" :"=r" (ret));
-    return ret;
-}
-
-L4_INLINE L4_Word_t pingpong_ipc (L4_ThreadId_t dest, L4_Word_t untyped)
-{
-    register L4_ThreadId_t r_to			asm ("r14") = dest;
-    register L4_ThreadId_t r_FromSpecifier	asm ("r15") = dest;
-    register L4_Word_t r_Timeouts		asm ("r16") = 0;
-    register L4_Word_t mr0 			asm ("out0") = untyped;
-
-    // Make sure that we allocate 8 outputs on register stack
-    register L4_Word_t mr7 asm ("out7");
-
-    L4_Word_t ar_lc, ar_ec;
-    asm volatile ("	;;			\n"
-		  "	mov	%0 = ar.lc	\n"
-		  "	mov	%1 = ar.ec	\n"
-		  :
-		  "=r" (ar_lc), "=r" (ar_ec));
-
-    asm volatile (
-	"/* pingpong_arch_ipc() */\n"
-	__L4_ASM_CALL (__L4_Ipc)
-	:
-	"+r" (mr0), "=r" (mr7),
-	"+r" (r_to), "+r" (r_FromSpecifier), "+r" (r_Timeouts)
-	:
-	:
-	"r2",  "r3", "r8", "r10", "r11",
-	"r17", "r18", "r19", "r20", "r21", "r22",
-	"r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
-	"out1", "out2", "out3", "out4", "out5", "out6",
-	__L4_CALLER_SAVED_FP_REGS, __L4_CALLER_SAVED_PREDICATE_REGS,
-	__L4_CALLER_SAVED_BRANCH_REGS, __L4_CALLEE_SAVED_REGS);
-
-    asm volatile (
-	"	mov	ar.lc = %0	\n"
-	"	mov	ar.ec = %1	\n"
-	"	;;			\n"
-	:
-	:
-	"r" (ar_lc), "r" (ar_ec));
-
-    return mr0 & 0x3f;
-}
diff --git a/user/apps/bench/pingpong/mips64.h b/user/apps/bench/pingpong/mips64.h
deleted file mode 100644
index fcdb5e11..00000000
--- a/user/apps/bench/pingpong/mips64.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  Karlsruhe University
- *                
- * File path:     bench/pingpong/mips64.h
- * Description:   MIPS64 specific pingpong functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips64.h,v 1.2 2005/01/12 02:59:46 cvansch Exp $
- *                
- ********************************************************************/
-#define HAVE_ARCH_IPC
-
-L4_INLINE L4_Word_t pingpong_ipc (L4_ThreadId_t dest, L4_Word_t untyped)
-{
-    L4_MsgTag_t temp;
-    temp.raw = 0;
-    temp.X.u = untyped;
-    register L4_Word_t tag asm("$3") = temp.raw;
-    register L4_Word_t to asm("$4") = dest.raw;
-    register L4_Word_t from asm("$5") = dest.raw;
-    register L4_Word_t timeouts asm("$6") = 0;
-
-    asm volatile (
-	    "li	    $2, -101	\n\r"
-	    "syscall		\n\r"
-	    : /* outputs */
-	      "+r" (tag)
-	    : /* inputs */
-	      "r" (to), "r" (from), "r" (timeouts)
-	    : /* clobbers */
-		"$1", "$2",
-		"$7", "$8", "$9", "$10", "$11", "$12",
-		"$13", "$14", "$15", "$24", "$25", /*"$28",*/ "$31",
-		"$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
-		"memory"
-	    );
-
-    return tag;
-}
diff --git a/user/apps/bench/pingpong/pingpong.cc b/user/apps/bench/pingpong/pingpong.cc
index 576df91c..597171cf 100644
--- a/user/apps/bench/pingpong/pingpong.cc
+++ b/user/apps/bench/pingpong/pingpong.cc
@@ -1,6 +1,6 @@
 /*********************************************************************
  *                
- * Copyright (C) 2002, 2004-2006,  Karlsruhe University
+ * Copyright (C) 2002, 2004-2007,  Karlsruhe University
  *                
  * File path:     bench/pingpong/pingpong.cc
  * Description:   Pingpong test application
@@ -92,20 +92,12 @@ void pong_thread (void);
 
 #if defined(L4_ARCH_IA32)
 #include "ia32.h"
-#elif defined(L4_ARCH_IA64)
-#include "ia64.h"
 #elif defined(L4_ARCH_POWERPC)
 #include "powerpc.h"
-#elif defined(L4_ARCH_ALPHA)
-#include "alpha.h"
-#elif defined(L4_ARCH_MIPS64)
-#include "mips64.h"
 #elif defined(L4_ARCH_POWERPC64)
 #include "powerpc64.h"
 #elif defined(L4_ARCH_AMD64)
 #include "amd64.h"
-#elif defined(L4_ARCH_SPARC64)
-#include "sparc64.h"
 #endif
 
 
diff --git a/user/apps/bench/pingpong/sparc64.h b/user/apps/bench/pingpong/sparc64.h
deleted file mode 100644
index a133c6cc..00000000
--- a/user/apps/bench/pingpong/sparc64.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2004,  University of New South Wales
- *                
- * File path:     bench/pingpong/sparc64.h
- * Description:   SPARCv9 specific pingpong functions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: sparc64.h,v 1.1 2004/06/04 07:54:42 philipd Exp $
- *                
- ********************************************************************/
-#define HAVE_READ_CYCLES
-
-L4_INLINE L4_Word_t read_cycles (void)
-{
-    L4_Word_t ret;
-
-    asm volatile ("rd %%tick, %0;" : "=r" (ret)); 
-
-    return ret;
-}
-
diff --git a/user/apps/grabmem/Makefile.in b/user/apps/grabmem/Makefile.in
index 4054a21d..8a7a2211 100644
--- a/user/apps/grabmem/Makefile.in
+++ b/user/apps/grabmem/Makefile.in
@@ -1,6 +1,6 @@
 ######################################################################
 ##                
-## Copyright (C) 2003-2004,  Karlsruhe University
+## Copyright (C) 2003-2004, 2007,  Karlsruhe University
 ##                
 ## File path:     grabmem/Makefile.in
 ##                
@@ -48,6 +48,4 @@ LDFLAGS+=	-Ttext=$(ROOTTASK_LINKBASE)
 CFLAGS_powerpc+=	-fno-builtin
 CXXFLAGS_powerpc+=	-fno-rtti
 
-CFLAGS_alpha+=	-mno-fp-regs -O2 -freg-struct-return
-
 include $(top_srcdir)/Mk/l4.prog.mk
diff --git a/user/apps/grabmem/crt0-alpha.S b/user/apps/grabmem/crt0-alpha.S
deleted file mode 100644
index e19d148d..00000000
--- a/user/apps/grabmem/crt0-alpha.S
+++ /dev/null
@@ -1,58 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     sigma0/src/arch/alpha/crt0.S
- * Description:   initial runtime for sigma0 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-alpha.S,v 1.1 2003/10/20 06:00:53 sjw Exp $
- *                
- ********************************************************************/
-
-#include <l4/alpha/asm.h>
-#include <l4/alpha/pal.h>	
-
-#define STACKSIZE 8192
-	
-BEGIN_PROC(_start)
-	bsr	$27, 1f
-1:	ldgp	$29, 0($27)
-		
-	lda	$30, init_stack
-	lda	$1, STACKSIZE
-	addq	$30, $1, $30
-
-	lda	$27, __L4_Init
-	jsr	$26, ($27)
-
-	ldgp	$29, 0($26)
-	
-	lda	$27, main
-	jsr	$26, ($27), main
-
-	lda	$16, 2
-	call_pal PAL_gentrap		
-END_PROC(_start)
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/apps/grabmem/crt0-arm.S b/user/apps/grabmem/crt0-arm.S
deleted file mode 100644
index 0d598c06..00000000
--- a/user/apps/grabmem/crt0-arm.S
+++ /dev/null
@@ -1,48 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1999, 2000, 2001,  Karlsruhe University
- *                
- * File path:     sigma0/crt0-arm.S
- * Description:   Startup code for ARM family processors.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-arm.S,v 1.1 2004/01/11 14:43:33 htuch Exp $
- *                
- ********************************************************************/
-#include <config.h>
-#include <l4/arm/asm.h>
-
-BEGIN_PROC(_start)
-	ldr     sp,     2f
-
-        bl      __L4_Init
-
-        bl      main
-
-2:	.word	_sigma0_stack_top
-END_PROC(_start)
-
-.align
-_sigma0_stack:
-	.space	8192
-_sigma0_stack_top:
diff --git a/user/apps/grabmem/crt0-ia64.S b/user/apps/grabmem/crt0-ia64.S
deleted file mode 100644
index 5b946597..00000000
--- a/user/apps/grabmem/crt0-ia64.S
+++ /dev/null
@@ -1,59 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     roottask/crt0-ia64.S
- * Description:   Startup code for ia64 processors
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-ia64.S,v 1.1 2003/10/01 16:46:19 skoglund Exp $
- *                
- ********************************************************************/
-#include <config.h>
-
-	.text
-	.global _start
-	.align	16
-	.proc	_start
-_start:
-	movl	gp = __gp
-	movl	r8 = reg_stack
-	movl	sp = stack
-	mov	ar.rsc = 0		// turn off RSE
-	;;
-	mov	ar.bspstore = r8
-	;;
-	mov	ar.rsc = 3		// turn RSE back on
-	;;
-	alloc	r8 = ar.pfs,0,0,0,0
-	br.sptk.many main
-
-	/* NOTREACHED */
-	.endp	_start
-
-	.bss
-	.align 16
-reg_stack:
-	.space	8192-16
-stack:
-	.space	16
diff --git a/user/apps/grabmem/crt0-mips32.S b/user/apps/grabmem/crt0-mips32.S
deleted file mode 100644
index 4418d8e2..00000000
--- a/user/apps/grabmem/crt0-mips32.S
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     grabmem/crt0-mips32.S
- * Description:   Startup code for MIPS32 processors
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-mips32.S,v 1.1 2006/02/23 21:07:52 ud3 Exp $
- *                
- ********************************************************************/
-#include <l4/mips32/asm.h>
-#include <l4/mips32/regdef.h>
-
-#define STACKSIZE 8192
-	
-	.section ".text"
-	.align	4
-	.globl	_start
-_start:
-	la	sp, init_stack
-	addu	sp, STACKSIZE
-	subu	sp, sp, 0x10	
-	jal	__L4_Init
-
-	jal	main
-	nop
-	addu sp, sp, 0x10
-	
-1:
-	b	1b
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/apps/grabmem/crt0-mips64.S b/user/apps/grabmem/crt0-mips64.S
deleted file mode 100644
index b1a28c7a..00000000
--- a/user/apps/grabmem/crt0-mips64.S
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     serv/sigma0/crt0-mips64.S
- * Description:   initial runtime for sigma0 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-mips64.S,v 1.1 2003/10/21 04:54:08 benno Exp $
- *                
- ********************************************************************/
-
-#include <l4/mips64/asm.h>
-#include <l4/mips64/regdef.h>
-
-#define STACKSIZE 8192
-	
-BEGIN_PROC(_start)
-	dla	sp, init_stack
-	daddu	sp, STACKSIZE
-	
-	jal	__L4_Init
-
-	jal	main
-
-1:
-	b	1b
-END_PROC(_start)
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/apps/grabmem/crt0-sparc64.S b/user/apps/grabmem/crt0-sparc64.S
deleted file mode 100644
index 00c2ca6e..00000000
--- a/user/apps/grabmem/crt0-sparc64.S
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     grabmem/crt0-sparc64.S
- * Description:   Startup code for SPARC v9 architecture.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-sparc64.S,v 1.2 2004/05/21 01:46:18 philipd Exp $
- *                
- ********************************************************************/
-
-	.section ".text"
-	.align 8
-	.globl _start
-_start:
-	setx    _stack_top, %g1, %fp
-	sub     %fp, 2047, %fp  ! adjust for stack bias
-	sub     %fp, 128, %sp   ! create a stack frame
-	
-	call    __L4_Init
-	nop
-	
-	call    main
-	nop
-	
-1:      ba,pt   %xcc, 1b
-	nop
-
-#define STACK_SIZE	(4096*4)
-	.section ".bss"
-	.align	16
-_stack_bottom:
-.space	STACK_SIZE
-_stack_top:
diff --git a/user/apps/l4test/Makefile.in b/user/apps/l4test/Makefile.in
index 655341a6..b9af6b16 100644
--- a/user/apps/l4test/Makefile.in
+++ b/user/apps/l4test/Makefile.in
@@ -1,6 +1,6 @@
 ######################################################################
 ##                
-## Copyright (C) 2003, 2006,  Karlsruhe University
+## Copyright (C) 2003, 2006-2007,  Karlsruhe University
 ##                
 ## File path:     l4test/Makefile.in
 ##                
@@ -42,16 +42,10 @@ PROGRAM_DEPS=	$(top_builddir)/lib/l4/libl4.a \
 
 
 ia32_SRCS=	ia32/crt0.S ia32/help.cc ia32/tests.cc
-ia64_SRCS=	ia64/crt0.S ia64/l4fix.S ia64/help.cc ia64/tests.cc
 powerpc_SRCS=	powerpc/crt0.S powerpc/help.cc powerpc/tests.cc
 powerpc64_SRCS=	powerpc64/crt0.S powerpc64/help.cc powerpc64/tests.cc \
 		powerpc64/1275tree.cc powerpc64/string.cc
-arm_SRCS=	arm/crt0.S arm/help.cc arm/tests.cc
 amd64_SRCS=	amd64/crt0.S amd64/help.cc amd64/tests.cc
-mips64_SRCS=	mips64/crt0.S mips64/help.cc mips64/tests.cc
-mips32_SRCS=	mips32/crt0.S mips32/help.cc mips32/tests.cc
-alpha_SRCS=	alpha/crt0.S alpha/help.cc alpha/tests.cc
-sparc64_SRCS=   sparc64/crt0.S sparc64/help.cc sparc64/tests.cc
 
 SRCS=		main.cc assert.cc menu.cc threads.cc \
 		ipc.cc ipc-string.cc ipc-pf.cc ipc-smp.cc \
diff --git a/user/apps/l4test/alpha/arch.h b/user/apps/l4test/alpha/arch.h
deleted file mode 100644
index 15ae041c..00000000
--- a/user/apps/l4test/alpha/arch.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/alpha/arch.h
- * Description:   Alpha configuration for l4test
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: arch.h,v 1.2 2003/09/24 19:05:55 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH_H__
-#define __ARCH_H__
-
-#define ARCH_NAME               "Alpha"
-
-#define PAGE_BITS		(13)
-#define PAGE_SIZE		(1 << PAGE_BITS)
-#define MAX_MEM			(32L*1024L*1024L)
-
-#define STACK_PAGES             4
-
-/* some place to start reading/writing junk */
-#define SCRATCHMEM_START        (24*1024*1024)
-
-#endif /* __ARCH_H__ */
diff --git a/user/apps/l4test/alpha/crt0.S b/user/apps/l4test/alpha/crt0.S
deleted file mode 100644
index 1957fa63..00000000
--- a/user/apps/l4test/alpha/crt0.S
+++ /dev/null
@@ -1,73 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     sigma0/src/arch/alpha/crt0.S
- * Description:   initial runtime for sigma0 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0.S,v 1.3 2003/10/20 06:00:21 sjw Exp $
- *                
- ********************************************************************/
-
-#include <l4/alpha/asm.h>
-#include <l4/alpha/pal.h>	
-
-#define STACKSIZE 8192
-	
-BEGIN_PROC(_start)
-	bsr	$27, 1f
-1:	ldgp	$29, 0($27)
-		
-	lda	$30, init_stack
-	lda	$1, STACKSIZE
-	addq	$30, $1, $30
-
-	lda	$27, __L4_Init
-	jsr	$26, ($27)
-
-	ldgp	$29, 0($26)
-	
-	lda	$27, main
-	jsr	$26, ($27), main
-
-	lda	$16, 2
-	call_pal PAL_gentrap		
-END_PROC(_start)
-
-.lcomm init_stack, STACKSIZE
-
-
-/* Function is in *sp */
-BEGIN_PROC(_startup_stub)
-        bsr     $27, 1f
-1:      ldgp    $29, 0($27)
-
-	ldq	$27, 0($30)
-	addq	$30, 8, $30
-	
-	jsr	$26, ($27)
-
-        lda     $16, 2
-        call_pal PAL_gentrap    
-END_PROC(_startup_stub)
\ No newline at end of file
diff --git a/user/apps/l4test/alpha/help.cc b/user/apps/l4test/alpha/help.cc
deleted file mode 100644
index 6ef44cce..00000000
--- a/user/apps/l4test/alpha/help.cc
+++ /dev/null
@@ -1,99 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/alpha/help.cc
- * Description:   Helper functions for Alpha
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: help.cc,v 1.3 2003/10/20 06:00:21 sjw Exp $
- *                
- ********************************************************************/
-/* architecture specific 'helper' functions */
-
-#include <l4/types.h>
-#include <l4io.h>
-#include <arch.h>
-
-#include "../l4test.h"
-#include "../assert.h"
-
-/*
- * Startup stub for setting up the appropriate GP and IP values.
- */
-extern L4_Word_t _startup_stub;
-
-/* setup an exreg 
- *
- * *sp == NULL: allocate a new stack
- * *sp != NULL: top of sp from an old exreg used, just refresh it!
- */
-void 
-setup_exreg( L4_Word_t *ip, L4_Word_t *sp, void (*func)(void) )
-{
-	L4_Word_t *stack, *hack_ip;
-	int max;
-
-	/* get the function address */
-	hack_ip = (L4_Word_t*) func;
-
-	/* work out the size in items */
-	max = STACK_PAGES * PAGE_SIZE / sizeof( L4_Word_t );
-	if( *sp == 0 )
-	{
-		stack = (L4_Word_t*) get_pages( STACK_PAGES, 1 );
-		assert( stack != NULL );
-
-		stack = &stack[max-1];
-	}
-	else
-		stack = (L4_Word_t*) *sp;
-
-	/* work out the size */
-	stack[-1] = *hack_ip;      /* get the entry pt out */
-
-
-	*ip = (L4_Word_t) &_startup_stub;
-	*sp = (L4_Word_t) stack;
-}
-
-/* get the 1st word out of the function descriptor (stinkin gp!) */
-void *
-code_addr( void *addr )
-{
-    return addr;
-}
-
-void
-get_startup_values (void (*func)(void), L4_Word_t * ip, L4_Word_t * sp)
-{
-    // Calculate intial SP and BSP values
-    L4_Word_t *stack = (L4_Word_t *) get_pages (STACK_PAGES, 1);
-    stack += STACK_PAGES * PAGE_SIZE;
-
-    // Push IP onto stack
-    *--stack = (L4_Word_t) func;
-
-    *ip = (L4_Word_t) &_startup_stub;
-    *sp = (L4_Word_t) stack;
-}
diff --git a/user/apps/l4test/alpha/tests.cc b/user/apps/l4test/alpha/tests.cc
deleted file mode 100644
index 697d4afa..00000000
--- a/user/apps/l4test/alpha/tests.cc
+++ /dev/null
@@ -1,124 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/alpha/tests.cc
- * Description:   Architecture dependent tests
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tests.cc,v 1.4 2003/11/03 08:01:40 sjw Exp $
- *                
- ********************************************************************/
-
-#include <l4/ipc.h>
-#include <l4/space.h>
-#include <l4/thread.h>
-#include <l4io.h>
-#include <config.h>
-
-#include <arch.h>
-
-#include "../l4test.h"
-#include "../menu.h"
-#include "../assert.h"
-
-void sleeper(void)
-{
-    printf("Pre-sleep\n");
-    L4_Sleep(L4_Never);
-    printf("Post-sleep\n");
-
-}
-
-void fp_other(void)
-{
-    L4_ThreadId_t t;
-    L4_Word_t res;
-    double test asm("$f0");
-
-    test = 1.0;
-    for(int i = 0; i < 100000; i++) {
-	test += 1.0;
-    }
-
-    L4_Wait(&t);
-    printf("result == %f\n", test);
-    L4_Call(t);
-}
-
-void fp_test(void)
-{
-    L4_ThreadId_t tid = create_thread(fp_other, false, false);
-
-    double test asm("$f0") = 32.0;
-
-    for(int i = 0; i < 100000; i++) {
-	asm volatile ("addt $f0, $f31, $f0");
-    }
-
-    L4_Call(tid);
-    printf("result == %f\n", test);
-    kill_thread(tid);
-}
-
-
-void clock_test(void)
-{
-    L4_Word64_t clock1, clock2, clock3;
-
-    clock1 = L4_SystemClock();
-    clock2 = L4_SystemClock();
-
-    L4_Sleep(L4_TimePeriod(1500)); /* milliseconds */
-
-    clock3 = L4_SystemClock();
-
-    printf("%ld %ld %ld\n", clock1, clock2, clock3);
-
-}
-
-
-
-/* the menu */
-static struct menuitem menu_items[] = 
-{
-    { NULL, "return" },
-    { sleeper,  "Sleeper" },
-    { fp_test, "FP test"},
-    { clock_test, "Clock test"},
-};
-
-static struct menu menu = 
-{
-    "Alpha Menu",
-    0, 
-    NUM_ITEMS(menu_items),
-    menu_items
-};
-
-
-void arch_test(void)
-{
-    menu_input( &menu );
-}
-
diff --git a/user/apps/l4test/arm/arch.h b/user/apps/l4test/arm/arch.h
deleted file mode 100644
index de1f1f8d..00000000
--- a/user/apps/l4test/arm/arch.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Arm configuration.
- */
-
-
-#define ARCH_NAME "Arm"
-
-#define PAGE_BITS		(12)
-#define PAGE_SIZE		(1 << PAGE_BITS)
-#define MAX_MEM			(256L*1024L*1024L)
-#define PAGE_SIZES		(1)
-
-#define STACK_PAGES  4
-
-
-/* some place to start reading/writing junk */
-#define SCRATCHMEM_START 0xC0700000
diff --git a/user/apps/l4test/arm/crt0.S b/user/apps/l4test/arm/crt0.S
deleted file mode 100644
index 732daf44..00000000
--- a/user/apps/l4test/arm/crt0.S
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1999, 2000, 2001,  Karlsruhe University
- *                
- * File path:     sigma0/crt0-arm.S
- * Description:   Startup code for ARM family processors.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0.S,v 1.5 2006/02/23 21:02:29 ud3 Exp $
- *                
- ********************************************************************/
-#include <config.h>
-#include <l4/arm/asm.h>
-
-BEGIN_PROC(_start)
-	ldr     sp,     2f
-
-        bl      __L4_Init
-
-        bl      main
-
-2:	.word	_sigma0_stack_top
-END_PROC(_start)
-
-/* exreg to here */
-.global _exreg_target
-_exreg_target:
-    ldr     r0, [sp, #0]    /* load IP off the stack */
-    mov     pc, r0          /* jump to the IP */
-
-
-.align
-_sigma0_stack:
-	.space	8192
-_sigma0_stack_top:
diff --git a/user/apps/l4test/arm/help.cc b/user/apps/l4test/arm/help.cc
deleted file mode 100644
index f0caaa17..00000000
--- a/user/apps/l4test/arm/help.cc
+++ /dev/null
@@ -1,80 +0,0 @@
-/* architecture specific 'helper' functions */
-
-#include <l4/types.h>
-#include <l4io.h>
-#include <arch.h>
-
-#include "../l4test.h"
-#include "../assert.h"
-
-
-#if 0
-/* generic stuff */
-#include "../../generic/l4test.h"
-#include "../../generic/menu.h"
-#include "../../generic/assert.h"
-#endif
-
-
-#if 0
-void 
-setup_exreg( L4_Word_t *ip, L4_Word_t *sp, void (*func)(void) )
-{
-    printf("setup_exreg"); for (;;);
-}
-#endif
-
-/* setup an exreg 
- *
- * *sp == NULL: allocate a new stack
- * *sp != NULL: top of sp from an old exreg used, just refresh it!
- */
-void 
-setup_exreg( L4_Word_t *ip, L4_Word_t *sp, void (*func)(void) )
-{
-	L4_Word_t *stack;
-	int max;
-        static unsigned int l4test_section = 0x00100000;
-        static unsigned int l4stack_section = 0x30100000;
-
-	/* allocate a stack, or perhaps not */
-	max = STACK_PAGES * PAGE_SIZE / sizeof( L4_Word_t );
-	if( *sp == NULL )
-	{
-		stack = (L4_Word_t*) get_pages( STACK_PAGES, 1 );
-		assert( stack != NULL );
-
-		stack = &stack[max-1];
-	}
-	else
-		stack = (L4_Word_t*) *sp;
-
-	/* put the real IP on the stack */
-	*ip = stack[0] = ((L4_Word_t) func );
-        l4test_section += 0x00100000;
-
-	/* set the return params */
-	*sp = (L4_Word_t) (((unsigned int)stack ) );
-        l4stack_section += 0x00100000;
-
-        //printf("setup_exreg: returning ip = %x sp = %x\n", *ip, *sp);
-}
-
-/* XXX Just return the entry point */
-void *
-code_addr( void *addr )
-{
-	return addr;
-}
-
-void
-get_startup_values (void (*func)(void), L4_Word_t * ip, L4_Word_t * sp)
-{
-    // Calculate intial SP      
-    L4_Word_t stack = (L4_Word_t) get_pages (STACK_PAGES, 1);
-    stack += STACK_PAGES * PAGE_SIZE;
-
-    *ip = (L4_Word_t) func;
-    *sp = stack;       
-}
-
diff --git a/user/apps/l4test/arm/tests.cc b/user/apps/l4test/arm/tests.cc
deleted file mode 100644
index 571f8ade..00000000
--- a/user/apps/l4test/arm/tests.cc
+++ /dev/null
@@ -1,6 +0,0 @@
-/* entry point */
-void 
-arch_test(void)
-{
-}
-
diff --git a/user/apps/l4test/ia64/arch.h b/user/apps/l4test/ia64/arch.h
deleted file mode 100644
index c583f9af..00000000
--- a/user/apps/l4test/ia64/arch.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/ia64/arch.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: arch.h,v 1.5 2003/09/24 19:06:00 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH_H__
-#define __ARCH_H__
-
-#define ARCH_NAME 		"IA-64"
-
-#define PAGE_BITS		(12)
-#define PAGE_SIZE		(1 << PAGE_BITS)
-#define MAX_MEM			(256L*1024L*1024L)
-#define PAGE_SIZES		(1)
-
-#define STACK_PAGES  		4
-
-#define SCRATCHMEM_START 	(50*1024*1024)
-
-#endif /* !__ARCH_H__ */
diff --git a/user/apps/l4test/ia64/crt0.S b/user/apps/l4test/ia64/crt0.S
deleted file mode 100644
index 2e703181..00000000
--- a/user/apps/l4test/ia64/crt0.S
+++ /dev/null
@@ -1,58 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     crt0-ia64.S
- * Description:   Startup code for ia64 processors
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0.S,v 1.2 2003/09/24 19:06:00 skoglund Exp $
- *                
- ********************************************************************/
-#include <config.h>
-
-	.text
-	.global _start
-	.align	16
-	.proc	_start
-_start:
-	movl	gp = __gp
-	movl	r8 = reg_stack
-	movl	sp = stack
-	mov	ar.rsc = 0		// turn off RSE
-	;;
-	mov	ar.bspstore = r8
-	;;
-	mov	ar.rsc = 3		// turn RSE back on
-	;;
-	alloc	r8 = ar.pfs,0,0,0,0
-	br.sptk.many main
-
-	/* NOTREACHED */
-	.endp	_start
-
-	.bss
-	.align 512
-reg_stack:
-	.space	32768
-stack:
diff --git a/user/apps/l4test/ia64/help.cc b/user/apps/l4test/ia64/help.cc
deleted file mode 100644
index 42a70fec..00000000
--- a/user/apps/l4test/ia64/help.cc
+++ /dev/null
@@ -1,136 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/ia64/help.cc
- * Description:   Helper functions for ia64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: help.cc,v 1.6 2003/09/24 19:06:00 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <l4/types.h>
-#include <config.h>
-
-/* for the current arch */
-#include <arch.h>
-
-/* generic stuff */
-#include "../l4test.h"
-#include "../menu.h"
-#include "../assert.h"
-
-extern L4_Word_t _exreg_target;
-
-/* setup an exreg 
- *
- * *sp == NULL: allocate a new stack
- * *sp != NULL: top of sp from an old exreg used, just refresh it!
- */
-void 
-setup_exreg( L4_Word_t *ip, L4_Word_t *sp, void (*func)(void) )
-{
-	L4_Word_t *stack, *hack_ip;
-	int max;
-
-	/* get the function address */
-	hack_ip = (L4_Word_t*) func;
-
-	/* work out the size in items */
-	max = STACK_PAGES * PAGE_SIZE / sizeof( L4_Word_t );
-	if( *sp == 0 )
-	{
-		stack = (L4_Word_t*) get_pages( STACK_PAGES, 1 );
-		assert( stack != NULL );
-
-		stack = &stack[max-2];
-	}
-	else
-		stack = (L4_Word_t*) *sp;
-
-	/* work out the size */
-	stack[-1] = *hack_ip;      /* get the entry pt out */
-	stack[-2] = (L4_Word_t) &stack[2-max]; /* RSE ptr */
-
-	/* set their values */
-	*ip = (L4_Word_t) &_exreg_target;
-	*sp = (L4_Word_t) (stack - 2);
-}
-
-/* get the 1st word out of the function descriptor (stinkin gp!) */
-void *
-code_addr( void *addr )
-{
-	L4_Word_t *ptr;
-
-	ptr = (L4_Word_t*) addr;
-	return (void*) *ptr;
-}
-
-
-
-/*
- * Startup stub for setting up the appropriate GP, BSP and IP values.
- */
-asm ("		.align	16				\n"
-     "		.global _startup_stub			\n"
-     "		.proc	_startup_stub			\n"
-     "							\n"
-     "_startup_stub:					\n"
-     "		movl	gp = __gp			\n"
-     "		ld8	r8 = [sp], 8			\n"
-     "		;;					\n"
-     "		ld8	r9 = [sp], 8			\n"
-     "		;;					\n"
-     "		mov	b0 = r9				\n"
-     "		alloc	r10 = ar.pfs,0,0,0,0		\n"
-     "		mov	ar.rsc = 0			\n"
-     "		;;					\n"
-     "		loadrs					\n"
-     "		;;					\n"
-     "		mov	ar.bspstore = r8		\n"
-     "		;;					\n"
-     "		mov	ar.rsc = 3			\n"
-     "		br.sptk.many b0				\n"
-     "							\n"
-     "		.endp	_startup_stub			\n");
-
-extern L4_Word_t _startup_stub;
-
-
-void
-get_startup_values (void (*func)(void), L4_Word_t * ip, L4_Word_t * sp)
-{
-    // Calculate intial SP and BSP values
-    L4_Word_t regstack = (L4_Word_t) get_pages (STACK_PAGES, 1);
-    L4_Word_t *stack = (L4_Word_t *) (regstack + STACK_PAGES * PAGE_SIZE);
-    stack -= 2;
-
-    // Push IP and BSP onto stack
-    *--stack = *(L4_Word_t *) func;
-    *--stack = regstack;
-
-    *ip = (L4_Word_t) &_startup_stub;
-    *sp = (L4_Word_t) stack;
-}
diff --git a/user/apps/l4test/ia64/l4fix.S b/user/apps/l4test/ia64/l4fix.S
deleted file mode 100644
index d7d39294..00000000
--- a/user/apps/l4test/ia64/l4fix.S
+++ /dev/null
@@ -1,63 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/ia64/l4fix.S
- * Description:   Assembly stubs for ia64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: l4fix.S,v 1.4 2003/09/24 19:06:00 skoglund Exp $
- *                
- ********************************************************************/
-
-	.file	"l4fix.S"
-	.text
-
-
-/* where we ex-reg things, so they work on ia64 */
-	.align 16
-	.global _exreg_target
-	.align	16
-	.proc	_exreg_target
-_exreg_target:
-	/* load GP and RSE spots */
-	movl	gp = __gp
-
-	/* Load the jump address and reg-stack address from the stack */
-	ld8     r8 = [sp], 8
-		;; 
-	ld8	r9 = [sp], 8
-		;; 
-	mov	b0 = r9
-		;; 
-
-	/* setup the RSE */
-	mov	ar.rsc = 0
-	;;
-	mov	ar.bspstore = r8
-	;;
-	mov	ar.rsc = 3 + (3 << 2)
-	;;
-	alloc	r8 = ar.pfs,0,0,0,0
-	br.sptk.many b0
-	.endp	_exreg_target
diff --git a/user/apps/l4test/ia64/tests.cc b/user/apps/l4test/ia64/tests.cc
deleted file mode 100644
index 0f79f265..00000000
--- a/user/apps/l4test/ia64/tests.cc
+++ /dev/null
@@ -1,35 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/ia64/tests.cc
- * Description:   Architecture specific tests
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tests.cc,v 1.5 2003/09/24 19:06:00 skoglund Exp $
- *                
- ********************************************************************/
-
-void arch_test(void)
-{
-}
diff --git a/user/apps/l4test/mips32/arch.h b/user/apps/l4test/mips32/arch.h
deleted file mode 100644
index 9e0c9f01..00000000
--- a/user/apps/l4test/mips32/arch.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4test/mips32/arch.h
- * Description:   Mips32 configuration for l4test
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: arch.h,v 1.1 2006/02/23 21:07:53 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __USER__APPS__L4TEST__MIPS32__ARCH_H__
-#define __USER__APPS__L4TEST__MIPS32__ARCH_H__
-
-#define ARCH_NAME               "Mips32"
-
-#define PAGE_BITS		(12)
-#define PAGE_SIZE		(1 << PAGE_BITS)
-#define MAX_MEM			(32L*1024L*1024L)
-
-#define STACK_PAGES             4
-
-
-/* some place to start reading/writing junk */
-#define SCRATCHMEM_START        (16*1024*1024)
-
-#endif /* !__USER__APPS__L4TEST__MIPS32__ARCH_H__ */
diff --git a/user/apps/l4test/mips32/crt0.S b/user/apps/l4test/mips32/crt0.S
deleted file mode 100644
index e37dc29e..00000000
--- a/user/apps/l4test/mips32/crt0.S
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4test/mips32/crt0.S
- * Description:   Startup code for MIPS32 processors
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0.S,v 1.1 2006/02/23 21:07:53 ud3 Exp $
- *                
- ********************************************************************/
-#include <l4/mips32/asm.h>
-#include <l4/mips32/regdef.h>
-
-#define STACKSIZE 8192
-	
-	.section ".text"
-	.align	4
-	.globl	_start
-_start:
-	la	sp, init_stack
-	addu	sp, STACKSIZE
-	subu	sp, sp, 0x10	
-	jal	__L4_Init
-
-	jal	main
-	nop
-	addu sp, sp, 0x10
-	
-1:
-	b	1b
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/apps/l4test/mips32/help.cc b/user/apps/l4test/mips32/help.cc
deleted file mode 100644
index d45a5f59..00000000
--- a/user/apps/l4test/mips32/help.cc
+++ /dev/null
@@ -1,85 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4test/mips32/help.cc
- * Description:   Helper functions for Mips32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: help.cc,v 1.1 2006/02/23 21:07:53 ud3 Exp $
- *                
- ********************************************************************/
-/* architecture specific 'helper' functions */
-
-#include <l4/types.h>
-#include <l4io.h>
-#include <arch.h>
-
-#include "../l4test.h"
-#include "../assert.h"
-
-/* setup an exreg 
- *
- * *sp == NULL: allocate a new stack
- * *sp != NULL: top of sp from an old exreg used, just refresh it!
- */
-void 
-setup_exreg( L4_Word_t *ip, L4_Word_t *sp, void (*func)(void) )
-{
-    L4_Word_t *stack;
-    int max;
-
-    /* allocate a stack, or perhaps not */
-    max = STACK_PAGES * PAGE_SIZE / sizeof( L4_Word_t );
-    if( *sp == NULL )
-    {
-        stack = (L4_Word_t*) get_pages( STACK_PAGES, 1 );
-        assert( stack != NULL );
-
-        stack = &stack[max-1];
-    }
-    else
-        stack = (L4_Word_t*) *sp;
-
-    /* set the return params */
-    *sp = (L4_Word_t) stack;
-    *ip = (L4_Word_t) func;
-}
-
-/* XXX Just return the entry point */
-void *
-code_addr( void *addr )
-{
-    return addr;
-}
-
-void
-get_startup_values (void (*func)(void), L4_Word_t * ip, L4_Word_t * sp)
-{
-    // Calculate intial SP
-    L4_Word_t stack = (L4_Word_t) get_pages (STACK_PAGES, 1);
-    stack += STACK_PAGES * PAGE_SIZE;
-
-    *ip = (L4_Word_t) func;
-    *sp = stack;
-}
diff --git a/user/apps/l4test/mips32/tests.cc b/user/apps/l4test/mips32/tests.cc
deleted file mode 100644
index 01e9b225..00000000
--- a/user/apps/l4test/mips32/tests.cc
+++ /dev/null
@@ -1,68 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4test/mips32/tests.cc
- * Description:   Architecture dependent tests
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tests.cc,v 1.1 2006/02/23 21:07:53 ud3 Exp $
- *                
- ********************************************************************/
-
-#include "l4/thread.h"
-#include <l4io.h>
-
-#include "../l4test.h"
-#include "../menu.h"
-#include "../assert.h"
-
-void except_test(void)
-{
-    asm volatile (
-	"li	$2, 400;"
-	"syscall;	"
-        );
-}
-
-/* the menu */
-static struct menuitem menu_items[] = 
-{
-    { NULL, "return" },
-    { except_test, "Exception test"},
-};
-
-static struct menu menu = 
-{
-    "MIPS32 Menu",
-    0, 
-    NUM_ITEMS(menu_items),
-    menu_items
-};
-
-
-void arch_test(void)
-{
-    menu_input( &menu );
-}
-
diff --git a/user/apps/l4test/mips64/arch.h b/user/apps/l4test/mips64/arch.h
deleted file mode 100644
index b72f0b2a..00000000
--- a/user/apps/l4test/mips64/arch.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/mips64/arch.h
- * Description:   Mips64 configuration for l4test
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: arch.h,v 1.3 2003/09/24 19:06:01 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __ARCH_H__
-#define __ARCH_H__
-
-#define ARCH_NAME               "Mips64"
-
-#define PAGE_BITS		(12)
-#define PAGE_SIZE		(1 << PAGE_BITS)
-#define MAX_MEM			(32L*1024L*1024L)
-
-#define STACK_PAGES             4
-
-
-/* some place to start reading/writing junk */
-#define SCRATCHMEM_START        (16*1024*1024)
-
-#endif /* __ARCH_H__ */
diff --git a/user/apps/l4test/mips64/crt0.S b/user/apps/l4test/mips64/crt0.S
deleted file mode 100644
index c218e1df..00000000
--- a/user/apps/l4test/mips64/crt0.S
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     apps/l4test/mips64/crt0.S
- * Description:   initial runtime for sigma0 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0.S,v 1.2 2003/09/24 19:06:01 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <l4/mips64/asm.h>
-#include <l4/mips64/regdef.h>
-
-#define STACKSIZE 8192
-	
-BEGIN_PROC(_start)
-	dla	sp, init_stack
-	daddu	sp, STACKSIZE
-
-	jal	__L4_Init
-
-	jal	main
-
-1:
-	b	1b
-END_PROC(_start)
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/apps/l4test/mips64/help.cc b/user/apps/l4test/mips64/help.cc
deleted file mode 100644
index b8539b43..00000000
--- a/user/apps/l4test/mips64/help.cc
+++ /dev/null
@@ -1,85 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/mips64/help.cc
- * Description:   Helper functions for Mips64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: help.cc,v 1.3 2003/09/24 19:06:01 skoglund Exp $
- *                
- ********************************************************************/
-/* architecture specific 'helper' functions */
-
-#include <l4/types.h>
-#include <l4io.h>
-#include <arch.h>
-
-#include "../l4test.h"
-#include "../assert.h"
-
-/* setup an exreg 
- *
- * *sp == NULL: allocate a new stack
- * *sp != NULL: top of sp from an old exreg used, just refresh it!
- */
-void 
-setup_exreg( L4_Word_t *ip, L4_Word_t *sp, void (*func)(void) )
-{
-	L4_Word_t *stack;
-	int max;
-
-	/* allocate a stack, or perhaps not */
-	max = STACK_PAGES * PAGE_SIZE / sizeof( L4_Word_t );
-	if( *sp == NULL )
-	{
-		stack = (L4_Word_t*) get_pages( STACK_PAGES, 1 );
-		assert( stack != NULL );
-
-		stack = &stack[max-1];
-	}
-	else
-		stack = (L4_Word_t*) *sp;
-
-	/* set the return params */
-	*sp = (L4_Word_t) stack;
-	*ip = (L4_Word_t) func;
-}
-
-/* XXX Just return the entry point */
-void *
-code_addr( void *addr )
-{
-	return addr;
-}
-
-void
-get_startup_values (void (*func)(void), L4_Word_t * ip, L4_Word_t * sp)
-{
-    // Calculate intial SP
-    L4_Word_t stack = (L4_Word_t) get_pages (STACK_PAGES, 1);
-    stack += STACK_PAGES * PAGE_SIZE;
-
-    *ip = (L4_Word_t) func;
-    *sp = stack;
-}
diff --git a/user/apps/l4test/mips64/tests.cc b/user/apps/l4test/mips64/tests.cc
deleted file mode 100644
index 7a4d07c8..00000000
--- a/user/apps/l4test/mips64/tests.cc
+++ /dev/null
@@ -1,87 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4test/mips64/tests.cc
- * Description:   Architecture dependent tests
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tests.cc,v 1.3 2004/05/03 23:47:28 cvansch Exp $
- *                
- ********************************************************************/
-
-#include "l4/thread.h"
-#include <l4io.h>
-
-#include "../l4test.h"
-#include "../menu.h"
-#include "../assert.h"
-
-void fpu_test(void)
-{
-    L4_Word_t res = 0;
-    L4_Word_t val = 0x12345678;
-
-    printf("\nTesting FPU\n");
-
-    asm volatile (
-	"dmtc1	%1, $f9		;"
-	"dmfc1	%0, $f9		;"
-	: "=r" (res)
-	: "r" (val)
-	: "$f9"
-    );
-
-    print_result ("Register access", res == val);
-}
-
-void except_test(void)
-{
-    asm volatile (
-	"li	$2, 400;"
-	"syscall;	"
-    );
-}
-
-/* the menu */
-static struct menuitem menu_items[] = 
-{
-    { NULL, "return" },
-    { fpu_test, "FPU test"},
-    { except_test, "Exception test"},
-};
-
-static struct menu menu = 
-{
-    "MIPS64 Menu",
-    0, 
-    NUM_ITEMS(menu_items),
-    menu_items
-};
-
-
-void arch_test(void)
-{
-    menu_input( &menu );
-}
-
diff --git a/user/apps/l4test/sparc64/arch.h b/user/apps/l4test/sparc64/arch.h
deleted file mode 100644
index 628a7280..00000000
--- a/user/apps/l4test/sparc64/arch.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     l4test/sparc64/arch.h
- * Description:   SPARC v9 configuration for l4test
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: arch.h,v 1.3 2004/05/21 01:50:00 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH_H__
-#define __ARCH_H__
-
-#define ARCH_NAME "SPARC v9"
-
-#warning awiggins (07-08-03): The page size is processor dependent, seperate!
-#define PAGE_BITS 13
-#define PAGE_SIZE (1 << PAGE_BITS)
-
-#define STACK_PAGES	8
-
-/* Some place to start reading/writing junk */
-#define SCRATCHMEM_START (16*1024*1024)
-
-#endif /* !__ARCH_H__ */
diff --git a/user/apps/l4test/sparc64/crt0.S b/user/apps/l4test/sparc64/crt0.S
deleted file mode 100644
index f7d6d0ac..00000000
--- a/user/apps/l4test/sparc64/crt0.S
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     sigma0/src/arch/sparc64/crt0.S
- * Description:   Startup code for SPARC v9 architecture.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0.S,v 1.4 2004/05/21 01:46:19 philipd Exp $
- *                
- ********************************************************************/
-
-	.section ".text"
-	.align 8
-	.globl _start
-_start:
-	setx    _stack_top, %g1, %fp
-	sub     %fp, 2047, %fp  ! adjust for stack bias
-	sub     %fp, 128, %sp   ! create a stack frame
-	
-	call    __L4_Init
-	nop
-	
-	call    main
-	nop
-	
-1:      ba,pt   %xcc, 1b
-	nop
-
-#define STACK_SIZE	(4096*4)
-	.section ".bss"
-	.align	16
-_stack_bottom:
-.space	STACK_SIZE
-_stack_top:
diff --git a/user/apps/l4test/sparc64/help.cc b/user/apps/l4test/sparc64/help.cc
deleted file mode 100644
index 46583336..00000000
--- a/user/apps/l4test/sparc64/help.cc
+++ /dev/null
@@ -1,82 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     l4test/sparc64/help.cc
- * Description:   Helper finctions for SPARC v9
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: help.cc,v 1.3 2004/05/21 01:50:00 philipd Exp $
- *                
- ********************************************************************/
-
-#include <l4/types.h>
-#include <arch.h>
-
-#include "../l4test.h"
-#include "../assert.h"
-
-/* setup an exreg 
- *
- * *sp == NULL: allocate a new stack
- * *sp != NULL: top of sp from an old exreg used, just refresh it!
- */
-void
-setup_exreg(L4_Word_t *ip, L4_Word_t *sp, void (*func)(void))
-{
-    L4_Word_t *stack;
-    int max;
-
-    /* allocate a stack, or perhaps not */
-    max = STACK_PAGES * PAGE_SIZE / sizeof( L4_Word_t );
-    if( *sp == NULL )
-    {
-	stack = (L4_Word_t*) get_pages( STACK_PAGES, 1 );
-	assert( stack != NULL );
-
-	stack = &stack[max-1];
-    }
-    else
-	stack = (L4_Word_t*) *sp;
-
-    /* set the return params */
-    *sp = (L4_Word_t) stack;
-    *ip = (L4_Word_t) func;
-} // setup_exreg()
-
-void *
-code_addr(void *addr)
-{
-    return addr;
-} // code_addr()
-
-void
-get_startup_values(void (*func)(void), L4_Word_t * ip, L4_Word_t * sp)
-{
-    // Calculate intial SP
-    L4_Word_t stack = (L4_Word_t) get_pages (STACK_PAGES, 1);
-    stack += STACK_PAGES * PAGE_SIZE;
-
-    *ip = (L4_Word_t) func;
-    *sp = stack;
-} // get_startup_values()
diff --git a/user/apps/l4test/sparc64/tests.cc b/user/apps/l4test/sparc64/tests.cc
deleted file mode 100644
index ef12a619..00000000
--- a/user/apps/l4test/sparc64/tests.cc
+++ /dev/null
@@ -1,36 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     l4test/sparc64/tests.cc
- * Description:   Architecture dependent tests
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: tests.cc,v 1.2 2003/09/24 19:06:04 skoglund Exp $
- *                
- ********************************************************************/
-
-#warning PORTME
-void arch_test(void)
-{
-}
diff --git a/user/configure.in b/user/configure.in
index 856bd0c0..a7c6502c 100644
--- a/user/configure.in
+++ b/user/configure.in
@@ -61,34 +61,16 @@ case $HOST in
   ia32|x86|i386*|i486*|i586*|i686*)
 	ARCH=ia32
 	;;
-  ia64*)
-	ARCH=ia64
-	;;
   powerpc64*|ppc64*)
 	ARCH=powerpc64
 	;;
   powerpc*)
 	ARCH=powerpc
 	;;
-  arm*)
-	ARCH=arm
-	;;
   amd64*)
 	ARCH=amd64
 	LIBGCCFLAGS=-m64
 	;;
-  mips64*)
-	ARCH=mips64
-	;;
-  mips32*)
-	ARCH=mips32
-	;;
-  alpha*)
-	ARCH=alpha
-	;;
-  sparc64*)
-	ARCH=sparc64
-	;;
   *)
 	AC_MSG_ERROR([Unknown hardware architecture: $HOST.
 	Please specify hardware architecture using --host=ARCH.])
@@ -109,9 +91,6 @@ if test "x$CC" = x -a "x$host_alias" != x; then
 	  gcc_prefix=x86_64
 	  host_alias=amd64
 	  ;;
-      mips32)
-	  gcc_prefix=mipsel
-	  ;;
       *)
 	  gcc_prefix=$ARCH
 	  ;;
@@ -281,10 +260,6 @@ case $ARCH in
 	default_sigma0_linkbase=00020000
 	default_roottask_linkbase=00300000
 	;;
-  ia64)
-	default_sigma0_linkbase=01000000
-	default_roottask_linkbase=02000000
-	;;
   powerpc)
 	default_kickstart_linkbase=00400000
 	default_sigma0_linkbase=00200000
@@ -294,104 +269,15 @@ case $ARCH in
 	default_sigma0_linkbase=00100000
 	default_roottask_linkbase=00300000
 	;;
-  arm)
-	default_sigma0_linkbase=C0A00000
-	default_roottask_linkbase=C0B00000
-	;;
   amd64)
   	default_kickstart_linkbase=00180000
 	default_sigma0_linkbase=00e00000
 	default_roottask_linkbase=01000000
 	;;
-  alpha)                          
-	default_sigma0_linkbase=d00000
-	default_roottask_linkbase=e00000
-	;;
-  mips64)
-	default_sigma0_linkbase=00100000
-	default_roottask_linkbase=00180000
-	;;
-  mips32)
-	default_sigma0_linkbase=02000000
-	default_roottask_linkbase=02200000
-	;;
-  sparc64)
-	default_sigma0_linkbase=00400000
-	default_roottask_linkbase=00480000
-	;;
 esac
 
 dnl Platform dependent settings.
 case $HOST in
-  arm-pleb)
-        PLAT=pleb
-        CFLAGS="$CFLAGS -O2 -march=armv4 -mtune=strongarm1100 -DARM_LITTLE_ENDIAN"
-	AC_SUBST([PLAT])
-        ;;
-  arm-pleb2)
-        PLAT=pleb2
-        CFLAGS="$CFLAGS -O2 -march=armv5 -mtune=xscale -DARM_LITTLE_ENDIAN"
-	AC_SUBST([PLAT])
-	default_sigma0_linkbase=A00A0000
-	default_roottask_linkbase=A00B0000
-        ;;
-  arm-ixdp425)
-        PLAT=ixdp425
-        CFLAGS="$CFLAGS -O2 -march=armv5 -mbig-endian -DARM_BIG_ENDIAN"
-	LDFLAGS="$LDFLAGS -EB"
-	AC_SUBST([PLAT])
-	default_sigma0_linkbase=00A00000
-	default_roottask_linkbase=00B00000
-        ;;
-  arm-innovator)
-	PLAT=innovator
-	CFLAGS="$CFLAGS -O2 -march=armv4 -mtune=arm9tdmi -mshort-load-bytes -DARM_LITTLE_ENDIAN"
-	default_sigma0_linkbase=10200000
-	default_roottask_linkbase=10300000
-	AC_SUBST([PLAT])
-	;; 
-  arm-csb337)
-	PLAT=csb337
-	CFLAGS="$CFLAGS -O2 -march=armv4 -mtune=arm9tdmi -mshort-load-bytes -DARM_LITTLE_ENDIAN"
-	default_sigma0_linkbase=20500000
-	default_roottask_linkbase=20550000
-	AC_SUBST([PLAT])
-	;; 
-  mips64-erpcn01)
-	CFLAGS="$CFLAGS -G 0 -mlong64 -mno-abicalls -non_shared -msplit-addresses -EL -march=r5000 -mips4 -mabi=64 -Wa,-mabi=o64 -DMIPS64_LITTLE_ENDIAN"
-	LDFLAGS="$LDFLAGS -EL"
-	PLAT=erpcn01
-	AC_SUBST([PLAT])
-	;;
-  mips64-sb1)
-	CFLAGS="$CFLAGS -O3 -G 0 -mlong64 -mno-abicalls -non_shared -msplit-addresses -EB -march=sb1 -mabi=64 -Wa,-mabi=o64 -DMIPS64_BIG_ENDIAN"
-	LDFLAGS="$LDFLAGS -EB"
-	PLAT=sb1
-	AC_SUBST([PLAT])
-	;;
-  mips64-vr41xx)
-	CFLAGS="$CFLAGS -G 0 -mlong64 -mno-abicalls -non_shared -msplit-addresses -EL -march=r4000 -mips3 -mabi=64 -Wa,-mabi=o64 -DMIPS64_LITTLE_ENDIAN"
-	LDFLAGS="$LDFLAGS -EL"
-	PLAT=vr41xx
-	AC_SUBST([PLAT])
-	;;
-  mips64-u4600|mips64*)
-	CFLAGS="$CFLAGS -G 0 -mlong64 -mno-abicalls -non_shared -msplit-addresses -EB -march=r4000 -mips3 -mabi=64 -Wa,-mabi=o64 -DMIPS64_BIG_ENDIAN"
-	LDFLAGS="$LDFLAGS -EB"
-	PLAT=u4600
-	AC_SUBST([PLAT])
-	;;
-  mips32*)
-	CFLAGS="$CFLAGS -mips32 -fno-builtin -fno-pic -mno-abicalls"
-	LDFLAGS="$LDFLAGS -mips32 -EL"
-	PLAT=malta
-	AC_SUBST([PLAT])
-	;;
-  alpha*)
-	CFLAGS="$CFLAGS -freg-struct-return"
-	PLAT=srm
-	AC_SUBST([PLAT])
-	;;
   amd64*)
 	PLAT=amd64-pc99
 	CFLAGS="$CFLAGS -m64 -mno-red-zone"
@@ -401,12 +287,6 @@ case $HOST in
   powerpc64*)
 	CFLAGS="$CFLAGS -msoft-float -mminimal-toc"
 	;;
-  sparc64-sun|sparc64*)
-	PLAT=ofsparc64
-	CFLAGS="$CFLAGS -mcmodel=medany"
-	AC_SUBST([ENDIAN])
-	AC_SUBST([PLAT])
-	;;
 esac
 
 case $KICKSTART_LINKBASE in
diff --git a/user/include/l4/alpha/asm.h b/user/include/l4/alpha/asm.h
deleted file mode 100644
index b3b01196..00000000
--- a/user/include/l4/alpha/asm.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/asm.h
- * Created:       23/07/2002 17:48:20 by Simon Winwood (sjw)
- * Description:   Assembler macros etc. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.2 2003/09/24 19:06:21 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __L4__ALPHA__ASM_H__
-#define __L4__ALPHA__ASM_H__
-
-#define BEGIN_PROC(name)			\
-    .global name;				\
-    .align 3;					\
-    .ent name;					\
-name:
-
-#define END_PROC(name)				\
-    .end name
-
-#endif /* __L4__ALPHA__ASM_H__ */
diff --git a/user/include/l4/alpha/kdebug.h b/user/include/l4/alpha/kdebug.h
deleted file mode 100644
index d67fa0d3..00000000
--- a/user/include/l4/alpha/kdebug.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     l4/alpha/kdebug.h
- * Description:   Alpha kernel debugger interface
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: kdebug.h,v 1.3 2003/09/24 19:06:21 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__ALPHA__KDEBUG_H__
-#define __L4__ALPHA__KDEBUG_H__
-
-#include <l4/types.h>
-#include <l4/alpha/pal.h>
-
-#define  __L4_TRAP_KPUTC  0
-#define  __L4_TRAP_KGETC  1
-#define  __L4_TRAP_ENTER  2
-
-#define L4_KDB_Enter(str...)					\
-do {								\
-    register L4_Word_t r16 asm("$16") = __L4_TRAP_ENTER;	\
-    __asm__ __volatile__ (					\
-	"lda        $17, 1f\n\t"				\
-	"call_pal %0       \n\t"				\
-	".data		    \n\t"				\
-	"1:	.string \"KD# " str "\"	    \n\t"		\
-	".previous	    \n\t"				\
-	: : "i" (PAL_gentrap), "r" (r16) : "memory");		\
-} while (0)
-
-#define __L4_KDB_Op_Arg(op, name, argtype)		\
-L4_INLINE void L4_KDB_##name (argtype arg)		\
-{							\
-       register L4_Word_t r16 asm("$16") = op;		\
-       register char r17 asm("$17") = arg;		\
-       __asm__ __volatile__ (				\
-	"call_pal %0       \n\t"			\
-	: : "i" (PAL_gentrap), "r" (r16), "r" (r17)	\
-       );						\
-}
-
-#define __L4_KDB_Op_Ret(op, name, rettype)		\
-L4_INLINE rettype L4_KDB_##name (void)			\
-{							\
-    register L4_Word_t r16 asm("$16") = op;		\
-    register char ret asm("$0");			\
-    __asm__ __volatile__ (				\
- 	"call_pal %1       \n\t"			\
-	: "=r" (ret) : "i" (PAL_gentrap), "r" (r16)	\
-							\
-    );							\
-    return ret;						\
-}
-
-__L4_KDB_Op_Ret( __L4_TRAP_KGETC, ReadChar_Blocked, char );
-__L4_KDB_Op_Arg( __L4_TRAP_KPUTC, PrintChar, char );
-
-#endif /* !__L4__ALPHA__KDEBUG_H__ */
diff --git a/user/include/l4/alpha/pal.h b/user/include/l4/alpha/pal.h
deleted file mode 100644
index bdf081ab..00000000
--- a/user/include/l4/alpha/pal.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/alpha/pal.h
- * Created:       23/07/2002 18:08:44 by Simon Winwood (sjw)
- * Description:   PAL definitions (for asm and C) 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: pal.h,v 1.2 2003/09/24 19:06:21 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__ALPHA__PAL_H__
-#define __ARCH__ALPHA__PAL_H__
-
-/* Interrupt types */
-#define PAL_INT_IPI      0
-#define PAL_INT_CLOCK    1
-#define PAL_INT_ERR      2
-#define PAL_INT_MCHK     2
-#define PAL_INT_DEV      3
-#define PAL_INT_PERF     4
-
-/* entIF reasons */
-#define PAL_IF_BPT       0
-#define PAL_IF_BUGCHK    1
-#define PAL_IF_GENTRAP   2
-#define PAL_IF_FEN       3
-#define PAL_IF_OPDEC     4
-
-/* PAL calls, unprivileged */
-#define PAL_bpt          128  /* Breakpoint trap: Kernel and user */
-#define PAL_bugchk       129  /* Bugcheck trap: Kernel and user */
-#define PAL_callsys      131  /* System call: User */
-/* #define PAL_clrfen = ?         Clear floating-point enable: User */
-#define PAL_gentrap      170  /* Generate trap: Kernel and user */
-#define PAL_imb          134  /* I-stream memory barrier: Kernel and user */
-#define PAL_rdunique     158  /* Read unique: Kernel and user */
-#define PAL_urti         146  /* Return from user mode trap: User mode */
-#define PAL_wrunique     159  /* Write Unique: Kernel and user */    
-
-
-/* PAL calls, privileged */
-#define PAL_cflush       1  /* Cache flush */ 
-#define PAL_cserve       9  /* Console Service */
-#define PAL_draina       2  /* Drain aborts */
-#define PAL_halt         0  /* Halt the processor */
-/* PAL_jtopal = 46 */
-/* PAL_nphalt = 190 */
-#define PAL_rdmces       16  /* Read machine check error summary register */
-#define PAL_rdps         54  /* Read processor status */       
-#define PAL_rdusp        58  /* Read user stack pointer */
-#define PAL_rdval        50  /* Read system value */         
-#define PAL_retsys       61  /* Return from syscall */
-#define PAL_rti          63  /* Return from trap, fault, or interrupt */
-#define PAL_swpctx       48  /* Swap process context */
-#define PAL_swpipl       53  /* Swap IPL */
-#define PAL_tbi          51  /* TB invalidate */
-#define PAL_whami        60  /* Who am I */
-#define PAL_wrent        52  /* Write system entry address */
-#define PAL_wrfen        43  /* Write floating point enable */
-#define PAL_wripir       13  /* Write interprocessor interrupt request */
-#define PAL_wrkgp        55  /* Write kernel global pointer */
-#define PAL_wrmces       17  /* Write machine check error summary register */
-#define PAL_wrperfmon    57  /* Performance monitoring function */
-#define PAL_wrusp        56  /* Write user stack pointer */
-#define PAL_wrval        49  /* Write system value */
-#define PAL_wrvptptr     45     /* Write virtual page table pointer */
-/* PAL_wtint = ?          Wait for interrupt */
-
-/* MMCSR values */
-#define PAL_MMCSR_INVALID 0
-#define PAL_MMCSR_ACCESS  1
-#define PAL_MMCSR_FOR     2
-#define PAL_MMCSR_FOE     3
-#define PAL_MMCSR_FOW     4
-
-#define PAL_PS_USER       (1 << 3)
-
-#endif /* __ARCH__ALPHA__PAL_H__ */
diff --git a/user/include/l4/alpha/runconv.h b/user/include/l4/alpha/runconv.h
deleted file mode 100644
index 2dac90ca..00000000
--- a/user/include/l4/alpha/runconv.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     l4/alpha/runconv.h
- * Description:   Alpha runtime convention definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: runconv.h,v 1.3 2003/09/24 19:06:21 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__IA64__RUNCONV_H__
-#define __L4__IA64__RUNCONV_H__
-
-
-#define __L4_CALLER_SAVED_REGS					\
-    "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",      	\
-    "$16", "$17", "$18", "$19", "$20", "$21",			\
-    "$22", "$23", "$24", "$25",	"$26",				\
-    "$27", "$28"
-    
-
-#define __L4_CALLEE_SAVED_REGS \
-    "$9", "$10", "$11", "$12", "$13", "$14", "$15"
-
-#endif /* !__L4__IA64__RUNCONV_H__ */
diff --git a/user/include/l4/alpha/specials.h b/user/include/l4/alpha/specials.h
deleted file mode 100644
index 4b8e7a7f..00000000
--- a/user/include/l4/alpha/specials.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     l4/alpha/specials.h
- * Description:   Alpha specific functions and defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: specials.h,v 1.3 2003/09/24 19:06:21 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__ALPHA__SPECIALS_H__
-#define __L4__ALPHA__SPECIALS_H__
-
-/*
- * Architecture specific helper functions.
- */
-
-L4_INLINE int __L4_Msb (L4_Word_t w) __attribute__ ((const));
-
-L4_INLINE int __L4_Msb (L4_Word_t w)
-{
-    int bitnum;
-
-    if (w == 0)
-	return 64;
-
-    for (bitnum = 0, w >>= 1; w != 0; bitnum++)
-	w >>= 1;
-
-    return bitnum;
-}
-
-
-#endif /* !__L4__ALPHA__SPECIALS_H__ */
diff --git a/user/include/l4/alpha/syscalls.h b/user/include/l4/alpha/syscalls.h
deleted file mode 100644
index 4a8d557d..00000000
--- a/user/include/l4/alpha/syscalls.h
+++ /dev/null
@@ -1,315 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,   University of New South Wales
- *                
- * File path:     l4/alpha/syscalls.h
- * Description:   Alpha system call ABI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.7 2004/08/23 18:43:10 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__ALPHA__SYSCALLS_H__
-#define __L4__ALPHA__SYSCALLS_H__
-
-#include <l4/types.h>
-#include <l4/message.h>
-
-#include <l4/alpha/vregs.h>
-#include <l4/alpha/runconv.h>
-#include <l4/alpha/pal.h>
-#include <l4/alpha/kdebug.h>
-
-#define MAGIC_KIP_REQUEST          (0x4c34754b4b495034)
-
-
-L4_INLINE void * L4_KernelInterface (L4_Word_t *ApiVersion,
-				     L4_Word_t *ApiFlags,
-				     L4_Word_t *KernelId)
-{
-    register void * base_address	asm ("$0");
-    register L4_Word_t api_version	asm ("$16") = MAGIC_KIP_REQUEST;
-    register L4_Word_t api_flags	asm ("$17");
-    register L4_Word_t kernel_id	asm ("$18");
-
-    __asm__ __volatile__ (
-	"call_pal %4"
-	: /* outputs */
-	"=r" (base_address),
-	"+r" (api_version),
-	"=r" (api_flags),
-	"=r" (kernel_id)
-	: "i" (PAL_cserve));
-
-    if( ApiVersion ) *ApiVersion = api_version;
-    if( ApiFlags ) *ApiFlags = api_flags;
-    if( KernelId ) *KernelId = kernel_id;
-
-    return base_address;
-}
-
-#define DO_SYSCALL(name) 						\
-	"       lda     $27, __L4_"#name "                      \n"	\
-	"       ldq     $27, 0($27)                             \n"	\
-	"	jsr	$26, ($27)                              \n"
-
-
-
-typedef L4_ThreadId_t (*__L4_Ipc_t)(L4_ThreadId_t to, L4_ThreadId_t FromSpecifier, L4_Word_t Timeouts);
-extern __L4_Ipc_t __L4_Ipc;
-
-
-/* Implemented in exregs.S */
-typedef L4_ThreadId_t (*__L4_ExchangeRegisters_t)(L4_ThreadId_t dest,
-						  L4_Word_t control,
-						  L4_Word_t sp,
-						  L4_Word_t ip,
-						  L4_Word_t flags,
-						  L4_Word_t UserDefHandle,
-						  L4_ThreadId_t pager);
-extern __L4_ExchangeRegisters_t __L4_ExchangeRegisters;
-
-#ifdef __cplusplus
-extern "C"
-#endif
-L4_ThreadId_t __alpha_L4_ExchangeRegisters (L4_ThreadId_t dest,
-					    L4_Word_t control,
-					    L4_Word_t sp,
-					    L4_Word_t ip,
-					    L4_Word_t flags,
-					    L4_Word_t UserDefHandle,
-					    L4_ThreadId_t pager,
-					    L4_Word_t *old_control,
-					    L4_Word_t *old_sp,
-					    L4_Word_t *old_ip,
-					    L4_Word_t *old_flags,
-					    L4_Word_t *old_UserDefHandle,
-					    L4_ThreadId_t *old_pager);
-
-
-L4_INLINE
-L4_ThreadId_t L4_ExchangeRegisters (L4_ThreadId_t dest,
-					      L4_Word_t control,
-					      L4_Word_t sp,
-					      L4_Word_t ip,
-					      L4_Word_t flags,
-					      L4_Word_t UserDefHandle,
-					      L4_ThreadId_t pager,
-					      L4_Word_t *old_control,
-					      L4_Word_t *old_sp,
-					      L4_Word_t *old_ip,
-					      L4_Word_t *old_flags,
-					      L4_Word_t *old_UserDefHandle,
-				    L4_ThreadId_t *old_pager)
-{
-    return __alpha_L4_ExchangeRegisters(dest,
-					control,
-					sp,
-					ip,
-					flags,
-					UserDefHandle,
-					pager,
-					old_control,
-					old_sp,
-					old_ip,
-					old_flags,
-					old_UserDefHandle,
-					old_pager);
-}
-
-
-typedef L4_Word_t (*__L4_ThreadControl_t)(L4_ThreadId_t, L4_ThreadId_t, L4_ThreadId_t, L4_ThreadId_t, void *);
-extern __L4_ThreadControl_t __L4_ThreadControl;
-
-L4_INLINE L4_Word_t L4_ThreadControl (L4_ThreadId_t dest,
-				      L4_ThreadId_t SpaceSpecifier,
-				      L4_ThreadId_t Scheduler,
-				      L4_ThreadId_t Pager,
-				      void *utcb)
-{
-    return __L4_ThreadControl(dest, SpaceSpecifier, Scheduler, Pager, utcb);
-}
-
-typedef L4_Clock_t (*__L4_SystemClock_t)(void);
-extern __L4_SystemClock_t __L4_SystemClock;
-
-L4_INLINE L4_Clock_t L4_SystemClock (void)
-{
-    return __L4_SystemClock();
-}
-
-typedef L4_Word_t (*__L4_ThreadSwitch_t)(L4_ThreadId_t);
-extern __L4_ThreadSwitch_t __L4_ThreadSwitch;
-
-L4_INLINE L4_Word_t L4_ThreadSwitch (L4_ThreadId_t dest)
-{
-    return __L4_ThreadSwitch(dest);
-}
-
-typedef L4_Word_t (*__L4_Schedule_t)(L4_ThreadId_t dest, L4_Word_t TimeControl, 
-				      L4_Word_t ProcessorControl, L4_Word_t prio, L4_Word_t PreemptionControl); 
-extern __L4_Schedule_t __L4_Schedule;
-
-L4_INLINE L4_Word_t  L4_Schedule (L4_ThreadId_t dest,
-				  L4_Word_t TimeControl,
-				  L4_Word_t ProcessorControl,
-				  L4_Word_t prio,
-				  L4_Word_t PreemptionControl,
-				  L4_Word_t * old_TimeControl)
-{
-    register L4_Word_t r_result          asm ("$0");
-    register L4_ThreadId_t r_dest        asm ("$16") = dest; /* in and out old_TimeControl */
-    register L4_Word_t r_time            asm ("$17") = TimeControl; 
-    register L4_Word_t r_processor       asm ("$18") = ProcessorControl;
-    register L4_Word_t r_prio	         asm ("$19") = prio;
-    register L4_Word_t r_preemption 	 asm ("$20") = PreemptionControl;
-
-    asm __volatile__ (
-	DO_SYSCALL(Schedule)
-	: "=r" (r_result), "+r" (r_dest) 
-	: "r" (r_time), "r" (r_processor), "r" (r_prio), "r" (r_preemption)
-	: __L4_CALLER_SAVED_REGS);
-    
-    if(old_TimeControl)
-	*old_TimeControl = r_dest.raw;
-
-    return r_result;
-}
-
-L4_INLINE L4_MsgTag_t L4_Ipc (L4_ThreadId_t to,
-			      L4_ThreadId_t FromSpecifier,
-			      L4_Word_t Timeouts,
-			      L4_ThreadId_t * from)
-{
-    L4_MsgTag_t mr0;
-    L4_ThreadId_t result;
-
-    result = __L4_Ipc(to, FromSpecifier, Timeouts);
-   
-    if( !L4_IsNilThread(FromSpecifier) ) {
-	*from = result;
-    }
-
-    /* Return MR0 */
-    L4_StoreMR(0, (L4_Word_t *) &mr0);
-    return mr0;
-}
-
-typedef L4_ThreadId_t (*__L4_Lipc_t)(L4_ThreadId_t to, L4_ThreadId_t FromSpecifier, L4_Word_t Timeouts);
-extern __L4_Lipc_t __L4_Lipc;
-
-L4_INLINE L4_MsgTag_t L4_Lipc (L4_ThreadId_t to,
-			       L4_ThreadId_t FromSpecifier,
-			       L4_Word_t Timeouts,
-			       L4_ThreadId_t * from)
-{
-    L4_MsgTag_t mr0;
-    L4_ThreadId_t result;
-
-    /* sjw (30/04/2003): Not LIPC as this isn't implemented on Alpha */
-    result = __L4_Ipc(to, FromSpecifier, Timeouts);
-   
-    if( !L4_IsNilThread(FromSpecifier) ) {
-	*from = result;
-    }
-
-    /* Return MR0 */
-    L4_StoreMR(0, (L4_Word_t *) &mr0);
-    return mr0;
-}
-
-
-typedef void (*__L4_Unmap_t)(L4_Word_t);
-extern __L4_Unmap_t __L4_Unmap;
-
-L4_INLINE void L4_Unmap (L4_Word_t control)
-{
-    __L4_Unmap(control);
-}
-
-typedef void (*__L4_SpaceControl_t)(L4_ThreadId_t SpaceSpecifier,
-				     L4_Word_t control,
-				     L4_Fpage_t KernelInterfacePageArea,
-				     L4_Fpage_t UtcbArea,
-				     L4_ThreadId_t redirector);
-extern __L4_SpaceControl_t __L4_SpaceControl;
-
-L4_INLINE L4_Word_t L4_SpaceControl (L4_ThreadId_t SpaceSpecifier,
-				     L4_Word_t control,
-				     L4_Fpage_t KernelInterfacePageArea,
-				     L4_Fpage_t UtcbArea,
-				     L4_ThreadId_t redirector,
-				     L4_Word_t *old_control)
-{
-    register L4_Word_t r_result         asm ("$0");
-    register L4_ThreadId_t r_space	asm ("$16") = SpaceSpecifier; /* and old_control */
-    register L4_Word_t r_control	asm ("$17") = control;        
-    register L4_Fpage_t r_kiparea	asm ("$18") = KernelInterfacePageArea;
-    register L4_Fpage_t r_utcbarea	asm ("$19") = UtcbArea;
-    register L4_ThreadId_t r_redirector	asm ("$20") = redirector;
-
-    __asm__ __volatile__ (
-	DO_SYSCALL(SpaceControl)
-	: /* outputs */
-	"=r" (r_result),
-	"+r" (r_space)
-	: /* inputs */
-	"r" (r_control),
-	"r" (r_kiparea),
-	"r" (r_utcbarea),
-	"r" (r_redirector)
-	: /* clobbers */
-	__L4_CALLER_SAVED_REGS);
-
-    if(old_control)
-	*old_control = r_space.raw;
-
-    return r_result;
-}
-
-
-typedef L4_Word_t (*__L4_ProcessorControl_t)(L4_Word_t ProcessorNo,
-					  L4_Word_t InternalFrequency,
-					  L4_Word_t ExternalFrequency,
-					  L4_Word_t voltage);
-extern __L4_ProcessorControl_t __L4_ProcessorControl;
-    
-L4_INLINE L4_Word_t L4_ProcessorControl (L4_Word_t ProcessorNo,
-					 L4_Word_t InternalFrequency,
-					 L4_Word_t ExternalFrequency,
-					 L4_Word_t voltage)
-{
-    return __L4_ProcessorControl(ProcessorNo, InternalFrequency, ExternalFrequency, voltage);
-}
-
-typedef L4_Word_t (*__L4_MemoryControl_t)(L4_Word_t control,
-				     L4_Word_t attr0, L4_Word_t attr1, L4_Word_t attr2, L4_Word_t attr3);
-extern __L4_MemoryControl_t __L4_MemoryControl;
-
-L4_INLINE L4_Word_t L4_MemoryControl (L4_Word_t control,
-				 const L4_Word_t * attributes)
-{
-    return __L4_MemoryControl(control, attributes[0], attributes[1], attributes[2], attributes[3]);
-}
-
-#endif /* !__L4__ALPHA__SYSCALLS_H__ */
diff --git a/user/include/l4/alpha/types.h b/user/include/l4/alpha/types.h
deleted file mode 100644
index 11bb5a50..00000000
--- a/user/include/l4/alpha/types.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,   University of New South Wales
- *                
- * File path:     l4/alpha/types.h
- * Description:   Alpha specific type declararions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.6 2006/10/26 12:10:48 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __L4__ALPHA__TYPES_H__
-#define __L4__ALPHA__TYPES_H__
-
-#undef  L4_32BIT
-#define L4_64BIT
-#define L4_LITTLE_ENDIAN
-
-typedef unsigned long		L4_Word64_t;
-typedef unsigned int		L4_Word32_t;
-typedef unsigned short		L4_Word16_t;
-typedef unsigned char		L4_Word8_t;
-
-typedef L4_Word64_t		L4_Word_t;
-
-typedef signed long		L4_SignedWord64_t;
-typedef signed int		L4_SignedWord32_t;
-typedef signed short		L4_SignedWord16_t;
-typedef signed char		L4_SignedWord8_t;
-
-typedef L4_SignedWord64_t	L4_SignedWord_t;
-
-typedef unsigned long           L4_Size_t;
-
-#if 0
-typedef unsigned long		L4_Uint64;
-typedef unsigned int		L4_Uint32;
-typedef unsigned short		L4_Uint16;
-typedef unsigned char		L4_Uint8;
-
-typedef int long		L4_Int64;
-typedef int			L4_Int32;
-typedef short			L4_Int16;
-typedef char			L4_Int8;
-#endif
-
-#endif /* !__L4__ALPHA__TYPES_H__ */
diff --git a/user/include/l4/alpha/vregs.h b/user/include/l4/alpha/vregs.h
deleted file mode 100644
index e712dbe4..00000000
--- a/user/include/l4/alpha/vregs.h
+++ /dev/null
@@ -1,266 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2003,   University of New South Wales
- *                
- * File path:     l4/alpha/vregs.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: vregs.h,v 1.5 2004/04/29 01:31:03 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __L4__ALPHA__VREGS_H__
-#define __L4__ALPHA__VREGS_H__
-
-#include <l4/alpha/pal.h>
-
-L4_INLINE L4_Word_t *__L4_Alpha_Utcb( void ) __attribute__ ((const));
-L4_INLINE L4_Word_t *__L4_Alpha_Utcb( void )
-{    
-    /* sjw (02/09/2002): FIXME */
-    register L4_Word_t  *_L4_Utcb asm("$0");
-    
-    asm __volatile__ ("call_pal %1" : "=r" (_L4_Utcb) : "i" (PAL_rdunique));
-    
-    return _L4_Utcb;
-}
-
-/*
- * Location of TCRs within UTCB.
- */
-
-#define __L4_TCR_BR_OFFSET		        (80)
-#define __L4_TCR_MR_OFFSET		        (16)
-#define __L4_TCR_THREAD_WORD0    		(10)
-#define __L4_TCR_VIRTUAL_ACTUAL_SENDER		(9)
-#define __L4_TCR_INTENDED_RECEIVER		(8)
-#define __L4_TCR_ERROR_CODE			(7)
-#define __L4_TCR_XFER_TIMEOUT			(6)
-#define __L4_TCR_COP_FLAGS			(5)
-#define __L4_TCR_PREEMPT_FLAGS			(5)
-#define __L4_TCR_EXCEPTION_HANDLER		(4)
-#define __L4_TCR_PAGER				(3)
-#define __L4_TCR_USER_DEFINED_HANDLE		(2)
-#define __L4_TCR_PROCESSOR_NO			(1)
-#define __L4_TCR_MY_GLOBAL_ID			(0)
-
-/*
- * Thread Control Registers.
- */
-
-L4_INLINE L4_Word_t __L4_TCR_MyGlobalId( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_MY_GLOBAL_ID ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_MyLocalId( void )
-{
-    L4_Word_t *dummy = __L4_Alpha_Utcb();
-    return (L4_Word_t) dummy;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ProcessorNo( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_PROCESSOR_NO ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_UserDefinedHandle( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_USER_DEFINED_HANDLE ];
-}
-
-L4_INLINE void __L4_TCR_Set_UserDefinedHandle( L4_Word_t w )
-{
-    (__L4_Alpha_Utcb())[ __L4_TCR_USER_DEFINED_HANDLE ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_Pager( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_PAGER ];
-}
-
-L4_INLINE void __L4_TCR_Set_Pager( L4_Word_t w )
-{
-    (__L4_Alpha_Utcb())[ __L4_TCR_PAGER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ExceptionHandler( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_EXCEPTION_HANDLER ];
-}
-
-L4_INLINE void __L4_TCR_Set_ExceptionHandler( L4_Word_t w )
-{
-    (__L4_Alpha_Utcb())[ __L4_TCR_EXCEPTION_HANDLER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ErrorCode( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_ERROR_CODE ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_XferTimeout( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_XFER_TIMEOUT ];
-}
-
-L4_INLINE void __L4_TCR_Set_XferTimeout( L4_Word_t w )
-{
-    (__L4_Alpha_Utcb())[ __L4_TCR_XFER_TIMEOUT ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_IntendedReceiver( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_INTENDED_RECEIVER ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ActualSender( void )
-{
-    return (__L4_Alpha_Utcb())[ __L4_TCR_VIRTUAL_ACTUAL_SENDER ];
-}
-
-L4_INLINE void __L4_TCR_Set_VirtualSender( L4_Word_t w )
-{
-    (__L4_Alpha_Utcb())[ __L4_TCR_VIRTUAL_ACTUAL_SENDER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ThreadWord (L4_Word_t n)
-{
-    return (__L4_Alpha_Utcb ())[__L4_TCR_THREAD_WORD0 + (int) n];
-}
-
-L4_INLINE void __L4_TCR_Set_ThreadWord (L4_Word_t n, L4_Word_t w)
-{
-    (__L4_Alpha_Utcb ())[__L4_TCR_THREAD_WORD0 + (int) n] = w;
-}
-
-L4_INLINE void L4_Set_CopFlag( L4_Word_t n )
-{
-    (__L4_Alpha_Utcb())[ __L4_TCR_COP_FLAGS ] |= (1 << n);
-}
-
-L4_INLINE void L4_Clr_CopFlag( L4_Word_t n )
-{
-    (__L4_Alpha_Utcb())[ __L4_TCR_COP_FLAGS ] &= ~(1 << n);
-}
-
-L4_INLINE L4_Bool_t L4_EnablePreemptionFaultException( void )
-{
-    L4_Bool_t old = ((__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] >> 5) & 1;
-    (__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] |= (1 << 5);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemptionFaultException( void )
-{
-    L4_Bool_t old = ((__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] >> 5) & 1;
-    (__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] &= ~(1 << 5);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_EnablePreemption( void )
-{
-    L4_Bool_t old = ((__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] >> 6) & 1;
-    (__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] |= (1 << 6);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemption( void )
-{
-    L4_Bool_t old = ((__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] >> 6) & 1;
-    (__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] &= ~(1 << 6);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_PreemptionPending( void )
-{
-    L4_Bool_t retval = (((__L4_Alpha_Utcb())[ __L4_TCR_PREEMPT_FLAGS ]) >> 7) & 1;
-    return retval;
-}
-
-
-
-/*
- * Message Registers.
- */
-
-L4_INLINE void L4_StoreMR( int i, L4_Word_t * w )
-{
-    *w = (__L4_Alpha_Utcb())[__L4_TCR_MR_OFFSET +  i ];
-}
-
-L4_INLINE void L4_LoadMR( int i, L4_Word_t w )
-{
-    (__L4_Alpha_Utcb())[__L4_TCR_MR_OFFSET + i ] = w;
-}
-
-L4_INLINE void L4_StoreMRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * mr = &(__L4_Alpha_Utcb())[__L4_TCR_MR_OFFSET + i];
-
-    while( k-- > 0 )
-	*w++ = *mr++;
-}
-
-L4_INLINE void L4_LoadMRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * mr = &(__L4_Alpha_Utcb())[__L4_TCR_MR_OFFSET + i];
-
-    while( k-- > 0 )
-	*mr++ = *w++;
-}
-
-/*
- * Buffer Registers.
- */
-
-L4_INLINE void L4_StoreBR( int i, L4_Word_t * w )
-{
-    *w = (__L4_Alpha_Utcb())[__L4_TCR_BR_OFFSET + i ];
-}
-
-L4_INLINE void L4_LoadBR( int i, L4_Word_t w )
-{
-    (__L4_Alpha_Utcb())[__L4_TCR_BR_OFFSET + i ] = w;
-}
-
-L4_INLINE void L4_StoreBRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * br = &(__L4_Alpha_Utcb())[__L4_TCR_BR_OFFSET + i];
-
-    while( k-- > 0 )
-	*w++ = *br++;
-}
-
-L4_INLINE void L4_LoadBRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * br = &(__L4_Alpha_Utcb())[__L4_TCR_BR_OFFSET +  i];
-
-    while( k-- > 0 )
-	*br++ = *w++;
-}
-
-
-#endif	/* __L4__ALPHA__VREGS_H__ */
-
diff --git a/user/include/l4/arm/asm.h b/user/include/l4/arm/asm.h
deleted file mode 100644
index 9c1b592a..00000000
--- a/user/include/l4/arm/asm.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     l4/arm/asm.h
- * Description:   Assembler macros etc. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.3 2004/06/04 08:20:12 htuch Exp $
- *                
- ********************************************************************/
-
-#ifndef __L4__ARM__ASM_H__
-#define __L4__ARM__ASM_H__
-
-#define BEGIN_PROC(name)			\
-    .global name; 				\
-    .align;					\
-name:
-
-#define END_PROC(name)				\
-    ;
-
-#endif /* __L4__ARM__ASM_H__ */
diff --git a/user/include/l4/arm/kdebug.h b/user/include/l4/arm/kdebug.h
deleted file mode 100644
index 88b1e715..00000000
--- a/user/include/l4/arm/kdebug.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     l4/arm/kdebug.h
- * Description:   ARM kernel debugger interface
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: kdebug.h,v 1.10 2006/12/05 17:07:34 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__ARM__KDEBUG_H__
-#define __L4__ARM__KDEBUG_H__
-
-#include <l4/types.h>
-#include <l4/arm/syscalls.h>
-
-/* FIXME - pass in str... */
-#define L4_KDB_Enter(str...)			\
-do {						\
-	__asm__ __volatile__ (			\
-		"mov	lr,	pc\n"		\
-		"mov	pc,	%0\n"		\
-		:				\
-		: "r" (L4_TRAP_KDEBUG)		\
-		: "lr");			\
-} while (0)
-
-#define __L4_KDB_Op_Arg(op, name, argtype)	\
-L4_INLINE void L4_KDB_##name (argtype arg)	\
-{						\
-    __asm__ __volatile__ (			\
-		"mov	r0,	%0\n"		\
-		"mov	lr,	pc\n"		\
-		"mov	pc,	%1\n"		\
-		:				\
-		: "r" (arg), "r" (op)		\
-		: "r0", "lr", "memory" );	\
-} 
-
-#define __L4_KDB_Op_Ret(op, name, rettype)	\
-L4_INLINE rettype L4_KDB_##name (void)		\
-{						\
-    register unsigned int ret;			\
-    __asm__ __volatile (			\
-		"mov	lr,	pc\n"		\
-		"mov	pc,	%1\n"		\
-		"mov	%0,	r0\n"		\
-		: "=r" (ret)			\
-		: "r" (op)			\
-		: "r0", "lr", "memory");	\
-    return ret;					\
-}
-
-
-__L4_KDB_Op_Ret(L4_TRAP_KGETC, ReadChar_Blocked, char );
-__L4_KDB_Op_Ret(L4_TRAP_KGETC_NB, ReadChar, long );
-__L4_KDB_Op_Arg(L4_TRAP_KPUTC, PrintChar, char );
-
-#endif /* !__L4__ARM__KDEBUG_H__ */
diff --git a/user/include/l4/arm/specials.h b/user/include/l4/arm/specials.h
deleted file mode 100644
index 331fddc5..00000000
--- a/user/include/l4/arm/specials.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     include/l4/arm/specials.h
- * Description:   ARM specific functions and defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: specials.h,v 1.2 2003/09/24 19:06:23 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__ARM__SPECIALS_H__
-#define __L4__ARM__SPECIALS_H__
-
-/*
- * Architecture specific helper functions.
- */
-
-L4_INLINE int __L4_Msb (L4_Word_t w) __attribute__ ((const));
-
-L4_INLINE int __L4_Msb (L4_Word_t w)
-{
-    int bitnum;
-
-    if (w == 0)
-	return 32;
-
-    for (bitnum = 0, w >>= 1; w != 0; bitnum++)
-	w >>= 1;
-
-    return bitnum;
-}
-
-
-#endif /* !__L4__ARM__SPECIALS_H__ */
diff --git a/user/include/l4/arm/syscalls.h b/user/include/l4/arm/syscalls.h
deleted file mode 100644
index 472b6286..00000000
--- a/user/include/l4/arm/syscalls.h
+++ /dev/null
@@ -1,444 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     l4/arm/syscalls.h
- * Description:   ARM system call ABI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.19 2004/12/09 00:11:24 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __L4__ARM__SYSCALLS_H__
-#define __L4__ARM__SYSCALLS_H__
-
-#include <l4/types.h>
-#include <l4/message.h>
-
-/* gcc broken with fp in clobber list */
-#define __L4_SYSCALL                   \
-	"str	fp,	[sp, #-4]! \n" \
-	"mov	lr,	pc	   \n" \
-	"mov	pc,	ip	   \n" \
-	"ldr	fp,	[sp],	#4 \n"
-
-/* Always clobber these regs (not used as input regs) */
-#define __L4_ALWAYS_CLOBBER  "r8", "r9", "r10"
-
-/* Memory attributes for ARM memory control */
-#define L4_UncachedMemory	1
-#define L4_FlushICache		29
-#define L4_FlushDCache		30
-#define L4_FlushCache		31
-
-/* Only the KernelInterface call is implemented here, the others are done via
- * the info page.
- */
-L4_INLINE void * L4_KernelInterface (L4_Word_t *ApiVersion,
-				     L4_Word_t *ApiFlags,
-				     L4_Word_t *KernelId)
-{
-    register L4_Word_t base_address asm ("r0");
-    register L4_Word_t _ApiVersion  asm ("r1");
-    register L4_Word_t _ApiFlags    asm ("r2");
-    register L4_Word_t _KernelId    asm ("r3");
-
-    __asm__ __volatile__ (
-            "mov     lr,     pc\n"
-            "mov     pc,     %[trap_kip]\n"
-            : "=r" (base_address), "=r" (_ApiVersion), "=r" (_ApiFlags),
-              "=r" (_KernelId)
-            : [trap_kip] "r" (L4_TRAP_KIP)
-            : "lr", "memory" );
-
-    if (ApiVersion) *ApiVersion = _ApiVersion;
-    if (ApiFlags) *ApiFlags = _ApiFlags;
-    if (KernelId) *KernelId = _KernelId;
-
-    return (void *)base_address;
-}
-
-/* Implemented in exregs.S */
-typedef L4_ThreadId_t (*__L4_ExchangeRegisters_t)(L4_ThreadId_t dest,
-						  L4_Word_t control,
-						  L4_Word_t sp,
-						  L4_Word_t ip,
-						  L4_Word_t flags,
-						  L4_Word_t UserDefHandle,
-						  L4_ThreadId_t pager);
-extern __L4_ExchangeRegisters_t __L4_ExchangeRegisters;
-
-L4_INLINE L4_ThreadId_t L4_ExchangeRegisters (L4_ThreadId_t dest,
-					      L4_Word_t control,
-					      L4_Word_t sp,
-					      L4_Word_t ip,
-					      L4_Word_t flags,
-					      L4_Word_t UserDefHandle,
-					      L4_ThreadId_t pager,
-					      L4_Word_t *old_control,
-					      L4_Word_t *old_sp,
-					      L4_Word_t *old_ip,
-					      L4_Word_t *old_flags,
-					      L4_Word_t *old_UserDefHandle,
-				    L4_ThreadId_t *old_pager)
-{
-    register L4_ThreadId_t r_dest   asm ("r0") = dest;
-    register L4_Word_t r_control    asm ("r1") = control;
-    register L4_Word_t r_sp	    asm ("r2") = sp;
-    register L4_Word_t r_ip	    asm ("r3") = ip;
-    register L4_Word_t r_flags	    asm ("r4") = flags;
-    register L4_Word_t r_userhandle asm ("r5") = UserDefHandle;
-    register L4_ThreadId_t r_pager  asm ("r6") = pager;
-    register __L4_ExchangeRegisters_t r_syscall asm ("r12") 
-            = __L4_ExchangeRegisters;
-
-    __asm__ __volatile (
-        __L4_SYSCALL
-    : "=r" (r_dest), "=r" (r_control), "=r" (r_sp), "=r" (r_ip),
-      "=r" (r_flags), "=r" (r_userhandle), "=r" (r_pager), "=r" (r_syscall)
-    : "r" (r_syscall), "r" (r_dest), "r" (r_control), "r" (r_sp), 
-      "r" (r_ip), "r" (r_flags), "r" (r_userhandle), "r" (r_pager)
-    : "r7", "lr", __L4_ALWAYS_CLOBBER
-    );
-
-    *old_control = r_control;
-    *old_sp = r_sp;
-    *old_ip = r_ip;
-    *old_flags = r_flags;
-    *old_UserDefHandle = r_userhandle;
-    *old_pager = r_pager;
-
-    return r_dest;
-}
-
-typedef L4_Word_t (*__L4_ThreadControl_t)(L4_ThreadId_t, L4_ThreadId_t, L4_ThreadId_t, L4_ThreadId_t, void *);
-extern __L4_ThreadControl_t __L4_ThreadControl;
-
-L4_INLINE L4_Word_t L4_ThreadControl (L4_ThreadId_t dest,
-				      L4_ThreadId_t SpaceSpecifier,
-				      L4_ThreadId_t Scheduler,
-				      L4_ThreadId_t Pager,
-                                      void * UtcbLocation)
-{
-    register L4_Word_t result	   asm ("r0");
-    register L4_ThreadId_t r_dest  asm ("r0") = dest;
-    register L4_ThreadId_t r_space asm ("r1") = SpaceSpecifier;
-    register L4_ThreadId_t r_sched asm ("r2") = Scheduler;
-    register L4_ThreadId_t r_pager asm ("r3") = Pager;
-    register void *r_utcb          asm ("r4") = UtcbLocation;
-    register __L4_ThreadControl_t r_syscall asm ("r12") = __L4_ThreadControl;
-
-    __asm__ __volatile__ (
-        __L4_SYSCALL
-    : "=r" (result), "=r" (r_space), "=r" (r_sched), "=r" (r_pager), 
-      "=r" (r_utcb), "=r" (r_syscall)
-    : "r" (r_syscall), "r" (r_dest), "r" (r_space), "r" (r_sched), 
-      "r" (r_pager), "r" (r_utcb)
-    : "r5", "r6", "r7", "lr", __L4_ALWAYS_CLOBBER
-    ); 
-
-    return result;
-}
-
-typedef L4_Word64_t (*__L4_SystemClock_t)(void);
-extern __L4_SystemClock_t __L4_SystemClock;
-
-L4_INLINE L4_Clock_t L4_SystemClock (void)
-{
-    return (L4_Clock_t){ raw: __L4_SystemClock() };
-}
-
-typedef L4_Word_t (*__L4_ThreadSwitch_t)(L4_ThreadId_t);
-extern __L4_ThreadSwitch_t __L4_ThreadSwitch;
-
-L4_INLINE L4_Word_t L4_ThreadSwitch (L4_ThreadId_t dest)
-{
-    return __L4_ThreadSwitch(dest);
-}
-
-typedef L4_Word_t (*__L4_Schedule_t)(L4_ThreadId_t dest, L4_Word_t TimeControl, 
-				      L4_Word_t ProcessorControl, L4_Word_t prio, L4_Word_t PreemptionControl); 
-extern __L4_Schedule_t __L4_Schedule;
-
-L4_INLINE L4_Word_t  L4_Schedule (L4_ThreadId_t dest,
-				  L4_Word_t TimeControl,
-				  L4_Word_t ProcessorControl,
-				  L4_Word_t prio,
-				  L4_Word_t PreemptionControl,
-				  L4_Word_t * old_TimeControl)
-{
-    register L4_Word_t r_dest    asm ("r0") = dest.raw;
-    register L4_Word_t r_time    asm ("r1") = TimeControl; 
-    register L4_Word_t r_proc    asm ("r2") = ProcessorControl;
-    register L4_Word_t r_prio    asm ("r3") = prio;
-    register L4_Word_t r_preempt asm ("r4") = PreemptionControl;
-    register __L4_Schedule_t r_syscall asm ("r12") = __L4_Schedule;
-
-    __asm__ __volatile__ (
-        __L4_SYSCALL
-    : "=r" (r_dest), "=r" (r_time), "=r" (r_proc), "=r" (r_prio), 
-      "=r" (r_preempt), "=r" (r_syscall)
-    : "r" (r_syscall), "r" (r_dest), "r" (r_time), "r" (r_proc), 
-      "r" (r_prio), "r" (r_preempt)
-    : "r5", "r6", "r7", "lr", __L4_ALWAYS_CLOBBER
-    );
-
-    if(old_TimeControl)
-	*old_TimeControl = r_time;
-
-    return r_dest;
-}
-
-typedef L4_ThreadId_t (*__L4_Ipc_t)(L4_ThreadId_t to, L4_ThreadId_t FromSpecifier, L4_Word_t Timeouts);
-extern __L4_Ipc_t __L4_Ipc;
-
-L4_INLINE L4_MsgTag_t L4_Ipc (L4_ThreadId_t to,
-			      L4_ThreadId_t FromSpecifier,
-			      L4_Word_t Timeouts,
-			      L4_ThreadId_t * from)
-{
-    register L4_ThreadId_t r_dest asm ("r0") = to;
-    register L4_ThreadId_t r_from asm ("r1") = FromSpecifier;
-    register L4_Word_t r_timeout  asm ("r2") = Timeouts;
-    register L4_Word_t r_mr0      asm ("r3");
-    register L4_Word_t r_mr1      asm ("r4");
-    register L4_Word_t r_mr2      asm ("r5");
-    register L4_Word_t r_mr3      asm ("r6");
-    register L4_Word_t r_mr4      asm ("r7");
-    register __L4_Ipc_t r_syscall asm ("r12") = __L4_Ipc;
-
-
-    // Only load MRs if send phase is included
-    if (!L4_IsNilThread(to)) {
-        r_mr0 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  0];
-        r_mr1 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  1];
-        r_mr2 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  2];
-        r_mr3 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  3];
-        r_mr4 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  4];
-
-        __asm__ __volatile__ (
-            ""
-        :
-        : "r" (r_mr0), "r" (r_mr1), "r" (r_mr2), "r" (r_mr3), "r" (r_mr4)
-        );
-    }
-
-    __asm__ __volatile (
-        __L4_SYSCALL
-    : "=r" (r_dest),  "=r" (r_mr0), "=r" (r_mr1), "=r" (r_mr2), "=r" (r_mr3),
-      "=r" (r_mr4), "=r" (r_from), "=r" (r_timeout), "=r" (r_syscall)
-    : "r" (r_syscall), "r" (r_dest), "r" (r_from), "r" (r_timeout)
-    : "lr", __L4_ALWAYS_CLOBBER
-    );
-
-    if (!L4_IsNilThread(FromSpecifier)) {
-	*from = r_dest;
-
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  0] = r_mr0;
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  1] = r_mr1;
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  2] = r_mr2;
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  3] = r_mr3;
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  4] = r_mr4;
-    }
-    {
-	    L4_MsgTag_t tag;
-
-	    tag.raw = r_mr0;
-	    return tag;
-    }
-}
-
-typedef L4_ThreadId_t (*__L4_Lipc_t)(L4_ThreadId_t to, L4_ThreadId_t FromSpecifier, L4_Word_t Timeouts);
-extern __L4_Lipc_t __L4_Lipc;
-
-L4_INLINE L4_MsgTag_t L4_Lipc (L4_ThreadId_t to,
-			       L4_ThreadId_t FromSpecifier,
-			       L4_Word_t Timeouts,
-			       L4_ThreadId_t * from)
-{
-    register L4_ThreadId_t r_dest asm ("r0") = to;
-    register L4_ThreadId_t r_from asm ("r1") = FromSpecifier;
-    register L4_Word_t r_timeout  asm ("r2") = Timeouts;
-    register L4_Word_t r_mr0      asm ("r3");
-    register L4_Word_t r_mr1      asm ("r4");
-    register L4_Word_t r_mr2      asm ("r5");
-    register L4_Word_t r_mr3      asm ("r6");
-    register L4_Word_t r_mr4      asm ("r7");
-    register __L4_Ipc_t r_syscall asm ("r12") = __L4_Lipc;
-
-   // Only load MRs if send phase is included
-    if (!L4_IsNilThread(to)) {
-        r_mr0 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  0];
-        r_mr1 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  1];
-        r_mr2 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  2];
-        r_mr3 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  3];
-        r_mr4 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  4];
-
-        __asm__ __volatile__ (
-            ""
-        :
-        : "r" (r_mr0), "r" (r_mr1), "r" (r_mr2), "r" (r_mr3), "r" (r_mr4)
-        );
-    }
-
-    __asm__ __volatile (
-        __L4_SYSCALL
-    : "=r" (r_dest),  "=r" (r_mr0), "=r" (r_mr1), "=r" (r_mr2), "=r" (r_mr3),
-      "=r" (r_mr4), "=r" (r_from), "=r" (r_timeout), "=r" (r_syscall)
-    : "r" (r_syscall), "r" (r_dest), "r" (r_from), "r" (r_timeout)
-    : "lr", __L4_ALWAYS_CLOBBER
-    );
-
-    if (!L4_IsNilThread(FromSpecifier)) {
-        *from = r_dest;
-
-	(__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  0] = r_mr0;
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  1] = r_mr1;
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  2] = r_mr2;
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  3] = r_mr3;
-        (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  4] = r_mr4;
-    }
-    {
-	    L4_MsgTag_t tag;
-
-	    tag.raw = r_mr0;
-	    return tag;
-    }
-}
-
-
-typedef void (*__L4_Unmap_t)(L4_Word_t);
-extern __L4_Unmap_t __L4_Unmap;
-
-L4_INLINE void L4_Unmap (L4_Word_t control)
-{
-    register L4_Word_t r_control    asm ("r0") = control;
-    register L4_Word_t r_mr0        asm ("r3");
-    register L4_Word_t r_mr1        asm ("r4");
-    register L4_Word_t r_mr2        asm ("r5");
-    register L4_Word_t r_mr3        asm ("r6");
-    register L4_Word_t r_mr4        asm ("r7");
-    register __L4_Unmap_t r_syscall asm ("r12") = __L4_Unmap;
-
-    r_mr0 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  0];
-    r_mr1 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  1];
-    r_mr2 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  2];
-    r_mr3 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  3];
-    r_mr4 = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  4];
-
-    __asm__ __volatile (
-        __L4_SYSCALL
-    : "=r" (r_mr0), "=r" (r_mr1), "=r" (r_mr2), "=r" (r_mr3), "=r" (r_mr4),
-      "=r" (r_control), "=r" (r_syscall)
-    : "r" (r_syscall), "r" (r_control), "r" (r_mr0), "r" (r_mr1), "r" (r_mr2), 
-      "r" (r_mr3), "r" (r_mr4)
-    : "r1", "r2", "lr", __L4_ALWAYS_CLOBBER
-    );
-
-    (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  0] = r_mr0;
-    (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  1] = r_mr1;
-    (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  2] = r_mr2;
-    (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  3] = r_mr3;
-    (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  4] = r_mr4;
-}
-
-typedef void (*__L4_SpaceControl_t)(L4_ThreadId_t SpaceSpecifier,
-				     L4_Word_t control,
-				     L4_Fpage_t KernelInterfacePageArea,
-				     L4_Fpage_t UtcbArea,
-				     L4_ThreadId_t redirector);
-extern __L4_SpaceControl_t __L4_SpaceControl;
-
-L4_INLINE L4_Word_t L4_SpaceControl (L4_ThreadId_t SpaceSpecifier,
-				     L4_Word_t control,
-				     L4_Fpage_t KernelInterfacePageArea,
-				     L4_Fpage_t UtcbArea,
-				     L4_ThreadId_t redirector,
-				     L4_Word_t *old_control)
-{
-    register L4_ThreadId_t r_space  asm ("r0") = SpaceSpecifier;
-    register L4_Word_t r_control    asm ("r1") = control;
-    register L4_Fpage_t r_kip_area  asm ("r2") = KernelInterfacePageArea;
-    register L4_Fpage_t r_utcb_area asm ("r3") = UtcbArea;
-    register L4_ThreadId_t r_redir  asm ("r4") = redirector;
-    register __L4_SpaceControl_t r_syscall asm ("r12") = __L4_SpaceControl;
-
-    __asm__ __volatile__ (
-        __L4_SYSCALL
-    : "=r" (r_space), "=r" (r_control), "=r" (r_kip_area), "=r" (r_utcb_area),
-      "=r" (r_redir), "=r" (r_syscall)
-    : "r" (r_syscall), "r" (r_space), "r" (r_control), 
-      "r" (r_kip_area), "r" (r_utcb_area), "r" (r_redir)
-    : "r5", "r6", "r7", "lr", __L4_ALWAYS_CLOBBER
-    );
-
-    if(old_control)
-	*old_control = r_control;
-
-    return r_space.raw;
-}
-
-
-typedef L4_Word_t (*__L4_ProcessorControl_t)(L4_Word_t ProcessorNo,
-					  L4_Word_t InternalFrequency,
-					  L4_Word_t ExternalFrequency,
-					  L4_Word_t voltage);
-extern __L4_ProcessorControl_t __L4_ProcessorControl;
-    
-L4_INLINE L4_Word_t L4_ProcessorControl (L4_Word_t ProcessorNo,
-					 L4_Word_t InternalFrequency,
-					 L4_Word_t ExternalFrequency,
-					 L4_Word_t voltage)
-{
-    return __L4_ProcessorControl(ProcessorNo, InternalFrequency, 
-            ExternalFrequency, voltage);
-}
-
-typedef L4_Word_t (*__L4_MemoryControl_t)(L4_Word_t control,
-				     L4_Word_t attr0, L4_Word_t attr1, L4_Word_t attr2, L4_Word_t attr3);
-extern __L4_MemoryControl_t __L4_MemoryControl;
-
-L4_INLINE L4_Word_t L4_MemoryControl (L4_Word_t control,
-				 const L4_Word_t * attributes)
-{
-    register L4_Word_t r_control asm ("r0") = control;
-    register L4_Word_t r_attrib0 asm ("r1") = attributes[0];
-    register L4_Word_t r_attrib1 asm ("r2") = attributes[1];
-    register L4_Word_t r_attrib2 asm ("r3") = attributes[2];
-    register L4_Word_t r_attrib3 asm ("r4") = attributes[3];
-    register __L4_MemoryControl_t r_syscall asm ("r12") = __L4_MemoryControl;
-
-    __asm__ __volatile__ (
-        __L4_SYSCALL
-    : "=r" (r_control), "=r" (r_attrib0), "=r" (r_attrib1), "=r" (r_attrib2),
-      "=r" (r_attrib3)
-    : "r" (r_syscall), "r" (r_control), "r" (r_attrib0), 
-      "r" (r_attrib1), "r" (r_attrib2), "r" (r_attrib3)
-    : "r5", "r6", "r7", "lr", __L4_ALWAYS_CLOBBER
-    );
-
-    return r_control;
-}
-
-#endif /* !__L4__ARM__SYSCALLS_H__ */
diff --git a/user/include/l4/arm/types.h b/user/include/l4/arm/types.h
deleted file mode 100644
index c9be96c5..00000000
--- a/user/include/l4/arm/types.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *                
- * File path:     l4/arm/types.h
- * Description:   ARM specific type declararions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.7 2006/10/26 12:13:38 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __L4__ARM__TYPES_H__
-#define __L4__ARM__TYPES_H__
-
-#define L4_32BIT
-
-#if defined(ARM_BIG_ENDIAN)
-#define L4_BIG_ENDIAN
-#elif defined(ARM_LITTLE_ENDIAN)
-#define L4_LITTLE_ENDIAN
-#else
-#error No endianness configured
-#endif
-
-typedef unsigned long long      L4_Word64_t;
-typedef unsigned long           L4_Word32_t;
-typedef unsigned short          L4_Word16_t;
-typedef unsigned char           L4_Word8_t;
-
-typedef L4_Word32_t             L4_Word_t;
-
-typedef signed long long        L4_SignedWord64_t;
-typedef signed long             L4_SignedWord32_t;
-typedef signed short            L4_SignedWord16_t;
-typedef signed char             L4_SignedWord8_t;
-
-typedef L4_SignedWord32_t       L4_SignedWord_t;
-
-typedef unsigned int            L4_Size_t;
-
-#endif /* !__L4__ARM__TYPES_H__ */
diff --git a/user/include/l4/arm/vregs.h b/user/include/l4/arm/vregs.h
deleted file mode 100644
index 60c5648c..00000000
--- a/user/include/l4/arm/vregs.h
+++ /dev/null
@@ -1,259 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     l4/arm/vregs.h
- * Description:   ARM virtual register ABI
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: vregs.h,v 1.11 2006/02/23 21:02:29 ud3 Exp $
- *
- ********************************************************************/
-
-#ifndef __L4__ARM__VREGS_H__
-#define __L4__ARM__VREGS_H__
-
-#define L4_TRAP_KPUTC		0xffffffa0
-#define L4_TRAP_KGETC		0xffffffa4
-#define L4_TRAP_KGETC_NB	0xffffffa8
-#define L4_TRAP_KDEBUG		0xffffffac
-#define L4_TRAP_GETUTCB		0xffffffb0
-#define L4_TRAP_KIP		0xffffffb4
-#define L4_TRAP_KSET_THRD_NAME	0xffffffb8
-
-#define USER_UTCB_REF           0xff000000
-
-L4_INLINE L4_Word_t *__L4_ARM_Utcb( void ) __attribute__ ((const));
-L4_INLINE L4_Word_t *__L4_ARM_Utcb( void )
-{
-    return *(L4_Word_t **)(USER_UTCB_REF);
-}
-
-/*
- * Location of TCRs within UTCB.
- */
-
-#define __L4_TCR_BR_OFFSET		        (80)
-#define __L4_TCR_MR_OFFSET		        (16)
-#define __L4_TCR_VIRTUAL_ACTUAL_SENDER		(9)
-#define __L4_TCR_INTENDED_RECEIVER		(8)
-#define __L4_TCR_ERROR_CODE			(7)
-#define __L4_TCR_XFER_TIMEOUT			(6)
-#define __L4_TCR_COP_FLAGS			(5)
-#define __L4_TCR_PREEMPT_FLAGS			(5)
-#define __L4_TCR_EXCEPTION_HANDLER		(4)
-#define __L4_TCR_PAGER				(3)
-#define __L4_TCR_USER_DEFINED_HANDLE		(2)
-#define __L4_TCR_PROCESSOR_NO			(1)
-#define __L4_TCR_MY_GLOBAL_ID			(0)
-
-/*
- * Thread Control Registers.
- */
-
-L4_INLINE L4_Word_t __L4_TCR_MyGlobalId( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_MY_GLOBAL_ID ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_MyLocalId( void )
-{
-    return (L4_Word_t) __L4_ARM_Utcb();
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ProcessorNo( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_PROCESSOR_NO ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_UserDefinedHandle( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_USER_DEFINED_HANDLE ];
-}
-
-L4_INLINE void __L4_TCR_Set_UserDefinedHandle( L4_Word_t w )
-{
-    (__L4_ARM_Utcb())[ __L4_TCR_USER_DEFINED_HANDLE ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_Pager( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_PAGER ];
-}
-
-L4_INLINE void __L4_TCR_Set_Pager( L4_Word_t w )
-{
-    (__L4_ARM_Utcb())[ __L4_TCR_PAGER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ExceptionHandler( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_EXCEPTION_HANDLER ];
-}
-
-L4_INLINE void __L4_TCR_Set_ExceptionHandler( L4_Word_t w )
-{
-    (__L4_ARM_Utcb())[ __L4_TCR_EXCEPTION_HANDLER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ErrorCode( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_ERROR_CODE ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_XferTimeout( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_XFER_TIMEOUT ];
-}
-
-L4_INLINE void __L4_TCR_Set_XferTimeout( L4_Word_t w )
-{
-    (__L4_ARM_Utcb())[ __L4_TCR_XFER_TIMEOUT ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_IntendedReceiver( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_INTENDED_RECEIVER ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ActualSender( void )
-{
-    return (__L4_ARM_Utcb())[ __L4_TCR_VIRTUAL_ACTUAL_SENDER ];
-}
-
-L4_INLINE void __L4_TCR_Set_VirtualSender( L4_Word_t w )
-{
-    (__L4_ARM_Utcb())[ __L4_TCR_VIRTUAL_ACTUAL_SENDER ] = w;
-}
-
-L4_INLINE void L4_Set_CopFlag( L4_Word_t n )
-{
-    (__L4_ARM_Utcb())[ __L4_TCR_COP_FLAGS ] |= (1 << n);
-}
-
-L4_INLINE void L4_Clr_CopFlag( L4_Word_t n )
-{
-    (__L4_ARM_Utcb())[ __L4_TCR_COP_FLAGS ] &= ~(1 << n);
-}
-
-L4_INLINE L4_Bool_t L4_EnablePreemptionFaultException( void )
-{
-    L4_Bool_t old = ((__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] >> 5) & 1;
-    (__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] |= (1 << 5);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemptionFaultException( void )
-{
-    L4_Bool_t old = ((__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] >> 5) & 1;
-    (__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] &= ~(1 << 5);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_EnablePreemption( void )
-{
-    L4_Bool_t old = ((__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] >> 6) & 1;
-    (__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] |= (1 << 6);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemption( void )
-{
-    L4_Bool_t old = ((__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] >> 6) & 1;
-    (__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ] &= ~(1 << 6);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_PreemptionPending( void )
-{
-    L4_Bool_t retval = (((__L4_ARM_Utcb())[ __L4_TCR_PREEMPT_FLAGS ]) >> 7) & 1;
-    return retval;
-}
-
-
-
-/*
- * Message Registers.
- */
-
-L4_INLINE void L4_StoreMR( int i, L4_Word_t * w )
-{
-    *w = (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET +  i ];
-}
-
-L4_INLINE void L4_LoadMR( int i, L4_Word_t w )
-{
-    (__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET + i ] = w;
-}
-
-L4_INLINE void L4_StoreMRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * mr = &(__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET + i];
-
-    while( k-- > 0 ) {
-	*w++ = *mr++;
-    }
-}
-
-L4_INLINE void L4_LoadMRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * mr = &(__L4_ARM_Utcb())[__L4_TCR_MR_OFFSET + i];
-
-    while( k-- > 0 )
-	*mr++ = *w++;
-}
-
-/*
- * Buffer Registers.
- */
-
-L4_INLINE void L4_StoreBR( int i, L4_Word_t * w )
-{
-    *w = (__L4_ARM_Utcb())[__L4_TCR_BR_OFFSET + i ];
-}
-
-L4_INLINE void L4_LoadBR( int i, L4_Word_t w )
-{
-
-    (__L4_ARM_Utcb())[__L4_TCR_BR_OFFSET + i ] = w;
-}
-
-L4_INLINE void L4_StoreBRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * br = &(__L4_ARM_Utcb())[__L4_TCR_BR_OFFSET + i];
-
-    while( k-- > 0 )
-	*w++ = *br++;
-}
-
-L4_INLINE void L4_LoadBRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * br = &(__L4_ARM_Utcb())[__L4_TCR_BR_OFFSET +  i];
-
-    while( k-- > 0 )
-	*br++ = *w++;
-}
-
-
-#endif	/* __L4__ARM__VREGS_H__ */
-
diff --git a/user/include/l4/ia64/arch.h b/user/include/l4/ia64/arch.h
deleted file mode 100644
index 23799733..00000000
--- a/user/include/l4/ia64/arch.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  Karlsruhe University
- *                
- * File path:     l4/ia64/arch.h
- * Description:   Architecture specific functionality
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: arch.h,v 1.2 2003/09/24 19:06:24 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__IA64__ARCH_H__
-#define __L4__IA64__ARCH_H__
-
-
-/*
- * SAL Access
- */
-
-#define __L4_SAL_PCI_CONFIG_READ	(0x01000010)
-#define __L4_SAL_PCI_CONFIG_WRITE	(0x01000011)
-
-L4_INLINE L4_Word_t L4_SAL_PCI_ConfigRead (L4_Word_t address, L4_Word_t size,
-					   L4_Word_t *value)
-{
-    L4_Word_t dummy;
-    return L4_SAL_Call (__L4_SAL_PCI_CONFIG_READ, 
-			address, size, 0, 0, 0, 0,
-			value, &dummy, &dummy);
-}
-
-L4_INLINE L4_Word_t L4_SAL_PCI_ConfigWrite (L4_Word_t address, L4_Word_t size,
-					    L4_Word_t value)
-{
-    L4_Word_t dummy;
-    return L4_SAL_Call (__L4_SAL_PCI_CONFIG_WRITE,
-			address, size, value, 0, 0, 0,
-			&dummy, &dummy, &dummy);
-}
-
-
-#endif /* !__L4__IA64__ARCH_H__ */
diff --git a/user/include/l4/ia64/kdebug.h b/user/include/l4/ia64/kdebug.h
deleted file mode 100644
index e81f3cc2..00000000
--- a/user/include/l4/ia64/kdebug.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     l4/ia64/kdebug.h
- * Description:   IA64 kernel debugger interface
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: kdebug.h,v 1.9 2004/03/17 18:34:24 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__IA64__KDEBUG_H__
-#define __L4__IA64__KDEBUG_H__
-
-#include <l4/types.h>
-
-#define L4_KDB_Enter(s)						\
-do {								\
-    __asm__ __volatile__ (					\
-	"{ .mlx					\n"		\
-	"	break.m	0x3			\n"		\
-	"	movl	r0 = 1f ;;		\n"		\
-	"}					\n"		\
-	"					\n"		\
-	"	.rodata				\n"		\
-	"1:	stringz " #s "			\n"		\
-	"	.previous			\n"		\
-	:							\
-	:							\
-	:							\
-	"memory");						\
-} while (0)
-
-
-L4_INLINE void L4_KDB_ClearPage (void)
-{
-}
-
-L4_INLINE void L4_KDB_PrintChar (char c)
-{
-    register char r14 asm ("r14") = c;
-
-    asm volatile (
-	"{ .mlx					\n"
-	"	break.m	0x1			\n"
-	"	movl	r0 = 0 ;;		\n"
-	"}					\n"
-	:
-	:
-	"r" (r14));
-}
-
-L4_INLINE void L4_KDB_PrinString (const char * s)
-{
-}
-
-L4_INLINE char L4_KDB_ReadChar (void)
-{
-    register char r14 asm ("r14");
-
-    asm volatile (
-	"{ .mlx					\n"
-	"	break.m	0x4			\n"
-	"	movl	r0 = 0 ;;		\n"
-	"}					\n"
-	:							       
-	"=r" (r14));
-
-    return r14;
-}
-
-L4_INLINE char L4_KDB_ReadChar_Blocked (void)
-{
-    register char r14 asm ("r14");
-
-    asm volatile (
-	"{ .mlx					\n"
-	"	break.m	0x2			\n"
-	"	movl	r0 = 0 ;;		\n"
-	"}					\n"
-	:							       
-	"=r" (r14));
-
-    return r14;
-}
-
-#endif /* !__L4__IA64__KDEBUG_H__ */
diff --git a/user/include/l4/ia64/runconv.h b/user/include/l4/ia64/runconv.h
deleted file mode 100644
index a31e56e0..00000000
--- a/user/include/l4/ia64/runconv.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     l4/ia64/runconv.h
- * Description:   IA-64 runtime convention definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: runconv.h,v 1.7 2004/04/15 14:20:38 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__IA64__RUNCONV_H__
-#define __L4__IA64__RUNCONV_H__
-
-#define __L4_MOST_CALLER_SAVED_GENERAL_REGS 				\
-    "r2",  "r3", "r21", "r22",						\
-    "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",	\
-    "out0",  "out1",  "out2",  "out3",  "out4",				\
-    "out5",  "out6",  "out7"
-
-#define __L4_SOME_CALLER_SAVED_GENERAL_REGS 				\
-    "r2",  "r3", "r21", "r22",						\
-    "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
-
-#define __L4_CALLER_SAVED_GENERAL_REGS 					\
-    "r2",  "r3",							\
-    "r8",  "r9",  "r10", "r11",						\
-    "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21", "r22",	\
-    "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",	\
-    "out0",  "out1",  "out2",  "out3",  "out4",				\
-    "out5",  "out6",  "out7"
-
-#define __L4_CALLER_SAVED_FP_REGS					  \
-    "f6",  "f7",  "f8",  "f9",  "f11", "f12", "f13", "f14", "f15",	  \
-    "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",		  \
-    "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \
-    "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \
-    "f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \
-    "f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \
-    "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \
-    "f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \
-    "f100", "f101", "f102", "f103", "f104",				  \
-    "f105", "f106", "f107", "f108", "f109",				  \
-    "f110", "f111", "f112", "f113", "f114",				  \
-    "f115", "f116", "f117", "f118", "f119",				  \
-    "f120", "f121", "f122", "f123", "f124",				  \
-    "f125", "f126", "f127"
-
-#define __L4_CALLER_SAVED_PREDICATE_REGS \
-    "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15"
-
-#define __L4_CALLER_SAVED_BRANCH_REGS \
-    "b0", "b6", "b7"
-
-#define __L4_CALLER_SAVED_REGS						\
-    __L4_CALLER_SAVED_GENERAL_REGS, __L4_CALLER_SAVED_FP_REGS,		\
-    __L4_CALLER_SAVED_PREDICATE_REGS, __L4_CALLER_SAVED_BRANCH_REGS,	\
-    "ar.pfs"
-
-#define __L4_CLOBBER_CALLER_REGS(regs...)				\
-    __L4_MOST_CALLER_SAVED_GENERAL_REGS, __L4_CALLER_SAVED_FP_REGS,	\
-    __L4_CALLER_SAVED_PREDICATE_REGS, __L4_CALLER_SAVED_BRANCH_REGS,	\
-    "ar.pfs" , ## regs
-
-#define __L4_CLOBBER_CALLER_REGS_NOOUT(regs...)				\
-    __L4_SOME_CALLER_SAVED_GENERAL_REGS, __L4_CALLER_SAVED_FP_REGS,	\
-    __L4_CALLER_SAVED_PREDICATE_REGS, __L4_CALLER_SAVED_BRANCH_REGS,	\
-    "ar.pfs" , ## regs
-
-#define __L4_CALLEE_SAVED_GENERAL_REGS \
-    "r4", "r5", "r6", "r7"
-
-#define __L4_CALLEE_SAVED_FP_REGS				\
-    "f2", "f3", "f4", "f5",					\
-    "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",	\
-    "f23", "f24", "f25", "f26", "f27", "f29", "f30", "f31"
-
-#define __L4_CALLEE_SAVED_PREDICATE_REGS				  \
-    "p16", "p17", "p18", "p19", 					  \
-    "p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \
-    "p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \
-    "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \
-    "p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \
-    "p60", "p61", "p62", "p63"
-
-#define __L4_CALLEE_SAVED_BRANCH_REGS \
-    "b1", "b2", "b3", "b4", "b5"
-
-#define __L4_CALLEE_SAVED_REGS						\
-    __L4_CALLEE_SAVED_GENERAL_REGS, __L4_CALLEE_SAVED_FP_REGS,		\
-    __L4_CALLEE_SAVED_PREDICATE_REGS, __L4_CALLEE_SAVED_BRANCH_REGS
-
-
-#endif /* !__L4__IA64__RUNCONV_H__ */
diff --git a/user/include/l4/ia64/specials.h b/user/include/l4/ia64/specials.h
deleted file mode 100644
index c9356f42..00000000
--- a/user/include/l4/ia64/specials.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     l4/ia64/specials.h
- * Description:   ia64 specific functions and defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: specials.h,v 1.7 2003/09/24 19:06:24 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__IA64__SPECIALS_H__
-#define __L4__IA64__SPECIALS_H__
-
-
-/*
- * Architecture specific helper functions.
- */
-
-L4_INLINE int __L4_Msb (L4_Word_t w) __attribute__ ((const));
-
-L4_INLINE int __L4_Msb (L4_Word_t w)
-{
-    int bitnum;
-
-    if (w == 0)
-	return 64;
-
-    for (bitnum = 0, w >>= 1; w != 0; bitnum++)
-	w >>= 1;
-
-    return bitnum;
-}
-
-
-
-
-/*
- * Cacheability hints for string items.
- */
-
-#define L4_CacheNonTemporalL1		(L4_CacheAllocationHint_t) { raw: 1 })
-#define L4_CacheNonTemporalL2		(L4_CacheAllocationHint_t) { raw: 2 })
-#define L4_CacheNonTemporalAllLevels	(L4_CacheAllocationHint_t) { raw: 3 })
-
-
-
-
-/*
- * Memory attributes for MemoryControl system call.
- */
-
-#define L4_WriteBackMemory		1
-#define L4_WriteCoalescingMemory	7
-#define L4_UncacheableMemory		5
-#define L4_UncacheableExportedMemory	6
-#define L4_NaTPageMemory		8
-
-
-
-
-/*
- * Architecture specific memory descriptor types.
- */
-
-#define L4_ACPIMemoryType		(0x1f)
-
-
-
-
-/*
- * PCI config fpages
- */
-
-typedef union {
-    L4_Word_t	raw;
-    struct {
-	L4_Word_t	rwx:4;
-	L4_Word_t	__two:6;
-	L4_Word_t	s:6;
-	L4_Word_t	p:48;
-    } X;
-} L4_PCIConfigFpage_t;
-
-L4_INLINE L4_Fpage_t L4_PCIConfigFpage (L4_Word_t BaseAddress, int FpageSize)
-{
-    L4_PCIConfigFpage_t fp;
-    L4_Fpage_t ret;
-    L4_Word_t msb = __L4_Msb (FpageSize);
-
-    fp.X.p = BaseAddress;
-    fp.X.__two = 2;
-    fp.X.s = (1UL << msb) < (L4_Word_t) FpageSize ? msb + 1 : msb;
-    fp.X.rwx = L4_NoAccess;
-
-    ret.raw = fp.raw;
-    return ret;
-}
-
-L4_INLINE L4_Fpage_t L4_PCIConfigFpageLog2 (L4_Word_t BaseAddress,
-					    int FpageSize)
-{
-    L4_PCIConfigFpage_t fp;
-    L4_Fpage_t ret;
-
-    fp.X.p = BaseAddress;
-    fp.X.__two = 2;
-    fp.X.s = FpageSize;
-    fp.X.rwx = L4_NoAccess;
-
-    ret.raw = fp.raw;
-    return ret;
-}
-
-
-
-
-#endif /* !__L4__IA64__SPECIALS_H__ */
diff --git a/user/include/l4/ia64/syscalls.h b/user/include/l4/ia64/syscalls.h
deleted file mode 100644
index cd79cd23..00000000
--- a/user/include/l4/ia64/syscalls.h
+++ /dev/null
@@ -1,660 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     l4/ia64/syscalls.h
- * Description:   IA64 system call ABI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.36 2004/08/23 18:43:12 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__IA64__SYSCALLS_H__
-#define __L4__IA64__SYSCALLS_H__
-
-#include __L4_INC_ARCH(vregs.h)
-#include __L4_INC_ARCH(runconv.h)
-#include __L4_INC_ARCH(specials.h)
-#include <l4/message.h>
-
-#include <l4/kdebug.h>
-
-#define __L4_ASM_ENTER_KDEBUG(str)				\
-	"{.mlx						\n"	\
-	"	break.m	0x3				\n"	\
-	"	movl r0 = 9f ;;				\n"	\
-	"}						\n"	\
-	"	.rodata					\n"	\
-	"9:	stringz " #str "			\n"	\
-	"	.previous				\n"
-
-#define __L4_ASM_CALL(func)					\
-	"	add	r31 = -40, sp			\n"	\
-	"	add	r30 = -32, sp			\n"	\
-	"	add	sp  = -40, sp			\n"	\
-	"	mov	r29 = ar.unat			\n"	\
-	"	mov	r28 = rp			\n"	\
-	"	mov	r27 = ar.pfs			\n"	\
-	"	mov	r26 = ar.fpsr			\n"	\
-	"	;;					\n"	\
-	"	st8	[r31] = r29, 16			\n"	\
-	"	st8	[r30] = r28, 16			\n"	\
-	"	;;					\n"	\
-	"	st8	[r31] = r27			\n"	\
-	"	st8	[r30] = r26			\n"	\
-	"						\n"	\
-	"	br.call.sptk.few rp = " #func "		\n"	\
-	"						\n"	\
-	"      	mov	r31 = sp			\n"	\
-	"	add	r30 = 8, sp			\n"	\
-	"	;;					\n"	\
-	"	ld8	r29 = [r31], 16			\n"	\
-	"	ld8	r28 = [r30], 16			\n"	\
-	"	;;					\n"	\
-	"	ld8	r27 = [r31]			\n"	\
-	"	ld8	r26 = [r30]			\n"	\
-	"	;;					\n"	\
-	"	mov	ar.unat = r29			\n"	\
-	"	mov	rp = r28			\n"	\
-	"	mov	ar.pfs = r27			\n"	\
-	"	mov	ar.fpsr = r26			\n"	\
-	"	add	sp = 40, sp			\n"	\
-	"	;;					\n"
-
-
-L4_INLINE void * L4_KernelInterface (L4_Word_t *ApiVersion,
-				     L4_Word_t *ApiFlags,
-				     L4_Word_t *KernelId)
-{
-    register void * base_address	asm ("r8");
-    register L4_Word_t api_version	asm ("r9");
-    register L4_Word_t api_flags	asm ("r10");
-    register L4_Word_t kernel_id	asm ("r11");
-
-    __asm__ __volatile__ (
-	"/* L4_KernelInterface() */ 			\n"
-	"{ .mlx						\n"
-	"	break.m	0x1face				\n"
-	"	movl	r0 = 0x0 ;;			\n"
-	"}						\n"
-	: /* outputs */
-	"=r" (base_address),
-	"=r" (api_version),
-	"=r" (api_flags),
-	"=r" (kernel_id));
-
-    *ApiVersion = api_version;
-    *ApiFlags = api_flags;
-    *KernelId = kernel_id;
-
-    return base_address;
-}
-
-
-L4_INLINE L4_ThreadId_t L4_ExchangeRegisters (L4_ThreadId_t dest,
-					      L4_Word_t control,
-					      L4_Word_t sp,
-					      L4_Word_t ip,
-					      L4_Word_t flags,
-					      L4_Word_t UserDefHandle,
-					      L4_ThreadId_t pager,
-					      L4_Word_t *old_control,
-					      L4_Word_t *old_sp,
-					      L4_Word_t *old_ip,
-					      L4_Word_t *old_flags,
-					      L4_Word_t *old_UserDefHandle,
-					      L4_ThreadId_t *old_pager)
-{
-    register L4_ThreadId_t r_dest	asm ("r14") = dest;
-    register L4_Word_t r_control	asm ("r15") = control;
-    register L4_Word_t r_sp		asm ("r16") = sp;
-    register L4_Word_t r_ip		asm ("r17") = ip;
-    register L4_Word_t r_flags		asm ("r18") = flags;
-    register L4_Word_t r_userhandle	asm ("r19") = UserDefHandle;
-    register L4_ThreadId_t r_pager	asm ("r20") = pager;
-
-    __asm__ __volatile__ (
-	"/* L4_ExchangeRegisters() */				\n"
-	__L4_ASM_CALL(__L4_ExchangeRegisters)
-
-	: /* outputs */
-	"+r" (r_dest),
-	"+r" (r_control),
-	"+r" (r_sp),
-	"+r" (r_ip),
-	"+r" (r_flags),
-	"+r" (r_userhandle),
-	"+r" (r_pager)
-
-	: /* inputs (same as outputs) */
-
-	: /* clobbers */
-	__L4_CLOBBER_CALLER_REGS ("r8","r9","r10","r11"));
-
-    *old_control = r_control;
-    *old_sp = r_sp;
-    *old_ip = r_ip;
-    *old_flags = r_flags;
-    *old_UserDefHandle = r_userhandle;
-    *old_pager = r_pager;
-
-    return r_dest;
-}
-
-
-L4_INLINE L4_Word_t L4_ThreadControl (L4_ThreadId_t dest,
-				      L4_ThreadId_t SpaceSpecifier,
-				      L4_ThreadId_t Scheduler,
-				      L4_ThreadId_t Pager,
-				      void * UtcbLocation)
-{
-    register L4_Word_t result 			asm ("r8");
-    register L4_ThreadId_t r_dest		asm ("r14") = dest;
-    register L4_ThreadId_t r_SpaceSpecifier	asm ("r15") = SpaceSpecifier;
-    register L4_ThreadId_t r_Scheduler		asm ("r16") = Scheduler;
-    register L4_ThreadId_t r_Pager		asm ("r17") = Pager;
-    register void * r_UtcbLocation		asm ("r18") = UtcbLocation;
-
-    __asm__ __volatile__ (
-	"/* L4_ThreadControl() */				\n"
-	__L4_ASM_CALL(__L4_ThreadControl)
-
-	: /* outputs */
-	"=r" (result),
-
-	/* inputs (clobbered on output) */ 
-	"+r" (r_dest),
-	"+r" (r_SpaceSpecifier),
-	"+r" (r_Scheduler),
-	"+r" (r_Pager),
-	"+r" (r_UtcbLocation)
-
-	: /* no unclobbered inputs */
-
-	: /* clobbers */
-	__L4_CLOBBER_CALLER_REGS ("r9","r10","r11","r19","r20"));
-
-    return result;
-}
-
-
-L4_INLINE L4_Clock_t L4_SystemClock (void)
-{
-    register L4_Clock_t clock			asm ("r8");
-
-    __asm__ __volatile__ (
-	"/* L4_SystemClock() */\n"
-	__L4_ASM_CALL(__L4_SystemClock)
-
-	: /* outputs */
-	"=r" (clock.raw)
-
-	: /* no inputs */
-
-	: /* clobbers */
-	__L4_CLOBBER_CALLER_REGS ("r9","r10","r11",
-				  "r14","r15","r16","r17","r18","r19","r20"));
-
-    return clock;
-}
-
-
-L4_INLINE void L4_ThreadSwitch (L4_ThreadId_t dest)
-{
-    register L4_ThreadId_t r_dest		asm ("r14") = dest;
-
-    __asm__ __volatile__ (
-	"/* L4_ThreadSwitch() */\n"
-	__L4_ASM_CALL(__L4_ThreadSwitch)
-
-	: /* no outputs */
-
-	/* inputs (clobbered on output) */ 
-	"+r" (r_dest)
-
-	: /* no unclobbered inputs */
-
-	: /* clobbers */
-	__L4_CLOBBER_CALLER_REGS ("r8","r9","r10","r11",
-				  "r15","r16","r17","r18","r19","r20"));
-}
-
-
-L4_INLINE L4_Word_t  L4_Schedule (L4_ThreadId_t dest,
-				  L4_Word_t TimeCtrl,
-				  L4_Word_t ProcessorCtrl,
-				  L4_Word_t prio,
-				  L4_Word_t PreemptionCtrl,
-				  L4_Word_t * old_TimeCtrl)
-{
-    register L4_Word_t result 			asm ("r8");
-    register L4_Word_t ret_TimeCtrl		asm ("r9");
-    register L4_ThreadId_t r_dest		asm ("r14") = dest;
-    register L4_Word_t r_TimeCtrl		asm ("r15") = TimeCtrl;
-    register L4_Word_t r_ProcessorCtrl		asm ("r16") = ProcessorCtrl;
-    register L4_Word_t r_prio			asm ("r17") = prio;
-    register L4_Word_t r_PreemptionCtrl		asm ("r18") = PreemptionCtrl;
-
-    __asm__ __volatile__ (
-	"/* L4_Schedule() */					\n"
-	__L4_ASM_CALL(__L4_Schedule)
-
-	: /* outputs */
-	"=r" (result),
-	"=r" (ret_TimeCtrl),
-
-	/* inputs (clobbered on output) */ 
-	"+r" (r_dest),
-	"+r" (r_TimeCtrl),
-	"+r" (r_ProcessorCtrl),
-	"+r" (r_prio),
-	"+r" (r_PreemptionCtrl)
-
-	: /* no unclobbered inputs */
-
-	: /* clobbers */
-	__L4_CLOBBER_CALLER_REGS ("r10","r11","r19","r20"));
-
-    *old_TimeCtrl = ret_TimeCtrl;
-
-    return result;
-}
-
-
-L4_INLINE L4_MsgTag_t L4_Ipc (L4_ThreadId_t to,
-			      L4_ThreadId_t FromSpecifier,
-			      L4_Word_t Timeouts,
-			      L4_ThreadId_t * from)
-{
-    register L4_ThreadId_t r_to			asm ("r14") = to;
-    register L4_ThreadId_t r_FromSpecifier	asm ("r15") = FromSpecifier;
-    register L4_Word_t r_Timeouts		asm ("r16") = Timeouts;
-    register L4_ThreadId_t ret_from		asm ("r9");
-    L4_Word_t * mrs = __L4_IA64_Utcb () + __L4_TCB_MR_OFFSET;
-
-    register L4_Word_t mr0 asm ("out0");
-    register L4_Word_t mr1 asm ("out1");
-    register L4_Word_t mr2 asm ("out2");
-    register L4_Word_t mr3 asm ("out3");
-    register L4_Word_t mr4 asm ("out4");
-    register L4_Word_t mr5 asm ("out5");
-    register L4_Word_t mr6 asm ("out6");
-    register L4_Word_t mr7 asm ("out7");
-    L4_MsgTag_t tag;
-
-    L4_Word_t ar_lc, ar_ec;
-    __asm__ __volatile__ ("	;;			\n"
-			  "	mov	%0 = ar.lc	\n"
-			  "	mov	%1 = ar.ec	\n"
-			  :
-			  "=r" (ar_lc), "=r" (ar_ec));
-
-    // Only load MRs if send phase is included
-    if (! L4_IsNilThread (to))
-    {
-	r_to = to;
-	r_FromSpecifier = FromSpecifier;
-	r_Timeouts = Timeouts;
-
-	mr0 = mrs[0];
-	mr1 = mrs[1];
-	mr2 = mrs[2];
-	mr3 = mrs[3];
-	mr4 = mrs[4];
-	mr5 = mrs[5];
-	mr6 = mrs[6];
-	mr7 = mrs[7];
-
-	__asm__ __volatile__ (
-	    "/* L4_Ipc() */\n"
-	    __L4_ASM_CALL (__L4_Ipc)
-
-	    : /* outputs */
-	    "=r" (mr0), "=r" (mr1), "=r" (mr2), "=r" (mr3),
-	    "=r" (mr4), "=r" (mr5), "=r" (mr6), "=r" (mr7),
-	    "=r" (ret_from),
-
-	    /* inputs (clobbered on output) */ 
-	    "+r" (r_to), "+r" (r_FromSpecifier), "+r" (r_Timeouts)
-
-	    : /* inputs */
-	    "0" (mr0), "1" (mr1), "2" (mr2), "3" (mr3),
-	    "4" (mr4), "5" (mr5), "6" (mr6), "7" (mr7)
-
-	    : /* clobbers */
-	    "r2",  "r3", "r8", "r10", "r11",
-	    "r17", "r18", "r19", "r20", "r21", "r22",
-	    "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
-	    __L4_CALLER_SAVED_FP_REGS, __L4_CALLER_SAVED_PREDICATE_REGS,
-	    __L4_CALLER_SAVED_BRANCH_REGS, __L4_CALLEE_SAVED_REGS);
-    }
-    else
-    {
-	r_to = to;
-	r_FromSpecifier = FromSpecifier;
-	r_Timeouts = Timeouts;
-
-	__asm__ __volatile__ (
-	    "/* L4_Ipc() */\n"
-	    __L4_ASM_CALL (__L4_Ipc)
- 
-	    : /* outputs */
-	    "=r" (mr0), "=r" (mr1), "=r" (mr2), "=r" (mr3),
-	    "=r" (mr4), "=r" (mr5), "=r" (mr6), "=r" (mr7),
-	    "=r" (ret_from),
-
-	    /* inputs (clobbered on output) */ 
-	    "+r" (r_to), "+r" (r_FromSpecifier), "+r" (r_Timeouts)
-
-	    : /* no unclobbered inputs */
-
-	    : /* clobbers */
-	    "r2",  "r3", "r8", "r10", "r11",
-	    "r17", "r18", "r19", "r20", "r21", "r22",
-	    "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
-	    __L4_CALLER_SAVED_FP_REGS, __L4_CALLER_SAVED_PREDICATE_REGS,
-	    __L4_CALLER_SAVED_BRANCH_REGS, __L4_CALLEE_SAVED_REGS);
-    }
-
-    // Set sender id and store received MRs
-    if (! L4_IsNilThread (FromSpecifier))
-    {
-	*from = ret_from;
-
-	mrs[1] = mr1;
-	mrs[2] = mr2;
-	mrs[3] = mr3;
-	mrs[4] = mr4;
-	mrs[5] = mr5;
-	mrs[6] = mr6;
-	mrs[7] = mr7;
-    }
-
-    __asm__ __volatile__ ("	mov	ar.lc = %0	\n"
-			  "	mov	ar.ec = %1	\n"
-			  :
-			  :
-			  "r" (ar_lc), "r" (ar_ec));
-
-    tag.raw = mr0;
-    return tag;
-}
-
-
-L4_INLINE L4_MsgTag_t L4_Lipc (L4_ThreadId_t to,
-			       L4_ThreadId_t FromSpecifier,
-			       L4_Word_t Timeouts,
-			       L4_ThreadId_t * from)
-{
-    return L4_Ipc (to, FromSpecifier, Timeouts, from);
-}
-
-
-L4_INLINE void L4_Unmap (L4_Word_t control)
-{
-    register L4_Word_t r_control	asm ("r14") = control;
-    register L4_Word_t mr0 		asm ("out0");
-    register L4_Word_t mr1 		asm ("out1");
-    register L4_Word_t mr2 		asm ("out2");
-    register L4_Word_t mr3 		asm ("out3");
-    register L4_Word_t mr4 		asm ("out4");
-    register L4_Word_t mr5 		asm ("out5");
-    register L4_Word_t mr6 		asm ("out6");
-    register L4_Word_t mr7 		asm ("out7");
-
-    L4_Word_t * mrs = __L4_IA64_Utcb () + __L4_TCB_MR_OFFSET;
-
-    mr0 = mrs[0];
-    mr1 = mrs[1];
-    mr2 = mrs[2];
-    mr3 = mrs[3];
-    mr4 = mrs[4];
-    mr5 = mrs[5];
-    mr6 = mrs[6];
-    mr7 = mrs[7];
-
-    __asm__ __volatile__ (
-	"/* L4_Unmap() */\n"
-	__L4_ASM_CALL(__L4_Unmap)
-	: /* outputs */
-	"=r" (mr0), "=r" (mr1), "=r" (mr2), "=r" (mr3),
-	"=r" (mr4), "=r" (mr5), "=r" (mr6), "=r" (mr7),
-
-	/* inputs (clobbered on output) */ 
-	"+r" (r_control)
-
-	: /* inputs */
-	"0" (mr0), "1" (mr1), "2" (mr2), "3" (mr3),
-	"4" (mr4), "5" (mr5), "6" (mr6), "7" (mr7)
-
-	: /* clobbers */
-	__L4_CLOBBER_CALLER_REGS_NOOUT ("r8", "r9", "r10", "r11",
-					"r15", "r16", "r17", "r18",
-					"r19", "r20"));
-
-    mrs[0] = mr0;
-    mrs[1] = mr1;
-    mrs[2] = mr2;
-    mrs[3] = mr3;
-    mrs[4] = mr4;
-    mrs[5] = mr5;
-    mrs[6] = mr6;
-    mrs[7] = mr7;
-}
-
-
-L4_INLINE L4_Word_t L4_SpaceControl (L4_ThreadId_t SpaceSpecifier,
-				     L4_Word_t control,
-				     L4_Fpage_t KernelInterfacePageArea,
-				     L4_Fpage_t UtcbArea,
-				     L4_ThreadId_t redirector,
-				     L4_Word_t *old_control)
-{
-    register L4_Word_t result		asm ("r8");
-    register L4_Word_t ret_control	asm ("r9");
-    register L4_ThreadId_t r_space	asm ("r14") = SpaceSpecifier;
-    register L4_Word_t r_control	asm ("r15") = control;
-    register L4_Fpage_t r_kiparea	asm ("r16") = KernelInterfacePageArea;
-    register L4_Fpage_t r_utcbarea	asm ("r17") = UtcbArea;
-    register L4_ThreadId_t r_redirector	asm ("r18") = redirector;
-
-    __asm__ __volatile__ (
-	"/* L4_SpaceControl() */				\n"
-	__L4_ASM_CALL(__L4_SpaceControl)
-
-	: /* outputs */
-	"=r" (result),
-	"=r" (ret_control),
-
-	/* inputs (clobbered on output) */ 
-	"+r" (r_space),
-	"+r" (r_control),
-	"+r" (r_kiparea),
-	"+r" (r_utcbarea),
-	"+r" (r_redirector)
-
-	: /* no unclobbered inputs */
-	
-	: /* clobbers */
-	__L4_CLOBBER_CALLER_REGS ("r10","r11","r19","r20"));
-
-    *old_control = ret_control;
-
-    return result;
-}
-
-
-L4_INLINE L4_Word_t L4_ProcessorControl (L4_Word_t ProcessorNo,
-					 L4_Word_t InternalFrequency,
-					 L4_Word_t ExternalFrequency,
-					 L4_Word_t voltage)
-{
-    L4_KDB_Enter ("ProcessorControl");
-    return 0;
-}
-
-
-L4_INLINE L4_Word_t L4_MemoryControl (L4_Word_t control,
-				      const L4_Word_t * attributes)
-{
-    register L4_Word_t result		asm ("r8");
-    register L4_Word_t r_ctrl		asm ("r14") = control;
-    register L4_Word_t r_att0		asm ("r15") = attributes[0];
-    register L4_Word_t r_att1		asm ("r16") = attributes[1];
-    register L4_Word_t r_att2		asm ("r17") = attributes[2];
-    register L4_Word_t r_att3		asm ("r18") = attributes[3];
-    register L4_Word_t mr0 		asm ("out0");
-    register L4_Word_t mr1 		asm ("out1");
-    register L4_Word_t mr2 		asm ("out2");
-    register L4_Word_t mr3 		asm ("out3");
-    register L4_Word_t mr4 		asm ("out4");
-    register L4_Word_t mr5 		asm ("out5");
-    register L4_Word_t mr6 		asm ("out6");
-    register L4_Word_t mr7 		asm ("out7");
-
-    L4_Word_t * mrs = __L4_IA64_Utcb () + __L4_TCB_MR_OFFSET;
-
-    mr0 = mrs[0];
-    mr1 = mrs[1];
-    mr2 = mrs[2];
-    mr3 = mrs[3];
-    mr4 = mrs[4];
-    mr5 = mrs[5];
-    mr6 = mrs[6];
-    mr7 = mrs[7];
-
-    __asm__ __volatile__ (
-	"/* L4_MemoryControl */				\n"
-	__L4_ASM_CALL(__L4_MemoryControl)
-
-	: /* outputs */
-	"=r" (result),
-
-	"+r" (mr0), "+r" (mr1), "+r" (mr2), "+r" (mr3),
-	"+r" (mr4), "+r" (mr5), "+r" (mr6), "+r" (mr7),
-
-	/* inputs (clobbered on output) */ 
-	"+r" (r_ctrl),
-	"+r" (r_att0),
-	"+r" (r_att1),
-	"+r" (r_att2),
-	"+r" (r_att3)
-	:
-	:
-	__L4_CLOBBER_CALLER_REGS_NOOUT ("r9", "r10", "r11", "r19","r20"));
-
-    return result;
-}
-
-
-L4_INLINE L4_Word_t L4_PAL_Call (L4_Word_t idx,
-				 L4_Word_t a1, L4_Word_t a2, L4_Word_t a3,
-				 L4_Word_t *r1, L4_Word_t *r2, L4_Word_t *r3)
-{
-    register L4_Word_t status		asm ("r8");
-    register L4_Word_t ret1		asm ("r9");
-    register L4_Word_t ret2		asm ("r10");
-    register L4_Word_t ret3		asm ("r11");
-    register L4_Word_t out0		asm ("r28") = idx;
-    register L4_Word_t out1		asm ("r29") = a1;
-    register L4_Word_t out2		asm ("r30") = a2;
-    register L4_Word_t out3		asm ("r31") = a3;
-
-    __asm__ __volatile__ (
-	"/* L4_PAL_Call */				\n"
-	__L4_ASM_CALL(__L4_PAL_Call)
-	:
-	"=r" (status),
-	"=r" (ret1),
-	"=r" (ret2),
-	"=r" (ret3),
-
-	/* inputs (clobbered on output) */ 
-	"+r" (out0),
-	"+r" (out1),
-	"+r" (out2),
-	"+r" (out3)
-	:
-	:
-	"r2",  "r3", "r14", "r15", "r16", "r17", "r18", "r19",
-	"r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27",
-	"out4",	"out5", "out6", "out7",
-	__L4_CALLER_SAVED_FP_REGS, __L4_CALLER_SAVED_PREDICATE_REGS,
-	__L4_CALLER_SAVED_BRANCH_REGS, "ar.pfs");
-
-    *r1 = ret1;
-    *r2 = ret2;
-    *r3 = ret3;
-
-    return status;
-}
-
-
-L4_INLINE L4_Word_t L4_SAL_Call (L4_Word_t idx,
-				 L4_Word_t a1, L4_Word_t a2, L4_Word_t a3,
-				 L4_Word_t a4, L4_Word_t a5, L4_Word_t a6,
-				 L4_Word_t *r1, L4_Word_t *r2, L4_Word_t *r3)
-{
-    register L4_Word_t status		asm ("r8");
-    register L4_Word_t ret1		asm ("r9");
-    register L4_Word_t ret2		asm ("r10");
-    register L4_Word_t ret3		asm ("r11");
-    register L4_Word_t out0		asm ("out0") = idx;
-    register L4_Word_t out1		asm ("out1") = a1;
-    register L4_Word_t out2		asm ("out2") = a2;
-    register L4_Word_t out3		asm ("out3") = a3;
-    register L4_Word_t out4		asm ("out4") = a4;
-    register L4_Word_t out5		asm ("out5") = a5;
-    register L4_Word_t out6		asm ("out6") = a6;
-
-    __asm__ __volatile__ (
-	"/* L4_SAL_Call */				\n"
-	__L4_ASM_CALL(__L4_SAL_Call)
-	:
-	"=r" (status),
-	"=r" (ret1),
-	"=r" (ret2),
-	"=r" (ret3),
-
-	/* inputs (clobbered on output) */ 
-	"+r" (out0),
-	"+r" (out1),
-	"+r" (out2),
-	"+r" (out3),
-	"+r" (out4),
-	"+r" (out5),
-	"+r" (out6)
-	:
-	:
-	__L4_CLOBBER_CALLER_REGS_NOOUT ("r14", "r15", "r16", "r17", 
-					"r18", "r19", "r20", "out7"));
-
-    *r1 = ret1;
-    *r2 = ret2;
-    *r3 = ret3;
-
-    return status;
-}
-
-
-#endif /* !__L4__IA64__SYSCALLS_H__ */
diff --git a/user/include/l4/ia64/types.h b/user/include/l4/ia64/types.h
deleted file mode 100644
index 3d9c7646..00000000
--- a/user/include/l4/ia64/types.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     l4/ia64/types.h
- * Description:   IA-64 specific type declararions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.8 2006/10/26 12:15:03 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __L4__IA64__TYPES_H__
-#define __L4__IA64__TYPES_H__
-
-#define L4_64BIT
-#define L4_LITTLE_ENDIAN
-
-typedef unsigned long		L4_Word64_t;
-typedef unsigned int		L4_Word32_t;
-typedef unsigned short		L4_Word16_t;
-typedef unsigned char		L4_Word8_t;
-
-typedef L4_Word64_t		L4_Word_t;
-
-typedef signed long		L4_SignedWord64_t;
-typedef signed int		L4_SignedWord32_t;
-typedef signed short		L4_SignedWord16_t;
-typedef signed char		L4_SignedWord8_t;
-
-typedef L4_SignedWord64_t	L4_SignedWord_t;
-
-typedef long unsigned int	L4_Size_t;
-
-#if 0
-typedef unsigned long		L4_Uint64;
-typedef unsigned int		L4_Uint32;
-typedef unsigned short		L4_Uint16;
-typedef unsigned char		L4_Uint8;
-
-typedef int long		L4_Int64;
-typedef int			L4_Int32;
-typedef short			L4_Int16;
-typedef char			L4_Int8;
-#endif
-
-#endif /* !__L4__IA64__TYPES_H__ */
diff --git a/user/include/l4/ia64/vregs.h b/user/include/l4/ia64/vregs.h
deleted file mode 100644
index 8bf4ac86..00000000
--- a/user/include/l4/ia64/vregs.h
+++ /dev/null
@@ -1,396 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     l4/ia64/vregs.h
- * Description:   IA64 virtual register ABI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: vregs.h,v 1.8 2003/09/24 19:06:24 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__IA64__VREGS_H__
-#define __L4__IA64__VREGS_H__
-
-
-//#define __L4_OLD_IPCABI
-
-
-L4_INLINE L4_Word_t * __L4_IA64_Utcb (void) __attribute__ ((const));
-L4_INLINE L4_Word_t * __L4_IA64_Utcb (void)
-{
-    L4_Word_t * utcb;
-
-    __asm__ (
-	"/* __L4_IA64_Utcb() */			\n"
-	"	mov %0 = ar.k6			\n"
-
-	: /* outputs */
-	"=r" (utcb)
-
-	/* no inputs */
-	/* no clobbers */
-	);
-
-    return utcb;
-}
-
-
-
-/*
- * Location of TCRs within UTCB.
- */
-
-#define __L4_TCB_MR_OFFSET			(48)
-#define __L4_TCR_THREAD_WORD_1			(44)
-#define __L4_TCR_THREAD_WORD_0			(43)
-#define __L4_TCB_BR_OFFSET			(10)
-#define __L4_TCR_ERROR_CODE			(9)
-#define __L4_TCR_VIRTUAL_ACTUAL_SENDER		(8)
-#define __L4_TCR_INTENDED_RECEIVER		(7)
-#define __L4_TCR_XFER_TIMEOUT			(6)
-#define __L4_TCR_PREEMPT_FLAGS			(5)
-#define __L4_TCR_COP_FLAGS			(5)
-#define __L4_TCR_EXCEPTION_HANDLER		(4)
-#define __L4_TCR_PAGER				(3)
-#define __L4_TCR_USER_DEFINED_HANDLE		(2)
-#define __L4_TCR_PROCESSOR_NO			(1)
-
-
-
-/*
- * Thread Control Registers.
- */
-
-L4_INLINE L4_Word_t __L4_TCR_MyGlobalId (void)
-{
-    L4_Word_t tid;
-
-    __asm__ (
-	"/* __L4_TCR_MyGlobalId() */		\n"
-	"	mov %0 = ar.k5			\n"
-
-	: /* outputs */
-	"=r" (tid)
-
-	/* no inputs */
-	/* no clobbers */
-	);
-
-    return tid;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_MyLocalId (void)
-{
-    L4_Word_t *dummy = __L4_IA64_Utcb ();
-    return (L4_Word_t) dummy;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ProcessorNo (void)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_PROCESSOR_NO];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_UserDefinedHandle (void)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_USER_DEFINED_HANDLE];
-}
-
-L4_INLINE void __L4_TCR_Set_UserDefinedHandle (L4_Word_t w)
-{
-    (__L4_IA64_Utcb ())[__L4_TCR_USER_DEFINED_HANDLE] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_Pager (void)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_PAGER];
-}
-
-L4_INLINE void __L4_TCR_Set_Pager (L4_Word_t w)
-{
-    (__L4_IA64_Utcb ())[__L4_TCR_PAGER] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ExceptionHandler (void)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_EXCEPTION_HANDLER];
-}
-
-L4_INLINE void __L4_TCR_Set_ExceptionHandler (L4_Word_t w)
-{
-    (__L4_IA64_Utcb ())[__L4_TCR_EXCEPTION_HANDLER] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ErrorCode (void)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_ERROR_CODE];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_XferTimeout (void)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_XFER_TIMEOUT];
-}
-
-L4_INLINE void __L4_TCR_Set_XferTimeout (L4_Word_t w)
-{
-    (__L4_IA64_Utcb ())[__L4_TCR_XFER_TIMEOUT] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_IntendedReceiver(void)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_INTENDED_RECEIVER];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ActualSender (void)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_VIRTUAL_ACTUAL_SENDER];
-}
-
-L4_INLINE void __L4_TCR_Set_VirtualSender (L4_Word_t w)
-{
-    (__L4_IA64_Utcb ())[__L4_TCR_VIRTUAL_ACTUAL_SENDER] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ThreadWord (L4_Word_t n)
-{
-    return (__L4_IA64_Utcb ())[__L4_TCR_THREAD_WORD_0 + n];
-}
-
-L4_INLINE void __L4_TCR_Set_ThreadWord (L4_Word_t n, L4_Word_t w)
-{
-    (__L4_IA64_Utcb ())[__L4_TCR_THREAD_WORD_0 + n] = w;
-}
-
-L4_INLINE void L4_Set_CopFlag (L4_Word_t n)
-{
-    L4_Word8_t old, readval;
-
-    do {
-	old = *(L4_Word8_t *) &(__L4_IA64_Utcb ())[__L4_TCR_COP_FLAGS];
-
-	__asm__ __volatile__ (
-	    "	mov	r14 = ar.ccv			\n"
-	    "	mov	ar.ccv = %2 ;;			\n"
-	    "	cmpxchg1.acq %0 = [%1], %3, ar.ccv ;;	\n"
-	    "	mov	ar.ccv = r14			\n"
-	    :
-	    "=r" (readval)
-	    :
-	    "r" (&(__L4_IA64_Utcb ())[__L4_TCR_COP_FLAGS]),
-	    "r" (old),
-	    "r" (old | (1 << n))
-	    :
-	    "r14");
-    } while (old != readval);
-}
-
-L4_INLINE void L4_Clr_CopFlag (L4_Word_t n)
-{
-    L4_Word8_t old, readval;
-
-    do {
-	old = *(L4_Word8_t *) &(__L4_IA64_Utcb ())[__L4_TCR_COP_FLAGS];
-
-	__asm__ __volatile__ (
-	    "	mov	r14 = ar.ccv			\n"
-	    "	mov	ar.ccv = %2 ;;			\n"
-	    "	cmpxchg1.acq %0 = [%1], %3, ar.ccv ;;	\n"
-	    "	mov	ar.ccv = r14			\n"
-	    :
-	    "=r" (readval)
-	    :
-	    "r" (&(__L4_IA64_Utcb ())[__L4_TCR_COP_FLAGS]),
-	    "r" (old),
-	    "r" (old & ~(1 << n))
-	    :
-	    "r14");
-    } while (old != readval);
-}
-
-L4_INLINE L4_Bool_t L4_EnablePreemptionFaultException (void)
-{
-    return 0;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemptionFaultException (void)
-{
-    return 0;
-}
-
-L4_INLINE L4_Bool_t L4_EnablePreemption (void)
-{
-    return 0;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemption (void)
-{
-    return 0;
-}
-
-L4_INLINE L4_Bool_t L4_PreemptionPending (void)
-{
-    return 0;
-}
-
-
-
-/*
- * Message Registers.
- */
-
-#if defined(__L4_OLD_IPCABI)
-L4_INLINE int __L4_IsNaTCollection (L4_Word_t * addr)
-{
-    return ((L4_Word_t) addr & 0x1f8) == 0x1f8;
-}
-
-L4_INLINE L4_Word_t * __L4_PrevNaTCollection (L4_Word_t * addr)
-{
-    return (L4_Word_t *) (((L4_Word_t) addr & ~0x1ff) - 8);
-}
-
-L4_INLINE void L4_StoreMR (int i, L4_Word_t * w)
-{
-    L4_Word_t * ptr = &(__L4_IA64_Utcb ())[__L4_TCB_MR_OFFSET + i];
-    L4_Word_t * nat = __L4_PrevNaTCollection (ptr);
-
-    if ((ptr - nat) <= i)
-	ptr++;
-
-    if (__L4_IsNaTCollection (ptr))
-	ptr++;
-
-    *w = *ptr;
-}
-
-L4_INLINE void L4_LoadMR (int i, L4_Word_t w)
-{
-    L4_Word_t * ptr = &(__L4_IA64_Utcb ())[__L4_TCB_MR_OFFSET + i];
-    L4_Word_t * nat = __L4_PrevNaTCollection (ptr);
-
-    if ((ptr - nat) <= i)
-	ptr++;
-
-    if (__L4_IsNaTCollection (ptr))
-	ptr++;
-    
-    *ptr = w;
-}
-
-L4_INLINE void L4_StoreMRs (int i, int k, L4_Word_t * w)
-{
-    L4_Word_t * mr = (__L4_IA64_Utcb ()) + __L4_TCB_MR_OFFSET + i;
-    L4_Word_t * nat = __L4_PrevNaTCollection (mr);
-
-    if ((mr - nat) <= i)
-	mr++;
-
-    while (k-- > 0)
-    {
-	if (__L4_IsNaTCollection (mr))
-	    mr++;
-	*w++ = *mr++;
-    }
-}
-
-L4_INLINE void L4_LoadMRs (int i, int k, L4_Word_t * w)
-{
-    L4_Word_t * mr = (__L4_IA64_Utcb ()) + __L4_TCB_MR_OFFSET + i;
-    L4_Word_t * nat = __L4_PrevNaTCollection (mr);
-
-    if ((mr - nat) <= i)
-	mr++;
-
-    while (k-- > 0)
-    {
-	if (__L4_IsNaTCollection (mr))
-	    mr++;
-	*mr++ = *w++;
-    }
-}
-
-#else /* !__L4_OLD_IPCABI */
-
-L4_INLINE void L4_StoreMR (int i, L4_Word_t * w)
-{
-    *w = (__L4_IA64_Utcb ())[__L4_TCB_MR_OFFSET + i];
-}
-
-L4_INLINE void L4_LoadMR (int i, L4_Word_t w)
-{
-    (__L4_IA64_Utcb ())[__L4_TCB_MR_OFFSET + i] = w;
-}
-
-L4_INLINE void L4_StoreMRs (int i, int k, L4_Word_t * w)
-{
-    L4_Word_t * mr = (__L4_IA64_Utcb ()) + __L4_TCB_MR_OFFSET + i;
-
-    while (k-- > 0)
-	*w++ = *mr++;
-}
-
-L4_INLINE void L4_LoadMRs (int i, int k, L4_Word_t * w)
-{
-    L4_Word_t * mr = (__L4_IA64_Utcb ()) + __L4_TCB_MR_OFFSET + i;
-
-    while (k-- > 0)
-	*mr++ = *w++;
-}
-
-#endif
-
-
-
-
-
-/*
- * Buffer Registers.
- */
-
-L4_INLINE void L4_StoreBR (int i, L4_Word_t * w)
-{
-    *w = (__L4_IA64_Utcb ())[__L4_TCB_BR_OFFSET + i];
-}
-
-L4_INLINE void L4_LoadBR (int i, L4_Word_t w)
-{
-    (__L4_IA64_Utcb ())[__L4_TCB_BR_OFFSET + i] = w;
-}
-
-L4_INLINE void L4_StoreBRs (int i, int k, L4_Word_t * w)
-{
-    L4_Word_t * mr = (__L4_IA64_Utcb ()) + __L4_TCB_BR_OFFSET + i;
-
-    while (k-- > 0)
-	*w++ = *mr++;
-}
-
-L4_INLINE void L4_LoadBRs (int i, int k, L4_Word_t * w)
-{
-    L4_Word_t * mr = (__L4_IA64_Utcb ()) + __L4_TCB_BR_OFFSET + i;
-
-    while (k-- > 0)
-	*mr++ = *w++;
-}
-
-#endif /* !__L4__IA64__VREGS_H__ */
diff --git a/user/include/l4/mips32/asm.h b/user/include/l4/mips32/asm.h
deleted file mode 100644
index e9eb1085..00000000
--- a/user/include/l4/mips32/asm.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4/mips32/asm.h
- * Description:   Assembler macros for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.1 2006/02/23 21:07:57 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS32__ASM_H__
-#define __L4__MIPS32__ASM_H__
-
-#define BEGIN_PROC(name)			\
-    .global name;				\
-    .align 3;					\
-    .ent name;					\
-name:
-
-#define END_PROC(name)				\
-    .end name
-
-/*
- * EXPORT - export definition of symbol
- */
-#define EXPORT(symbol)				\
-    .globl  symbol;				\
-symbol:
-
-
-#endif /* !__L4__MIPS32__ASM_H__ */
diff --git a/user/include/l4/mips32/kdebug.h b/user/include/l4/mips32/kdebug.h
deleted file mode 100644
index 5ae1bf38..00000000
--- a/user/include/l4/mips32/kdebug.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4/mips32/kdebug.h
- * Description:   L4 Kdebug interface for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: kdebug.h,v 1.1 2006/02/23 21:07:57 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS32__KDEBUG_H__
-#define __L4__MIPS32__KDEBUG_H__
-
-#define __L4_TRAP_KPUTC			(-100ul)
-#define __L4_TRAP_KGETC			(-101ul)
-#define __L4_TRAP_KDEBUG		(-102ul)
-#define __L4_TRAP_KGETC_NB		(-104ul)
-#define __L4_TRAP_READ_PERF		(-110ul)
-#define __L4_TRAP_WRITE_PERF	(-111ul)
-
- //#define L4_KDB_Enter(str...)
-
-#define L4_KDB_Enter(str...)			\
-do {						\
-    __asm__ __volatile__ (			\
-	".set	noat\n\t"			\
-	"li	$1, %0\n\t"			\
-	"la	$2, 1f		    \n\t"	\
-	"break			    \n\t"	\
-	".set	at\n\t"				\
-	"	.data		    \n\t"	\
-	"1: .string	" #str ";"		\
-	"	.previous	    \n\t"	\
-	: : "i" (__L4_TRAP_KDEBUG) : "memory", "$1", "$2"	\
-    );						\
-} while (0)
-
-#define __L4_KDB_Op_Arg(op, name, argtype)	\
-L4_INLINE void L4_KDB_##name (argtype arg)	\
-{						\
-    register char r_c asm("$4") = arg;		\
-    __asm__ __volatile__ (			\
-	    ".set noat\n\t"			\
-	    "li     $1, %0\n\t"			\
-	    "break\n\t"				\
-	    ".set at\n\t"			\
-	    : : "i" (op), "r" (r_c) : "$1"	\
-	    );					\
-}
-
-
- #define __L4_KDB_Op_Ret(op, name, rettype)	\
- L4_INLINE rettype L4_KDB_##name (void)		\
- {						\
-     register char ret asm("$2");		\
-     __asm__ __volatile__ (			\
- 	".set noat	\n\t"			\
- 	"li	$1, %1	\n\t"			\
- 	"break		\n\t"			\
- 	".set at	\n\t"			\
- 	: "=r" (ret) : "i" (op) : "$1"		\
-     );						\
-     return ret;					\
- }
- 
- __L4_KDB_Op_Ret( __L4_TRAP_KGETC, ReadChar_Blocked, char );
- __L4_KDB_Op_Ret( __L4_TRAP_KGETC_NB, ReadChar, long );
- __L4_KDB_Op_Arg( __L4_TRAP_KPUTC, PrintChar, char );
-
-
-#endif /* !__L4__MIPS32__KDEBUG_H__ */
diff --git a/user/include/l4/mips32/regdef.h b/user/include/l4/mips32/regdef.h
deleted file mode 100644
index 49df5675..00000000
--- a/user/include/l4/mips32/regdef.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4/mips32/regdef.h
- * Description:   Pretty register names for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: regdef.h,v 1.1 2006/02/23 21:07:57 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS32__REGDEF_H__
-#define __L4__MIPS32__REGDEF_H__
-
-#define zero            $0  /* hardwired to zero */
-#define AT		$1  /* assembler temporary */
-#define v0		$2  /* result */
-#define v1		$3
-/* argument registers */
-#define a0		$4
-#define a1		$5
-#define a2		$6
-#define a3		$7
-#define a4		$8 
-#define a5		$9
-#define a6		$10
-#define a7		$11
-/* temporary registers */
-#define t0		$8
-#define t1		$9
-#define t2		$10
-#define t3		$11
-#define t4		$12
-#define t5		$13
-#define t6		$14
-#define t7		$15
-/* saved registers */
-#define s0		$16
-#define s1		$17
-#define s2		$18
-#define s3		$19
-#define s4		$20
-#define s5		$21
-#define s6		$22
-#define s7		$23
-/* extra temporaries */
-#define t8		$24
-#define t9		$25
-/* kernel registers - don't touch */
-#define k0		$26
-#define k1		$27
-
-#define gp		$28	/* global pointer */
-#define sp		$29	/* stack pointer */
-#define fp		$30	/* frame pointer */
-#define s8		$30	/* or saved register */
-#define ra		$31	/* return address */
-
-#endif /* !__L4__MIPS32__REGDEF_H__ */
diff --git a/user/include/l4/mips32/specials.h b/user/include/l4/mips32/specials.h
deleted file mode 100644
index 7eedc57d..00000000
--- a/user/include/l4/mips32/specials.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4/mips32/specials.h
- * Description:   Helper functions for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: specials.h,v 1.1 2006/02/23 21:07:57 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS32__SPECIALS_H__
-#define __L4__MIPS32__SPECIALS_H__
-
-/*
- * Architecture specific helper functions.
- */
-
-L4_INLINE int __L4_Msb (L4_Word_t w) __attribute__ ((const));
-
-L4_INLINE int __L4_Msb (L4_Word_t w)
-{
-    int bitnum;
-
-    if (w == 0)
-	return 32;
-
-    for (bitnum = 0, w >>= 1; w != 0; bitnum++)
-	w >>= 1;
-
-    return bitnum;
-}
-
-#endif /* !__L4__MIPS32__SPECIALS_H__ */
diff --git a/user/include/l4/mips32/syscalls.h b/user/include/l4/mips32/syscalls.h
deleted file mode 100644
index 0f458ce8..00000000
--- a/user/include/l4/mips32/syscalls.h
+++ /dev/null
@@ -1,546 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4/mips32/syscalls.h
- * Description:   MIPS32 system call ABI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.1 2006/02/23 21:07:57 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS32__SYSCALLS_H__
-#define __L4__MIPS32__SYSCALLS_H__
-
-#include <l4/types.h>
-#include <l4/message.h>
-
-/* Syscall KernelInterface */
-
-#define __L4_MAGIC_KIP_REQUEST          (0x141fca11)
-
-
-L4_INLINE void * L4_KernelInterface (L4_Word_t *ApiVersion,
-				     L4_Word_t *ApiFlags,
-				     L4_Word_t *KernelId)
-{
-    register void * base_address	asm ("$8");  /* t0 */
-    register L4_Word_t api_version	asm ("$9");  /* t1 */
-    register L4_Word_t api_flags	asm ("$10"); /* t2 */
-    register L4_Word_t kernel_id	asm ("$11"); /* t3 */
-
-    __asm__ __volatile__ (".set noat;\n\t");
-    register L4_Word_t i asm("$1")= __L4_MAGIC_KIP_REQUEST;
-
-    __asm__ __volatile__ (
-        ".word 0xF1000000;\r\n" /* illegal instruction */
-        ".set at;     \n\r"
-        : "=r" (base_address), "=r" (api_version), "=r" (api_flags), "=r" (kernel_id)
-        : "r" (i)
-        /*:  "$1" XXX*/
-        );
-    __asm__ __volatile__ ("":::"$1");
-
-    if( ApiVersion ) *ApiVersion = api_version;
-    if( ApiFlags ) *ApiFlags = api_flags;
-    if( KernelId ) *KernelId = kernel_id;
-
-    return base_address;
-}
-
-
-
-
-
-/* Syscall ThreadControl */
-
-typedef L4_Word_t (*__L4_ThreadControl_t)(L4_ThreadId_t, L4_ThreadId_t, L4_ThreadId_t, L4_ThreadId_t, void *);
-extern __L4_ThreadControl_t __L4_ThreadControl;
-
-L4_INLINE L4_Word_t L4_ThreadControl (L4_ThreadId_t dest,
-				      L4_ThreadId_t SpaceSpecifier,
-				      L4_ThreadId_t Scheduler,
-				      L4_ThreadId_t Pager,
-				      void * UtcbLocation)
-{
-
-    register L4_Word_t	r_dest			asm("$4");   // a0
-    register L4_Word_t	r_space			asm("$5");   // a1
-    register L4_Word_t	r_schedule		asm("$6");   // a2
-    register L4_Word_t	r_pager			asm("$7");   // a3
-    register L4_Word_t	r_utcb			asm("$16");  // s0
-	
-    L4_Word_t  r_result;
-	
-    r_dest = dest.raw;
-    r_space = SpaceSpecifier.raw;
-    r_schedule = Scheduler.raw;
-    r_pager = Pager.raw;
-    r_utcb = (L4_Word_t)UtcbLocation;
-
-    __asm__ __volatile__ (
-        "lw $2, __L4_ThreadControl				\n\t"	
-        "subu $29, $29, 0x10					\n\t"		
-        "jalr $2								\n\t"
-        "nop									\n\t"
-        "addu $29, $29, 0x10					\n\t"
-        "move %0, $2							\n\t"	/* result */
-        : "=r"(r_result)
-        : "r"(r_dest), "r"(r_space), "r"(r_schedule), "r"(r_pager), "r"(r_utcb)
-	);
-	
-    //__asm__ __volatile__( "" ::: "$1", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-    //		"$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-    __asm__ __volatile__( "" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-                          "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-    return( r_result );
-	
-}
-
-
-
-
-
-
-/* Syscall SpaceControl */
-
-typedef void (*__L4_SpaceControl_t)(L4_ThreadId_t SpaceSpecifier,
-                                    L4_Word_t control,
-                                    L4_Fpage_t KernelInterfacePageArea,
-                                    L4_Fpage_t UtcbArea,
-                                    L4_ThreadId_t redirector);
-extern __L4_SpaceControl_t __L4_SpaceControl;
-
-L4_INLINE L4_Word_t L4_SpaceControl (L4_ThreadId_t SpaceSpecifier,
-				     L4_Word_t control,
-				     L4_Fpage_t KernelInterfacePageArea,
-				     L4_Fpage_t UtcbArea,
-				     L4_ThreadId_t redirector,
-				     L4_Word_t *old_control)
-{
-
-    register L4_Word_t r_space		asm("$4");	// a0	
-    register L4_Word_t r_control	asm("$5");	// a1	
-    register L4_Word_t r_kip		asm("$6");	// a2
-    register L4_Word_t r_utcb		asm("$7");	// a3
-    register L4_Word_t r_redir		asm("$16");	// s0
-	
-    L4_Word_t r_res0;
-    L4_Word_t r_res1;
-	
-
-	
-    r_space		= SpaceSpecifier.raw;
-    r_control	= control;	
-    r_kip		= KernelInterfacePageArea.raw;
-    r_utcb		= UtcbArea.raw;
-    r_redir		= redirector.raw;
-
-    __asm__ __volatile__ (
-        "lw	$2, __L4_SpaceControl				\n\t"	
-        "subu $29, $29, 0x10					\n\t"		
-        "jalr $2								\n\t"
-        "nop									\n\t"
-        "addu $29, $29, 0x10					\n\t"
-        "move %0, $2							\n\t"	/* result */
-        "move %1, $4							\n\t"	/* result */
-        : "=r"(r_res0), "=r"(r_res1)
-        : "r"(r_space), "r"(r_control), "r"(r_kip), "r"(r_utcb), "r"(r_redir)
-	);
-	
-    //__asm__ __volatile__( "" ::: "$1", "$3", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-    //		"$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-    __asm__ __volatile__( "" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-                          "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-    if(old_control)
-        *old_control = r_res1;
-
-    return( r_res0 );
-}
-
-
-
-
-
-/* Syscall SystemClock */
-
-typedef L4_Word64_t (*__L4_SystemClock_t)(void);
-extern __L4_SystemClock_t __L4_SystemClock;
-
-L4_INLINE L4_Clock_t L4_SystemClock (void) {
-    return (L4_Clock_t){ raw: __L4_SystemClock() }; 
-}
-
-
-
-
-
-/* Syscall ThreadSwitch */
-
-typedef void (*__L4_ThreadSwitch_t)(L4_ThreadId_t);
-extern __L4_ThreadSwitch_t __L4_ThreadSwitch;
-
-L4_INLINE void L4_ThreadSwitch (L4_ThreadId_t dest) {
-	
-    register L4_Word_t r_control asm("$4");
-    r_control = dest.raw;
-	
-    __asm__ __volatile__ (
-        "lw $2, __L4_ThreadSwitch				\n\t"	
-        "subu $29, $29, 0x10					\n\t"		
-        "jalr $2								\n\t"
-        "nop									\n\t"
-        "addu $29, $29, 0x10					\n\t"
-        :: "r"(r_control)
-	);
-	
-    __asm__ __volatile__( "" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-                          "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-	
-}
-
-
-
-
-
-/* Syscall Schedule */
-
-typedef L4_Word_t (*__L4_Schedule_t)(L4_ThreadId_t dest, L4_Word_t TimeControl, 
-                                     L4_Word_t ProcessorControl, L4_Word_t prio, L4_Word_t PreemptionControl); 
-extern __L4_Schedule_t __L4_Schedule;
-
-L4_INLINE L4_Word_t  L4_Schedule (L4_ThreadId_t dest,
-				  L4_Word_t TimeControl,
-				  L4_Word_t ProcessorControl,
-				  L4_Word_t prio,
-				  L4_Word_t PreemptionControl,
-				  L4_Word_t * old_TimeControl)
-{
-
-    register L4_Word_t r_dest  asm("$4");	// a0
-    register L4_Word_t r_time  asm("$5");	// a1
-    register L4_Word_t r_proc  asm("$6");	// a2
-    register L4_Word_t r_prio  asm("$7");	// a3
-    register L4_Word_t r_pree  asm("$16");	// s0
-	
-    L4_Word_t res0;
-    L4_Word_t res1;	
-
-    r_dest = dest.raw;
-    r_time = TimeControl;
-    r_proc = ProcessorControl;
-    r_prio = prio;
-    r_pree = PreemptionControl;
-
-	
-    __asm__ __volatile__ (
-        "lw $2, __L4_Schedule					\n\t"
-        "subu $29, $29, 0x10					\n\t"		
-        "jalr $2								\n\t"
-        "nop									\n\t"
-        "addu $29, $29, 0x10					\n\t"
-        "move %0, $2							\n\t"  /* result */
-        "move %1, $4							\n\t"  /* result */
-        : "=r"(res0), "=r"(res1)
-        : "r"(r_dest), "r"(r_time), "r"(r_proc), "r"(r_prio), "r"(r_pree) 
-	);
-	
-    __asm__ __volatile__( "" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-                          "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-    //__asm__ __volatile__( "" ::: "$1", "$3", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-    //		"$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-    if(old_TimeControl) *old_TimeControl = res1;
-
-    return( res0 );
-}
-
-
-
-
-
-/* Unmap */
-
-typedef void (*__L4_Unmap_t)(L4_Word_t);
-extern __L4_Unmap_t __L4_Unmap;
-
-L4_INLINE void L4_Unmap (L4_Word_t control)
-{
-    register L4_Word_t r_control asm("$4");
-    r_control = control;
-	
-    __asm__ __volatile__ (
-        "lw $2, __L4_Unmap						\n\t"	
-        "subu $29, $29, 0x10					\n\t"		
-        "jalr $2								\n\t"
-        "nop									\n\t"
-        "addu $29, $29, 0x10					\n\t"
-        :: "r"(r_control)
-	);
-	
-    __asm__ __volatile__( "" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-                          "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-    //__asm__ __volatile__( "" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-    //		"$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-}
-
-
-
-
-
-/* Syscall ProcessorControl */
-
-typedef L4_Word_t (*__L4_ProcessorControl_t)(L4_Word_t ProcessorNo,
-                                             L4_Word_t InternalFrequency,
-                                             L4_Word_t ExternalFrequency,
-                                             L4_Word_t voltage);
-extern __L4_ProcessorControl_t __L4_ProcessorControl;
-    
-L4_INLINE L4_Word_t L4_ProcessorControl (L4_Word_t ProcessorNo,
-					 L4_Word_t InternalFrequency,
-					 L4_Word_t ExternalFrequency,
-					 L4_Word_t voltage)
-{
-    return( 0 ); // XXX
-    //return __L4_ProcessorControl(ProcessorNo, InternalFrequency, ExternalFrequency, voltage);
-}
-
-
-
-
-
-/* Syscall MemoryControl */
-
-typedef L4_Word_t (*__L4_MemoryControl_t)(L4_Word_t control,
-                                          L4_Word_t attr0, L4_Word_t attr1,
-                                          L4_Word_t attr2, L4_Word_t attr3);
-extern __L4_MemoryControl_t __L4_MemoryControl;
-
-L4_INLINE L4_Word_t L4_MemoryControl (L4_Word_t control,
-                                      const L4_Word_t * attributes)
-{
-    return( 0 ); //XXX
-//    return __L4_MemoryControl(control, attributes[0], attributes[1], attributes[2], attributes[3]);
-}
-
-
-
-
-
-/* Syscall ExchangeRegisters */
-
-typedef L4_Word_t (*__L4_ExchangeRegisters_t)(L4_ThreadId_t dest,
-                                              L4_Word_t control,
-                                              L4_Word_t sp,
-                                              L4_Word_t ip,
-                                              L4_Word_t flags,
-                                              L4_Word_t UserDefHandle,
-                                              L4_ThreadId_t pager);
-extern __L4_ExchangeRegisters_t __L4_ExchangeRegisters;
-
-L4_INLINE L4_ThreadId_t L4_ExchangeRegisters (L4_ThreadId_t dest,
-					      L4_Word_t control,
-					      L4_Word_t sp,
-					      L4_Word_t ip,
-					      L4_Word_t flags,
-					      L4_Word_t UserDefHandle,
-					      L4_ThreadId_t pager,
-					      L4_Word_t *old_control,
-					      L4_Word_t *old_sp,
-					      L4_Word_t *old_ip,
-					      L4_Word_t *old_flags,
-					      L4_Word_t *old_UserDefHandle,
-                                              L4_ThreadId_t *old_pager)
-{
-
-    register L4_Word_t r_dest		asm ("$4");	  // a0     
-    register L4_Word_t r_control	asm ("$5");	  // a1
-    register L4_Word_t r_sp			asm ("$6");	  // a2
-    register L4_Word_t r_ip			asm ("$7");	  // a3
-    register L4_Word_t r_flags		asm ("$16");  // s0	 
-    register L4_Word_t r_userhandle	asm ("$17");  // s1	
-    register L4_Word_t r_pager		asm ("$18");  // s2
-    register L4_Word_t r_local		asm ("$19");  // s3
-
-    L4_Word_t res0;   
-    L4_Word_t res1;
-    L4_Word_t res2;
-    L4_Word_t res3;
-    L4_Word_t res4;	
-    L4_Word_t res5;
-    L4_Word_t res6;
-
-    L4_ThreadId_t ret;
-	
-    r_dest = dest.raw;
-    r_control = control;
-    r_sp = sp;
-    r_ip = ip;
-    r_flags = flags;
-    r_userhandle = UserDefHandle;
-    r_pager = pager.raw;
-    r_local = 0; // XXX
-
-    __asm__ __volatile__ (
-        "lw $2, __L4_ExchangeRegisters			\n\t"	
-        "subu $29, $29, 0x10					\n\t"		
-        "jalr $2								\n\t"
-        "nop									\n\t"
-        "addu $29, $29, 0x10					\n\t"
-        "move %0, $2							\n\t"  /* result */
-        "move %1, $4							\n\t"  /* result */
-        "move %2, $5							\n\t"  /* result */
-        "move %3, $6							\n\t"  /* result */
-        "move %4, $7							\n\t"  /* result */
-        "move %5, $8							\n\t"  /* result */
-        "move %6, $9							\n\t"  /* result */
-        : "=r"(res0), "=r"(res1), "=r"(res2), "=r"(res3), "=r"(res4), "=r"(res5), "=r"(res6)
-        : "r"(r_dest), "r"(r_control), "r"(r_sp), "r"(r_ip), "r"(r_flags), "r"(r_userhandle), "r"(r_pager), "r"(r_local) 
-	);
-
-    //__asm__ __volatile__( "" ::: "$1", "$3", "$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17", "$18", "$19", 
-    //		"$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-
-    __asm__ __volatile__( "" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-                          "$14", "$15", "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$31" );					  
-
-
-    if( old_control ) *old_control = res1;
-    if( old_sp ) *old_sp = res2;
-    if( old_ip ) *old_ip = res3;
-    if( old_flags ) *old_flags = res4;
-    if( old_UserDefHandle ) *old_UserDefHandle = res5;
-    if( old_pager )	*((L4_Word_t*)old_pager) = res6;
-
-    ret.raw = res0;
-    return( ret );
-}
-
-
-
-
-/* Syscall IPC */
-
-typedef L4_ThreadId_t (*__L4_Ipc_t)(L4_ThreadId_t to, L4_ThreadId_t FromSpecifier, L4_Word_t Timeouts);
-extern __L4_Ipc_t __L4_Ipc;
-
-L4_INLINE L4_MsgTag_t L4_Ipc (L4_ThreadId_t to,
-			      L4_ThreadId_t FromSpecifier,
-			      L4_Word_t Timeouts,
-			      L4_ThreadId_t * from)
-{
-		
-    register L4_Word_t r_to			asm("$4");	// a0
-    register L4_Word_t r_from		asm("$5");	// a1
-    register L4_Word_t r_time		asm("$6");	// a2
-
-    L4_Word_t res0;
-    L4_MsgTag_t ret;
-	
-    register L4_Word_t mr0 asm ("$16"); // s0
-    register L4_Word_t mr1 asm ("$17"); // s1
-    register L4_Word_t mr2 asm ("$18"); // s2
-    register L4_Word_t mr3 asm ("$19"); // s3
-    register L4_Word_t mr4 asm ("$20"); // s4
-    register L4_Word_t mr5 asm ("$21"); // s5
-    register L4_Word_t mr6 asm ("$22"); // s6
-    register L4_Word_t mr7 asm ("$23"); // s7
-
-    r_to = to.raw;
-    r_from = FromSpecifier.raw;
-    r_time = Timeouts;
-
-    if( !L4_IsNilThread( to ) ) {
-
-        mr0 = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 0];
-        mr1 = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 1];
-        mr2 = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 2];
-        mr3 = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 3];
-        mr4 = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 4];
-        mr5 = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 5];
-        mr6 = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 6];
-        mr7 = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 7];
-
-        __asm__ __volatile__(""::"r" (mr0), "r" (mr1), "r" (mr2), "r" (mr3), "r" (mr4), "r" (mr5), "r" (mr6), "r" (mr7));
-
-    }
-
-    // result = __L4_Ipc(to, FromSpecifier, Timeouts);
-    __asm__ __volatile__(
-        "lw $2, __L4_Ipc			\n\t"	
-        "subu $29, $29, 0x10		\n\t"		
-        "jalr $2					\n\t"
-        "nop									\n\t"
-        "addu $29, $29, 0x10		\n\t"
-        "move %0, $2				\n\t"  /* result */
-        : "=r"(res0), "=r" (mr0), "=r" (mr1), "=r" (mr2), "=r" (mr3), "=r" (mr4), "=r" (mr5), "=r" (mr6), "=r" (mr7)
-        : "r"(r_to), "r"(r_from), "r"(r_time)
-	);
-
-    __asm__ __volatile__( "" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", 
-                          "$14", "$15", "$24", "$25", "$31" );					  
-
-
-    //__asm__ __volatile__( "" ::: "$1", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", "$25", "$31" );					  
-	
-    if( !L4_IsNilThread( FromSpecifier ) ) {
-        (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 1] = mr1;
-        (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 2] = mr2;
-        (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 3] = mr3;
-        (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 4] = mr4;
-        (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 5] = mr5;
-        (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 6] = mr6;
-        (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + 7] = mr7;
-        if( from ) *((L4_Word_t*)from) = res0;
-    }
-
-    ret.raw = mr0;
-    return( ret );
-
-}
-
-
-
-/* Syscall LIPC */
-
-typedef L4_ThreadId_t (*__L4_Lipc_t)(L4_ThreadId_t to, L4_ThreadId_t FromSpecifier, L4_Word_t Timeouts);
-extern __L4_Lipc_t __L4_Lipc;
-
-L4_INLINE L4_MsgTag_t L4_Lipc (L4_ThreadId_t to,
-			       L4_ThreadId_t FromSpecifier,
-			       L4_Word_t Timeouts,
-			       L4_ThreadId_t * from)
-{
-    //XXX does not work with local tid... adjust syscall exchange regs first
-    return( L4_Ipc( to, FromSpecifier, Timeouts, from ) );
-}
-
-#endif /* !__L4__MIPS32__SYSCALLS_H__ */
diff --git a/user/include/l4/mips32/types.h b/user/include/l4/mips32/types.h
deleted file mode 100644
index 45c1cac1..00000000
--- a/user/include/l4/mips32/types.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4/mips32/types.h
- * Description:   MIPS32 specific type declarations
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.3 2006/10/26 12:16:40 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS32__TYPES_H__
-#define __L4__MIPS32__TYPES_H__
-
-typedef unsigned long		L4_Word64_t;
-typedef unsigned int		L4_Word32_t;
-typedef unsigned short		L4_Word16_t;
-typedef unsigned char		L4_Word8_t;
-
-typedef unsigned long		L4_Word_t;
-
-typedef signed long		L4_SignedWord64_t;
-typedef signed int		L4_SignedWord32_t;
-typedef signed short		L4_SignedWord16_t;
-typedef signed char		L4_SignedWord8_t;
-
-typedef signed long		L4_SignedWord_t;
-
-typedef unsigned int		L4_Size_t;
-
-
-#endif /* !__L4__MIPS32__TYPES_H__ */
diff --git a/user/include/l4/mips32/vregs.h b/user/include/l4/mips32/vregs.h
deleted file mode 100644
index 8491eb37..00000000
--- a/user/include/l4/mips32/vregs.h
+++ /dev/null
@@ -1,235 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     l4/mips32/vregs.h
- * Description:   Virtual registers for MIPS32
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: vregs.h,v 1.1 2006/02/23 21:07:57 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS32__VREGS_H__
-#define __L4__MIPS32__VREGS_H__
-
-L4_INLINE L4_Word_t *__L4_Mips32_Utcb( void ) __attribute__ ((const));
-L4_INLINE L4_Word_t *__L4_Mips32_Utcb( void ) {
-    register L4_Word_t * utcb asm ("$26");	// k0
-    return utcb;
-}
-
-/*
- * Location of TCRs within UTCB.
- */
-
-#define __L4_TCR_MR_OFFSET		        (16)
-#define __L4_TCR_BR_OFFSET		        (80)
-
-#define __L4_TCR_VIRTUAL_ACTUAL_SENDER	(9)
-#define __L4_TCR_INTENDED_RECEIVER		(8)
-#define __L4_TCR_ERROR_CODE				(7)
-#define __L4_TCR_XFER_TIMEOUT			(6)
-#define __L4_TCR_COP_FLAGS				(5)
-#define __L4_TCR_PREEMPT_FLAGS			(5)
-#define __L4_TCR_EXCEPTION_HANDLER		(4)
-#define __L4_TCR_PAGER					(3)
-#define __L4_TCR_USER_DEFINED_HANDLE	(2)
-#define __L4_TCR_PROCESSOR_NO			(1)
-#define __L4_TCR_MY_GLOBAL_ID			(0)
-
-typedef struct {
-    L4_Word8_t	    PreemptFlags;
-    L4_Word8_t	    CopFlags;
-    L4_Word16_t	    __reserved0;
-} UtcbParts;
-
-
- 
-/*
- * Thread Control Registers.
- */
-
-L4_INLINE L4_Word_t __L4_TCR_MyGlobalId( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_MY_GLOBAL_ID ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_MyLocalId( void ) {
-    return (L4_Word_t) __L4_Mips32_Utcb();
-}
- 
-L4_INLINE L4_Word_t __L4_TCR_ProcessorNo( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_PROCESSOR_NO ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_UserDefinedHandle( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_USER_DEFINED_HANDLE ];
-}
-
-L4_INLINE void __L4_TCR_Set_UserDefinedHandle( L4_Word_t w ) {
-    (__L4_Mips32_Utcb())[ __L4_TCR_USER_DEFINED_HANDLE ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_Pager( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_PAGER ];
-}
-
-L4_INLINE void __L4_TCR_Set_Pager( L4_Word_t w ) {
-    (__L4_Mips32_Utcb())[ __L4_TCR_PAGER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ExceptionHandler( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_EXCEPTION_HANDLER ];
-}
-
-L4_INLINE void __L4_TCR_Set_ExceptionHandler( L4_Word_t w ) {
-    (__L4_Mips32_Utcb())[ __L4_TCR_EXCEPTION_HANDLER ] = w;
-}
- 
-L4_INLINE L4_Word_t __L4_TCR_ErrorCode( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_ERROR_CODE ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_XferTimeout( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_XFER_TIMEOUT ];
-}
-
-L4_INLINE void __L4_TCR_Set_XferTimeout( L4_Word_t w ) {
-    (__L4_Mips32_Utcb())[ __L4_TCR_XFER_TIMEOUT ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_IntendedReceiver( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_INTENDED_RECEIVER ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ActualSender( void ) {
-    return (__L4_Mips32_Utcb())[ __L4_TCR_VIRTUAL_ACTUAL_SENDER ];
-}
-
-L4_INLINE void __L4_TCR_Set_VirtualSender( L4_Word_t w ) {
-    (__L4_Mips32_Utcb())[ __L4_TCR_VIRTUAL_ACTUAL_SENDER ] = w;
-}
-
-// L4_INLINE L4_Word_t __L4_TCR_ThreadWord (L4_Word_t n) {
-//     return (__L4_Mips32_Utcb ())[__L4_TCR_THREAD_WORD0 + (int) n];
-// }
-// 
-// L4_INLINE void __L4_TCR_Set_ThreadWord (L4_Word_t n, L4_Word_t w) {
-//     (__L4_Mips32_Utcb ())[__L4_TCR_THREAD_WORD0 + (int) n] = w;
-// }
-
-#define COP_FLAGS   ((UtcbParts *)&(__L4_Mips32_Utcb())[ __L4_TCR_COP_FLAGS ])->CopFlags
-
-L4_INLINE void L4_Set_CopFlag( L4_Word_t n ) {
-    COP_FLAGS |= (1 << n);
-}
-
-L4_INLINE void L4_Clr_CopFlag( L4_Word_t n ) {
-    COP_FLAGS &= ~(1 << n);
-}
-
-#define PREEMPT_FLAGS	((UtcbParts *)&(__L4_Mips32_Utcb())[ __L4_TCR_PREEMPT_FLAGS ])->PreemptFlags
-
-L4_INLINE L4_Bool_t L4_EnablePreemptionFaultException( void ) {
-    L4_Bool_t old = (PREEMPT_FLAGS >> 5) & 1;
-    PREEMPT_FLAGS |= (1 << 5);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemptionFaultException( void ) {
-    L4_Bool_t old = (PREEMPT_FLAGS >> 5) & 1;
-    PREEMPT_FLAGS &= ~(1 << 5);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_EnablePreemption( void ) {
-    L4_Bool_t old = (PREEMPT_FLAGS >> 6) & 1;
-    PREEMPT_FLAGS |= (1 << 6);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemption( void ) {
-    L4_Bool_t old = (PREEMPT_FLAGS >> 6) & 1;
-    PREEMPT_FLAGS &= ~(1 << 6);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_PreemptionPending( void ) {
-    L4_Bool_t retval = (PREEMPT_FLAGS >> 7) & 1;
-    return retval;
-}
-
-
-
-
-/*
- * Message Registers.
- */
-
-L4_INLINE void L4_StoreMR( int i, L4_Word_t * w ) {
-    *w = (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET +  i ];
-}
-
-L4_INLINE void L4_LoadMR( int i, L4_Word_t w ) {
-    (__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + i ] = w;
-}
-
-
-L4_INLINE void L4_StoreMRs( int i, int k, L4_Word_t * w ) {
-    L4_Word_t * mr = &(__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + i];
-    while( k-- > 0 )
-	*w++ = *mr++;
-}
-
-L4_INLINE void L4_LoadMRs( int i, int k, L4_Word_t * w ) {
-    L4_Word_t * mr = &(__L4_Mips32_Utcb())[__L4_TCR_MR_OFFSET + i];
-    while( k-- > 0 )
-	*mr++ = *w++;
-}
-
-/*
- * Buffer Registers.
- */
-
-L4_INLINE void L4_StoreBR( int i, L4_Word_t * w ) {
-    *w = (__L4_Mips32_Utcb())[__L4_TCR_BR_OFFSET + i ];
-}
-
-L4_INLINE void L4_LoadBR( int i, L4_Word_t w ) {
-    (__L4_Mips32_Utcb())[__L4_TCR_BR_OFFSET + i ] = w;
-}
-
-L4_INLINE void L4_StoreBRs( int i, int k, L4_Word_t * w ) {
-    L4_Word_t * br = &(__L4_Mips32_Utcb())[__L4_TCR_BR_OFFSET + i];
-
-    while( k-- > 0 )
-	*w++ = *br++;
-}
-
-L4_INLINE void L4_LoadBRs( int i, int k, L4_Word_t * w ) {
-    L4_Word_t * br = &(__L4_Mips32_Utcb())[__L4_TCR_BR_OFFSET +  i];
-
-    while( k-- > 0 )
-	*br++ = *w++;
-}
-
-#endif /* !__L4__MIPS32__VREGS_H__ */
diff --git a/user/include/l4/mips64/asm.h b/user/include/l4/mips64/asm.h
deleted file mode 100644
index 8b16079f..00000000
--- a/user/include/l4/mips64/asm.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     arch/mips64/asm.h
- * Description:   Assembler macros etc. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.2 2003/09/24 19:06:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __ARCH__MIPS64__ASM_H__
-#define __ARCH__MIPS64__ASM_H__
-
-#define BEGIN_PROC(name)			\
-    .global name;				\
-    .align 3;					\
-    .ent name;					\
-name:
-
-#define END_PROC(name)				\
-    .end name
-
-/*
- * EXPORT - export definition of symbol
- */
-#define EXPORT(symbol)				\
-    .globl  symbol;				\
-symbol:
-
-
-#endif /* __ARCH__MIPS64__ASM_H__ */
diff --git a/user/include/l4/mips64/kdebug.h b/user/include/l4/mips64/kdebug.h
deleted file mode 100644
index fe72b48b..00000000
--- a/user/include/l4/mips64/kdebug.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002-2003,  University of New South Wales
- *
- * File path:	l4/mips64/kdebug.h
- * Description:	L4 Kdebug interface for Mips64.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: kdebug.h,v 1.11 2006/12/05 17:09:24 skoglund Exp $
- *
- ***************************************************************************/
-#ifndef __L4__MIPS64__KDEBUG_H__
-#define __L4__MIPS64__KDEBUG_H__
-
-#define __L4_TRAP_KPUTC		(-100ul)
-#define __L4_TRAP_KGETC		(-101ul)
-#define __L4_TRAP_KDEBUG	(-102ul)
-#define __L4_TRAP_KGETC_NB	(-104ul)
-#define __L4_TRAP_READ_PERF	(-110ul)
-#define __L4_TRAP_WRITE_PERF	(-111ul)
-
-#define L4_KDB_Enter(str...)			\
-do {						\
-    __asm__ __volatile__ (			\
-	".set	noat\n\t"			\
-	"li	$1, %0\n\t"			\
-	"dla	$2, 1f		    \n\t"	\
-	"break			    \n\t"	\
-	".set	at\n\t"				\
-	"	.data		    \n\t"	\
-	"1: .string	" #str ";"		\
-	"	.previous	    \n\t"	\
-	: : "i" (__L4_TRAP_KDEBUG) : "memory", "$1", "$2"	\
-    );						\
-} while (0)
-
-#define __L4_KDB_Op_Arg(op, name, argtype)	\
-L4_INLINE void L4_KDB_##name (argtype arg)	\
-{						\
-    register char r_c asm("$4") = arg;		\
-    __asm__ __volatile__ (			\
-	    ".set noat\n\t"			\
-	    "li     $1, %0\n\t"			\
-	    "break\n\t"				\
-	    ".set at\n\t"			\
-	    : : "i" (op), "r" (r_c) : "$1"	\
-	    );					\
-}
-
-
-#define __L4_KDB_Op_Ret(op, name, rettype)	\
-L4_INLINE rettype L4_KDB_##name (void)		\
-{						\
-    register char ret asm("$2");		\
-    __asm__ __volatile__ (			\
-	".set noat	\n\t"			\
-	"li	$1, %1	\n\t"			\
-	"break		\n\t"			\
-	".set at	\n\t"			\
-	: "=r" (ret) : "i" (op) : "$1"		\
-    );						\
-    return ret;					\
-}
-
-__L4_KDB_Op_Ret( __L4_TRAP_KGETC, ReadChar_Blocked, char );
-__L4_KDB_Op_Ret( __L4_TRAP_KGETC_NB, ReadChar, long );
-__L4_KDB_Op_Arg( __L4_TRAP_KPUTC, PrintChar, char );
-
-#endif /* !__L4__MIPS64__KDEBUG_H__ */
diff --git a/user/include/l4/mips64/regdef.h b/user/include/l4/mips64/regdef.h
deleted file mode 100644
index a6bb11a2..00000000
--- a/user/include/l4/mips64/regdef.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:
- * Created:       20/08/2002 by Carl van Schaik
- * Description:   MIPS Register Descriptions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: regdef.h,v 1.3 2003/09/24 19:06:25 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef _ARCH_MIPS64_REGDEF_H_
-#define _ARCH_MIPS64_REGDEF_H_
-
-#define zero		$0  /* hardwired to zero */
-#define AT		$1  /* assembler temporary */
-#define v0		$2  /* result */
-#define v1		$3
-/* argument registers */
-#define a0		$4
-#define a1		$5
-#define a2		$6
-#define a3		$7
-#define a4		$8  /* ABI64 names */
-#define a5		$9
-#define a6		$10
-#define a7		$11
-/* temporary registers */
-#define t0		$8
-#define t1		$9
-#define t2		$10
-#define t3		$11
-#define t4		$12
-#define t5		$13
-#define t6		$14
-#define t7		$15
-/* saved registers */
-#define s0		$16
-#define s1		$17
-#define s2		$18
-#define s3		$19
-#define s4		$20
-#define s5		$21
-#define s6		$22
-#define s7		$23
-/* extra temporaries */
-#define t8		$24
-#define t9		$25
-/* kernel registers - don't touch */
-#define k0		$26
-#define k1		$27
-
-#define gp		$28	/* global pointer */
-#define sp		$29	/* stack pointer */
-#define fp		$30	/* frame pointer */
-#define s8		$30	/* or saved register */
-#define ra		$31	/* return address */
-
-#endif /* _ARCH_MIPS64_REGDEF_H_ */
diff --git a/user/include/l4/mips64/specials.h b/user/include/l4/mips64/specials.h
deleted file mode 100644
index 73d90d25..00000000
--- a/user/include/l4/mips64/specials.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     l4/mips64/specials.h
- * Description:   MIPS64 specific functions and defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: specials.h,v 1.3 2003/09/24 19:06:25 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS64__SPECIALS_H__
-#define __L4__MIPS64__SPECIALS_H__
-
-/*
- * Architecture specific helper functions.
- */
-
-L4_INLINE int __L4_Msb (L4_Word_t w) __attribute__ ((const));
-
-L4_INLINE int __L4_Msb (L4_Word_t w)
-{
-    int bitnum;
-
-    if (w == 0)
-	return 64;
-
-    for (bitnum = 0, w >>= 1; w != 0; bitnum++)
-	w >>= 1;
-
-    return bitnum;
-}
-
-
-#endif /* !__L4__MIPS64__SPECIALS_H__ */
diff --git a/user/include/l4/mips64/syscalls.h b/user/include/l4/mips64/syscalls.h
deleted file mode 100644
index 1de5def0..00000000
--- a/user/include/l4/mips64/syscalls.h
+++ /dev/null
@@ -1,343 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,   University of New South Wales
- *                
- * File path:     l4/mips64/syscalls.h
- * Description:   MIPS64 system call ABI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.14 2005/08/02 01:22:37 cvansch Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS64__SYSCALLS_H__
-#define __L4__MIPS64__SYSCALLS_H__
-
-#include <l4/types.h>
-#include <l4/message.h>
-
-
-/* The application gets the kernel info page by doing some illegal
- * instruction, with at ($1) == 0x1face (interface) ca11 (call) 14 (L4) e1f
- * (ELF) 64 (MIPS64)
- */
-#define __L4_MAGIC_KIP_REQUEST          (0x1FACECA1114e1f64ULL)
-
-/* Memory attributes for MIPS64 memory control */
-#define L4_UncachedMemory	1
-#define L4_WriteBackMemory	2
-#define L4_WriteThroughMemory	3
-#define L4_WriteThroughNoAllocMemory	4
-#define L4_CoherentMemory	5
-#define L4_FlushICache		29
-#define L4_FlushDCache		30
-#define L4_FlushCache		31
-
-
-L4_INLINE void * L4_KernelInterface (L4_Word_t *ApiVersion,
-				     L4_Word_t *ApiFlags,
-				     L4_Word_t *KernelId)
-{
-    register void * base_address	asm ("$8");  /* t0 */
-    register L4_Word_t api_version	asm ("$9");  /* t1 */
-    register L4_Word_t api_flags	asm ("$10"); /* t2 */
-    register L4_Word_t kernel_id	asm ("$11"); /* t3 */
-
-    __asm__ __volatile__ (".set noat;\n\t");
-    register L4_Word_t i asm("$1")= __L4_MAGIC_KIP_REQUEST;
-
-    __asm__ __volatile__ (
-	".word 0x07FFFFFF;\r\n"
-	".set at;     \n\r"
-	: "=r" (base_address), "=r" (api_version), "=r" (api_flags),
-	"=r" (kernel_id)
-	: "r" (i)
-    );
-
-
-    if( ApiVersion ) *ApiVersion = api_version;
-    if( ApiFlags ) *ApiFlags = api_flags;
-    if( KernelId ) *KernelId = kernel_id;
-
-    return base_address;
-}
-
-/* Implemented in exregs.S */
-typedef L4_ThreadId_t (*__L4_ExchangeRegisters_t)(L4_ThreadId_t dest,
-						  L4_Word_t control,
-						  L4_Word_t sp,
-						  L4_Word_t ip,
-						  L4_Word_t flags,
-						  L4_Word_t UserDefHandle,
-						  L4_ThreadId_t pager);
-extern __L4_ExchangeRegisters_t __L4_ExchangeRegisters;
-
-L4_INLINE L4_ThreadId_t L4_ExchangeRegisters (L4_ThreadId_t dest,
-					      L4_Word_t control,
-					      L4_Word_t sp,
-					      L4_Word_t ip,
-					      L4_Word_t flags,
-					      L4_Word_t UserDefHandle,
-					      L4_ThreadId_t pager,
-					      L4_Word_t *old_control,
-					      L4_Word_t *old_sp,
-					      L4_Word_t *old_ip,
-					      L4_Word_t *old_flags,
-					      L4_Word_t *old_UserDefHandle,
-				    L4_ThreadId_t *old_pager)
-{
-    register L4_ThreadId_t r_dest	asm ("$2");
-    register L4_Word_t r_control	asm ("$4");
-    register L4_Word_t r_sp		asm ("$5");
-    register L4_Word_t r_ip		asm ("$6");
-    register L4_Word_t r_flags		asm ("$7");
-    register L4_Word_t r_userhandle	asm ("$8");
-    register L4_ThreadId_t r_pager	asm ("$9");
-
-    __L4_ExchangeRegisters(dest, control, sp, ip, flags, UserDefHandle, pager);
-    __asm__ __volatile__ ( ""
-	    : "=r" (r_dest), "=r" (r_control), "=r" (r_sp), "=r" (r_ip),
-	      "=r" (r_flags), "=r" (r_userhandle), "=r" (r_pager)
-    );
-
-    *old_control = r_control;
-    *old_sp = r_sp;
-    *old_ip = r_ip;
-    *old_flags = r_flags;
-    *old_UserDefHandle = r_userhandle;
-    *old_pager = r_pager;
-
-    return r_dest;
-}
-
-typedef L4_Word_t (*__L4_ThreadControl_t)(L4_ThreadId_t, L4_ThreadId_t, L4_ThreadId_t, L4_ThreadId_t, void *);
-extern __L4_ThreadControl_t __L4_ThreadControl;
-
-L4_INLINE L4_Word_t L4_ThreadControl (L4_ThreadId_t dest,
-				      L4_ThreadId_t SpaceSpecifier,
-				      L4_ThreadId_t Scheduler,
-				      L4_ThreadId_t Pager,
-				      void * UtcbLocation)
-{
-    return __L4_ThreadControl(dest, SpaceSpecifier, Scheduler, Pager, UtcbLocation);
-}
-
-typedef L4_Word64_t (*__L4_SystemClock_t)(void);
-extern __L4_SystemClock_t __L4_SystemClock;
-
-L4_INLINE L4_Clock_t L4_SystemClock (void)
-{
-    return (L4_Clock_t){ raw: __L4_SystemClock() };
-}
-
-typedef L4_Word_t (*__L4_ThreadSwitch_t)(L4_ThreadId_t);
-extern __L4_ThreadSwitch_t __L4_ThreadSwitch;
-
-L4_INLINE L4_Word_t L4_ThreadSwitch (L4_ThreadId_t dest)
-{
-    return __L4_ThreadSwitch(dest);
-}
-
-typedef L4_Word_t (*__L4_Schedule_t)(L4_ThreadId_t dest, L4_Word_t TimeControl, 
-				      L4_Word_t ProcessorControl, L4_Word_t prio, L4_Word_t PreemptionControl); 
-extern __L4_Schedule_t __L4_Schedule;
-
-L4_INLINE L4_Word_t  L4_Schedule (L4_ThreadId_t dest,
-				  L4_Word_t TimeControl,
-				  L4_Word_t ProcessorControl,
-				  L4_Word_t prio,
-				  L4_Word_t PreemptionControl,
-				  L4_Word_t * old_TimeControl)
-{
-    register L4_Word_t r_result          asm ("$2");
-    register L4_ThreadId_t r_dest        asm ("$4"); /* out old_TimeControl */
-
-    __L4_Schedule(dest, TimeControl, ProcessorControl, prio, PreemptionControl);
-    __asm__ __volatile__ ("" : "=r" (r_result), "=r" (r_dest));
-
-    if(old_TimeControl)
-	*old_TimeControl = r_dest.raw;
-
-    return r_result;
-}
-
-typedef L4_ThreadId_t (*__L4_Ipc_t)(L4_ThreadId_t to, L4_ThreadId_t FromSpecifier, L4_Word_t Timeouts);
-extern __L4_Ipc_t __L4_Ipc;
-
-L4_INLINE L4_MsgTag_t L4_Ipc (L4_ThreadId_t to,
-			      L4_ThreadId_t FromSpecifier,
-			      L4_Word_t Timeouts,
-			      L4_ThreadId_t * from)
-{
-    L4_MsgTag_t tag;
-    register L4_ThreadId_t to_r asm ("$4") = to;
-    register L4_ThreadId_t from_r asm ("$5") = FromSpecifier;
-    register L4_Word_t timeout_r asm ("$6") = Timeouts;
-    register L4_ThreadId_t result asm ("$2");
-    register L4_Word_t mr0 asm ("$3");
-    register L4_Word_t mr1 asm ("$16");
-    register L4_Word_t mr2 asm ("$17");
-    register L4_Word_t mr3 asm ("$18");
-    register L4_Word_t mr4 asm ("$19");
-    register L4_Word_t mr5 asm ("$20");
-    register L4_Word_t mr6 asm ("$21");
-    register L4_Word_t mr7 asm ("$22");
-    register L4_Word_t mr8 asm ("$23");
-
-    // Only load MRs if send phase is included
-    if (! L4_IsNilThread (to))
-    {
-	mr0 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  0];
-	mr1 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  1];
-	mr2 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  2];
-	mr3 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  3];
-	mr4 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  4];
-	mr5 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  5];
-	mr6 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  6];
-	mr7 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  7];
-	mr8 = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  8];
-
-	__asm__ __volatile__ ("" : :
-	    "r" (mr0), "r" (mr1), "r" (mr2), "r" (mr3),
-	    "r" (mr4), "r" (mr5), "r" (mr6), "r" (mr7), "r" (mr8)
-	    : "$1", "$7", "$8", "$9", "$10", "$11",
-	      "$12", "$13", "$14", "$15",
-	      "$24", "$25", /*"$28",*/ "$31"
-	    );   /* s8, sp saved */
-    }
-
-//    result = __L4_Ipc(to, FromSpecifier, Timeouts);
-    __asm__ __volatile__ (
-	"   ld		$2, __L4_Ipc	    \n\r"
-	"   jalr	$2		    \n\r"
-	:
-	"=r" (mr0), "=r" (mr1), "=r" (mr2), "=r" (mr3),
-	"=r" (mr4), "=r" (mr5), "=r" (mr6), "=r" (mr7), "=r" (mr8),
-	"=r" (result), "+r" (to_r), "+r" (from_r), "+r" (timeout_r)
-	:
-	: "$1", "$7", "$8", "$9", "$10", "$11", "$12",
-	  "$13", "$14", "$15", "$24", "$25", /*"$28",*/ "$31",
-	  "memory"
-	);
-   
-    if( !L4_IsNilThread(FromSpecifier) ) {
-	*from = result;
-
-	(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  1] = mr1;
-	(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  2] = mr2;
-	(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  3] = mr3;
-	(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  4] = mr4;
-	(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  5] = mr5;
-	(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  6] = mr6;
-	(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  7] = mr7;
-	(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  8] = mr8;
-    }
-
-    /* Return MR0 */
-    tag.raw = mr0;
-    return tag;
-}
-
-typedef L4_ThreadId_t (*__L4_Lipc_t)(L4_ThreadId_t to, L4_ThreadId_t FromSpecifier, L4_Word_t Timeouts);
-extern __L4_Lipc_t __L4_Lipc;
-
-L4_INLINE L4_MsgTag_t L4_Lipc (L4_ThreadId_t to,
-			       L4_ThreadId_t FromSpecifier,
-			       L4_Word_t Timeouts,
-			       L4_ThreadId_t * from)
-{
-    L4_MsgTag_t mr0;
-    L4_ThreadId_t result;
-
-    result = __L4_Lipc(to, FromSpecifier, Timeouts);
-   
-    if( !L4_IsNilThread(FromSpecifier) ) {
-	*from = result;
-    }
-
-    /* Return MR0 */
-    L4_StoreMR(0, (L4_Word_t *) &mr0);
-    return mr0;
-}
-
-
-typedef void (*__L4_Unmap_t)(L4_Word_t);
-extern __L4_Unmap_t __L4_Unmap;
-
-L4_INLINE void L4_Unmap (L4_Word_t control)
-{
-    __L4_Unmap(control);
-}
-
-typedef void (*__L4_SpaceControl_t)(L4_ThreadId_t SpaceSpecifier,
-				     L4_Word_t control,
-				     L4_Fpage_t KernelInterfacePageArea,
-				     L4_Fpage_t UtcbArea,
-				     L4_ThreadId_t redirector);
-extern __L4_SpaceControl_t __L4_SpaceControl;
-
-L4_INLINE L4_Word_t L4_SpaceControl (L4_ThreadId_t SpaceSpecifier,
-				     L4_Word_t control,
-				     L4_Fpage_t KernelInterfacePageArea,
-				     L4_Fpage_t UtcbArea,
-				     L4_ThreadId_t redirector,
-				     L4_Word_t *old_control)
-{
-    register L4_Word_t r_result         asm ("$2");
-    register L4_ThreadId_t r_space	asm ("$4") = SpaceSpecifier; /* and old_control */
-
-    __L4_SpaceControl(SpaceSpecifier, control, KernelInterfacePageArea, UtcbArea, redirector);
-    __asm__ __volatile__ ("" : "=r" (r_result), "=r" (r_space));
-
-    if(old_control)
-	*old_control = r_space.raw;
-
-    return r_result;
-}
-
-
-typedef L4_Word_t (*__L4_ProcessorControl_t)(L4_Word_t ProcessorNo,
-					  L4_Word_t InternalFrequency,
-					  L4_Word_t ExternalFrequency,
-					  L4_Word_t voltage);
-extern __L4_ProcessorControl_t __L4_ProcessorControl;
-    
-L4_INLINE L4_Word_t L4_ProcessorControl (L4_Word_t ProcessorNo,
-					 L4_Word_t InternalFrequency,
-					 L4_Word_t ExternalFrequency,
-					 L4_Word_t voltage)
-{
-    return __L4_ProcessorControl(ProcessorNo, InternalFrequency, ExternalFrequency, voltage);
-}
-
-typedef L4_Word_t (*__L4_MemoryControl_t)(L4_Word_t control,
-				L4_Word_t attr0, L4_Word_t attr1,
-				L4_Word_t attr2, L4_Word_t attr3);
-extern __L4_MemoryControl_t __L4_MemoryControl;
-
-L4_INLINE L4_Word_t L4_MemoryControl (L4_Word_t control,
-				 const L4_Word_t * attributes)
-{
-    return __L4_MemoryControl(control, attributes[0], attributes[1], attributes[2], attributes[3]);
-}
-
-#endif /* !__L4__MIPS64__SYSCALLS_H__ */
diff --git a/user/include/l4/mips64/types.h b/user/include/l4/mips64/types.h
deleted file mode 100644
index f1c44d30..00000000
--- a/user/include/l4/mips64/types.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,   University of New South Wales
- *                
- * File path:     l4/mips64/types.h
- * Description:   MIPS64 specific type declararions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.9 2006/10/26 12:17:30 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __L4__MIPS64__TYPES_H__
-#define __L4__MIPS64__TYPES_H__
-
-#define L4_64BIT
-
-#if defined(MIPS64_BIG_ENDIAN)
-#define L4_BIG_ENDIAN
-#elif defined(MIPS64_LITTLE_ENDIAN)
-#define L4_LITTLE_ENDIAN
-#else
-#error No endianness configured
-#endif
-
-typedef unsigned long		L4_Word64_t;
-typedef unsigned int		L4_Word32_t;
-typedef unsigned short		L4_Word16_t;
-typedef unsigned char		L4_Word8_t;
-
-typedef unsigned long		L4_Word_t;
-
-typedef signed long		L4_SignedWord64_t;
-typedef signed int		L4_SignedWord32_t;
-typedef signed short		L4_SignedWord16_t;
-typedef signed char		L4_SignedWord8_t;
-
-typedef signed long		L4_SignedWord_t;
-
-typedef long unsigned int	L4_Size_t;
-
-#endif /* !__L4__MIPS64__TYPES_H__ */
diff --git a/user/include/l4/mips64/vregs.h b/user/include/l4/mips64/vregs.h
deleted file mode 100644
index 8f84d561..00000000
--- a/user/include/l4/mips64/vregs.h
+++ /dev/null
@@ -1,272 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,   University of New South Wales
- *                
- * File path:     l4/mips64/vregs.h
- * Description:   Mips64 virtual register ABI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: vregs.h,v 1.8 2004/04/28 03:04:36 cvansch Exp $
- *                
- ********************************************************************/
-
-#ifndef __L4__MIPS64__VREGS_H__
-#define __L4__MIPS64__VREGS_H__
-
-#define __L4_TRAP_GETUTCB	(-103ul)
-
-L4_INLINE L4_Word_t *__L4_Mips64_Utcb( void ) __attribute__ ((const));
-L4_INLINE L4_Word_t *__L4_Mips64_Utcb( void )
-{
-    register L4_Word_t * utcb asm ("$26");	// k0
-    return utcb;
-}
-
-/*
- * Location of TCRs within UTCB.
- */
-
-#define __L4_TCR_BR_OFFSET		        (80)
-#define __L4_TCR_MR_OFFSET		        (16)
-#define __L4_TCR_THREAD_WORD1    		(11)
-#define __L4_TCR_THREAD_WORD0    		(10)
-#define __L4_TCR_VIRTUAL_ACTUAL_SENDER		(9)
-#define __L4_TCR_INTENDED_RECEIVER		(8)
-#define __L4_TCR_ERROR_CODE			(7)
-#define __L4_TCR_XFER_TIMEOUT			(6)
-#define __L4_TCR_COP_FLAGS			(5)
-#define __L4_TCR_PREEMPT_FLAGS			(5)
-#define __L4_TCR_EXCEPTION_HANDLER		(4)
-#define __L4_TCR_PAGER				(3)
-#define __L4_TCR_USER_DEFINED_HANDLE		(2)
-#define __L4_TCR_PROCESSOR_NO			(1)
-#define __L4_TCR_MY_GLOBAL_ID			(0)
-
-typedef struct {
-    L4_Word8_t	    PreemptFlags;
-    L4_Word8_t	    CopFlags;
-    L4_Word16_t	    __reserved0;
-    L4_Word32_t	    __reserved1;
-} UtcbParts;
-
-/*
- * Thread Control Registers.
- */
-
-L4_INLINE L4_Word_t __L4_TCR_MyGlobalId( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_MY_GLOBAL_ID ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_MyLocalId( void )
-{
-    return (L4_Word_t) __L4_Mips64_Utcb();
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ProcessorNo( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_PROCESSOR_NO ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_UserDefinedHandle( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_USER_DEFINED_HANDLE ];
-}
-
-L4_INLINE void __L4_TCR_Set_UserDefinedHandle( L4_Word_t w )
-{
-    (__L4_Mips64_Utcb())[ __L4_TCR_USER_DEFINED_HANDLE ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_Pager( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_PAGER ];
-}
-
-L4_INLINE void __L4_TCR_Set_Pager( L4_Word_t w )
-{
-    (__L4_Mips64_Utcb())[ __L4_TCR_PAGER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ExceptionHandler( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_EXCEPTION_HANDLER ];
-}
-
-L4_INLINE void __L4_TCR_Set_ExceptionHandler( L4_Word_t w )
-{
-    (__L4_Mips64_Utcb())[ __L4_TCR_EXCEPTION_HANDLER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ErrorCode( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_ERROR_CODE ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_XferTimeout( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_XFER_TIMEOUT ];
-}
-
-L4_INLINE void __L4_TCR_Set_XferTimeout( L4_Word_t w )
-{
-    (__L4_Mips64_Utcb())[ __L4_TCR_XFER_TIMEOUT ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_IntendedReceiver( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_INTENDED_RECEIVER ];
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ActualSender( void )
-{
-    return (__L4_Mips64_Utcb())[ __L4_TCR_VIRTUAL_ACTUAL_SENDER ];
-}
-
-L4_INLINE void __L4_TCR_Set_VirtualSender( L4_Word_t w )
-{
-    (__L4_Mips64_Utcb())[ __L4_TCR_VIRTUAL_ACTUAL_SENDER ] = w;
-}
-
-L4_INLINE L4_Word_t __L4_TCR_ThreadWord (L4_Word_t n)
-{
-    return (__L4_Mips64_Utcb ())[__L4_TCR_THREAD_WORD0 + (int) n];
-}
-
-L4_INLINE void __L4_TCR_Set_ThreadWord (L4_Word_t n, L4_Word_t w)
-{
-    (__L4_Mips64_Utcb ())[__L4_TCR_THREAD_WORD0 + (int) n] = w;
-}
-
-#define COP_FLAGS   ((UtcbParts *)&(__L4_Mips64_Utcb())[ __L4_TCR_COP_FLAGS ])->CopFlags
-
-L4_INLINE void L4_Set_CopFlag( L4_Word_t n )
-{
-    COP_FLAGS |= (1 << n);
-}
-
-L4_INLINE void L4_Clr_CopFlag( L4_Word_t n )
-{
-    COP_FLAGS &= ~(1 << n);
-}
-
-#define PREEMPT_FLAGS	((UtcbParts *)&(__L4_Mips64_Utcb())[ __L4_TCR_PREEMPT_FLAGS ])->PreemptFlags
-
-L4_INLINE L4_Bool_t L4_EnablePreemptionFaultException( void )
-{
-    L4_Bool_t old = (PREEMPT_FLAGS >> 5) & 1;
-    PREEMPT_FLAGS |= (1 << 5);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemptionFaultException( void )
-{
-    L4_Bool_t old = (PREEMPT_FLAGS >> 5) & 1;
-    PREEMPT_FLAGS &= ~(1 << 5);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_EnablePreemption( void )
-{
-    L4_Bool_t old = (PREEMPT_FLAGS >> 6) & 1;
-    PREEMPT_FLAGS |= (1 << 6);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_DisablePreemption( void )
-{
-    L4_Bool_t old = (PREEMPT_FLAGS >> 6) & 1;
-    PREEMPT_FLAGS &= ~(1 << 6);
-    return old;
-}
-
-L4_INLINE L4_Bool_t L4_PreemptionPending( void )
-{
-    L4_Bool_t retval = (PREEMPT_FLAGS >> 7) & 1;
-    return retval;
-}
-
-
-/*
- * Message Registers.
- */
-
-L4_INLINE void L4_StoreMR( int i, L4_Word_t * w )
-{
-    *w = (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET +  i ];
-}
-
-L4_INLINE void L4_LoadMR( int i, L4_Word_t w )
-{
-    (__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET + i ] = w;
-}
-
-L4_INLINE void L4_StoreMRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * mr = &(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET + i];
-
-    while( k-- > 0 )
-	*w++ = *mr++;
-}
-
-L4_INLINE void L4_LoadMRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * mr = &(__L4_Mips64_Utcb())[__L4_TCR_MR_OFFSET + i];
-
-    while( k-- > 0 )
-	*mr++ = *w++;
-}
-
-/*
- * Buffer Registers.
- */
-
-L4_INLINE void L4_StoreBR( int i, L4_Word_t * w )
-{
-    *w = (__L4_Mips64_Utcb())[__L4_TCR_BR_OFFSET + i ];
-}
-
-L4_INLINE void L4_LoadBR( int i, L4_Word_t w )
-{
-    (__L4_Mips64_Utcb())[__L4_TCR_BR_OFFSET + i ] = w;
-}
-
-L4_INLINE void L4_StoreBRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * br = &(__L4_Mips64_Utcb())[__L4_TCR_BR_OFFSET + i];
-
-    while( k-- > 0 )
-	*w++ = *br++;
-}
-
-L4_INLINE void L4_LoadBRs( int i, int k, L4_Word_t * w )
-{
-    L4_Word_t * br = &(__L4_Mips64_Utcb())[__L4_TCR_BR_OFFSET +  i];
-
-    while( k-- > 0 )
-	*br++ = *w++;
-}
-
-
-#endif	/* __L4__MIPS64__VREGS_H__ */
-
diff --git a/user/include/l4/sparc64/asm.h b/user/include/l4/sparc64/asm.h
deleted file mode 100644
index eae6fef0..00000000
--- a/user/include/l4/sparc64/asm.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     l4/sparc64/asm.h
- * Description:   Assembler macros for sparc64. 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: asm.h,v 1.2 2003/09/24 19:06:26 skoglund Exp $
- *                
- ********************************************************************/
-
-#ifndef __L4_SPARC64__ASM_H__
-#define __L4_SPARC64__ASM_H__
-
-#define BEGIN_PROC(name, sect) \
-  	.section sect;         \
-	.align 8;              \
-	.globl name;           \
-	.type name,@function;  \
-name:
-
-
-#endif /* !__L4_SPARC64__ASM_H__ */
diff --git a/user/include/l4/sparc64/kdebug.h b/user/include/l4/sparc64/kdebug.h
deleted file mode 100644
index d74b06ea..00000000
--- a/user/include/l4/sparc64/kdebug.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     l4/sparc64/kdebug.h
- * Description:   SPARC v9 kernel debugger interface
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: kdebug.h,v 1.4 2004/02/15 23:05:04 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __L4__SPARC64__KDEBUG_H__
-#define __L4__SPARC64__KDEBUG_H__
-
-#define __L4_TRAP_KDB_PUTC		0x7c
-#define __L4_TRAP_KDB_GETC		0x7d
-#define __L4_TRAP_KDB_GETC_NB		0x7e
-#define __L4_TRAP_KDB_ENTER		0x7f
-
-#define L4_KDB_Enter(str...)					\
-do {                         					\
-    asm volatile (						\
-	"setx	1f, %%g1, %%o0\n\t"				\
-	"ldub	[ %%o0 ], %%g0\n\t"				\
-	"ta	%0\n\t"						\
-	".data\n\t"						\
-	"1:	.string " #str "\n\t 2:"			\
-	".previous"						\
-	:: "i" (__L4_TRAP_KDB_ENTER) : "memory", "g1",		\
-		"o0", "o1", "o2", "o3", "o4", "o5"		\
-    );								\
-} while(0)
-
-#define __L4_KDB_Op_Arg(op, name, argtype) 			\
-L4_INLINE void L4_KDB_##name(argtype arg)      			\
-{                                          			\
-    register char r_c asm("o0") = arg;				\
-    __asm__ __volatile__ (					\
-	"ta	%0"						\
-	:: "r" (op), "r" (r_c) : "g1", "g4", "g5",		\
-		"o1", "o2", "o3", "o4", "o5"			\
-    );								\
-} // L4_KDB_##name()
-
-#define __L4_KDB_Op_Ret(op, name, rettype) 			\
-L4_INLINE rettype L4_KDB_##name(void)				\
-{								\
-    register char ret asm("o0");				\
-    __asm__ __volatile__ (					\
-	"ta	%1"						\
-	: "=r" (ret) : "r" (op) : "g1", "g4", "g5",		\
-		"o1", "o2", "o3", "o4", "o5"			\
-    );								\
-    return ret;							\
-} // L4_KDB_##name()
-
-
-__L4_KDB_Op_Ret(__L4_TRAP_KDB_GETC, ReadChar_Blocked, char);
-__L4_KDB_Op_Ret(__L4_TRAP_KDB_GETC_NB, ReadChar, char);
-__L4_KDB_Op_Arg(__L4_TRAP_KDB_PUTC, PrintChar, char);
-
-
-#endif /* !__L4__SPARC64__KDEBUG_H__ */
diff --git a/user/include/l4/sparc64/specials.h b/user/include/l4/sparc64/specials.h
deleted file mode 100644
index 009139a5..00000000
--- a/user/include/l4/sparc64/specials.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     l4/sparc64/specials.h
- * Description:   SPARC v9 specific functions and defines
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: specials.h,v 1.3 2004/02/10 04:49:52 philipd Exp $
- *                
- ********************************************************************/
-#ifndef __L4__SPARC64__SPECIALS_H__
-#define __L4__SPARC64__SPECIALS_H__
-
-L4_INLINE int __L4_Msb (L4_Word_t w) __attribute__ ((const));
-
-L4_INLINE int __L4_Msb (L4_Word_t w)
-{
-    /* philipd (10/02/04): use the plain C loop rather than POPC, because that
-     * instruction must be emulated on the UltraSPARC. */
-    int bitnum;
-
-    if (w == 0)
-	return 64;
-
-    for (bitnum = 0, w >>= 1; w != 0; bitnum++)
-	w >>= 1;
-
-    return bitnum;
-}
-
-
-#endif /* !__L4__SPARC64__SPECIALS_H__ */
diff --git a/user/include/l4/sparc64/syscalls.h b/user/include/l4/sparc64/syscalls.h
deleted file mode 100644
index 6044ad06..00000000
--- a/user/include/l4/sparc64/syscalls.h
+++ /dev/null
@@ -1,313 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  University of New South Wales
- *                
- * File path:     l4/sparc64/syscalls.h
- * Description:   SPARC v9 system call ABI
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: syscalls.h,v 1.7 2004/08/23 18:43:17 skoglund Exp $
- *                
- ********************************************************************/
-#ifndef __L4__SPARC64__SYSCALLS_H__
-#define __L4__SPARC64__SYSCALLS_H__
-
-#include <l4/types.h>
-#include <l4/message.h>
-
-#include <l4/sparc64/vregs.h>
-#include <l4/sparc64/kdebug.h>
-
-L4_INLINE void *
-L4_KernelInterface(L4_Word_t *ApiVersion,
-		   L4_Word_t *ApiFlags,
-		   L4_Word_t *KernelId)
-{
-    register void* result asm ("o0");
-    register L4_Word_t version asm ("o1");
-    register L4_Word_t flags asm ("o2");
-    register L4_Word_t id asm ("o3");
-
-    /* trap to the kernel */
-    asm volatile (
-	"ta	0x70\n\t"
-	:
-	"=r" (result), "=r" (version), "=r" (flags), "=r" (id)
-    );
-
-    if(ApiVersion) *ApiVersion = version;
-    if(ApiFlags) *ApiFlags = flags;
-    if(KernelId) *KernelId = id;
-    return result;
-}
-
-typedef L4_Word_t (*__L4_ExchangeRegisters_t)( L4_Word_t, L4_Word_t, L4_Word_t,
-	L4_Word_t, L4_Word_t, L4_Word_t );
-extern __L4_ExchangeRegisters_t __L4_ExchangeRegisters;
-
-L4_INLINE L4_ThreadId_t
-L4_ExchangeRegisters(L4_ThreadId_t dest,
-		     L4_Word_t control,
-		     L4_Word_t sp,
-		     L4_Word_t ip,
-		     L4_Word_t flags,
-		     L4_Word_t UserDefHandle,
-		     L4_ThreadId_t pager,
-		     L4_Word_t *old_control,
-		     L4_Word_t *old_sp,
-		     L4_Word_t *old_ip,
-		     L4_Word_t *old_flags,
-		     L4_Word_t *old_UserDefHandle,
-		     L4_ThreadId_t *old_pager)
-{
-    register L4_Word_t r_control asm ("o1");
-    register L4_Word_t r_sp asm ("o2");
-    register L4_Word_t r_ip asm ("o3");
-    register L4_ThreadId_t r_pager asm ("o4");
-    register L4_Word_t r_UserDefHandle asm ("o5");
-    register L4_Word_t r_flags asm ("g4");
-    L4_ThreadId_t r_dest;
-
-    r_flags = flags;
-
-    asm volatile ("" :: "r" (r_flags));
-    r_dest.raw = __L4_ExchangeRegisters(dest.raw, control, sp, ip, pager.raw,
-					UserDefHandle);
-    asm volatile ("" : "=r" (r_control), "=r" (r_sp), "=r" (r_ip), "=r" (r_pager),
-		  "=r" (r_UserDefHandle), "=r" (r_flags));
-
-    *old_control = r_control;
-    *old_sp = r_sp;
-    *old_ip = r_ip;
-    *old_flags = r_flags;
-    *old_UserDefHandle = r_UserDefHandle;
-    *old_pager = r_pager;
-
-    return r_dest;
-}
-
-typedef L4_Word_t (*__L4_ThreadControl_t)( L4_Word_t, L4_Word_t, L4_Word_t, L4_Word_t, L4_Word_t );
-extern __L4_ThreadControl_t __L4_ThreadControl;
-
-L4_INLINE L4_Word_t
-L4_ThreadControl(L4_ThreadId_t dest,
-		 L4_ThreadId_t SpaceSpecifier,
-		 L4_ThreadId_t Scheduler,
-		 L4_ThreadId_t Pager,
-		 void * utcb)
-{
-    return __L4_ThreadControl(dest.raw, SpaceSpecifier.raw, Scheduler.raw,
-			      Pager.raw, (L4_Word_t)utcb);
-} // L4_threadControl()
-
-typedef L4_Clock_t (*__L4_SystemClock_t)( void );
-extern __L4_SystemClock_t __L4_SystemClock;
-
-L4_INLINE L4_Clock_t
-L4_SystemClock(void)
-{
-    return __L4_SystemClock();
-} // L4_SystemClock()
-
-typedef L4_Word_t (*__L4_ThreadSwitch_t)( L4_Word_t );
-extern __L4_ThreadSwitch_t __L4_ThreadSwitch;
-
-L4_INLINE L4_Word_t
-L4_ThreadSwitch(L4_ThreadId_t dest)
-{
-    return __L4_ThreadSwitch(dest.raw);
-} // L4_ThreadSwitch()
-
-typedef L4_Word_t (*__L4_Schedule_t)( L4_Word_t, L4_Word_t, L4_Word_t, L4_Word_t, L4_Word_t );
-extern __L4_Schedule_t __L4_Schedule;
-
-L4_INLINE L4_Word_t
-L4_Schedule(L4_ThreadId_t dest,
-	    L4_Word_t TimeControl,
-	    L4_Word_t ProcessorControl,
-	    L4_Word_t prio,
-	    L4_Word_t PreemptionControl,
-	    L4_Word_t * old_TimeControl)
-{
-    register L4_Word_t r_timecontrol asm("o1");
-    L4_Word_t result;
-
-    result = __L4_Schedule(dest.raw, TimeControl, ProcessorControl, prio,
-			   PreemptionControl);
-    asm volatile ("" : "=r" (r_timecontrol));
-
-    if(old_TimeControl) {
-	*old_TimeControl = r_timecontrol;
-    }
-    
-    return result;
-} // L4_Schedule()
-
-typedef L4_Word_t (*__L4_Ipc_t)( L4_Word_t, L4_Word_t, L4_Word_t );
-extern __L4_Ipc_t __L4_Ipc;
-
-L4_INLINE L4_MsgTag_t
-L4_Ipc(L4_ThreadId_t to,
-       L4_ThreadId_t FromSpecifier,
-       L4_Word_t Timeouts,
-       L4_ThreadId_t * from)
-{
-    L4_MsgTag_t tag;
-    register L4_ThreadId_t to_from asm ("o0") = to;
-    register L4_ThreadId_t from_specifier asm ("o1") = FromSpecifier;
-    register L4_Word_t timeout asm ("o2") = Timeouts;
-    register L4_Word_t mr0 asm ("l0");
-    register L4_Word_t mr1 asm ("l1");
-    register L4_Word_t mr2 asm ("l2");
-    register L4_Word_t mr3 asm ("l3");
-    register L4_Word_t mr4 asm ("l4");
-    register L4_Word_t mr5 asm ("l5");
-    register L4_Word_t mr6 asm ("l6");
-    register L4_Word_t mr7 asm ("l7");
-
-    // Only load MRs if send phase is included
-    if (! L4_IsNilThread (to))
-    {
-	mr0 = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET +  0];
-	mr1 = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET +  1];
-	mr2 = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET +  2];
-	mr3 = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET +  3];
-	mr4 = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET +  4];
-	mr5 = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET +  5];
-	mr6 = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET +  6];
-	mr7 = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET +  7];
-
-	asm ("" : :
-	    "r" (mr0), "r" (mr1), "r" (mr2), "r" (mr3),
-	    "r" (mr4), "r" (mr5), "r" (mr6), "r" (mr7)
-	    : "g1", "g4", "g5", "g6", "o3", "o4", "o5",
-	      "i0", "i1", "i2", "i3", "i4", "i5"
-	    );   /* i7, o7, fp, sp saved */
-    }
-
-//    result = __L4_Ipc(to, FromSpecifier, Timeouts);
-    asm ("setx	__L4_Ipc, %%g4, %%g1\n\t"
-	 "ldx	[ %%g1 ], %%g1\n\t"
-	 "call	%%g1\n\t"
-	 "nop"
-	: "=r" (mr0), "=r" (mr1), "=r" (mr2), "=r" (mr3),
-	  "=r" (mr4), "=r" (mr5), "=r" (mr6), "=r" (mr7),
-	  "=r" (to_from)
-	: "r" (to_from), "r" (from_specifier), "r" (timeout)
-	: "g1", "g4", "g5", "g6", "o3", "o4", "o5", "o7",
-	  "i0", "i1", "i2", "i3", "i4", "i5"
-	);
-   
-    if( !L4_IsNilThread(FromSpecifier) ) {
-	*from = to_from;
-
-	(__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + 1] = mr1;
-	(__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + 2] = mr2;
-	(__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + 3] = mr3;
-	(__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + 4] = mr4;
-	(__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + 5] = mr5;
-	(__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + 6] = mr6;
-	(__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + 7] = mr7;
-    }
-
-    /* Return MR0 */
-    tag.raw = mr0;
-    return tag;
-} // L4_Ipc()
-
-typedef L4_Word_t (*__L4_Lipc_t)( L4_Word_t, L4_Word_t, L4_Word_t );
-extern __L4_Lipc_t __L4_Lipc;
-
-L4_INLINE L4_MsgTag_t
-L4_Lipc(L4_ThreadId_t to,
-	L4_ThreadId_t FromSpecifier,
-	L4_Word_t Timeouts,
-	L4_ThreadId_t *from)
-{
-    return L4_Ipc(to, FromSpecifier, Timeouts, from);
-} // L4_Lipc()
-
-typedef void (*__L4_Unmap_t)( L4_Word_t );
-extern __L4_Unmap_t __L4_Unmap;
-
-L4_INLINE void
-L4_Unmap(L4_Word_t control)
-{
-    __L4_Unmap(control);
-} // L4_Unmap()
-
-typedef L4_Word_t (*__L4_SpaceControl_t)( L4_Word_t, L4_Word_t, L4_Word_t,
-	L4_Word_t, L4_Word_t );
-extern __L4_SpaceControl_t __L4_SpaceControl;
-
-L4_INLINE L4_Word_t
-L4_SpaceControl(L4_ThreadId_t SpaceSpecifier,
-		L4_Word_t control,
-		L4_Fpage_t KernelInterfacePageArea,
-		L4_Fpage_t UtcbArea,
-		L4_ThreadId_t redirector,
-		L4_Word_t *old_control)
-{
-    register L4_Word_t r_control asm("o1");
-    L4_Word_t result;
-
-    result = __L4_SpaceControl(SpaceSpecifier.raw, control, KernelInterfacePageArea.raw,
-			       UtcbArea.raw, redirector.raw);
-    asm volatile ("" : "=r" (r_control));
-
-    if(old_control) {
-	*old_control = r_control;
-    }
-
-    return control;
-} // L4_SpaceControl()
-
-typedef L4_Word_t (*__L4_ProcessorControl_t)( L4_Word_t,  L4_Word_t,
-	L4_Word_t, L4_Word_t );
-extern __L4_ProcessorControl_t __L4_ProcessorControl;
-
-L4_INLINE L4_Word_t
-L4_ProcessorControl(L4_Word_t ProcessorNo,
-		    L4_Word_t control,
-		    L4_Word_t InternalFrequency,
-		    L4_Word_t ExternalFrequency,
-		    L4_Word_t voltage)
-{
-    /* XXX what is control for? How many arguments does this syscall have? */
-    return __L4_ProcessorControl(ProcessorNo, InternalFrequency,
-				 ExternalFrequency, voltage);
-} // L4_ProcessorControl()
-
-typedef L4_Word_t (*__L4_MemoryControl_t)( L4_Word_t, L4_Word_t, L4_Word_t, L4_Word_t, L4_Word_t );
-extern __L4_MemoryControl_t __L4_MemoryControl;
-
-L4_INLINE L4_Word_t
-L4_MemoryControl(L4_Word_t control,
-		 const L4_Word_t * attributes)
-{
-    return __L4_MemoryControl(control, attributes[0], attributes[1],
-			      attributes[2], attributes[4]);
-} // L4_MemoryControl()
-
-
-#endif /* !__L4__SPARC64__SYSCALLS_H__ */
diff --git a/user/include/l4/sparc64/types.h b/user/include/l4/sparc64/types.h
deleted file mode 100644
index d2adaee3..00000000
--- a/user/include/l4/sparc64/types.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     l4/sparc64/types.h
- * Description:   Sparc v9 specific type declararions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: types.h,v 1.4 2006/10/26 12:20:44 reichelt Exp $
- *                
- ********************************************************************/
-#ifndef __L4__SPARC64__TYPES_H__
-#define __L4__SPARC64__TYPES_H__
-
-#undef L4_32BIT
-#define L4_64BIT
-#undef L4_LITTLE_ENDIAN
-#define L4_BIG_ENDIAN
-
-typedef unsigned int __attribute__((__mode__(__DI__))) L4_Word64_t;
-typedef unsigned int		L4_Word32_t;
-typedef unsigned short		L4_Word16_t;
-typedef unsigned char		L4_Word8_t;
-
-typedef L4_Word64_t		L4_Word_t;
-
-typedef signed int __attribute__((__mode__(__DI__))) L4_SignedWord64_t;
-typedef signed int		L4_SignedWord32_t;
-typedef signed short		L4_SignedWord16_t;
-typedef signed char		L4_SignedWord8_t;
-
-typedef L4_SignedWord64_t	L4_SignedWord_t;
-
-typedef L4_Word64_t		L4_Size_t;
-
-
-#endif /* !__L4__SPARC64__TYPES_H__ */
diff --git a/user/include/l4/sparc64/vregs.h b/user/include/l4/sparc64/vregs.h
deleted file mode 100644
index 88525efc..00000000
--- a/user/include/l4/sparc64/vregs.h
+++ /dev/null
@@ -1,297 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003-2004,  University of New South Wales
- *                
- * File path:     l4/sparc64/vregs.h
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: vregs.h,v 1.3 2004/02/10 03:49:37 philipd Exp $
- *                
- ********************************************************************/
-
-#ifndef __L4__SPARC64__VREGS_H__
-#define __L4__SPARC64__VREGS_H__
-
-L4_INLINE L4_Word_t * __L4_Sparc64_Utcb(void) __attribute__ ((const));
-
-L4_INLINE L4_Word_t * __L4_Sparc64_Utcb(void)
-{
-    register L4_Word_t *utcb asm ("g7");
-    return utcb;
-}
-
-/************************
-* TCR locations in UTCB *
-************************/
-
-#define __L4_TCR_GLOBAL_ID             0
-#define __L4_TCR_PAGER                 1
-#define __L4_TCR_EXCEPTION_HANDLER     2
-#define __L4_TCR_USER_DEFINED_HANDLE   3
-#define __L4_TCR_XFER_TIMEOUT          4
-#define __L4_TCR_ERROR_CODE            5
-#define __L4_TCR_INTENDED_RECEIVER     6
-#define __L4_TCR_VIRTUAL_ACTUAL_SENDER 7
-#define __L4_TCR_PROCESSOR_NO          8
-#define __L4_TCR_PREEMPT_FLAGS         9
-#define __L4_TCR_COP_FLAGS             9
-#define __L4_TCR_THREAD_WORD0          10
-#define __L4_TCR_THREAD_WORD1          11
-#define __L4_TCR_BR_OFFSET             31
-#define __L4_TCR_MR_OFFSET             64
-
-
-/***************************
-* Thread Control Registers *
-***************************/
-
-L4_INLINE L4_Word_t
-__L4_TCR_MyGlobalId(void)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_GLOBAL_ID];
-} // __L4_TCR_MyGlobalId()
-
-L4_INLINE L4_Word_t
-__L4_TCR_MyLocalId(void)
-{
-    return (L4_Word_t)__L4_Sparc64_Utcb();
-} // __L4_TCR_MyLocalId()
-
-L4_INLINE L4_Word_t
-__L4_TCR_ProcessorNo(void)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_PROCESSOR_NO];
-} // __L4_TCR_ProcessorNo()
-
-L4_INLINE L4_Word_t
-__L4_TCR_UserDefinedHandle(void)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_USER_DEFINED_HANDLE];
-} // __L4_TCR_UserDefinedHandle()
-
-L4_INLINE void
-__L4_TCR_Set_UserDefinedHandle(L4_Word_t w)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_USER_DEFINED_HANDLE] =  w;
-} // __L4_TCR_Set_UserDefinedHandle()
-
-L4_INLINE L4_Word_t
-__L4_TCR_Pager(void)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_PAGER];
-
-} // __L4_TCR_Pager()
-
-L4_INLINE void
-__L4_TCR_Set_Pager(L4_Word_t w)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_PAGER] = w;
-} // __L4_TCR_Set_Pager()
-
-L4_INLINE L4_Word_t
-__L4_TCR_ExceptionHandler(void)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_EXCEPTION_HANDLER];
-} // __L4_TCR_ExceptionHandler()
-
-L4_INLINE void
-__L4_TCR_Set_ExceptionHandler(L4_Word_t w)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_EXCEPTION_HANDLER] = w;
-} // __L4_TCR_Set_ExceptionHandler()
-
-L4_INLINE L4_Word_t
-__L4_TCR_ErrorCode(void)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_ERROR_CODE];
-} // __L4_TCR_Error_Code()
-
-L4_INLINE L4_Word_t
-__L4_TCR_XferTimeout(void)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_XFER_TIMEOUT];
-} // __L4_TCR_XferTimeout()
-
-L4_INLINE void
-__L4_TCR_Set_XferTimeout(L4_Word_t w)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_XFER_TIMEOUT] = w;
-} // __L4_TCR_Set_XferTimeout()
-
-L4_INLINE L4_Word_t
-__L4_TCR_IntendedReceiver(void)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_INTENDED_RECEIVER];
-} // __L4_TCR_IntendedReceiver()
-
-L4_INLINE L4_Word_t
-__L4_TCR_ActualSender()
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_VIRTUAL_ACTUAL_SENDER];
-} // __L4_TCR_ActualSender()
-
-L4_INLINE void
-__L4_TCR_Set_VirtualSender(L4_Word_t w)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_VIRTUAL_ACTUAL_SENDER] = w;
-} // __L4_TCR_Set_VirtualSender()
-
-L4_INLINE L4_Word_t
-__L4_TCR_ThreadWord(L4_Word_t n)
-{
-    return (__L4_Sparc64_Utcb())[__L4_TCR_THREAD_WORD0 + n];
-} // __L4_TCR_ThreadWord()
-
-L4_INLINE void
-__L4_TCR_Set_ThreadWord(L4_Word_t n, L4_Word_t w)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_THREAD_WORD0 + n] = w;
-} // __L4_TCR_Set_ThreadWord()
-
-L4_INLINE void
-L4_Set_CopFlag(L4_Word_t n)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_COP_FLAGS + n] |= (1 << (8 + n));
-} // L4_Set_CopFlag()
-
-L4_INLINE void
-L4_Clr_CopFlag(L4_Word_t n)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_COP_FLAGS + n] &= ~(1 << (8 + n));
-} // L4_Clr_CopFlag()
-
-L4_INLINE L4_Bool_t
-L4_EnablePreemptionFaultException(void)
-{
-    L4_Bool_t old = ((__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] >> 5) & 1;
-    (__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] |= (1 << 5);
-    return old;
-} // L4_EnablePreemptionFaultException()
-
-L4_INLINE L4_Bool_t
-L4_DisablePreemptionFaultException(void)
-{
-    L4_Bool_t old = ((__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] >> 5) & 1;
-    (__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] &= ~(1 << 5);
-    return old;
-} // L4_DisablePreemptionFaultException()
-
-L4_INLINE L4_Bool_t
-L4_EnablePreemption(void)
-{
-    L4_Bool_t old = ((__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] >> 6) & 1;
-    (__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] |= (1 << 6);
-    return old;
-} // L4_EnablePreemption()
-
-L4_INLINE L4_Bool_t
-L4_DisablePreemption(void)
-{
-    L4_Bool_t old = ((__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] >> 6) & 1;
-    (__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] &= ~(1 << 6);
-    return old;
-} // L4_DisablePreemption()
-
-L4_INLINE L4_Bool_t
-L4_PreemptionPending(void)
-{
-    return ((__L4_Sparc64_Utcb())[__L4_TCR_PREEMPT_FLAGS] >> 7) & 1;
-} // L4_PreemptionPending()
-
-
-/********************
-* Message Registers *
-********************/
-
-L4_INLINE void
-L4_StoreMR(int i, L4_Word_t * w)
-{
-    *w = (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + i];
-} // L4_StoreMR()
-
-L4_INLINE void
-L4_LoadMR(int i, L4_Word_t w)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_MR_OFFSET + i] = w;
-} // L4_LoadMR()
-
-L4_INLINE void
-L4_StoreMRs(int i, int k, L4_Word_t * w)
-{
-    L4_Word_t* mr = __L4_Sparc64_Utcb() + __L4_TCR_MR_OFFSET + i;
-
-    while (k-- > 0) {
-	*w++ = *mr++;
-    }
-} // L4_StoreMRs()
-
-L4_INLINE void
-L4_LoadMRs(int i, int k, L4_Word_t * w)
-{
-    L4_Word_t* mr = __L4_Sparc64_Utcb() + __L4_TCR_MR_OFFSET + i;
-
-    while (k-- > 0) {
-	*mr++ = *w++;
-    }
-} // L4_LoadMRs()
-
-
-/*******************
-* Buffer Registers *
-*******************/
-
-L4_INLINE void
-L4_StoreBR(int i, L4_Word_t * w)
-{
-    *w = (__L4_Sparc64_Utcb())[__L4_TCR_BR_OFFSET + i];
-} // L4_StoreBR()
-
-L4_INLINE void
-L4_LoadBR(int i, L4_Word_t w)
-{
-    (__L4_Sparc64_Utcb())[__L4_TCR_BR_OFFSET + i] = w;
-} // L4_LoadBR()
-
-L4_INLINE void
-L4_StoreBRs(int i, int k, L4_Word_t * w)
-{
-    L4_Word_t* br = __L4_Sparc64_Utcb() + __L4_TCR_BR_OFFSET + i;
-
-    while (k-- > 0) {
-	*w++ = *br++;
-    }
-} // L4_StoreBRs()
-
-L4_INLINE void
-L4_LoadBRs(int i, int k, L4_Word_t * w)
-{
-    L4_Word_t* br = __L4_Sparc64_Utcb() + __L4_TCR_BR_OFFSET + i;
-
-    while (k-- > 0) {
-	*br++ = *w++;
-    }
-} // L4_LoadBRs()
-
-
-#endif /* !__L4__SPARC64__VREGS_H__ */
diff --git a/user/include/l4/types.h b/user/include/l4/types.h
index 527b8d5f..5fb9df2a 100644
--- a/user/include/l4/types.h
+++ b/user/include/l4/types.h
@@ -1,6 +1,6 @@
 /*********************************************************************
  *                
- * Copyright (C) 2001-2004,  Karlsruhe University
+ * Copyright (C) 2001-2004, 2007,  Karlsruhe University
  *                
  * File path:     l4/types.h
  * Description:   Commonly used L4 types
@@ -45,10 +45,6 @@
 # if defined(__i386__)
 #  define L4_ARCH_IA32
 #  define __L4_ARCH__ ia32
-# elif defined(__ia64__)
-#  undef ia64
-#  define L4_ARCH_IA64
-#  define __L4_ARCH__ ia64
 # elif defined(__PPC64__)
 #  define L4_ARCH_POWERPC64
 #  define __L4_ARCH__ powerpc64
@@ -56,26 +52,9 @@
 #  undef powerpc
 #  define L4_ARCH_POWERPC
 #  define __L4_ARCH__ powerpc
-# elif defined(__arm__)
-#  define L4_ARCH_ARM
-#  define __L4_ARCH__ arm
 # elif defined(__x86_64__)
 #  define L4_ARCH_AMD64
 #  define __L4_ARCH__ amd64
-# elif defined(__alpha__)
-#  define L4_ARCH_ALPHA
-#  define __L4_ARCH__ alpha
-# elif defined(__mips__)
-#  if defined (_MIPS_ARCH_MIPS32)
-#   define L4_ARCH_MIPS32
-#   define __L4_ARCH__ mips32
-#  else
-#   define L4_ARCH_MIPS64
-#   define __L4_ARCH__ mips64
-#  endif
-# elif defined(__sparc__)
-#  define L4_ARCH_SPARC64
-#  define __L4_ARCH__ sparc64
 # else
 #  error Unknown hardware architecture.
 # endif
diff --git a/user/lib/io/Makefile.in b/user/lib/io/Makefile.in
index db9709fb..e7ae9997 100644
--- a/user/lib/io/Makefile.in
+++ b/user/lib/io/Makefile.in
@@ -1,6 +1,6 @@
 ######################################################################
 ##                
-## Copyright (C) 2003,  Karlsruhe University
+## Copyright (C) 2003, 2007,  Karlsruhe University
 ##                
 ## File path:     Makefile.in
 ##                
@@ -37,17 +37,9 @@ include $(top_srcdir)/Mk/l4.base.mk
 
 
 ia32_SRCS=	ia32-getc.cc ia32-putc.cc
-ia64_SRCS=	ia64-getc.cc ia64-putc.cc
 powerpc_SRCS=	powerpc-ofppc-io.cc 1275tree.cc
 powerpc64_SRCS=	powerpc64-getc.cc powerpc64-putc.cc
 amd64_SRCS=	amd64-getc.cc amd64-putc.cc
-mips64_SRCS=	mips64-getc.cc mips64-putc.cc
-mips32_SRCS=	mips32-getc.cc mips32-putc.cc
-alpha_SRCS=	alpha-getc.cc alpha-putc.cc alpha-divrem.S
-arm_SRCS=       arm-getc.cc arm-putc.cc
-sparc64_SRCS=   sparc64-getc.cc sparc64-putc.cc
-
-CFLAGS_alpha = -O2 -mno-fp-regs -freg-struct-return -mcpu=ev4
 
 LIBRARY=	io
 SRCS=		get_hex.cc print.cc $($(ARCH)_SRCS)
diff --git a/user/lib/io/alpha-divrem.S b/user/lib/io/alpha-divrem.S
deleted file mode 100644
index c63e3238..00000000
--- a/user/lib/io/alpha-divrem.S
+++ /dev/null
@@ -1,598 +0,0 @@
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-#include <l4/alpha/pal.h>
-	
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * __divqu		name of function to generate
- * div		div=div: t10 / t11 -> t12; div=rem: t10 % t11 -> t12
- * false		false=true: signed; false=false: unsigned
- * 64	total number of bits
- */
-	
-/*
- * LEAF
- *      Declare a global leaf function.
- *      A leaf function does not call other functions AND does not
- *      use any register that is callee-saved AND does not modify
- *      the stack pointer.
- */
-#define LEAF(_name_,_n_args_)                                   \
-        .globl  _name_;                                         \
-        .ent    _name_ 0;                                       \
-_name_:;                                                        \
-        .frame  sp,0,ra
-
-/*
- * END
- *      Function delimiter
- */
-#define END(_name_)                                             \
-	.end    _name_
-
-#define ra $26
-#define sp $30
-#define a0 $16
-#define t0 $1
-#define t1 $2
-#define t2 $3
-#define t3 $4		
-#define t9 $23	
-#define t10 $24	
-#define t11 $25
-#define t12 $27
-#define zero $31
-
-LEAF(__divqu, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	t0, 0(sp)
-	stq	t1, 8(sp)
-	stq	t2, 16(sp)
-	stq	t3, 24(sp)
-
-	stq	t10, 40(sp)
-	stq	t11, 48(sp)
-	mov	zero, t12			/* Initialize result to zero */
-
-
-
-
-	/* kill the special cases. */
-	beq	t11, L0dotrap			/* division by zero! */
-
-	cmpult	t10, t11, t2			/* t10 < t11? */
-	/* t12 is already zero, from above.  t10 is untouched. */
-	bne	t2, L0ret_result
-
-	cmpeq	t10, t11, t2			/* t10 == t11? */
-	cmovne	t2, 1, t12
-	cmovne	t2, zero, t10
-	bne	t2, L0ret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-L0Bbits:
-	ldiq	t3, 1				/* t1 = 0; t0 = 1<<64-1 */
-	mov	zero, t1
-	sll	t3, 64-1, t0
-L0Bloop:
-	and	t11, t0, t2			/* if bit in t11 is set, done. */
-	bne	t2, L0Abits
-	addq	t1, 1, t1				/* increment t1,  bit */
-	srl	t0, 1, t0
-	cmplt	t1, 64-1, t2		/* if t1 leaves one bit, done. */
-	bne	t2, L0Bloop
-
-L0Abits:
-	beq	t1, L0dodiv			/* If t1 = 0, divide now.  */
-	ldiq	t3, 1				/* t0 = 1<<64-1 */
-	sll	t3, 64-1, t0
-
-L0Aloop:
-	and	t10, t0, t2			/* if bit in t10 is set, done. */
-	bne	t2, L0dodiv
-	subq	t1, 1, t1				/* decrement t1,  bit */
-	srl     t0, 1, t0 
-	bne	t1, L0Aloop			/* If t1 != 0, loop again */
-
-L0dodiv:
-	sll	t11, t1, t11				/* t11 <<= i */
-	ldiq	t3, 1
-	sll	t3, t1, t0
-
-L0divloop:
-	cmpult	t10, t11, t2
-	or	t12, t0, t3
-	cmoveq	t2, t3, t12
-	subq	t10, t11, t3
-	cmoveq	t2, t3, t10
-	srl	t0, 1, t0	
-	srl	t11, 1, t11
-	beq	t10, L0ret_result
-	bne	t0, L0divloop
-
-L0ret_result:
-
-
-
-	ldq	t0, 0(sp)
-	ldq	t1, 8(sp)
-	ldq	t2, 16(sp)
-	ldq	t3, 24(sp)
-
-	ldq	t10, 40(sp)
-	ldq	t11, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-L0dotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-
-	br	zero, L0ret_result
-
-END(__divqu)
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * __divlu		name of function to generate
- * div		div=div: t10 / t11 -> t12; div=rem: t10 % t11 -> t12
- * false		false=true: signed; false=false: unsigned
- * 32	total number of bits
- */
-
-LEAF(__divlu, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	t0, 0(sp)
-	stq	t1, 8(sp)
-	stq	t2, 16(sp)
-	stq	t3, 24(sp)
-
-	stq	t10, 40(sp)
-	stq	t11, 48(sp)
-	mov	zero, t12			/* Initialize result to zero */
-
-
-
-	/*
-	 * Clear the top 32 bits of each operand, as they may
-	 * sign extension (if negated above), or random junk.
-	 */
-	zap	t10, 0xf0, t10
-	zap	t11, 0xf0, t11
-
-
-	/* kill the special cases. */
-	beq	t11, L1dotrap			/* division by zero! */
-
-	cmpult	t10, t11, t2			/* t10 < t11? */
-	/* t12 is already zero, from above.  t10 is untouched. */
-	bne	t2, L1ret_result
-
-	cmpeq	t10, t11, t2			/* t10 == t11? */
-	cmovne	t2, 1, t12
-	cmovne	t2, zero, t10
-	bne	t2, L1ret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-L1Bbits:
-	ldiq	t3, 1				/* t1 = 0; t0 = 1<<32-1 */
-	mov	zero, t1
-	sll	t3, 32-1, t0
-L1Bloop:
-	and	t11, t0, t2			/* if bit in t11 is set, done. */
-	bne	t2, L1Abits
-	addq	t1, 1, t1				/* increment t1,  bit */
-	srl	t0, 1, t0
-	cmplt	t1, 32-1, t2		/* if t1 leaves one bit, done. */
-	bne	t2, L1Bloop
-
-L1Abits:
-	beq	t1, L1dodiv			/* If t1 = 0, divide now.  */
-	ldiq	t3, 1				/* t0 = 1<<32-1 */
-	sll	t3, 32-1, t0
-
-L1Aloop:
-	and	t10, t0, t2			/* if bit in t10 is set, done. */
-	bne	t2, L1dodiv
-	subq	t1, 1, t1				/* decrement t1,  bit */
-	srl     t0, 1, t0 
-	bne	t1, L1Aloop			/* If t1 != 0, loop again */
-
-L1dodiv:
-	sll	t11, t1, t11				/* t11 <<= i */
-	ldiq	t3, 1
-	sll	t3, t1, t0
-
-L1divloop:
-	cmpult	t10, t11, t2
-	or	t12, t0, t3
-	cmoveq	t2, t3, t12
-	subq	t10, t11, t3
-	cmoveq	t2, t3, t10
-	srl	t0, 1, t0	
-	srl	t11, 1, t11
-	beq	t10, L1ret_result
-	bne	t0, L1divloop
-
-L1ret_result:
-
-
-
-	ldq	t0, 0(sp)
-	ldq	t1, 8(sp)
-	ldq	t2, 16(sp)
-	ldq	t3, 24(sp)
-
-	ldq	t10, 40(sp)
-	ldq	t11, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-L1dotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-
-	br	zero, L1ret_result
-
-END(__divlu)
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * __remlu		name of function to generate
- * rem		rem=div: t10 / t11 -> t12; rem=rem: t10 % t11 -> t12
- * false		false=true: signed; false=false: unsigned
- * 32	total number of bits
- */
-
-LEAF(__remlu, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	t0, 0(sp)
-	stq	t1, 8(sp)
-	stq	t2, 16(sp)
-	stq	t3, 24(sp)
-
-	stq	t10, 40(sp)
-	stq	t11, 48(sp)
-	mov	zero, t12			/* Initialize result to zero */
-
-
-
-	/*
-	 * Clear the top 32 bits of each operand, as they may
-	 * sign extension (if negated above), or random junk.
-	 */
-	zap	t10, 0xf0, t10
-	zap	t11, 0xf0, t11
-
-
-	/* kill the special cases. */
-	beq	t11, L2dotrap			/* division by zero! */
-
-	cmpult	t10, t11, t2			/* t10 < t11? */
-	/* t12 is already zero, from above.  t10 is untouched. */
-	bne	t2, L2ret_result
-
-	cmpeq	t10, t11, t2			/* t10 == t11? */
-	cmovne	t2, 1, t12
-	cmovne	t2, zero, t10
-	bne	t2, L2ret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-L2Bbits:
-	ldiq	t3, 1				/* t1 = 0; t0 = 1<<32-1 */
-	mov	zero, t1
-	sll	t3, 32-1, t0
-L2Bloop:
-	and	t11, t0, t2			/* if bit in t11 is set, done. */
-	bne	t2, L2Abits
-	addq	t1, 1, t1				/* increment t1,  bit */
-	srl	t0, 1, t0
-	cmplt	t1, 32-1, t2		/* if t1 leaves one bit, done. */
-	bne	t2, L2Bloop
-
-L2Abits:
-	beq	t1, L2dodiv			/* If t1 = 0, divide now.  */
-	ldiq	t3, 1				/* t0 = 1<<32-1 */
-	sll	t3, 32-1, t0
-
-L2Aloop:
-	and	t10, t0, t2			/* if bit in t10 is set, done. */
-	bne	t2, L2dodiv
-	subq	t1, 1, t1				/* decrement t1,  bit */
-	srl     t0, 1, t0 
-	bne	t1, L2Aloop			/* If t1 != 0, loop again */
-
-L2dodiv:
-	sll	t11, t1, t11				/* t11 <<= i */
-	ldiq	t3, 1
-	sll	t3, t1, t0
-
-L2divloop:
-	cmpult	t10, t11, t2
-	or	t12, t0, t3
-	cmoveq	t2, t3, t12
-	subq	t10, t11, t3
-	cmoveq	t2, t3, t10
-	srl	t0, 1, t0	
-	srl	t11, 1, t11
-	beq	t10, L2ret_result
-	bne	t0, L2divloop
-
-L2ret_result:
-	mov	t10, t12
-
-
-
-	ldq	t0, 0(sp)
-	ldq	t1, 8(sp)
-	ldq	t2, 16(sp)
-	ldq	t3, 24(sp)
-
-	ldq	t10, 40(sp)
-	ldq	t11, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-L2dotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-	mov	zero, t10			/* so that zero will be returned */
-
-	br	zero, L2ret_result
-
-END(__remlu)
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * __remqu		name of function to generate
- * rem		rem=div: t10 / t11 -> t12; rem=rem: t10 % t11 -> t12
- * false		false=true: signed; false=false: unsigned
- * 64	total number of bits
- */
-
-
-LEAF(__remqu, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	t0, 0(sp)
-	stq	t1, 8(sp)
-	stq	t2, 16(sp)
-	stq	t3, 24(sp)
-
-	stq	t10, 40(sp)
-	stq	t11, 48(sp)
-	mov	zero, t12			/* Initialize result to zero */
-
-
-
-
-	/* kill the special cases. */
-	beq	t11, L3dotrap			/* division by zero! */
-
-	cmpult	t10, t11, t2			/* t10 < t11? */
-	/* t12 is already zero, from above.  t10 is untouched. */
-	bne	t2, L3ret_result
-
-	cmpeq	t10, t11, t2			/* t10 == t11? */
-	cmovne	t2, 1, t12
-	cmovne	t2, zero, t10
-	bne	t2, L3ret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-L3Bbits:
-	ldiq	t3, 1				/* t1 = 0; t0 = 1<<64-1 */
-	mov	zero, t1
-	sll	t3, 64-1, t0
-L3Bloop:
-	and	t11, t0, t2			/* if bit in t11 is set, done. */
-	bne	t2, L3Abits
-	addq	t1, 1, t1				/* increment t1,  bit */
-	srl	t0, 1, t0
-	cmplt	t1, 64-1, t2		/* if t1 leaves one bit, done. */
-	bne	t2, L3Bloop
-
-L3Abits:
-	beq	t1, L3dodiv			/* If t1 = 0, divide now.  */
-	ldiq	t3, 1				/* t0 = 1<<64-1 */
-	sll	t3, 64-1, t0
-
-L3Aloop:
-	and	t10, t0, t2			/* if bit in t10 is set, done. */
-	bne	t2, L3dodiv
-	subq	t1, 1, t1				/* decrement t1,  bit */
-	srl     t0, 1, t0 
-	bne	t1, L3Aloop			/* If t1 != 0, loop again */
-
-L3dodiv:
-	sll	t11, t1, t11				/* t11 <<= i */
-	ldiq	t3, 1
-	sll	t3, t1, t0
-
-L3divloop:
-	cmpult	t10, t11, t2
-	or	t12, t0, t3
-	cmoveq	t2, t3, t12
-	subq	t10, t11, t3
-	cmoveq	t2, t3, t10
-	srl	t0, 1, t0	
-	srl	t11, 1, t11
-	beq	t10, L3ret_result
-	bne	t0, L3divloop
-
-L3ret_result:
-	mov	t10, t12
-
-
-
-	ldq	t0, 0(sp)
-	ldq	t1, 8(sp)
-	ldq	t2, 16(sp)
-	ldq	t3, 24(sp)
-
-	ldq	t10, 40(sp)
-	ldq	t11, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-L3dotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-	mov	zero, t10			/* so that zero will be returned */
-
-	br	zero, L3ret_result
-
-END(__remqu)
diff --git a/user/lib/io/alpha-divrem.m4 b/user/lib/io/alpha-divrem.m4
deleted file mode 100644
index c24689f3..00000000
--- a/user/lib/io/alpha-divrem.m4
+++ /dev/null
@@ -1,197 +0,0 @@
-/*	$NetBSD: divrem.m4,v 1.5 1996/10/17 04:26:25 cgd Exp $	*/
-
-/*
- * Copyright (c) 1994, 1995 Carnegie-Mellon University.
- * All rights reserved.
- *
- * Author: Chris G. Demetriou
- * 
- * Permission to use, copy, modify and distribute this software and
- * its documentation is hereby granted, provided that both the copyright
- * notice and this permission notice appear in all copies of the
- * software, derivative works or modified versions, and any portions
- * thereof, and that both notices appear in supporting documentation.
- * 
- * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
- * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
- * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
- * 
- * Carnegie Mellon requests users of this software to return to
- *
- *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
- *  School of Computer Science
- *  Carnegie Mellon University
- *  Pittsburgh PA 15213-3890
- *
- * any improvements or extensions that they make and grant Carnegie the
- * rights to redistribute these changes.
- */
-
-/*
- * Division and remainder.
- *
- * The use of m4 is modeled after the sparc code, but the algorithm is
- * simple binary long division.
- *
- * Note that the loops could probably benefit from unrolling.
- */
-
-/*
- * M4 Parameters
- * NAME		name of function to generate
- * OP		OP=div: t10 / t11 -> t12; OP=rem: t10 % t11 -> t12
- * S		S=true: signed; S=false: unsigned
- * WORDSIZE	total number of bits
- */
-
-define(A, `t10')
-define(B, `t11')
-define(RESULT, `t12')
-
-define(BIT, `t0')
-define(I, `t1')
-define(CC, `t2')
-define(T_0, `t3')
-ifelse(S, `true', `define(NEG, `t4')')
-
-#include <machine/asm.h>
-
-LEAF(NAME, 0)					/* XXX */
-	lda	sp, -64(sp)
-	stq	BIT, 0(sp)
-	stq	I, 8(sp)
-	stq	CC, 16(sp)
-	stq	T_0, 24(sp)
-ifelse(S, `true',
-`	stq	NEG, 32(sp)')
-	stq	A, 40(sp)
-	stq	B, 48(sp)
-	mov	zero, RESULT			/* Initialize result to zero */
-
-ifelse(S, `true',
-`
-	/* Compute sign of result.  If either is negative, this is easy.  */
-	or	A, B, NEG			/* not the sign, but... */
-	srl	NEG, WORDSIZE - 1, NEG		/* rather, or of high bits */
-	blbc	NEG, Ldoit			/* neither negative? do it! */
-
-ifelse(OP, `div',
-`	xor	A, B, NEG			/* THIS is the sign! */
-', `	mov	A, NEG				/* sign follows A. */
-')
-	srl	NEG, WORDSIZE - 1, NEG		/* make negation the low bit. */
-
-	srl	A, WORDSIZE - 1, I		/* is A negative? */
-	blbc	I, LnegB			/* no. */
-	/* A is negative; flip it. */
-ifelse(WORDSIZE, `32', `
-	/* top 32 bits may be random junk */
-	zap	A, 0xf0, A
-')
-	subq	zero, A, A
-	srl	B, WORDSIZE - 1, I		/* is B negative? */
-	blbc	I, Ldoit			/* no. */
-LnegB:
-	/* B is definitely negative, no matter how we got here. */
-ifelse(WORDSIZE, `32', `
-	/* top 32 bits may be random junk */
-	zap	B, 0xf0, B
-')
-	subq	zero, B, B
-Ldoit:
-')
-ifelse(WORDSIZE, `32', `
-	/*
-	 * Clear the top 32 bits of each operand, as they may
-	 * sign extension (if negated above), or random junk.
-	 */
-	zap	A, 0xf0, A
-	zap	B, 0xf0, B
-')
-
-	/* kill the special cases. */
-	beq	B, Ldotrap			/* division by zero! */
-
-	cmpult	A, B, CC			/* A < B? */
-	/* RESULT is already zero, from above.  A is untouched. */
-	bne	CC, Lret_result
-
-	cmpeq	A, B, CC			/* A == B? */
-	cmovne	CC, 1, RESULT
-	cmovne	CC, zero, A
-	bne	CC, Lret_result
-
-	/*
-	 * Find out how many bits of zeros are at the beginning of the divisor.
-	 */
-LBbits:
-	ldiq	T_0, 1				/* I = 0; BIT = 1<<WORDSIZE-1 */
-	mov	zero, I
-	sll	T_0, WORDSIZE-1, BIT
-LBloop:
-	and	B, BIT, CC			/* if bit in B is set, done. */
-	bne	CC, LAbits
-	addq	I, 1, I				/* increment I, shift bit */
-	srl	BIT, 1, BIT
-	cmplt	I, WORDSIZE-1, CC		/* if I leaves one bit, done. */
-	bne	CC, LBloop
-
-LAbits:
-	beq	I, Ldodiv			/* If I = 0, divide now.  */
-	ldiq	T_0, 1				/* BIT = 1<<WORDSIZE-1 */
-	sll	T_0, WORDSIZE-1, BIT
-
-LAloop:
-	and	A, BIT, CC			/* if bit in A is set, done. */
-	bne	CC, Ldodiv
-	subq	I, 1, I				/* decrement I, shift bit */
-	srl     BIT, 1, BIT 
-	bne	I, LAloop			/* If I != 0, loop again */
-
-Ldodiv:
-	sll	B, I, B				/* B <<= i */
-	ldiq	T_0, 1
-	sll	T_0, I, BIT
-
-Ldivloop:
-	cmpult	A, B, CC
-	or	RESULT, BIT, T_0
-	cmoveq	CC, T_0, RESULT
-	subq	A, B, T_0
-	cmoveq	CC, T_0, A
-	srl	BIT, 1, BIT	
-	srl	B, 1, B
-	beq	A, Lret_result
-	bne	BIT, Ldivloop
-
-Lret_result:
-ifelse(OP, `div',
-`', `	mov	A, RESULT
-')
-ifelse(S, `true',
-`
-	/* Check to see if we should negate it. */
-	subqv	zero, RESULT, T_0
-	cmovlbs	NEG, T_0, RESULT
-')
-
-	ldq	BIT, 0(sp)
-	ldq	I, 8(sp)
-	ldq	CC, 16(sp)
-	ldq	T_0, 24(sp)
-ifelse(S, `true',
-`	ldq	NEG, 32(sp)')
-	ldq	A, 40(sp)
-	ldq	B, 48(sp)
-	lda	sp, 64(sp)
-	ret	zero, (t9), 1
-
-Ldotrap:
-	ldiq	a0, -2			/* This is the signal to SIGFPE! */
-	call_pal PAL_gentrap
-ifelse(OP, `div',
-`', `	mov	zero, A			/* so that zero will be returned */
-')
-	br	zero, Lret_result
-
-END(NAME)
diff --git a/user/lib/io/alpha-getc.cc b/user/lib/io/alpha-getc.cc
deleted file mode 100644
index d1e4b43d..00000000
--- a/user/lib/io/alpha-getc.cc
+++ /dev/null
@@ -1,43 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002, Karlsruhe University
- *
- * File path:	lib/io/alpha-getc.c
- * Description:	debugger getc() for Alpha
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: alpha-getc.cc,v 1.3 2003/11/24 16:21:16 skoglund Exp $
- *
- ***************************************************************************/
-
-#include <l4/types.h>
-#include <l4/alpha/kdebug.h>
-
-extern "C" int __l4_getc (void);
-extern "C" int getc (void) __attribute__ ((weak, alias ("__l4_getc")));
-
-extern "C" int __l4_getc()
-{
-    return L4_KDB_ReadChar_Blocked();
-}
-
diff --git a/user/lib/io/alpha-putc.cc b/user/lib/io/alpha-putc.cc
deleted file mode 100644
index 7824a2b2..00000000
--- a/user/lib/io/alpha-putc.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002, Karlsruhe University
- *
- * File path:	lib/io/alpha-putc.c
- * Description:	debugger putc() for Alpha
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: alpha-putc.cc,v 1.3 2003/11/24 16:21:16 skoglund Exp $
- *
- ***************************************************************************/
-
-#include <l4/types.h>
-#include <l4/alpha/kdebug.h>
-
-extern "C" void __l4_putc (int c);
-extern "C" void putc (int c) __attribute__ ((weak, alias ("__l4_putc")));
-
-extern "C" void __l4_putc( int c )
-{
-    L4_KDB_PrintChar( c );
-    if( c == '\n' )
-	L4_KDB_PrintChar( '\r' );
-}
-
diff --git a/user/lib/io/arm-getc.cc b/user/lib/io/arm-getc.cc
deleted file mode 100644
index 0981a29f..00000000
--- a/user/lib/io/arm-getc.cc
+++ /dev/null
@@ -1,43 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:	lib/io/arm-getc.cc
- * Description:	debugger getc() for ARM
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: arm-getc.cc,v 1.4 2004/06/04 08:22:45 htuch Exp $
- *
- ***************************************************************************/
-
-#include <l4/types.h>
-#include <l4/arm/kdebug.h>
-
-extern "C" int __l4_getc (void);
-extern "C" int getc (void) __attribute__ ((weak, alias ("__l4_getc")));
-
-extern "C" int __l4_getc()
-{
-    return L4_KDB_ReadChar_Blocked();
-}
-
diff --git a/user/lib/io/arm-putc.cc b/user/lib/io/arm-putc.cc
deleted file mode 100644
index 1a981a8f..00000000
--- a/user/lib/io/arm-putc.cc
+++ /dev/null
@@ -1,42 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:	lib/io/arm-putc.cc
- * Description:	debugger putc() for ARM
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: arm-putc.cc,v 1.4 2004/06/04 08:22:45 htuch Exp $
- *
- ***************************************************************************/
-
-#include <l4/types.h>
-#include <l4/arm/kdebug.h>
-
-extern "C" void __l4_putc (int c);
-extern "C" void putc (int c) __attribute__ ((weak, alias ("__l4_putc")));
-
-extern "C" void __l4_putc( int c )
-{
-    L4_KDB_PrintChar( c );
-}
diff --git a/user/lib/io/ia64-getc.cc b/user/lib/io/ia64-getc.cc
deleted file mode 100644
index 511f80f1..00000000
--- a/user/lib/io/ia64-getc.cc
+++ /dev/null
@@ -1,42 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     ia64-getc.cc
- * Description:   getc() for ia64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ia64-getc.cc,v 1.9 2006/10/19 22:57:40 ud3 Exp $
- *                
- ********************************************************************/
-#include <l4/types.h>
-#include <l4/kdebug.h>
-
-extern "C" int __l4_getc (void);
-extern "C" int getc (void) __attribute__ ((weak, alias ("__l4_getc")));
-
-extern "C" int __l4_getc (void)
-{
-    return L4_KDB_ReadChar ();
-}
-
diff --git a/user/lib/io/ia64-putc.cc b/user/lib/io/ia64-putc.cc
deleted file mode 100644
index 686cd600..00000000
--- a/user/lib/io/ia64-putc.cc
+++ /dev/null
@@ -1,49 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002-2004,  Karlsruhe University
- *                
- * File path:     ia64-putc.cc
- * Description:   putc() for ia64
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ia64-putc.cc,v 1.7 2004/03/17 18:35:42 skoglund Exp $
- *                
- ********************************************************************/
-#include <l4/types.h>
-#include <l4/kdebug.h>
-
-extern "C" void __l4_putc (int c);
-extern "C" void putc (int c) __attribute__ ((weak, alias ("__l4_putc")));
-
-static void ia64_putc (int c)
-{
-    L4_KDB_PrintChar (c);
-}
-
-extern "C" void __l4_putc (int c)
-{
-    ia64_putc (c);
-    if (c == '\n')
-	ia64_putc ('\r');
-}
-
diff --git a/user/lib/io/mips32-getc.cc b/user/lib/io/mips32-getc.cc
deleted file mode 100644
index f13457dd..00000000
--- a/user/lib/io/mips32-getc.cc
+++ /dev/null
@@ -1,52 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     mips32-getc.cc
- * Description:   Serial input for MIPS32/Malta
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips32-getc.cc,v 1.1 2006/02/23 21:07:58 ud3 Exp $
- *                
- ********************************************************************/
-#include <l4/types.h>
-#include <l4/mips32/kdebug.h>
-#include "mips32-uart16550.h"
-#include "mips32-pio.h"
-
-static int _serial_rx_ready( unsigned int port ) {
-    return inb(port + USART_LSR) & LSR_Data_Ready;
-}
-
-static char _serial_rx_byte( unsigned int port ) {
-    return inb(port + USART_RBR);
-}
-
-extern "C" int __l4_getc (void);
-extern "C" int getc (void) __attribute__ ((weak, alias ("__l4_getc")));
-
-extern "C" int __l4_getc() {
-    while( !_serial_rx_ready( USART_0_BASE ) );
-    return( _serial_rx_byte( USART_0_BASE ) );
-}
-
diff --git a/user/lib/io/mips32-pio.h b/user/lib/io/mips32-pio.h
deleted file mode 100644
index 188cbf9f..00000000
--- a/user/lib/io/mips32-pio.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     mips32-pio.h
- * Description:   Port I/O for MIPS32/Malta
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips32-pio.h,v 1.1 2006/02/23 21:07:58 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __USER__LIB__IO__MIPS32_PIO_H__
-#define __USER__LIB__IO__MIPS32_PIO_H__
-
-#define inb(port) (*((volatile unsigned char*)(port)))
-#define outb( port, data ) ((*((volatile unsigned char*)(port))) = data)
-
-#endif /* !__USER__LIB__IO__MIPS32_PIO_H__ */
diff --git a/user/lib/io/mips32-putc.cc b/user/lib/io/mips32-putc.cc
deleted file mode 100644
index 6909ac7c..00000000
--- a/user/lib/io/mips32-putc.cc
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     mips32-putc.cc
- * Description:   Serial output for MIPS32/Malta
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips32-putc.cc,v 1.1 2006/02/23 21:07:58 ud3 Exp $
- *                
- ********************************************************************/
-#include <l4/types.h>
-#include <l4/mips32/kdebug.h>
-#include "mips32-uart16550.h"
-#include "mips32-pio.h"
-
-extern "C" void __l4_putc (int c);
-extern "C" void putc (int c) __attribute__ ((weak, alias ("__l4_putc")));
-
-static int _serial_tx_ready( unsigned int port ) {
-  return inb(port + USART_LSR) & LSR_THR_Empty;
-}
-
-static void _serial_tx_byte( unsigned int port, char c ) {
-  outb(port + USART_THR, c);
-}
-
-
-extern "C" void __l4_putc( int c ) {
-	while( !_serial_tx_ready( USART_0_BASE ) );
-	_serial_tx_byte( USART_0_BASE, c );
-	if( c == '\n' )
-		__l4_putc('\r');
-}
-
diff --git a/user/lib/io/mips32-uart16550.h b/user/lib/io/mips32-uart16550.h
deleted file mode 100644
index 9e22f42b..00000000
--- a/user/lib/io/mips32-uart16550.h
+++ /dev/null
@@ -1,150 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     mips32-uart16550.h
- * Description:   MIPS32/Malta UART definitions
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips32-uart16550.h,v 1.1 2006/02/23 21:07:58 ud3 Exp $
- *                
- ********************************************************************/
-#ifndef __USER__LIB__IO__MIPS32_UART16550_H__
-#define __USER__LIB__IO__MIPS32_UART16550_H__
-
-/*  USART ADDRESSES */
-#define USART_0_BASE    (0x180003f8)                    /* reflects PC hardware */
-
-/* Handy shortforms, based on old system. Touch misleading: more status */
-#define USART_0_STATUS  (USART_0_BASE + USART_LSR)
-#define USART_0_DATA    (USART_0_BASE + USART_RBR)
-
-/*
- *      16550 IO register offsets - should be added to USART_n_BASE
- */
-#define USART_RBR              0  /* receive data register */
-#define USART_THR              0  /* transmit holding register */
-#define USART_IER              1  /* interrupt enable offset */
-#define USART_IIR              2  /* interupt identification register */
-#define USART_FCR              2  /* FIFO control register */
-#define USART_LCR              3  /* line control register */
-#define USART_MCR              4  /* modem control register */
-#define USART_LSR              5  /* line status register */
-#define USART_MSR              6  /* modem status register */
-
-/*
- *      The following constants are primarily for documentation purposes
- *      to show what the values sent to the 8250 Control Registers do to
- *      the chip.
- *
- *                     INTERRUPT ENABLE REGISTER
- */
-
-#define IER_Received_Data      1
-#define IER_Xmt_Hld_Reg_Empty  (1<<1)
-#define IER_Recv_Line_Status   (1<<2)
-#define IER_Modem_Status       (1<<3)
-#define IER_Not_Used           0xF0
-
-
-/*
- *                       LINE CONTROL REGISTER
- */
-
-#define LCR_Word_Length_Mask     3
-#define LCR_Stop_Bits            (1<<2)
-#define LCR_Parity_Enable        (1<<3)
-#define LCR_Even_Parity          (1<<4)
-#define LCR_Stick_Parity         (1<<5)
-#define LCR_Set_Break            (1<<6)
-#define LCR_Divisor_Latch_Access (1<<7)
-
-
-
-
-/* Divisor Latch - must be set to 1
- * to get to the divisor latches of
- * the baud rate generator - must
- * be set to 0 to access the
- * Receiver Buffer Register and
- * the Transmit Holding Register
- */
-#define LCR_DLAB                                LCR_Divisor_Latch_Access
-
-
-/*
- *                      MODEM CONTROL REGISTER
- */
-
-#define MCR_dtr          1
-#define MCR_rts          (1<<1)
-#define MCR_Out_1        (1<<2)
-#define MCR_Out_2        (1<<3) /* MUST BE ASSERTED TO ENABLE INTERRRUPTS */
-#define MCR_Loop_Back    (1<<4)
-#define MCR_Not_Used     (7<<1)
-
-
-
-
-/*
- *                        LINE STATUS REGISTER
- */
-
-#define LSR_Data_Ready      1
-#define LSR_Overrun_Error   (1<<1)
-#define LSR_Parity_Error    (1<<2)
-#define LSR_Framing_Error   (1<<3)
-#define LSR_Break_Interrupt (1<<4)
-#define LSR_THR_Empty       (1<<5)  /* Transmitter Holding Register */
-#define LSR_TSR_Empty       (1<<6)  /* Transmitter Shift Register */
-#define LSR_Not_Used        (1<<7)
-
-
-/*
- *                       MODEM STATUS REGISTER
- */
-
-#define MSR_Delta_CTS       1
-#define MSR_Delta_DSR       (1<<1)
-#define MSR_TERD            (1<<2)  /* Trailing Edge Ring Detect   */
-#define MSR_Delta_RLSD      (1<<3)  /* Received Line Signal Detect */
-#define MSR_CTS             (1<<4)  /* Clear to Send               */
-#define MSR_DSR             (1<<5)  /* Data Set Ready              */
-#define MSR_RD              (1<<6)  /* Ring Detect                 */
-#define MSR_RLSD            (1<<7)  /* Received Line Signal Detect */
-
-
-
-/*
- *   Fifo CONTROL REGISTER (Write only)
- */
-#define FCR_Fifo_Enable                         1       /* set to one to enable Fifos */
-#define FCR_Rcvr_Reset                          (1<<1)  /* set to clear receiver FIFO */
-#define FCR_Xmit_Reset                          (1<<2)  /* set to clear transmitter FIFO */
-#define FCR_DMA_Mode                            (1<<3)  /* no effect  */           
-#define FCR_Trigger_1                           (0<<6)  /* trigger IRQ on one byte */
-#define FCR_Trigger_4                           (1<<6)  /* 4 bytes in fifo */
-#define FCR_Trigger_8                           (2<<6)  /* 8 bytes */
-#define FCR_Trigger_14                          (3<<6)  /* 14 bytes before IRQ occurs */
-
-#endif /* !__USER__LIB__IO__MIPS32_UART16550_H__ */
diff --git a/user/lib/io/mips64-getc.cc b/user/lib/io/mips64-getc.cc
deleted file mode 100644
index c9b60658..00000000
--- a/user/lib/io/mips64-getc.cc
+++ /dev/null
@@ -1,43 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002, Karlsruhe University
- *
- * File path:	lib/io/mips64-getc.c
- * Description:	debugger getc() for MIPS64
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: mips64-getc.cc,v 1.3 2003/11/24 16:21:16 skoglund Exp $
- *
- ***************************************************************************/
-
-#include <l4/types.h>
-#include <l4/mips64/kdebug.h>
-
-extern "C" int __l4_getc (void);
-extern "C" int getc (void) __attribute__ ((weak, alias ("__l4_getc")));
-
-extern "C" int __l4_getc()
-{
-    return L4_KDB_ReadChar_Blocked();
-}
-
diff --git a/user/lib/io/mips64-putc.cc b/user/lib/io/mips64-putc.cc
deleted file mode 100644
index f7d23505..00000000
--- a/user/lib/io/mips64-putc.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002, Karlsruhe University
- *
- * File path:	lib/io/mips64-putc.c
- * Description:	debugger putc() for MIPS64
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: mips64-putc.cc,v 1.3 2003/11/24 16:21:16 skoglund Exp $
- *
- ***************************************************************************/
-
-#include <l4/types.h>
-#include <l4/mips64/kdebug.h>
-
-extern "C" void __l4_putc (int c);
-extern "C" void putc (int c) __attribute__ ((weak, alias ("__l4_putc")));
-
-extern "C" void __l4_putc( int c )
-{
-    L4_KDB_PrintChar( c );
-    if( c == '\n' )
-	L4_KDB_PrintChar( '\r' );
-}
-
diff --git a/user/lib/io/sparc64-getc.cc b/user/lib/io/sparc64-getc.cc
deleted file mode 100644
index d3212164..00000000
--- a/user/lib/io/sparc64-getc.cc
+++ /dev/null
@@ -1,44 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003,  University of New South Wales
- *
- * File path:	lib/io/sparc64-getc.c
- * Description:	debugger getc() for SPARC v9
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: sparc64-getc.cc,v 1.3 2003/11/24 16:21:16 skoglund Exp $
- *
- ***************************************************************************/
-
-#include <l4/types.h>
-#include <l4/sparc64/kdebug.h>
-
-extern "C" int __l4_getc (void);
-extern "C" int getc (void) __attribute__ ((weak, alias ("__l4_getc")));
-
-extern "C" int
-__l4_getc(void)
-{
-  return L4_KDB_ReadChar_Blocked();
-
-} // getc()
diff --git a/user/lib/io/sparc64-putc.cc b/user/lib/io/sparc64-putc.cc
deleted file mode 100644
index 903dde9f..00000000
--- a/user/lib/io/sparc64-putc.cc
+++ /dev/null
@@ -1,47 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003,  University of New South Wales
- *
- * File path:	lib/io/sparc64-putc.c
- * Description:	debugger putc() for SPARC v9
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: sparc64-putc.cc,v 1.3 2003/11/24 16:21:16 skoglund Exp $
- *
- ***************************************************************************/
-
-#include <l4/types.h>
-#include <l4/sparc64/kdebug.h>
-
-extern "C" void __l4_putc (int c);
-extern "C" void putc (int c) __attribute__ ((weak, alias ("__l4_putc")));
-
-extern "C" void
-__l4_putc(int c)
-{
-  L4_KDB_PrintChar(c);
-  if(c == '\n') {
-    L4_KDB_PrintChar('\r');
-  }
-
-} // putc()
diff --git a/user/lib/l4/Makefile.in b/user/lib/l4/Makefile.in
index f5989464..4de09fb1 100644
--- a/user/lib/l4/Makefile.in
+++ b/user/lib/l4/Makefile.in
@@ -1,6 +1,6 @@
 ######################################################################
 ##                
-## Copyright (C) 2003,  Karlsruhe University
+## Copyright (C) 2003, 2007,  Karlsruhe University
 ##                
 ## File path:     Makefile.in
 ##                
@@ -37,18 +37,9 @@ include $(top_srcdir)/Mk/l4.base.mk
 
 
 ia32_OBJS=	ia32-syscall-init.cc ia32-syscall-stubs.S
-ia64_OBJS=	ia64-syscall-stubs.S
 powerpc_OBJS=	powerpc-syscalls.c
 powerpc64_OBJS=	powerpc64-syscalls.c
-mips64_OBJS=	mips64-syscalls.c
-mips32_OBJS=	mips32-syscalls.c
-alpha_OBJS=	alpha-syscalls.c alpha-syscall-stubs.S
 amd64_OBJS=	amd64-syscalls.c
-arm_OBJS=       arm-syscalls.c
-sparc64_OBJS=   sparc64-syscalls.c
-
-CFLAGS_alpha=	-mno-fp-regs -O2 -freg-struct-return
-CFLAGS_ia64=	-fPIC
 
 LIBRARY=	l4
 SRCS=		$($(ARCH)_OBJS)
diff --git a/user/lib/l4/alpha-syscall-stubs.S b/user/lib/l4/alpha-syscall-stubs.S
deleted file mode 100644
index b2ff0716..00000000
--- a/user/lib/l4/alpha-syscall-stubs.S
+++ /dev/null
@@ -1,101 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     libl4/src/arch/alpha/exregs.S
- * Description:   asm implementation for exregs 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: alpha-syscall-stubs.S,v 1.2 2003/09/24 19:06:28 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <l4/alpha/asm.h>
-
-/*
- * L4_INLINE L4_ThreadId_t L4_ExchangeRegisters (
- *	          		      L4_ThreadId_t dest, -- r16
- *				      L4_Word_t control, -- r17
- *				      L4_Word_t sp, -- r18
- *				      L4_Word_t ip, -- r19
- *				      L4_Word_t flags, -- r20
- *				      L4_Word_t UserDefHandle, --r21
- *				      L4_ThreadId_t pager, -- 0 + FRAME(sp)
- *				      L4_Word_t *old_control, -- 8 + FRAME(sp)
- *				      L4_Word_t *old_sp, -- 16 + FRAME(sp)
- *				      L4_Word_t *old_ip, -- 24 + FRAME(sp)
- *				      L4_Word_t *old_flags, -- 32 + FRAME(sp)
- *				      L4_Word_t *old_UserDefHandle, 40 + FRAME(sp)
- *				      L4_ThreadId_t *old_pager 48 + FRAME(sp))
- */
-
-/* Only need to save ra */
-#define FRAME		8
-#define IN_PAGER	(0  + FRAME)
-#define OUT_CONTROL	(8  + FRAME)
-#define OUT_SP		(16 + FRAME)
-#define OUT_IP		(24 + FRAME)
-#define OUT_FLAGS	(32 + FRAME)
-#define OUT_UDH		(40 + FRAME)
-#define OUT_PAGER	(48 + FRAME)
-	
-BEGIN_PROC(__alpha_L4_ExchangeRegisters)
-	.prologue 1
-	ldgp	$29, 0($27)
-	subq	$30, FRAME, $30
-	stq	$26, 0($30)
-
-	ldq	$2, IN_PAGER($30)
-
-	lda	$1, __L4_ExchangeRegisters
-	ldq	$27, 0($1)
-
-	jsr	$26, ($27)
-
-	ldq	$1, OUT_CONTROL($30)
-	stq	$16, 0($1)
-	
-	ldq	$1, OUT_SP($30)
-	stq	$17, 0($1)
-
-	
-	ldq	$1, OUT_IP($30)
-	stq	$18, 0($1)
-
-	
-	ldq	$1, OUT_FLAGS($30)
-	stq	$19, 0($1)
-
-	
-	ldq	$1, OUT_UDH($30)
-	stq	$20, 0($1)
-
-	
-	ldq	$1, OUT_PAGER($30)
-	stq	$21, 0($1)
-
-	ldq	$26, 0($30)
-	addq	$30, FRAME, $30
-	
-	ret	$31, ($26)		
-END_PROC(L4_ExchangeRegisters)
diff --git a/user/lib/l4/alpha-syscalls.c b/user/lib/l4/alpha-syscalls.c
deleted file mode 100644
index b2d04572..00000000
--- a/user/lib/l4/alpha-syscalls.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     alpha-syscalls.c
- * Description:   
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: alpha-syscalls.c,v 1.3 2003/09/24 19:06:28 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <l4/kip.h>
-
-#define NULL 0
-
-__L4_Ipc_t __L4_Ipc = NULL;
-__L4_Lipc_t __L4_Lipc = NULL;
-__L4_Unmap_t __L4_Unmap = NULL;
-__L4_Schedule_t __L4_Schedule = NULL;
-__L4_ThreadSwitch_t __L4_ThreadSwitch = NULL;
-__L4_SystemClock_t __L4_SystemClock = NULL;
-__L4_ExchangeRegisters_t __L4_ExchangeRegisters = NULL;
-
-__L4_ThreadControl_t __L4_ThreadControl = NULL;
-__L4_SpaceControl_t __L4_SpaceControl = NULL;
-__L4_ProcessorControl_t __L4_ProcessorControl = NULL;
-__L4_MemoryControl_t __L4_MemoryControl = NULL;
-
-void __L4_Init( void )
-{
-    L4_KernelInterfacePage_t *kip;
-    
-    kip = L4_KernelInterface( NULL, NULL, NULL );
-
-#define KIP_RELOC(a) (a + (L4_Word_t) kip)
-
-    __L4_Ipc = (__L4_Ipc_t) KIP_RELOC(kip->Ipc);
-    __L4_Lipc = (__L4_Lipc_t) KIP_RELOC(kip->Lipc);
-    __L4_Unmap = (__L4_Unmap_t) KIP_RELOC(kip->Unmap);
-    __L4_Schedule = (__L4_Schedule_t) KIP_RELOC(kip->Schedule);
-    __L4_ThreadSwitch = (__L4_ThreadSwitch_t) KIP_RELOC(kip->ThreadSwitch);
-    __L4_SystemClock = (__L4_SystemClock_t) KIP_RELOC(kip->SystemClock);
-    __L4_ExchangeRegisters = (__L4_ExchangeRegisters_t) KIP_RELOC(kip->ExchangeRegisters);
-
-    __L4_ThreadControl = (__L4_ThreadControl_t) KIP_RELOC(kip->ThreadControl);
-    __L4_SpaceControl = (__L4_SpaceControl_t) KIP_RELOC(kip->SpaceControl);
-    __L4_ProcessorControl = (__L4_ProcessorControl_t) KIP_RELOC(kip->ProcessorControl );
-    __L4_MemoryControl = (__L4_MemoryControl_t) KIP_RELOC(kip->MemoryControl);
-
-#undef KIP_RELOC
-}
-
diff --git a/user/lib/l4/arm-syscalls.c b/user/lib/l4/arm-syscalls.c
deleted file mode 100644
index ab94c156..00000000
--- a/user/lib/l4/arm-syscalls.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*********************************************************************
- *
- * Copyright (C) 2003-2004,  National ICT Australia (NICTA)
- *
- * File path:     lib/l4/arm-syscalls.c
- * Description:   syscall gate relocation
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: arm-syscalls.c,v 1.5 2005/01/12 02:56:09 cvansch Exp $
- *
- ********************************************************************/
-
-#include <l4/kip.h>
-
-#if !defined(NULL)
-#define NULL 0
-#endif
-
-__L4_Ipc_t __L4_Ipc = NULL;
-__L4_Lipc_t __L4_Lipc = NULL;
-__L4_Unmap_t __L4_Unmap = NULL;
-__L4_Schedule_t __L4_Schedule = NULL;
-__L4_ThreadSwitch_t __L4_ThreadSwitch = NULL;
-__L4_SystemClock_t __L4_SystemClock = NULL;
-__L4_ExchangeRegisters_t __L4_ExchangeRegisters = NULL;
-
-__L4_ThreadControl_t __L4_ThreadControl = NULL;
-__L4_SpaceControl_t __L4_SpaceControl = NULL;
-__L4_ProcessorControl_t __L4_ProcessorControl = NULL;
-__L4_MemoryControl_t __L4_MemoryControl = NULL;
-
-void __L4_Init( void )
-{
-    L4_KernelInterfacePage_t *kip;
-
-    kip = L4_KernelInterface( NULL, NULL, NULL );
-
-#define KIP_RELOC(a) (a + (L4_Word_t) kip)
-
-    __L4_Ipc = (__L4_Ipc_t) KIP_RELOC(kip->Ipc);
-    __L4_Lipc = (__L4_Lipc_t) KIP_RELOC(kip->Lipc);
-    __L4_Unmap = (__L4_Unmap_t) KIP_RELOC(kip->Unmap);
-    __L4_Schedule = (__L4_Schedule_t) KIP_RELOC(kip->Schedule);
-    __L4_ThreadSwitch = (__L4_ThreadSwitch_t) KIP_RELOC(kip->ThreadSwitch);
-    __L4_SystemClock = (__L4_SystemClock_t) KIP_RELOC(kip->SystemClock);
-    __L4_ExchangeRegisters = (__L4_ExchangeRegisters_t) KIP_RELOC(kip->ExchangeRegisters);
-
-    __L4_ThreadControl = (__L4_ThreadControl_t) KIP_RELOC(kip->ThreadControl);
-    __L4_SpaceControl = (__L4_SpaceControl_t) KIP_RELOC(kip->SpaceControl);
-    __L4_ProcessorControl = (__L4_ProcessorControl_t) KIP_RELOC(kip->ProcessorControl );
-    __L4_MemoryControl = (__L4_MemoryControl_t) KIP_RELOC(kip->MemoryControl);
-#undef KIP_RELOC
-}
-
diff --git a/user/lib/l4/ia64-syscall-stubs.S b/user/lib/l4/ia64-syscall-stubs.S
deleted file mode 100644
index 6be81534..00000000
--- a/user/lib/l4/ia64-syscall-stubs.S
+++ /dev/null
@@ -1,149 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     ia64-syscall-stubs.S
- * Description:   IA64 system call library stubs
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: ia64-syscall-stubs.S,v 1.9 2005/05/16 07:37:56 cgray Exp $
- *                
- ********************************************************************/
-
-
-#define DEFINE_SYSCALL(syscall)					\
-								;\
-	/* Stub for calling system call trampoline */		;\
-	.align 16						;\
-	.global __L4_##syscall					;\
-	.proc	__L4_##syscall					;\
-								;\
-__L4_##syscall:							;\
-	add	r27 = @gprel(__L4_##syscall##_ptr), gp ;;	;\
-	ld8	r27 = [r27] ;;					;\
-	mov	b6 = r27 ;;					;\
-	br.sptk.few b6						;\
-								;\
-	.endp	__L4_##syscall					;\
-								;\
-	/* Pointer to system call function */			;\
-	.data							;\
-__L4_##syscall##_ptr:						;\
-	data8	__L4_##syscall##_fixup				;\
-	.previous						;\
-								;\
-	/* Fixuup stub */					;\
-	.section .text.syscallfix, "ax", "progbits"		;\
-	.align 16						;\
-	.proc __L4_##syscall##_fixup				;\
-								;\
-__L4_##syscall##_fixup:						;\
-	add	r27 = @ltoff(@fptr(__L4_##syscall)), gp ;;	;\
-	ld8 r27 = [r27] ;;					;\
-	ld8 r27 = [r27] ;;					;\
-        mov	b6 = r27					;\
-        br.sptk.few __L4_fixup_syscalls				;\
-								;\
-	.endp __L4_##syscall##_fixup				;\
-	.previous
-
-
-DEFINE_SYSCALL (Ipc)
-DEFINE_SYSCALL (Lipc)
-DEFINE_SYSCALL (ExchangeRegisters)
-DEFINE_SYSCALL (ThreadControl)
-DEFINE_SYSCALL (SystemClock)
-DEFINE_SYSCALL (ThreadSwitch)
-DEFINE_SYSCALL (Schedule)
-DEFINE_SYSCALL (Unmap)
-DEFINE_SYSCALL (SpaceControl)
-DEFINE_SYSCALL (ProcessorControl)
-DEFINE_SYSCALL (MemoryControl)
-DEFINE_SYSCALL (PAL_Call)
-DEFINE_SYSCALL (SAL_Call)
-
-
-
-#define  FIXUP_SYSCALL(syscall)					;\
-	ld8	scval = [kipptr], 8				;\
-	add	fptr = @ltoff(@fptr(__L4_##syscall)), gp	;\
-	add	scptr = @gprel(__L4_##syscall##_ptr), gp ;;	;\
-	ld8	fptr = [fptr]					;\
-	cmp.gt	p6,p0 = scval, mb1 ;;				;\
-(p6)	add	scval = kipbase, scval ;;			;\
-	st8	[fptr] = scval					;\
-	st8	[scptr] = scval
-
-	//
-	// Function for fixing all system call links.  Address of
-	// invoking stub resides in b6.
-	//
-
-	.align	16
-	.proc	__L4_fixup_syscalls
-__L4_fixup_syscalls:
-
-kipbase	=	r8
-kipptr	=	r9
-fptr	=	r10
-scptr	=	r11
-mb1	=	r27
-scval	=	r26
-
-	// Get Kernel Interface Page
-{ .mlx
-	break.m	0x1face
-	movl	r0 = 0x0 ;;
-}
-	// Offset for system call links
-
-	add	kipptr = 0x1a0, kipbase
-
-	// Syscall offsets greater than 1MB are treated as absolute links
-
-	mov	mb1 = (1 << 20) ;;
-
-	// Calculate system call locations and store the results
-
-	FIXUP_SYSCALL (SpaceControl)
-	FIXUP_SYSCALL (ThreadControl)
-	FIXUP_SYSCALL (ProcessorControl)
-	FIXUP_SYSCALL (MemoryControl)
-	FIXUP_SYSCALL (Ipc)
-	FIXUP_SYSCALL (Lipc)
-	FIXUP_SYSCALL (Unmap)
-	FIXUP_SYSCALL (ExchangeRegisters)
-	FIXUP_SYSCALL (SystemClock)
-	FIXUP_SYSCALL (ThreadSwitch)
-	FIXUP_SYSCALL (Schedule)
-
-	add	kipptr = 0x28, kipptr ;;
-
-	FIXUP_SYSCALL (PAL_Call)
-	FIXUP_SYSCALL (SAL_Call)
-
-	// Jump back to system call stub
-
-	br.sptk.few b6
-
-	.endp	__L4_fixup_syscalls
diff --git a/user/lib/l4/mips32-syscalls.c b/user/lib/l4/mips32-syscalls.c
deleted file mode 100644
index 9b1b0841..00000000
--- a/user/lib/l4/mips32-syscalls.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     mips32-syscalls.c
- * Description:   MIPS32 syscall pointers
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: mips32-syscalls.c,v 1.1 2006/02/23 21:07:59 ud3 Exp $
- *                
- ********************************************************************/
-#include <l4/kip.h>
-
-#if !defined(NULL)
-#define NULL 0
-#endif
-
-__L4_Ipc_t __L4_Ipc = NULL;
-__L4_Lipc_t __L4_Lipc = NULL;
-__L4_Unmap_t __L4_Unmap = NULL;
-__L4_Schedule_t __L4_Schedule = NULL;
-__L4_ThreadSwitch_t __L4_ThreadSwitch = NULL;
-__L4_SystemClock_t __L4_SystemClock = NULL;
-__L4_ExchangeRegisters_t __L4_ExchangeRegisters = NULL;
-
-__L4_ThreadControl_t __L4_ThreadControl = NULL;
-__L4_SpaceControl_t __L4_SpaceControl = NULL;
-__L4_ProcessorControl_t __L4_ProcessorControl = NULL;
-__L4_MemoryControl_t __L4_MemoryControl = NULL;
-
-void __L4_Init( void )
-{
-    L4_KernelInterfacePage_t *kip;
-    
-    kip = L4_KernelInterface( NULL, NULL, NULL );
-
-#define KIP_RELOC(a) (a + (L4_Word_t) kip)
-
-    __L4_Ipc = (__L4_Ipc_t) KIP_RELOC(kip->Ipc);
-    __L4_Lipc = (__L4_Lipc_t) KIP_RELOC(kip->Lipc);
-    __L4_Unmap = (__L4_Unmap_t) KIP_RELOC(kip->Unmap);
-    __L4_Schedule = (__L4_Schedule_t) KIP_RELOC(kip->Schedule);
-    __L4_ThreadSwitch = (__L4_ThreadSwitch_t) KIP_RELOC(kip->ThreadSwitch);
-    __L4_SystemClock = (__L4_SystemClock_t) KIP_RELOC(kip->SystemClock);
-    __L4_ExchangeRegisters = (__L4_ExchangeRegisters_t) KIP_RELOC(kip->ExchangeRegisters);
-
-    __L4_ThreadControl = (__L4_ThreadControl_t) KIP_RELOC(kip->ThreadControl);
-    __L4_SpaceControl = (__L4_SpaceControl_t) KIP_RELOC(kip->SpaceControl);
-    __L4_ProcessorControl = (__L4_ProcessorControl_t) KIP_RELOC(kip->ProcessorControl );
-    __L4_MemoryControl = (__L4_MemoryControl_t) KIP_RELOC(kip->MemoryControl);
-
-#undef KIP_RELOC
-}
-
diff --git a/user/lib/l4/mips64-syscalls.c b/user/lib/l4/mips64-syscalls.c
deleted file mode 100644
index e7d728d9..00000000
--- a/user/lib/l4/mips64-syscalls.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2002-2003, Karlsruhe University
- *
- * File path:	lib/l4/mips64-syscalls.c
- * Description:	Mips64 syscall pointers.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: mips64-syscalls.c,v 1.4 2005/01/12 02:56:09 cvansch Exp $
- *
- ***************************************************************************/
-#include <l4/kip.h>
-
-#if !defined(NULL)
-#define NULL 0
-#endif
-
-__L4_Ipc_t __L4_Ipc = NULL;
-__L4_Lipc_t __L4_Lipc = NULL;
-__L4_Unmap_t __L4_Unmap = NULL;
-__L4_Schedule_t __L4_Schedule = NULL;
-__L4_ThreadSwitch_t __L4_ThreadSwitch = NULL;
-__L4_SystemClock_t __L4_SystemClock = NULL;
-__L4_ExchangeRegisters_t __L4_ExchangeRegisters = NULL;
-
-__L4_ThreadControl_t __L4_ThreadControl = NULL;
-__L4_SpaceControl_t __L4_SpaceControl = NULL;
-__L4_ProcessorControl_t __L4_ProcessorControl = NULL;
-__L4_MemoryControl_t __L4_MemoryControl = NULL;
-
-void __L4_Init( void )
-{
-    L4_KernelInterfacePage_t *kip;
-    
-    kip = L4_KernelInterface( NULL, NULL, NULL );
-
-#define KIP_RELOC(a) (a + (L4_Word_t) kip)
-
-    __L4_Ipc = (__L4_Ipc_t) KIP_RELOC(kip->Ipc);
-    __L4_Lipc = (__L4_Lipc_t) KIP_RELOC(kip->Lipc);
-    __L4_Unmap = (__L4_Unmap_t) KIP_RELOC(kip->Unmap);
-    __L4_Schedule = (__L4_Schedule_t) KIP_RELOC(kip->Schedule);
-    __L4_ThreadSwitch = (__L4_ThreadSwitch_t) KIP_RELOC(kip->ThreadSwitch);
-    __L4_SystemClock = (__L4_SystemClock_t) KIP_RELOC(kip->SystemClock);
-    __L4_ExchangeRegisters = (__L4_ExchangeRegisters_t) KIP_RELOC(kip->ExchangeRegisters);
-
-    __L4_ThreadControl = (__L4_ThreadControl_t) KIP_RELOC(kip->ThreadControl);
-    __L4_SpaceControl = (__L4_SpaceControl_t) KIP_RELOC(kip->SpaceControl);
-    __L4_ProcessorControl = (__L4_ProcessorControl_t) KIP_RELOC(kip->ProcessorControl );
-    __L4_MemoryControl = (__L4_MemoryControl_t) KIP_RELOC(kip->MemoryControl);
-
-#undef KIP_RELOC
-}
-
diff --git a/user/lib/l4/sparc64-syscalls.c b/user/lib/l4/sparc64-syscalls.c
deleted file mode 100644
index 950cc90d..00000000
--- a/user/lib/l4/sparc64-syscalls.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/****************************************************************************
- *
- * Copyright (C) 2003, University of New South Wales
- *
- * File path:	lib/l4/sparc64-syscalls.c
- * Description:	SPARCv9 syscall pointers.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $Id: sparc64-syscalls.c,v 1.1 2004/02/10 03:15:45 philipd Exp $
- *
- ***************************************************************************/
-#include <l4/kip.h>
-
-#if !defined(NULL)
-#define NULL 0
-#endif
-
-__L4_Ipc_t __L4_Ipc = NULL;
-__L4_Lipc_t __L4_Lipc = NULL;
-__L4_Unmap_t __L4_Unmap = NULL;
-__L4_Schedule_t __L4_Schedule = NULL;
-__L4_ThreadSwitch_t __L4_ThreadSwitch = NULL;
-__L4_SystemClock_t __L4_SystemClock = NULL;
-__L4_ExchangeRegisters_t __L4_ExchangeRegisters = NULL;
-
-__L4_ThreadControl_t __L4_ThreadControl = NULL;
-__L4_SpaceControl_t __L4_SpaceControl = NULL;
-__L4_ProcessorControl_t __L4_ProcessorControl = NULL;
-__L4_MemoryControl_t __L4_MemoryControl = NULL;
-
-void __L4_Init( void )
-{
-    L4_KernelInterfacePage_t *kip;
-
-    kip = L4_KernelInterface( NULL, NULL, NULL );
-
-#define KIP_RELOC(a) ((L4_Word_t)kip + a)
-
-    __L4_Ipc = (__L4_Ipc_t) KIP_RELOC(kip->Ipc);
-    __L4_Lipc = (__L4_Lipc_t) KIP_RELOC(kip->Lipc);
-    __L4_Unmap = (__L4_Unmap_t) KIP_RELOC(kip->Unmap);
-    __L4_Schedule = (__L4_Schedule_t) KIP_RELOC(kip->Schedule);
-
-    __L4_ThreadSwitch = (__L4_ThreadSwitch_t) KIP_RELOC(kip->ThreadSwitch);
-    __L4_SystemClock = (__L4_SystemClock_t) KIP_RELOC(kip->SystemClock);
-    __L4_ExchangeRegisters = (__L4_ExchangeRegisters_t) KIP_RELOC(kip->ExchangeRegisters);
-
-    __L4_ThreadControl = (__L4_ThreadControl_t) KIP_RELOC(kip->ThreadControl);
-    __L4_SpaceControl = (__L4_SpaceControl_t) KIP_RELOC(kip->SpaceControl);
-    __L4_ProcessorControl = (__L4_ProcessorControl_t) KIP_RELOC(kip->ProcessorControl );
-    __L4_MemoryControl = (__L4_MemoryControl_t) KIP_RELOC(kip->MemoryControl);
-
-#undef KIP_RELOC
-}
-
diff --git a/user/lib/l4/x86-syscalls.c b/user/lib/l4/x86-syscalls.c
deleted file mode 100644
index f098f623..00000000
--- a/user/lib/l4/x86-syscalls.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002, 2003,  Karlsruhe University
- *                
- * File path:     x86-syscalls.c
- * Description:   syscall gate relocation
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: x86-syscalls.c,v 1.3 2003/09/24 19:06:28 skoglund Exp $
- *                
- ********************************************************************/
-#include <l4/types.h>
-#include <l4/kip.h>
-
-#define DEFINE_SYSCALL(syscall)				\
-void (*__L4_##syscall)(void);				\
-void __LibL4_Init_##syscall(void);			\
-asm ("__LibL4_Init_"#syscall":\n"			\
-     "pusha\n"						\
-     "call __LibL4_Init\n"				\
-     "popa\n"						\
-     "jmp *__L4_"#syscall);				\
-void (*__L4_##syscall)(void) = __LibL4_Init_##syscall;
-
-
-DEFINE_SYSCALL(Ipc)
-DEFINE_SYSCALL(Lipc)
-DEFINE_SYSCALL(ExchangeRegisters)
-DEFINE_SYSCALL(ThreadControl)
-DEFINE_SYSCALL(SystemClock)
-DEFINE_SYSCALL(ThreadSwitch)
-DEFINE_SYSCALL(Schedule)
-DEFINE_SYSCALL(Unmap)
-DEFINE_SYSCALL(SpaceControl)
-DEFINE_SYSCALL(ProcessorControl)
-DEFINE_SYSCALL(MemoryControl)
-
-#define SET_SYSCALL(syscall) __L4_##syscall = (void(*)(void))((L4_Word_t)kip + kip->syscall)
-
-void __LibL4_Init(void)
-{
-    L4_Word_t dummy;
-    L4_KernelInterfacePage_t * kip = (L4_KernelInterfacePage_t*)
-	L4_KernelInterface(&dummy, &dummy, &dummy);
-
-    SET_SYSCALL(SpaceControl);
-    SET_SYSCALL(ThreadControl);
-    SET_SYSCALL(ProcessorControl);
-    SET_SYSCALL(MemoryControl);
-
-    SET_SYSCALL(Ipc);
-    SET_SYSCALL(Lipc);
-    SET_SYSCALL(Unmap);
-    SET_SYSCALL(ExchangeRegisters);
-
-    SET_SYSCALL(SystemClock);
-    SET_SYSCALL(ThreadSwitch);
-    SET_SYSCALL(Schedule);
-}
-
-
diff --git a/user/serv/sigma0/crt0-alpha.S b/user/serv/sigma0/crt0-alpha.S
deleted file mode 100644
index 3dd6a5f9..00000000
--- a/user/serv/sigma0/crt0-alpha.S
+++ /dev/null
@@ -1,58 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     sigma0/src/arch/alpha/crt0.S
- * Description:   initial runtime for sigma0 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-alpha.S,v 1.2 2003/09/24 19:06:29 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <l4/alpha/asm.h>
-#include <l4/alpha/pal.h>	
-
-#define STACKSIZE 8192
-	
-BEGIN_PROC(_start)
-	bsr	$27, 1f
-1:	ldgp	$29, 0($27)
-		
-	lda	$30, init_stack
-	lda	$1, STACKSIZE
-	addq	$30, $1, $30
-
-	lda	$27, __L4_Init
-	jsr	$26, ($27)
-
-	ldgp	$29, 0($26)
-	
-	lda	$27, sigma0_main
-	jsr	$26, ($27), sigma0_main
-
-	lda	$16, 2
-	call_pal PAL_gentrap		
-END_PROC(_start)
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/serv/sigma0/crt0-arm.S b/user/serv/sigma0/crt0-arm.S
deleted file mode 100644
index 96b51cef..00000000
--- a/user/serv/sigma0/crt0-arm.S
+++ /dev/null
@@ -1,49 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 1999, 2000, 2001,  Karlsruhe University
- *                
- * File path:     sigma0/crt0-arm.S
- * Description:   Startup code for ARM family processors.
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-arm.S,v 1.3 2003/09/24 19:06:29 skoglund Exp $
- *                
- ********************************************************************/
-#include <config.h>
-#include <l4/arm/asm.h>
-
-BEGIN_PROC(_start)
-	ldr     sp,     2f
-
-        bl      __L4_Init
-
-        bl      sigma0_main
-
-1:	b	1b
-2:	.word	_sigma0_stack_top
-END_PROC(_start)
-
-.align
-_sigma0_stack:
-	.space	8192
-_sigma0_stack_top:
diff --git a/user/serv/sigma0/crt0-ia64.S b/user/serv/sigma0/crt0-ia64.S
deleted file mode 100644
index ebd85b72..00000000
--- a/user/serv/sigma0/crt0-ia64.S
+++ /dev/null
@@ -1,59 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  Karlsruhe University
- *                
- * File path:     crt0-ia64.S
- * Description:   Startup code for ia64 processors
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-ia64.S,v 1.3 2003/09/24 19:06:29 skoglund Exp $
- *                
- ********************************************************************/
-#include <config.h>
-
-	.text
-	.global _start
-	.align	16
-	.proc	_start
-_start:
-	movl	gp = __gp
-	movl	r8 = reg_stack
-	movl	sp = stack
-	mov	ar.rsc = 0		// turn off RSE
-	;;
-	mov	ar.bspstore = r8
-	;;
-	mov	ar.rsc = 3		// turn RSE back on
-	;;
-	alloc	r8 = ar.pfs,0,0,0,0
-	br.sptk.many sigma0_main
-
-	/* NOTREACHED */
-	.endp	_start
-
-	.bss
-	.align 16
-reg_stack:
-	.space	8192-16
-stack:
-	.space	16
diff --git a/user/serv/sigma0/crt0-mips32.S b/user/serv/sigma0/crt0-mips32.S
deleted file mode 100644
index 3fbc8e0f..00000000
--- a/user/serv/sigma0/crt0-mips32.S
+++ /dev/null
@@ -1,53 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2006,  Karlsruhe University
- *                
- * File path:     crt0-mips32.S
- * Description:   Startup code for MIPS32 processors
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-mips32.S,v 1.1 2006/02/23 21:08:00 ud3 Exp $
- *                
- ********************************************************************/
-#include <l4/mips32/asm.h>
-#include <l4/mips32/regdef.h>
-
-#define STACKSIZE 8192
-	
-	.section ".text"
-	.align	4
-	.globl	_start
-_start:
-	la	sp, init_stack
-	addu	sp, STACKSIZE
-	subu	sp, sp, 0x10	
-	jal	__L4_Init
-
-	jal	sigma0_main
-	nop
-	addu sp, sp, 0x10
-	
-1:
-	b	1b
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/serv/sigma0/crt0-mips64.S b/user/serv/sigma0/crt0-mips64.S
deleted file mode 100644
index 52e0e7f0..00000000
--- a/user/serv/sigma0/crt0-mips64.S
+++ /dev/null
@@ -1,50 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2002,  University of New South Wales
- *                
- * File path:     serv/sigma0/crt0-mips64.S
- * Description:   initial runtime for sigma0 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-mips64.S,v 1.2 2003/09/24 19:06:29 skoglund Exp $
- *                
- ********************************************************************/
-
-#include <l4/mips64/asm.h>
-#include <l4/mips64/regdef.h>
-
-#define STACKSIZE 8192
-	
-BEGIN_PROC(_start)
-	dla	sp, init_stack
-	daddu	sp, STACKSIZE
-	
-	jal	__L4_Init
-
-	jal	sigma0_main
-
-1:
-	b	1b
-END_PROC(_start)
-
-.lcomm init_stack, STACKSIZE
diff --git a/user/serv/sigma0/crt0-sparc64.S b/user/serv/sigma0/crt0-sparc64.S
deleted file mode 100644
index f11c069e..00000000
--- a/user/serv/sigma0/crt0-sparc64.S
+++ /dev/null
@@ -1,55 +0,0 @@
-/*********************************************************************
- *                
- * Copyright (C) 2003,  University of New South Wales
- *                
- * File path:     sigma0/src/arch/sparc64/crt0.S
- * Description:   initial runtime for sigma0 
- *                
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *                
- * $Id: crt0-sparc64.S,v 1.4 2004/02/15 23:02:49 philipd Exp $
- *                
- ********************************************************************/
-
-	.section ".text"
-	.align 8
-	.globl _start
-_start:
-	setx    _sigma0_stack_top, %g1, %fp
-	sub     %fp, 2047, %fp  ! adjust for stack bias
-	sub     %fp, 128, %sp   ! create a stack frame
-	
-	call    __L4_Init
-	nop
-	
-	call    sigma0_main
-	nop
-	
-1:      ba,pt   %xcc, 1b
-	nop
-
-#define SIGMA0_STACK_SIZE	(4096*4)
-	.section ".bss"
-	.align	16
-_sigma0_stack_bottom:
-.space	SIGMA0_STACK_SIZE
-_sigma0_stack_top: