diff --git a/kernel/config/powerpc.cml b/kernel/config/powerpc.cml index 7ef540ec..f693c842 100644 --- a/kernel/config/powerpc.cml +++ b/kernel/config/powerpc.cml @@ -45,6 +45,7 @@ PLAT_PPC44X "44X Embedded Processor Platform" powerpc_subplatform 'Sub-Platform' PLAT_440_BGP "BluegeneP" +PLAT_440_EBONY "AMCC Ebony Evaluation Board" PPC_EXPOSE_OPIC 'Expose the interrupt controller to user space?' text @@ -142,15 +143,6 @@ If unsure about this option, answer yes. KDB_CONS_BGP_JTAG "Enable Bluegene/P JTAG console" KDB_CONS_BGP_TREE "Enable Bluegene/P Tree console" - -ppc_debug_consoles "Consoles" - -menu ppc_debug_consoles - KDB_CONS_OF1275 - KDB_CONS_PSIM_COM - KDB_CONS_BGP_JTAG - KDB_CONS_BGP_TREE - default KDB_CONS_OF1275 from n default KDB_CONS_PSIM_COM from n @@ -170,12 +162,13 @@ unless ARCH_POWERPC suppress dependent powerpc_type choices powerpc_subplatform PLAT_440_BGP + PLAT_440_EBONY default PLAT_440_BGP # standard PPC arch unless PPC_MMU_SEGMENTS suppress PLAT_OFPPC PPC_BAT_SYSCALLS PPC_SEGMENT_LOOP unless PLAT_OFPPC suppress PPC_EXPOSE_OPIC KDB_CONS_OF1275 KDB_CONS_PSIM_COM -unless PLAT_PPC44X suppress KDB_CONS_BGP_JTAG KDB_CONS_BGP_TREE +unless PLAT_440_BGP suppress KDB_CONS_BGP_JTAG KDB_CONS_BGP_TREE default PPC_EXPOSE_OPIC from n unless PLAT_PPC44X suppress dependent powerpc_subplatform diff --git a/kernel/config/powerpc64.cml b/kernel/config/powerpc64.cml index 3a4a3deb..ff0f9e2b 100644 --- a/kernel/config/powerpc64.cml +++ b/kernel/config/powerpc64.cml @@ -67,11 +67,6 @@ that no OpenFirmware services will be available after boot (Dissasembler etc). . -ppc64_debug_consoles "Consoles" - -menu ppc64_debug_consoles - KDB_CONS_RTAS - choices powerpc64_type CPU_POWERPC64_POWER3 CPU_POWERPC64_POWER3p @@ -90,6 +85,7 @@ choices powerpc64_platform default PLAT_OFG5 unless ARCH_POWERPC64 suppress dependent powerpc64_platform +unless ARCH_POWERPC64 suppress dependent KDB_CONS_RTAS unless PLAT_OFPOWER3 suppress CPU_POWERPC64_POWER3 CPU_POWERPC64_POWER3p unless PLAT_OFPOWER4 suppress CPU_POWERPC64_POWER4 CPU_POWERPC64_POWER4p diff --git a/kernel/config/rules.cml b/kernel/config/rules.cml index 31cd4e35..5d49b42c 100644 --- a/kernel/config/rules.cml +++ b/kernel/config/rules.cml @@ -140,11 +140,10 @@ Enables kernel event logging and kernel performance counters. # debugger menu # KDB 'Enable Kernel Debugger' -kdb_console 'Kernel Debugger Console' +KDB_BOOT_CONS 'Kernel Debugger console used at boot time' KDB_CONS_COM 'Serial Port' KDB_CONS_KBD 'Keyboard' KDB_COMPORT 'Kernel Debugger Serial Port' text - The comport base to use for serial I/O. Typical values for comport base are: @@ -153,7 +152,14 @@ base are: Port 2 - 0x3e8 Port 3 - 0x2e8 . +KDB_COMBASE 'Kernel Debugger Serial Port Base' text +The comport base to use for serial I/O. Typical values for comport +base are: + + Port 0 - 0x200 + Port 1 - 0x300 +. KDB_COMSPEED 'Kernel Debugger Serial Port Speed' KDB_ON_STARTUP 'Enter kernel debugger on startup' KDB_BREAKIN 'Kernel Debugger breakin' @@ -242,13 +248,11 @@ it useful, too. Enabling KDB can result in severe performance hits. Do not use it for benchmarking unless you exactly know what you're doing. . +kdb_console 'Kernel Debugger Console' trace 'Trace Settings' codegen 'Code Generator Options' hardware_misc 'Miscellaneous' - - - menu hardware arch x86_arch @@ -261,8 +265,8 @@ menu hardware powerpc64_type hardware_misc SMP { SMP_MAX_PROCS% SMP_IDLE_POLL} - + choices arch # Basic architecture ARCH_X86 ARCH_POWERPC @@ -344,42 +348,46 @@ unless ARCH_X86 suppress SPIN_WHEELS unless ARCH_X86 suppress NEW_MDB unless NEW_MDB suppress X86_IO_FLEXPAGES +menu kdb_console + KDB_CONS_COM { KDB_COMPORT@ KDB_COMBASE@ KDB_COMSPEED% } + KDB_CONS_KBD + KDB_CONS_OF1275 + KDB_CONS_PSIM_COM + KDB_CONS_BGP_JTAG + KDB_CONS_BGP_TREE + KDB_CONS_RTAS + KDB_BOOT_CONS% + +unless ARCH_X86 suppress KDB_CONS_KBD +unless ARCH_X86 or PLAT_440_EBONY suppress KDB_CONS_COM +unless ARCH_X86 suppress KDB_COMPORT +unless PLAT_440_EBONY suppress KDB_COMBASE + +default KDB_CONS_COM from y +default KDB_COMPORT from 0x3f8 +default KDB_COMBASE from 0x200 +default KDB_COMSPEED from 115200 range 115200 57600 38400 19200 9600 4800 2400 1200 300 + + +default KDB_BOOT_CONS from 0 range 0 1 2 +unless KDB suppress dependent kdb_console menu debugger KDB - ppc_debug_consoles - ppc64_debug_consoles kdb_console - KDB_COMPORT@ - KDB_COMSPEED% KDB_DISAS KDB_ON_STARTUP - KDB_BREAKIN - KDB_BREAKIN_BREAK - KDB_BREAKIN_ESCAPE + KDB_BREAKIN { KDB_BREAKIN_BREAK KDB_BREAKIN_ESCAPE } KDB_INPUT_HLT KDB_NO_ASSERTS trace default DEBUG from y unless DEBUG suppress dependent debugger -default KDB_COMPORT from 0x3f8 -default KDB_COMSPEED from 115200 range 115200 57600 38400 19200 9600 4800 2400 1200 300 -unless KDB_CONS_COM suppress KDB_COMPORT KDB_COMSPEED -unless KDB suppress dependent kdb_console KDB_COMPORT KDB_COMSPEED KDB_DISAS KDB_ON_STARTUP KDB_BREAKIN trace ppc_debug_consoles -when ARCH_POWERPC suppress kdb_console KDB_COMPORT KDB_COMSPEED -unless ARCH_X86 suppress KDB_INPUT_HLT -when ARCH_POWERPC64 suppress KDB_COMPORT KDB_COMSPEED -unless ARCH_POWERPC suppress ppc_debug_consoles -unless ARCH_POWERPC64 suppress ppc64_debug_consoles -when ARCH_POWERPC64 suppress KDB_CONS_PSIM_COM +unless KDB suppress dependent KDB_DISAS KDB_ON_STARTUP KDB_BREAKIN trace +unless ARCH_X86 suppress dependent KDB_INPUT_HLT KDB_BREAKIN_BREAK default KDB_BREAKIN_ESCAPE from y default KDB_BREAKIN_BREAK from y -unless PLAT_PC99 and KDB_BREAKIN and KDB_CONS_COM suppress dependent KDB_BREAKIN_BREAK KDB_BREAKIN_ESCAPE - -choices kdb_console - KDB_CONS_KBD KDB_CONS_COM - default KDB_CONS_COM menu trace VERBOSE_INIT diff --git a/kernel/config/x86.cml b/kernel/config/x86.cml index 7b04f141..67d6615f 100644 --- a/kernel/config/x86.cml +++ b/kernel/config/x86.cml @@ -160,7 +160,7 @@ choices x86_platform PLAT_PC99 default PLAT_PC99 -unless ARCH_X86 suppress dependent x86_platform +unless ARCH_X86 suppress dependent x86_platform derive X86_SYSENTER from CPU_X86_P4 or CPU_X86_I686 or CPU_X86_K8 derive X86_FXSR from CPU_X86_P4 or CPU_X86_I686 or CPU_X86_K8 diff --git a/kernel/kdb/arch/powerpc64/macio.cc b/kernel/kdb/arch/powerpc64/macio.cc index 3d020bba..21524a9e 100644 --- a/kernel/kdb/arch/powerpc64/macio.cc +++ b/kernel/kdb/arch/powerpc64/macio.cc @@ -339,5 +339,4 @@ kdb_console_t kdb_consoles[] = { KDB_NULL_CONSOLE }; -word_t kdb_current_console = 0; diff --git a/kernel/kdb/arch/powerpc64/ofio.cc b/kernel/kdb/arch/powerpc64/ofio.cc index 467e6945..d8f40c41 100644 --- a/kernel/kdb/arch/powerpc64/ofio.cc +++ b/kernel/kdb/arch/powerpc64/ofio.cc @@ -315,5 +315,3 @@ kdb_console_t kdb_consoles[] = { KDB_NULL_CONSOLE }; -word_t kdb_current_console = 0; - diff --git a/kernel/kdb/generic/console.cc b/kernel/kdb/generic/console.cc index 0becb8aa..1732f050 100644 --- a/kernel/kdb/generic/console.cc +++ b/kernel/kdb/generic/console.cc @@ -1,6 +1,6 @@ /********************************************************************* * - * Copyright (C) 2002, 2004, 2007-2008, Karlsruhe University + * Copyright (C) 2002, 2004, 2007-2008, 2010, Karlsruhe University * * File path: kdb/generic/console.cc * Description: Generic console functionality @@ -37,10 +37,20 @@ //#define CONFIG_SMP_OUTPUTPREFIX 1 +word_t kdb_current_console; + void init_console (void) { + for (kdb_current_console=0; kdb_current_console < CONFIG_KDB_BOOT_CONS; kdb_current_console++) + { + if (kdb_consoles[kdb_current_console].name == NULL) + { + kdb_current_console = 0; + break; + } + } if (kdb_consoles[kdb_current_console].init) - kdb_consoles[kdb_current_console].init (); + kdb_consoles[kdb_current_console].init (); } @@ -60,6 +70,7 @@ CMD (cmd_toggle_cpuprefix, cg) void SECTION(SEC_KDEBUG) putc (char c) { + kdb_console_t * cons = &kdb_consoles[kdb_current_console]; diff --git a/kernel/kdb/platform/ofppc/io.cc b/kernel/kdb/platform/ofppc/io.cc index 951d5b29..79cdb182 100644 --- a/kernel/kdb/platform/ofppc/io.cc +++ b/kernel/kdb/platform/ofppc/io.cc @@ -177,5 +177,3 @@ kdb_console_t kdb_consoles[] = { KDB_NULL_CONSOLE }; -word_t kdb_current_console = 0; - diff --git a/kernel/kdb/platform/pc99/io.cc b/kernel/kdb/platform/pc99/io.cc index 84ebfa87..872b61df 100644 --- a/kernel/kdb/platform/pc99/io.cc +++ b/kernel/kdb/platform/pc99/io.cc @@ -1,6 +1,6 @@ /********************************************************************* * - * Copyright (C) 2001, 2003-2009, Karlsruhe University + * Copyright (C) 2001, 2003-2010, Karlsruhe University * * File path: kdb/platform/pc99/io.cc * Description: PC99 specific I/O functions @@ -70,17 +70,15 @@ void kdebug_check_breakin (void) SECTION (SEC_PC99_IO); kdb_console_t kdb_consoles[] = { - { "screen", NULL, &putc_screen, &getc_screen }, +#if defined(CONFIG_KDB_CONS_COM) { "serial", &init_serial, &putc_serial, &getc_serial }, +#endif +#if defined(CONFIG_KDB_CONS_KBD) + { "screen", NULL, &putc_screen, &getc_screen }, +#endif KDB_NULL_CONSOLE }; -#if defined(CONFIG_KDB_CONS_COM) -word_t kdb_current_console = 1; -#else -word_t kdb_current_console = 0; -#endif - /* diff --git a/kernel/kdb/platform/ppc44x/Makeconf b/kernel/kdb/platform/ppc44x/Makeconf index de168564..101a639a 100644 --- a/kernel/kdb/platform/ppc44x/Makeconf +++ b/kernel/kdb/platform/ppc44x/Makeconf @@ -30,5 +30,10 @@ ## $Id$ ## ###################################################################### +ifeq ("$(CONFIG_PLAT_440_BGP)","y") SOURCES += $(addprefix kdb/platform/ppc44x/, bluegene.cc bgtree.cc) +endif +ifeq ("$(CONFIG_PLAT_440_EBONY_)","y") +SOURCES += $(addprefix kdb/platform/ppc44x/, ebony.cc +endif diff --git a/kernel/kdb/platform/ppc44x/bluegene.cc b/kernel/kdb/platform/ppc44x/bluegene.cc index c973bcc5..46b59656 100644 --- a/kernel/kdb/platform/ppc44x/bluegene.cc +++ b/kernel/kdb/platform/ppc44x/bluegene.cc @@ -236,11 +236,14 @@ public: bool check_breakin() { + bool ret = false; +#if defined(CONFIG_KDB_BREAKIN_ESCAPE) lock.lock(); poll(); - bool ret = in_len != 0 && in_buf[in_head] == 0x1b; + ret = in_len != 0 && in_buf[in_head] == 0x1b; lock.unlock(); - return ret; +#endif + return ret; } } tree_console; @@ -416,4 +419,3 @@ void kdb_inject(except_regs_t* frame) #endif } -word_t kdb_current_console = 0; diff --git a/kernel/kdb/platform/ppc44x/ebony.cc b/kernel/kdb/platform/ppc44x/ebony.cc new file mode 100644 index 00000000..0d4363cc --- /dev/null +++ b/kernel/kdb/platform/ppc44x/ebony.cc @@ -0,0 +1,254 @@ +/* + * (C) Copyright 2000-2006 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This source code is dual-licensed. You may use it under the terms of the + * GNU General Public License version 2, or under the license below. + * + * This source code has been made available to you by IBM on an AS-IS + * basis. Anyone receiving this source is licensed under IBM + * copyrights to use it in any way he or she deems fit, including + * copying it, modifying it, compiling it, and redistributing it either + * with or without modifications. No license under IBM patents or + * patent applications is to be implied by the copyright license. + * + * Any user of this software should understand that IBM cannot provide + * technical support for this software and will not be responsible for + * any consequences resulting from the use of this software. + * + * Any person who transfers this source code or any derivative work + * must include the IBM copyright notice, this paragraph, and the + * preceding two paragraphs in the transferred software. + * + * COPYRIGHT I B M CORPORATION 1995 + * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M + */ + +#include "fdt.h" +#include "powerpc.h" + +/*----------------------------------------------------------------------- + * High Level Configuration Options + *----------------------------------------------------------------------*/ +#define CONFIG_EBONY 1 /* Board is ebony */ +#define CONFIG_440GP 1 /* Specifc GP support */ +#define CONFIG_440 1 /* ... PPC440 family */ +#define CONFIG_4xx 1 /* ... PPC4xx family */ +#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ +/*----------------------------------------------------------------------- + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + *----------------------------------------------------------------------*/ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ +#define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH */ +#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ +#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */ +#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */ +#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ + +#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000) +#define CONFIG_SYS_FPGA_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08300000) +/*----------------------------------------------------------------------- + * Serial Port + *----------------------------------------------------------------------*/ +#undef CONFIG_SERIAL_SOFTWARE_FIFO +#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */ +#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +#define CNTRL_DCR_BASE 0x0b0 +#define CPC0_CR0 (CNTRL_DCR_BASE+0x3b) /* Control 0 register */ +#define CPC0_CR1 (CNTRL_DCR_BASE+0x3a) /* Control 1 register */ + +#define UART0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000200) + +#define CR0_MASK 0x3fff0000 +#define CR0_EXTCLK_ENA 0x00600000 +#define CR0_UDIV_POS 16 +#define UDIV_SUBTRACT 1 +#define UART0_SDR CPC0_CR0 +#define MFREG(a, d) d = mfdcr(a) +#define MTREG(a, d) mtdcr(a, d) + + +#define UART_RBR 0x00 +#define UART_THR 0x00 +#define UART_IER 0x01 +#define UART_IIR 0x02 +#define UART_FCR 0x02 +#define UART_LCR 0x03 +#define UART_MCR 0x04 +#define UART_LSR 0x05 +#define UART_MSR 0x06 +#define UART_SCR 0x07 +#define UART_DLL 0x00 +#define UART_DLM 0x01 + +/*-----------------------------------------------------------------------------+ + | Line Status Register. + +-----------------------------------------------------------------------------*/ +#define asyncLSRDataReady1 0x01 +#define asyncLSROverrunError1 0x02 +#define asyncLSRParityError1 0x04 +#define asyncLSRFramingError1 0x08 +#define asyncLSRBreakInterrupt1 0x10 +#define asyncLSRTxHoldEmpty1 0x20 +#define asyncLSRTxShiftEmpty1 0x40 +#define asyncLSRRxFifoError1 0x80 + + + +/* + * Minimal serial functions needed to use one of the SMC ports + * as serial console interface. + */ + +int serial_init_dev(unsigned long base) +{ + unsigned long reg; + unsigned long udiv; + unsigned short bdiv; + unsigned long tmp; + L4_Word8_t val; + + MFREG(UART0_SDR, reg); + reg &= ~CR0_MASK; + + reg |= CR0_EXTCLK_ENA; + udiv = 1; + tmp = CONFIG_BAUDRATE * 16; + bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp; + + reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS; /* set the UART divisor */ + + /* + * Configure input clock to baudrate generator for all + * available serial ports here + */ + MTREG(UART0_SDR, reg); + + + out_8((L4_Word8_t *)base + UART_LCR, 0x80); /* set DLAB bit */ + out_8((L4_Word8_t *)base + UART_DLL, bdiv); /* set baudrate divisor */ + out_8((L4_Word8_t *)base + UART_DLM, bdiv >> 8); /* set baudrate divisor */ + out_8((L4_Word8_t *)base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */ + out_8((L4_Word8_t *)base + UART_FCR, 0x00); /* disable FIFO */ + out_8((L4_Word8_t *)base + UART_MCR, 0x00); /* no modem control DTR RTS */ + val = in_8((L4_Word8_t *)base + UART_LSR); /* clear line status */ + val = in_8((L4_Word8_t *)base + UART_RBR); /* read receive buffer */ + out_8((L4_Word8_t *)base + UART_SCR, 0x00); /* set scratchpad */ + out_8((L4_Word8_t *)base + UART_IER, 0x00); /* set interrupt enable reg */ + + + return (0); +} + + +void serial_putc_dev(unsigned long base, const char c) +{ + int i; + + if (c == '\n') + serial_putc_dev(base, '\r'); + + /* check THRE bit, wait for transmiter available */ + for (i = 1; i < 3500; i++) { + if ((in_8((L4_Word8_t *)base + UART_LSR) & 0x20) == 0x20) + break; + //udelay (100); + } + + out_8((L4_Word8_t *)base + UART_THR, c); /* put character out */ +} + +void serial_puts_dev (unsigned long base, const char *s) +{ + while (*s) + serial_putc_dev (base, *s++); +} + +int serial_getc_dev (unsigned long base) +{ + unsigned char status = 0; + + while (1) { + status = in_8((L4_Word8_t *)base + UART_LSR); + if ((status & asyncLSRDataReady1) != 0x0) + break; + + if ((status & ( asyncLSRFramingError1 | + asyncLSROverrunError1 | + asyncLSRParityError1 | + asyncLSRBreakInterrupt1 )) != 0) { + out_8((L4_Word8_t *)base + UART_LSR, + asyncLSRFramingError1 | + asyncLSROverrunError1 | + asyncLSRParityError1 | + asyncLSRBreakInterrupt1); + } + } + + return (0x000000ff & (int) in_8((L4_Word8_t *)base)); +} + + +class cons_t { +public: + bool verbose; + + + bool init() + { + serial_init_dev(UART0_BASE); + serial_init_dev(UART1_BASE); + return true; + } + + void putc(int c) + { + serial_putc_dev(UART0_BASE,c); + serial_putc_dev(UART1_BASE,c); + } +}; + +cons_t cons; + +bool initialize_console(fdt_t *fdt) +{ + return cons.init(); +} + +extern "C" void putc(int c) +{ + cons.putc(c); +} + +kdb_console_t kdb_consoles[] = { +#if defined(CONFIG_KDB_CONS_COM) + { "serial", init_serial, putc_serial, getc_serial }, +#endif + KDB_NULL_CONSOLE +}; diff --git a/kernel/kdb/platform/simics/Makeconf b/kernel/kdb/platform/simics/Makeconf index 92e7ce61..e118d6df 100644 --- a/kernel/kdb/platform/simics/Makeconf +++ b/kernel/kdb/platform/simics/Makeconf @@ -2,7 +2,7 @@ ## ## Copyright (C) 2010, Karlsruhe University ## -## File path: platform/simics/Makeconf +## File path: kdb/platform/simics/Makeconf ## Description: Generic linkser script for x86. ## ## Redistribution and use in source and binary forms, with or without diff --git a/kernel/kdb/platform/simics/io.cc b/kernel/kdb/platform/simics/io.cc index e2e87119..aef307b0 100644 --- a/kernel/kdb/platform/simics/io.cc +++ b/kernel/kdb/platform/simics/io.cc @@ -1,6 +1,6 @@ /********************************************************************* * - * Copyright (C) 2001-2004, 2007, Karlsruhe University + * Copyright (C) 2001-2004, 2007, 2010, Karlsruhe University * * File path: kdb/platform/simics/io.cc * Description: Simics specific I/O functions @@ -71,11 +71,6 @@ kdb_console_t kdb_consoles[] = { KDB_NULL_CONSOLE }; -#if defined(CONFIG_KDB_CONS_COM) -word_t kdb_current_console = 1; -#else -word_t kdb_current_console = 0; -#endif /* ** diff --git a/kernel/src/arch/powerpc/ibm450.h b/kernel/src/arch/powerpc/ibm450.h index ebca2878..273c4c62 100644 --- a/kernel/src/arch/powerpc/ibm450.h +++ b/kernel/src/arch/powerpc/ibm450.h @@ -3,7 +3,7 @@ * Copyright (C) 1999-2010, Karlsruhe University * Copyright (C) 2008-2009, Volkmar Uhlig, IBM Corporation * - * File path: src/arch/powerpc/ibm450.h + * File path: arch/powerpc/ibm450.h * Description: * * Redistribution and use in source and binary forms, with or without @@ -52,4 +52,4 @@ extern inline void mtdcrx(word_t dcrn, word_t value) } #endif -#endif /* !__ARCH__POWERPC__IBM450_H__ */ +#endif /* !__ARCH__POWERPC__IBM450_H__*/ diff --git a/kernel/src/arch/powerpc/io.h b/kernel/src/arch/powerpc/io.h index 0ecdc6f9..83f73504 100644 --- a/kernel/src/arch/powerpc/io.h +++ b/kernel/src/arch/powerpc/io.h @@ -3,7 +3,7 @@ * Copyright (C) 1999-2010, Karlsruhe University * Copyright (C) 2008-2009, Volkmar Uhlig, IBM Corporation * - * File path: src/arch/powerpc/io.h + * File path: arch/powerpc/io.h * Description: * * Redistribution and use in source and binary forms, with or without @@ -33,6 +33,20 @@ #ifndef __ARCH__POWERPC__IO_H__ #define __ARCH__POWERPC__IO_H__ +INLINE void out_8(addr_t addr, u8_t val) +{ + sync(); + *(volatile u8_t*)addr = val; + eieio(); +} + +INLINE void out_be16(addr_t addr, u16_t val) +{ + sync(); + *(volatile u16_t*)addr = val; + eieio(); +} + INLINE void out_be32(addr_t addr, u32_t val) { sync(); @@ -40,6 +54,24 @@ INLINE void out_be32(addr_t addr, u32_t val) eieio(); } +INLINE u32_t in_8(addr_t addr) +{ + u32_t val; + sync(); + val = *(volatile u8_t*)addr; + isync(); + return val; +} + +INLINE u32_t in_be16(addr_t addr) +{ + u32_t val; + sync(); + val = *(volatile u16_t*)addr; + isync(); + return val; +} + INLINE u32_t in_be32(addr_t addr) { u32_t val; diff --git a/kernel/src/platform/ppc44x/bic.h b/kernel/src/platform/ppc44x/bic.h index bd546386..bc91bf6c 100644 --- a/kernel/src/platform/ppc44x/bic.h +++ b/kernel/src/platform/ppc44x/bic.h @@ -3,7 +3,7 @@ * Copyright (C) 1999-2010, Karlsruhe University * Copyright (C) 2008-2009, Volkmar Uhlig, IBM Corporation * - * File path: src/platform/ppc44x/bic.h + * File path: platform/ppc44x/bic.h * Description: * * Redistribution and use in source and binary forms, with or without diff --git a/kernel/src/platform/ppc44x/intctrl.h b/kernel/src/platform/ppc44x/intctrl.h index f5928d68..e80468f8 100644 --- a/kernel/src/platform/ppc44x/intctrl.h +++ b/kernel/src/platform/ppc44x/intctrl.h @@ -3,7 +3,7 @@ * Copyright (C) 1999-2010, Karlsruhe University * Copyright (C) 2008-2009, Volkmar Uhlig, IBM Corporation * - * File path: src/platform/ppc44x/intctrl.h + * File path: platform/ppc44x/intctrl.h * Description: * * Redistribution and use in source and binary forms, with or without @@ -35,6 +35,8 @@ #ifdef CONFIG_PLAT_440_BGP # include INC_PLAT(bic.h) +#ifdef CONFIG_PLAT_440_EBONY +# include INC_PLAT(uic.h) #else # error undefined interrupt controller #endif diff --git a/kernel/src/platform/ppc44x/uic.h b/kernel/src/platform/ppc44x/uic.h new file mode 100644 index 00000000..c0a8333a --- /dev/null +++ b/kernel/src/platform/ppc44x/uic.h @@ -0,0 +1,30 @@ +/********************************************************************* + * + * Copyright (C) 2010, Karlsruhe University + * + * Filename: uic.h + * Author: Jan Stoess + * Description: + * + * $Id:$ + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + ********************************************************************/ diff --git a/user/util/kickstart/Makefile.in b/user/util/kickstart/Makefile.in index d2c8f1e7..f4c4afc5 100644 --- a/user/util/kickstart/Makefile.in +++ b/user/util/kickstart/Makefile.in @@ -82,7 +82,7 @@ PROGRAM_DEPS_amd64= $(top_builddir)/util/kickstart/libio32.a ## ## PowerPC specifics ## -SRCS_powerpc= $(SRCS_FDT) powerpc-putc.cc +SRCS_powerpc= $(SRCS_FDT) powerpc-uart-putc.cc LIBS_powerpc= $(top_builddir)/lib/io/print.o LDFLAGS_powerpc= CFLAGS_kickstart_powerpc:= $(CFLAGS) diff --git a/user/util/kickstart/fdt-loader.cc b/user/util/kickstart/fdt-loader.cc index f05dd882..3691031c 100644 --- a/user/util/kickstart/fdt-loader.cc +++ b/user/util/kickstart/fdt-loader.cc @@ -3,7 +3,7 @@ * Copyright (C) 1999-2010, Karlsruhe University * Copyright (C) 2008-2009, Volkmar Uhlig, IBM Corporation * - * File path: util/kickstart/fdt-loader.cc + * File path: fdt-loader.cc * Description: * * Redistribution and use in source and binary forms, with or without @@ -67,8 +67,10 @@ static bool fdt_load_image(fdt_t *fdt, char *name, module_t &module) { fdt_property_t *image = fdt->find_property_node(name); if (!image) + { + printf("Could'nt find FDT entry %s\n", name); return false; - + } if (image->len != sizeof(L4_Word_t)) { printf("Invalid FDT entry size, (expected %d, found %d)\n", sizeof(L4_Word_t), image->len); diff --git a/user/util/kickstart/fdt.h b/user/util/kickstart/fdt.h index a37e1d4d..d1a6140e 100644 --- a/user/util/kickstart/fdt.h +++ b/user/util/kickstart/fdt.h @@ -3,7 +3,7 @@ * Copyright (C) 1999-2010, Karlsruhe University * Copyright (C) 2008-2009, Volkmar Uhlig, IBM Corporation * - * File path: util/kickstart/fdt.h + * File path: fdt.h * Description: * * Redistribution and use in source and binary forms, with or without diff --git a/user/util/kickstart/powerpc-bg-putc.cc b/user/util/kickstart/powerpc-bg-putc.cc new file mode 100644 index 00000000..111b096f --- /dev/null +++ b/user/util/kickstart/powerpc-bg-putc.cc @@ -0,0 +1,134 @@ +/********************************************************************* + * + * Copyright (C) 1999-2010, Karlsruhe University + * Copyright (C) 2008-2009, Volkmar Uhlig, IBM Corporation + * + * File path: util/kickstart/powerpc-putc.cc + * Description: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $Id$ + * + ********************************************************************/ +#include "l4io.h" +#include "fdt.h" + +extern inline void mtdcrx(unsigned int dcrn, unsigned int value) +{ + asm volatile("mtdcrx %0,%1": :"r" (dcrn), "r" (value) : "memory"); +} + +extern inline void invalidate_dcache_line(void* ptr) +{ + asm volatile ("dcbi 0,%0" : : "r" (ptr) : "memory"); +} + +class bgp_mailbox_t +{ +public: + volatile unsigned short command; // comand; upper bit=ack + unsigned short len; // length (does not include header) + unsigned short result; // return code from reader + unsigned short crc; // 0=no CRC + char data[0]; +}; + +class cons_t { +public: + bgp_mailbox_t *mb; + unsigned size; + unsigned dcr_set; + unsigned dcr_clear; + unsigned dcr_mask; + bool verbose; + + void send_command(int command) + { + mb->command = command; + asm volatile("sync"); + mtdcrx(dcr_set, dcr_mask); + + do { + invalidate_dcache_line((void*)&mb->command); + } while(!(mb->command & 0x8000)); + } + + bool init(fdt_t *fdt) + { + fdt_property_t *prop; + fdt_node_t *node = fdt->find_subtree("/jtag/console0"); + + if (! (prop = fdt->find_property_node(node, "reg")) ) + return false; + + // addr is 64 bit with upper part 0 + mb = (bgp_mailbox_t*)prop->get_word(1); + size = prop->get_word(2); + + if (! (prop = fdt->find_property_node(node, "dcr-reg")) ) + return false; + + dcr_set = prop->get_word(0); + dcr_clear = prop->get_word(1); + + if (! (prop = fdt->find_property_node(node, "dcr-mask")) ) + return false; + dcr_mask = prop->get_word(0); + + verbose = false; + fdt_node_t *l4node = fdt->find_subtree("/l4"); + if ((prop = fdt->find_property_node(l4node, "kickstart"))) + { + if (strstr(prop->get_string(), "verbose")) + verbose = true; + } + + return true; + } + + void putc(int c) + { + if (!mb || !verbose) + return; + + mb->data[mb->len++] = c; + + if (mb->len >= size || c == '\n') + { + send_command(2); + mb->len = 0; + } + } +}; + +cons_t cons; + +bool initialize_console(fdt_t *fdt) +{ + return cons.init(fdt); +} + +extern "C" void putc(int c) +{ + cons.putc(c); +} diff --git a/user/util/kickstart/powerpc-uart-putc.cc b/user/util/kickstart/powerpc-uart-putc.cc new file mode 100644 index 00000000..5d50b992 --- /dev/null +++ b/user/util/kickstart/powerpc-uart-putc.cc @@ -0,0 +1,251 @@ +/* + * (C) Copyright 2000-2006 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This source code is dual-licensed. You may use it under the terms of the + * GNU General Public License version 2, or under the license below. + * + * This source code has been made available to you by IBM on an AS-IS + * basis. Anyone receiving this source is licensed under IBM + * copyrights to use it in any way he or she deems fit, including + * copying it, modifying it, compiling it, and redistributing it either + * with or without modifications. No license under IBM patents or + * patent applications is to be implied by the copyright license. + * + * Any user of this software should understand that IBM cannot provide + * technical support for this software and will not be responsible for + * any consequences resulting from the use of this software. + * + * Any person who transfers this source code or any derivative work + * must include the IBM copyright notice, this paragraph, and the + * preceding two paragraphs in the transferred software. + * + * COPYRIGHT I B M CORPORATION 1995 + * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M + */ + +#include "fdt.h" +#include "powerpc.h" + +/*----------------------------------------------------------------------- + * High Level Configuration Options + *----------------------------------------------------------------------*/ +#define CONFIG_EBONY 1 /* Board is ebony */ +#define CONFIG_440GP 1 /* Specifc GP support */ +#define CONFIG_440 1 /* ... PPC440 family */ +#define CONFIG_4xx 1 /* ... PPC4xx family */ +#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ +/*----------------------------------------------------------------------- + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + *----------------------------------------------------------------------*/ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */ +#define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH */ +#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */ +#define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */ +#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */ +#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */ + +#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000) +#define CONFIG_SYS_FPGA_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x08300000) +/*----------------------------------------------------------------------- + * Serial Port + *----------------------------------------------------------------------*/ +#undef CONFIG_SERIAL_SOFTWARE_FIFO +#define CONFIG_SYS_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */ +#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +//#include "ppc4xx.h" +#define CNTRL_DCR_BASE 0x0b0 +#define CPC0_CR0 (CNTRL_DCR_BASE+0x3b) /* Control 0 register */ +#define CPC0_CR1 (CNTRL_DCR_BASE+0x3a) /* Control 1 register */ + + +#define UART0_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000200) +#define UART1_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000300) + +#define CR0_MASK 0x3fff0000 +#define CR0_EXTCLK_ENA 0x00600000 +#define CR0_UDIV_POS 16 +#define UDIV_SUBTRACT 1 +#define UART0_SDR CPC0_CR0 +#define MFREG(a, d) d = mfdcr(a) +#define MTREG(a, d) mtdcr(a, d) + + + +#define UART_RBR 0x00 +#define UART_THR 0x00 +#define UART_IER 0x01 +#define UART_IIR 0x02 +#define UART_FCR 0x02 +#define UART_LCR 0x03 +#define UART_MCR 0x04 +#define UART_LSR 0x05 +#define UART_MSR 0x06 +#define UART_SCR 0x07 +#define UART_DLL 0x00 +#define UART_DLM 0x01 + +/*-----------------------------------------------------------------------------+ + | Line Status Register. + +-----------------------------------------------------------------------------*/ +#define asyncLSRDataReady1 0x01 +#define asyncLSROverrunError1 0x02 +#define asyncLSRParityError1 0x04 +#define asyncLSRFramingError1 0x08 +#define asyncLSRBreakInterrupt1 0x10 +#define asyncLSRTxHoldEmpty1 0x20 +#define asyncLSRTxShiftEmpty1 0x40 +#define asyncLSRRxFifoError1 0x80 + + + +/* + * Minimal serial functions needed to use one of the SMC ports + * as serial console interface. + */ + +int serial_init_dev(unsigned long base) +{ + unsigned long reg; + unsigned long udiv; + unsigned short bdiv; + unsigned long tmp; + L4_Word8_t val; + + MFREG(UART0_SDR, reg); + reg &= ~CR0_MASK; + + reg |= CR0_EXTCLK_ENA; + udiv = 1; + tmp = CONFIG_BAUDRATE * 16; + bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp; + + reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS; /* set the UART divisor */ + + /* + * Configure input clock to baudrate generator for all + * available serial ports here + */ + MTREG(UART0_SDR, reg); + + + out_8((L4_Word8_t *)base + UART_LCR, 0x80); /* set DLAB bit */ + out_8((L4_Word8_t *)base + UART_DLL, bdiv); /* set baudrate divisor */ + out_8((L4_Word8_t *)base + UART_DLM, bdiv >> 8); /* set baudrate divisor */ + out_8((L4_Word8_t *)base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */ + out_8((L4_Word8_t *)base + UART_FCR, 0x00); /* disable FIFO */ + out_8((L4_Word8_t *)base + UART_MCR, 0x00); /* no modem control DTR RTS */ + val = in_8((L4_Word8_t *)base + UART_LSR); /* clear line status */ + val = in_8((L4_Word8_t *)base + UART_RBR); /* read receive buffer */ + out_8((L4_Word8_t *)base + UART_SCR, 0x00); /* set scratchpad */ + out_8((L4_Word8_t *)base + UART_IER, 0x00); /* set interrupt enable reg */ + + + return (0); +} + + +void serial_putc_dev(unsigned long base, const char c) +{ + int i; + + if (c == '\n') + serial_putc_dev(base, '\r'); + + /* check THRE bit, wait for transmiter available */ + for (i = 1; i < 3500; i++) { + if ((in_8((L4_Word8_t *)base + UART_LSR) & 0x20) == 0x20) + break; + //udelay (100); + } + + out_8((L4_Word8_t *)base + UART_THR, c); /* put character out */ +} + +void serial_puts_dev (unsigned long base, const char *s) +{ + while (*s) + serial_putc_dev (base, *s++); +} + +int serial_getc_dev (unsigned long base) +{ + unsigned char status = 0; + + while (1) { + status = in_8((L4_Word8_t *)base + UART_LSR); + if ((status & asyncLSRDataReady1) != 0x0) + break; + + if ((status & ( asyncLSRFramingError1 | + asyncLSROverrunError1 | + asyncLSRParityError1 | + asyncLSRBreakInterrupt1 )) != 0) { + out_8((L4_Word8_t *)base + UART_LSR, + asyncLSRFramingError1 | + asyncLSROverrunError1 | + asyncLSRParityError1 | + asyncLSRBreakInterrupt1); + } + } + + return (0x000000ff & (int) in_8((L4_Word8_t *)base)); +} + + +class cons_t { +public: + bool verbose; + + + bool init() + { + serial_init_dev(UART0_BASE); + serial_init_dev(UART1_BASE); + return true; + } + + void putc(int c) + { + serial_putc_dev(UART0_BASE,c); + serial_putc_dev(UART1_BASE,c); + } +}; + +cons_t cons; + +bool initialize_console(fdt_t *fdt) +{ + return cons.init(); +} + +extern "C" void putc(int c) +{ + cons.putc(c); +} diff --git a/user/util/kickstart/powerpc.cc b/user/util/kickstart/powerpc.cc index 2999e170..bbd49fce 100644 --- a/user/util/kickstart/powerpc.cc +++ b/user/util/kickstart/powerpc.cc @@ -3,7 +3,7 @@ * Copyright (C) 1999-2010, Karlsruhe University * Copyright (C) 2008-2009, Volkmar Uhlig, IBM Corporation * - * File path: util/kickstart/powerpc.cc + * File path: powerpc.cc * Description: * * Redistribution and use in source and binary forms, with or without diff --git a/user/util/kickstart/powerpc.h b/user/util/kickstart/powerpc.h new file mode 100644 index 00000000..1302b8bd --- /dev/null +++ b/user/util/kickstart/powerpc.h @@ -0,0 +1,121 @@ +/********************************************************************* + * + * Copyright (C) 2010, Karlsruhe University + * + * File path: powerpc.h + * Description: + * + * @LICENSE@ + * + * $Id:$ + * + ********************************************************************/ +#include + +#define stringify(s) tostring(s) +#define tostring(s) #s + +#define mfdcr(rn) ({unsigned int rval; \ + asm volatile("mfdcr %0," stringify(rn) \ + : "=r" (rval)); rval;}) +#define mtdcr(rn, v) asm volatile("mtdcr " stringify(rn) ",%0" : : "r" (v)) + +#define mfmsr() ({unsigned int rval; \ + asm volatile("mfmsr %0" : "=r" (rval)); rval;}) +#define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v)) + +#define mfspr(rn) ({unsigned int rval; \ + asm volatile("mfspr %0," stringify(rn) \ + : "=r" (rval)); rval;}) +#define mtspr(rn, v) asm volatile("mtspr " stringify(rn) ",%0" : : "r" (v)) + +#define tlbie(v) asm volatile("tlbie %0 \n sync" : : "r" (v)) + + + +/* + * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. + * + * Read operations have additional twi & isync to make sure the read + * is actually performed (i.e. the data has come back) before we start + * executing any following instructions. + */ +L4_INLINE int in_8(const volatile unsigned char *addr) +{ + int ret; + + __asm__ __volatile__( + "sync; lbz%U1%X1 %0,%1;\n" + "twi 0,%0,0;\n" + "isync" : "=r" (ret) : "m" (*addr)); + return ret; +} + +L4_INLINE void out_8(volatile unsigned char *addr, int val) +{ + __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); +} + +L4_INLINE int in_le16(const volatile unsigned short *addr) +{ + int ret; + + __asm__ __volatile__("sync; lhbrx %0,0,%1;\n" + "twi 0,%0,0;\n" + "isync" : "=r" (ret) : + "r" (addr), "m" (*addr)); + return ret; +} + +L4_INLINE int in_be16(const volatile unsigned short *addr) +{ + int ret; + + __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n" + "twi 0,%0,0;\n" + "isync" : "=r" (ret) : "m" (*addr)); + return ret; +} + +L4_INLINE void out_le16(volatile unsigned short *addr, int val) +{ + __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) : + "r" (val), "r" (addr)); +} + +L4_INLINE void out_be16(volatile unsigned short *addr, int val) +{ + __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); +} + +L4_INLINE unsigned in_le32(const volatile unsigned *addr) +{ + unsigned ret; + + __asm__ __volatile__("sync; lwbrx %0,0,%1;\n" + "twi 0,%0,0;\n" + "isync" : "=r" (ret) : + "r" (addr), "m" (*addr)); + return ret; +} + +L4_INLINE unsigned in_be32(const volatile unsigned *addr) +{ + unsigned ret; + + __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n" + "twi 0,%0,0;\n" + "isync" : "=r" (ret) : "m" (*addr)); + return ret; +} + +L4_INLINE void out_le32(volatile unsigned *addr, int val) +{ + __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) : + "r" (val), "r" (addr)); +} + +L4_INLINE void out_be32(volatile unsigned *addr, int val) +{ + __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); +}