forked from mindspore-Ecosystem/mindspore
!4764 add FusedBatchNoramEx gpu kernel
Merge pull request !4764 from zyli2020/gpu_bn_op_perf_optimize
This commit is contained in:
commit
bd2336b96a
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@ -0,0 +1,110 @@
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "backend/kernel_compiler/gpu/nn/fused_batch_norm_ex_gpu_kernel.h"
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namespace mindspore {
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namespace kernel {
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MS_REG_GPU_KERNEL_ONE(FusedBatchNormEx,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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FusedBatchNormExGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(FusedBatchNormEx,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat16)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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FusedBatchNormExGpuKernel, half)
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MS_REG_GPU_KERNEL_ONE(FusedBatchNormExWithActivation,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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FusedBatchNormExGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(FusedBatchNormExWithActivation,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat16)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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FusedBatchNormExGpuKernel, half)
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MS_REG_GPU_KERNEL_ONE(FusedBatchNormExWithAddAndActivation,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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FusedBatchNormExGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(FusedBatchNormExWithAddAndActivation,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat16)
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.AddOutputAttr(kNumberTypeFloat16)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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FusedBatchNormExGpuKernel, half)
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} // namespace kernel
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} // namespace mindspore
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@ -0,0 +1,276 @@
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_NN_FUSED_BATCH_NORM_EX_GPU_KERNEL_H_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_NN_FUSED_BATCH_NORM_EX_GPU_KERNEL_H_
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#include <vector>
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#include <string>
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#include "backend/kernel_compiler/gpu/gpu_kernel.h"
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#include "backend/kernel_compiler/gpu/gpu_kernel_factory.h"
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#include "backend/kernel_compiler/gpu/kernel_constants.h"
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#include "utils/utils.h"
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namespace mindspore {
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namespace kernel {
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template <typename T>
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class FusedBatchNormExGpuKernel : public GpuKernel {
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public:
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FusedBatchNormExGpuKernel()
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: input_x_size_(0),
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input_z_size_(0),
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para_size_(0),
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output_size_(0),
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workspace_size_(0),
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reserve_size_(0),
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mode_(CUDNN_BATCHNORM_SPATIAL),
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bn_ops_(CUDNN_BATCHNORM_OPS_BN),
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epsilon_(10e-5),
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exp_avg_factor_(0.1),
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is_null_input_(false),
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x_desc_(nullptr),
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y_desc_(nullptr),
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z_desc_(nullptr),
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scale_bias_mean_var_desc_(nullptr),
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activation_desc_(nullptr),
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handle_(nullptr),
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cudnn_data_type_(CUDNN_DATA_FLOAT) {}
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~FusedBatchNormExGpuKernel() override { DestroyResource(); }
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const std::vector<size_t> &GetInputSizeList() const override { return input_size_list_; }
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const std::vector<size_t> &GetOutputSizeList() const override { return output_size_list_; }
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const std::vector<size_t> &GetWorkspaceSizeList() const override { return workspace_size_list_; }
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bool Launch(const std::vector<AddressPtr> &inputs, const std::vector<AddressPtr> &workspace,
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const std::vector<AddressPtr> &outputs, void *stream_ptr) override {
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VARIABLE_NOT_USED(workspace);
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VARIABLE_NOT_USED(stream_ptr);
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if (is_null_input_) {
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return true;
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}
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auto x = GetDeviceAddress<T>(inputs, 0);
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auto scale = GetDeviceAddress<float>(inputs, 1);
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auto bias = GetDeviceAddress<float>(inputs, 2);
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auto runing_mean = GetDeviceAddress<float>(inputs, 3);
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auto runnig_variance = GetDeviceAddress<float>(inputs, 4);
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T *z = nullptr;
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if (bn_ops_ == CUDNN_BATCHNORM_OPS_BN_ADD_ACTIVATION) {
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z = GetDeviceAddress<T>(inputs, 5);
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}
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auto y = GetDeviceAddress<T>(outputs, 0);
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auto save_mean = GetDeviceAddress<float>(outputs, 3);
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auto save_variance = GetDeviceAddress<float>(outputs, 4);
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auto reserve_addr = GetDeviceAddress<float>(outputs, 5);
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T *workspace_addr = nullptr;
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if (workspace_size_ != 0) {
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workspace_addr = GetDeviceAddress<T>(workspace, 0);
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}
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const float alpha = 1;
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const float beta = 0;
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnBatchNormalizationForwardTrainingEx(handle_, mode_, bn_ops_, &alpha, &beta, x_desc_, x, z_desc_, z, y_desc_,
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y, scale_bias_mean_var_desc_, scale, bias, exp_avg_factor_, runing_mean,
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runnig_variance, epsilon_, save_mean, save_variance, activation_desc_,
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workspace_addr, workspace_size_, reserve_addr, reserve_size_),
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"Kernel launch failed");
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return true;
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}
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bool Init(const CNodePtr &kernel_node) override {
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MS_EXCEPTION_IF_NULL(kernel_node);
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std::string kernel_name = AnfAlgo::GetCNodeName(kernel_node);
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if (kernel_name == kFusedBatchNormEx) {
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bn_ops_ = CUDNN_BATCHNORM_OPS_BN;
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} else if (kernel_name == kFusedBatchNormExWithActivation) {
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bn_ops_ = CUDNN_BATCHNORM_OPS_BN_ACTIVATION;
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} else if (kernel_name == kFusedBatchNormExWithAddAndActivation) {
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bn_ops_ = CUDNN_BATCHNORM_OPS_BN_ADD_ACTIVATION;
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} else {
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MS_LOG(EXCEPTION) << "Invalid kernel name: " << kernel_name;
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}
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InitResource();
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mode_ = CUDNN_BATCHNORM_SPATIAL_PERSISTENT;
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epsilon_ = GetAttr<float>(kernel_node, "epsilon");
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exp_avg_factor_ = GetAttr<float>(kernel_node, "momentum");
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cudnn_data_type_ = GetCudnnDataType(TypeIdLabel(AnfAlgo::GetInputDeviceDataType(kernel_node, 0)));
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size_t input_num = AnfAlgo::GetInputTensorNum(kernel_node);
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if (bn_ops_ == CUDNN_BATCHNORM_OPS_BN_ADD_ACTIVATION) {
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if (input_num != 6) {
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MS_LOG(EXCEPTION) << "input tensor size is " << input_num << ", " << kernel_name << " should be 6";
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}
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} else {
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if (input_num != 5) {
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MS_LOG(EXCEPTION) << "input tensor size is " << input_num << ", " << kernel_name << " should be 5";
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}
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}
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auto shape = AnfAlgo::GetInputDeviceShape(kernel_node, 0);
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if (shape.size() != 4) {
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MS_LOG(EXCEPTION) << "tensor shape is " << shape.size() << ", FusedBatchNormExGpuKernel should be 4";
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}
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is_null_input_ = CHECK_NULL_INPUT(shape);
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if (is_null_input_) {
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MS_LOG(WARNING) << "FusedBatchNormExGpuKernel input is null";
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InitSizeLists();
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return true;
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}
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auto format = AnfAlgo::GetInputFormat(kernel_node, 0);
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SetTensorDescriptor(format, shape);
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InitSizeLists();
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return true;
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}
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protected:
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void InitResource() override {
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handle_ = device::gpu::GPUDeviceManager::GetInstance().GetCudnnHandle();
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnCreateTensorDescriptor(&x_desc_), "Create x desc failed");
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnCreateTensorDescriptor(&y_desc_), "Create y desc failed");
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if (bn_ops_ == CUDNN_BATCHNORM_OPS_BN_ADD_ACTIVATION) {
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnCreateTensorDescriptor(&z_desc_), "Create z desc failed");
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}
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnCreateTensorDescriptor(&scale_bias_mean_var_desc_), "Create para desc failed");
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if (bn_ops_ != CUDNN_BATCHNORM_OPS_BN) {
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnCreateActivationDescriptor(&activation_desc_),
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"Create activation descriptor failed");
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}
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}
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void InitSizeLists() override {
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if (!is_null_input_) {
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnGetTensorSizeInBytes(x_desc_, &input_x_size_), "Get input x size failed");
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnGetTensorSizeInBytes(scale_bias_mean_var_desc_, ¶_size_),
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"Get para size failed");
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnGetTensorSizeInBytes(y_desc_, &output_size_), "Get output size failed");
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if (bn_ops_ == CUDNN_BATCHNORM_OPS_BN_ADD_ACTIVATION) {
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnGetTensorSizeInBytes(z_desc_, &input_z_size_), "Get input z size failed");
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}
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnGetBatchNormalizationForwardTrainingExWorkspaceSize(
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handle_, mode_, bn_ops_, x_desc_, z_desc_, y_desc_, scale_bias_mean_var_desc_,
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activation_desc_, &workspace_size_),
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"cudnnGetBatchNormalizationForwardTrainingExWorkspaceSize failed");
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CHECK_CUDNN_RET_WITH_EXCEPT(cudnnGetBatchNormalizationTrainingExReserveSpaceSize(
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handle_, mode_, bn_ops_, activation_desc_, x_desc_, &reserve_size_),
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"Get reserve size failed");
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}
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input_size_list_.push_back(input_x_size_); // input x
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input_size_list_.push_back(para_size_); // scale
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input_size_list_.push_back(para_size_); // bias
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input_size_list_.push_back(para_size_); // mean
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input_size_list_.push_back(para_size_); // variance
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if (bn_ops_ == CUDNN_BATCHNORM_OPS_BN_ADD_ACTIVATION) {
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input_size_list_.push_back(input_z_size_); // input z
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}
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output_size_list_.push_back(output_size_); // output
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output_size_list_.push_back(para_size_); // save scale
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output_size_list_.push_back(para_size_); // save bias
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output_size_list_.push_back(para_size_); // save mean
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output_size_list_.push_back(para_size_); // save variance
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output_size_list_.push_back(reserve_size_); // reserve space
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workspace_size_list_.push_back(workspace_size_);
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}
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private:
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void SetTensorDescriptor(const std::string &format, const std::vector<size_t> &shape) {
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cudnnTensorFormat_t cudnn_format;
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int batch, channel, height, width;
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if (format == kOpFormat_NHWC) {
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batch = SizeToInt(shape[0]);
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height = SizeToInt(shape[1]);
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width = SizeToInt(shape[2]);
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channel = SizeToInt(shape[3]);
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cudnn_format = CUDNN_TENSOR_NHWC;
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} else {
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batch = SizeToInt(shape[0]);
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channel = SizeToInt(shape[1]);
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height = SizeToInt(shape[2]);
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width = SizeToInt(shape[3]);
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cudnn_format = CUDNN_TENSOR_NCHW;
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}
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnSetTensor4dDescriptor(x_desc_, cudnn_format, cudnn_data_type_, batch, channel, height, width),
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"Set x desc failed");
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnSetTensor4dDescriptor(y_desc_, cudnn_format, cudnn_data_type_, batch, channel, height, width),
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"Set y desc failed");
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if (bn_ops_ == CUDNN_BATCHNORM_OPS_BN_ADD_ACTIVATION) {
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnSetTensor4dDescriptor(z_desc_, cudnn_format, cudnn_data_type_, batch, channel, height, width),
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"Set z desc failed");
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}
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnSetTensor4dDescriptor(scale_bias_mean_var_desc_, CUDNN_TENSOR_NCHW, CUDNN_DATA_FLOAT, 1, channel, 1, 1),
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"Set para desc failed");
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||||
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if (bn_ops_ != CUDNN_BATCHNORM_OPS_BN) {
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CHECK_CUDNN_RET_WITH_EXCEPT(
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cudnnSetActivationDescriptor(activation_desc_, CUDNN_ACTIVATION_RELU, CUDNN_NOT_PROPAGATE_NAN, 0.0),
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||||
"cudnnSetActivationDescriptor failed");
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}
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}
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void DestroyResource() noexcept {
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CHECK_CUDNN_RET_WITH_ERROR(cudnnDestroyTensorDescriptor(x_desc_), "Destroy x desc failed");
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CHECK_CUDNN_RET_WITH_ERROR(cudnnDestroyTensorDescriptor(y_desc_), "Destroy y desc failed");
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CHECK_CUDNN_RET_WITH_ERROR(cudnnDestroyTensorDescriptor(scale_bias_mean_var_desc_), "Destroy para desc failed");
|
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if (bn_ops_ == CUDNN_BATCHNORM_OPS_BN_ADD_ACTIVATION) {
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CHECK_CUDNN_RET_WITH_ERROR(cudnnDestroyTensorDescriptor(z_desc_), "Destroy z desc failed");
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}
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||||
|
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if (bn_ops_ != CUDNN_BATCHNORM_OPS_BN) {
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CHECK_CUDNN_RET_WITH_ERROR(cudnnDestroyActivationDescriptor(activation_desc_),
|
||||
"Destroy activation descriptor failed");
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||||
}
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}
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|
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size_t input_x_size_;
|
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size_t input_z_size_;
|
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size_t para_size_;
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||||
size_t output_size_;
|
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size_t workspace_size_;
|
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size_t reserve_size_;
|
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cudnnBatchNormMode_t mode_;
|
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cudnnBatchNormOps_t bn_ops_;
|
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double epsilon_;
|
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double exp_avg_factor_;
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bool is_null_input_;
|
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cudnnTensorDescriptor_t x_desc_;
|
||||
cudnnTensorDescriptor_t y_desc_;
|
||||
cudnnTensorDescriptor_t z_desc_;
|
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cudnnTensorDescriptor_t scale_bias_mean_var_desc_;
|
||||
cudnnActivationDescriptor_t activation_desc_;
|
||||
|
||||
cudnnHandle_t handle_;
|
||||
cudnnDataType_t cudnn_data_type_;
|
||||
std::vector<size_t> input_size_list_;
|
||||
std::vector<size_t> output_size_list_;
|
||||
std::vector<size_t> workspace_size_list_;
|
||||
};
|
||||
} // namespace kernel
|
||||
} // namespace mindspore
|
||||
#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_NN_FUSED_BATCH_NORM_EX_GPU_KERNEL_H_
|
|
@ -42,6 +42,12 @@ constexpr auto kFusedBN3OpName = "FusedBN3";
|
|||
constexpr auto kBNGrad1OpName = "BNGrad1";
|
||||
constexpr auto kBNGrad2OpName = "BNGrad2";
|
||||
constexpr auto kBNGrad3OpName = "BNGrad3";
|
||||
constexpr auto kFusedBatchNormEx = "FusedBatchNormEx";
|
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constexpr auto kFusedBatchNormExWithActivation = "FusedBatchNormExWithActivation";
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constexpr auto kFusedBatchNormExWithAddAndActivation = "FusedBatchNormExWithAddAndActivation";
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constexpr auto kFusedBatchNormGradEx = "FusedBatchNormGradEx";
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constexpr auto kFusedBatchNormGradExWithActivation = "FusedBatchNormGradExWithActivation";
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constexpr auto kFusedBatchNormGradExWithAddAndActivation = "FusedBatchNormGradExWithAddAndActivation";
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constexpr auto kClearZeroOpName = "ClearZero";
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constexpr auto kAtomicAddrCleanOpName = "AtomicAddrClean";
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constexpr auto kGetNextOpName = "GetNext";
|
||||
|
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Loading…
Reference in New Issue