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2513 Commits

Author SHA1 Message Date
sunsuodong 28241d0293 lstm ops 2020-05-18 16:39:09 +08:00
jinyaohui bcfaff97f9 clean pylint 2020-05-18 10:31:46 +08:00
seatea 981b013f81 Fix CSE bug for some operations like `DropoutGenMask` which should not 
be optimized as it will generate different values each time.
 2020-05-16 18:58:43 +08:00
jinyaohui 2907cf4488 remove some context param 2020-05-16 15:07:13 +08:00
wilfChen 1991a89f40 LayerNormGrad fix & codex 2020-05-15 11:16:30 +08:00
mindspore-ci-bot bb374ebc28 !1015 Support weights to be compiled according to shape 
Merge pull request !1015 from candanzg/me_with_shape
 2020-05-15 09:13:41 +08:00
李鸿章 32c1d558f4 SummaryRecord as context manager 2020-05-13 21:53:24 +08:00
candanzg 2cc85bdc93 Support weight compile according to shape 
Signed-off-by: candanzg <zhangshucheng@huawei.com>
 2020-05-13 17:49:07 +08:00
mindspore-ci-bot 049d3796a6 !1091 gpu support Cast/RealDiv/Mul/Sub/Softmax kernels enforcement 
Merge pull request !1091 from chenweifeng/cast
 2020-05-13 15:42:20 +08:00
mindspore-ci-bot 6f386c5782 !1082 Support 'break', 'continue' and 'pass' statements 
Merge pull request !1082 from hewei/support_cont_break
 2020-05-13 14:19:28 +08:00
He Wei 33fa90efc9 Support 'break', 'continue' and 'pass' 
To handle 'break' and 'continue' statement, a loop context is pushed
to a stack before we parse the loop body, and pop it after body parsed.
When a 'break', 'continue' statement is encountered, we retrieve current
loop contex from the stack, and let the current block jump to the end
block or header block;

For 'break' statement, we added an extra 'end_block' follow the 'after_block',
because 'after_block' is called from a ContionalJump in 'header_block', it can
not be set as jump target from other place. to support 'break', we let loop
body jump to the 'end_block' at the 'break' point. and 'after_block'
maybe a good place to handle loop 'else' clause in the future.

Handle 'pass' is simple, just bypass it when doing parse.
 2020-05-13 12:53:07 +08:00
jinyaohui 391a060f21 remove two context param 2020-05-12 22:11:50 +08:00
wilfChen 59c4cf256c gpu support broadcast kernels 2020-05-12 20:59:56 +08:00
jinyaohui d40e89b1bc clean pylint warning in st/ops/ascend 2020-05-11 20:59:30 +08:00
mindspore-ci-bot 680ce090a3 !1057 matmul support fp16 
Merge pull request !1057 from chenweifeng/matmul
 2020-05-11 19:46:45 +08:00
mindspore-ci-bot 00383fc760 !1040 base attention aggregator for Graph Attention Networks 
Merge pull request !1040 from zhangdengcheng/master
 2020-05-11 19:25:50 +08:00
mindspore-ci-bot 0edc6d254a !370 Gpu Support UnsortedSegmentSum kernel 
Merge pull request !370 from chenweifeng/unsorted_segment_sum
 2020-05-11 18:48:06 +08:00
mindspore-ci-bot 907b609b05 !994 gpu broadcast kernel support different dims 
Merge pull request !994 from chenweifeng/broadcast_unequal_dims
 2020-05-11 18:43:14 +08:00
mindspore-ci-bot b5096e1f6c !1021 gpu support MinimumGrad & MaximumGrad kernel 
Merge pull request !1021 from chenweifeng/broadcast_grad
 2020-05-11 17:43:20 +08:00
mindspore-ci-bot da7054645a !948 gpu support LogSoftmax & LogSoftmaxGrad kernel 
Merge pull request !948 from chenweifeng/logsoftmax
 2020-05-11 17:15:39 +08:00
wilfChen b56572bb89 matmul support fp16 2020-05-11 16:09:32 +08:00
zhangdengcheng 825d9740fa Fixed the bug that mean aggregator argument can not pass to base class and add attention head for GAT 2020-05-11 07:58:39 +00:00
mindspore-ci-bot af7c54b12a !920 [MS][Bert]Modify example script of bert model. 
Merge pull request !920 from wsc/lossscale_script
 2020-05-10 13:56:08 +08:00
wsc 46c175a574 Modify example scripts of bert model 2020-05-09 18:52:40 +08:00
limingqi107 05e8d95e7f optimize the gpu context switch 2020-05-09 15:31:32 +08:00
wilfChen 00e78bf6c4 gpu support MinimumGrad & MaximumGrad kernel 2020-05-09 10:38:38 +08:00
wilfChen 31f3611f9a gpu support UnsortedSegmentSum kernel 2020-05-09 09:35:15 +08:00
rick_sanchez 6146424596 refactor vm module for multigraph sink 2020-05-09 09:10:27 +08:00
wilfChen 0a1195ddf5 broadcast kernel support unqual dims & half 2020-05-08 16:32:15 +08:00
ZPaC d3936b9f2a GPU kernels adapt with special dimensions. 2020-05-08 10:26:36 +08:00
wilfChen 1eb60df5d4 gpu support logsoftmax & logsoftmaxgrad kernel 2020-05-07 20:08:31 +08:00
mindspore-ci-bot bda4ebd591 !322 Gpu Support RMSProp kernel 
Merge pull request !322 from chenweifeng/rmsprop
 2020-05-07 19:03:42 +08:00
mindspore-ci-bot f602970990 !323 Gpu Concat support 4 inputs 
Merge pull request !323 from chenweifeng/concat
 2020-05-07 19:02:46 +08:00
mindspore-ci-bot 4e25fec769 !324 Gpu Slice kernel performance improve 
Merge pull request !324 from chenweifeng/slice
 2020-05-07 19:01:50 +08:00
mindspore-ci-bot 378a7122a5 !372 Gpu support BatchMatMul kernel 
Merge pull request !372 from chenweifeng/batchmatmul
 2020-05-07 18:59:28 +08:00
mindspore-ci-bot 97d21ba014 !502 Gpu Support Gelu & GeluGrad 
Merge pull request !502 from chenweifeng/gelu
 2020-05-07 18:58:45 +08:00
mindspore-ci-bot a97f30ba7d !516 Gpu support Tanh & TanhGrad kernel 
Merge pull request !516 from chenweifeng/tanh
 2020-05-07 18:55:37 +08:00
mindspore-ci-bot 38c56fd1a5 !945 gpu queue support Sqrt & Rsqrt kernel 
Merge pull request !945 from chenweifeng/unary
 2020-05-07 18:51:04 +08:00
mindspore-ci-bot 8a484dbd0b !812 [CR] add lenet train and eval st case 
Merge pull request !812 from jinyaohui/train_eval
 2020-05-07 18:01:21 +08:00
jinyaohui 8b49a4cf0e add lenet train eval gpu st case 2020-05-07 16:59:09 +08:00
wilfChen a304304c30 gpu support Gelu & GeluGrad kernels 2020-05-07 15:39:27 +08:00
wilfChen 311bf41e6d gpu support tanh & tanhgrad kernel 2020-05-07 15:33:08 +08:00
wilfChen 67a0cc3bf1 gpu queue support unary 2020-05-07 15:25:42 +08:00
wilfChen 16f0688230 gpu support broadcast kernels 2020-05-06 19:43:37 +08:00
changzherui b323199dc1 syn code 430 2020-04-30 17:55:12 +08:00
mindspore-ci-bot 7eaed2463f !786 GPU update testcase for amp 
Merge pull request !786 from VectorSL/gpu-add-test-amp
 2020-04-30 14:56:59 +08:00
mindspore-ci-bot 0611c1a579 !849 [CT][MS] Wrong format of broadcast output, when multi-output 
Merge pull request !849 from vlne-v1/I1FQ76-wrong-format-of-boardcast-output-when-multi-output
 2020-04-30 14:27:36 +08:00
Wei Luning 157710ca0f bugfix* fix bug in output tuple of tuple.* check kRWWrite input no-variable* input x of ScatterNdUpdate should be a parameter node 2020-04-30 12:00:56 +08:00
VectorSL 1d7fe758a0 gpu add test for amp 2020-04-30 11:44:16 +08:00
mindspore-ci-bot 8c035a5171 !756 Gpu support LayerNorm kernel 
Merge pull request !756 from chenweifeng/layer_norm
 2020-04-30 11:11:06 +08:00
mindspore-ci-bot 70f8b66d9f !844 validate the accuracy for resnet cifar 
Merge pull request !844 from chujinjin/add_accuracy_for_resnet_cifar
 2020-04-29 20:27:58 +08:00
chujinjin d5adfa5210 add accuracy for resnet cifar 2020-04-29 17:08:45 +08:00
mindspore-ci-bot e64f806a94 !730 Add base aggregator of gnn and its ut 
Merge pull request !730 from yuanhan/master
 2020-04-29 11:31:11 +08:00
hanyuanai 64f824e4fc Add gnn aggregator and its ut 2020-04-29 02:06:32 +00:00
mindspore-ci-bot 3dd369cefa !816 faster combine_like step 
Merge pull request !816 from flywind/combine_opt
 2020-04-29 09:13:51 +08:00
mindspore-ci-bot 516e16ded0 !792 [Model][bert] Modify ST test script of bert model. 
Merge pull request !792 from wsc/lossscale_script
 2020-04-28 21:51:56 +08:00
kpy 65cd41844d change manager logic to faster combine_like step 2020-04-28 20:54:01 +08:00
wsc d428fc1166 Modify the ST test script and example script of bert model 2020-04-28 20:51:25 +08:00
dinghao f77de54aa4 fix tensor dirty 2020-04-28 18:22:37 +08:00
mindspore-ci-bot 9399dffe0e !751 Remove enable hccl 
Merge pull request !751 from zjun/remove_enable_hccl
 2020-04-28 14:23:40 +08:00
zjun c538b83712 remove enbale hccl 2020-04-28 10:37:08 +08:00
rick_sanchez 6ae8345cad refactor vm module for multigraph sink 2020-04-28 09:53:43 +08:00
wilfChen 53b4529558 Gpu support LayerNorm kernel 2020-04-27 20:06:47 +08:00
mindspore-ci-bot d7242002aa !474 [MS][bert][example]Add ST test script of bert model 
Merge pull request !474 from wsc/lossscale_script
 2020-04-27 09:16:16 +08:00
yanzhenxiang2020 691337a6e1 add aicpu ops of Reshape/Flatten/Squeeze/ExpandDims/IsFinite 2020-04-26 17:36:12 +08:00
wsc e071f04d4b Add ST test script of bert with loss scale 2020-04-26 16:37:49 +08:00
liuxiao 5e877a7715 modify api and add example 2020-04-26 11:07:18 +08:00
ZPaC 75381bc30c Add gpu test case for dynamic lr. 2020-04-23 15:36:49 +08:00
mindspore-ci-bot c0825e18a7 !588 Add ReluV2/ReluGradV2/ConfusionMulGrad ops for VM 
Merge pull request !588 from liuxiao/add-reluv2
 2020-04-22 21:58:57 +08:00
mindspore-ci-bot 0a6caa8623 !578 Rename davinci to ascend in ops st test module 
Merge pull request !578 from leonwanghui/rename
 2020-04-22 21:46:49 +08:00
liuxiao b6e77e5178 Add ReluV2/ReluGradV2/ConfusionMulGrad for VM 2020-04-22 21:09:37 +08:00
leonwanghui ba43dbc148 Fix pylint warnings in mindspore st test module 2020-04-22 16:44:19 +08:00
leonwanghui b78b18e669 Rename davinci to ascend in ops st test module 2020-04-22 15:58:50 +08:00
limingqi107 2891f0d20d gpu dynamic memory pool supports multi-allReduce 2020-04-22 15:43:45 +08:00
VectorSL 4740c70fc3 gpu add testcases 2020-04-21 19:40:29 +08:00
mindspore-ci-bot 728801301c !313 GPU add akg kernel float_status 
Merge pull request !313 from VectorSL/float_status
 2020-04-21 12:27:29 +08:00
VectorSL c000fb2f34 gpu add float_status kernel 2020-04-20 19:44:40 +08:00
mindspore-ci-bot 3822b4837f !340 Add a HistogramSummary ops to record tensor value 
Merge pull request !340 from ougongchang/master
 2020-04-20 10:54:04 +08:00
mindspore-ci-bot 15c8ef66ba !401 Add ops Abs\AbsGrad\Sign\SmoothL1Loss\SmoothL1LossGrad\TopK for VM. 
Merge pull request !401 from liuxiao/openresource
 2020-04-20 10:16:43 +08:00
mindspore-ci-bot 093c2caed4 !337 optimize execute order sort 
Merge pull request !337 from kisnwang/optimize-execute-order-sort
 2020-04-18 17:27:55 +08:00
liuxiao 5c9791a802 Add Abs\AbsGrad\Sign\SmoothL1Loss\SmoothL1LossGrad and modify TopKV2->TopK for VM 2020-04-18 15:21:44 +08:00
kswang 6775190e48 add cpu one hot 2020-04-18 14:44:03 +08:00
ougongchang 0ed6d9178e add Histogram summary operator 
clean clang format errors and cpplint errors

add some test cases for histogram summary operator
 2020-04-18 09:56:45 +08:00
wilfChen 5432fcb43f gpu support RMSProp kernel 2020-04-18 09:26:45 +08:00
wilfChen 9a7702b807 gpu support batchmatmul kernel 2020-04-18 09:21:12 +08:00
kswang 83eeac9310 optimize execute order sort 2020-04-17 15:09:48 +08:00
mindspore-ci-bot 87be386581 !314 GPU add kernel assign 
Merge pull request !314 from VectorSL/assign
 2020-04-16 19:36:30 +08:00
ZPaC 4cd237eee4 Add GPU NCCL ci test cases. 2020-04-16 10:47:39 +08:00
chujinjin b804d9103d set default execution mode to pynative 2020-04-15 14:11:25 +08:00
wilfChen cc93646207 gpu concat kernel support 4 inputs 2020-04-15 09:46:36 +08:00
wilfChen 5b7790a2a7 Gpu Slice kernel performance improvement 2020-04-15 09:11:07 +08:00
mindspore-ci-bot 7d7c9c4fee !311 GPU add akg kernel select 
Merge pull request !311 from VectorSL/select
 2020-04-14 21:25:16 +08:00
dengwentao 48f90eb7bc add custom op st to ci 2020-04-14 20:16:14 +08:00
VectorSL 9e372073e2 gpu add assigin 2020-04-14 20:11:44 +08:00
VectorSL d248b05a98 gpu add kernel select 2020-04-14 20:03:33 +08:00
mindspore-ci-bot 94589ce611 !226 expend conv stride and dilation to 2d 
Merge pull request !226 from wangnan39/expend_conv_stride_to_2d
 2020-04-14 14:58:22 +08:00
chenzomi 652ab6c386 add test case for aware quantizaiton 2020-04-14 14:00:35 +08:00
wangnan39@huawei.com 2604acedcb extend conv stride and dilation to 2d 2020-04-14 13:16:27 +08:00
zjun f5ee197b6c Modify custom op register 2020-04-10 16:52:31 +08:00
mindspore-ci-bot 3e36982314 !99 Develop op MaxPoolWithArgMax 
Merge pull request !99 from zhangbuxue/Dock_MaxPoolWithArgMax
 2020-04-08 22:40:00 +08:00
buxue 7541d3b067 Develop op MaxPoolWithArgMax 2020-04-08 20:47:49 +08:00
mindspore-ci-bot 3f5136302a !149 Use TFRecordDataset instead of StorageDataset in Bert model integration test and add absolute position embedding code in bert model 
Merge pull request !149 from yoonlee666/master
 2020-04-08 20:28:06 +08:00
yoonlee666 c5bfbc3556 use TFRecordDataset in bert ci script and add absolute position embedding code in bert model 2020-04-08 14:31:18 +08:00
zhaozhenlong f9d180d413 add api image gradients 2020-04-08 11:50:22 +08:00
wanghua 5b176f258b modify bert test file 2020-04-03 18:20:50 +08:00
wanghua da123c5b3e fix bert precison bug 2020-04-03 14:55:25 +08:00
xiefangqi bc4602b58e fix and remove useless import of example, st, ut 2020-04-02 22:13:36 +08:00
lvliang ff4f935e40 pynative-add-lenet 2020-04-02 09:25:25 +08:00
mindspore-ci-bot a42eee52ba !67 add cpu st lenet 
Merge pull request !67 from kisnwang/add-cpu-st
 2020-04-01 15:15:13 +08:00
VectorSL aea6b0c974 update tests/st/ops/gpu/test_tensoradd.py. 
fix pytest.mark for testcase
 2020-04-01 11:49:37 +08:00
kswang 2dc9f632c1 add cpu st lenet 2020-03-31 21:25:48 +08:00
lichenever 30231eab2f fix auto parallel st 2020-03-31 11:19:06 +08:00
zhunaipan 930a1fb0a8 initial version 
Signed-off-by: leonwanghui <leon.wanghui@huawei.com>
 2020-03-27 22:54:54 +08:00