forked from mindspore-Ecosystem/mindspore
!15820 add DeConv2d Coder
From: @zoloft Reviewed-by: @wangchengyuan,@wangchengyuan,@hangangqiang Signed-off-by: @wangchengyuan
This commit is contained in:
commit
7486574169
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@ -99,6 +99,7 @@ set(CODER_OPCODERS_SRC
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${MICRO_DIR}/coder/opcoders/nnacl/fp32/transpose_fp32_coder.cc
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${MICRO_DIR}/coder/opcoders/nnacl/fp32/splice_fp32_coder.cc
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${MICRO_DIR}/coder/opcoders/nnacl/fp32/exp_fp32_coder.cc
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${MICRO_DIR}/coder/opcoders/nnacl/fp32/deconv2d_fp32_coder.cc
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#### nnacl int8 coder
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${MICRO_DIR}/coder/opcoders/nnacl/int8/activation_int8_coder.cc
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${MICRO_DIR}/coder/opcoders/nnacl/int8/add_int8_coder.cc
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@ -188,11 +189,13 @@ set(LITE_KERNEL_SRC
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${NNACL_DIR}/fp32/winograd_utils.c
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${NNACL_DIR}/fp32/pack_fp32.c
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${NNACL_DIR}/fp32/arithmetic_fp32.c
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${NNACL_DIR}/fp32/deconv_fp32.c
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${NNACL_DIR}/fp32/matmul_fp32.c
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${NNACL_DIR}/fp32/common_func_fp32.c
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${NNACL_DIR}/int8/quantize.c
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${NNACL_DIR}/int8/pack_int8.c
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${NNACL_DIR}/int8/matmul_int8.c
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${NNACL_DIR}/int8/fixed_point.c
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${NNACL_DIR}/fp32/matmul_fp32.c
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${NNACL_DIR}/int8/arithmetic_int8.c
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${NNACL_DIR}/int8/add_int8.c
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${NNACL_DIR}/int8/concat_int8.c
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@ -288,6 +291,8 @@ set(LITE_KERNEL_SRC
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if("${X86_64_SIMD}" STREQUAL "sse")
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set(SSE_SRC
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${NNACL_DIR}/intrinsics/sse/MatMul_Sse.c
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${NNACL_DIR}/intrinsics/sse/PostFuncBiasReluC8.c
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${NNACL_DIR}/intrinsics/sse/PostFuncBiasReluC4.c
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)
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set_property(SOURCE ${SSE_SRC} PROPERTY LANGUAGE C)
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endif()
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@ -299,6 +304,8 @@ if("${X86_64_SIMD}" STREQUAL "avx")
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set(AVX_SRC
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${NNACL_DIR}/intrinsics/avx/common_utils.c
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${NNACL_DIR}/intrinsics/sse/MatMul_Sse.c
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${NNACL_DIR}/intrinsics/sse/PostFuncBiasReluC8.c
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${NNACL_DIR}/intrinsics/sse/PostFuncBiasReluC4.c
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${NNACL_DIR}/assembly/avx/MatmulAvx.S
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)
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set_property(SOURCE ${AVX_SRC} PROPERTY LANGUAGE C)
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@ -7,6 +7,7 @@ set(WRAPPER_SRC
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${WRAPPER_DIR}/base/optimize_handler_wrapper.c
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${WRAPPER_DIR}/fp32/matmul_fp32_wrapper.c
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${WRAPPER_DIR}/fp32/arithmetic_fp32_wrapper.c
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${WRAPPER_DIR}/fp32/deconvolution_fp32_wrapper.c
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${WRAPPER_DIR}/int8/matmul_int8_wrapper.c
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${WRAPPER_DIR}/int8/add_int8_wrapper.c
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${WRAPPER_DIR}/int8/concat_int8_wrapper.c
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@ -0,0 +1,196 @@
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "coder/opcoders/nnacl/fp32/deconv2d_fp32_coder.h"
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#include <memory>
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#include <string>
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#include <vector>
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#include "coder/opcoders/nnacl/fp32/convolution_winograd_fp32_coder.h"
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#include "nnacl/fp32/winograd_utils.h"
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#include "coder/opcoders/file_collector.h"
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#include "coder/log.h"
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#include "coder/opcoders/parallel.h"
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#include "src/common/version_manager.h"
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#include "coder/opcoders/nnacl/dequant/de_quant.h"
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using mindspore::schema::PrimitiveType_Conv2dTransposeFusion;
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namespace mindspore::lite::micro::nnacl {
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int DeConvolutionFP32Coder::InitRunBuf() {
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pack_output_size_ = UP_ROUND(conv_param_->output_channel_, C8NUM) * output_plane_ * sizeof(float);
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packed_output_ = reinterpret_cast<float *>(allocator_->Malloc(kNumberTypeFloat32, pack_output_size_, kWorkspace));
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MS_CHECK_PTR(packed_output_);
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if (target_ == kARM32A) {
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tmp_buffer_size_ = matmul_param_.row_4_ * matmul_param_.col_8_ * sizeof(float);
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} else {
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tmp_buffer_size_ = matmul_param_.row_12_ * matmul_param_.col_8_ * sizeof(float);
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}
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tmp_buffer_ = reinterpret_cast<float *>(allocator_->Malloc(kNumberTypeFloat32, tmp_buffer_size_, kWorkspace));
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MS_CHECK_PTR(tmp_buffer_);
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if (target_ == kARM32A) {
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pack_input_size_ = matmul_param_.row_4_ * matmul_param_.deep_ * sizeof(float);
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} else {
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pack_input_size_ = matmul_param_.row_12_ * matmul_param_.deep_ * sizeof(float);
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}
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packed_input_ = reinterpret_cast<float *>(allocator_->Malloc(kNumberTypeFloat32, pack_input_size_, kWorkspace));
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MS_CHECK_PTR(packed_input_);
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return RET_OK;
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}
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int DeConvolutionFP32Coder::InitParam() {
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input_plane_ = conv_param_->input_h_ * conv_param_->input_w_;
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kernel_plane_ = conv_param_->kernel_w_ * conv_param_->kernel_h_;
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output_plane_ = conv_param_->output_h_ * conv_param_->output_w_;
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matmul_param_.row_ = input_plane_;
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matmul_param_.deep_ = conv_param_->input_channel_;
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matmul_param_.col_ = conv_param_->output_channel_ * kernel_plane_;
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matmul_param_.row_12_ = UP_ROUND(matmul_param_.row_, C12NUM);
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matmul_param_.row_4_ = UP_ROUND(matmul_param_.row_, C4NUM);
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matmul_param_.col_8_ = UP_ROUND(conv_param_->output_channel_, C8NUM) * kernel_plane_;
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return RET_OK;
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}
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int DeConvolutionFP32Coder::Prepare(CoderContext *const context) {
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MS_CHECK_RET_CODE(Conv2DBaseCoder::Init(), "Conv2DBaseCoder::Init() failed.");
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MS_CHECK_RET_CODE(InitWeightBias(context), "Init weight bias failed.");
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return Resize();
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}
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int DeConvolutionFP32Coder::Resize() {
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MS_CHECK_RET_CODE(Conv2DBaseCoder::Init(), "init failed.");
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MS_CHECK_RET_CODE(InitParam(), "init param failed.");
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MS_CHECK_RET_CODE(InitRunBuf(), "init run buffer failed.");
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return RET_OK;
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}
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int DeConvolutionFP32Coder::InitWeightBias(CoderContext *const context) {
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int kernel_h = filter_tensor_->Height();
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int kernel_w = filter_tensor_->Width();
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int in_channel = filter_tensor_->Channel();
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int out_channel = filter_tensor_->Batch();
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conv_param_->input_channel_ = in_channel;
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conv_param_->output_channel_ = out_channel;
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if (input_tensors_.size() == kInputSize2) {
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bias_data_size_ = UP_ROUND(out_channel, C4NUM) * sizeof(float);
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packed_bias_ = reinterpret_cast<float *>(allocator_->Malloc(kNumberTypeFloat32, kOnlineSize, kOnlinePackWeight));
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MS_CHECK_PTR(packed_bias_);
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}
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int kernel_plane = kernel_h * kernel_w;
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int pack_weight_size = in_channel * kernel_plane;
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pack_weight_size_ = pack_weight_size * UP_ROUND(out_channel, C8NUM) * sizeof(float);
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packed_weight_ = reinterpret_cast<float *>(allocator_->Malloc(kNumberTypeFloat32, kOnlineSize, kOnlinePackWeight));
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MS_CHECK_PTR(packed_weight_);
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NNaclFp32Serializer init_code;
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if (input_tensors_.size() == kInputSize2) {
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init_code.CodeMallocExpression(packed_bias_, bias_data_size_);
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init_code.CodeFunction("memset", packed_bias_, 0, pack_weight_size_);
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init_code.CodeFunction("memcpy", packed_bias_, bias_tensor_, out_channel * sizeof(float));
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}
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init_code.CodeMallocExpression(packed_weight_, pack_weight_size_);
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init_code.CodeFunction("memset", packed_weight_, 0, pack_weight_size_);
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init_code.CodeFunction("PackNHWCToC8HWN8Fp32", filter_tensor_, packed_weight_, in_channel, kernel_plane, out_channel);
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context->AppendInitCode(init_code.str());
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return RET_OK;
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}
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int DeConvolutionFP32Coder::DoCode(CoderContext *const context) {
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Collect(context,
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{
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"wrapper/fp32/deconvolution_fp32_wrapper.h",
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"nnacl/fp32/conv_common_fp32.h",
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"nnacl/pack.h",
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"nnacl/fp32/common_func_fp32.h",
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"nnacl/base/minimal_filtering_generator.h",
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"nnacl/fp32/matmul_fp32.h",
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"nnacl/conv_parameter.h",
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"nnacl/matmul_parameter.h",
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"nnacl/op_base.h",
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},
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{
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"deconvolution_fp32_wrapper.c",
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"common_func.c",
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"conv_common_fp32.c",
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"matmul_fp32.c",
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"pack_fp32.c",
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"deconv_fp32.c",
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"minimal_filter_generator.c",
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});
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if (target_ == kARM32A) {
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Collect(context, {}, {},
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{
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"MatmulFp32.S",
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"MatmulFp32Opt.S",
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"PreSum4x16Int8Peroc.S",
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"PreSum4x16Int8Pert.S",
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"IndirectGemmInt16to32_8x4.S",
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"MatmulInt8.S",
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"MatmulFp32Opt12x4.S",
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});
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} else if (target_ == kARM64) {
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Collect(context, {}, {},
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{
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"MatmulFp32.S",
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"MatmulFp32Opt.S",
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"PreSum4x16Int8Peroc.S",
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"MatVecMulFp32.S",
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"PreSum4x16Int8Peroc.S",
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"PreSum4x16Int8Pert.S",
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"IndirectGemmInt16to32_8x4.S",
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"MatmulInt8.S",
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});
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}
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NNaclFp32Serializer code;
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// call the op function
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code.CodeFunction("memset", packed_input_, "0", pack_input_size_);
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code.CodeFunction("memset", packed_output_, "0", pack_output_size_);
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code.CodeFunction("memset", tmp_buffer_, "0", tmp_buffer_size_);
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code.CodeStruct("conv_parameter", *conv_param_);
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code.CodeStruct("matmul_parameter", matmul_param_);
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std::string src_in_ptr_str = allocator_->GetRuntimeAddr(input_tensor_);
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std::string src_out_ptr_str = allocator_->GetRuntimeAddr(output_tensor_);
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for (int batch_index = 0; batch_index < conv_param_->input_batch_; batch_index++) {
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input_ptr_ = src_in_ptr_str + std::to_string(batch_index * input_plane_ * conv_param_->input_channel_);
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output_ptr_ = src_out_ptr_str + std::to_string(batch_index * output_plane_ * conv_param_->output_channel_);
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if (target_ == kARM32A) {
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code.CodeFunction("RowMajor2Col4Major", input_ptr_, packed_input_, matmul_param_.row_, matmul_param_.deep_);
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} else {
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code.CodeFunction("RowMajor2Col12Major", input_ptr_, packed_input_, matmul_param_.row_, matmul_param_.deep_);
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}
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code.CodeBaseStruct("DeConvFp32Args", kRunArgs, packed_input_, packed_weight_, packed_bias_, packed_output_,
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output_ptr_, tmp_buffer_, "&matmul_parameter", "&conv_parameter");
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if (!support_parallel_) {
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code.CodeFunction("DeConvFp32Run", kRunArgsAddr, kDefaultTaskId);
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} else {
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code.CodeFunction(kParallelLaunch, gThreadPool, "DeConvFp32Run", kRunArgsAddr, "conv_parameter.thread_num_");
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}
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}
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context->AppendCode(code.str());
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return RET_OK;
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}
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REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_Conv2dTransposeFusion,
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CPUOpCoderCreator<DeConvolutionFP32Coder>);
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} // namespace mindspore::lite::micro::nnacl
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@ -0,0 +1,65 @@
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
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* http://www.apache.org/licenses/LICENSE-2.0
|
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*
|
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* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
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#ifndef MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_FP32_DECONV2D_FP32_CODER_H_
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#define MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_FP32_DECONV2D_FP32_CODER_H_
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#include <vector>
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#include <string>
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#include "nnacl/conv_parameter.h"
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#include "coder/opcoders/base/conv2d_base_coder.h"
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#include "coder/opcoders/serializers/nnacl_serializer/nnacl_fp32_serializer.h"
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#include "nnacl/fp32/deconv_fp32.h"
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#include "nnacl/fp32/matmul_fp32.h"
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namespace mindspore::lite::micro::nnacl {
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class DeConvolutionFP32Coder final : public Conv2DBaseCoder {
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public:
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DeConvolutionFP32Coder(const std::vector<Tensor *> &in_tensors, const std::vector<Tensor *> &out_tensors,
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const Model::Node *node, size_t node_index, Target target)
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: Conv2DBaseCoder(in_tensors, out_tensors, node, node_index, target) {}
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int Prepare(CoderContext *const context) override;
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int DoCode(CoderContext *const context) override;
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~DeConvolutionFP32Coder() override = default;
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private:
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int InitWeightBias(CoderContext *const context);
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int Resize();
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int InitRunBuf();
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int InitParam();
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MatMulParameter matmul_param_{};
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size_t pack_output_size_{0};
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size_t tmp_buffer_size_{0};
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size_t pack_input_size_{0};
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size_t bias_data_size_{0};
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size_t pack_weight_size_{0};
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int input_plane_{0};
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int kernel_plane_{0};
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int output_plane_{0};
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float *packed_bias_{nullptr};
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float *packed_weight_{nullptr};
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float *packed_input_{nullptr};
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float *packed_output_{nullptr};
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float *tmp_buffer_{nullptr};
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std::string input_ptr_;
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std::string output_ptr_;
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};
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} // namespace mindspore::lite::micro::nnacl
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#endif // MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_FP32_DECONV2D_FP32_CODER_H_
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@ -0,0 +1,69 @@
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/*
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* Copyright 2021 Huawei Technologies Co., Ltd
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
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#include "wrapper/fp32/deconvolution_fp32_wrapper.h"
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#include "nnacl/fp32/deconv_fp32.h"
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#include "nnacl/fp32/matmul_fp32.h"
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int DoDeconvFp32(const float *packed_input, const float *packed_weight, const float *packed_bias, float *packed_output,
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float *output, float *tmp_ori_buffer, const MatMulParameter *matmul_param,
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const ConvParameter *conv_param, int task_id) {
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int thread_count = MSMIN(conv_param->thread_num_, UP_DIV(conv_param->output_channel_, C8NUM));
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int thread_stride = UP_DIV(UP_DIV(conv_param->output_channel_, C8NUM), thread_count);
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int res_stride = UP_DIV(conv_param->output_channel_, C8NUM) - task_id * thread_stride;
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int oc = MSMIN(thread_stride, res_stride);
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int cur_stride = thread_stride * C8NUM;
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res_stride = conv_param->output_channel_ - task_id * thread_stride * C8NUM;
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int oc_res = MSMIN(cur_stride, res_stride);
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if (oc <= 0 || oc_res <= 0) {
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return NNACL_OK;
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}
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int kernel_plane = conv_param->kernel_w_ * conv_param->kernel_h_;
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int output_plane = conv_param->output_h_ * conv_param->output_w_;
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#if defined(ENABLE_ARM32)
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float *tmp_buffer = tmp_ori_buffer + task_id * thread_stride * C8NUM * kernel_plane * matmul_param->row_4_;
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MatMulOpt(packed_input, packed_weight + task_id * thread_stride * C8NUM * kernel_plane * matmul_param->deep_,
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tmp_buffer, NULL, ActType_No, matmul_param->deep_, matmul_param->row_4_, oc * C8NUM * kernel_plane,
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matmul_param->col_, OutType_C8);
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#else
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float *tmp_buffer = tmp_ori_buffer + task_id * thread_stride * C8NUM * kernel_plane * matmul_param->row_12_;
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MatMulOpt(packed_input, packed_weight + task_id * thread_stride * C8NUM * kernel_plane * matmul_param->deep_,
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tmp_buffer, NULL, ActType_No, matmul_param->deep_, matmul_param->row_12_, oc * C8NUM * kernel_plane,
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matmul_param->col_, OutType_C8);
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#endif
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DeConvPostFp32C8(tmp_buffer, packed_output + task_id * thread_stride * C8NUM * output_plane,
|
||||
packed_bias + thread_stride * task_id * C8NUM, output + task_id * thread_stride * C8NUM, oc_res,
|
||||
conv_param);
|
||||
return NNACL_OK;
|
||||
}
|
||||
|
||||
int DeConvFp32Run(void *cdata, int task_id) {
|
||||
DeConvFp32Args *args = (DeConvFp32Args *)cdata;
|
||||
const MatMulParameter *matmul_param = args->matmul_param_;
|
||||
const ConvParameter *conv_param = args->conv_param_;
|
||||
const float *packed_input = args->packed_input_;
|
||||
const float *packed_weight = args->packed_weight_;
|
||||
const float *packed_bias = args->packed_bias_;
|
||||
float *packed_output = args->packed_output_;
|
||||
float *output = args->output_;
|
||||
float *tmp_buffer = args->tmp_buffer_;
|
||||
DoDeconvFp32(packed_input, packed_weight, packed_bias, packed_output, output, tmp_buffer, matmul_param, conv_param,
|
||||
task_id);
|
||||
return NNACL_OK;
|
||||
}
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
* Copyright 2021 Huawei Technologies Co., Ltd
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef MINDSPORE_LITE_MICRO_CODER_WRAPPER_DECONVOLUTION_FP32_WRAPPER_H_
|
||||
#define MINDSPORE_LITE_MICRO_CODER_WRAPPER_DECONVOLUTION_FP32_WRAPPER_H_
|
||||
|
||||
#include "nnacl/errorcode.h"
|
||||
#include "nnacl/conv_parameter.h"
|
||||
#include "nnacl/matmul_parameter.h"
|
||||
|
||||
typedef struct {
|
||||
const float *packed_input_;
|
||||
const float *packed_weight_;
|
||||
const float *packed_bias_;
|
||||
float *packed_output_;
|
||||
float *output_;
|
||||
float *tmp_buffer_;
|
||||
const MatMulParameter *matmul_param_;
|
||||
const ConvParameter *conv_param_;
|
||||
} DeConvFp32Args;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int DoDeconvFp32(const float *packed_input, const float *packed_weight, const float *packed_bias, float *packed_output,
|
||||
float *output, float *tmp_ori_buffer, const MatMulParameter *matmul_param,
|
||||
const ConvParameter *conv_param, int task_id);
|
||||
|
||||
int DeConvFp32Run(void *cdata, int task_id);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif // MINDSPORE_LITE_MICRO_CODER_WRAPPER_DECONVOLUTION_FP32_WRAPPER_H_
|
Loading…
Reference in New Issue