forked from mindspore-Ecosystem/mindspore
spacetobatch modified cpplint
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@ -48,11 +48,11 @@ class BatchToSpaceGpuKernel : public GpuKernel {
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}
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bool Init(const CNodePtr &kernel_node) override {
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if(!CheckParam(kernel_node)) {
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if (!CheckParam(kernel_node)) {
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return false;
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}
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input_size_ = sizeof(T);
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for(size_t idx = 0; idx < input_shape_.size(); ++idx){
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for (size_t idx = 0; idx < input_shape_.size(); ++idx) {
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input_size_ *= input_shape_[idx];
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}
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@ -93,54 +93,54 @@ class BatchToSpaceGpuKernel : public GpuKernel {
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bool CheckParam(const CNodePtr &kernel_node) {
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block_size_ = static_cast<int64_t>(GetAttr<int64_t>(kernel_node, "block_size"));
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if(block_size_ < 2) {
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if (block_size_ < 2) {
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MS_LOG(ERROR) << "block_size can not be less than 2.";
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return false;
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}
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size_t input_num = AnfAlgo::GetInputTensorNum(kernel_node);
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if(input_num != 1) {
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if (input_num != 1) {
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MS_LOG(ERROR) << "input_num is " << input_num << ", but BatchToSpace needs 1 input.";
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return false;
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}
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size_t output_num = AnfAlgo::GetOutputTensorNum(kernel_node);
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if(output_num != 1) {
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if (output_num != 1) {
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MS_LOG(ERROR) << "output_num is " << output_num << ", but BatchToSpace needs 1 output.";
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return false;
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}
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// check input_shape
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auto input_shape = AnfAlgo::GetInputRealDeviceShapeIfExist(kernel_node, 0);
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if(input_shape.size() != 4) {
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if (input_shape.size() != 4) {
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MS_LOG(ERROR) << "Input is " << input_shape.size() << "-D, but BatchToSpace supports 4-D tensor.";
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return false;
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}
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if((input_shape[0] % (block_size_ * block_size_)) != 0) {
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if ((input_shape[0] % (block_size_ * block_size_)) != 0) {
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MS_LOG(ERROR) << "input_shape[0] must be divisible by product of block_shape";
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return false;
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}
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input_shape_.assign(input_shape.begin(),input_shape.end());
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input_shape_.assign(input_shape.begin(), input_shape.end());
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// check crops
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crops_ =
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static_cast<std::vector<std::vector<int64_t>>>(GetAttr<std::vector<std::vector<int64_t>>>(kernel_node, "crops"));
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if(crops_.size() != 2) {
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if (crops_.size() != 2) {
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MS_LOG(ERROR) << "crops.size() in BatchToSpace needs 2.";
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return false;
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}
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if(crops_[0].size() != 2 || crops_[1].size() != 2) {
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if (crops_[0].size() != 2 || crops_[1].size() != 2) {
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MS_LOG(ERROR) << "crops[i].size() in BatchToSpace needs 2.";
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return false;
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}else {
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for(size_t idx_i = 0; idx_i < 2; ++idx_i) {
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for(size_t idx_j = 0; idx_j < 2; ++idx_j) {
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if(crops_[idx_i][idx_j] < 0) {
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} else {
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for (size_t idx_i = 0; idx_i < 2; ++idx_i) {
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for (size_t idx_j = 0; idx_j < 2; ++idx_j) {
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if (crops_[idx_i][idx_j] < 0) {
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MS_LOG(ERROR) << "the number in crops can not be less than 0.";
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return false;
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}
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}
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auto tmp_shape = input_shape[idx_i + 2] * block_size_ - crops_[idx_i][0] - crops_[idx_i][1];
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if(tmp_shape < 0) {
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if (tmp_shape < 0) {
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MS_LOG(ERROR) << "out_shape can not be less 0.";
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}
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}
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@ -48,11 +48,11 @@ class SpaceToBatchGpuKernel : public GpuKernel {
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}
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bool Init(const CNodePtr &kernel_node) override {
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if(!CheckParam(kernel_node)) {
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if (!CheckParam(kernel_node)) {
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return false;
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}
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input_size_ = sizeof(T);
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for(size_t idx = 0; idx < input_shape_.size(); ++idx){
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for (size_t idx = 0; idx < input_shape_.size(); ++idx) {
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input_size_ *= input_shape_[idx];
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}
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in_ = input_shape_[0];
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@ -93,48 +93,48 @@ class SpaceToBatchGpuKernel : public GpuKernel {
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private:
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bool CheckParam(const CNodePtr &kernel_node) {
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block_size_ = static_cast<int64_t>(GetAttr<int64_t>(kernel_node, "block_size"));
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if(block_size_ < 2) {
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if (block_size_ < 2) {
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MS_LOG(ERROR) << "block_size can not be less than 2.";
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return false;
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}
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size_t input_num = AnfAlgo::GetInputTensorNum(kernel_node);
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if(input_num != 1) {
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if (input_num != 1) {
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MS_LOG(ERROR) << "input_num is " << input_num << ", but BatchToSpace needs 1 input.";
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return false;
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}
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size_t output_num = AnfAlgo::GetOutputTensorNum(kernel_node);
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if(output_num != 1) {
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if (output_num != 1) {
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MS_LOG(ERROR) << "output_num is " << output_num << ", but BatchToSpace needs 1 output.";
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return false;
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}
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// check input_shape
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auto input_shape = AnfAlgo::GetInputRealDeviceShapeIfExist(kernel_node, 0);
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if(input_shape.size() != 4) {
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if (input_shape.size() != 4) {
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MS_LOG(ERROR) << "Input is " << input_shape.size() << "-D, but BatchToSpace supports 4-D tensor.";
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return false;
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}
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input_shape_.assign(input_shape.begin(),input_shape.end());
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input_shape_.assign(input_shape.begin(), input_shape.end());
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// check paddings_
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paddings_ =
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static_cast<std::vector<std::vector<int64_t>>>(GetAttr<std::vector<std::vector<int64_t>>>(kernel_node, "paddings"));
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if(paddings_.size() != 2) {
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if (paddings_.size() != 2) {
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MS_LOG(ERROR) << "paddings.size() in BatchToSpace needs 2.";
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return false;
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}
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if(paddings_[0].size() != 2 || paddings_[1].size() != 2) {
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if (paddings_[0].size() != 2 || paddings_[1].size() != 2) {
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MS_LOG(ERROR) << "paddings[i].size() in BatchToSpace needs 2.";
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return false;
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}else {
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for(size_t idx_i = 0; idx_i < 2; ++idx_i) {
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for(size_t idx_j = 0; idx_j < 2; ++idx_j) {
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if(paddings_[idx_i][idx_j] < 0) {
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} else {
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for (size_t idx_i = 0; idx_i < 2; ++idx_i) {
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for (size_t idx_j = 0; idx_j < 2; ++idx_j) {
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if (paddings_[idx_i][idx_j] < 0) {
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MS_LOG(ERROR) << "the number in paddings can not be less than 0.";
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return false;
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}
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}
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auto tmp_shape = input_shape[idx_i + 2] + paddings_[idx_i][0] + paddings_[idx_i][1];
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if((tmp_shape % block_size_) != 0) {
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if ((tmp_shape % block_size_) != 0) {
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MS_LOG(ERROR) << "padded shape must be divisible by block_size";
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}
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}
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@ -130,4 +130,4 @@ template void CalBatchToSpace<uint64_t>(const size_t size, const uint64_t *input
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const size_t on, const size_t oh, const size_t ow,
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const size_t oc, const size_t crop_up, const size_t crop_dn,
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const size_t crop_lft, const size_t crop_rht, const size_t block_num,
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uint64_t *output, cudaStream_t cuda_stream);
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uint64_t *output, cudaStream_t cuda_stream);
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@ -24,4 +24,4 @@ void CalBatchToSpace(const size_t size, const T *input, const size_t in,
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const size_t crop_lft, const size_t crop_rht, const size_t block_num,
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T *output, cudaStream_t cuda_stream);
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMPL_BATCHTOSPACE_H_
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMPL_BATCHTOSPACE_H_
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@ -131,4 +131,4 @@ template void CalSpaceToBatch<uint64_t>(const size_t size, const uint64_t *input
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const size_t on, const size_t oh, const size_t ow,
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const size_t oc, const size_t pad_up, const size_t pad_dn,
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const size_t pad_lft, const size_t pad_rht, const size_t block_num,
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uint64_t *output, cudaStream_t cuda_stream);
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uint64_t *output, cudaStream_t cuda_stream);
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@ -24,4 +24,4 @@ void CalSpaceToBatch(const size_t size, const T *input, const size_t in,
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const size_t pad_lft, const size_t pad_rht, const size_t block_num,
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T *output, cudaStream_t cuda_stream);
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMPL_SPACETOBATCH_H_
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMPL_SPACETOBATCH_H_
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