forked from mindspore-Ecosystem/mindspore
!2229 add ftrl optimizer
Merge pull request !2229 from zyli2020/add_ftrl_op
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "kernel/gpu/cuda_impl/ftrl_impl.cuh"
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template <typename T>
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__device__ __forceinline__ T PowFunc(T x, T y) {
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return pow(x, y);
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}
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template <>
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__device__ __forceinline__ half PowFunc(half x, half y) {
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return __float2half(pow(__half2float(x), __half2float(y)));
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}
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template <typename T>
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__device__ __forceinline__ bool CompareFunc(T x, T y) {
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return abs(x) > y;
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}
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template <>
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__device__ __forceinline__ bool CompareFunc(half x, half y) {
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return abs(__half2float(x)) > __half2float(y);
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}
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template <typename T>
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__device__ __forceinline__ T Sgn(T x) {
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return static_cast<T>(x != 0 ? (x > 0 ? 1 : -1) : 0);
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}
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template <>
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__device__ __forceinline__ half Sgn(half x) {
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return __float2half(__half2float(x) != 0 ? (__half2float(x) > 0 ? 1 : -1) : 0);
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}
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template <typename T>
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__global__ void ApplyFtrlKernel(const size_t size, const T *gradient, const T *learning_rate,
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const T *l1_regularization, const T *l2_regularization, const T *learning_rate_power,
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T *variable, T *accumulation, T *linear) {
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const T two = static_cast<T>(2.0);
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const T learning_rate_power_val = -learning_rate_power[0];
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for (size_t i = blockIdx.x * blockDim.x + threadIdx.x; i < size; i += gridDim.x * blockDim.x) {
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const T cur_accumulation = accumulation[i] + gradient[i] * gradient[i];
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const T accumulation_power = PowFunc(accumulation[i], learning_rate_power_val);
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const T cur_accumulation_power = PowFunc(cur_accumulation, learning_rate_power_val);
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const T sigma = (cur_accumulation_power - accumulation_power) / learning_rate[0];
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linear[i] += gradient[i] - sigma * variable[i];
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variable[i] = CompareFunc(linear[i], l1_regularization[0])
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? ((l1_regularization[0] * Sgn(linear[i]) - linear[i]) /
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(cur_accumulation_power / learning_rate[0] + two * l2_regularization[0]))
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: static_cast<T>(0);
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accumulation[i] = cur_accumulation;
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}
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}
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template <typename T>
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void ApplyFtrl(const size_t size, const T *gradient, const T *learning_rate, const T *l1_regularization,
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const T *l2_regularization, const T *learning_rate_power, T *variable, T *accumulation, T *linear,
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cudaStream_t cuda_stream) {
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ApplyFtrlKernel<<<GET_BLOCKS(size), GET_THREADS, 0, cuda_stream>>>(size, gradient, learning_rate, l1_regularization,
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l2_regularization, learning_rate_power, variable,
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accumulation, linear);
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}
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template void ApplyFtrl<float>(const size_t size, const float *gradient, const float *learning_rate,
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const float *l1_regularization, const float *l2_regularization,
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const float *learning_rate_power, float *variable, float *accumulation, float *linear,
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cudaStream_t cuda_stream);
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template void ApplyFtrl<half>(const size_t size, const half *gradient, const half *learning_rate,
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const half *l1_regularization, const half *l2_regularization,
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const half *learning_rate_power, half *variable, half *accumulation, half *linear,
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cudaStream_t cuda_stream);
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_FTRL_IMPL_H_
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#define MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_FTRL_IMPL_H_
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#include "device/gpu/cuda_common.h"
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template <typename T>
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void ApplyFtrl(const size_t size, const T *gradient, const T *learning_rate, const T *l1_regularization,
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const T *l2_regularization, const T *learning_rate_power, T *variable, T *accumulation, T *linear,
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cudaStream_t cuda_stream);
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_FTRL_IMPL_H_
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "kernel/gpu/nn/ftrl_gpu_kernel.h"
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namespace mindspore {
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namespace kernel {
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MS_REG_GPU_KERNEL_ONE(ApplyFtrl,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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FtrlGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(ApplyFtrl,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddInputAttr(kNumberTypeFloat16)
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.AddOutputAttr(kNumberTypeFloat16),
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FtrlGpuKernel, half)
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} // namespace kernel
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} // namespace mindspore
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/**
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_KERNEL_GPU_NN_FTRL_GPU_KERNEL_H_
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#define MINDSPORE_CCSRC_KERNEL_GPU_NN_FTRL_GPU_KERNEL_H_
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#include <vector>
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#include "kernel/gpu/gpu_kernel.h"
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#include "kernel/gpu/gpu_kernel_factory.h"
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#include "kernel/gpu/cuda_impl/ftrl_impl.cuh"
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namespace mindspore {
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namespace kernel {
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template <typename T>
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class FtrlGpuKernel : public GpuKernel {
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public:
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FtrlGpuKernel()
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: variable_size_(0),
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accumulation_size_(0),
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linear_size_(0),
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gradient_size_(0),
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learning_rate_size_(0),
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l1_regularization_size_(0),
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l2_regularization_size_(0),
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learning_rate_power_size_(0) {}
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~FtrlGpuKernel() override = default;
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const std::vector<size_t> &GetInputSizeList() const override { return input_size_list_; }
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const std::vector<size_t> &GetOutputSizeList() const override { return output_size_list_; }
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const std::vector<size_t> &GetWorkspaceSizeList() const override { return workspace_size_list_; }
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bool Launch(const std::vector<AddressPtr> &inputs, const std::vector<AddressPtr> &, const std::vector<AddressPtr> &,
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void *stream_ptr) override {
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T *variable = GetDeviceAddress<T>(inputs, 0);
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T *accumulation = GetDeviceAddress<T>(inputs, 1);
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T *linear = GetDeviceAddress<T>(inputs, 2);
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T *gradient = GetDeviceAddress<T>(inputs, 3);
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T *learning_rate = GetDeviceAddress<T>(inputs, 4);
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T *l1_regularization = GetDeviceAddress<T>(inputs, 5);
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T *l2_regularization = GetDeviceAddress<T>(inputs, 6);
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T *learning_rate_power = GetDeviceAddress<T>(inputs, 7);
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ApplyFtrl(inputs[0]->size / sizeof(T), gradient, learning_rate, l1_regularization, l2_regularization,
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learning_rate_power, variable, accumulation, linear, reinterpret_cast<cudaStream_t>(stream_ptr));
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return true;
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}
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bool Init(const CNodePtr &kernel_node) override {
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size_t input_num = AnfAlgo::GetInputTensorNum(kernel_node);
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if (input_num != 8) {
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MS_LOG(ERROR) << "Input number is " << input_num << ", but ftrl needs 8 inputs.";
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return false;
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}
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variable_size_ = sizeof(T);
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accumulation_size_ = sizeof(T);
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linear_size_ = sizeof(T);
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gradient_size_ = sizeof(T);
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learning_rate_size_ = sizeof(T);
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l1_regularization_size_ = sizeof(T);
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l2_regularization_size_ = sizeof(T);
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learning_rate_power_size_ = sizeof(T);
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auto variable_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 0);
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for (size_t i = 0; i < variable_shape.size(); i++) {
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variable_size_ *= variable_shape[i];
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}
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auto accumulation_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 1);
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for (size_t i = 0; i < accumulation_shape.size(); i++) {
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accumulation_size_ *= accumulation_shape[i];
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}
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auto linear_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 2);
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for (size_t i = 0; i < linear_shape.size(); i++) {
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linear_size_ *= linear_shape[i];
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}
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auto gradient_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 3);
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for (size_t i = 0; i < gradient_shape.size(); i++) {
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gradient_size_ *= gradient_shape[i];
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}
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InitSizeLists();
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return true;
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}
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protected:
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void InitSizeLists() override {
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input_size_list_.push_back(variable_size_);
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input_size_list_.push_back(accumulation_size_);
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input_size_list_.push_back(linear_size_);
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input_size_list_.push_back(gradient_size_);
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input_size_list_.push_back(learning_rate_size_);
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input_size_list_.push_back(l1_regularization_size_);
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input_size_list_.push_back(l2_regularization_size_);
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input_size_list_.push_back(learning_rate_power_size_);
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output_size_list_.push_back(0);
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}
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private:
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size_t variable_size_;
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size_t accumulation_size_;
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size_t linear_size_;
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size_t gradient_size_;
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size_t learning_rate_size_;
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size_t l1_regularization_size_;
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size_t l2_regularization_size_;
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size_t learning_rate_power_size_;
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std::vector<size_t> input_size_list_;
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std::vector<size_t> output_size_list_;
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std::vector<size_t> workspace_size_list_;
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};
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} // namespace kernel
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} // namespace mindspore
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_NN_FTRL_GPU_KERNEL_H_
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# Copyright 2019 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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import numpy as np
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import pytest
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import mindspore.context as context
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import mindspore.nn as nn
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from mindspore import Tensor
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from mindspore.nn import Dense
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from mindspore.nn import TrainOneStepCell, WithLossCell
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from mindspore.nn.optim import FTRL
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from mindspore.ops import operations as P
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context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
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class NetFtrl(nn.Cell):
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def __init__(self):
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super(NetFtrl, self).__init__()
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self.batch_size = 1
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self.reshape = P.Reshape()
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weight = Tensor(np.ones([10, 16]).astype(np.float32) * 0.01)
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self.fc1 = Dense(16, 10, weight_init=weight)
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def construct(self, input_x):
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output = self.reshape(input_x, (self.batch_size, -1))
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output = self.fc1(output)
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return output
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_ftrl():
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epoch = 3
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net = NetFtrl()
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optimizer = FTRL(filter(lambda x: x.requires_grad,
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net.get_parameters()), learning_rate=0.01)
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criterion = nn.SoftmaxCrossEntropyWithLogits(is_grad=False, sparse=True)
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net_with_criterion = WithLossCell(net, criterion)
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train_network = TrainOneStepCell(
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net_with_criterion, optimizer)
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train_network.set_train()
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context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
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losses1 = []
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for _ in range(epoch):
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data = Tensor(np.arange(0, 16).reshape(
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1, 1, 4, 4).astype(np.float32) * 0.01)
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label = Tensor(np.array([0]).astype(np.int32))
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loss = train_network(data, label)
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losses1.append(loss.asnumpy())
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assert losses1[0] > losses1[1]
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assert losses1[1] > losses1[2]
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context.set_context(mode=context.PYNATIVE_MODE, device_target="GPU")
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losses2 = []
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for _ in range(epoch):
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data = Tensor(np.arange(0, 16).reshape(
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1, 1, 4, 4).astype(np.float32) * 0.01)
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label = Tensor(np.array([0]).astype(np.int32))
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loss = train_network(data, label)
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losses2.append(loss.asnumpy())
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assert losses2[0] > losses2[1]
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assert losses2[1] > losses2[2]
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