forked from mindspore-Ecosystem/mindspore
!1508 add op BitwiseAnd BitwiseOr BitwiseXor vm
Merge pull request !1508 from zhaozhenlong/op/bitwise-and-or-xor
This commit is contained in:
commit
df347785c3
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@ -111,6 +111,7 @@ number_type = (int8,
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float64,)
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float64,)
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int_type = (int8, int16, int32, int64,)
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int_type = (int8, int16, int32, int64,)
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uint_type = (uint8, uint16, uint32, uint64)
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float_type = (float16, float32, float64,)
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float_type = (float16, float32, float64,)
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_simple_types = {
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_simple_types = {
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@ -202,3 +202,6 @@ from .scatter_add import _scatter_add_tbe
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from .atan2 import _atan2_tbe
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from .atan2 import _atan2_tbe
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from .batch_to_space_nd import _batch_to_space_nd_tbe
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from .batch_to_space_nd import _batch_to_space_nd_tbe
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from .space_to_batch_nd import _space_to_batch_nd_tbe
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from .space_to_batch_nd import _space_to_batch_nd_tbe
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from .bitwise_and import bitwise_and_op_info
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from .bitwise_or import bitwise_or_op_info
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from .bitwise_xor import bitwise_xor_op_info
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@ -0,0 +1,37 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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"""BitwiseAnd op"""
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from mindspore.ops.op_info_register import op_info_register, TBERegOp, DataType
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bitwise_and_op_info = TBERegOp("BitwiseAnd") \
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.fusion_type("OPAQUE") \
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.async_flag(False) \
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.binfile_name("bitwise_and.so") \
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.compute_cost(10) \
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.kernel_name("bitwise_and") \
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.partial_flag(True) \
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.input(0, "x1", False, "required", "all") \
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.input(1, "x2", False, "required", "all") \
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.output(0, "y", False, "required", "all") \
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.dtype_format(DataType.I16_Default, DataType.I16_Default, DataType.I16_Default) \
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.dtype_format(DataType.U16_Default, DataType.U16_Default, DataType.U16_Default) \
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.get_op_info()
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@op_info_register(bitwise_and_op_info)
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def _bitwise_and_tbe():
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"""BitwiseAnd TBE register"""
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return
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@ -0,0 +1,37 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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"""BitwiseOr op"""
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from mindspore.ops.op_info_register import op_info_register, TBERegOp, DataType
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bitwise_or_op_info = TBERegOp("BitwiseOr") \
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.fusion_type("OPAQUE") \
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.async_flag(False) \
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.binfile_name("bitwise_or.so") \
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.compute_cost(10) \
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.kernel_name("bitwise_or") \
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.partial_flag(True) \
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.input(0, "x1", False, "required", "all") \
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.input(1, "x2", False, "required", "all") \
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.output(0, "y", False, "required", "all") \
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.dtype_format(DataType.I16_Default, DataType.I16_Default, DataType.I16_Default) \
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.dtype_format(DataType.U16_Default, DataType.U16_Default, DataType.U16_Default) \
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.get_op_info()
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@op_info_register(bitwise_or_op_info)
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def _bitwise_or_tbe():
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"""BitwiseOr TBE register"""
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return
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@ -0,0 +1,37 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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"""BitwiseXor op"""
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from mindspore.ops.op_info_register import op_info_register, TBERegOp, DataType
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bitwise_xor_op_info = TBERegOp("BitwiseXor") \
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.fusion_type("OPAQUE") \
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.async_flag(False) \
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.binfile_name("bitwise_xor.so") \
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.compute_cost(10) \
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.kernel_name("bitwise_xor") \
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.partial_flag(True) \
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.input(0, "x1", False, "required", "all") \
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.input(1, "x2", False, "required", "all") \
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.output(0, "y", False, "required", "all") \
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.dtype_format(DataType.I16_Default, DataType.I16_Default, DataType.I16_Default) \
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.dtype_format(DataType.U16_Default, DataType.U16_Default, DataType.U16_Default) \
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.get_op_info()
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@op_info_register(bitwise_xor_op_info)
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def _bitwise_xor_tbe():
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"""BitwiseXor TBE register"""
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return
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@ -39,7 +39,7 @@ from .debug_ops import (ImageSummary, InsertGradientOf, HookBackward, ScalarSumm
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TensorSummary, HistogramSummary, Print)
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TensorSummary, HistogramSummary, Print)
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from .control_ops import ControlDepend, GeSwitch, Merge
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from .control_ops import ControlDepend, GeSwitch, Merge
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from .inner_ops import ScalarCast
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from .inner_ops import ScalarCast
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from .math_ops import (Abs, ACos, AddN, AssignAdd, AssignSub, Atan2, BatchMatMul,
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from .math_ops import (Abs, ACos, AddN, AssignAdd, AssignSub, Atan2, BatchMatMul, BitwiseAnd, BitwiseOr, BitwiseXor,
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ReduceMax, ReduceMin, ReduceMean, ReduceSum, ReduceAll, ReduceProd, CumProd,
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ReduceMax, ReduceMin, ReduceMean, ReduceSum, ReduceAll, ReduceProd, CumProd,
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Cos, Div, Equal, EqualCount, Exp, Erf, Erfc, Floor, FloorDiv, FloorMod, Acosh,
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Cos, Div, Equal, EqualCount, Exp, Erf, Erfc, Floor, FloorDiv, FloorMod, Acosh,
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Greater, GreaterEqual, Less, LessEqual, Log, Log1p, LogicalAnd,
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Greater, GreaterEqual, Less, LessEqual, Log, Log1p, LogicalAnd,
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@ -267,7 +267,10 @@ __all__ = [
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"ApplyCenteredRMSProp",
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"ApplyCenteredRMSProp",
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"SpaceToBatchND",
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"SpaceToBatchND",
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"BatchToSpaceND",
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"BatchToSpaceND",
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"SquareSumAll"
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"SquareSumAll",
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"BitwiseAnd",
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"BitwiseOr",
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"BitwiseXor"
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]
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]
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__all__.extend(_quant_ops.__all__)
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__all__.extend(_quant_ops.__all__)
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@ -71,7 +71,7 @@ class _BinaryOp(PrimitiveWithInfer):
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@prim_attr_register
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@prim_attr_register
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def __init__(self):
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def __init__(self):
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"""init _MathBinaryOp"""
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"""init _BinaryOp"""
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self.init_prim_io_names(inputs=['x', 'y'], outputs=['output'])
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self.init_prim_io_names(inputs=['x', 'y'], outputs=['output'])
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def infer_shape(self, x_shape, y_shape):
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def infer_shape(self, x_shape, y_shape):
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@ -93,6 +93,27 @@ class _MathBinaryOp(_BinaryOp):
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return _MathBinaryOp.do_infer_dtype(x_dtype, y_dtype, mstype.number_type, self.name)
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return _MathBinaryOp.do_infer_dtype(x_dtype, y_dtype, mstype.number_type, self.name)
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class _BitwiseBinaryOp(_MathBinaryOp):
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"""
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Define bitwise binary operators.
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"""
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@prim_attr_register
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def __init__(self):
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"""init _BitwiseBinaryOp"""
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self.init_prim_io_names(inputs=['x1', 'x2'], outputs=['y'])
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@staticmethod
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def _check_bitwise_op_input_type(x1_type, x2_type, prim):
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args = {'x1': x1_type, 'x2': x2_type}
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valid_types = mstype.int_type + mstype.uint_type
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validator.check_tensor_type_same(args, valid_types, prim)
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return x1_type
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def infer_dtype(self, x1_type, x2_type):
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return _BitwiseBinaryOp._check_bitwise_op_input_type(x1_type, x2_type, self.name)
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class TensorAdd(_MathBinaryOp):
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class TensorAdd(_MathBinaryOp):
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"""
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"""
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Adds two input tensors element-wise.
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Adds two input tensors element-wise.
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@ -2183,3 +2204,63 @@ class SquareSumAll(PrimitiveWithInfer):
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validator.check_tensor_type_same({'x1_type': x_type}, [mstype.float16, mstype.float32], self.name)
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validator.check_tensor_type_same({'x1_type': x_type}, [mstype.float16, mstype.float32], self.name)
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validator.check_tensor_type_same({'x2_type': y_type}, [mstype.float16, mstype.float32], self.name)
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validator.check_tensor_type_same({'x2_type': y_type}, [mstype.float16, mstype.float32], self.name)
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return x_type, y_type
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return x_type, y_type
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class BitwiseAnd(_BitwiseBinaryOp):
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"""
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Returns bitwise `and` of two tensors element-wise.
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Inputs:
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- **input_x1** (Tensor) - The input tensor with int or uint type.
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- **input_x2** (Tensor) - The input tensor with same type as the `input_x1`.
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Outputs:
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- **y** (Tensor) - The same type as the `input_x1`.
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Examples:
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>>> input_x1 = Tensor(np.array([0, 0, 1, -1, 1, 1, 1]), mstype.int16)
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>>> input_x2 = Tensor(np.array([0, 1, 1, -1, -1, 2, 3]), mstype.int16)
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>>> bitwise_and = P.BitwiseAnd()
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>>> bitwise_and(input_x1, input_x2)
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[0, 0, 1, -1, 1, 0, 1]
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"""
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class BitwiseOr(_BitwiseBinaryOp):
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"""
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Returns bitwise `or` of two tensors element-wise.
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Inputs:
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- **input_x1** (Tensor) - The input tensor with int or uint type.
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- **input_x2** (Tensor) - The input tensor with same type as the `input_x1`.
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Outputs:
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- **y** (Tensor) - The same type as the `input_x1`.
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Examples:
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>>> input_x1 = Tensor(np.array([0, 0, 1, -1, 1, 1, 1]), mstype.int16)
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>>> input_x2 = Tensor(np.array([0, 1, 1, -1, -1, 2, 3]), mstype.int16)
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>>> bitwise_or = P.BitwiseOr()
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>>> bitwise_or(input_x1, input_x2)
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[0, 1, 1, -1, -1, 3, 3]
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"""
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class BitwiseXor(_BitwiseBinaryOp):
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"""
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Returns bitwise `xor` of two tensors element-wise.
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Inputs:
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- **input_x1** (Tensor) - The input tensor with int or uint type.
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- **input_x2** (Tensor) - The input tensor with same type as the `input_x1`.
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Outputs:
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- **y** (Tensor) - The same type as the `input_x1`.
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Examples:
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>>> input_x1 = Tensor(np.array([0, 0, 1, -1, 1, 1, 1]), mstype.int16)
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>>> input_x2 = Tensor(np.array([0, 1, 1, -1, -1, 2, 3]), mstype.int16)
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>>> bitwise_xor = P.BitwiseXor()
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>>> bitwise_xor(input_x1, input_x2)
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[0, 1, 0, 0, -2, 3, 2]
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"""
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@ -242,6 +242,36 @@ class ApplyRMSNet(nn.Cell):
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return out
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return out
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test_case_math_ops = [
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test_case_math_ops = [
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('BitwiseAnd', {
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'block': P.BitwiseAnd(),
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'desc_inputs': [Tensor(np.array([0, 0, 1, -1, 1, 1, 1]), mstype.int16),
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Tensor(np.array([0, 1, 1, -1, -1, 2, 3]), mstype.int16)],
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'skip': ['backward']}),
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('BitwiseAnd_1', {
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'block': P.BitwiseAnd(),
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'desc_inputs': [Tensor(np.array([[1, 2, 3], [-1, -2, -3]]), mstype.int16),
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Tensor(np.array([1, 1, 1]), mstype.int16)],
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'skip': ['backward']}),
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('BitwiseOr', {
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'block': P.BitwiseOr(),
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'desc_inputs': [Tensor(np.array([0, 0, 1, -1, 1, 1, 1]), mstype.int16),
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Tensor(np.array([0, 1, 1, -1, -1, 2, 3]), mstype.int16)],
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'skip': ['backward']}),
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('BitwiseOr_1', {
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'block': P.BitwiseOr(),
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'desc_inputs': [Tensor(np.array([[1, 2, 3], [-1, -2, -3]]), mstype.int16),
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Tensor(np.array([1, 1, 1]), mstype.int16)],
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'skip': ['backward']}),
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('BitwiseXor', {
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'block': P.BitwiseXor(),
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'desc_inputs': [Tensor(np.array([0, 0, 1, -1, 1, 1, 1]), mstype.int16),
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Tensor(np.array([0, 1, 1, -1, -1, 2, 3]), mstype.int16)],
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'skip': ['backward']}),
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('BitwiseXor_1', {
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'block': P.BitwiseXor(),
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'desc_inputs': [Tensor(np.array([[1, 2, 3], [-1, -2, -3]]), mstype.int16),
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Tensor(np.array([1, 1, 1]), mstype.int16)],
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'skip': ['backward']}),
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('Neg', {
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('Neg', {
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'block': P.Neg(),
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'block': P.Neg(),
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'desc_inputs': [[1, 3, 4, 4]],
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'desc_inputs': [[1, 3, 4, 4]],
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