forked from mindspore-Ecosystem/mindspore
change tensor shape from int to size_t for GPU Argmax
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a15356c779
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d274f425c7
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@ -1,5 +1,5 @@
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/**
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* Copyright 2019 Huawei Technologies Co., Ltd
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -1,5 +1,5 @@
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/**
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* Copyright 2019 Huawei Technologies Co., Ltd
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -14,8 +14,8 @@
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_ARGMAXGPUKERNEL_H_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_ARGMAXGPUKERNEL_H_
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_ARRAYS_ARGMAX_GPU_KERNEL_H_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_ARRAYS_ARGMAX_GPU_KERNEL_H_
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#include <vector>
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#include "backend/kernel_compiler/gpu/gpu_kernel.h"
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@ -60,13 +60,13 @@ class ArgmaxGpuKernel : public GpuKernel {
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}
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auto input_shape = AnfAlgo::GetPrevNodeOutputInferShape(kernel_node, 0);
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if (input_shape.size() > ARGMAX_MAX_DIMENSION) {
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MS_LOG(EXCEPTION) << "Input is " << input_shape.size() << "-D, but argmax supports max " << ARGMAX_MAX_DIMENSION
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MS_LOG(EXCEPTION) << "Input is " << input_shape.size() << "-D, but Argmax supports max " << ARGMAX_MAX_DIMENSION
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<< "-D inputs.";
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}
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axis_ = static_cast<int>(GetAttr<int64_t>(kernel_node, "axis"));
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axis_ = GetAttr<int64_t>(kernel_node, "axis");
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if (axis_ < 0) {
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axis_ += SizeToInt(input_shape.size());
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axis_ += static_cast<int64_t>(input_shape.size());
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}
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if (input_shape.size() == 1) {
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batch_size_ = 0;
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@ -98,9 +98,9 @@ class ArgmaxGpuKernel : public GpuKernel {
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std::vector<size_t> workspace_size_list_;
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size_t batch_size_;
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size_t channel_size_;
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int axis_;
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int64_t axis_;
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};
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} // namespace kernel
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} // namespace mindspore
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_ARGMAXGPUKERNEL_H_
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_ARRAYS_ARGMAX_GPU_KERNEL_H_
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@ -1,5 +1,5 @@
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/**
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* Copyright 2019 Huawei Technologies Co., Ltd
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -18,7 +18,7 @@
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#include "runtime/device/gpu/cuda_common.h"
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#include "include/cuda_fp16.h"
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template <typename T>
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__global__ void Argmax1D(const T* input, const int channel_size, int* output) {
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__global__ void Argmax1D(const T *input, const int channel_size, int *output) {
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int max_index = 0;
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T max = input[0];
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for (int pos = 1; pos < channel_size; pos++) {
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@ -31,7 +31,7 @@ __global__ void Argmax1D(const T* input, const int channel_size, int* output) {
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return;
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}
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template <typename T>
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__global__ void ArgmaxDefault2D(const T* input, const int batch_size, const int channel_size, int* output) {
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__global__ void ArgmaxDefault2D(const T *input, const int batch_size, const int channel_size, int *output) {
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int pos;
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int max_index;
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T max;
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@ -51,7 +51,7 @@ __global__ void ArgmaxDefault2D(const T* input, const int batch_size, const int
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return;
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}
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template <typename T>
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__global__ void ArgmaxAxis2D(const T* input, const int batch_size, const int channel_size, int* output) {
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__global__ void ArgmaxAxis2D(const T *input, const int batch_size, const int channel_size, int *output) {
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int pos;
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int max_index;
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T max;
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@ -70,7 +70,7 @@ __global__ void ArgmaxAxis2D(const T* input, const int batch_size, const int cha
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return;
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}
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template <typename T>
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void CalArgmax(const T* input, const int batch_size, const int channel_size, const int axis, int* output,
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void CalArgmax(const T *input, const int batch_size, const int channel_size, const int64_t axis, int *output,
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cudaStream_t cuda_stream) {
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if (batch_size == 0) {
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Argmax1D<<<1, 1, 0, cuda_stream>>>(input, channel_size, output);
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@ -82,7 +82,7 @@ void CalArgmax(const T* input, const int batch_size, const int channel_size, con
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return;
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}
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template void CalArgmax<float>(const float* input, const int batch_size, const int channel_size, const int axis,
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int* output, cudaStream_t cuda_stream);
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template void CalArgmax<half>(const half* input, const int batch_size, const int channel_size, const int axis,
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int* output, cudaStream_t cuda_stream);
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template void CalArgmax<float>(const float *input, const int batch_size, const int channel_size, const int64_t axis,
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int *output, cudaStream_t cuda_stream);
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template void CalArgmax<half>(const half *input, const int batch_size, const int channel_size, const int64_t axis,
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int *output, cudaStream_t cuda_stream);
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@ -1,5 +1,5 @@
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/**
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* Copyright 2019 Huawei Technologies Co., Ltd
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* Copyright 2020 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -14,10 +14,10 @@
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_ARGMAX_H_
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#define MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_ARGMAX_H_
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_ARGMAX_IMPL_CUH_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_ARGMAX_IMPL_CUH_
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template <typename T>
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void CalArgmax(const T* input, const int batch_size, const int channel_size, const int axis, int* output,
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void CalArgmax(const T *input, const int batch_size, const int channel_size, const int64_t axis, int *output,
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cudaStream_t cuda_stream);
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMP_ARGMAX_H_
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_ARGMAX_IMPL_CUH_
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@ -1,4 +1,4 @@
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# Copyright 2019 Huawei Technologies Co., Ltd
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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