forked from mindspore-Ecosystem/mindspore
!5790 [MS][GPU][CUDA] Dedicated new user facing Pad API kernel
Merge pull request !5790 from danishnxt/GPU_three
This commit is contained in:
commit
98725bc865
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@ -18,6 +18,7 @@
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#include <stdint.h>
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#include "backend/kernel_compiler/gpu/cuda_impl/pad_impl.cuh"
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// For internal OP use, not user facing
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template <typename T>
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__global__ void Pad(const size_t size, const T* input, const int num, const int channels, const int old_height,
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const int old_width, const int padded_height, const int padded_width, const int pad_top,
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@ -37,6 +38,7 @@ __global__ void Pad(const size_t size, const T* input, const int num, const int
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return;
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}
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// For internal OP use, not user facing
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template <typename T>
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__global__ void PadNHWC(const size_t size, const T* input, const int num, const int old_height, const int old_width,
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const int channels, const int padded_height, const int padded_width, const int pad_top,
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@ -57,6 +59,37 @@ __global__ void PadNHWC(const size_t size, const T* input, const int num, const
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return;
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}
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// Used by user facing 'Pad' API
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template <typename T>
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__global__ void PadGeneral(const size_t size, const T *input, const int num, const int channels_orig,
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const int pad_channel_before, const int pad_channel_after, const int old_height,
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const int old_width, const int padded_height, const int padded_width, const int pad_top,
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const int pad_left, float pad_value, T *output) {
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T pad_value_template = static_cast<T>(pad_value);
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for (size_t pos = blockIdx.x * blockDim.x + threadIdx.x; pos < size; pos += blockDim.x * gridDim.x) {
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int block_num = (pos / padded_width) / padded_height; // total blocks = (batch * channels)
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const int padded_w = pos % padded_width; // x coordinate refered to by cur 'pos'
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const int padded_h = (pos / padded_width) % padded_height; // y coordinate refered to by cur 'pos'
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int channels_new = channels_orig + pad_channel_after + pad_channel_before; // new number of channels from padding
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int channel_num = block_num % channels_new; // current channel
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int batch_item = block_num / channels_new; // current item in batch
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int equiv_block_num = 0; // init variable to select equivalent block to copy data from from input
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if (padded_h - pad_top < 0 || padded_w - pad_left < 0 || padded_h - pad_top >= old_height ||
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padded_w - pad_left >= old_width || channel_num <= pad_channel_before - 1 ||
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channel_num > channels_orig + pad_channel_before - 1) {
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output[pos] = pad_value_template;
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} else {
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// on a block/x,y positon that isn't padding, copy data from the correct block/x,y pos the input
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// calculate from number of blocks of padding (due to channel padding) inserted prior
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equiv_block_num = block_num - (batch_item * (pad_channel_before + pad_channel_after)) - pad_channel_before;
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output[pos] = input[(equiv_block_num * old_height + padded_h - pad_top) * old_width + padded_w - pad_left];
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}
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}
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return;
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}
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template <typename T>
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__global__ void PadGradNHWC(const size_t size, const T* dy, const int num, const int old_height, const int old_width,
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const int channels, const int padded_height, const int padded_width, const int pad_top,
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@ -102,6 +135,17 @@ void CalPadNHWC(const size_t size, const T* input, const int num, const int old_
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return;
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}
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template <typename T>
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void CalPadGeneral(const size_t size, const T *input, const int num, const int channels_orig,
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const int pad_channel_before, const int pad_channel_after, const int old_height, const int old_width,
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const int padded_height, const int padded_width, const int pad_top, const int pad_left,
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float pad_value, T *output, cudaStream_t cuda_stream) {
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PadGeneral<<<GET_BLOCKS(size), GET_THREADS, 0, cuda_stream>>>(size, input, num, channels_orig, pad_channel_before,
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pad_channel_after, old_height, old_width, padded_height,
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padded_width, pad_top, pad_left, pad_value, output);
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return;
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}
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template <typename T>
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void CalPadGradNHWC(const size_t size, const T* dy, const int num, const int old_height, const int old_width,
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const int channels, const int padded_height, const int padded_width, const int pad_top,
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@ -152,3 +196,13 @@ template void CalPadGradNHWC<half>(const size_t size, const half* dy, const int
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const int old_width, const int channels, const int padded_height,
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const int padded_width, const int pad_top, const int pad_left, half* dx,
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cudaStream_t cuda_stream);
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template void CalPadGeneral<float>(const size_t size, const float *input, const int num, const int channels_orig,
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const int pad_channel_before, const int pad_channel_after, const int old_height,
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const int old_width, const int padded_height, const int padded_width,
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const int pad_top, const int pad_left, float pad_value, float *output,
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cudaStream_t cuda_stream);
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template void CalPadGeneral<half>(const size_t size, const half *input, const int num, const int channels_orig,
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const int pad_channel_before, const int pad_channel_after, const int old_height,
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const int old_width, const int padded_height, const int padded_width,
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const int pad_top, const int pad_left, float pad_value, half *output,
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cudaStream_t cuda_stream);
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@ -31,9 +31,13 @@ template <typename T>
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void CalPadNHWC(const size_t size, const T* input, const int num, const int old_height, const int old_width,
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const int channels, const int padded_height, const int padded_width, const int pad_top, const int pad_left,
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float pad_value, T* output, cudaStream_t cuda_stream);
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template <typename T>
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void CalPadGradNHWC(const size_t size, const T* input, const int num, const int old_height, const int old_width,
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const int channels, const int padded_height, const int padded_width, const int pad_top,
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const int pad_left, T* output, cudaStream_t cuda_stream);
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template <typename T>
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void CalPadGeneral(const size_t size, const T *input, const int num, const int channels_orig,
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const int pad_channel_before, const int pad_channel_after, const int old_height, const int old_width,
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const int padded_height, const int padded_width, const int pad_top, const int pad_left,
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float pad_value, T *output, cudaStream_t cuda_stream);
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#endif // MINDSPORE_CCSRC_KERNEL_GPU_CUDA_IMPL_PADIMPL_H_
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@ -42,9 +42,12 @@ class PadGpuFwdKernel : public GpuKernel {
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size_t size = output_size_ / sizeof(T);
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int pad_left = paddings[3][0];
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int pad_top = paddings[2][0];
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int pad_channel_before = paddings[1][0];
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int pad_channel_after = paddings[1][1];
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T pad_value = 0.0;
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CalPad(size, input, input_shape_[0], input_shape_[1], input_shape_[2], input_shape_[3], output_shape_[2],
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output_shape_[3], pad_top, pad_left, pad_value, output, reinterpret_cast<cudaStream_t>(stream_ptr));
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CalPadGeneral(size, input, input_shape_[0], input_shape_[1], pad_channel_before, pad_channel_after, input_shape_[2],
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input_shape_[3], output_shape_[2], output_shape_[3], pad_top, pad_left, pad_value, output,
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reinterpret_cast<cudaStream_t>(stream_ptr));
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return true;
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}
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@ -470,6 +470,8 @@ class Pad(Cell):
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for item in paddings:
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if len(item) != 2:
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raise ValueError('The shape of paddings must be (n, 2).')
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if len(paddings) > 4:
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raise ValueError('Only padding up to 4 dims is supported')
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if mode == "CONSTANT":
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self.pad = P.Pad(self.paddings)
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else:
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@ -0,0 +1,204 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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import pytest
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import numpy as np
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import mindspore
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import mindspore.nn as nn
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import mindspore.context as context
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from mindspore import Tensor
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from mindspore.ops.composite import GradOperation
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_pad_basic():
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# confirm array is being padded with 0's
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context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
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test_arr = np.array([[1, 2], [3, 4]]).astype(np.float32)
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test_arr_expected = np.array(
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[[0, 0, 0, 0], [0, 1, 2, 0], [0, 3, 4, 0], [0, 0, 0, 0]]).astype(np.float32)
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x_test = Tensor(test_arr, dtype=mindspore.float32)
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pad_op = nn.Pad(mode='CONSTANT', paddings=((1, 1), (1, 1)))
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y_test = pad_op(x_test).asnumpy()
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np.testing.assert_array_equal(y_test, test_arr_expected)
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_pad_row():
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# Confirm correct row padding
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context.set_context(mode=context.PYNATIVE_MODE, device_target="GPU")
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test_arr_1 = np.random.rand(40, 40).astype(np.float32)
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test_paddings_1 = ((2, 3), (0, 0))
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test_arr_2 = np.random.randn(3, 10, 30, 30).astype(np.float32)
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test_paddings_2 = ((0, 0), (0, 0), (3, 0), (0, 0))
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pad_op_row_1 = nn.Pad(mode='CONSTANT', paddings=test_paddings_1)
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pad_op_row_2 = nn.Pad(mode='CONSTANT', paddings=test_paddings_2)
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x_test_1 = Tensor(np.array(test_arr_1), dtype=mindspore.float32)
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x_test_2 = Tensor(np.array(test_arr_2), dtype=mindspore.float32)
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y_test_1 = pad_op_row_1(x_test_1).asnumpy()
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y_test_2 = pad_op_row_2(x_test_2).asnumpy()
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# check size
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assert y_test_1.shape == (45, 40)
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assert y_test_2.shape == (3, 10, 33, 30)
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# check values - select correct sections
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np.testing.assert_equal(y_test_1[2:-3, :], test_arr_1)
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np.testing.assert_equal(y_test_2[:, :, 3:, :], test_arr_2)
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_pad_column():
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# Confirm correct column padding
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context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
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test_arr_1 = np.random.randn(40, 40).astype(np.float32)
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test_paddings_1 = ((0, 0), (3, 3))
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test_arr_2 = np.random.randn(3, 10, 30, 30).astype(np.float32)
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test_paddings_2 = ((0, 0), (0, 0), (0, 0), (6, 1))
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pad_op_col_1 = nn.Pad(mode='CONSTANT', paddings=test_paddings_1)
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pad_op_col_2 = nn.Pad(mode='CONSTANT', paddings=test_paddings_2)
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x_test_1 = Tensor(np.array(test_arr_1), dtype=mindspore.float32)
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x_test_2 = Tensor(np.array(test_arr_2), dtype=mindspore.float32)
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y_test_1 = pad_op_col_1(x_test_1).asnumpy()
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y_test_2 = pad_op_col_2(x_test_2).asnumpy()
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# check size
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assert y_test_1.shape == (40, 46)
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assert y_test_2.shape == (3, 10, 30, 37)
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# check values - select correct sections - should match
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np.testing.assert_equal(y_test_1[:, 3:-3], test_arr_1)
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np.testing.assert_equal(y_test_2[:, :, :, 6:-1], test_arr_2)
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_pad_3d_pad():
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# Confirm correct 3d padding - row, column, channel
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context.set_context(mode=context.PYNATIVE_MODE, device_target="GPU")
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test_arr = np.random.randn(5, 3, 30, 30).astype(np.float32)
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test_paddings = ((0, 0), (2, 1), (0, 1), (0, 2)) # padding 3 dims now
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pad_op_3d = nn.Pad(mode='CONSTANT', paddings=test_paddings)
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x_test = Tensor(np.array(test_arr), dtype=mindspore.float32)
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y_test = pad_op_3d(x_test).asnumpy()
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assert y_test.shape == (5, 6, 31, 32)
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np.testing.assert_equal(test_arr, y_test[:, 2:-1, :-1, :-2])
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# For testing backprop
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class Grad(nn.Cell):
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def __init__(self, network):
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super(Grad, self).__init__()
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self.grad = GradOperation(get_all=True, sens_param=True)
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self.network = network
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def construct(self, input_, output_grad):
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return self.grad(self.network)(input_, output_grad)
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class Net(nn.Cell):
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def __init__(self):
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super(Net, self).__init__()
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self.pad = nn.Pad(mode="CONSTANT", paddings=(
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(0, 0), (4, 3), (1, 1), (0, 2)))
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def construct(self, x):
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return self.pad(x)
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_pad_3d_backprop():
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# Confirm correct 3d padding backprop
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context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
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test_arr = np.random.randn(5, 3, 30, 30).astype(np.float32)
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x_test = Tensor(test_arr, dtype=mindspore.float32)
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padded_shape = (5, 10, 32, 32)
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dy = np.random.randn(*padded_shape).astype(np.float32)
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expected_dx = dy[:, 4:-3, 1:-1, :-2]
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net = Grad(Net())
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dx = net(x_test, Tensor(dy))
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dx = dx[0].asnumpy()
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np.testing.assert_array_equal(dx, expected_dx)
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@pytest.mark.level0
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_pad_error_cases():
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# Test against common errorneous inputs to catch correctly
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context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
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# TEST 1 - Neg padding values
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test_op = nn.Pad(paddings=((0, 0), (-1, -1)), mode="CONSTANT")
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test_arr = np.random.randn(3, 3)
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test_arr_ms = Tensor(test_arr, dtype=mindspore.float32)
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with pytest.raises(ValueError):
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test_op(test_arr_ms)
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# TEST 2 - Mismatched input size and paddings - 1D tensor
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test_op = nn.Pad(paddings=((0, 0), (1, 0)), mode="CONSTANT")
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test_arr = np.random.randn(3) # 1D Tensor
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test_arr_ms = Tensor(test_arr, dtype=mindspore.float32)
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with pytest.raises(ValueError):
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test_op(test_arr_ms)
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# TEST 3 - Mismatched input size and paddings - 2D tensor, 3D padding
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test_op = nn.Pad(paddings=((0, 0), (1, 0)), mode="CONSTANT") # 2D Padding
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test_arr = np.random.randn(1, 3, 3) # 3D Tensor
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test_arr_ms = Tensor(test_arr, dtype=mindspore.float32)
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with pytest.raises(ValueError):
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test_op(test_arr_ms)
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# TEST 4 - 1D Paddings should not work
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with pytest.raises(TypeError):
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test_op = nn.Pad(paddings=((0, 2)), mode="CONSTANT")
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# TEST 5 - Padding beyond 4d - (added check in nn file in PR)
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with pytest.raises(ValueError):
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_ = nn.Pad(paddings=((0, 0), (0, 0,), (0, 0), (0, 0),
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(1, 0)), mode="CONSTANT") # 2D Padding
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