forked from mindspore-Ecosystem/mindspore
range past segfault addressed comments
changed default max_output_length to 1000000 change docstring fix ci change max_output_length to maxlen
This commit is contained in:
parent
03e655f14a
commit
507cc4ab15
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@ -0,0 +1,54 @@
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <cstdint>
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#include "backend/kernel_compiler/gpu/arrays/dynamic_range_gpu_kernel.h"
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namespace mindspore {
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namespace kernel {
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MS_REG_GPU_KERNEL_ONE(Range,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddInputAttr(kNumberTypeFloat32)
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.AddOutputAttr(kNumberTypeFloat32),
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DynamicRangeGpuKernel, float)
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MS_REG_GPU_KERNEL_ONE(Range,
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KernelAttr()
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.AddInputAttr(kNumberTypeFloat64)
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.AddInputAttr(kNumberTypeFloat64)
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.AddInputAttr(kNumberTypeFloat64)
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.AddOutputAttr(kNumberTypeFloat64),
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DynamicRangeGpuKernel, double)
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MS_REG_GPU_KERNEL_ONE(Range,
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KernelAttr()
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.AddInputAttr(kNumberTypeInt32)
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.AddInputAttr(kNumberTypeInt32)
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.AddInputAttr(kNumberTypeInt32)
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.AddOutputAttr(kNumberTypeInt32),
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DynamicRangeGpuKernel, int32_t)
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MS_REG_GPU_KERNEL_ONE(Range,
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KernelAttr()
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.AddInputAttr(kNumberTypeInt64)
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.AddInputAttr(kNumberTypeInt64)
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.AddInputAttr(kNumberTypeInt64)
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.AddOutputAttr(kNumberTypeInt64),
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DynamicRangeGpuKernel, int64_t)
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} // namespace kernel
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} // namespace mindspore
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@ -0,0 +1,121 @@
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_DYNAMIC_RANGE_GPU_KERNEL_H_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_DYNAMIC_RANGE_GPU_KERNEL_H_
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#include <cuda_runtime.h>
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#include <vector>
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#include "backend/kernel_compiler/gpu/cuda_impl/dynamic_range_impl.cuh"
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#include "backend/kernel_compiler/gpu/gpu_kernel.h"
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#include "backend/kernel_compiler/gpu/gpu_kernel_factory.h"
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namespace mindspore {
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namespace kernel {
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template <typename T>
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class DynamicRangeGpuKernel : public GpuKernel {
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public:
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DynamicRangeGpuKernel() { ResetResource(); }
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~DynamicRangeGpuKernel() = default;
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const std::vector<size_t> &GetInputSizeList() const override { return input_size_list_; }
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const std::vector<size_t> &GetOutputSizeList() const override { return output_size_list_; }
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const std::vector<size_t> &GetWorkspaceSizeList() const override { return workspace_size_list_; }
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bool Launch(const std::vector<AddressPtr> &inputs, const std::vector<AddressPtr> &workspace,
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const std::vector<AddressPtr> &outputs, void *stream_ptr) override {
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T *range_start = GetDeviceAddress<T>(inputs, 0);
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T *range_end = GetDeviceAddress<T>(inputs, 1);
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T *range_delta = GetDeviceAddress<T>(inputs, 2);
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T *output_device_address = GetDeviceAddress<T>(outputs, 0);
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int64_t *output_shape_device_address = GetDeviceAddress<int64_t>(workspace, 0);
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stream_ptr_ = stream_ptr;
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CalRange(range_start, range_end, range_delta, output_device_address, output_shape_device_address,
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max_output_length_, reinterpret_cast<cudaStream_t>(stream_ptr));
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// use workspace[0] for actual output shape, we know it must be 1d
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CHECK_CUDA_RET_WITH_ERROR(c_node_ptr_,
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cudaMemcpyAsync(&output_shape_, output_shape_device_address, sizeof(int64_t),
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cudaMemcpyDeviceToHost, reinterpret_cast<cudaStream_t>(stream_ptr)),
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"Failed to copy gpu memory.");
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CHECK_CUDA_RET_WITH_EXCEPT(c_node_ptr_, cudaDeviceSynchronize(), "cudaDeviceSyncFailed");
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return true;
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}
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void PostExecute() override {
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// required synchronize for PostExecute
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CHECK_CUDA_RET_WITH_EXCEPT(c_node_ptr_, cudaStreamSynchronize(reinterpret_cast<cudaStream_t>(stream_ptr_)),
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"cudaStreamSynchronize failed");
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std::vector<TypeId> output_type = {AnfAlgo::GetOutputInferDataType(c_node_ptr_, 0)};
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std::vector<std::vector<size_t>> output_shape = {{(size_t)output_shape_}};
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AnfAlgo::SetOutputInferTypeAndShape(output_type, output_shape, c_node_ptr_.get());
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}
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void ResetResource() noexcept override {
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stream_ptr_ = nullptr;
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c_node_ptr_ = nullptr;
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output_shape_ = 0;
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max_output_length_ = 0;
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input_size_list_.clear();
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output_size_list_.clear();
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workspace_size_list_.clear();
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}
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bool Init(const CNodePtr &kernel_node) override {
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size_t input_count = AnfAlgo::GetInputTensorNum(kernel_node);
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if (input_count != 3) {
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MS_LOG(ERROR) << input_count << " inputs were provided, but DynamicRangeGpuKernel expects 3.";
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return false;
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}
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max_output_length_ = GetAttr<int64_t>(kernel_node, "maxlen");
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c_node_ptr_ = kernel_node;
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InitSizeLists();
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return true;
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}
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protected:
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void InitSizeLists() override {
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input_size_list_.push_back(sizeof(T));
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input_size_list_.push_back(sizeof(T));
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input_size_list_.push_back(sizeof(T));
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output_size_list_.push_back(max_output_length_ * sizeof(T));
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// this op outputs a 1d tensor, size of one int64_t is enough space to hold the shape.
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workspace_size_list_.push_back(sizeof(int64_t));
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return;
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}
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private:
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void *stream_ptr_;
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CNodePtr c_node_ptr_;
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int64_t output_shape_;
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int64_t max_output_length_;
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std::vector<size_t> input_size_list_;
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std::vector<size_t> output_size_list_;
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std::vector<size_t> workspace_size_list_;
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};
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} // namespace kernel
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} // namespace mindspore
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_DYNAMIC_RANGE_GPU_KERNEL_H_
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@ -0,0 +1,76 @@
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "dynamic_range_impl.cuh"
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#include <cuda_runtime.h>
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#include "runtime/device/gpu/cuda_common.h"
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template <typename T>
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__device__ void CheckInputs(const T &start, const T &end, const T &delta) {
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if (delta == 0) {
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asm("trap;");
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}
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if (start < end && delta < 0) {
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asm("trap;");
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}
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if (start > end && delta > 0) {
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asm("trap;");
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}
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}
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template <typename T>
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__global__ void Range(const T *range_start, const T *range_end, const T *range_delta, T *output,
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int64_t *output_shape, const int64_t max_output_size) {
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T start = range_start[0];
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T end = range_end[0];
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T delta = range_delta[0];
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CheckInputs(start, end, delta);
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int64_t real_output_shape = static_cast<int64_t>(ceil(static_cast<double>(end - start) / delta));
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if (real_output_shape > max_output_size) {
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asm("trap;");
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}
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*output_shape = real_output_shape;
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size_t gt_id = blockIdx.x * blockDim.x + threadIdx.x;
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for (; gt_id < real_output_shape; gt_id += blockDim.x * gridDim.x) {
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output[gt_id] = gt_id * delta + start;
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}
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}
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template <typename T>
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void CalRange(const T *range_start, const T *range_end, const T *range_delta, T *output, int64_t *output_shape,
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const int64_t max_output_size, cudaStream_t cuda_stream) {
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Range<<<GET_BLOCKS(max_output_size), GET_THREADS, 0, cuda_stream>>>(range_start, range_end, range_delta,
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output, output_shape, max_output_size);
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}
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template void CalRange<int>(const int *range_start, const int *range_end, const int *range_delta, int *output,
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int64_t *output_shape, const int64_t max_output_size, cudaStream_t cuda_stream);
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template void CalRange<int64_t>(const int64_t *range_start, const int64_t *range_end, const int64_t *range_delta,
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int64_t *output, int64_t *output_shape, const int64_t max_output_size,
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cudaStream_t cuda_stream);
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template void CalRange<float>(const float *range_start, const float *range_end, const float *range_delta, float *output,
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int64_t *output_shape, const int64_t max_output_size, cudaStream_t cuda_stream);
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template void CalRange<double>(const double *range_start, const double *range_end, const double *range_delta,
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double *output, int64_t *output_shape, const int64_t max_output_size,
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cudaStream_t cuda_stream);
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@ -0,0 +1,26 @@
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_DYNAMIC_RANGE_CUH_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_DYNAMIC_RANGE_CUH_
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#include <cuda_runtime.h>
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template <typename T>
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void CalRange(const T *range_start, const T *range_end, const T *range_delta, T *output, int64_t *output_shape,
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const int64_t max_output_size, cudaStream_t cuda_stream);
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_DYNAMIC_RANGE_CUH_
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@ -1,7 +1,7 @@
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/**
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* This is the C++ adaptation and derivative work of Myia (https://github.com/mila-iqia/myia/).
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*
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* Copyright 2019-2020 Huawei Technologies Co., Ltd
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* Copyright 2019-2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -285,6 +285,8 @@ AbstractBasePtr InferImplSequenceMask(const AnalysisEnginePtr &, const Primitive
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const AbstractBasePtrList &args_spec_list);
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AbstractBasePtr InferImplAddN(const AnalysisEnginePtr &, const PrimitivePtr &primitive,
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const AbstractBasePtrList &args_spec_list);
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AbstractBasePtr InferImplRange(const AnalysisEnginePtr &, const PrimitivePtr &primitive,
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const AbstractBasePtrList &args_spec_list);
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template <typename T>
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AbstractBasePtr InferTupleOrListOrDictLen(const std::string &op_name, const AbstractBasePtrList &args_spec_list) {
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@ -1,5 +1,5 @@
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/**
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* Copyright 2019 Huawei Technologies Co., Ltd
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -168,6 +168,7 @@ AbstractBasePtr InferImplUnique(const AnalysisEnginePtr &, const PrimitivePtr &p
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if (max_shape.empty()) {
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max_shape = shape->shape();
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}
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auto ids =
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std::make_shared<AbstractTensor>(input->element(), std::make_shared<Shape>(ids_shape, min_shape, max_shape));
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// Currently we choose the same data type as input for the idx.
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@ -186,6 +187,7 @@ AbstractBasePtr InferImplUnique(const AnalysisEnginePtr &, const PrimitivePtr &p
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if (idx_max_shape.empty()) {
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idx_max_shape = shape->shape();
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}
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auto ids_idx = std::make_shared<AbstractTensor>(ids_idx_type, idx_shape);
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ids_idx->set_shape(std::make_shared<Shape>(idx_shape, idx_min_shape, idx_max_shape));
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// outputs: ids, ids_idx
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@ -951,5 +953,36 @@ AbstractBasePtr InferImplSequenceMask(const AnalysisEnginePtr &, const Primitive
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ShapePtr output_shape = std::make_shared<Shape>(lengths_shape, lengths_shape_min, lengths_shape_max);
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return std::make_shared<AbstractTensor>(kBool, output_shape);
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}
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AbstractBasePtr InferImplRange(const AnalysisEnginePtr &, const PrimitivePtr &primitive,
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const AbstractBasePtrList &args_spec_list) {
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const std::string &op_name = primitive->name();
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CheckArgsSize(op_name, args_spec_list, 3);
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AbstractTensorPtr range_start = CheckArg<AbstractTensor>(op_name, args_spec_list, 0);
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AbstractTensorPtr range_end = CheckArg<AbstractTensor>(op_name, args_spec_list, 1);
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AbstractTensorPtr range_delta = CheckArg<AbstractTensor>(op_name, args_spec_list, 2);
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TypePtrList supported_types = {kInt64, kInt32, kFloat32, kFloat64};
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TypePtr range_start_type = CheckTensorDType(range_start, supported_types, "range_start input of Range should be %s");
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TypePtr range_end_type = CheckTensorDType(range_end, supported_types, "range_start input of Range should be %s");
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TypePtr range_delta_type = CheckTensorDType(range_delta, supported_types, "range_start input of Range should be %s");
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// check all 3 inputs are same type
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if (!IsIdentidityOrSubclass(range_start_type, range_end_type) ||
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!IsIdentidityOrSubclass(range_end_type, range_delta_type)) {
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MS_LOG(EXCEPTION) << "All inputs must have same type, but got: " << args_spec_list[0]->type_name() << ", "
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<< args_spec_list[1]->type_name() << ", and " << args_spec_list[2]->type_name();
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}
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int64_t max_output_length = -1;
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ValuePtr max_output_length_ptr = primitive->GetAttr("maxlen");
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max_output_length = GetValue<int64_t>(max_output_length_ptr);
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ShapeVector output_shape = {Shape::SHP_ANY};
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ShapeVector min_shape = {1};
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ShapeVector max_shape = {max_output_length};
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ShapePtr shape = std::make_shared<Shape>(output_shape, min_shape, max_shape);
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return std::make_shared<AbstractTensor>(range_start_type, shape);
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}
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} // namespace abstract
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} // namespace mindspore
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@ -1,7 +1,7 @@
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/**
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* This is the C++ adaptation and derivative work of Myia (https://github.com/mila-iqia/myia/).
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*
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* Copyright 2019-2020 Huawei Technologies Co., Ltd
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* Copyright 2019-2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -81,6 +81,7 @@ PrimitiveEvalImplMap &GetPrimitiveToEvalImplMap() {
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{prim::kPrimMapUniform, {InferImplMapUniform, true}},
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{prim::kPrimSplit, {InferImplSplit, true}},
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{prim::kPrimSequenceMask, {InferImplSequenceMask, true}},
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{prim::kPrimRange, {InferImplRange, true}},
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// Structure
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{prim::kPrimMakeTuple, {InferImplMakeTuple, true}},
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{prim::kPrimMakeList, {InferImplMakeList, true}},
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@ -1,5 +1,5 @@
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/**
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* Copyright 2019-2020 Huawei Technologies Co., Ltd
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* Copyright 2019-2021 Huawei Technologies Co., Ltd
|
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*
|
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* Licensed under the Apache License, Version 2.0 (the "License");
|
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* you may not use this file except in compliance with the License.
|
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@ -125,6 +125,7 @@ inline const PrimitivePtr kPrimScatterUpdate = std::make_shared<Primitive>("Scat
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inline const PrimitivePtr kPrimMapUniform = std::make_shared<Primitive>("MapUniform");
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inline const PrimitivePtr kPrimSplit = std::make_shared<Primitive>("Split");
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inline const PrimitivePtr kPrimSequenceMask = std::make_shared<Primitive>("SequenceMask");
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inline const PrimitivePtr kPrimRange = std::make_shared<Primitive>("Range");
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// NN
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inline const PrimitivePtr kPrimFlatten = std::make_shared<Primitive>("Flatten");
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@ -1,4 +1,4 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
|
||||
# Copyright 2021 Huawei Technologies Co., Ltd
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
|
|
@ -33,7 +33,7 @@ from .array_ops import (Argmax, Argmin, Cast, Concat, Pack, Unpack,
|
|||
Transpose, TruncatedNormal, TupleToArray, UnsortedSegmentMin, UnsortedSegmentMax,
|
||||
UnsortedSegmentProd, UnsortedSegmentSum, SpaceToDepth, DepthToSpace, SpaceToBatch, BatchToSpace,
|
||||
SpaceToBatchND, BatchToSpaceND, BroadcastTo, InplaceUpdate, ReverseSequence, EmbeddingLookup,
|
||||
Unique, GatherD, Identity)
|
||||
Unique, GatherD, Identity, Range)
|
||||
from .comm_ops import (AllGather, AllReduce, _AlltoAll, AllSwap, ReduceScatter, Broadcast,
|
||||
_MirrorOperator, ReduceOp, _VirtualDataset,
|
||||
_VirtualDiv, _GetTensorSlice,
|
||||
|
|
@ -402,6 +402,7 @@ __all__ = [
|
|||
"ReLUV2",
|
||||
"SparseToDense",
|
||||
"MatrixInverse",
|
||||
"Range",
|
||||
]
|
||||
|
||||
__all__.sort()
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
# coding: utf-8
|
||||
|
||||
# Copyright 2020 Huawei Technologies Co., Ltd
|
||||
# Copyright 2021 Huawei Technologies Co., Ltd
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
|
|
@ -4722,3 +4722,63 @@ class Identity(PrimitiveWithInfer):
|
|||
'dtype': x['dtype'],
|
||||
'value': None}
|
||||
return out
|
||||
|
||||
|
||||
class Range(PrimitiveWithCheck):
|
||||
r"""
|
||||
Creates a sequence of numbers that begins at `start` and extends by increments of
|
||||
`delta` up to but not including `limit`.
|
||||
|
||||
The types of all 3 inputs must be the same. The type of the resulting tensor is
|
||||
the same as the type of the inputs.
|
||||
|
||||
Args:
|
||||
maxlen (int): Memory that can fit `maxlen` many elements
|
||||
will be allocated for the output. Optional, must be positive, defaults to 1000000.
|
||||
If the output has more than `maxlen` elements, a runtime error
|
||||
will occur.
|
||||
|
||||
Inputs:
|
||||
- **start** (Tensor) - A scalar Tensor. The first number in the sequence. Must have
|
||||
type: int32 or float32
|
||||
- **limit** (Tensor) - A scalar Tensor. Upper limit of the sequence, exclusive. Must
|
||||
have type: int32 or float32
|
||||
- **delta** (Tensor) - A scalar Tensor. Number that increments `start`. Must have
|
||||
type: int32 or float32
|
||||
|
||||
Outputs:
|
||||
A 1-D Tensor, with the same type as the inputs.
|
||||
|
||||
Examples:
|
||||
>>> start = Tensor(0)
|
||||
>>> limit = Tensor(10)
|
||||
>>> delta = Tensor(4)
|
||||
>>> output = ops.Range()(start, limit, delta)
|
||||
>>> print(output)
|
||||
[0, 4, 8]
|
||||
|
||||
Supported Platforms:
|
||||
``Ascend`` ``GPU``
|
||||
"""
|
||||
|
||||
@prim_attr_register
|
||||
def __init__(self, maxlen=1000000):
|
||||
self.init_prim_io_names(inputs=['start', 'limit', 'delta'], outputs=['output'])
|
||||
validator.check_value_type("maxlen", maxlen, [int], self.name)
|
||||
validator.check_positive_int(maxlen, "maxlen", self.name)
|
||||
self.maxlen = maxlen
|
||||
self.add_prim_attr('maxlen', maxlen)
|
||||
|
||||
self.add_prim_attr("dynamic_shape_depends", [0])
|
||||
self.add_prim_attr("dynamic_shape_depends", [1])
|
||||
self.add_prim_attr("dynamic_shape_depends", [2])
|
||||
|
||||
def check_shape(self, start_shape, limit_shape, delta_shape):
|
||||
validator.check("start_shape", len(start_shape), "", 0, Rel.EQ, self.name)
|
||||
validator.check("limit_shape", len(limit_shape), "", 0, Rel.EQ, self.name)
|
||||
validator.check("delta_shape", len(delta_shape), "", 0, Rel.EQ, self.name)
|
||||
|
||||
def check_dtype(self, start_dtype, limit_dtype, delta_dtype):
|
||||
valid_dtypes = [mstype.int32, mstype.float32]
|
||||
inputs = {"start": start_dtype, "limit": limit_dtype, "delta": delta_dtype}
|
||||
validator.check_tensors_dtypes_same_and_valid(inputs, valid_dtypes, self.name)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,93 @@
|
|||
# Copyright 2021 Huawei Technologies Co., Ltd
|
||||
#
|
||||
# Licensed under the Apache License, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# You may obtain a copy of the License at
|
||||
#
|
||||
# http://www.apache.org/licenses/LICENSE-2.0
|
||||
#
|
||||
# Unless required by applicable law or agreed to in writing, software
|
||||
# distributed under the License is distributed on an "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
# See the License for the specific language governing permissions and
|
||||
# limitations under the License.
|
||||
# ============================================================================
|
||||
import numpy as np
|
||||
import pytest
|
||||
|
||||
import mindspore.common.dtype as mstype
|
||||
import mindspore.context as context
|
||||
import mindspore.nn as nn
|
||||
from mindspore import Tensor
|
||||
from mindspore.ops import operations as P
|
||||
|
||||
class RangeNet(nn.Cell):
|
||||
def __init__(self):
|
||||
super(RangeNet, self).__init__()
|
||||
self.range = P.Range()
|
||||
|
||||
def construct(self, s, e, d):
|
||||
return self.range(s, e, d)
|
||||
|
||||
|
||||
@pytest.mark.level0
|
||||
@pytest.mark.platform_x86_gpu_training
|
||||
@pytest.mark.env_onecard
|
||||
def test_range_int():
|
||||
context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
|
||||
|
||||
range_net = RangeNet()
|
||||
ms_out = range_net(Tensor(2, mstype.int32), Tensor(5, mstype.int32), Tensor(1, mstype.int32)).asnumpy()
|
||||
np_expected = np.array([2, 3, 4])
|
||||
np.testing.assert_array_equal(ms_out, np_expected)
|
||||
|
||||
range_net = RangeNet()
|
||||
ms_out = range_net(Tensor(-24, mstype.int32), Tensor(1, mstype.int32), Tensor(4, mstype.int32)).asnumpy()
|
||||
np_expected = np.array([-24, -20, -16, -12, -8, -4, 0])
|
||||
np.testing.assert_array_equal(ms_out, np_expected)
|
||||
|
||||
range_net = RangeNet()
|
||||
ms_out = range_net(Tensor(8, mstype.int32), Tensor(1, mstype.int32), Tensor(-1, mstype.int32)).asnumpy()
|
||||
np_expected = np.array([8, 7, 6, 5, 4, 3, 2])
|
||||
np.testing.assert_array_equal(ms_out, np_expected)
|
||||
|
||||
range_net = RangeNet()
|
||||
ms_out = range_net(Tensor(3, mstype.int32), Tensor(-11, mstype.int32), Tensor(-5, mstype.int32)).asnumpy()
|
||||
np_expected = np.array([3, -2, -7])
|
||||
np.testing.assert_array_equal(ms_out, np_expected)
|
||||
|
||||
@pytest.mark.level0
|
||||
@pytest.mark.platform_x86_gpu_training
|
||||
@pytest.mark.env_onecard
|
||||
def test_range_float():
|
||||
context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
|
||||
|
||||
range_net = RangeNet()
|
||||
ms_out = range_net(Tensor(2.3, mstype.float32), Tensor(5.5, mstype.float32), Tensor(1.2, mstype.float32)).asnumpy()
|
||||
np_expected = np.array([2.3, 3.5, 4.7])
|
||||
np.testing.assert_array_almost_equal(ms_out, np_expected)
|
||||
|
||||
range_net = RangeNet()
|
||||
ms_out = range_net(Tensor(-4, mstype.float32), Tensor(-1, mstype.float32), Tensor(1.5, mstype.float32)).asnumpy()
|
||||
np_expected = np.array([-4.0, -2.5])
|
||||
np.testing.assert_array_almost_equal(ms_out, np_expected)
|
||||
|
||||
range_net = RangeNet()
|
||||
ms_out = range_net(Tensor(8.0, mstype.float32), Tensor(1.0, mstype.float32), Tensor(-1.0, mstype.float32)).asnumpy()
|
||||
np_expected = np.array([8.0, 7.0, 6.0, 5.0, 4.0, 3.0, 2.0])
|
||||
np.testing.assert_array_almost_equal(ms_out, np_expected)
|
||||
|
||||
range_net = RangeNet()
|
||||
ms_out = range_net(Tensor(1.5, mstype.float32), Tensor(-1, mstype.float32), Tensor(-18.9, mstype.float32)).asnumpy()
|
||||
np_expected = np.array([1.5])
|
||||
np.testing.assert_array_almost_equal(ms_out, np_expected)
|
||||
|
||||
@pytest.mark.level0
|
||||
@pytest.mark.platform_x86_gpu_training
|
||||
@pytest.mark.env_onecard
|
||||
def test_range_invalid_max_output_length():
|
||||
with pytest.raises(ValueError):
|
||||
_ = P.Range(0)
|
||||
_ = P.Range(-1)
|
||||
_ = P.Range(None)
|
||||
_ = P.Range('5')
|
||||
Loading…
Reference in New Issue