forked from mindspore-Ecosystem/mindspore
!25356 Add gpu kernel dynamicstitch
Merge pull request !25356 from VectorSL/dynmic_stitch
This commit is contained in:
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "dynamic_stitch_impl.cuh"
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#include "runtime/device/gpu/cuda_common.h"
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__global__ void StitchKernel(const int *index_addr, const unsigned char *data_addr, unsigned char *output_addr,
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const size_t index_num, const size_t data_size, int *max_index_dev) {
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for (size_t i = 0; i < index_num; i++) {
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int index = index_addr[i];
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if (max_index_dev[0] < index) {
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max_index_dev[0] = index;
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}
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for (size_t j = blockIdx.x * blockDim.x + threadIdx.x; j < data_size; j += gridDim.x * blockDim.x) {
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output_addr[index * data_size + j] = data_addr[i * data_size + j];
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}
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}
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}
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void CallStitch(const int *index_addr, const unsigned char *data_addr, unsigned char *output_addr,
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const size_t index_num, const size_t data_size, int *max_index_dev, cudaStream_t cuda_stream) {
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StitchKernel<<<GET_BLOCKS(data_size), GET_THREADS, 0, cuda_stream>>>(index_addr, data_addr, output_addr, index_num,
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data_size, max_index_dev);
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}
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_DYNAMIC_STITCH_CUH_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_DYNAMIC_STITCH_CUH_
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#include <cuda_runtime.h>
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void CallStitch(const int *index_addr, const unsigned char *data_addr, unsigned char *output_addr,
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const size_t index_num, const size_t data_size, int *max_index_dev, cudaStream_t cuda_stream);
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_CUDA_IMPL_DYNAMIC_STITCH_CUH_
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "backend/kernel_compiler/gpu/other/dynamic_stitch_gpu_kernel.h"
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#include <functional>
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#include "backend/kernel_compiler/common_utils.h"
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#include "backend/kernel_compiler/gpu/cuda_impl/dynamic_stitch_impl.cuh"
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#include "runtime/device/gpu/gpu_common.h"
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namespace mindspore {
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namespace kernel {
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DynamicStitchKernel::DynamicStitchKernel()
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: n_(0), real_ele_num_(0), max_index_(0), one_data_ele_num_(0), data_type_size_(0) {
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ResetResource();
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}
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DynamicStitchKernel::~DynamicStitchKernel() {}
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const std::vector<size_t> &DynamicStitchKernel::GetInputSizeList() const { return input_size_list_; }
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const std::vector<size_t> &DynamicStitchKernel::GetOutputSizeList() const { return output_size_list_; }
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const std::vector<size_t> &DynamicStitchKernel::GetWorkspaceSizeList() const { return workspace_size_list_; }
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bool DynamicStitchKernel::Init(const CNodePtr &kernel_node) {
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kernel_node_ = kernel_node;
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// Inputs: (indexlist, datalist)
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size_t input_num = AnfAlgo::GetInputTensorNum(kernel_node);
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n_ = input_num / kDivNum2;
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auto output_shape = AnfAlgo::GetOutputRealDeviceShapeIfExist(kernel_node, 0);
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auto data_type = AnfAlgo::GetInputDeviceDataType(kernel_node, n_);
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// Index type is restricted to int32 by kernel prim.
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size_t index_type_size = sizeof(int);
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data_type_size_ = GetDtypeNbyte(TypeIdToString(data_type, false));
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auto first_data_shape = AnfAlgo::GetInputRealDeviceShapeIfExist(kernel_node, n_);
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one_data_ele_num_ = first_data_shape[first_data_shape.size() - 1];
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for (size_t i = 0; i < n_; i++) {
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auto data_shape = AnfAlgo::GetInputRealDeviceShapeIfExist(kernel_node, n_ + i);
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size_t data_size = std::accumulate(data_shape.begin(), data_shape.end(), 1, std::multiplies<size_t>());
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// Data size
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input_size_list_.push_back(data_size * data_type_size_);
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// Index size
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input_size_list_.insert(input_size_list_.begin() + i, data_size / one_data_ele_num_ * index_type_size);
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}
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size_t output_size =
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std::accumulate(output_shape.begin(), output_shape.end(), data_type_size_, std::multiplies<size_t>());
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// For max_index
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workspace_size_list_.push_back(index_type_size);
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// One output
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output_size_list_.push_back(output_size);
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return true;
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}
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void DynamicStitchKernel::PostExecute() {
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auto output_shape = AnfAlgo::GetOutputRealDeviceShapeIfExist(kernel_node_.lock(), 0);
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output_shape[0] = max_index_ + 1;
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auto data_type = AnfAlgo::GetInputDeviceDataType(kernel_node_.lock(), n_);
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AnfAlgo::SetOutputInferTypeAndShape({data_type}, {output_shape}, kernel_node_.lock().get());
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MS_LOG(DEBUG) << "Run PostExecute for dynamicstitch, real output shape is " << output_shape;
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}
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void DynamicStitchKernel::ResetResource() noexcept {
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input_size_list_.clear();
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output_size_list_.clear();
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workspace_size_list_.clear();
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}
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void DynamicStitchKernel::InitSizeLists() { return; }
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bool DynamicStitchKernel::Launch(const std::vector<AddressPtr> &inputs, const std::vector<AddressPtr> &workspace,
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const std::vector<AddressPtr> &outputs, void *stream) {
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auto cuda_stream = reinterpret_cast<cudaStream_t>(stream);
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auto max_index_dev = GetDeviceAddress<int>(workspace, 0);
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auto output_addr = GetDeviceAddress<unsigned char>(outputs, 0);
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// Init output and max_index with 0
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CHECK_CUDA_RET_WITH_EXCEPT(kernel_node_, cudaMemsetAsync(output_addr, 0, output_size_list_[0], cuda_stream),
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"Init output with cudamemset failed");
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CHECK_CUDA_RET_WITH_EXCEPT(kernel_node_, cudaMemsetAsync(max_index_dev, 0, sizeof(int), cuda_stream),
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"Init max_index_dev with cudamemset failed");
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for (size_t i = 0; i < n_; i++) {
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auto index_addr = GetDeviceAddress<int>(inputs, i);
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auto data_addr = GetDeviceAddress<unsigned char>(inputs, n_ + i);
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size_t index_num = input_size_list_[i] / sizeof(int);
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CallStitch(index_addr, data_addr, output_addr, index_num, one_data_ele_num_ * data_type_size_, max_index_dev,
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cuda_stream);
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}
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int temp = 0;
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CHECK_CUDA_RET_WITH_EXCEPT(kernel_node_,
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cudaMemcpyAsync(&temp, max_index_dev, sizeof(int), cudaMemcpyDeviceToHost, cuda_stream),
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"Copy max_index failed")
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max_index_ = IntToSize(temp);
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return true;
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}
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} // namespace kernel
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} // namespace mindspore
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/**
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* Copyright 2021 Huawei Technologies Co., Ltd
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_OTHER_DYNAMIC_STITCH_GPU_KERNEL_H_
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#define MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_OTHER_DYNAMIC_STITCH_GPU_KERNEL_H_
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#include <memory>
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#include <string>
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#include <vector>
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#include "backend/kernel_compiler/gpu/gpu_kernel.h"
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#include "backend/kernel_compiler/gpu/gpu_kernel_factory.h"
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namespace mindspore {
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namespace kernel {
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class DynamicStitchKernel : public GpuKernel {
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public:
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DynamicStitchKernel();
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~DynamicStitchKernel();
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const std::vector<size_t> &GetInputSizeList() const override;
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const std::vector<size_t> &GetOutputSizeList() const override;
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const std::vector<size_t> &GetWorkspaceSizeList() const override;
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bool Launch(const std::vector<AddressPtr> &inputs, const std::vector<AddressPtr> &workspace,
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const std::vector<AddressPtr> &outputs, void *stream_ptr) override;
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bool Init(const CNodePtr &kernel_node) override;
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void ResetResource() noexcept override;
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void PostExecute() override;
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constexpr static size_t kDivNum2 = 2;
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protected:
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void InitSizeLists() override;
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private:
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size_t n_;
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size_t real_ele_num_;
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size_t max_index_;
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size_t one_data_ele_num_;
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size_t data_type_size_;
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std::vector<size_t> input_size_list_;
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std::vector<size_t> output_size_list_;
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std::vector<size_t> workspace_size_list_;
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};
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MS_REG_GPU_KERNEL(DynamicStitch, DynamicStitchKernel)
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} // namespace kernel
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} // namespace mindspore
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#endif // MINDSPORE_CCSRC_BACKEND_KERNEL_COMPILER_GPU_OTHER_DYNAMIC_STITCH_GPU_KERNEL_H_
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# Copyright 2021 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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import numpy as np
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import pytest
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import mindspore
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import mindspore.context as context
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import mindspore.nn as nn
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from mindspore import Tensor
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from mindspore.ops.operations import _inner_ops as ops
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context.set_context(mode=context.GRAPH_MODE, device_target="GPU")
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class Net(nn.Cell):
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def __init__(self):
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super(Net, self).__init__()
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self.stitch = ops.DynamicStitch()
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def construct(self, indices, data):
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return self.stitch(indices, data)
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@pytest.mark.level1
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@pytest.mark.platform_x86_gpu_training
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@pytest.mark.env_onecard
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def test_net_int32():
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"""
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Feature: ALL TO ALL
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Description: test cases for dynamicstitch.
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Expectation: the result match expected array.
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"""
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x1 = Tensor([6], mindspore.int32)
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x2 = Tensor(np.array([4, 1]), mindspore.int32)
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x3 = Tensor(np.array([[5, 2], [0, 3]]), mindspore.int32)
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y1 = Tensor(np.array([[61, 62]]), mindspore.int32)
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y2 = Tensor(np.array([[41, 42], [11, 12]]), mindspore.int32)
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y3 = Tensor(np.array([[[51, 52], [21, 22]], [[1, 2], [31, 32]]]), mindspore.int32)
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expected = np.array([[1, 2], [11, 12], [21, 22],
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[31, 32], [41, 42], [51, 52], [61, 62]]).astype(np.int32)
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indices = [x1, x2, x3]
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data = [y1, y2, y3]
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net = Net()
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output = net(indices, data)
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assert np.array_equal(output.asnumpy(), expected)
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