forked from mindspore-Ecosystem/mindspore
!1488 add vm ops: Asin, AsinGrad, Asinh, AsinhGrad
Merge pull request !1488 from fangzehua/fzh_edit
This commit is contained in:
commit
39c1966593
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@ -770,6 +770,28 @@ def get_bprop_sin(self):
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return bprop
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@bprop_getters.register(P.Asin)
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def get_bprop_asin(self):
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"""Grad definition for `Asin` operation."""
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input_grad = G.AsinGrad()
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def bprop(x, out, dout):
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dx = input_grad(x, dout)
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return (dx,)
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return bprop
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@bprop_getters.register(P.Asinh)
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def get_bprop_asinh(self):
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"""Grad definition for `Asinh` operation."""
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input_grad = G.AsinhGrad()
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def bprop(x, out, dout):
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dx = input_grad(out, dout)
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return (dx,)
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return bprop
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@bprop_getters.register(P.Cos)
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def get_bprop_cos(self):
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"""Grad definition for `Cos` operation."""
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@ -208,3 +208,7 @@ from .bitwise_xor import bitwise_xor_op_info
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from .reduce_all import _reduce_all_tbe
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from .sparse_apply_adagrad import _sparse_apply_adagrad_tbe
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from .unsorted_segment_min import _unsorted_segment_min_tbe
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from .asin import _asin_tbe
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from .asin_grad import _asin_grad_tbe
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from .asinh import _asinh_tbe
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from .asinh_grad import _asinh_grad_tbe
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@ -0,0 +1,37 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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"""Asin op"""
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from mindspore.ops.op_info_register import op_info_register, TBERegOp, DataType
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asin_op_info = TBERegOp("Asin") \
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.fusion_type("ELEMWISE") \
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.async_flag(False) \
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.binfile_name("asin.so") \
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.compute_cost(10) \
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.kernel_name("asin") \
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.partial_flag(True) \
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.op_pattern("formatAgnostic") \
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.input(0, "x", False, "required", "all") \
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.output(0, "y", False, "required", "all") \
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.dtype_format(DataType.F16_5HD, DataType.F16_5HD) \
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.dtype_format(DataType.F32_5HD, DataType.F32_5HD) \
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.get_op_info()
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@op_info_register(asin_op_info)
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def _asin_tbe():
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"""Asin TBE register"""
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return
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@ -0,0 +1,43 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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"""AsinGrad op"""
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from mindspore.ops.op_info_register import op_info_register, TBERegOp, DataType
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asin_grad_op_info = TBERegOp("AsinGrad") \
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.fusion_type("ELEMWISE") \
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.async_flag(False) \
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.binfile_name("asin_grad.so") \
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.compute_cost(10) \
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.kernel_name("asin_grad") \
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.partial_flag(True) \
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.input(0, "y", None, "required", "all") \
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.input(1, "dy", None, "required", "all") \
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.output(0, "z", False, "required", "all") \
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.dtype_format(DataType.F16_5HD, DataType.F16_5HD, DataType.F16_5HD) \
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.dtype_format(DataType.F16_FracZ, DataType.F16_FracZ, DataType.F16_FracZ) \
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.dtype_format(DataType.F16_C1HWNCoC0, DataType.F16_C1HWNCoC0, DataType.F16_C1HWNCoC0) \
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.dtype_format(DataType.F16_Default, DataType.F16_Default, DataType.F16_Default) \
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.dtype_format(DataType.F32_5HD, DataType.F32_5HD, DataType.F32_5HD) \
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.dtype_format(DataType.F32_FracZ, DataType.F32_FracZ, DataType.F32_FracZ) \
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.dtype_format(DataType.F32_C1HWNCoC0, DataType.F32_C1HWNCoC0, DataType.F32_C1HWNCoC0) \
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.dtype_format(DataType.F32_Default, DataType.F32_Default, DataType.F32_Default) \
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.get_op_info()
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@op_info_register(asin_grad_op_info)
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def _asin_grad_tbe():
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"""AsinGrad TBE register"""
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return
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@ -0,0 +1,37 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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"""Asin op"""
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from mindspore.ops.op_info_register import op_info_register, TBERegOp, DataType
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asinh_op_info = TBERegOp("Asinh") \
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.fusion_type("ELEMWISE") \
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.async_flag(False) \
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.binfile_name("asinh.so") \
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.compute_cost(10) \
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.kernel_name("asinh") \
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.partial_flag(True) \
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.op_pattern("formatAgnostic") \
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.input(0, "x", False, "required", "all") \
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.output(0, "y", False, "required", "all") \
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.dtype_format(DataType.F16_5HD, DataType.F16_5HD) \
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.dtype_format(DataType.F32_5HD, DataType.F32_5HD) \
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.get_op_info()
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@op_info_register(asinh_op_info)
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def _asinh_tbe():
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"""Asinh TBE register"""
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return
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@ -0,0 +1,43 @@
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# Copyright 2020 Huawei Technologies Co., Ltd
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# ============================================================================
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"""AsinhGrad op"""
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from mindspore.ops.op_info_register import op_info_register, TBERegOp, DataType
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asinh_grad_op_info = TBERegOp("AsinhGrad") \
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.fusion_type("ELEMWISE") \
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.async_flag(False) \
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.binfile_name("asinh_grad.so") \
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.compute_cost(10) \
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.kernel_name("asinh_grad") \
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.partial_flag(True) \
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.input(0, "y", False, "required", "all") \
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.input(1, "dy", False, "required", "all") \
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.output(0, "z", False, "required", "all") \
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.dtype_format(DataType.F16_5HD, DataType.F16_5HD, DataType.F16_5HD) \
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.dtype_format(DataType.F16_FracZ, DataType.F16_FracZ, DataType.F16_FracZ) \
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.dtype_format(DataType.F16_C1HWNCoC0, DataType.F16_C1HWNCoC0, DataType.F16_C1HWNCoC0) \
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.dtype_format(DataType.F16_Default, DataType.F16_Default, DataType.F16_Default) \
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.dtype_format(DataType.F32_5HD, DataType.F32_5HD, DataType.F32_5HD) \
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.dtype_format(DataType.F32_FracZ, DataType.F32_FracZ, DataType.F32_FracZ) \
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.dtype_format(DataType.F32_C1HWNCoC0, DataType.F32_C1HWNCoC0, DataType.F32_C1HWNCoC0) \
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.dtype_format(DataType.F32_Default, DataType.F32_Default, DataType.F32_Default) \
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.get_op_info()
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@op_info_register(asinh_grad_op_info)
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def _asinh_grad_tbe():
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"""AsinhGrad TBE register"""
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return
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@ -39,7 +39,8 @@ from .debug_ops import (ImageSummary, InsertGradientOf, HookBackward, ScalarSumm
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TensorSummary, HistogramSummary, Print)
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from .control_ops import ControlDepend, GeSwitch, Merge
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from .inner_ops import ScalarCast
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from .math_ops import (Abs, ACos, AddN, AssignAdd, AssignSub, Atan2, BatchMatMul, BitwiseAnd, BitwiseOr, BitwiseXor,
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from .math_ops import (Abs, ACos, Asin, Asinh, AddN, AssignAdd, AssignSub, Atan2, BatchMatMul, BitwiseAnd, BitwiseOr, BitwiseXor,
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ReduceMax, ReduceMin, ReduceMean, ReduceSum, ReduceAll, ReduceProd, CumProd,
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Cos, Div, Equal, EqualCount, Exp, Erf, Erfc, Floor, FloorDiv, FloorMod, Acosh,
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Greater, GreaterEqual, Less, LessEqual, Log, Log1p, LogicalAnd,
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@ -239,6 +240,7 @@ __all__ = [
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'FloorDiv',
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'FloorMod',
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'Acosh',
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'Asinh',
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"PReLU",
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"Cos",
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"ACos",
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@ -249,6 +251,7 @@ __all__ = [
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'AssignAdd',
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'AssignSub',
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"Sin",
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"Asin",
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"LSTM",
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"Abs",
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"BinaryCrossEntropy",
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@ -76,6 +76,45 @@ class AcoshGrad(PrimitiveWithInfer):
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return x
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class AsinGrad(PrimitiveWithInfer):
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"""
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Computes AsinGrad of input element-wise.
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Returns:
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Tensor, has the same type as input.
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"""
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@prim_attr_register
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def __init__(self):
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"""Init AsinGrad"""
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def infer_shape(self, x, dout):
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validator.check("x shape", x, "dout shape", dout, Rel.EQ, self.name)
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return x
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def infer_dtype(self, x, dout):
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args = {"x": x, "dout": dout}
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validator.check_tensor_type_same(args, mstype.number_type, self.name)
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return x
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class AsinhGrad(PrimitiveWithInfer):
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"""Performs grad of Asinh operation."""
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@prim_attr_register
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def __init__(self):
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"""init AsinhGrad"""
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def infer_shape(self, x, dout):
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validator.check("x shape", x, "dout shape", dout, Rel.EQ, self.name)
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return x
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def infer_dtype(self, x, dout):
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args = {"x": x, "dout": dout}
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validator.check_tensor_type_same(args, mstype.number_type, self.name)
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return x
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class BatchNormGrad(PrimitiveWithInfer):
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"""Performs grad of BatchNorm operation."""
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@ -1336,8 +1336,7 @@ class Acosh(PrimitiveWithInfer):
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Compute inverse hyperbolic cosine of x element-wise.
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Inputs:
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- **input_x** (Tensor) - The shape of tensor is :math:`(x_1, x_2, ..., x_R)`,
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and the data type of 'input_x' is number, the element in 'input_x' should be greater than or equal to 1.
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- **input_x** (Tensor) - The shape of tensor is :math:`(x_1, x_2, ..., x_R)`.
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Outputs:
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Tensor, has the same shape as `input_x`.
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@ -1352,12 +1351,42 @@ class Acosh(PrimitiveWithInfer):
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def __init__(self):
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"""init Acosh"""
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def infer_shape(self, x):
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return x
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def infer_shape(self, x_shape):
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return x_shape
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def infer_dtype(self, x):
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validator.check_tensor_type_same({'x': x}, mstype.number_type, self.name)
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return x
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def infer_dtype(self, x_dtype):
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validator.check_tensor_type_same({'x': x_dtype}, mstype.number_type, self.name)
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return x_dtype
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class Asinh(PrimitiveWithInfer):
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"""
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Compute inverse hyperbolic cosine of x element-wise.
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Inputs:
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- **input_x** (Tensor) - The shape of tensor is :math:`(x_1, x_2, ..., x_R)`.
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Outputs:
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Tensor, has the same shape as `input_x`.
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Examples:
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>>> asinh = P.Asinh()
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>>> input_x = Tensor(np.array([-5.0, 1.5, 3.0, 100.0]), mindspore.float32)
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>>> output = asinh(input_x)
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[-2.3212, 1.1976, 1.8184, 5.2983]
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"""
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@prim_attr_register
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def __init__(self):
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"""init Asinh"""
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def infer_shape(self, x_shape):
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return x_shape
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def infer_dtype(self, x_dtype):
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validator.check_tensor_type_same({'x': x_dtype}, mstype.number_type, self.name)
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return x_dtype
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class _LogicBinaryOp(_BinaryOp):
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@ -1927,12 +1956,12 @@ class Cos(PrimitiveWithInfer):
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def __init__(self):
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"""init Cos"""
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def infer_shape(self, x):
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return x
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def infer_shape(self, x_shape):
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return x_shape
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def infer_dtype(self, x):
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validator.check_tensor_type_same({'x': x}, mstype.number_type, self.name)
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return x
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def infer_dtype(self, x_dtype):
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validator.check_tensor_type_same({'x': x_dtype}, mstype.number_type, self.name)
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return x_dtype
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class ACos(PrimitiveWithInfer):
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@ -1955,12 +1984,12 @@ class ACos(PrimitiveWithInfer):
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def __init__(self):
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"""init ACos"""
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def infer_shape(self, x):
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return x
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def infer_shape(self, x_shape):
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return x_shape
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def infer_dtype(self, x):
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validator.check_tensor_type_same({'x': x}, mstype.number_type, self.name)
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return x
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def infer_dtype(self, x_dtype):
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validator.check_tensor_type_same({'x': x_dtype}, mstype.number_type, self.name)
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return x_dtype
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class Sin(PrimitiveWithInfer):
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@ -1983,12 +2012,41 @@ class Sin(PrimitiveWithInfer):
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def __init__(self):
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"""Init Sin."""
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def infer_shape(self, x):
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return x
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def infer_shape(self, x_shape):
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return x_shape
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def infer_dtype(self, x):
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validator.check_tensor_type_same({'x': x}, mstype.number_type, self.name)
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return x
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def infer_dtype(self, x_dtype):
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validator.check_tensor_type_same({'x': x_dtype}, mstype.number_type, self.name)
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return x_dtype
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class Asin(PrimitiveWithInfer):
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"""
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Computes arccosine of input element-wise.
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Inputs:
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- **input_x** (Tensor) - The shape of tensor is :math:`(x_1, x_2, ..., x_R)`.
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Outputs:
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Tensor, has the same shape as `input_x`.
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Examples:
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>>> asin = P.Asin()
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>>> input_x = Tensor(np.array([0.74, 0.04, 0.30, 0.56]), mindspore.float32)
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>>> output = asin(input_x)
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[0.8331, 0.0400, 0.3047, 0.5944]
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"""
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@prim_attr_register
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def __init__(self):
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"""init Asin"""
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def infer_shape(self, x_shape):
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return x_shape
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def infer_dtype(self, x_dtype):
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validator.check_tensor_type_same({'x': x_dtype}, mstype.number_type, self.name)
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return x_dtype
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class NMSWithMask(PrimitiveWithInfer):
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|
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@ -369,6 +369,14 @@ test_case_math_ops = [
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'block': P.Sin(),
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'desc_inputs': [[2, 3]],
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'desc_bprop': [[2, 3]]}),
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('Asin', {
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'block': P.Asin(),
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'desc_inputs': [[2, 3]],
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'desc_bprop': [[2, 3]]}),
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('Asinh', {
|
||||
'block': P.Asinh(),
|
||||
'desc_inputs': [[3, 4, 5]],
|
||||
'desc_bprop': [[3, 4, 5]]}),
|
||||
('Reciprocal', {
|
||||
'block': P.Reciprocal(),
|
||||
'desc_inputs': [[2, 3, 3, 5]],
|
||||
|
|
Loading…
Reference in New Issue