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rt-thread
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Merge branch 'master' of https://github.com/RT-Thread/rt-thread

This commit is contained in:
Wang-Huachen 2020-11-30 12:48:23 +08:00
parent 9756c77f04 af95348bf1
commit f7b553b193
1481 changed files with 26299 additions and 394594 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.travis.yml
View File

@ -138,6 +138,7 @@ env:
- RTT_BSP='xplorer4330/M4' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='at32/at32f403a-start' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='at32/at32f407-start' RTT_TOOL_CHAIN='sourcery-arm'
- RTT_BSP='smartfusion2' RTT_TOOL_CHAIN='sourcery-arm'
stage: compile
script:

6
bsp/CME_M7/applications/startup.c
View File

@ -47,12 +47,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

2
bsp/allwinner_tina/drivers/spi/drv_spi.c
View File

@ -483,7 +483,7 @@ static rt_err_t configure(struct rt_spi_device *device,
SPI_SetFirstTransmitBit(spi, SPI_TCTRL_FBS_LSB);
}
switch (configuration->mode)
switch (configuration->mode & RT_SPI_MODE_3)
{
case RT_SPI_MODE_0:
SPI_SetSclkMode(spi, SPI_SCLK_Mode0);

2
bsp/avr32uc3b0/startup.c
View File

@ -30,8 +30,6 @@ int main(void)
#endif
rt_hw_board_init();
rt_system_tick_init();
rt_system_object_init();
rt_system_timer_init();
#ifdef RT_USING_HEAP

6
bsp/bf533/startup.c
View File

@ -35,12 +35,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/efm32/startup.c
View File

@ -102,12 +102,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/fh8620/platform/fh8620/iot_cam/startup.c
View File

@ -93,12 +93,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* initialize tick */
rt_system_tick_init();
/* initialize kernel object */
rt_system_object_init();
/* initialize timer system */
rt_system_timer_init();

6
bsp/frdm-k64f/applications/startup.c
View File

@ -65,12 +65,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

5
bsp/gkipc/armv6/rtos_lib.c
View File

@ -1095,14 +1095,9 @@ U32 RTOS_InitKernel(U32 Heap_size)
/* show version */
//rt_show_version();
/* initialize tick */
//rt_system_tick_init();
RTOS_HwTickInit();
//rt_kprintf("set tick\n");
/* initialize kernel object */
rt_system_object_init();
/* initialize timer system */
rt_system_timer_init();

47
bsp/imxrt/imxrt1052-nxp-evk/.config
View File

@ -7,6 +7,7 @@
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
@ -63,7 +64,8 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40001
CONFIG_RT_VER_NUM=0x40003
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
@ -108,6 +110,7 @@ CONFIG_FINSH_ARG_MAX=10
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
@ -115,12 +118,13 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_HWTIMER is not set
CONFIG_RT_USING_CPUTIME=y
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PHY=y
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
@ -128,10 +132,10 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
#
# Using WiFi
#
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
@ -145,6 +149,7 @@ CONFIG_RT_USING_PIN=y
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
@ -155,15 +160,26 @@ CONFIG_RT_USING_LIBC=y
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
CONFIG_RT_USING_NETDEV=y
CONFIG_NETDEV_USING_IFCONFIG=y
CONFIG_NETDEV_USING_PING=y
CONFIG_NETDEV_USING_NETSTAT=y
CONFIG_NETDEV_USING_AUTO_DEFAULT=y
# CONFIG_NETDEV_USING_IPV6 is not set
CONFIG_NETDEV_IPV4=1
CONFIG_NETDEV_IPV6=0
# CONFIG_NETDEV_IPV6_SCOPES is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
# CONFIG_RT_USING_LWIP141 is not set
# CONFIG_RT_USING_LWIP202 is not set
# CONFIG_RT_USING_LWIP212 is not set
#
# AT commands
@ -178,7 +194,6 @@ CONFIG_RT_USING_LIBC=y
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
@ -230,13 +245,12 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
#
# security packages
@ -294,6 +308,7 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
@ -310,7 +325,6 @@ CONFIG_RT_USING_LIBC=y
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
#
# miscellaneous packages
@ -354,10 +368,13 @@ CONFIG_BSP_USING_LPUART=y
CONFIG_BSP_USING_LPUART1=y
# CONFIG_BSP_LPUART1_RX_USING_DMA is not set
# CONFIG_BSP_LPUART1_TX_USING_DMA is not set
# CONFIG_BSP_USING_LPUART3 is not set
#
# Onboard Peripheral Drivers
#
# CONFIG_BSP_USING_SDRAM is not set
# CONFIG_BSP_USING_ETH is not set
#
# Board extended module Drivers

3
bsp/imxrt/imxrt1052-nxp-evk/SConstruct
View File

@ -67,5 +67,8 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, imxrt_library, 'SCons
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
# include peripherals
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'peripherals', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)

28
bsp/imxrt/imxrt1052-nxp-evk/board/Kconfig
View File

@ -96,20 +96,42 @@ menu "Onboard Peripheral Drivers"
menuconfig BSP_USING_ETH
bool "Enable Ethernet"
select PHY_USING_KSZ8081
select RT_USING_NETDEV
default n
if BSP_USING_ETH
config PHY_USING_KSZ8081
bool "i.MX RT1050EVKB uses ksz8081 phy"
config BSP_USING_PHY
select RT_USING_PHY
bool "Enable ethernet phy"
default y
if BSP_USING_PHY
config PHY_DEVICE_ADDRESS
int "Specify address of phy device"
default 2
config PHY_USING_KSZ8081
bool "i.MX RT1064EVK uses ksz8081 phy"
default y
if PHY_USING_KSZ8081
config PHY_RESET_PORT
int "indicate port of reset"
default 1
config PHY_RESET_PIN
int "indicate pin of reset"
default 9
config FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE
bool "Enable the PHY ksz8081 RMII50M mode"
depends on PHY_USING_KSZ8081
default y
endif
endif
endif
endmenu
menu "Board extended module Drivers"

4
bsp/imxrt/imxrt1052-nxp-evk/board/SConscript
View File

@ -12,10 +12,6 @@ MCUX_Config/pin_mux.c
CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports']
CPPDEFINES = ['CPU_MIMXRT1052DVL6B', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1','XIP_EXTERNAL_FLASH=1']
if GetDepend(['PHY_USING_KSZ8081']):
src += Glob('ports/phyksz8081/fsl_phy.c')
CPPPATH += [cwd + '/ports/phyksz8081']
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
Return('group')

315
bsp/imxrt/imxrt1052-nxp-evk/board/ports/phyksz8081/fsl_phy.c
View File

@ -1,315 +0,0 @@
/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include "fsl_phy.h"
#include <rtthread.h>
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief Defines the timeout macro. */
#define PHY_TIMEOUT_COUNT 0x3FFFFFFU
/*******************************************************************************
* Prototypes
******************************************************************************/
/*!
* @brief Get the ENET instance from peripheral base address.
*
* @param base ENET peripheral base address.
* @return ENET instance.
*/
extern uint32_t ENET_GetInstance(ENET_Type *base);
/*******************************************************************************
* Variables
******************************************************************************/
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to enet clocks for each instance. */
extern clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT];
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
/*******************************************************************************
* Code
******************************************************************************/
status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz)
{
uint32_t bssReg;
uint32_t counter = PHY_TIMEOUT_COUNT;
uint32_t idReg = 0;
status_t result = kStatus_Success;
uint32_t instance = ENET_GetInstance(base);
uint32_t timeDelay;
uint32_t ctlReg = 0;
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/* Set SMI first. */
CLOCK_EnableClock(s_enetClock[instance]);
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
ENET_SetSMI(base, srcClock_Hz, false);
/* Initialization after PHY stars to work. */
while ((idReg != PHY_CONTROL_ID1) && (counter != 0))
{
PHY_Read(base, phyAddr, PHY_ID1_REG, &idReg);
counter --;
}
if (!counter)
{
return kStatus_Fail;
}
/* Reset PHY. */
counter = PHY_TIMEOUT_COUNT;
result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK);
if (result == kStatus_Success)
{
#if defined(FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE)
uint32_t data = 0;
result = PHY_Read(base, phyAddr, PHY_CONTROL2_REG, &data);
if ( result != kStatus_Success)
{
return result;
}
result = PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data | PHY_CTL2_REFCLK_SELECT_MASK));
if (result != kStatus_Success)
{
return result;
}
#endif /* FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE */
/* Set the negotiation. */
result = PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG,
(PHY_100BASETX_FULLDUPLEX_MASK | PHY_100BASETX_HALFDUPLEX_MASK |
PHY_10BASETX_FULLDUPLEX_MASK | PHY_10BASETX_HALFDUPLEX_MASK | 0x1U));
if (result == kStatus_Success)
{
result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG,
(PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK));
if (result == kStatus_Success)
{
/* Check auto negotiation complete. */
while (counter --)
{
result = PHY_Read(base, phyAddr, PHY_BASICSTATUS_REG, &bssReg);
if ( result == kStatus_Success)
{
PHY_Read(base, phyAddr, PHY_CONTROL1_REG, &ctlReg);
if (((bssReg & PHY_BSTATUS_AUTONEGCOMP_MASK) != 0) && (ctlReg & PHY_LINK_READY_MASK))
{
/* Wait a moment for Phy status stable. */
for (timeDelay = 0; timeDelay < PHY_TIMEOUT_COUNT; timeDelay ++)
{
__ASM("nop");
}
break;
}
}
if (!counter)
{
return kStatus_PHY_AutoNegotiateFail;
}
}
}
}
}
return result;
}
status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data)
{
uint32_t counter;
/* Clear the SMI interrupt event. */
ENET_ClearInterruptStatus(base, ENET_EIR_MII_MASK);
/* Starts a SMI write command. */
ENET_StartSMIWrite(base, phyAddr, phyReg, kENET_MiiWriteValidFrame, data);
/* Wait for SMI complete. */
for (counter = PHY_TIMEOUT_COUNT; counter > 0; counter--)
{
if (ENET_GetInterruptStatus(base) & ENET_EIR_MII_MASK)
{
break;
}
}
/* Check for timeout. */
if (!counter)
{
return kStatus_PHY_SMIVisitTimeout;
}
/* Clear MII interrupt event. */
ENET_ClearInterruptStatus(base, ENET_EIR_MII_MASK);
return kStatus_Success;
}
status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr)
{
assert(dataPtr);
uint32_t counter;
/* Clear the MII interrupt event. */
ENET_ClearInterruptStatus(base, ENET_EIR_MII_MASK);
/* Starts a SMI read command operation. */
ENET_StartSMIRead(base, phyAddr, phyReg, kENET_MiiReadValidFrame);
/* Wait for MII complete. */
for (counter = PHY_TIMEOUT_COUNT; counter > 0; counter--)
{
if (ENET_GetInterruptStatus(base) & ENET_EIR_MII_MASK)
{
break;
}
}
/* Check for timeout. */
if (!counter)
{
return kStatus_PHY_SMIVisitTimeout;
}
/* Get data from MII register. */
*dataPtr = ENET_ReadSMIData(base);
/* Clear MII interrupt event. */
ENET_ClearInterruptStatus(base, ENET_EIR_MII_MASK);
return kStatus_Success;
}
status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, phy_speed_t speed, bool enable)
{
status_t result;
uint32_t data = 0;
/* Set the loop mode. */
if (enable)
{
if (mode == kPHY_LocalLoop)
{
if (speed == kPHY_Speed100M)
{
data = PHY_BCTL_SPEED_100M_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK;
}
else
{
data = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK;
}
return PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, data);
}
else
{
/* First read the current status in control register. */
result = PHY_Read(base, phyAddr, PHY_CONTROL2_REG, &data);
if (result == kStatus_Success)
{
return PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data | PHY_CTL2_REMOTELOOP_MASK));
}
}
}
else
{
/* Disable the loop mode. */
if (mode == kPHY_LocalLoop)
{
/* First read the current status in control register. */
result = PHY_Read(base, phyAddr, PHY_BASICCONTROL_REG, &data);
if (result == kStatus_Success)
{
data &= ~PHY_BCTL_LOOP_MASK;
return PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (data | PHY_BCTL_RESTART_AUTONEG_MASK));
}
}
else
{
/* First read the current status in control one register. */
result = PHY_Read(base, phyAddr, PHY_CONTROL2_REG, &data);
if (result == kStatus_Success)
{
return PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data & ~PHY_CTL2_REMOTELOOP_MASK));
}
}
}
return result;
}
status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status)
{
assert(status);
status_t result = kStatus_Success;
uint32_t data;
/* Read the basic status register. */
result = PHY_Read(base, phyAddr, PHY_BASICSTATUS_REG, &data);
if (result == kStatus_Success)
{
if (!(PHY_BSTATUS_LINKSTATUS_MASK & data))
{
/* link down. */
*status = false;
}
else
{
/* link up. */
*status = true;
}
}
return result;
}
status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t *duplex)
{
assert(duplex);
status_t result = kStatus_Success;
uint32_t data, ctlReg;
/* Read the control two register. */
result = PHY_Read(base, phyAddr, PHY_CONTROL1_REG, &ctlReg);
if (result == kStatus_Success)
{
data = ctlReg & PHY_CTL1_SPEEDUPLX_MASK;
if ((PHY_CTL1_10FULLDUPLEX_MASK == data) || (PHY_CTL1_100FULLDUPLEX_MASK == data))
{
/* Full duplex. */
*duplex = kPHY_FullDuplex;
}
else
{
/* Half duplex. */
*duplex = kPHY_HalfDuplex;
}
data = ctlReg & PHY_CTL1_SPEEDUPLX_MASK;
if ((PHY_CTL1_100HALFDUPLEX_MASK == data) || (PHY_CTL1_100FULLDUPLEX_MASK == data))
{
/* 100M speed. */
*speed = kPHY_Speed100M;
}
else
{ /* 10M speed. */
*speed = kPHY_Speed10M;
}
}
return result;
}

200
bsp/imxrt/imxrt1052-nxp-evk/board/ports/phyksz8081/fsl_phy.h
View File

@ -1,200 +0,0 @@
/*
* Copyright (c) 2015, Freescale Semiconductor, Inc.
* Copyright 2016-2017 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _FSL_PHY_H_
#define _FSL_PHY_H_
#include "fsl_enet.h"
/*!
* @addtogroup phy_driver
* @{
*/
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief PHY driver version */
#define FSL_PHY_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
/*! @brief Defines the PHY registers. */
#define PHY_BASICCONTROL_REG 0x00U /*!< The PHY basic control register. */
#define PHY_BASICSTATUS_REG 0x01U /*!< The PHY basic status register. */
#define PHY_ID1_REG 0x02U /*!< The PHY ID one register. */
#define PHY_ID2_REG 0x03U /*!< The PHY ID two register. */
#define PHY_AUTONEG_ADVERTISE_REG 0x04U /*!< The PHY auto-negotiate advertise register. */
#define PHY_CONTROL1_REG 0x1EU /*!< The PHY control one register. */
#define PHY_CONTROL2_REG 0x1FU /*!< The PHY control two register. */
#define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
/*! @brief Defines the mask flag in basic control register. */
#define PHY_BCTL_DUPLEX_MASK 0x0100U /*!< The PHY duplex bit mask. */
#define PHY_BCTL_RESTART_AUTONEG_MASK 0x0200U /*!< The PHY restart auto negotiation mask. */
#define PHY_BCTL_AUTONEG_MASK 0x1000U /*!< The PHY auto negotiation bit mask. */
#define PHY_BCTL_SPEED_MASK 0x2000U /*!< The PHY speed bit mask. */
#define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */
#define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */
#define PHY_BCTL_SPEED_100M_MASK 0x2000U /*!< The PHY 100M speed mask. */
/*!@brief Defines the mask flag of operation mode in control two register*/
#define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
#define PHY_CTL2_REFCLK_SELECT_MASK 0x0080U /*!< The PHY RMII reference clock select. */
#define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */
#define PHY_CTL1_100HALFDUPLEX_MASK 0x0002U /*!< The PHY 100M half duplex mask. */
#define PHY_CTL1_10FULLDUPLEX_MASK 0x0005U /*!< The PHY 10M full duplex mask. */
#define PHY_CTL1_100FULLDUPLEX_MASK 0x0006U /*!< The PHY 100M full duplex mask. */
#define PHY_CTL1_SPEEDUPLX_MASK 0x0007U /*!< The PHY speed and duplex mask. */
#define PHY_CTL1_ENERGYDETECT_MASK 0x10U /*!< The PHY signal present on rx differential pair. */
#define PHY_CTL1_LINKUP_MASK 0x100U /*!< The PHY link up. */
#define PHY_LINK_READY_MASK (PHY_CTL1_ENERGYDETECT_MASK | PHY_CTL1_LINKUP_MASK)
/*! @brief Defines the mask flag in basic status register. */
#define PHY_BSTATUS_LINKSTATUS_MASK 0x0004U /*!< The PHY link status mask. */
#define PHY_BSTATUS_AUTONEGABLE_MASK 0x0008U /*!< The PHY auto-negotiation ability mask. */
#define PHY_BSTATUS_AUTONEGCOMP_MASK 0x0020U /*!< The PHY auto-negotiation complete mask. */
/*! @brief Defines the mask flag in PHY auto-negotiation advertise register. */
#define PHY_100BaseT4_ABILITY_MASK 0x200U /*!< The PHY have the T4 ability. */
#define PHY_100BASETX_FULLDUPLEX_MASK 0x100U /*!< The PHY has the 100M full duplex ability.*/
#define PHY_100BASETX_HALFDUPLEX_MASK 0x080U /*!< The PHY has the 100M full duplex ability.*/
#define PHY_10BASETX_FULLDUPLEX_MASK 0x040U /*!< The PHY has the 10M full duplex ability.*/
#define PHY_10BASETX_HALFDUPLEX_MASK 0x020U /*!< The PHY has the 10M full duplex ability.*/
/*! @brief Defines the PHY status. */
enum _phy_status
{
kStatus_PHY_SMIVisitTimeout = MAKE_STATUS(kStatusGroup_PHY, 1), /*!< ENET PHY SMI visit timeout. */
kStatus_PHY_AutoNegotiateFail = MAKE_STATUS(kStatusGroup_PHY, 2) /*!< ENET PHY AutoNegotiate Fail. */
};
/*! @brief Defines the PHY link speed. This is align with the speed for ENET MAC. */
typedef enum _phy_speed
{
kPHY_Speed10M = 0U, /*!< ENET PHY 10M speed. */
kPHY_Speed100M /*!< ENET PHY 100M speed. */
} phy_speed_t;
/*! @brief Defines the PHY link duplex. */
typedef enum _phy_duplex
{
kPHY_HalfDuplex = 0U, /*!< ENET PHY half duplex. */
kPHY_FullDuplex /*!< ENET PHY full duplex. */
} phy_duplex_t;
/*! @brief Defines the PHY loopback mode. */
typedef enum _phy_loop
{
kPHY_LocalLoop = 0U, /*!< ENET PHY local loopback. */
kPHY_RemoteLoop /*!< ENET PHY remote loopback. */
} phy_loop_t;
/*******************************************************************************
* API
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @name PHY Driver
* @{
*/
/*!
* @brief Initializes PHY.
*
* This function initialize the SMI interface and initialize PHY.
* The SMI is the MII management interface between PHY and MAC, which should be
* firstly initialized before any other operation for PHY. The PHY initialize with auto-negotiation.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param srcClock_Hz The module clock frequency - system clock for MII management interface - SMI.
* @retval kStatus_Success PHY initialize success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
* @retval kStatus_PHY_AutoNegotiateFail PHY auto negotiate fail
*/
status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
/*!
* @brief PHY Write function. This function write data over the SMI to
* the specified PHY register. This function is called by all PHY interfaces.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param phyReg The PHY register.
* @param data The data written to the PHY register.
* @retval kStatus_Success PHY write success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
/*!
* @brief PHY Read function. This interface read data over the SMI from the
* specified PHY register. This function is called by all PHY interfaces.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param phyReg The PHY register.
* @param dataPtr The address to store the data read from the PHY register.
* @retval kStatus_Success PHY read success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
/*!
* @brief Enables/disables PHY loopback.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param mode The loopback mode to be enabled, please see "phy_loop_t".
* the two loopback mode should not be both set. when one loopback mode is set
* the other one should be disabled.
* @param speed PHY speed for loopback mode.
* @param enable True to enable, false to disable.
* @retval kStatus_Success PHY loopback success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, phy_speed_t speed, bool enable);
/*!
* @brief Gets the PHY link status.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param status The link up or down status of the PHY.
* - true the link is up.
* - false the link is down.
* @retval kStatus_Success PHY get link status success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
/*!
* @brief Gets the PHY link speed and duplex.
*
* @param base ENET peripheral base address.
* @param phyAddr The PHY address.
* @param speed The address of PHY link speed.
* @param duplex The link duplex of PHY.
* @retval kStatus_Success PHY get link speed and duplex success
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
*/
status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t *duplex);
/* @} */
#if defined(__cplusplus)
}
#endif
/*! @}*/
#endif /* _FSL_PHY_H_ */

20
bsp/imxrt/imxrt1052-nxp-evk/rtconfig.h
View File

@ -40,7 +40,7 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40001
#define RT_VER_NUM 0x40003
/* RT-Thread Components */
@ -78,11 +78,9 @@
#define RT_USING_SERIAL
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_CPUTIME
#define RT_USING_PHY
#define RT_USING_PIN
/* Using WiFi */
/* Using USB */
@ -95,12 +93,19 @@
/* Socket abstraction layer */
/* Network interface device */
#define RT_USING_NETDEV
#define NETDEV_USING_IFCONFIG
#define NETDEV_USING_PING
#define NETDEV_USING_NETSTAT
#define NETDEV_USING_AUTO_DEFAULT
#define NETDEV_IPV4 1
#define NETDEV_IPV6 0
/* light weight TCP/IP stack */
/* Modbus master and slave stack */
/* AT commands */
@ -163,6 +168,7 @@
/* Onboard Peripheral Drivers */
/* Board extended module Drivers */

2
bsp/imxrt/imxrt1064-nxp-evk/README.md
View File

@ -39,7 +39,7 @@
| :----------------- | :----------: | :------------------------------------- |
| USB 转串口 | 支持 | |
| SPI Flash | 支持 | |
| 以太网 | 暂不支持 | |
| 以太网 | 支持 | |
| SD卡 | 暂不支持 | |
| CAN | 暂不支持 | |
| **片上外设** | **支持情况** | **备注** |

3
bsp/imxrt/imxrt1064-nxp-evk/SConstruct
View File

@ -66,5 +66,8 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, imxrt_library, 'SCons
# include drivers
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'drivers', 'SConscript')))
# include peripherals
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'peripherals', 'SConscript')))
# make a building
DoBuilding(TARGET, objs)

2
bsp/imxrt/imxrt1064-nxp-evk/applications/main.c
View File

@ -18,6 +18,7 @@
int main(void)
{
#ifndef PHY_USING_KSZ8081
/* set LED0 pin mode to output */
rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT);
@ -28,6 +29,7 @@ int main(void)
rt_pin_write(LED0_PIN, PIN_LOW);
rt_thread_mdelay(500);
}
#endif
}
void reboot(void)

42
bsp/imxrt/imxrt1064-nxp-evk/board/Kconfig
View File

@ -38,6 +38,48 @@ endmenu
menu "Onboard Peripheral Drivers"
config BSP_USING_SDRAM
bool "Enable SDRAM"
default n
menuconfig BSP_USING_ETH
bool "Enable Ethernet"
select RT_USING_NETDEV
default n
if BSP_USING_ETH
config BSP_USING_PHY
select RT_USING_PHY
bool "Enable ethernet phy"
default y
if BSP_USING_PHY
config PHY_DEVICE_ADDRESS
int "Specify address of phy device"
default 2
config PHY_USING_KSZ8081
bool "i.MX RT1064EVK uses ksz8081 phy"
default y
if PHY_USING_KSZ8081
config PHY_RESET_PORT
int "indicate port of reset"
default 1
config PHY_RESET_PIN
int "indicate pin of reset"
default 9
config FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE
bool "Enable the PHY ksz8081 RMII50M mode"
depends on PHY_USING_KSZ8081
default y
endif
endif
endif
endmenu
menu "Board extended module Drivers"

220
bsp/imxrt/imxrt1064-nxp-evk/board/MCUX_Config/clock_config.c
View File

@ -1,3 +1,10 @@
/*
* Copyright 2018 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*
* How to setup clock using clock driver functions:
*
@ -15,15 +22,15 @@
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v5.0
product: Clocks v4.1
processor: MIMXRT1064xxxxA
package_id: MIMXRT1064DVL6A
mcu_data: ksdk2_0
processor_version: 5.0.1
processor_version: 0.0.0
board: MIMXRT1064-EVK
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
#include "clock_config.h"
#include "fsl_iomuxc.h"
/*******************************************************************************
* Definitions
@ -57,35 +64,23 @@ outputs:
- {id: CLK_1M.outFreq, value: 1 MHz}
- {id: CLK_24M.outFreq, value: 24 MHz}
- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
- {id: ENET1_TX_CLK.outFreq, value: 2.4 MHz}
- {id: ENET2_125M_CLK.outFreq, value: 1.2 MHz}
- {id: ENET2_TX_CLK.outFreq, value: 1.2 MHz}
- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
- {id: FLEXSPI2_CLK_ROOT.outFreq, value: 264 MHz}
- {id: FLEXSPI2_CLK_ROOT.outFreq, value: 2880/11 MHz}
- {id: FLEXSPI_CLK_ROOT.outFreq, value: 2880/11 MHz}
- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5/7 MHz}
- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz}
- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
- {id: PLL7_MAIN_CLK.outFreq, value: 24 MHz}
- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
- {id: TRACE_CLK_ROOT.outFreq, value: 352/3 MHz}
@ -95,10 +90,10 @@ outputs:
settings:
- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
- {id: CCM.FLEXSPI2_PODF.scale, value: '1', locked: true}
- {id: CCM.FLEXSPI2_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
- {id: CCM.FLEXSPI_PODF.scale, value: '1', locked: true}
- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
- {id: CCM.LCDIF_PODF.scale, value: '8', locked: true}
- {id: CCM.LCDIF_PRED.scale, value: '7', locked: true}
- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
- {id: CCM.SEMC_PODF.scale, value: '8'}
@ -107,6 +102,7 @@ settings:
- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
- {id: CCM_ANALOG.PLL2.div, value: '22'}
- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
@ -182,6 +178,77 @@ void BOARD_BootClockRUN(void)
while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
{
}
/* Init ARM PLL. */
CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
* Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
#ifndef SKIP_SYSCLK_INIT
/* Init System PLL. */
CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
/* Init System pfd0. */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
/* Init System pfd1. */
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
/* Init System pfd2. */
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
/* Init System pfd3. */
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
#endif
/* In SDK projects, external flash (configured by FLEXSPI2) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI2 clock source in SDK projects) will be left unchanged.
* Note: If another clock source is selected for FLEXSPI2, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Init Usb1 PLL. */
CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
/* Init Usb1 pfd0. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
/* Init Usb1 pfd1. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
/* Init Usb1 pfd2. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
/* Init Usb1 pfd3. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
/* Disable Usb1 PLL output for USBPHY1. */
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
#endif
/* DeInit Audio PLL. */
CLOCK_DeinitAudioPll();
/* Bypass Audio PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
/* Set divider for Audio PLL. */
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
/* Enable Audio PLL output. */
CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
/* DeInit Video PLL. */
CLOCK_DeinitVideoPll();
/* Bypass Video PLL. */
CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_BYPASS_MASK;
/* Set divider for Video PLL. */
CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(0);
/* Enable Video PLL output. */
CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
/* DeInit Enet PLL. */
CLOCK_DeinitEnetPll();
/* Bypass Enet PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
/* Set Enet output divider. */
CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
/* Enable Enet output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
/* Set Enet2 output divider. */
CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0);
/* Enable Enet2 output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK;
/* Enable Enet25M output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
/* DeInit Usb2 PLL. */
CLOCK_DeinitUsb2Pll();
/* Bypass Usb2 PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllUsb2, 1);
/* Enable Usb2 PLL output. */
CCM_ANALOG->PLL_USB2 |= CCM_ANALOG_PLL_USB2_ENABLE_MASK;
/* Set AHB_PODF. */
CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
/* Disable IPG clock gate. */
@ -193,8 +260,14 @@ void BOARD_BootClockRUN(void)
CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
/* Set ARM_PODF. */
CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
/* Set preperiph clock source. */
CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
/* Set periph clock source. */
CLOCK_SetMux(kCLOCK_PeriphMux, 0);
/* Set PERIPH_CLK2_PODF. */
CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
/* Set periph clock2 clock source. */
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
/* Disable PERCLK clock gate. */
CLOCK_DisableClock(kCLOCK_Gpt1);
CLOCK_DisableClock(kCLOCK_Gpt1S);
@ -203,6 +276,8 @@ void BOARD_BootClockRUN(void)
CLOCK_DisableClock(kCLOCK_Pit);
/* Set PERCLK_PODF. */
CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
/* Set per clock source. */
CLOCK_SetMux(kCLOCK_PerclkMux, 0);
/* Disable USDHC1 clock gate. */
CLOCK_DisableClock(kCLOCK_Usdhc1);
/* Set USDHC1_PODF. */
@ -241,9 +316,9 @@ void BOARD_BootClockRUN(void)
/* Disable Flexspi2 clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi2);
/* Set FLEXSPI2_PODF. */
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 0);
/* Set Flexspi2 clock source. */
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 3);
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
#endif
/* Disable CSI clock gate. */
CLOCK_DisableClock(kCLOCK_Csi);
@ -325,9 +400,9 @@ void BOARD_BootClockRUN(void)
/* Disable LCDIF clock gate. */
CLOCK_DisableClock(kCLOCK_LcdPixel);
/* Set LCDIF_PRED. */
CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 6);
CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);
/* Set LCDIF_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_LcdifDiv, 7);
CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);
/* Set Lcdif pre clock source. */
CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
/* Disable SPDIF clock gate. */
@ -356,85 +431,6 @@ void BOARD_BootClockRUN(void)
CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
/* Set Pll3 sw clock source. */
CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
/* Init ARM PLL. */
CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
* Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
#ifndef SKIP_SYSCLK_INIT
/* Init System PLL. */
CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
/* Init System pfd0. */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
/* Init System pfd1. */
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
/* Init System pfd2. */
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
/* Init System pfd3. */
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
#endif
/* In SDK projects, external flash (configured by FLEXSPI2) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI2 clock source in SDK projects) will be left unchanged.
* Note: If another clock source is selected for FLEXSPI2, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Init Usb1 PLL. */
CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
/* Init Usb1 pfd0. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
/* Init Usb1 pfd1. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
/* Init Usb1 pfd2. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
/* Init Usb1 pfd3. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
/* Disable Usb1 PLL output for USBPHY1. */
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
#endif
/* DeInit Audio PLL. */
CLOCK_DeinitAudioPll();
/* Bypass Audio PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
/* Set divider for Audio PLL. */
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
/* Enable Audio PLL output. */
CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
/* DeInit Video PLL. */
CLOCK_DeinitVideoPll();
/* Bypass Video PLL. */
CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_BYPASS_MASK;
/* Set divider for Video PLL. */
CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(0);
/* Enable Video PLL output. */
CCM_ANALOG->PLL_VIDEO |= CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
/* DeInit Enet PLL. */
CLOCK_DeinitEnetPll();
/* Bypass Enet PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
/* Set Enet output divider. */
CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
/* Enable Enet output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
/* Set Enet2 output divider. */
CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0);
/* Enable Enet2 output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK;
/* Enable Enet25M output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
/* DeInit Usb2 PLL. */
CLOCK_DeinitUsb2Pll();
/* Bypass Usb2 PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllUsb2, 1);
/* Enable Usb2 PLL output. */
CCM_ANALOG->PLL_USB2 |= CCM_ANALOG_PLL_USB2_ENABLE_MASK;
/* Set preperiph clock source. */
CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
/* Set periph clock source. */
CLOCK_SetMux(kCLOCK_PeriphMux, 0);
/* Set periph clock2 clock source. */
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
/* Set per clock source. */
CLOCK_SetMux(kCLOCK_PerclkMux, 0);
/* Set lvds1 clock source. */
CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
/* Set clock out1 divider. */
@ -451,26 +447,6 @@ void BOARD_BootClockRUN(void)
CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
/* Disable clock out2. */
CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
/* Set SAI1 MCLK1 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
/* Set SAI1 MCLK2 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
/* Set SAI1 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
/* Set SAI2 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
/* Set SAI3 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
/* Set MQS configuration. */
IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
/* Set ENET1 Tx clock source. */
IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1RefClkMode, false);
/* Set ENET2 Tx clock source. */
IOMUXC_EnableMode(IOMUXC_GPR, IOMUXC_GPR_GPR1_ENET2_CLK_SEL_MASK, false);
/* Set GPT1 High frequency reference clock source. */
IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
/* Set GPT2 High frequency reference clock source. */
IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
/* Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
}

2
bsp/imxrt/imxrt1064-nxp-evk/board/SConscript
View File

@ -13,7 +13,7 @@ MCUX_Config/pin_mux.c
CPPPATH = [cwd,cwd + '/MCUX_Config',cwd + '/ports']
CPPDEFINES = ['CPU_MIMXRT1064DVL6A', 'STD=C99', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL','XIP_EXTERNAL_FLASH=1', 'XIP_BOOT_HEADER_ENABLE=1']
CPPDEFINES = ['CPU_MIMXRT1064DVL6A', 'SKIP_SYSCLK_INIT', 'EVK_MCIMXRM', 'FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1','XIP_EXTERNAL_FLASH=1', 'XIP_BOOT_HEADER_ENABLE=1', 'XIP_BOOT_HEADER_DCD_ENABLE=1']
if rtconfig.CROSS_TOOL == 'keil':
CPPDEFINES.append('__FPU_PRESENT=1')

355
bsp/imxrt/imxrt1064-nxp-evk/board/board.c
View File

@ -12,6 +12,8 @@
#include <rtthread.h>
#include "board.h"
#include "pin_mux.h"
#include "fsl_iomuxc.h"
#include "fsl_gpio.h"
#ifdef BSP_USING_DMA
#include "fsl_dmamux.h"
@ -109,6 +111,347 @@ void imxrt_dma_init(void)
EDMA_Init(DMA0, &config);
}
#endif
#ifdef BSP_USING_LPUART
void imxrt_uart_pins_init(void)
{
#ifdef BSP_USING_LPUART1
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */
0x10B0u); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: R0/6
Speed Field: medium(100MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Keeper
Pull Up / Down Config. Field: 100K Ohm Pull Down
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
0x10B0u); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: R0/6
Speed Field: medium(100MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Keeper
Pull Up / Down Config. Field: 100K Ohm Pull Down
Hyst. Enable Field: Hysteresis Disabled */
#endif
#ifdef BSP_USING_LPUART2
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
0x10B0u);
#endif
#ifdef BSP_USING_LPUART3
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
0x10B0u);
#endif
#ifdef BSP_USING_LPUART4
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_00_LPUART4_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_01_LPUART4_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_00_LPUART4_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_01_LPUART4_RX,
0x10B0u);
#endif
#ifdef BSP_USING_LPUART5
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_12_LPUART5_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_13_LPUART5_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_12_LPUART5_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_13_LPUART5_RX,
0x10B0u);
#endif
#ifdef BSP_USING_LPUART6
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
0x10B0u);
#endif
#ifdef BSP_USING_LPUART7
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_31_LPUART7_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_32_LPUART7_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_EMC_31_LPUART7_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_EMC_32_LPUART7_RX,
0x10B0u);
#endif
#ifdef BSP_USING_LPUART8
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
0U);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
0x10B0u);
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
0x10B0u);
#endif
}
#endif /* BSP_USING_LPUART */
#ifdef BSP_USING_ETH
void imxrt_enet_pins_init(void)
{
CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 is configured as GPIO1_IO10 */
0U);
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 is configured as ENET_RX_DATA00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 is configured as ENET_RX_DATA01 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 is configured as ENET_RX_EN */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 is configured as ENET_TX_DATA00 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 is configured as ENET_TX_DATA01 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 is configured as ENET_TX_EN */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 is configured as ENET_REF_CLK */
1U); /* Software Input On Field: Force input path of pad GPIO_B1_10 */
IOMUXC_SetPinMux(
IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 is configured as ENET_RX_ER */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 is configured as ENET_MDC */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinMux(
IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 is configured as ENET_MDIO */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 PAD functional properties : */
0xB0A9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: medium(100MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_10_GPIO1_IO10, /* GPIO_AD_B0_10 PAD functional properties : */
0xB0A9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: medium(100MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_04_ENET_RX_DATA00, /* GPIO_B1_04 PAD functional properties : */
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: max(200MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_05_ENET_RX_DATA01, /* GPIO_B1_05 PAD functional properties : */
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: max(200MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_06_ENET_RX_EN, /* GPIO_B1_06 PAD functional properties : */
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: max(200MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_07_ENET_TX_DATA00, /* GPIO_B1_07 PAD functional properties : */
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: max(200MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_08_ENET_TX_DATA01, /* GPIO_B1_08 PAD functional properties : */
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: max(200MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_09_ENET_TX_EN, /* GPIO_B1_09 PAD functional properties : */
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: max(200MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_10_ENET_REF_CLK, /* GPIO_B1_10 PAD functional properties : */
0x31u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/6
Speed Field: low(50MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Disabled
Pull / Keep Select Field: Keeper
Pull Up / Down Config. Field: 100K Ohm Pull Down
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_B1_11_ENET_RX_ER, /* GPIO_B1_11 PAD functional properties : */
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: max(200MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_EMC_40_ENET_MDC, /* GPIO_EMC_40 PAD functional properties : */
0xB0E9u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: max(200MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_EMC_41_ENET_MDIO, /* GPIO_EMC_41 PAD functional properties : */
0xB829u); /* Slew Rate Field: Fast Slew Rate
Drive Strength Field: R0/5
Speed Field: low(50MHz)
Open Drain Enable Field: Open Drain Enabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Pull
Pull Up / Down Config. Field: 100K Ohm Pull Up
Hyst. Enable Field: Hysteresis Disabled */
}
#ifndef BSP_USING_PHY
void imxrt_enet_phy_reset_by_gpio(void)
{
gpio_pin_config_t gpio_config = {kGPIO_DigitalOutput, 0, kGPIO_NoIntmode};
GPIO_PinInit(GPIO1, 9, &gpio_config);
GPIO_PinInit(GPIO1, 10, &gpio_config);
/* pull up the ENET_INT before RESET. */
GPIO_WritePinOutput(GPIO1, 10, 1);
GPIO_WritePinOutput(GPIO1, 9, 0);
rt_thread_delay(100);
GPIO_WritePinOutput(GPIO1, 9, 1);
}
#endif /* BSP_USING_PHY */
#endif /* BSP_USING_ETH */
#ifdef BSP_USING_PHY
void imxrt_phy_pins_init( void )
{
IOMUXC_SetPinMux(
IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_AD_B0_09 is configured as GPIO1_IO09 */
0U); /* Software Input On Field: Input Path is determined by functionality */
IOMUXC_SetPinConfig(
IOMUXC_GPIO_AD_B0_09_GPIO1_IO09, /* GPIO_B0_00 PAD functional properties : */
0x10B0u); /* Slew Rate Field: Slow Slew Rate
Drive Strength Field: R0/6
Speed Field: medium(100MHz)
Open Drain Enable Field: Open Drain Disabled
Pull / Keep Enable Field: Pull/Keeper Enabled
Pull / Keep Select Field: Keeper
Pull Up / Down Config. Field: 100K Ohm Pull Down
Hyst. Enable Field: Hysteresis Disabled */
}
#endif /* BSP_USING_PHY */
/**
* This function will initial rt1050 board.
*/
@ -121,6 +464,18 @@ void rt_hw_board_init()
NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
#ifdef BSP_USING_LPUART
imxrt_uart_pins_init();
#endif
#ifdef BSP_USING_ETH
imxrt_enet_pins_init();
#endif
#ifdef BSP_USING_PHY
imxrt_phy_pins_init();
#endif
#ifdef BSP_USING_DMA
imxrt_dma_init();
#endif

6
bsp/imxrt/imxrt1064-nxp-evk/board/board.h
View File

@ -45,5 +45,11 @@ extern int heap_end;
void rt_hw_board_init(void);
#ifdef BSP_USING_ETH
void imxrt_enet_pins_init(void);
void imxrt_enet_phy_reset_by_gpio(void);
#endif
#endif

4
bsp/imxrt/imxrt1064-nxp-evk/board/linker_scripts/link.sct
View File

@ -66,6 +66,8 @@
#define m_data3_start 0x00000000 ; ITCM 128KB
#define m_data3_size 0x00020000
#define m_ncache_start 0x81E00000
#define m_ncache_size 0x00200000
/* Sizes */
#if (defined(__stack_size__))
@ -124,7 +126,7 @@ LR_IROM1 m_text_start m_text_size
RTT_HEAP +0 EMPTY RTT_HEAP_SIZE{}
; ncache RW data
RW_m_ncache m_data2_start m_data2_size
RW_m_ncache m_ncache_start m_ncache_size
{
* (NonCacheable.init)
* (NonCacheable)

49
bsp/imxrt/imxrt1064-nxp-evk/board/ports/sdram_port.h Normal file
View File

@ -0,0 +1,49 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-05 zylx The first version for STM32F4xx
* 2019-4-25 misonyo port to IMXRT
*/
#ifndef SDRAM_PORT_H__
#define SDRAM_PORT_H__
/* parameters for sdram peripheral */
#define SDRAM_BANK_ADDR ((uint32_t)0x80000000U)
/* region#0/1/2/3: kSEMC_SDRAM_CS0/1/2/3 */
#define SDRAM_REGION kSEMC_SDRAM_CS0
/* CS pin: kSEMC_MUXCSX0/1/2/3 */
#define SDRAM_CS_PIN kSEMC_MUXCSX0
/* size(kbyte):32MB = 32*1024*1KBytes */
#define SDRAM_SIZE ((uint32_t)0x8000)
/* data width: kSEMC_PortSize8Bit,kSEMC_PortSize16Bit */
#define SDRAM_DATA_WIDTH kSEMC_PortSize16Bit
/* column bit numbers: kSEMC_SdramColunm_9/10/11/12bit */
#define SDRAM_COLUMN_BITS kSEMC_SdramColunm_9bit
/* cas latency clock number: kSEMC_LatencyOne/Two/Three */
#define SDRAM_CAS_LATENCY kSEMC_LatencyThree
/* Timing configuration for W9825G6KH */
/* TRP:precharge to active command time (ns) */
#define SDRAM_TRP 18
/* TRCD:active to read/write command delay time (ns) */
#define SDRAM_TRCD 18
/* The time between two refresh commands,Use the maximum of the (Trfc , Txsr).(ns) */
#define SDRAM_REFRESH_RECOVERY 67
/* TWR:write recovery time (ns). */
#define SDRAM_TWR 12
/* TRAS:active to precharge command time (ns). */
#define SDRAM_TRAS 42
/* TRC time (ns). */
#define SDRAM_TRC 60
/* active to active time (ns). */
#define SDRAM_ACT2ACT 60
/* refresh time (ns). 64ms */
#define SDRAM_REFRESH_ROW 64 * 1000000 / 8192
#endif /* SDRAM_PORT_H__ */

6
bsp/imxrt/imxrt1064-nxp-evk/rtconfig.py
View File

@ -48,7 +48,7 @@ if PLATFORM == 'gcc':
DEVICE = ' -mcpu=' + CPU + ' -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -Wall -D__FPU_PRESENT -eentry'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb -D__START=entry'
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds -Xlinker -print-memory-usage'
CPATH = ''
LPATH = ''
@ -57,8 +57,8 @@ if PLATFORM == 'gcc':
AFLAGS += ' -D__STARTUP_CLEAR_BSS'
if BUILD == 'debug':
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -g'
AFLAGS += ' -g'
CFLAGS += ' -O0'
else:
CFLAGS += ' -O2 -Os'

3
bsp/imxrt/libraries/drivers/SConscript
View File

@ -45,6 +45,9 @@ if GetDepend('BSP_USING_LCD'):
if GetDepend('BSP_USING_ETH'):
src += ['drv_eth.c']
if GetDepend('BSP_USING_PHY'):
src += ['drv_mdio.c']
if GetDepend('BSP_USING_USB_DEVICE'):
src += ['drv_usbd.c']
src += Glob('usb/device/*.c')

6
bsp/imxrt/libraries/drivers/drv_can.h
View File

@ -8,9 +8,9 @@
* 2019-06-28 misonyo the first version.
*/
#ifndef DRV_SPI_H__
#define DRV_SPI_H__
#ifndef DRV_CAN_H__
#define DRV_CAN_H__
int rt_hw_can_init(void);
#endif /* DRV_SPI_H__ */
#endif /* DRV_CAN_H__ */

88
bsp/imxrt/libraries/drivers/drv_eth.c
View File

@ -7,6 +7,7 @@
* Date Author Notes
* 2017-10-10 Tanek the first version
* 2019-5-10 misonyo add DMA TX and RX function
* 2020-10-14 wangqiang use phy device in phy monitor thread
*/
#include <rtthread.h>
@ -19,7 +20,6 @@
#include "fsl_enet.h"
#include "fsl_gpio.h"
#include "fsl_phy.h"
#include "fsl_cache.h"
#include "fsl_iomuxc.h"
#include "fsl_common.h"
@ -537,31 +537,47 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
return NULL;
}
#ifdef BSP_USING_PHY
static struct rt_phy_device *phy_dev = RT_NULL;
static void phy_monitor_thread_entry(void *parameter)
{
phy_speed_t speed;
phy_duplex_t duplex;
bool link = false;
rt_uint32_t speed;
rt_uint32_t duplex;
rt_bool_t link = RT_FALSE;
imxrt_enet_phy_reset_by_gpio();
PHY_Init(imxrt_eth_device.enet_base, PHY_ADDRESS, CLOCK_GetFreq(kCLOCK_AhbClk));
phy_dev = (struct rt_phy_device *)rt_device_find("rtt-phy");
if ((RT_NULL == phy_dev) || (RT_NULL == phy_dev->ops))
{
// TODO print warning information
LOG_E("Can not find phy device called \"rtt-phy\"");
return ;
}
if (RT_NULL == phy_dev->ops->init)
{
LOG_E("phy driver error!");
return ;
}
rt_phy_status status = phy_dev->ops->init(imxrt_eth_device.enet_base, PHY_DEVICE_ADDRESS, CLOCK_GetFreq(kCLOCK_AhbClk));
if (PHY_STATUS_OK != status)
{
LOG_E("Phy device initialize unsuccessful!\n");
return ;
}
while (1)
{
bool new_link = false;
status_t status = PHY_GetLinkStatus(imxrt_eth_device.enet_base, PHY_ADDRESS, &new_link);
rt_bool_t new_link = RT_FALSE;
rt_phy_status status = phy_dev->ops->get_link_status(&new_link);
if ((status == kStatus_Success) && (link != new_link))
if ((PHY_STATUS_OK == status) && (link != new_link))
{
link = new_link;
if (link) // link up
{
PHY_GetLinkSpeedDuplex(imxrt_eth_device.enet_base,
PHY_ADDRESS, &speed, &duplex);
phy_dev->ops->get_link_speed_duplex(&speed, &duplex);
if (kPHY_Speed10M == speed)
if (PHY_SPEED_10M == speed)
{
dbg_log(DBG_LOG, "10M\n");
}
@ -570,7 +586,7 @@ static void phy_monitor_thread_entry(void *parameter)
dbg_log(DBG_LOG, "100M\n");
}
if (kPHY_HalfDuplex == duplex)
if (PHY_HALF_DUPLEX == duplex)
{
dbg_log(DBG_LOG, "half dumplex\n");
}
@ -579,8 +595,7 @@ static void phy_monitor_thread_entry(void *parameter)
dbg_log(DBG_LOG, "full dumplex\n");
}
if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed)
|| (imxrt_eth_device.duplex != (enet_mii_duplex_t)duplex))
if ((imxrt_eth_device.speed != (enet_mii_speed_t)speed) || (imxrt_eth_device.duplex != (enet_mii_duplex_t)duplex))
{
imxrt_eth_device.speed = (enet_mii_speed_t)speed;
imxrt_eth_device.duplex = (enet_mii_duplex_t)duplex;
@ -605,6 +620,7 @@ static void phy_monitor_thread_entry(void *parameter)
rt_thread_delay(RT_TICK_PER_SECOND * 2);
}
}
#endif
static int rt_hw_imxrt_eth_init(void)
{
@ -657,6 +673,7 @@ static int rt_hw_imxrt_eth_init(void)
/* start phy monitor */
{
#ifdef BSP_USING_PHY
rt_thread_t tid;
tid = rt_thread_create("phy",
phy_monitor_thread_entry,
@ -666,6 +683,7 @@ static int rt_hw_imxrt_eth_init(void)
2);
if (tid != RT_NULL)
rt_thread_startup(tid);
#endif
}
return state;
@ -673,50 +691,47 @@ static int rt_hw_imxrt_eth_init(void)
INIT_DEVICE_EXPORT(rt_hw_imxrt_eth_init);
#endif
#ifdef RT_USING_FINSH
#if defined(RT_USING_FINSH) && defined(RT_USING_PHY)
#include <finsh.h>
void phy_read(uint32_t phyReg)
void phy_read(rt_uint32_t phy_reg)
{
uint32_t data;
status_t status;
rt_uint32_t data;
status = PHY_Read(imxrt_eth_device.enet_base, PHY_ADDRESS, phyReg, &data);
if (kStatus_Success == status)
rt_phy_status status = phy_dev->ops->read(phy_reg, &data);
if (PHY_STATUS_OK == status)
{
rt_kprintf("PHY_Read: %02X --> %08X", phyReg, data);
rt_kprintf("PHY_Read: %02X --> %08X", phy_reg, data);
}
else
{
rt_kprintf("PHY_Read: %02X --> faild", phyReg);
rt_kprintf("PHY_Read: %02X --> faild", phy_reg);
}
}
void phy_write(uint32_t phyReg, uint32_t data)
void phy_write(rt_uint32_t phy_reg, rt_uint32_t data)
{
status_t status;
status = PHY_Write(imxrt_eth_device.enet_base, PHY_ADDRESS, phyReg, data);
if (kStatus_Success == status)
rt_phy_status status = phy_dev->ops->write(phy_reg, data);
if (PHY_STATUS_OK == status)
{
rt_kprintf("PHY_Write: %02X --> %08X\n", phyReg, data);
rt_kprintf("PHY_Write: %02X --> %08X\n", phy_reg, data);
}
else
{
rt_kprintf("PHY_Write: %02X --> faild\n", phyReg);
rt_kprintf("PHY_Write: %02X --> faild\n", phy_reg);
}
}
void phy_dump(void)
{
uint32_t data;
status_t status;
rt_uint32_t data;
rt_phy_status status;
int i;
for (i = 0; i < 32; i++)
{
status = PHY_Read(imxrt_eth_device.enet_base, PHY_ADDRESS, i, &data);
if (kStatus_Success != status)
status = phy_dev->ops->read(i, &data);
if (PHY_STATUS_OK != status)
{
rt_kprintf("phy_dump: %02X --> faild", i);
break;
@ -730,10 +745,11 @@ void phy_dump(void)
{
rt_kprintf("%02X --> %08X\n", i, data);
}
}
}
#endif
#if defined(RT_USING_FINSH) && defined(RT_USING_LWIP)
void enet_reg_dump(void)
{
ENET_Type *enet_base = imxrt_eth_device.enet_base;

160
bsp/imxrt/libraries/drivers/drv_mdio.c Normal file
View File

@ -0,0 +1,160 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-09-29 WangQiang the first version
*
*/
#include <rtthread.h>
#ifdef BSP_USING_PHY
#define LOG_TAG "drv.mdio"
#include <drv_log.h>
#include <rtdevice.h>
#include "drv_mdio.h"
/*! @brief Defines the timeout macro. */
#define PHY_TIMEOUT_COUNT 0x3FFFFFFU
/*!
* @brief Get the ENET instance from peripheral base address.
*
* @param base ENET peripheral base address.
* @return ENET instance.
*/
extern uint32_t ENET_GetInstance(ENET_Type *base);
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/*! @brief Pointers to enet clocks for each instance. */
extern clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT];
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
static rt_bool_t rt_hw_mdio_init(void *bus, rt_uint32_t src_clock_hz)
{
struct rt_mdio_bus *bus_obj = (struct rt_mdio_bus *)bus;
uint32_t instance = ENET_GetInstance((ENET_Type *)(bus_obj->hw_obj));
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
/* Set SMI first. */
CLOCK_EnableClock(s_enetClock[instance]);
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
ENET_SetSMI((ENET_Type *)(bus_obj->hw_obj), src_clock_hz, RT_FALSE);
return RT_TRUE;
}
static rt_size_t rt_hw_mdio_read(void *bus, rt_uint32_t addr, rt_uint32_t reg, void *data, rt_uint32_t size)
{
RT_ASSERT(data);
struct rt_mdio_bus *bus_obj = (struct rt_mdio_bus *)bus;
rt_uint32_t counter;
rt_uint32_t *data_ptr = (rt_uint32_t *)data;
if (4 != size)
{
return 0;
}
/* Clear the MII interrupt event. */
ENET_ClearInterruptStatus((ENET_Type *)(bus_obj->hw_obj), ENET_EIR_MII_MASK);
/* Starts a SMI read command operation. */
ENET_StartSMIRead((ENET_Type *)(bus_obj->hw_obj), addr, reg, kENET_MiiReadValidFrame);
/* Wait for MII complete. */
for (counter = PHY_TIMEOUT_COUNT; counter > 0; counter--)
{
if (ENET_GetInterruptStatus((ENET_Type *)(bus_obj->hw_obj)) & ENET_EIR_MII_MASK)
{
break;
}
}
/* Check for timeout. */
if (!counter)
{
// return kStatus_PHY_SMIVisitTimeout;
return 0;
}
/* Get data from MII register. */
*data_ptr = ENET_ReadSMIData((ENET_Type *)(bus_obj->hw_obj));
/* Clear MII interrupt event. */
ENET_ClearInterruptStatus((ENET_Type *)bus_obj->hw_obj, ENET_EIR_MII_MASK);
return 4;
}
static rt_size_t rt_hw_mdio_write(void *bus, rt_uint32_t addr, rt_uint32_t reg, void *data, rt_uint32_t size)
{
struct rt_mdio_bus *bus_obj = (struct rt_mdio_bus *)bus;
uint32_t counter;
rt_uint32_t *data_ptr = (rt_uint32_t *)data;
if (4 != size)
{
return 0;
}
/* Clear the SMI interrupt event. */
ENET_ClearInterruptStatus((ENET_Type *)(bus_obj->hw_obj), ENET_EIR_MII_MASK);
/* Starts a SMI write command. */
ENET_StartSMIWrite((ENET_Type *)(bus_obj->hw_obj), addr, reg, kENET_MiiWriteValidFrame, *data_ptr);
/* Wait for SMI complete. */
for (counter = PHY_TIMEOUT_COUNT; counter > 0; counter--)
{
if (ENET_GetInterruptStatus((ENET_Type *)(bus_obj->hw_obj)) & ENET_EIR_MII_MASK)
{
break;
}
}
/* Check for timeout. */
if (!counter)
{
return 0;
}
/* Clear MII interrupt event. */
ENET_ClearInterruptStatus((ENET_Type *)(bus_obj->hw_obj), ENET_EIR_MII_MASK);
return size;
}
static struct rt_mdio_bus_ops imxrt_mdio_ops =
{
.init = rt_hw_mdio_init,
.read = rt_hw_mdio_read,
.write = rt_hw_mdio_write,
.uninit = RT_NULL,
};
static rt_mdio_t mdio_bus;
rt_mdio_t *rt_hw_mdio_register(void *hw_obj, char *name)
{
mdio_bus.hw_obj = hw_obj;
mdio_bus.name = name;
mdio_bus.ops = &imxrt_mdio_ops;
return &mdio_bus;
}
rt_mdio_t *rt_hw_mdio_get(void)
{
return &mdio_bus;
}
#endif

25
bsp/imxrt/libraries/drivers/drv_mdio.h Normal file
View File

@ -0,0 +1,25 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-09-29 WangQiang the first version
*
*/
#ifndef DRV_MDIO_H__
#define DRV_MDIO_H__
#include <rtdevice.h>
#include "fsl_enet.h"
rt_mdio_t *rt_hw_mdio_register(void *hw_obj, char *name);
rt_mdio_t *rt_hw_mdio_get(void);
#endif /*DRV_MDIO_H__*/

16
bsp/imxrt/libraries/peripherals/SConscript Normal file
View File

@ -0,0 +1,16 @@
from building import *
src = []
cwd = []
CPPDEFINES = []
cwd = GetCurrentDir()
if GetDepend('BSP_USING_PHY') and GetDepend('PHY_USING_KSZ8081'):
src += ['phyksz8081.c']
path = [cwd]
group = DefineGroup('Peripherals', src, depend = [''], CPPPATH = path, CPPDEFINES=CPPDEFINES)
Return('group')

369
bsp/imxrt/libraries/peripherals/phyksz8081.c Normal file
View File

@ -0,0 +1,369 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-10-14 wangqiang the first version
*/
#include <rtthread.h>
#ifdef PHY_USING_KSZ8081
#include <rtdevice.h>
#include "drv_gpio.h"
#include "drv_mdio.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief Defines the PHY registers. */
#define PHY_BASICCONTROL_REG 0x00U /*!< The PHY basic control register. */
#define PHY_BASICSTATUS_REG 0x01U /*!< The PHY basic status register. */
#define PHY_ID1_REG 0x02U /*!< The PHY ID one register. */
#define PHY_ID2_REG 0x03U /*!< The PHY ID two register. */
#define PHY_AUTONEG_ADVERTISE_REG 0x04U /*!< The PHY auto-negotiate advertise register. */
#define PHY_CONTROL1_REG 0x1EU /*!< The PHY control one register. */
#define PHY_CONTROL2_REG 0x1FU /*!< The PHY control two register. */
#define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
/*! @brief Defines the mask flag in basic control register. */
#define PHY_BCTL_DUPLEX_MASK 0x0100U /*!< The PHY duplex bit mask. */
#define PHY_BCTL_RESTART_AUTONEG_MASK 0x0200U /*!< The PHY restart auto negotiation mask. */
#define PHY_BCTL_AUTONEG_MASK 0x1000U /*!< The PHY auto negotiation bit mask. */
#define PHY_BCTL_SPEED_MASK 0x2000U /*!< The PHY speed bit mask. */
#define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */
#define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */
#define PHY_BCTL_SPEED_100M_MASK 0x2000U /*!< The PHY 100M speed mask. */
/*!@brief Defines the mask flag of operation mode in control two register*/
#define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
#define PHY_CTL2_REFCLK_SELECT_MASK 0x0080U /*!< The PHY RMII reference clock select. */
#define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */
#define PHY_CTL1_100HALFDUPLEX_MASK 0x0002U /*!< The PHY 100M half duplex mask. */
#define PHY_CTL1_10FULLDUPLEX_MASK 0x0005U /*!< The PHY 10M full duplex mask. */
#define PHY_CTL1_100FULLDUPLEX_MASK 0x0006U /*!< The PHY 100M full duplex mask. */
#define PHY_CTL1_SPEEDUPLX_MASK 0x0007U /*!< The PHY speed and duplex mask. */
#define PHY_CTL1_ENERGYDETECT_MASK 0x10U /*!< The PHY signal present on rx differential pair. */
#define PHY_CTL1_LINKUP_MASK 0x100U /*!< The PHY link up. */
#define PHY_LINK_READY_MASK (PHY_CTL1_ENERGYDETECT_MASK | PHY_CTL1_LINKUP_MASK)
/*! @brief Defines the mask flag in basic status register. */
#define PHY_BSTATUS_LINKSTATUS_MASK 0x0004U /*!< The PHY link status mask. */
#define PHY_BSTATUS_AUTONEGABLE_MASK 0x0008U /*!< The PHY auto-negotiation ability mask. */
#define PHY_BSTATUS_AUTONEGCOMP_MASK 0x0020U /*!< The PHY auto-negotiation complete mask. */
/*! @brief Defines the mask flag in PHY auto-negotiation advertise register. */
#define PHY_100BaseT4_ABILITY_MASK 0x200U /*!< The PHY have the T4 ability. */
#define PHY_100BASETX_FULLDUPLEX_MASK 0x100U /*!< The PHY has the 100M full duplex ability.*/
#define PHY_100BASETX_HALFDUPLEX_MASK 0x080U /*!< The PHY has the 100M full duplex ability.*/
#define PHY_10BASETX_FULLDUPLEX_MASK 0x040U /*!< The PHY has the 10M full duplex ability.*/
#define PHY_10BASETX_HALFDUPLEX_MASK 0x020U /*!< The PHY has the 10M full duplex ability.*/
/*! @brief Defines the timeout macro. */
#define PHY_TIMEOUT_COUNT 0x3FFFFFFU
/* defined the Reset pin, PORT and PIN config by menuconfig */
#define RESET_PIN GET_PIN(PHY_RESET_PORT, PHY_RESET_PIN)
/*******************************************************************************
* Prototypes
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
static struct rt_phy_device phy_ksz8081;
/*******************************************************************************
* Code
******************************************************************************/
static inline rt_bool_t read_reg(rt_mdio_t *bus, rt_uint32_t addr, rt_uint32_t reg_id, rt_uint32_t *value)
{
if (4 != bus->ops->read(bus, addr, reg_id, value, 4))
{
return RT_FALSE;
}
return RT_TRUE;
}
static inline rt_bool_t write_reg(rt_mdio_t *bus, rt_uint32_t addr, rt_uint32_t reg_id, rt_uint32_t value)
{
if (4 != bus->ops->write(bus, addr, reg_id, &value, 4))
{
return RT_FALSE;
}
return RT_TRUE;
}
static rt_phy_status rt_phy_init(void *object, rt_uint32_t phy_addr, rt_uint32_t src_clock_hz)
{
rt_bool_t ret;
rt_phy_status result;
rt_uint32_t counter = PHY_TIMEOUT_COUNT;
rt_uint32_t id_reg = 0;
rt_uint32_t time_delay;
rt_uint32_t bss_reg;
rt_uint32_t ctl_reg = 0;
// reset phy device by gpio
rt_pin_mode(RESET_PIN, PIN_MODE_OUTPUT);
rt_pin_write(RESET_PIN, PIN_LOW);
rt_thread_mdelay(100);
rt_pin_write(RESET_PIN, PIN_HIGH);
rt_mdio_t *mdio_bus = rt_hw_mdio_register(object, "phy_mdio");
if (RT_NULL == mdio_bus)
{
return PHY_STATUS_FAIL;
}
phy_ksz8081.bus = mdio_bus;
phy_ksz8081.addr = phy_addr;
ret = mdio_bus->ops->init(mdio_bus, src_clock_hz);
if ( !ret )
{
return PHY_STATUS_FAIL;
}
/* Initialization after PHY stars to work. */
while ((id_reg != PHY_CONTROL_ID1) && (counter != 0))
{
phy_ksz8081.ops->read(PHY_ID1_REG, &id_reg);
counter--;
}
if (!counter)
{
return PHY_STATUS_FAIL;
}
/* Reset PHY. */
counter = PHY_TIMEOUT_COUNT;
result = phy_ksz8081.ops->write(PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK);
if (PHY_STATUS_OK == result)
{
#if defined(FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE)
rt_uint32_t data = 0;
result = phy_ksz8081.ops->read(PHY_CONTROL2_REG, &data);
if (PHY_STATUS_FAIL == result)
{
return PHY_STATUS_FAIL;
}
result = phy_ksz8081.ops->write(PHY_CONTROL2_REG, (data | PHY_CTL2_REFCLK_SELECT_MASK));
if (PHY_STATUS_FAIL == result)
{
return PHY_STATUS_FAIL;
}
#endif /* FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE */
/* Set the negotiation. */
result = phy_ksz8081.ops->write(PHY_AUTONEG_ADVERTISE_REG,
(PHY_100BASETX_FULLDUPLEX_MASK | PHY_100BASETX_HALFDUPLEX_MASK |
PHY_10BASETX_FULLDUPLEX_MASK | PHY_10BASETX_HALFDUPLEX_MASK | 0x1U));
if (PHY_STATUS_OK == result)
{
result = phy_ksz8081.ops->write(PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK));
if (PHY_STATUS_OK == result)
{
/* Check auto negotiation complete. */
while (counter--)
{
result = phy_ksz8081.ops->read(PHY_BASICSTATUS_REG, &bss_reg);
if (PHY_STATUS_OK == result)
{
phy_ksz8081.ops->read(PHY_CONTROL1_REG, &ctl_reg);
if (((bss_reg & PHY_BSTATUS_AUTONEGCOMP_MASK) != 0) && (ctl_reg & PHY_LINK_READY_MASK))
{
/* Wait a moment for Phy status stable. */
for (time_delay = 0; time_delay < PHY_TIMEOUT_COUNT; time_delay++)
{
__ASM("nop");
}
break;
}
}
if (!counter)
{
return PHY_STATUS_FAIL;
}
}
}
}
}
return PHY_STATUS_OK;
}
static rt_phy_status rt_phy_read(rt_uint32_t reg, rt_uint32_t *data)
{
rt_mdio_t *mdio_bus = phy_ksz8081.bus;
rt_uint32_t device_id = phy_ksz8081.addr;
if (read_reg(mdio_bus, device_id, reg, data))
{
return PHY_STATUS_OK;
}
return PHY_STATUS_FAIL;
}
static rt_phy_status rt_phy_write(rt_uint32_t reg, rt_uint32_t data)
{
rt_mdio_t *mdio_bus = phy_ksz8081.bus;
rt_uint32_t device_id = phy_ksz8081.addr;
if (write_reg(mdio_bus, device_id, reg, data))
{
return PHY_STATUS_OK;
}
return PHY_STATUS_FAIL;
}
static rt_phy_status rt_phy_loopback(rt_uint32_t mode, rt_uint32_t speed, rt_bool_t enable)
{
rt_uint32_t data = 0;
rt_phy_status result;
/* Set the loop mode. */
if (enable)
{
if (PHY_LOCAL_LOOP == mode)
{
if (PHY_SPEED_100M == speed)
{
data = PHY_BCTL_SPEED_100M_MASK | PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK;
}
else
{
data = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK;
}
return phy_ksz8081.ops->write(PHY_BASICCONTROL_REG, data);
}
else
{
/* First read the current status in control register. */
result = phy_ksz8081.ops->read(PHY_CONTROL2_REG, &data);
if (PHY_STATUS_OK == result)
{
return phy_ksz8081.ops->write(PHY_CONTROL2_REG, (data | PHY_CTL2_REMOTELOOP_MASK));
}
}
}
else
{
/* Disable the loop mode. */
if (PHY_LOCAL_LOOP == mode)
{
/* First read the current status in control register. */
result = phy_ksz8081.ops->read(PHY_BASICCONTROL_REG, &data);
if (PHY_STATUS_OK == result)
{
data &= ~PHY_BCTL_LOOP_MASK;
return phy_ksz8081.ops->write(PHY_BASICCONTROL_REG, (data | PHY_BCTL_RESTART_AUTONEG_MASK));
}
}
else
{
/* First read the current status in control one register. */
result = phy_ksz8081.ops->read(PHY_CONTROL2_REG, &data);
if (PHY_STATUS_OK == result)
{
return phy_ksz8081.ops->write(PHY_CONTROL2_REG, (data & ~PHY_CTL2_REMOTELOOP_MASK));
}
}
}
return result;
}
static rt_phy_status get_link_status(rt_bool_t *status)
{
rt_phy_status result;
rt_uint32_t data;
/* Read the basic status register. */
result = phy_ksz8081.ops->read(PHY_BASICSTATUS_REG, &data);
if (PHY_STATUS_OK == result)
{
if (!(PHY_BSTATUS_LINKSTATUS_MASK & data))
{
/* link down. */
*status = RT_FALSE;
}
else
{
/* link up. */
*status = RT_TRUE;
}
}
return result;
}
static rt_phy_status get_link_speed_duplex(rt_uint32_t *speed, rt_uint32_t *duplex)
{
rt_phy_status result = PHY_STATUS_OK;
rt_uint32_t data, ctl_reg;
/* Read the control two register. */
result = phy_ksz8081.ops->read(PHY_CONTROL1_REG, &ctl_reg);
if (PHY_STATUS_OK == result)
{
data = ctl_reg & PHY_CTL1_SPEEDUPLX_MASK;
if ((PHY_CTL1_10FULLDUPLEX_MASK == data) || (PHY_CTL1_100FULLDUPLEX_MASK == data))
{
/* Full duplex. */
*duplex = PHY_FULL_DUPLEX;
}
else
{
/* Half duplex. */
*duplex = PHY_HALF_DUPLEX;
}
data = ctl_reg & PHY_CTL1_SPEEDUPLX_MASK;
if ((PHY_CTL1_100HALFDUPLEX_MASK == data) || (PHY_CTL1_100FULLDUPLEX_MASK == data))
{
/* 100M speed. */
*speed = PHY_SPEED_100M;
}
else
{ /* 10M speed. */
*speed = PHY_SPEED_10M;
}
}
return result;
}
static struct rt_phy_ops phy_ops =
{
.init = rt_phy_init,
.read = rt_phy_read,
.write = rt_phy_write,
.loopback = rt_phy_loopback,
.get_link_status = get_link_status,
.get_link_speed_duplex = get_link_speed_duplex,
};
static int rt_phy_ksz8081_register( void )
{
phy_ksz8081.ops = &phy_ops;
rt_hw_phy_register(&phy_ksz8081, "rtt-phy");
return 1;
}
INIT_DEVICE_EXPORT(rt_phy_ksz8081_register);
#endif /* PHY_USING_KSZ8081 */

3
bsp/imxrt/tools/sdk_dist.py
View File

@ -21,3 +21,6 @@ def dist_do_building(BSP_ROOT, dist_dir=None):
print("=> copy bsp drivers")
bsp_copy_files(os.path.join(library_path, 'drivers'), os.path.join(library_dir, 'drivers'))
shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig'))
print("=> copy bsp peripherals")
bsp_copy_files(os.path.join(library_path, 'peripherals'), os.path.join(library_dir, 'peripherals'))

29
bsp/k210/.config
View File

@ -70,6 +70,8 @@ CONFIG_RT_VER_NUM=0x40003
CONFIG_ARCH_CPU_64BIT=y
# CONFIG_RT_USING_CPU_FFS is not set
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_RISCV_FPU=y
CONFIG_ARCH_RISCV_FPU_S=y
CONFIG_ARCH_RISCV64=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@ -150,8 +152,10 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
@ -192,6 +196,7 @@ CONFIG_RT_USING_LIBC=y
CONFIG_RT_USING_POSIX=y
# CONFIG_RT_USING_POSIX_MMAP is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_GETLINE is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_MODULE is not set
@ -262,7 +267,9 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
@ -308,7 +315,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
@ -330,6 +337,9 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
#
# security packages
@ -338,6 +348,7 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
@ -372,7 +383,9 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
#
# system packages
@ -396,6 +409,10 @@ CONFIG_ULOG_BACKEND_USING_CONSOLE=y
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
#
# peripheral libraries and drivers
@ -441,6 +458,7 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
@ -450,6 +468,12 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_NUCLEI_SDK is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
#
# miscellaneous packages
@ -486,6 +510,9 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
CONFIG_BOARD_K210_EVB=y
CONFIG_BSP_USING_UART_HS=y

1
bsp/k210/Kconfig
View File

@ -21,6 +21,7 @@ source "$PKGS_DIR/Kconfig"
config BOARD_K210_EVB
bool
select ARCH_RISCV64
select ARCH_RISCV_FPU_S
select PKG_USING_KENDRYTE_SDK
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN

2
bsp/k210/driver/drv_gpio.c
View File

@ -258,7 +258,7 @@ const static struct rt_pin_ops drv_pin_ops =
int rt_hw_pin_init(void)
{
rt_err_t ret = RT_EOK;
memset(pin_alloc_table, 0, sizeof pin_alloc_table);
memset(pin_alloc_table, -1, sizeof pin_alloc_table);
free_pin = GPIO_ALLOC_START;
ret = rt_device_pin_register("pin", &drv_pin_ops, RT_NULL);

2
bsp/k210/rtconfig.h
View File

@ -48,6 +48,8 @@
#define RT_VER_NUM 0x40003
#define ARCH_CPU_64BIT
#define ARCH_RISCV
#define ARCH_RISCV_FPU
#define ARCH_RISCV_FPU_S
#define ARCH_RISCV64
/* RT-Thread Components */

2
bsp/k210/rtconfig.py
View File

@ -38,7 +38,7 @@ if PLATFORM == 'gcc':
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64d'
DEVICE = ' -mcmodel=medany -march=rv64imafc -mabi=lp64f -fsingle-precision-constant'
CFLAGS = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp'
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'

6
bsp/lm3s8962/applications/startup.c
View File

@ -77,12 +77,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/lm3s9b9x/applications/startup.c
View File

@ -77,12 +77,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/lm4f232/applications/startup.c
View File

@ -77,12 +77,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/lpc2148/applications/startup.c
View File

@ -52,12 +52,6 @@ void rtthread_startup(void)
/* init board */
rt_hw_board_init();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
rt_show_version();
/* init timer system */

6
bsp/lpc2478/applications/startup.c
View File

@ -38,12 +38,6 @@ void rtthread_startup(void)
/* init board */
rt_hw_board_init();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
rt_show_version();
/* init timer system */

5
bsp/lpc43xx/M0/applications/vbus_hw.h
View File

@ -7,6 +7,9 @@
* 2015-01-07 Grissiom init commit
*/
#ifndef __VBUS_HW_H__
#define __VBUS_HW_H__
#include <rtthread.h>
#include <board.h>
@ -32,3 +35,5 @@ rt_inline void rt_vbus_smp_mb(void)
{
__DSB();
}
#endif /* __VBUS_HW_H__ */

5
bsp/lpc43xx/M4/applications/vbus_hw.h
View File

@ -7,6 +7,9 @@
* 2015-01-07 Grissiom init commit
*/
#ifndef __VBUS_HW_H__
#define __VBUS_HW_H__
#include <rtthread.h>
#include <board.h>
@ -32,3 +35,5 @@ rt_inline void rt_vbus_smp_mb(void)
{
__DSB();
}
#endif /* __VBUS_HW_H__ */

6
bsp/lpc5410x/applications/startup.c
View File

@ -27,12 +27,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* initialize tick */
rt_system_tick_init();
/* initialize kernel object */
rt_system_object_init();
/* initialize timer system */
rt_system_timer_init();

6
bsp/lpc824/applications/startup.c
View File

@ -52,12 +52,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/m16c62p/applications/startup.c
View File

@ -49,12 +49,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/mb9bf500r/startup.c
View File

@ -44,12 +44,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/microblaze/startup.c
View File

@ -55,12 +55,6 @@ void rtthread_startup(void)
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/mini4020/applications/startup.c
View File

@ -49,12 +49,6 @@ void rtthread_startup()
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/nios_ii/startup.c
View File

@ -45,12 +45,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

6
bsp/nrf51822/applications/startup.c
View File

@ -48,12 +48,6 @@ void rtthread_startup(void)
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();

351
bsp/nrf52832/.config
View File

@ -1,351 +0,0 @@
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Project Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_USING_IDLE_HOOK=y
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
CONFIG_RT_USING_TIMER_SOFT=y
CONFIG_RT_TIMER_THREAD_PRIO=4
CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
CONFIG_RT_VER_NUM=0x40002
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
# CONFIG_RT_USING_USER_MAIN is not set
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
#
# Using Hardware Crypto drivers
#
# CONFIG_RT_USING_HWCRYPTO is not set
#
# Using WiFi
#
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set

48
bsp/nrf52832/applications/application.c
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@ -1,48 +0,0 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2015-03-01 Yangfs the first version
* 2015-03-27 Bernard code cleanup.
*/
/**
* @addtogroup NRF52832
*/
/*@{*/
#include <rtthread.h>
#ifdef RT_USING_FINSH
#include <finsh.h>
#include <shell.h>
#endif
void rt_init_thread_entry(void* parameter)
{
extern rt_err_t ble_init(void);
ble_init();
}
int rt_application_init(void)
{
rt_thread_t tid;
tid = rt_thread_create("init", rt_init_thread_entry, RT_NULL, 1024,
RT_THREAD_PRIORITY_MAX / 3, 20);
if (tid != RT_NULL)
rt_thread_startup(tid);
return 0;
}
/*@}*/

670
bsp/nrf52832/applications/ble_nus_app.c
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@ -1,670 +0,0 @@
#include "nordic_common.h"
#include "nrf.h"
#include "ble_hci.h"
#include "ble_advdata.h"
#include "ble_advertising.h"
#include "ble_conn_params.h"
#include "softdevice_handler.h"
#include "nrf_ble_gatt.h"
#include "app_timer.h"
#include "ble_nus.h"
#include "app_util_platform.h"
#include <rtthread.h>
typedef rt_size_t (*BLE_NOTIFY_T)(rt_uint8_t *buf, rt_uint16_t size);
#define STACK_EVT_MQ_NUM 10
#define FAST_ADV() \
do { \
uint32_t err_code; \
err_code = ble_advertising_start(BLE_ADV_MODE_FAST); \
APP_ERROR_CHECK(err_code); \
} while(0)
typedef enum
{
STACK_EV_DISCON = 1,
STACK_EV_DISPATCH = 2,
STACK_EV_KEY = 4,
} STACK_EV_E;
typedef struct
{
rt_list_t node;
void* evt;
} evt_list_t;
typedef enum
{
STACK_STATE_IDLE = 0,
STACK_STATE_ADV = 1,
STACK_STATE_CON = 2,
STACK_STATE_DISC = 3
} STACK_STATE_E;
STACK_STATE_E stack_state = STACK_STATE_IDLE;
rt_event_t stack_event;
rt_sem_t sd_evt_sem;
rt_mq_t stack_evt_mq;
rt_uint8_t *evt_sample;
BLE_NOTIFY_T rx_notify = RT_NULL;
// Low frequency clock source to be used by the SoftDevice
#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_XTAL, \
.rc_ctiv = 0, \
.rc_temp_ctiv = 0, \
.xtal_accuracy = NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM}
#define CONN_CFG_TAG 1 /**< A tag that refers to the BLE stack configuration we set with @ref sd_ble_cfg_set. Default tag is @ref BLE_CONN_CFG_TAG_DEFAULT. */
#define APP_FEATURE_NOT_SUPPORTED BLE_GATT_STATUS_ATTERR_APP_BEGIN + 2 /**< Reply when unsupported features are requested. */
#define DEVICE_NAME "Nordic_UART" /**< Name of device. Will be included in the advertising data. */
#define NUS_SERVICE_UUID_TYPE BLE_UUID_TYPE_VENDOR_BEGIN /**< UUID type for the Nordic UART Service (vendor specific). */
#define APP_ADV_INTERVAL 64 /**< The advertising interval (in units of 0.625 ms. This value corresponds to 40 ms). */
#define APP_ADV_TIMEOUT_IN_SECONDS 30 /**< The advertising timeout (in units of seconds). */
#define MIN_CONN_INTERVAL MSEC_TO_UNITS(20, UNIT_1_25_MS) /**< Minimum acceptable connection interval (20 ms), Connection interval uses 1.25 ms units. */
#define MAX_CONN_INTERVAL MSEC_TO_UNITS(75, UNIT_1_25_MS) /**< Maximum acceptable connection interval (75 ms), Connection interval uses 1.25 ms units. */
#define SLAVE_LATENCY 0 /**< Slave latency. */
#define CONN_SUP_TIMEOUT MSEC_TO_UNITS(4000, UNIT_10_MS) /**< Connection supervisory timeout (4 seconds), Supervision Timeout uses 10 ms units. */
#define FIRST_CONN_PARAMS_UPDATE_DELAY APP_TIMER_TICKS(5000) /**< Time from initiating event (connect or start of notification) to first time sd_ble_gap_conn_param_update is called (5 seconds). */
#define NEXT_CONN_PARAMS_UPDATE_DELAY APP_TIMER_TICKS(30000) /**< Time between each call to sd_ble_gap_conn_param_update after the first call (30 seconds). */
#define MAX_CONN_PARAMS_UPDATE_COUNT 3 /**< Number of attempts before giving up the connection parameter negotiation. */
#define DEAD_BEEF 0xDEADBEEF /**< Value used as error code on stack dump, can be used to identify stack location on stack unwind. */
#define UART_TX_BUF_SIZE 256 /**< UART TX buffer size. */
#define UART_RX_BUF_SIZE 256 /**< UART RX buffer size. */
static ble_nus_t m_nus; /**< Structure to identify the Nordic UART Service. */
static uint16_t m_conn_handle = BLE_CONN_HANDLE_INVALID; /**< Handle of the current connection. */
static nrf_ble_gatt_t m_gatt; /**< GATT module instance. */
static ble_uuid_t m_adv_uuids[] = {{BLE_UUID_NUS_SERVICE, NUS_SERVICE_UUID_TYPE}}; /**< Universally unique service identifier. */
static uint16_t m_ble_nus_max_data_len = BLE_GATT_ATT_MTU_DEFAULT - 3; /**< Maximum length of data (in bytes) that can be transmitted to the peer by the Nordic UART service module. */
/**@brief Function for assert macro callback.
*
* @details This function will be called in case of an assert in the SoftDevice.
*
* @warning This handler is an example only and does not fit a final product. You need to analyse
* how your product is supposed to react in case of Assert.
* @warning On assert from the SoftDevice, the system can only recover on reset.
*
* @param[in] line_num Line number of the failing ASSERT call.
* @param[in] p_file_name File name of the failing ASSERT call.
*/
void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name)
{
app_error_handler(DEAD_BEEF, line_num, p_file_name);
}
/**@brief Function for the GAP initialization.
*
* @details This function will set up all the necessary GAP (Generic Access Profile) parameters of
* the device. It also sets the permissions and appearance.
*/
static void gap_params_init(void)
{
uint32_t err_code;
ble_gap_conn_params_t gap_conn_params;
ble_gap_conn_sec_mode_t sec_mode;
BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode);
err_code = sd_ble_gap_device_name_set(&sec_mode,
(const uint8_t *) DEVICE_NAME,
strlen(DEVICE_NAME));
APP_ERROR_CHECK(err_code);
memset(&gap_conn_params, 0, sizeof(gap_conn_params));
gap_conn_params.min_conn_interval = MIN_CONN_INTERVAL;
gap_conn_params.max_conn_interval = MAX_CONN_INTERVAL;
gap_conn_params.slave_latency = SLAVE_LATENCY;
gap_conn_params.conn_sup_timeout = CONN_SUP_TIMEOUT;
err_code = sd_ble_gap_ppcp_set(&gap_conn_params);
APP_ERROR_CHECK(err_code);
}
/**@brief Function for handling the data from the Nordic UART Service.
*
* @details This function will process the data received from the Nordic UART BLE Service and send
* it to the UART module.
*
* @param[in] p_nus Nordic UART Service structure.
* @param[in] p_data Data to be send to UART module.
* @param[in] length Length of the data.
*/
/**@snippet [Handling the data received over BLE] */
static void nus_data_handler(ble_nus_t * p_nus, uint8_t * p_data, uint16_t length)
{
rt_kprintf("Received data from BLE NUS. Writing data on UART.\r\n");
for (uint32_t i = 0; i < length; i++)
{
rt_kprintf("%02x ", p_data[i]);
}
// ble_send(p_data, length);
if (rx_notify != RT_NULL)
{
rx_notify(p_data, length);
}
}
/**@snippet [Handling the data received over BLE] */
/**@brief Function for initializing services that will be used by the application.
*/
static void services_init(void)
{
uint32_t err_code;
ble_nus_init_t nus_init;
memset(&nus_init, 0, sizeof(nus_init));
nus_init.data_handler = nus_data_handler;
err_code = ble_nus_init(&m_nus, &nus_init);
APP_ERROR_CHECK(err_code);
}
/**@brief Function for handling an event from the Connection Parameters Module.
*
* @details This function will be called for all events in the Connection Parameters Module
* which are passed to the application.
*
* @note All this function does is to disconnect. This could have been done by simply setting
* the disconnect_on_fail config parameter, but instead we use the event handler
* mechanism to demonstrate its use.
*
* @param[in] p_evt Event received from the Connection Parameters Module.
*/
static void on_conn_params_evt(ble_conn_params_evt_t * p_evt)
{
uint32_t err_code;
if (p_evt->evt_type == BLE_CONN_PARAMS_EVT_FAILED)
{
err_code = sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_CONN_INTERVAL_UNACCEPTABLE);
APP_ERROR_CHECK(err_code);
}
}
/**@brief Function for handling errors from the Connection Parameters module.
*
* @param[in] nrf_error Error code containing information about what went wrong.
*/
static void conn_params_error_handler(uint32_t nrf_error)
{
APP_ERROR_HANDLER(nrf_error);
}
/**@brief Function for initializing the Connection Parameters module.
*/
static void conn_params_init(void)
{
uint32_t err_code;
ble_conn_params_init_t cp_init;
memset(&cp_init, 0, sizeof(cp_init));
cp_init.p_conn_params = NULL;
cp_init.first_conn_params_update_delay = FIRST_CONN_PARAMS_UPDATE_DELAY;
cp_init.next_conn_params_update_delay = NEXT_CONN_PARAMS_UPDATE_DELAY;
cp_init.max_conn_params_update_count = MAX_CONN_PARAMS_UPDATE_COUNT;
cp_init.start_on_notify_cccd_handle = BLE_GATT_HANDLE_INVALID;
cp_init.disconnect_on_fail = false;
cp_init.evt_handler = on_conn_params_evt;
cp_init.error_handler = conn_params_error_handler;
err_code = ble_conn_params_init(&cp_init);
APP_ERROR_CHECK(err_code);
}
/**@brief Function for handling advertising events.
*
* @details This function will be called for advertising events which are passed to the application.
*
* @param[in] ble_adv_evt Advertising event.
*/
static void on_adv_evt(ble_adv_evt_t ble_adv_evt)
{
// uint32_t err_code;
switch (ble_adv_evt)
{
case BLE_ADV_EVT_FAST:
// err_code = bsp_indication_set(BSP_INDICATE_ADVERTISING);
// APP_ERROR_CHECK(err_code);
stack_state = STACK_STATE_ADV;
rt_kprintf("fast advert\n");
break;
case BLE_ADV_EVT_IDLE:
// sleep_mode_enter();
stack_state = STACK_STATE_IDLE;
rt_kprintf("advert idle\n");
break;
default:
break;
}
}
/**@brief Function for the application's SoftDevice event handler.
*
* @param[in] p_ble_evt SoftDevice event.
*/
static void on_ble_evt(ble_evt_t * p_ble_evt)
{
uint32_t err_code;
switch (p_ble_evt->header.evt_id)
{
case BLE_GAP_EVT_CONNECTED:
// err_code = bsp_indication_set(BSP_INDICATE_CONNECTED);
// APP_ERROR_CHECK(err_code);
m_conn_handle = p_ble_evt->evt.gap_evt.conn_handle;
stack_state = STACK_STATE_CON;
rt_kprintf("Connected\r\n");
break; // BLE_GAP_EVT_CONNECTED
case BLE_GAP_EVT_DISCONNECTED:
// err_code = bsp_indication_set(BSP_INDICATE_IDLE);
// APP_ERROR_CHECK(err_code);
m_conn_handle = BLE_CONN_HANDLE_INVALID;
stack_state = STACK_STATE_DISC;
rt_kprintf("Disconnected\r\n");
break; // BLE_GAP_EVT_DISCONNECTED
case BLE_GAP_EVT_SEC_PARAMS_REQUEST:
// Pairing not supported
err_code = sd_ble_gap_sec_params_reply(m_conn_handle, BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP, NULL, NULL);
APP_ERROR_CHECK(err_code);
break; // BLE_GAP_EVT_SEC_PARAMS_REQUEST
case BLE_GAP_EVT_DATA_LENGTH_UPDATE_REQUEST:
{
ble_gap_data_length_params_t dl_params;
// Clearing the struct will effectivly set members to @ref BLE_GAP_DATA_LENGTH_AUTO
memset(&dl_params, 0, sizeof(ble_gap_data_length_params_t));
err_code = sd_ble_gap_data_length_update(p_ble_evt->evt.gap_evt.conn_handle, &dl_params, NULL);
APP_ERROR_CHECK(err_code);
} break;
case BLE_GATTS_EVT_SYS_ATTR_MISSING:
// No system attributes have been stored.
err_code = sd_ble_gatts_sys_attr_set(m_conn_handle, NULL, 0, 0);
APP_ERROR_CHECK(err_code);
break; // BLE_GATTS_EVT_SYS_ATTR_MISSING
case BLE_GATTC_EVT_TIMEOUT:
// Disconnect on GATT Client timeout event.
err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gattc_evt.conn_handle,
BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
APP_ERROR_CHECK(err_code);
break; // BLE_GATTC_EVT_TIMEOUT
case BLE_GATTS_EVT_TIMEOUT:
// Disconnect on GATT Server timeout event.
err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gatts_evt.conn_handle,
BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
APP_ERROR_CHECK(err_code);
break; // BLE_GATTS_EVT_TIMEOUT
case BLE_EVT_USER_MEM_REQUEST:
err_code = sd_ble_user_mem_reply(p_ble_evt->evt.gattc_evt.conn_handle, NULL);
APP_ERROR_CHECK(err_code);
break; // BLE_EVT_USER_MEM_REQUEST
case BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST:
{
ble_gatts_evt_rw_authorize_request_t req;
ble_gatts_rw_authorize_reply_params_t auth_reply;
req = p_ble_evt->evt.gatts_evt.params.authorize_request;
if (req.type != BLE_GATTS_AUTHORIZE_TYPE_INVALID)
{
if ((req.request.write.op == BLE_GATTS_OP_PREP_WRITE_REQ) ||
(req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_NOW) ||
(req.request.write.op == BLE_GATTS_OP_EXEC_WRITE_REQ_CANCEL))
{
if (req.type == BLE_GATTS_AUTHORIZE_TYPE_WRITE)
{
auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_WRITE;
}
else
{
auth_reply.type = BLE_GATTS_AUTHORIZE_TYPE_READ;
}
auth_reply.params.write.gatt_status = APP_FEATURE_NOT_SUPPORTED;
err_code = sd_ble_gatts_rw_authorize_reply(p_ble_evt->evt.gatts_evt.conn_handle,
&auth_reply);
APP_ERROR_CHECK(err_code);
}
}
} break; // BLE_GATTS_EVT_RW_AUTHORIZE_REQUEST
default:
// No implementation needed.
break;
}
}
/**@brief Function for dispatching a SoftDevice event to all modules with a SoftDevice
* event handler.
*
* @details This function is called from the SoftDevice event interrupt handler after a
* SoftDevice event has been received.
*
* @param[in] p_ble_evt SoftDevice event.
*/
static void ble_evt_dispatch(ble_evt_t * p_ble_evt)
{
if (rt_mq_send(stack_evt_mq, p_ble_evt, p_ble_evt->header.evt_len) != RT_EOK)
{
rt_kprintf("dispatch malloc failure\n");
}
else
{
rt_event_send(stack_event, STACK_EV_DISPATCH);
}
}
static rt_err_t evt_dispatch_worker(void)
{
ble_evt_t * p_ble_evt = (ble_evt_t *)evt_sample;
rt_err_t err;
err = rt_mq_recv(stack_evt_mq, (void*)evt_sample, BLE_STACK_EVT_MSG_BUF_SIZE, RT_WAITING_NO);
if (RT_EOK == err)
{
ble_conn_params_on_ble_evt(p_ble_evt);
nrf_ble_gatt_on_ble_evt(&m_gatt, p_ble_evt);
ble_nus_on_ble_evt(&m_nus, p_ble_evt);
on_ble_evt(p_ble_evt);
ble_advertising_on_ble_evt(p_ble_evt);
// bsp_btn_ble_on_ble_evt(p_ble_evt);
rt_kprintf("ble evt dispatch\n");
}
return err;
}
static uint32_t _softdevice_evt_schedule(void)
{
rt_sem_release(sd_evt_sem);
return NRF_SUCCESS;
}
/**@brief Function for the SoftDevice initialization.
*
* @details This function initializes the SoftDevice and the BLE event interrupt.
*/
static void ble_stack_init(void)
{
uint32_t err_code;
nrf_clock_lf_cfg_t clock_lf_cfg = NRF_CLOCK_LFCLKSRC;
// Initialize SoftDevice.
SOFTDEVICE_HANDLER_INIT(&clock_lf_cfg, _softdevice_evt_schedule);
// Fetch the start address of the application RAM.
uint32_t ram_start = 0;
err_code = softdevice_app_ram_start_get(&ram_start);
APP_ERROR_CHECK(err_code);
// Overwrite some of the default configurations for the BLE stack.
ble_cfg_t ble_cfg;
// Configure the maximum number of connections.
memset(&ble_cfg, 0, sizeof(ble_cfg));
ble_cfg.gap_cfg.role_count_cfg.periph_role_count = BLE_GAP_ROLE_COUNT_PERIPH_DEFAULT;
ble_cfg.gap_cfg.role_count_cfg.central_role_count = 0;
ble_cfg.gap_cfg.role_count_cfg.central_sec_count = 0;
err_code = sd_ble_cfg_set(BLE_GAP_CFG_ROLE_COUNT, &ble_cfg, ram_start);
APP_ERROR_CHECK(err_code);
// Configure the maximum ATT MTU.
memset(&ble_cfg, 0x00, sizeof(ble_cfg));
ble_cfg.conn_cfg.conn_cfg_tag = CONN_CFG_TAG;
ble_cfg.conn_cfg.params.gatt_conn_cfg.att_mtu = NRF_BLE_GATT_MAX_MTU_SIZE;
err_code = sd_ble_cfg_set(BLE_CONN_CFG_GATT, &ble_cfg, ram_start);
APP_ERROR_CHECK(err_code);
// Configure the maximum event length.
memset(&ble_cfg, 0x00, sizeof(ble_cfg));
ble_cfg.conn_cfg.conn_cfg_tag = CONN_CFG_TAG;
ble_cfg.conn_cfg.params.gap_conn_cfg.event_length = 320;
ble_cfg.conn_cfg.params.gap_conn_cfg.conn_count = BLE_GAP_CONN_COUNT_DEFAULT;
err_code = sd_ble_cfg_set(BLE_CONN_CFG_GAP, &ble_cfg, ram_start);
APP_ERROR_CHECK(err_code);
// Enable BLE stack.
err_code = softdevice_enable(&ram_start);
APP_ERROR_CHECK(err_code);
// Subscribe for BLE events.
err_code = softdevice_ble_evt_handler_set(ble_evt_dispatch);
APP_ERROR_CHECK(err_code);
}
/**@brief Function for handling events from the GATT library. */
static void gatt_evt_handler(nrf_ble_gatt_t * p_gatt, const nrf_ble_gatt_evt_t * p_evt)
{
if ((m_conn_handle == p_evt->conn_handle) && (p_evt->evt_id == NRF_BLE_GATT_EVT_ATT_MTU_UPDATED))
{
m_ble_nus_max_data_len = p_evt->params.att_mtu_effective - OPCODE_LENGTH - HANDLE_LENGTH;
rt_kprintf("Data len is set to 0x%X(%d)\r\n", m_ble_nus_max_data_len, m_ble_nus_max_data_len);
}
rt_kprintf("ATT MTU exchange completed. central 0x%x peripheral 0x%x\r\n", p_gatt->att_mtu_desired_central, p_gatt->att_mtu_desired_periph);
}
/**@brief Function for initializing the GATT library. */
static void gatt_init(void)
{
ret_code_t err_code;
err_code = nrf_ble_gatt_init(&m_gatt, gatt_evt_handler);
APP_ERROR_CHECK(err_code);
err_code = nrf_ble_gatt_att_mtu_periph_set(&m_gatt, 64);
APP_ERROR_CHECK(err_code);
}
/**@brief Function for initializing the Advertising functionality.
*/
static void advertising_init(void)
{
uint32_t err_code;
ble_advdata_t advdata;
ble_advdata_t scanrsp;
ble_adv_modes_config_t options;
// Build advertising data struct to pass into @ref ble_advertising_init.
memset(&advdata, 0, sizeof(advdata));
advdata.name_type = BLE_ADVDATA_FULL_NAME;
advdata.include_appearance = false;
advdata.flags = BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE;
memset(&scanrsp, 0, sizeof(scanrsp));
scanrsp.uuids_complete.uuid_cnt = sizeof(m_adv_uuids) / sizeof(m_adv_uuids[0]);
scanrsp.uuids_complete.p_uuids = m_adv_uuids;
memset(&options, 0, sizeof(options));
options.ble_adv_fast_enabled = true;
options.ble_adv_fast_interval = APP_ADV_INTERVAL;
options.ble_adv_fast_timeout = APP_ADV_TIMEOUT_IN_SECONDS;
err_code = ble_advertising_init(&advdata, &scanrsp, &options, on_adv_evt, NULL);
APP_ERROR_CHECK(err_code);
ble_advertising_conn_cfg_tag_set(CONN_CFG_TAG);
}
/**@brief Function for handling app_uart events.
*
* @details This function will receive a single character from the app_uart module and append it to
* a string. The string will be be sent over BLE when the last character received was a
* 'new line' '\n' (hex 0x0A) or if the string has reached the maximum data length.
*/
/**@snippet [Handling the data received over UART] */
void uart_event_handle(rt_device_t uart)
{
uint8_t data_array[BLE_NUS_MAX_DATA_LEN];
rt_size_t size = 0;
uint32_t err_code;
size = rt_device_read(uart, 0, data_array, BLE_NUS_MAX_DATA_LEN);
if (size <= 0)
{
return;
}
do
{
err_code = ble_nus_string_send(&m_nus, data_array, size);
if ( (err_code != NRF_ERROR_INVALID_STATE) && (err_code != NRF_ERROR_BUSY) )
{
APP_ERROR_CHECK(err_code);
}
} while (err_code == NRF_ERROR_BUSY);
}
/**@snippet [Handling the data received over UART] */
/**@brief Function for initializing the UART module.
*/
/**@snippet [UART Initialization] */
static rt_bool_t _stack_init(void)
{
uint32_t err_code;
stack_event = rt_event_create("stackev", RT_IPC_FLAG_FIFO);
sd_evt_sem = rt_sem_create("sdsem", 0, RT_IPC_FLAG_FIFO);
stack_evt_mq = rt_mq_create("stackmq", BLE_STACK_EVT_MSG_BUF_SIZE, STACK_EVT_MQ_NUM, RT_IPC_FLAG_FIFO);
evt_sample = rt_malloc(BLE_STACK_EVT_MSG_BUF_SIZE);
if (!stack_event || !sd_evt_sem || !stack_evt_mq || !evt_sample)
{
rt_kprintf("uart rx sem create failure\n");
return RT_FALSE;
}
// Initialize.
err_code = app_timer_init();
APP_ERROR_CHECK(err_code);
ble_stack_init();
gap_params_init();
gatt_init();
services_init();
advertising_init();
conn_params_init();
return RT_TRUE;
}
/**@brief Application main function.
*/
static void _stack_thread(void *parameter)
{
rt_tick_t next_timeout = (rt_tick_t)RT_WAITING_FOREVER;
FAST_ADV();
// Enter main loop.
for (;;)
{
rt_uint32_t event = 0;
rt_tick_t dispatch_timeout = RT_WAITING_NO;
rt_event_recv(stack_event, STACK_EV_DISCON | STACK_EV_DISPATCH | STACK_EV_KEY,
RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, next_timeout, &event);
if (evt_dispatch_worker() != RT_EOK)
{
dispatch_timeout = (rt_tick_t)RT_WAITING_FOREVER;
}
if (event & STACK_EV_DISCON)
{
if (BLE_CONN_HANDLE_INVALID != m_conn_handle)
{
sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
}
}
if (event & STACK_EV_KEY)
{
if (stack_state != STACK_STATE_CON && stack_state != STACK_STATE_ADV)
{
FAST_ADV();
}
}
next_timeout = (rt_tick_t)RT_WAITING_FOREVER;
if (dispatch_timeout < next_timeout)
{
next_timeout = dispatch_timeout;
}
}
}
static void _softdevice_thread(void* parameter)
{
for (;;)
{
rt_sem_take(sd_evt_sem, RT_WAITING_FOREVER);
intern_softdevice_events_execute();
}
}
rt_err_t ble_init(void)
{
rt_thread_t thread;
_stack_init();
thread = rt_thread_create("sdth", _softdevice_thread, RT_NULL, 512, 0, 10);
if (thread != RT_NULL)
{
rt_thread_startup(thread);
}
else
{
return RT_ERROR;
}
thread = rt_thread_create("bleth", _stack_thread, RT_NULL, 2048, 1, 10);
if (thread != RT_NULL)
{
return rt_thread_startup(thread);
}
return RT_ERROR;
}

3991
bsp/nrf52832/applications/sdk_config.h
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File diff suppressed because it is too large Load Diff

98
bsp/nrf52832/applications/startup.c
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@ -1,98 +0,0 @@
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2015, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://openlab.rt-thread.com/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2015-03-01 Yangfs the first version
* 2015-03-27 Bernard code cleanup.
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
/**
* @addtogroup NRF52832
*/
/*@{*/
extern int rt_application_init(void);
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define NRF_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define NRF_SRAM_BEGIN (__segment_end("HEAP"))
#else
extern int __bss_end;
#define NRF_SRAM_BEGIN (&__bss_end)
#endif
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
/* init tick */
rt_system_tick_init();
/* init kernel object */
rt_system_object_init();
/* init timer system */
rt_system_timer_init();
#ifdef RT_USING_HEAP
rt_system_heap_init((void*)NRF_SRAM_BEGIN, (void*)CHIP_SRAM_END);
#endif
/* init scheduler system */
rt_system_scheduler_init();
#ifdef RT_USING_COMPONENTS_INIT
rt_components_init();
#endif
/* init application */
rt_application_init();
/* init timer thread */
rt_system_timer_thread_init();
/* init idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
// rt_hw_interrupt_disable();
/* startup RT-Thread RTOS */
rtthread_startup();
return 0;
}
/*@}*/

14
bsp/nrf52832/board/Sconscript
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@ -1,14 +0,0 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
#remove other no use files
#SrcRemove(src, '*.c')
group = DefineGroup('Board', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

268
bsp/nrf52832/board/board.c
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@ -1,268 +0,0 @@
#include "board.h"
#include "uart.h"
#include "app_util_platform.h"
#include "nrf_drv_common.h"
#include "nrf_systick.h"
#include "nrf_rtc.h"
#include "nrf_drv_clock.h"
#include "softdevice_handler.h"
#include "nrf_drv_uart.h"
#include "nrf_gpio.h"
#include <rtthread.h>
#include <rthw.h>
#if 0
/*******************************************************************************
* Function Name : SysTick_Configuration
* Description : Configures the SysTick for OS tick.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SysTick_Configuration(void)
{
nrf_drv_common_irq_enable(SysTick_IRQn, APP_TIMER_CONFIG_IRQ_PRIORITY);
nrf_systick_load_set(SystemCoreClock / RT_TICK_PER_SECOND);
nrf_systick_val_clear();
nrf_systick_csr_set(NRF_SYSTICK_CSR_CLKSOURCE_CPU | NRF_SYSTICK_CSR_TICKINT_ENABLE
| NRF_SYSTICK_CSR_ENABLE);
}
/**
* This is the timer interrupt service routine.
*
*/
void SysTick_Handler(void)
{
if (rt_thread_self() != RT_NULL)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
}
#else
#define TICK_RATE_HZ RT_TICK_PER_SECOND
#define SYSTICK_CLOCK_HZ ( 32768UL )
#define NRF_RTC_REG NRF_RTC1
/* IRQn used by the selected RTC */
#define NRF_RTC_IRQn RTC1_IRQn
/* Constants required to manipulate the NVIC. */
#define NRF_RTC_PRESCALER ( (uint32_t) (ROUNDED_DIV(SYSTICK_CLOCK_HZ, TICK_RATE_HZ) - 1) )
/* Maximum RTC ticks */
#define NRF_RTC_MAXTICKS ((1U<<24)-1U)
static volatile uint32_t m_tick_overflow_count = 0;
#define NRF_RTC_BITWIDTH 24
#define OSTick_Handler RTC1_IRQHandler
#define EXPECTED_IDLE_TIME_BEFORE_SLEEP 2
void SysTick_Configuration(void)
{
nrf_drv_clock_lfclk_request(NULL);
/* Configure SysTick to interrupt at the requested rate. */
nrf_rtc_prescaler_set(NRF_RTC_REG, NRF_RTC_PRESCALER);
nrf_rtc_int_enable (NRF_RTC_REG, RTC_INTENSET_TICK_Msk);
nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_CLEAR);
nrf_rtc_task_trigger (NRF_RTC_REG, NRF_RTC_TASK_START);
nrf_rtc_event_enable(NRF_RTC_REG, RTC_EVTEN_OVRFLW_Msk);
NVIC_SetPriority(NRF_RTC_IRQn, 0xF);
NVIC_EnableIRQ(NRF_RTC_IRQn);
}
static rt_tick_t _tick_distance(void)
{
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
uint32_t systick_counter = nrf_rtc_counter_get(NRF_RTC_REG);
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK);
/* check for overflow in TICK counter */
if(nrf_rtc_event_pending(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW))
{
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_OVERFLOW);
m_tick_overflow_count++;
}
return ((m_tick_overflow_count << NRF_RTC_BITWIDTH) + systick_counter) - rt_tick_get();
}
void OSTick_Handler( void )
{
uint32_t diff;
/* enter interrupt */
rt_interrupt_enter();
diff = _tick_distance();
while((diff--) > 0)
{
if (rt_thread_self() != RT_NULL)
{
rt_tick_increase();
}
}
/* leave interrupt */
rt_interrupt_leave();
}
static void _wakeup_tick_adjust(void)
{
uint32_t diff;
uint32_t level;
level = rt_hw_interrupt_disable();
diff = _tick_distance();
rt_tick_set(rt_tick_get() + diff);
if (rt_thread_self() != RT_NULL)
{
struct rt_thread *thread;
/* check time slice */
thread = rt_thread_self();
if (thread->remaining_tick <= diff)
{
/* change to initialized tick */
thread->remaining_tick = thread->init_tick;
/* yield */
rt_thread_yield();
}
else
{
thread->remaining_tick -= diff;
}
/* check timer */
rt_timer_check();
}
rt_hw_interrupt_enable(level);
}
static void _sleep_ongo( uint32_t sleep_tick )
{
uint32_t enterTime;
uint32_t entry_tick;
/* Make sure the SysTick reload value does not overflow the counter. */
if ( sleep_tick > NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP )
{
sleep_tick = NRF_RTC_MAXTICKS - EXPECTED_IDLE_TIME_BEFORE_SLEEP;
}
rt_enter_critical();
enterTime = nrf_rtc_counter_get(NRF_RTC_REG);
{
uint32_t wakeupTime = (enterTime + sleep_tick) & NRF_RTC_MAXTICKS;
/* Stop tick events */
nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_TICK_MASK);
/* Configure CTC interrupt */
nrf_rtc_cc_set(NRF_RTC_REG, 0, wakeupTime);
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
nrf_rtc_int_enable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
entry_tick = rt_tick_get();
__DSB();
if ( sleep_tick > 0 )
{
#ifdef SOFTDEVICE_PRESENT
if (softdevice_handler_is_enabled())
{
uint32_t err_code = sd_app_evt_wait();
APP_ERROR_CHECK(err_code);
}
else
#endif
{
/* No SD - we would just block interrupts globally.
* BASEPRI cannot be used for that because it would prevent WFE from wake up.
*/
do{
__WFE();
} while (0 == (NVIC->ISPR[0] | NVIC->ISPR[1]));
}
}
nrf_rtc_int_disable(NRF_RTC_REG, NRF_RTC_INT_COMPARE0_MASK);
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_COMPARE_0);
_wakeup_tick_adjust();
/* Correct the system ticks */
{
nrf_rtc_event_clear(NRF_RTC_REG, NRF_RTC_EVENT_TICK);
nrf_rtc_int_enable (NRF_RTC_REG, NRF_RTC_INT_TICK_MASK);
/* It is important that we clear pending here so that our corrections are latest and in sync with tick_interrupt handler */
NVIC_ClearPendingIRQ(NRF_RTC_IRQn);
}
rt_kprintf("entry tick:%u, expected:%u, current tick:%u\n", entry_tick, sleep_tick, rt_tick_get());
}
rt_exit_critical();
}
#endif
void rt_hw_system_powersave(void)
{
uint32_t sleep_tick;
sleep_tick = rt_timer_next_timeout_tick() - rt_tick_get();
if ( sleep_tick >= EXPECTED_IDLE_TIME_BEFORE_SLEEP)
{
// rt_kprintf("sleep entry:%u\n", rt_tick_get());
_sleep_ongo( sleep_tick );
}
}
void rt_hw_board_init(void)
{
// sd_power_dcdc_mode_set(NRF_POWER_DCDC_ENABLE);
/* Activate deep sleep mode */
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
nrf_drv_clock_init();
// nrf_drv_clock_hfclk_request(0);
SysTick_Configuration();
rt_thread_idle_sethook(rt_hw_system_powersave);
rt_hw_uart_init();
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
}

13
bsp/nrf52832/board/board.h
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@ -1,13 +0,0 @@
#ifndef _BOARD_H_
#define _BOARD_H_
#include <rtthread.h>
#include "nrf.h"
#define CHIP_SRAM_END (0x20000000 + 64*1024)
void rt_hw_board_init(void);
#endif

289
bsp/nrf52832/board/uart.c
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@ -1,289 +0,0 @@
#include "board.h"
#include "uart.h"
#include "nrf_drv_common.h"
#include "nrf_drv_uart.h"
#include "app_util_platform.h"
#include "nrf_gpio.h"
#include <rtdevice.h>
static struct rt_serial_device _serial0_0;
#if USE_UART0_1
static struct rt_serial_device _serial0_1;
#endif
typedef struct
{
struct rt_serial_device *serial;
nrf_drv_uart_t uart;
uint32_t rx_pin;
uint32_t tx_pin;
} UART_CFG_T;
UART_CFG_T uart0 = {
.uart = NRF_DRV_UART_INSTANCE(0),
#ifdef RT_USING_CONSOLE
.rx_pin = 8,
.tx_pin = 6
#else
.rx_pin = 19,
.tx_pin = 20
#endif
};
#if USE_UART0_1
UART_CFG_T uart1 = {
.uart = NRF_DRV_UART_INSTANCE(0),
.rx_pin = 3,
.tx_pin = 4
};
#endif
UART_CFG_T *working_cfg = RT_NULL;
void UART0_IRQHandler(void)
{
if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_ERROR)
&& nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_ERROR))
{
nrf_uart_event_clear(NRF_UART0, NRF_UART_EVENT_ERROR);
}
if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_RXDRDY)
&& nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXDRDY))
{
rt_hw_serial_isr(working_cfg->serial, RT_SERIAL_EVENT_RX_IND);
}
if (nrf_uart_int_enable_check(NRF_UART0, NRF_UART_INT_MASK_TXDRDY)
&& nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_TXDRDY))
{
rt_hw_serial_isr(working_cfg->serial, RT_SERIAL_EVENT_TX_DONE);
}
if (nrf_uart_event_check(NRF_UART0, NRF_UART_EVENT_RXTO))
{
rt_hw_serial_isr(working_cfg->serial, RT_SERIAL_EVENT_RX_TIMEOUT);
}
}
static rt_err_t _uart_cfg(struct rt_serial_device *serial, struct serial_configure *cfg)
{
nrf_drv_uart_config_t config = NRF_DRV_UART_DEFAULT_CONFIG;
UART_CFG_T *instance = &uart0;
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
if (serial->parent.user_data != RT_NULL)
{
instance = (UART_CFG_T*)serial->parent.user_data;
}
nrf_uart_disable(instance->uart.reg.p_uart);
switch (cfg->baud_rate)
{
case 115200:
config.baudrate = NRF_UART_BAUDRATE_115200;
break;
case 9600:
config.baudrate = NRF_UART_BAUDRATE_9600;
break;
default:
config.baudrate = NRF_UART_BAUDRATE_115200;
break;
}
if (cfg->parity == PARITY_NONE)
{
config.parity = NRF_UART_PARITY_EXCLUDED;
}
else
{
config.parity = NRF_UART_PARITY_INCLUDED;
}
config.hwfc = NRF_UART_HWFC_DISABLED;
config.interrupt_priority = APP_IRQ_PRIORITY_LOWEST;
config.pselcts = 0;
config.pselrts = 0;
config.pselrxd = instance->rx_pin;
config.pseltxd = instance->tx_pin;
nrf_gpio_pin_set(config.pseltxd);
nrf_gpio_cfg_output(config.pseltxd);
nrf_gpio_pin_clear(config.pseltxd);
nrf_gpio_cfg_input(config.pselrxd, NRF_GPIO_PIN_NOPULL);
nrf_uart_baudrate_set(instance->uart.reg.p_uart, config.baudrate);
nrf_uart_configure(instance->uart.reg.p_uart, config.parity, config.hwfc);
nrf_uart_txrx_pins_set(instance->uart.reg.p_uart, config.pseltxd, config.pselrxd);
if (config.hwfc == NRF_UART_HWFC_ENABLED)
{
nrf_uart_hwfc_pins_set(instance->uart.reg.p_uart, config.pselrts, config.pselcts);
}
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_TXDRDY);
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXDRDY);
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXTO);
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_ERROR);
nrf_uart_int_enable(instance->uart.reg.p_uart, NRF_UART_INT_MASK_RXDRDY | NRF_UART_INT_MASK_RXTO | NRF_UART_INT_MASK_ERROR);
nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)instance->uart.reg.p_uart), config.interrupt_priority);
nrf_uart_enable(instance->uart.reg.p_uart);
// nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STARTRX);
working_cfg = instance;
return RT_EOK;
}
static rt_err_t _uart_ctrl(struct rt_serial_device *serial, int cmd, void *arg)
{
UART_CFG_T *instance = working_cfg;
RT_ASSERT(serial != RT_NULL);
if (serial->parent.user_data != RT_NULL)
{
instance = (UART_CFG_T*)serial->parent.user_data;
}
switch (cmd)
{
/* disable interrupt */
case RT_DEVICE_CTRL_CLR_INT:
nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STOPRX);
nrf_uart_int_disable(instance->uart.reg.p_uart, NRF_UART_INT_MASK_RXDRDY
| NRF_UART_INT_MASK_RXTO
| NRF_UART_INT_MASK_ERROR);
nrf_drv_common_irq_disable(nrf_drv_get_IRQn((void *)instance->uart.reg.p_uart));
break;
/* enable interrupt */
case RT_DEVICE_CTRL_SET_INT:
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXDRDY);
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXTO);
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_ERROR);
/* Enable RX interrupt. */
nrf_uart_int_enable(instance->uart.reg.p_uart, NRF_UART_INT_MASK_RXDRDY
| NRF_UART_INT_MASK_RXTO
| NRF_UART_INT_MASK_ERROR);
nrf_drv_common_irq_enable(nrf_drv_get_IRQn((void *)instance->uart.reg.p_uart), APP_IRQ_PRIORITY_LOWEST);
nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STARTRX);
break;
case RT_DEVICE_CTRL_CUSTOM:
if ((rt_uint32_t)(arg) == UART_CONFIG_BAUD_RATE_9600)
{
instance->serial->config.baud_rate = 9600;
nrf_uart_baudrate_set(instance->uart.reg.p_uart, NRF_UART_BAUDRATE_9600);
}
else if ((rt_uint32_t)(arg) == UART_CONFIG_BAUD_RATE_115200)
{
instance->serial->config.baud_rate = 115200;
nrf_uart_baudrate_set(instance->uart.reg.p_uart, NRF_UART_BAUDRATE_115200);
}
// _uart_cfg(instance->serial, &(instance->serial->config));
// nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STARTRX);
break;
case RT_DEVICE_CTRL_PIN:
if (working_cfg != instance)
{
_uart_cfg(instance->serial, &(instance->serial->config));
}
break;
case RT_DEVICE_POWERSAVE:
nrf_uart_disable(instance->uart.reg.p_uart);
nrf_uart_txrx_pins_disconnect(instance->uart.reg.p_uart);
nrf_gpio_pin_clear(instance->rx_pin);
nrf_gpio_cfg_output(instance->rx_pin);
nrf_gpio_pin_clear(instance->tx_pin);
nrf_gpio_cfg_output(instance->tx_pin);
break;
case RT_DEVICE_WAKEUP:
_uart_cfg(instance->serial, &(instance->serial->config));
break;
default:
return RT_ERROR;
}
return RT_EOK;
}
static int _uart_putc(struct rt_serial_device *serial, char c)
{
UART_CFG_T *instance = working_cfg;
RT_ASSERT(serial != RT_NULL);
if (serial->parent.user_data != RT_NULL)
{
instance = (UART_CFG_T*)serial->parent.user_data;
}
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_TXDRDY);
nrf_uart_task_trigger(instance->uart.reg.p_uart, NRF_UART_TASK_STARTTX);
nrf_uart_txd_set(instance->uart.reg.p_uart, (uint8_t)c);
while (!nrf_uart_event_check(instance->uart.reg.p_uart, NRF_UART_EVENT_TXDRDY))
{
}
return 1;
}
static int _uart_getc(struct rt_serial_device *serial)
{
int ch = -1;
UART_CFG_T *instance = working_cfg;
RT_ASSERT(serial != RT_NULL);
if (serial->parent.user_data != RT_NULL)
{
instance = (UART_CFG_T*)serial->parent.user_data;
}
if (nrf_uart_event_check(instance->uart.reg.p_uart, NRF_UART_EVENT_RXDRDY))
{
nrf_uart_event_clear(instance->uart.reg.p_uart, NRF_UART_EVENT_RXDRDY);
ch = (int)(nrf_uart_rxd_get(instance->uart.reg.p_uart));
}
return ch;
}
static struct rt_uart_ops _uart_ops = {
_uart_cfg,
_uart_ctrl,
_uart_putc,
_uart_getc
};
void rt_hw_uart_init(void)
{
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
config.bufsz = RT_SERIAL_RB_BUFSZ;
_serial0_0.config = config;
_serial0_0.ops = &_uart_ops;
uart0.serial = &_serial0_0;
rt_hw_serial_register(&_serial0_0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &uart0);
#if USE_UART0_1
config.bufsz = UART0_RB_SIZE;
_serial0_1.config = config;
_serial0_1.ops = &_uart_ops;
uart1.serial = &_serial0_1;
rt_hw_serial_register(&_serial0_1, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &uart1);
#endif
}

19
bsp/nrf52832/board/uart.h
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@ -1,19 +0,0 @@
#ifndef _UART_H_
#define _UART_H_
#define RT_DEVICE_CTRL_CUSTOM 0x20
#define RT_DEVICE_CTRL_PIN 0x21
#define RT_DEVICE_POWERSAVE 0x22
#define RT_DEVICE_WAKEUP 0x23
#define UART_CONFIG_BAUD_RATE_9600 1
#define UART_CONFIG_BAUD_RATE_115200 2
#define UART0_RB_SIZE 1024
// #define USE_UART0_1 0
void rt_hw_uart_init(void);
#endif

34
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@ -1,34 +0,0 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
# get current directory
cwd = GetCurrentDir()
BLE_COMMON = Glob('./components/ble/common/*.c')
SrcRemove(BLE_COMMON, 'ble_conn_state.c')
BLE_GATT = Glob('./components/ble/nrf_ble_gatt/*.c')
BLE_ADVERTISING = Glob('./components/ble/ble_advertising/*.c')
BLE_SERVICE = Glob('./components/ble/ble_services/ble_nus/*.c')
BLE_SRC = BLE_COMMON + BLE_GATT + BLE_SERVICE + BLE_ADVERTISING
SOFTDEVICE = Glob('./components/softdevice/common/softdevice_handler/*.c')
SrcRemove(SOFTDEVICE, './components/softdevice/common/softdevice_handler/softdevice_handler_appsh.c')
BLE_STACK_SRC = BLE_SRC + SOFTDEVICE
path = [cwd + '/components']
path += [cwd + '/components/softdevice/common/softdevice_handler']
path += [cwd + '/components/softdevice/s132/headers']
path += [cwd + '/components/softdevice/s132/headers/nrf52']
path += [cwd + '/components/ble/common']
path += [cwd + '/components/ble/nrf_ble_gatt']
path += [cwd + '/components/ble/ble_advertising']
path += [cwd + '/components/ble/ble_services/ble_nus']
CPPDEFINES = ['BLE_STACK_SUPPORT_REQD', 'NRF_SD_BLE_API_VERSION=4', 'S132', 'SOFTDEVICE_PRESENT']
group = DefineGroup('BLE_STACK', BLE_STACK_SRC, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')

52
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@ -1,52 +0,0 @@
Import('RTT_ROOT')
Import('rtconfig')
from building import *
# get current directory
cwd = GetCurrentDir()
DriversDir = cwd + '/drivers_nrf/'
DeviceDrivers = [DriversDir + 'hal/nrf_saadc.c']
DeviceDrivers += [DriversDir + 'common/nrf_drv_common.c']
#DeviceDrivers += [DriversDir + 'uart/nrf_drv_uart.c']
DeviceDrivers += [DriversDir + 'clock/nrf_drv_clock.c']
DeviceDrivers += [DriversDir + 'gpiote/nrf_drv_gpiote.c']
DeviceDrivers += [DriversDir + 'pwm/nrf_drv_pwm.c']
DeviceDrivers += [DriversDir + 'saadc/nrf_drv_saadc.c']
Libraries_dir = cwd + '/libraries/'
Libraries_src = Glob(Libraries_dir + 'log/src/*.c')
Libraries_src += Glob(Libraries_dir + 'timer/app_timer_rtthread.c')
Libraries_src += Glob(Libraries_dir + 'util/*.c')
Libraries_src += Glob(Libraries_dir + 'fstorage/fstorage.c')
Libraries_src += Glob(Libraries_dir + 'strerror/nrf_strerror.c')
src = DeviceDrivers + Libraries_src
path = [cwd]
path += [cwd + '/device']
path += [cwd + '/drivers_nrf/delay']
path += [cwd + '/drivers_nrf/uart']
path += [cwd + '/drivers_nrf/clock']
path += [cwd + '/drivers_nrf/gpiote']
path += [cwd + '/drivers_nrf/common']
path += [cwd + '/drivers_nrf/hal']
path += [cwd + '/drivers_nrf/pwm']
path += [DriversDir + 'saadc']
path += [Libraries_dir + 'util']
path += [Libraries_dir + 'timer']
path += [Libraries_dir + 'fstorage']
path += [Libraries_dir + 'experimental_section_vars']
path += [Libraries_dir + 'log']
path += [Libraries_dir + 'log/src']
path += [Libraries_dir + 'strerror']
path += [cwd + '/toolchain/cmsis/include']
CPPDEFINES = ['RTTHREAD', 'SWI_DISABLE0', 'CONFIG_GPIO_AS_PINRESET', 'NRF52', 'NRF52832_XXAA']
CPPDEFINES += ['NRF52_PAN_12', 'NRF52_PAN_15', 'NRF52_PAN_20', 'NRF52_PAN_31', 'NRF52_PAN_36']
CPPDEFINES += ['NRF52_PAN_51', 'NRF52_PAN_54', 'NRF52_PAN_55', 'NRF52_PAN_58', 'NRF52_PAN_64', 'NRF52_PAN_74']
group = DefineGroup('NRF_DRIVERS', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')

86
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@ -1,86 +0,0 @@
/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_CHANNEL_CONFIG)
#include "nrf_error.h"
#include "ant_channel_config.h"
#include "ant_interface.h"
#include "ant_parameters.h"
uint32_t ant_channel_init(ant_channel_config_t const * p_config)
{
uint32_t err_code;
// Set Channel Number.
err_code = sd_ant_channel_assign(p_config->channel_number,
p_config->channel_type,
p_config->network_number,
p_config->ext_assign);
VERIFY_SUCCESS(err_code);
// Set Channel ID.
err_code = sd_ant_channel_id_set(p_config->channel_number,
p_config->device_number,
p_config->device_type,
p_config->transmission_type);
VERIFY_SUCCESS(err_code);
// Set Channel RF frequency.
err_code = sd_ant_channel_radio_freq_set(p_config->channel_number, p_config->rf_freq);
VERIFY_SUCCESS(err_code);
// Set Channel period.
if (!(p_config->ext_assign & EXT_PARAM_ALWAYS_SEARCH) && (p_config->channel_period != 0))
{
err_code = sd_ant_channel_period_set(p_config->channel_number, p_config->channel_period);
}
#if ANT_CONFIG_ENCRYPTED_CHANNELS > 0
VERIFY_SUCCESS(err_code);
err_code = ant_channel_encrypt_config(p_config->channel_type , p_config->channel_number, p_config->p_crypto_settings);
#endif
return err_code;
}
#endif // NRF_MODULE_ENABLED(ANT_CHANNEL_CONFIG)

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@ -1,98 +0,0 @@
/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_CHANNEL_CONFIG_H__
#define ANT_CHANNEL_CONFIG_H__
/** @file
*
* @defgroup ant_channel_config ANT channel configuration
* @{
* @ingroup ant_sdk_utils
* @brief ANT channel configuration module.
*/
#include <stdint.h>
#include "sdk_config.h"
#ifndef ANT_CONFIG_ENCRYPTED_CHANNELS
#error Undefined ANT_CONFIG_ENCRYPTED_CHANNELS. It should be defined in sdk_config.h file.
#elif ANT_CONFIG_ENCRYPTED_CHANNELS > 0
#include "ant_encrypt_config.h"
#endif
#ifdef __cplusplus
extern "C" {
#endif
/**@brief ANT channel configuration structure. */
typedef struct
{
uint8_t channel_number; ///< Assigned channel number.
uint8_t channel_type; ///< Channel type (see Assign Channel Parameters in ant_parameters.h: @ref ant_parameters).
uint8_t ext_assign; ///< Extended assign (see Ext. Assign Channel Parameters in ant_parameters.h: @ref ant_parameters).
uint8_t rf_freq; ///< Radio frequency offset from 2400 MHz (for example, 2466 MHz, rf_freq = 66).
uint8_t transmission_type; ///< Transmission type.
uint8_t device_type; ///< Device type.
uint16_t device_number; ///< Device number.
uint16_t channel_period; ///< The period in 32 kHz counts.
uint8_t network_number; ///< Network number denoting the network key.
#if ANT_CONFIG_ENCRYPTED_CHANNELS > 0
ant_encrypt_channel_settings_t * p_crypto_settings; ///< Pointer to cryptographic settings, NULL if this configuration have to be omitted.
#endif
} ant_channel_config_t;
/**@brief Function for configuring the ANT channel.
*
* @param[in] p_config Pointer to the channel configuration structure.
*
* @retval NRF_SUCCESS If the channel was successfully configured. Otherwise, an error code is returned.
*/
uint32_t ant_channel_init(ant_channel_config_t const * p_config);
#ifdef __cplusplus
}
#endif
#endif // ANT_CHANNEL_CONFIG_H__
/** @} */

239
bsp/nrf52832/nRF5_SDK_13.0.0_04a0bfd/components/ant/ant_encryption/ant_encrypt_config.c
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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_ENCRYPT_CONFIG)
#include <stdlib.h>
#include "ant_encrypt_config.h"
#include "ant_interface.h"
#include "ant_parameters.h"
#ifdef ANT_ENCRYPT_NEGOTIATION_SLAVE_ENABLED
#include "ant_encrypt_negotiation_slave.h"
#endif
/*lint -e551 -save*/
/** Flag for checking if stack was configured for encryption. */
static bool m_stack_encryption_configured = false;
/*lint -restore */
/** Pointer to handler of module's events. */
static ant_encryp_user_handler_t m_ant_enc_evt_handler = NULL;
static ret_code_t ant_enc_advance_burs_config_apply(
ant_encrypt_adv_burst_settings_t const * const p_adv_burst_set);
ret_code_t ant_stack_encryption_config(ant_encrypt_stack_settings_t const * const p_crypto_set)
{
ret_code_t err_code;
for ( uint32_t i = 0; i < p_crypto_set->key_number; i++)
{
err_code = sd_ant_crypto_key_set(i, p_crypto_set->pp_key[i]);
VERIFY_SUCCESS(err_code);
}
if (p_crypto_set->p_adv_burst_config != NULL)
{
err_code = ant_enc_advance_burs_config_apply(p_crypto_set->p_adv_burst_config);
VERIFY_SUCCESS(err_code);
}
// subcomands LUT for @ref sd_ant_crypto_info_set calls
const uint8_t set_enc_info_param_lut[] =
{
ENCRYPTION_INFO_SET_CRYPTO_ID,
ENCRYPTION_INFO_SET_CUSTOM_USER_DATA,
ENCRYPTION_INFO_SET_RNG_SEED
};
for ( uint32_t i = 0; i < sizeof(set_enc_info_param_lut); i++)
{
if ( p_crypto_set->info.pp_array[i] != NULL)
{
err_code = sd_ant_crypto_info_set(set_enc_info_param_lut[i],
p_crypto_set->info.pp_array[i]);
VERIFY_SUCCESS(err_code);
}
}
#ifdef ANT_ENCRYPT_NEGOTIATION_SLAVE_ENABLED
// all ANT channels have unsupported slave encryption tracking (even master's channel)
ant_channel_encryp_negotiation_slave_init();
#endif
m_ant_enc_evt_handler = NULL;
m_stack_encryption_configured = true;
return NRF_SUCCESS;
}
/**
* @brief Function for configuring advanced burst settings according to encryption requirements.
*
* @param p_adv_burst_set Pointer to ANT advanced burst settings.
*
* @retval Value returned by @ref sd_ant_adv_burst_config_set.
*/
static ret_code_t ant_enc_advance_burs_config_apply(
ant_encrypt_adv_burst_settings_t const * const p_adv_burst_set)
{
uint8_t adv_burst_conf_str[ADV_BURST_CFG_MIN_SIZE] =
{ ADV_BURST_MODE_ENABLE, 0, 0, 0, 0, 0, 0, 0 };
adv_burst_conf_str[ADV_BURST_CFG_PACKET_SIZE_INDEX] = p_adv_burst_set->packet_length;
adv_burst_conf_str[ADV_BURST_CFG_REQUIRED_FEATURES] = p_adv_burst_set->required_feature;
adv_burst_conf_str[ADV_BURST_CFG_OPTIONAL_FEATURES] = p_adv_burst_set->optional_feature;
return sd_ant_adv_burst_config_set(adv_burst_conf_str, sizeof(adv_burst_conf_str));
}
ret_code_t ant_channel_encrypt_config_perform(uint8_t channel_number,
ant_encrypt_channel_settings_t * p_crypto_config)
{
return sd_ant_crypto_channel_enable(channel_number,
p_crypto_config->mode,
p_crypto_config->key_index,
p_crypto_config->decimation_rate);
}
ret_code_t ant_channel_encrypt_config(uint8_t channel_type,
uint8_t channel_number,
ant_encrypt_channel_settings_t * p_crypto_config)
{
ret_code_t err_code;
if (p_crypto_config != NULL)
{
// encryption of the stack should be initialized previously
if (m_stack_encryption_configured == false)
{
return NRF_ERROR_MODULE_NOT_INITIALZED;
}
switch (channel_type)
{
case CHANNEL_TYPE_MASTER:
err_code = ant_channel_encrypt_config_perform(channel_number, p_crypto_config);
#ifdef ANT_ENCRYPT_NEGOTIATION_SLAVE_ENABLED
ant_channel_encryp_tracking_state_set(channel_number,
ANT_ENC_CHANNEL_STAT_TRACKING_UNSUPPORTED);
#endif
break;
#ifdef ANT_ENCRYPT_NEGOTIATION_SLAVE_ENABLED
case CHANNEL_TYPE_SLAVE:
ant_slave_channel_encrypt_config(channel_number, p_crypto_config);
if (p_crypto_config->mode == ENCRYPTION_DISABLED_MODE)
{
err_code = ant_channel_encrypt_config_perform(channel_number, p_crypto_config);
ant_channel_encryp_tracking_state_set(channel_number,
ANT_ENC_CHANNEL_STAT_TRACKING_UNSUPPORTED);
}
else
{
ant_channel_encryp_tracking_state_set(channel_number,
ANT_ENC_CHANNEL_STAT_NOT_TRACKING);
err_code = NRF_SUCCESS;
}
break;
#endif
default:
err_code = NRF_ERROR_INVALID_PARAM;
break;
}
}
else
{
#ifdef ANT_ENCRYPT_NEGOTIATION_SLAVE_ENABLED
ant_channel_encryp_tracking_state_set(channel_number,
ANT_ENC_CHANNEL_STAT_TRACKING_UNSUPPORTED);
#endif
err_code = NRF_SUCCESS;
}
return err_code;
}
/** @brief Function for calling the handler of module events.*/
static void ant_encrypt_user_handler_try_to_run(uint8_t ant_channel, ant_encrypt_user_evt_t event)
{
if (m_ant_enc_evt_handler != NULL)
{
m_ant_enc_evt_handler(ant_channel, event);
}
}
void ant_encrypt_event_handler(ant_evt_t * p_ant_evt)
{
uint8_t const ant_channel = p_ant_evt->channel;
#ifdef ANT_ENCRYPT_NEGOTIATION_SLAVE_ENABLED
ant_slave_encrypt_negotiation(p_ant_evt);
#endif
switch (p_ant_evt->event)
{
case EVENT_RX_FAIL_GO_TO_SEARCH:
ant_encrypt_user_handler_try_to_run(ant_channel, ANT_ENC_EVT_CHANNEL_LOST);
break;
case EVENT_ENCRYPT_NEGOTIATION_SUCCESS:
ant_encrypt_user_handler_try_to_run(ant_channel, ANT_ENC_EVT_NEGOTIATION_SUCCESS);
break;
case EVENT_ENCRYPT_NEGOTIATION_FAIL:
ant_encrypt_user_handler_try_to_run(ant_channel, ANT_ENC_EVT_NEGOTIATION_FAIL);
break;
}
}
void ant_enc_event_handler_register(ant_encryp_user_handler_t user_handler_func)
{
m_ant_enc_evt_handler = user_handler_func;
}
#endif // NRF_MODULE_ENABLED(ANT_ENCRYPT_CONFIG)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_ENCRYPT_CONFIG__
#define ANT_ENCRYPT_CONFIG__
/**@file
*
* @defgroup ant_encrypt_config ANT encryption configuration
* @{
* @ingroup ant_sdk_utils
*
* @brief Encryption configuration for the ANT stack and channels.
*
*/
#include <stdint.h>
#include "sdk_errors.h"
#include "ant_stack_handler_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/** @name Advanced burst configuration for encryption modules
* @{
*/
#define ADV_BURST_CFG_MIN_SIZE 8 ///< Minimum size of the advance burst configuration data.
#define ADV_BURST_CFG_PACKET_SIZE_INDEX 1 ///< Index of the packet size field in the configuration data.
#define ADV_BURST_CFG_REQUIRED_FEATURES 2 ///< Index of the required features field in the configuration data.
#define ADV_BURST_CFG_OPTIONAL_FEATURES 5 ///< Index of the optional features field in the configuration data.
/**@} */
/** @brief ANT channel cryptographic configuration. */
typedef struct
{
uint8_t mode; ///< Encryption mode. See the encrypted channel defines in ant_parameters.h.
uint8_t key_index; ///< Index of encryption key.
uint8_t decimation_rate; ///< Division of the master channel rate by the slave’s tracking channel rate.
} ant_encrypt_channel_settings_t;
/** @brief ANT encryption information. */
typedef union
{
uint8_t * pp_array[3]; // For array access support.
struct
{
uint8_t * p_encryption_id; ///< Pointer to the encryption ID of the device (4 bytes).
uint8_t * p_user_info; ///< Pointer to the user information string (19 bytes).
uint8_t * p_random_num_seed; ///< Pointer to the random number seed (16 bytes).
} items;
} ant_encrypt_info_settings_t;
/** @brief Advanced burst settings used by the encrypted channel. */
typedef struct
{
uint8_t packet_length; ///< RF payload size. See the advanced burst configuration defines in ant_parameters.h.
uint8_t required_feature; ///< Required advanced burst modes. See the advanced burst configuration defines in ant_parameters.h.
uint8_t optional_feature; ///< Optional advanced burst modes. See the advanced burst configuration defines in ant_parameters.h.
} ant_encrypt_adv_burst_settings_t;
/**@brief ANT stack cryptographic configuration. */
typedef struct
{
ant_encrypt_info_settings_t info; ///< Pointer to the encryption information structure.
uint8_t * * pp_key; ///< Pointer to an array for pointers to encryption keys. Each key must have a length of 16 bytes.
uint8_t key_number; ///< Number of encryption keys.
ant_encrypt_adv_burst_settings_t * p_adv_burst_config; ///< Advanced burst configuration. If NULL, the advanced burst must be configured externally.
} ant_encrypt_stack_settings_t;
/**
* @brief ANT encryption negotiation events.
*/
typedef enum
{
ANT_ENC_EVT_NEGOTIATION_SUCCESS, ///< Negotiation success.
ANT_ENC_EVT_NEGOTIATION_FAIL, ///< Negotiation failure.
ANT_ENC_EVT_CHANNEL_LOST ///< Lost a channel. It's relevant only for slave channels.
} ant_encrypt_user_evt_t;
/**
* @brief Event handler for ANT encryption user events.
*/
typedef void (* ant_encryp_user_handler_t)(uint8_t channel, ant_encrypt_user_evt_t event);
/**
* @brief Macro for initializing an ANT encryption information structure.
*
* @param[in] P_ENC_ID Pointer to the encryption ID of the device (4 bytes).
* @param[in] P_USER_INFO Pointer to the user information string (19 bytes).
* @param[in] P_RAND_NUM_SEED Pointer to the random number seed (16 bytes).
*/
#define ANT_CRYPTO_INFO_SETTINGS_INIT(P_ENC_ID, P_USER_INFO, P_RAND_NUM_SEED) \
{ \
.items = \
{ \
.p_encryption_id = P_ENC_ID, \
.p_user_info = P_USER_INFO, \
.p_random_num_seed = P_RAND_NUM_SEED \
} \
}
/**
* @brief Macro for declaring the basic cryptographic configuration for the ANT stack.
*
* This macro configures the following settings:
* - Cryptographic key
* - Encryption ID
* - Advanced burst mode with the maximum RF payload size
*
* Use @ref ANT_ENCRYPT_STACK_SETTINGS_BASE to access the created configuration instance.
*
* @param[in] NAME Name for the created data instance.
* @param[in] P_KEY Pointer to the cryptographic key (16 bytes).
* @param[in] P_ENC_ID Pointer to the encryption ID (4 bytes).
*/
#define ANT_ENCRYPT_STACK_SETTINGS_BASE_DEF(NAME, P_KEY, P_ENC_ID) \
ant_encrypt_adv_burst_settings_t NAME##_ant_enc_adv_burst_set = \
{ \
.packet_length = ADV_BURST_MODES_MAX_SIZE, \
.required_feature = 0, \
.optional_feature = 0 \
}; \
uint8_t * pp_##NAME##_key[1] = {P_KEY}; \
ant_encrypt_stack_settings_t NAME ## _ant_crypto_settings = \
{ \
.info = ANT_CRYPTO_INFO_SETTINGS_INIT(P_ENC_ID, NULL, NULL), \
.pp_key = pp_##NAME##_key, \
.key_number = 1, \
.p_adv_burst_config = &NAME##_ant_enc_adv_burst_set \
}
/** @brief Macro for accessing the configuration instance created
* by @ref ANT_ENCRYPT_STACK_SETTINGS_BASE_DEF.
*
* @param[in] NAME Name of the settings instance.
*/
#define ANT_ENCRYPT_STACK_SETTINGS_BASE(NAME) (NAME##_ant_crypto_settings)
/**
* @brief Function for applying an encryption configuration to a slave channel.
*
* This function enables encryption on a channel.
*
* This function should be used by the @ref ant_encrypt_negotiation_slave module and this module.
*
* @param[in] channel_number ANT channel number.
* @param[in] p_crypto_config Pointer to the encryption configuration.
*
* @return Value returned by @ref sd_ant_crypto_channel_enable (for example, NRF_SUCCESS if
* the configuration was successful).
*/
ret_code_t ant_channel_encrypt_config_perform(uint8_t channel_number,
ant_encrypt_channel_settings_t * p_crypto_config);
/**
* @brief Function for applying an encryption configuration to a master or slave channel.
*
* When called for a master channel, this function enables encryption
* for that channel. When called for a slave channel, it saves
* the encryption configuration for future use.
*
* This function should be used by the @ref ant_channel_config module.
*
* @param[in] channel_type ANT channel type: CHANNEL_TYPE_SLAVE or CHANNEL_TYPE_MASTER.
* @param[in] channel_num ANT channel number.
* @param[in] p_crypto_config Pointer to the encryption configuration.
*
* @retval NRF_SUCCESS If the function completed successfully.
* @retval NRF_ERROR_INVALID_PARAM If the channel type is invalid.
* @retval NRF_ERROR_MODULE_NOT_INITIALZED If the stack is not configured for encryption.
* @retval Other Otherwise, the error value returned by the @ref
* ant_channel_encrypt_config_perform function is returned.
*/
ret_code_t ant_channel_encrypt_config(uint8_t channel_type,
uint8_t channel_num,
ant_encrypt_channel_settings_t * p_crypto_config);
/**
* @brief Function for configuring the cryptographic settings of the ANT stack.
*
* @param[in] p_crypto_info_set Pointer to the settings.
*/
ret_code_t ant_stack_encryption_config(ant_encrypt_stack_settings_t const * const p_crypto_info_set);
/**
* @brief Function for handling ANT encryption events.
*
* This function should be used directly in the ANT event dispatching process.
* It serves the ANT encryption events to the registered event handler.
* If @ref ant_encrypt_negotiation_slave is used, this function is required.
*
* This function should be used by the @ref ant_encrypt_config module.
*
* @param[in] p_ant_evt Pointer to the ANT stack event message structure.
*/
void ant_encrypt_event_handler(ant_evt_t * p_ant_evt);
/**
* @brief Function for registering an event handler for ANT encryption events.
*
* The event handler should support all of the events in @ref ant_encrypt_user_evt_t.
*
* @param[in] p_handler Pointer to a handler function.
*/
void ant_enc_event_handler_register(ant_encryp_user_handler_t p_handler);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif // ANT_ENCRYPT_CONFIG__

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_ENCRYPT_NEGOTIATION_SLAVE)
#include <stdlib.h>
#include <string.h>
#include "ant_encrypt_config.h"
#include "ant_interface.h"
#include "ant_parameters.h"
#include "nrf_error.h"
#include "app_error.h"
#include "ant_encrypt_negotiation_slave.h"
/** Number of supported channels. */
#define NUMBER_OF_CHANNELS (ANT_CONFIG_TOTAL_CHANNELS_ALLOCATED)
/** Flag to block other channels from attempting to enable encryption while
* another encryption is in the process.
*/
static volatile bool m_can_enable_crypto = true;
/** Array to keep track of which channels are currently tracking. */
static ant_encrypt_tracking_state_t m_encrypt_channel_states[NUMBER_OF_CHANNELS];
/** Array for the slave channels' encryption settings. */
static ant_encrypt_channel_settings_t m_slave_channel_conf[MAX_ANT_CHANNELS];
void ant_channel_encryp_tracking_state_set(uint8_t channel_number,
ant_encrypt_tracking_state_t state)
{
m_encrypt_channel_states[channel_number] = state;
}
void ant_channel_encryp_negotiation_slave_init(void)
{
for (uint32_t channel = 0; channel < NUMBER_OF_CHANNELS; channel++)
{
ant_channel_encryp_tracking_state_set(channel, ANT_ENC_CHANNEL_STAT_TRACKING_UNSUPPORTED);
}
m_can_enable_crypto = true;
}
ant_encrypt_tracking_state_t ant_channel_encryp_tracking_state_get(uint8_t channel_number)
{
return m_encrypt_channel_states[channel_number];
}
void ant_slave_channel_encrypt_config(uint8_t channel_number,
ant_encrypt_channel_settings_t const * const p_crypto_config)
{
memcpy(&m_slave_channel_conf[channel_number], p_crypto_config,
sizeof(ant_encrypt_channel_settings_t));
}
/**@brief Function for handling ANT RX channel events.
*
* @param[in] p_event_message_buffer The ANT event message buffer.
*/
static void ant_slave_encrypt_try_enable(uint8_t ant_channel,
uint8_t ant_message_id)
{
uint32_t err_code;
ant_encrypt_tracking_state_t track_stat;
switch (ant_message_id)
{
// Broadcast data received.
case MESG_BROADCAST_DATA_ID:
track_stat = ant_channel_encryp_tracking_state_get(ant_channel);
// If the encryption has not yet been negotiated for this channel and another channel
// is not currently trying to enable encryption, enable encryption
if ((track_stat != ANT_ENC_CHANNEL_STAT_TRACKING_DECRYPTED)
&& (track_stat != ANT_ENC_CHANNEL_STAT_NEGOTIATING)
&& m_can_enable_crypto)
{
// Block other channels from trying to enable encryption until this channel
// is finished
m_can_enable_crypto = false;
ant_channel_encryp_tracking_state_set(ant_channel,
ANT_ENC_CHANNEL_STAT_NEGOTIATING);
// Enable encryption on ant_channel
err_code =
ant_channel_encrypt_config_perform(ant_channel,
&m_slave_channel_conf[ant_channel]);
APP_ERROR_CHECK(err_code);
}
break;
default:
break;
}
}
void ant_slave_encrypt_negotiation(ant_evt_t * p_ant_evt)
{
uint8_t const ant_channel = p_ant_evt->channel;
ANT_MESSAGE * p_ant_msg;
ant_encrypt_tracking_state_t track_state = ant_channel_encryp_tracking_state_get(ant_channel);
if (track_state == ANT_ENC_CHANNEL_STAT_TRACKING_UNSUPPORTED)
return;
switch (p_ant_evt->event)
{
case EVENT_RX_FAIL_GO_TO_SEARCH:
if (track_state == ANT_ENC_CHANNEL_STAT_NEGOTIATING)
{
m_can_enable_crypto = true;
}
ant_channel_encryp_tracking_state_set(ant_channel, ANT_ENC_CHANNEL_STAT_NOT_TRACKING);
break;
case EVENT_RX:
/*lint -e545 -save*/
p_ant_msg = (ANT_MESSAGE *) &(p_ant_evt->msg.evt_buffer);
/*lint -restore*/
ant_slave_encrypt_try_enable(ant_channel, p_ant_msg->ANT_MESSAGE_ucMesgID);
break;
case EVENT_ENCRYPT_NEGOTIATION_SUCCESS:
m_can_enable_crypto = true;
ant_channel_encryp_tracking_state_set(ant_channel,
ANT_ENC_CHANNEL_STAT_TRACKING_DECRYPTED);
break;
case EVENT_ENCRYPT_NEGOTIATION_FAIL:
m_can_enable_crypto = true;
ant_channel_encryp_tracking_state_set(ant_channel,
ANT_ENC_CHANNEL_STAT_TRACKING_ENCRYPTED);
break;
default:
break;
}
}
#endif // NRF_MODULE_ENABLED(ANT_ENCRYPT_NEGOTIATION_SLAVE)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_ENCRYPT_NEGOTIATION_SLAVE_H__
#define ANT_ENCRYPT_NEGOTIATION_SLAVE_H__
/**@file
*
* @defgroup ant_encrypt_negotiation_slave ANT encryption negotiation
* @{
* @ingroup ant_sdk_utils
*
* @brief Encryption negotiation for encrypted ANT slave channels.
*
* After pairing, the slave starts negotiating the encryption with the master. After
* successful negotiation, the slave can decrypt messages from the master, and all
* future messages are sent encrypted.
*
*/
#include <stdint.h>
#include "ant_stack_handler_types.h"
#include "ant_encrypt_config.h"
#ifdef __cplusplus
extern "C" {
#endif
/** Encryption negotiation states for a slave channel. */
typedef enum
{
ANT_ENC_CHANNEL_STAT_NOT_TRACKING, ///< Not tracking the master.
ANT_ENC_CHANNEL_STAT_TRACKING_ENCRYPTED, ///< Tracking the master, but cannot decrypt messages.
ANT_ENC_CHANNEL_STAT_NEGOTIATING, ///< Encryption has been enabled and negotiation is in progress.
ANT_ENC_CHANNEL_STAT_TRACKING_DECRYPTED, ///< Tracking the master and can decrypt messages.
ANT_ENC_CHANNEL_STAT_TRACKING_UNSUPPORTED ///< Tracking unsupported on this channel.
} ant_encrypt_tracking_state_t;
/**
* @brief Function for setting the encryption negotiation state of a slave ANT channel.
*
* This function should be used by the @ref ant_encrypt_config module.
*
* @param[in] channel_number ANT channel number.
* @param[in] state State to set.
*/
void ant_channel_encryp_tracking_state_set(uint8_t channel_number,
ant_encrypt_tracking_state_t state);
/**
* @brief Function for getting the encryption negotiation state of a slave ANT channel.
*
* @param[in] channel_number ANT channel number.
*/
ant_encrypt_tracking_state_t ant_channel_encryp_tracking_state_get(uint8_t channel_number);
/**
* @brief Function for initializing the module.
*
* This function initializes internal states of the module. It should
* only be used by the @ref ant_encrypt_config module.
*
*/
void ant_channel_encryp_negotiation_slave_init(void);
/**
* @brief Function for setting the configuration for the slave channel.
*
* This function saves the channel's encryption configuration to a lookup table (LUT) for
* future usage. The configuration can then be used to enable encryption.
*
* This function is intended to be used by the @ref ant_encrypt_config module.
*
* @param[in] channel_number ANT channel number.
* @param[in] p_crypto_config Pointer to the encryption configuration.
*/
void ant_slave_channel_encrypt_config(uint8_t channel_number,
ant_encrypt_channel_settings_t const * const p_crypto_config);
/**
* @brief Function for handling ANT encryption negotiation on slave nodes.
*
* This function should be used directly in the ANT event dispatching process. It
* tries to enable slave channel encryption for all slave channels that are declared
* as encrypted channels (if appropriate master channels are found).
*
* This function should be used by the @ref ant_encrypt_config module.
*
* @param[in] p_ant_evt Pointer to the ANT stack event message structure.
*/
void ant_slave_encrypt_negotiation(ant_evt_t * p_ant_evt);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif // ANT_ENCRYPT_NEGOTIATION_SLAVE_H__

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/**
* This software is subject to the ANT+ Shared Source License
* www.thisisant.com/swlicenses
* Copyright (c) Dynastream Innovations, Inc. 2012
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1) Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* 2) Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3) Neither the name of Dynastream nor the names of its
* contributors may be used to endorse or promote products
* derived from this software without specific prior
* written permission.
*
* The following actions are prohibited:
* 1) Redistribution of source code containing the ANT+ Network
* Key. The ANT+ Network Key is available to ANT+ Adopters.
* Please refer to http://thisisant.com to become an ANT+
* Adopter and access the key.
*
* 2) Reverse engineering, decompilation, and/or disassembly of
* software provided in binary form under this license.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW
* THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE
* ABOVE LIMITATIONS MAY NOT APPLY TO YOU.
*
*/
/**@file
* @brief The ANT-FS client protocol interface.
* This file is based on implementation originally made by Dynastream Innovations Inc. - August 2012
* @defgroup ant_fs ANT-FS client device simulator
* @{
* @ingroup ant_sdk_utils
*
* @brief The ANT-FS client device simulator.
*
* @note The ANT-FS Network Key is available for ANT+ Adopters. Please refer to http://thisisant.com to become an ANT+ Adopter and access the key.
*/
#ifndef ANTFS_H__
#define ANTFS_H__
#include <stdint.h>
#include <stdbool.h>
#include "defines.h"
#include "sdk_config.h"
#ifdef __cplusplus
extern "C" {
#endif
#define ANTFS_VERSION_MAJOR 1u /**< Version major number. */
#define ANTFS_VERSION_MINOR 0 /**< Version minor number. */
#define ANTFS_VERSION_ITERATION 0 /**< Version iteration. */
#define ANTFS_VERSION_TYPE 'R' /**< Version type is release. */
#define ANTFS_VERSION_SPEC '0.AK' /**< Version of the ANT-FS Technology Specification. */
#define ANTFS_DIR_STRUCT_VERSION 1u /**< Version of the directory file structure. */
#define ANTFS_VERSION_DATE 20090522u /**< Version date. */
// ANT-FS options.
#define ANTFS_LINK_FREQ 50u /**< RF Frequency (+2400MHz). */
#define ANTFS_CHANNEL_TYPE CHANNEL_TYPE_MASTER /**< ANT-FS Client Channel Type. */
#define ANTFS_AUTH_STRING_MAX 255u /**< Maximum size of authentication strings (passkey/friendly name). */
#define ANTFS_PASSKEY_SIZE 16u /**< Passkey size. */
#define ANTFS_FRIENDLY_NAME_MAX 16u /**< Maximum size of friendly name received from host. */
#define ANTFS_REMOTE_FRIENDLY_NAME_MAX 16u /**< Maximum size of client's friendly name. */
// Beacon definitions.
#define BEACON_PERIOD_SHIFT 0x00 /**< Shift value for masking out beacon period. */
#define BEACON_PERIOD_MASK (0x07u << BEACON_PERIOD_SHIFT) /**< Beacon period bitmask. */
#define BEACON_PERIOD_0_5_HZ (0x00 << BEACON_PERIOD_SHIFT) /**< Value for 0,5Hz beacon period. */
#define BEACON_PERIOD_1_HZ (0x01u << BEACON_PERIOD_SHIFT) /**< Value for 1Hz beacon period. */
#define BEACON_PERIOD_2_HZ (0x02u << BEACON_PERIOD_SHIFT) /**< Value for 2Hz beacon period. */
#define BEACON_PERIOD_4_HZ (0x03u << BEACON_PERIOD_SHIFT) /**< Value for 4Hz beacon period. */
#define BEACON_PERIOD_8_HZ (0x04u << BEACON_PERIOD_SHIFT) /**< Value for 8Hz beacon period. */
#define PAIRING_AVAILABLE_FLAG_SHIFT 0x03u /**< Shift value for masking out pairing enabled bit. */
#define PAIRING_AVAILABLE_FLAG_MASK (0x01u << PAIRING_AVAILABLE_FLAG_SHIFT) /**< Pairing enabled bitmask. */
#define UPLOAD_ENABLED_FLAG_SHIFT 0x04u /**< Shift value for masking out upload enabled bit. */
#define UPLOAD_ENABLED_FLAG_MASK (0x01u << UPLOAD_ENABLED_FLAG_SHIFT) /**< Upload enabled bitmask. */
#define DATA_AVAILABLE_FLAG_SHIFT 0x05u /**< Shift value for masking out data available bit. */
#define DATA_AVAILABLE_FLAG_MASK (0x01u << DATA_AVAILABLE_FLAG_SHIFT) /**< Data available bitmask. */
#if ANTFS_ENABLED
// Build the default beacon settings.
#if ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED
#define ANTFS_PAIRING_BIT PAIRING_AVAILABLE_FLAG_MASK /**< Build pairing enabled default beacon setting. */
#else
#define ANTFS_PAIRING_BIT 0x00u /**< Build pairing disabled default beacon setting. */
#endif // ANTFS_CONFIG_AUTH_TYPE_PAIRING_ENABLED
#if ANTFS_CONFIG_UPLOAD_ENABLED
#define ANTFS_UPLOAD_BIT UPLOAD_ENABLED_FLAG_MASK /**< Build upload enabled default beacon setting. */
#else
#define ANTFS_UPLOAD_BIT 0x00u /**< Build upload disabled default beacon setting. */
#endif // ANTFS_CONFIG_UPLOAD_ENABLED
#define ANTFS_DEFAULT_BEACON (ANTFS_CONFIG_BEACON_STATUS_PERIOD | ANTFS_UPLOAD_BIT | ANTFS_PAIRING_BIT | DATA_AVAILABLE_FLAG_MASK) /**< Define the default beacon setting. */
#endif // ANTFS_ENABLED
// Download/Upload responses.
#define RESPONSE_MESSAGE_OK 0x00u /**< Download request ok. */
#define RESPONSE_MESSAGE_NOT_EXIST 0x01u /**< File does not exist. */
#define RESPONSE_MESSAGE_NOT_AVAILABLE 0x02u /**< File can not be read/written to (download/upload respectively). */
#define RESPONSE_INVALID_OPERATION 0x04u /**< Request invalid. */
// Download responses.
#define RESPONSE_MESSAGE_NOT_READY 0x03u /**< Not ready to download. */
#define RESPONSE_INVALID_CRC 0x05u /**< CRC incorrect. */
// Upload responses.
#define RESPONSE_MESSAGE_NOT_ENOUGH_SPACE 0x03u /**< Not enough space to to complete write. */
#define RESPONSE_MESSAGE_UPLOAD_NOT_READY 0x05u /**< Not ready to upload */
// Upload/Erase responses.
#define RESPONSE_MESSAGE_FAIL 0x01u /**< Data File Index does not exist / Erase failed. */
// Directory general file flags.
#define ANTFS_DIR_READ_MASK 0x80u /**< Read (can download). */
#define ANTFS_DIR_WRITE_MASK 0x40u /**< Write (can upload). */
#define ANTFS_DIR_ERASE_MASK 0x20u /**< Erase (can erase). */
#define ANTFS_DIR_ARCHIVE_MASK 0x10u /**< Archive (has been downloaded). */
#define ANTFS_DIR_APPEND_MASK 0x08u /**< Append (can append to file only). */
#define ANTFS_MAX_FILE_SIZE 0xFFFFFFFFu /**< Maximum file size, as specified by directory structure. */
#define ANTFS_BURST_BLOCK_SIZE 16u /**< Size of each block of burst data that the client attempts to send when it processes a data request event. */
/**@brief ANT-FS beacon status. */
typedef union
{
uint32_t status; /**< Beacon status byte 1. */
struct
{
uint32_t link_period : 3; /**< Beacon period (0.5 - 8 Hz). */
bool is_pairing_enabled : 1; /**< Pairing is enabled/disabled. */
bool is_upload_enabled : 1; /**< Upload is enabled/disabled. */
bool is_data_available : 1; /**< Data is available for download / no data available. */
bool reserved : 2; /**< Reserved. */
} parameters;
} antfs_beacon_status_byte1_t;
// ANT-FS states.
typedef enum
{
ANTFS_STATE_OFF, /**< Off state. */
ANTFS_STATE_INIT, /**< Init state. */
ANTFS_STATE_LINK, /**< Link state. */
ANTFS_STATE_AUTH, /**< Authenticate state. */
ANTFS_STATE_TRANS /**< Transport state. */
} antfs_state_t;
// ANT-FS link layer substates.
typedef enum
{
ANTFS_LINK_SUBSTATE_NONE /**< None state. */
} antfs_link_substate_t;
// ANT-FS authenticate layer substates. */
typedef enum
{
ANTFS_AUTH_SUBSTATE_NONE, /**< None state. */
ANTFS_AUTH_SUBSTATE_PAIR, /**< Pairing state. */
ANTFS_AUTH_SUBSTATE_PASSKEY, /**< Passkey state. */
ANTFS_AUTH_SUBSTATE_ACCEPT, /**< Authenticate accept state. */
ANTFS_AUTH_SUBSTATE_REJECT /**< Authenticate reject state. */
} antfs_authenticate_substate_t;
// ANT-FS transport layer substates. */
typedef enum
{
ANTFS_TRANS_SUBSTATE_NONE, /**< None state. */
ANTFS_TRANS_SUBSTATE_VERIFY_CRC, /**< Verify CRC state. */
ANTFS_TRANS_SUBSTATE_DOWNLOADING, /**< Downloading state. */
ANTFS_TRANS_SUBSTATE_UPLOAD_WAIT_FOR_DATA, /**< Wait for upload data request state. */
ANTFS_TRANS_SUBSTATE_UPLOADING, /**< Ready / receiving upload data state. */
ANTFS_TRANS_SUBSTATE_UPLOAD_RESUME /**< RX failure upon receiving upload data state. */
} antfs_transport_substate_t;
// ANT-FS Events.
typedef enum
{
ANTFS_EVENT_PAIRING_REQUEST = 0xB0, /**< Pairing request event. */
ANTFS_EVENT_PAIRING_TIMEOUT = 0xB1, /**< Pairing timeout event. */
ANTFS_EVENT_OPEN_COMPLETE = 0xB2, /**< Channel setup complete event. */
ANTFS_EVENT_CLOSE_COMPLETE = 0xB4, /**< Channel closed event. */
ANTFS_EVENT_LINK = 0xB6, /**< Enter link layer event. */
ANTFS_EVENT_AUTH = 0xB7, /**< Enter authenticate layer event. */
ANTFS_EVENT_TRANS = 0xB8, /**< Enter transport layer event. */
ANTFS_EVENT_DOWNLOAD_REQUEST = 0xB9, /**< Download request event. */
ANTFS_EVENT_DOWNLOAD_REQUEST_DATA = 0xBA, /**< Download request data event. */
ANTFS_EVENT_DOWNLOAD_START = 0xBB, /**< Download started event. */
ANTFS_EVENT_DOWNLOAD_COMPLETE = 0xBC, /**< Download completed event. */
ANTFS_EVENT_DOWNLOAD_FAIL = 0xBD, /**< Download failed event. */
ANTFS_EVENT_UPLOAD_REQUEST = 0xBE, /**< Upload request event. */
ANTFS_EVENT_UPLOAD_DATA = 0xBF, /**< Upload data available for read event. */
ANTFS_EVENT_UPLOAD_START = 0xC0, /**< Upload begin event. */
ANTFS_EVENT_UPLOAD_COMPLETE = 0xC1, /**< Upload completed event. */
ANTFS_EVENT_UPLOAD_FAIL = 0xC2, /**< Upload process failed event. */
ANTFS_EVENT_ERASE_REQUEST = 0xC3 /**< Erase request event. */
} antfs_event_t;
/**@brief ANT-FS <-> application event communication object. */
typedef struct
{
antfs_event_t event; /**< ANT-FS event. */
uint16_t file_index; /**< File index (download/upload/erase). */
uint32_t offset; /**< Current offset (download/upload). */
uint32_t bytes; /**< Number of bytes in block (download/upload). */
uint16_t crc; /**< Current CRC (upload). */
uint8_t data[8]; /**< Block of data (upload). */
} antfs_event_return_t;
/**@brief ANT-FS parameters. */
typedef struct
{
uint32_t client_serial_number; /**< Client serial number. */
uint16_t beacon_device_type; /**< Client device type. */
uint16_t beacon_device_manufacturing_id; /**< Client manufacturing ID. */
uint8_t beacon_frequency; /**< Beacon RF Frequency. */
antfs_beacon_status_byte1_t beacon_status_byte1; /**< Beacon status byte 1. */
const uint8_t * p_pass_key; /**< Pass Key. */
const uint8_t * p_remote_friendly_name; /**< Friendly Name. */
} antfs_params_t;
/**@brief ANT-FS directory header. */
typedef struct
{
uint8_t version; /**< Version of the directory file structure. */
uint8_t length; /**< Length of each structure, in bytes. */
uint8_t time_format; /**< Defines how system keeps track of date/time stamps. */
uint8_t reserved01;
uint8_t reserved02;
uint8_t reserved03;
uint8_t reserved04;
uint8_t reserved05;
uint32_t system_time; /**< Number of seconds elapsed since system power up. */
uint32_t date; /**< Number of seconds elapsed since 00:00 hrs Dec 31, 1989. If system time is unknown, used as counter. */
} antfs_dir_header_t;
/**@brief ANT-FS directory entry. */
typedef struct
{
uint16_t data_file_index; /**< Data file index. */
uint8_t file_data_type; /**< File data type. */
uint8_t user_defined1; /**< Identifier, first byte (structure defined by data type). */
uint16_t user_defined2; /**< Identifier, last two bytes (structure defined by data type). */
uint8_t user_flags; /**< File data type specific flags (bits defined by data type). */
uint8_t general_flags; /**< Bit mapped flags of flag permissions. */
uint32_t file_size_in_bytes; /**< File size, in bytes. */
uint32_t date; /**< Number of seconds elapsed since 00:00 hrs Dec 31, 1980, if supported. */
} antfs_dir_struct_t;
/**@brief ANT-FS download/upload request context. */
typedef struct
{
ulong_union_t file_size; /**< Size of a file to download when reading, or the size of a partially completed upload when writing. */
uint32_t max_file_size; /**< The maximum size of the file specified, this is the file size when reading, and the maximum allowed file size when writing. */
ulong_union_t max_burst_block_size; /**< Maximum burst block size. */
ushort_union_t file_index; /**< File index. */
uint16_t file_crc; /**< CRC (uploads). */
} antfs_request_info_t;
/**@brief The burst wait handler can be configured by the application to customize the code that is
* executed while waiting for the burst busy flag. */
typedef void(*antfs_burst_wait_handler_t)(void);
/**@brief Function for setting initial ANT-FS configuration parameters.
*
* @param[in] p_params The initial ANT-FS configuration parameters.
* @param[in] burst_wait_handler Burst wait handler.
*/
void antfs_init(const antfs_params_t * const p_params,
antfs_burst_wait_handler_t burst_wait_handler);
/**@brief Function for getting host name if received.
*
* @return Pointer to host name buffer if a host name was recieved, NULL otherwise.
*/
const char * antfs_hostname_get(void);
/**@brief Function for transmitting a response to a pairing request issued by ANT-FS host.
*
* @param[in] accept The pairing response, true if pairing accepted.
*
* @retval true Operation success. Response to a pairing request was transmitted.
* @retval false Operation failure. Not in pairing mode or pairing not supported by the
* implementation.
*/
bool antfs_pairing_resp_transmit(bool accept);
/**@brief Function for doing calculations prior downloading the data to the ANT-FS host.
*
* Function does the necessary pre processing calculations, which are required prior downloading the
* data, and also transmits the download request response right away in case of the download request
* was rejected or there is no data to send.
*
* @param[in] response The download request response code.
* @param[in] p_request_info ANT-FS request info structure.
*/
void antfs_download_req_resp_prepare(uint8_t response,
const antfs_request_info_t * const p_request_info);
/**@brief Function for downloading requested data.
*
* @param[in] index Index of the current file downloaded.
* @param[in] offset Offset specified by client.
* @param[in] num_bytes Number of bytes requested to be transmitted from the buffer.
* @param[in] p_message Data buffer to be transmitted.
*
* @return Number of data bytes transmitted.
*/
uint32_t antfs_input_data_download(uint16_t index,
uint32_t offset,
uint32_t num_bytes,
const uint8_t * const p_message);
/**@brief Function for transmitting upload request response to a upload request command by ANT-FS
* host.
*
* @param[in] response The upload response code.
* @param[in] p_request_info ANT-FS request info structure.
*
* @retval true Operation success. Response to upload request command was transmitted.
* @retval false Operation failure. Upload not supported by the implementation or not in correct
* state or application is sending a response for a different file
* than requested.
*/
bool antfs_upload_req_resp_transmit(uint8_t response,
const antfs_request_info_t * const p_request_info);
/**@brief Function for transmitting upload data response to a upload data command by ANT-FS host.
*
* @param[in] data_upload_success The upload response code, true for success.
*
* @retval true Operation success. Response to upload data command was transmitted.
* @retval false Operation failure. Upload not supported by the implementation or not in correct
* state.
*/
bool antfs_upload_data_resp_transmit(bool data_upload_success);
/**@brief Function for transmitting erase response to a erase request.
*
* @param[in] response The erase response code.
*/
void antfs_erase_req_resp_transmit(uint8_t response);
/**@brief Function for extracting possible pending ANT-FS event.
*
* @param[out] p_event The output event structure.
*
* @retval true Operation success. Pending ANT-FS event available and it was copied to the output
* event structure.
* @retval false Operation failure. No pending ANT-FS event available.
*/
bool antfs_event_extract(antfs_event_return_t * const p_event);
/**@brief Function for processing ANT events and data received from the ANT-FS channel.
*
* @param[in] p_message The message buffer containing the message received from the ANT-FS
* channel.
*/
void antfs_message_process(uint8_t * p_message);
/**@brief Function for setting up the ANT-FS channel.
*/
void antfs_channel_setup(void);
#ifdef __cplusplus
}
#endif
#endif // ANTFS_H__
/**
*@}
**/

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/**
* This software is subject to the ANT+ Shared Source License
* www.thisisant.com/swlicenses
* Copyright (c) Dynastream Innovations, Inc. 2012
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1) Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* 2) Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3) Neither the name of Dynastream nor the names of its
* contributors may be used to endorse or promote products
* derived from this software without specific prior
* written permission.
*
* The following actions are prohibited:
* 1) Redistribution of source code containing the ANT+ Network
* Key. The ANT+ Network Key is available to ANT+ Adopters.
* Please refer to http://thisisant.com to become an ANT+
* Adopter and access the key.
*
* 2) Reverse engineering, decompilation, and/or disassembly of
* software provided in binary form under this license.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW
* THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE
* ABOVE LIMITATIONS MAY NOT APPLY TO YOU.
*
*/
#include "crc.h"
#include "compiler_abstraction.h"
/**@brief Function for updating the current CRC-16 value for a single byte input.
*
* @param[in] current_crc The current calculated CRC-16 value.
* @param[in] byte The input data byte for the computation.
*
* @return The updated CRC-16 value, based on the input supplied.
*/
static __INLINE uint16_t crc16_get(uint16_t current_crc, uint8_t byte)
{
static const uint16_t crc16_table[16] =
{
0x0000, 0xCC01, 0xD801, 0x1400, 0xF001, 0x3C00, 0x2800, 0xE401,
0xA001, 0x6C00, 0x7800, 0xB401, 0x5000, 0x9C01, 0x8801, 0x4400
};
uint16_t temp;
// Compute checksum of lower four bits of a byte.
temp = crc16_table[current_crc & 0xF];
current_crc = (current_crc >> 4u) & 0x0FFFu;
current_crc = current_crc ^ temp ^ crc16_table[byte & 0xF];
// Now compute checksum of upper four bits of a byte.
temp = crc16_table[current_crc & 0xF];
current_crc = (current_crc >> 4u) & 0x0FFFu;
current_crc = current_crc ^ temp ^ crc16_table[(byte >> 4u) & 0xF];
return current_crc;
}
uint16_t crc_crc16_update(uint16_t current_crc, const volatile void * p_data, uint32_t size)
{
uint8_t * p_block = (uint8_t *)p_data;
while (size != 0)
{
current_crc = crc16_get(current_crc, *p_block);
p_block++;
size--;
}
return current_crc;
}

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/**
* This software is subject to the ANT+ Shared Source License
* www.thisisant.com/swlicenses
* Copyright (c) Dynastream Innovations, Inc. 2012
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1) Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* 2) Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3) Neither the name of Dynastream nor the names of its
* contributors may be used to endorse or promote products
* derived from this software without specific prior
* written permission.
*
* The following actions are prohibited:
* 1) Redistribution of source code containing the ANT+ Network
* Key. The ANT+ Network Key is available to ANT+ Adopters.
* Please refer to http://thisisant.com to become an ANT+
* Adopter and access the key.
*
* 2) Reverse engineering, decompilation, and/or disassembly of
* software provided in binary form under this license.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW
* THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE
* ABOVE LIMITATIONS MAY NOT APPLY TO YOU.
*
*/
/** @file
* @brief The CRC-16 interface.
* This file is based on implementation originally made by Dynastream Innovations Inc. - August 2012
* @defgroup ant_fs_client_main ANT-FS client device simulator
* @{
* @ingroup ant_fs
*
* @brief The ANT-FS client device simulator.
*
*/
#ifndef CRC_H__
#define CRC_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Function for calculating CRC-16 in blocks.
*
* Feed each consecutive data block into this function, along with the current value of current_crc
* as returned by the previous call of this function. The first call of this function should pass
* the initial value (usually 0) of the crc in current_crc.
* @param[in] current_crc The current calculated CRC-16 value.
* @param[in] p_data The input data block for computation.
* @param[in] size The size of the input data block in bytes.
*
* @return The updated CRC-16 value, based on the input supplied.
*/
uint16_t crc_crc16_update(uint16_t current_crc, const volatile void * p_data, uint32_t size);
#ifdef __cplusplus
}
#endif
#endif // CRC_H__
/**
*@}
**/

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/**
* This software is subject to the ANT+ Shared Source License
* www.thisisant.com/swlicenses
* Copyright (c) Dynastream Innovations, Inc. 2012
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
* 1) Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* 2) Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3) Neither the name of Dynastream nor the names of its
* contributors may be used to endorse or promote products
* derived from this software without specific prior
* written permission.
*
* The following actions are prohibited:
* 1) Redistribution of source code containing the ANT+ Network
* Key. The ANT+ Network Key is available to ANT+ Adopters.
* Please refer to http://thisisant.com to become an ANT+
* Adopter and access the key.
*
* 2) Reverse engineering, decompilation, and/or disassembly of
* software provided in binary form under this license.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; DAMAGE TO ANY DEVICE, LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE. SOME STATES DO NOT ALLOW
* THE EXCLUSION OF INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE
* ABOVE LIMITATIONS MAY NOT APPLY TO YOU.
*
*/
/**@file
* @brief Definitions.
* This file is based on implementation originally made by Dynastream Innovations Inc. - August 2012
* @defgroup ant_fs_client_main ANT-FS client device simulator
* @{
* @ingroup nrf_ant_fs_client
*
* @brief The ANT-FS client device simulator.
*
*/
#ifndef DEFINES_H__
#define DEFINES_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define MAX_ULONG 0xFFFFFFFFu /**< The Max value for the type. */
/**@brief uint16_t type presentation as an union. */
typedef union
{
uint16_t data; /**< The data content. */
struct
{
uint8_t low; /**< The low byte of the data content. */
uint8_t high; /**< The high byte of the data content. */
} bytes;
} ushort_union_t;
/**@brief uint32_t type presentation as an union. */
typedef union
{
uint32_t data; /**< The data content as a single variable. */
uint8_t data_bytes[sizeof(uint32_t)]; /**< The data content as a byte array. */
struct
{
// The least significant byte of the uint32_t in this structure is referenced by byte0.
uint8_t byte0; /**< Byte 0 of the data content. */
uint8_t byte1; /**< Byte 1 of the data content. */
uint8_t byte2; /**< Byte 2 of the data content. */
uint8_t byte3; /**< Byte 3 of the data content. */
} bytes;
} ulong_union_t;
#ifdef __cplusplus
}
#endif
#endif // DEFINES_H__
/**
*@}
**/

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_KEY_MANAGER)
#include <stdio.h>
#include "ant_key_manager.h"
#include "ant_key_manager_config.h"
#include "ant_interface.h"
#include "nrf_assert.h"
static uint8_t m_ant_plus_network_key[] = ANT_PLUS_NETWORK_KEY;
static uint8_t m_ant_fs_network_key[] = ANT_FS_NETWORK_KEY;
uint32_t ant_custom_key_set(uint8_t network_number, uint8_t * network_key)
{
ASSERT(network_key != NULL);
return sd_ant_network_address_set(network_number, network_key);
}
uint32_t ant_plus_key_set(uint8_t network_number)
{
return sd_ant_network_address_set(network_number, m_ant_plus_network_key);
}
uint32_t ant_fs_key_set(uint8_t network_number)
{
return sd_ant_network_address_set(network_number, m_ant_fs_network_key);
}
#endif // NRF_MODULE_ENABLED(ANT_KEY_MANAGER)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_KEY_MANAGER_H__
#define ANT_KEY_MANAGER_H__
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @file
*/
/**
* @defgroup ant_key_manager ANT key manager
* @{
* @ingroup ant_sdk_utils
* @brief Module for registering common and custom ANT network keys.
*/
/**@brief Function for registering a custom network key.
*
* @param[in] network_number Network key number.
* @param[in] p_network_key Pointer to the custom ANT network key.
*
* @return A SoftDevice error code.
*/
uint32_t ant_custom_key_set(uint8_t network_number, uint8_t * p_network_key);
/**@brief Function for registering an ANT+ network key.
*
* The key must be defined by @ref ANT_PLUS_NETWORK_KEY.
*
* @note The ANT+ Network Key is available for ANT+ Adopters. Go to http://thisisant.com
* to become an ANT+ Adopter and access the key.
*
* @param[in] network_number Network key number.
*
* @return A SoftDevice error code.
*/
uint32_t ant_plus_key_set(uint8_t network_number);
/**@brief Function for registering an ANT-FS network key.
*
* The key must be defined by @ref ANT_FS_NETWORK_KEY.
*
* @note The ANT+ Network Key is available for ANT+ Adopters. Go to http://thisisant.com
* to become an ANT+ Adopter and access the key.
*
* @param[in] network_number Network key number.
*
* @return A SoftDevice error code.
*/
uint32_t ant_fs_key_set(uint8_t network_number);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif // ANT_KEY_MANAGER_H__

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_KEY_MANAGER_CONFIG_H__
#define ANT_KEY_MANAGER_CONFIG_H__
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup ant_key_manager
* @{
*/
#ifndef ANT_PLUS_NETWORK_KEY
#define ANT_PLUS_NETWORK_KEY {0, 0, 0, 0, 0, 0, 0, 0} /**< The ANT+ network key. */
#endif //ANT_PLUS_NETWORK_KEY
#ifndef ANT_FS_NETWORK_KEY
#define ANT_FS_NETWORK_KEY {0, 0, 0, 0, 0, 0, 0, 0} /**< The ANT-FS network key. */
#endif // ANT_FS_NETWORK_KEY
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif // ANT_KEY_MANAGER_CONFIG_H__

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_BPWR)
#include "nrf_assert.h"
#include "app_error.h"
#include "ant_interface.h"
#include "ant_bpwr.h"
#define NRF_LOG_MODULE_NAME "ANT_BPWR"
#if ANT_BPWR_LOG_ENABLED
#define NRF_LOG_LEVEL ANT_BPWR_LOG_LEVEL
#define NRF_LOG_INFO_COLOR ANT_BPWR_INFO_COLOR
#else // ANT_BPWR_LOG_ENABLED
#define NRF_LOG_LEVEL 0
#endif // ANT_BPWR_LOG_ENABLED
#include "nrf_log.h"
#define BPWR_CALIB_INT_TIMEOUT ((ANT_CLOCK_FREQUENCY * BPWR_CALIBRATION_TIMOUT_S) / BPWR_MSG_PERIOD) // calibration timeout in ant message period's unit
// for torque sensor Minimum: Interleave every 9th message
#define BPWR_PAGE_16_INTERVAL 5 // Preferred: Interleave every 5th message
#define BPWR_PAGE_16_INTERVAL_OFS 2 // Permissible offset
#define COMMON_PAGE_80_INTERVAL 119 // Minimum: Interleave every 121 messages
#define COMMON_PAGE_81_INTERVAL 120 // Minimum: Interleave every 121 messages
#define AUTO_ZERO_SUPPORT_INTERVAL 120 // Minimum: Interleave every 121 messages
/**@brief Bicycle power message data layout structure. */
typedef struct
{
uint8_t page_number;
uint8_t page_payload[7];
} ant_bpwr_message_layout_t;
/**@brief Function for initializing the ANT Bicycle Power Profile instance.
*
* @param[in] p_profile Pointer to the profile instance.
* @param[in] p_channel_config Pointer to the ANT channel configuration structure.
*
* @retval NRF_SUCCESS If initialization was successful. Otherwise, an error code is returned.
*/
static ret_code_t ant_bpwr_init(ant_bpwr_profile_t * p_profile,
ant_channel_config_t const * p_channel_config)
{
p_profile->channel_number = p_channel_config->channel_number;
p_profile->page_1 = DEFAULT_ANT_BPWR_PAGE1();
p_profile->page_16 = DEFAULT_ANT_BPWR_PAGE16();
p_profile->page_17 = DEFAULT_ANT_BPWR_PAGE17();
p_profile->page_18 = DEFAULT_ANT_BPWR_PAGE18();
p_profile->page_80 = DEFAULT_ANT_COMMON_page80();
p_profile->page_81 = DEFAULT_ANT_COMMON_page81();
NRF_LOG_INFO("ANT B-PWR channel %u init\r\n", p_profile->channel_number);
return ant_channel_init(p_channel_config);
}
ret_code_t ant_bpwr_disp_init(ant_bpwr_profile_t * p_profile,
ant_channel_config_t const * p_channel_config,
ant_bpwr_disp_config_t const * p_disp_config)
{
ASSERT(p_profile != NULL);
ASSERT(p_channel_config != NULL);
ASSERT(p_disp_config != NULL);
ASSERT(p_disp_config->evt_handler != NULL);
ASSERT(p_disp_config->p_cb != NULL);
p_profile->evt_handler = p_disp_config->evt_handler;
p_profile->_cb.p_disp_cb = p_disp_config->p_cb;
p_profile->_cb.p_disp_cb ->calib_timeout = 0;
p_profile->_cb.p_disp_cb ->calib_stat = BPWR_DISP_CALIB_NONE;
return ant_bpwr_init(p_profile, p_channel_config);
}
ret_code_t ant_bpwr_sens_init(ant_bpwr_profile_t * p_profile,
ant_channel_config_t const * p_channel_config,
ant_bpwr_sens_config_t const * p_sens_config)
{
ASSERT(p_profile != NULL);
ASSERT(p_channel_config != NULL);
ASSERT(p_sens_config != NULL);
ASSERT(p_sens_config->p_cb != NULL);
ASSERT(p_sens_config->evt_handler != NULL);
ASSERT(p_sens_config->calib_handler != NULL);
p_profile->evt_handler = p_sens_config->evt_handler;
p_profile->_cb.p_sens_cb = p_sens_config->p_cb;
p_profile->_cb.p_sens_cb->torque_use = p_sens_config->torque_use;
p_profile->_cb.p_sens_cb->calib_handler = p_sens_config->calib_handler;
p_profile->_cb.p_sens_cb->calib_stat = BPWR_SENS_CALIB_NONE;
p_profile->_cb.p_sens_cb->message_counter = 0;
return ant_bpwr_init(p_profile, p_channel_config);
}
/**@brief Function for getting next page number to send.
*
* @param[in] p_profile Pointer to the profile instance.
*
* @return Next page number.
*/
static ant_bpwr_page_t next_page_number_get(ant_bpwr_profile_t * p_profile)
{
ant_bpwr_sens_cb_t * p_bpwr_cb = p_profile->_cb.p_sens_cb;
ant_bpwr_page_t page_number;
if (p_bpwr_cb->calib_stat == BPWR_SENS_CALIB_READY)
{
page_number = ANT_BPWR_PAGE_1;
p_bpwr_cb->calib_stat = BPWR_SENS_CALIB_NONE; // mark event as processed
}
else if ((p_profile->BPWR_PROFILE_auto_zero_status != ANT_BPWR_AUTO_ZERO_NOT_SUPPORTED)
&& (p_bpwr_cb->message_counter == AUTO_ZERO_SUPPORT_INTERVAL))
{
page_number = ANT_BPWR_PAGE_1;
p_profile->BPWR_PROFILE_calibration_id = ANT_BPWR_CALIB_ID_AUTO_SUPPORT;
p_bpwr_cb->message_counter++;
}
else if (p_bpwr_cb->message_counter >= COMMON_PAGE_81_INTERVAL)
{
page_number = ANT_BPWR_PAGE_81;
p_bpwr_cb->message_counter = 0;
}
else
{
if (p_bpwr_cb->message_counter == COMMON_PAGE_80_INTERVAL)
{
page_number = ANT_BPWR_PAGE_80;
}
else
{
if ( p_bpwr_cb->torque_use == TORQUE_NONE)
{
page_number = ANT_BPWR_PAGE_16;
}
else if ((p_bpwr_cb->message_counter % BPWR_PAGE_16_INTERVAL)
== BPWR_PAGE_16_INTERVAL_OFS)
{
page_number = ANT_BPWR_PAGE_16;
}
else if ( p_bpwr_cb->torque_use == TORQUE_WHEEL)
{
page_number = ANT_BPWR_PAGE_17;
}
else // assumed TORQUE_CRANK
{
page_number = ANT_BPWR_PAGE_18;
}
}
p_bpwr_cb->message_counter++;
}
return page_number;
}
/**@brief Function for encoding Bicycle Power Sensor message.
*
* @note Assume to be call each time when Tx window will occur.
*/
static void sens_message_encode(ant_bpwr_profile_t * p_profile, uint8_t * p_message_payload)
{
ant_bpwr_message_layout_t * p_bpwr_message_payload =
(ant_bpwr_message_layout_t *)p_message_payload;
p_bpwr_message_payload->page_number = next_page_number_get(p_profile);
NRF_LOG_INFO("B-PWR tx page: %u\r\n", p_bpwr_message_payload->page_number);
switch (p_bpwr_message_payload->page_number)
{
case ANT_BPWR_PAGE_1:
ant_bpwr_page_1_encode(p_bpwr_message_payload->page_payload, &(p_profile->page_1));
break;
case ANT_BPWR_PAGE_16:
ant_bpwr_page_16_encode(p_bpwr_message_payload->page_payload, &(p_profile->page_16));
ant_bpwr_cadence_encode(p_bpwr_message_payload->page_payload, &(p_profile->common));
break;
case ANT_BPWR_PAGE_17:
ant_bpwr_page_17_encode(p_bpwr_message_payload->page_payload, &(p_profile->page_17));
ant_bpwr_cadence_encode(p_bpwr_message_payload->page_payload, &(p_profile->common));
break;
case ANT_BPWR_PAGE_18:
ant_bpwr_page_18_encode(p_bpwr_message_payload->page_payload, &(p_profile->page_18));
ant_bpwr_cadence_encode(p_bpwr_message_payload->page_payload, &(p_profile->common));
break;
case ANT_COMMON_PAGE_80:
ant_common_page_80_encode(p_bpwr_message_payload->page_payload, &(p_profile->page_80));
break;
case ANT_COMMON_PAGE_81:
ant_common_page_81_encode(p_bpwr_message_payload->page_payload, &(p_profile->page_81));
break;
default:
return;
}
p_profile->evt_handler(p_profile, (ant_bpwr_evt_t)p_bpwr_message_payload->page_number);
}
/**@brief Function for decoding messages received by Bicycle Power sensor message.
*
* @note Assume to be call each time when Rx window will occur.
*/
static void sens_message_decode(ant_bpwr_profile_t * p_profile, uint8_t * p_message_payload)
{
const ant_bpwr_message_layout_t * p_bpwr_message_payload =
(ant_bpwr_message_layout_t *)p_message_payload;
ant_bpwr_page1_data_t page1;
switch (p_bpwr_message_payload->page_number)
{
case ANT_BPWR_PAGE_1:
ant_bpwr_page_1_decode(p_bpwr_message_payload->page_payload, &page1);
p_profile->_cb.p_sens_cb->calib_stat = BPWR_SENS_CALIB_REQUESTED;
p_profile->_cb.p_sens_cb->calib_handler(p_profile, &page1);
break;
default:
break;
}
}
/**@brief Function for decoding messages received by Bicycle Power display message.
*
* @note Assume to be call each time when Rx window will occur.
*/
static void disp_message_decode(ant_bpwr_profile_t * p_profile, uint8_t * p_message_payload)
{
const ant_bpwr_message_layout_t * p_bpwr_message_payload =
(ant_bpwr_message_layout_t *)p_message_payload;
NRF_LOG_INFO("B-PWR rx page: %u\r\n", p_bpwr_message_payload->page_number);
switch (p_bpwr_message_payload->page_number)
{
case ANT_BPWR_PAGE_1:
ant_bpwr_page_1_decode(p_bpwr_message_payload->page_payload, &(p_profile->page_1));
p_profile->_cb.p_disp_cb->calib_stat = BPWR_DISP_CALIB_NONE;
break;
case ANT_BPWR_PAGE_16:
ant_bpwr_page_16_decode(p_bpwr_message_payload->page_payload, &(p_profile->page_16));
ant_bpwr_cadence_decode(p_bpwr_message_payload->page_payload, &(p_profile->common));
break;
case ANT_BPWR_PAGE_17:
ant_bpwr_page_17_decode(p_bpwr_message_payload->page_payload, &(p_profile->page_17));
ant_bpwr_cadence_decode(p_bpwr_message_payload->page_payload, &(p_profile->common));
break;
case ANT_BPWR_PAGE_18:
ant_bpwr_page_18_decode(p_bpwr_message_payload->page_payload, &(p_profile->page_18));
ant_bpwr_cadence_decode(p_bpwr_message_payload->page_payload, &(p_profile->common));
break;
case ANT_COMMON_PAGE_80:
ant_common_page_80_decode(p_bpwr_message_payload->page_payload, &(p_profile->page_80));
break;
case ANT_COMMON_PAGE_81:
ant_common_page_81_decode(p_bpwr_message_payload->page_payload, &(p_profile->page_81));
break;
default:
return;
}
p_profile->evt_handler(p_profile, (ant_bpwr_evt_t)p_bpwr_message_payload->page_number);
}
ret_code_t ant_bpwr_calib_request(ant_bpwr_profile_t * p_profile, ant_bpwr_page1_data_t * p_page_1)
{
ant_bpwr_message_layout_t bpwr_message_payload;
if (p_profile->_cb.p_disp_cb->calib_stat == BPWR_DISP_CALIB_REQUESTED)
{
return NRF_SUCCESS; // calibration in progress, so omit this request
}
bpwr_message_payload.page_number = ANT_BPWR_PAGE_1;
ant_bpwr_page_1_encode(bpwr_message_payload.page_payload, p_page_1);
uint32_t err_code = sd_ant_acknowledge_message_tx(p_profile->channel_number,
sizeof (bpwr_message_payload),
(uint8_t *) &bpwr_message_payload);
if (err_code == NRF_SUCCESS)
{
p_profile->_cb.p_disp_cb->calib_timeout = BPWR_CALIB_INT_TIMEOUT; // initialize watch on calibration's time-out
p_profile->_cb.p_disp_cb->calib_stat = BPWR_DISP_CALIB_REQUESTED;
NRF_LOG_INFO("Start calibration process\r\n");
}
return err_code;
}
void ant_bpwr_calib_response(ant_bpwr_profile_t * p_profile)
{
if (p_profile->_cb.p_sens_cb->calib_stat != BPWR_SENS_CALIB_READY) // abort if callback request is in progress
{
p_profile->_cb.p_sens_cb->calib_stat = BPWR_SENS_CALIB_READY; // calibration respond
}
}
/**@brief Function for hangling calibration events.
*/
static void service_calib(ant_bpwr_profile_t * p_profile, uint8_t event)
{
ant_bpwr_evt_t bpwr_event;
if (p_profile->_cb.p_disp_cb->calib_stat == BPWR_DISP_CALIB_REQUESTED)
{
switch (event)
{
case EVENT_RX:
/* fall through */
case EVENT_RX_FAIL:
if (p_profile->_cb.p_disp_cb->calib_timeout-- == 0)
{
bpwr_event = ANT_BPWR_CALIB_TIMEOUT;
break;
}
else
{
return;
}
case EVENT_TRANSFER_TX_FAILED:
bpwr_event = ANT_BPWR_CALIB_REQUEST_TX_FAILED;
break;
case EVENT_RX_SEARCH_TIMEOUT:
bpwr_event = ANT_BPWR_CALIB_TIMEOUT;
break;
default:
return;
}
NRF_LOG_INFO("End calibration process\r\n");
p_profile->_cb.p_disp_cb->calib_stat = BPWR_DISP_CALIB_NONE;
p_profile->evt_handler(p_profile, bpwr_event);
}
}
static void ant_message_send(ant_bpwr_profile_t * p_profile)
{
uint32_t err_code;
uint8_t p_message_payload[ANT_STANDARD_DATA_PAYLOAD_SIZE];
sens_message_encode(p_profile, p_message_payload);
err_code =
sd_ant_broadcast_message_tx(p_profile->channel_number,
sizeof (p_message_payload),
p_message_payload);
APP_ERROR_CHECK(err_code);
}
ret_code_t ant_bpwr_disp_open(ant_bpwr_profile_t * p_profile)
{
NRF_LOG_INFO("ANT B-PWR %u open\r\n", p_profile->channel_number);
return sd_ant_channel_open(p_profile->channel_number);
}
ret_code_t ant_bpwr_sens_open(ant_bpwr_profile_t * p_profile)
{
// Fill tx buffer for the first frame
ant_message_send(p_profile);
NRF_LOG_INFO("ANT B-PWR %u open\r\n", p_profile->channel_number);
return sd_ant_channel_open(p_profile->channel_number);
}
void ant_bpwr_sens_evt_handler(ant_bpwr_profile_t * p_profile, ant_evt_t * p_ant_event)
{
if (p_ant_event->channel == p_profile->channel_number)
{
ANT_MESSAGE * p_message;
switch (p_ant_event->event)
{
case EVENT_TX:
ant_message_send(p_profile);
break;
case EVENT_RX:
p_message = (ANT_MESSAGE *)p_ant_event->msg.evt_buffer;
if (p_message->ANT_MESSAGE_ucMesgID == MESG_ACKNOWLEDGED_DATA_ID)
{
sens_message_decode(p_profile, p_message->ANT_MESSAGE_aucPayload);
}
break;
default:
// No implementation needed
break;
}
}
}
void ant_bpwr_disp_evt_handler(ant_bpwr_profile_t * p_profile, ant_evt_t * p_ant_event)
{
if (p_ant_event->channel == p_profile->channel_number)
{
ANT_MESSAGE * p_message = (ANT_MESSAGE *)p_ant_event->msg.evt_buffer;
switch (p_ant_event->event)
{
case EVENT_RX:
if (p_message->ANT_MESSAGE_ucMesgID == MESG_BROADCAST_DATA_ID
|| p_message->ANT_MESSAGE_ucMesgID == MESG_ACKNOWLEDGED_DATA_ID
|| p_message->ANT_MESSAGE_ucMesgID == MESG_BURST_DATA_ID)
{
disp_message_decode(p_profile, p_message->ANT_MESSAGE_aucPayload);
}
break;
default:
break;
}
service_calib(p_profile, p_ant_event->event);
}
}
#endif // NRF_MODULE_ENABLED(ANT_BPWR)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/**
* @file
* @defgroup ant_bpwr Bicycle Power profile
* @{
* @ingroup ant_sdk_profiles
* @brief This module implements the Bicycle Power profile.
*
*/
#ifndef ANT_BICYCLE_POWER_H__
#define ANT_BICYCLE_POWER_H__
#include <stdint.h>
#include <stdbool.h>
#include "ant_parameters.h"
#include "ant_stack_handler_types.h"
#include "ant_channel_config.h"
#include "ant_bpwr_pages.h"
#include "sdk_errors.h"
#define BPWR_DEVICE_TYPE 0x0Bu ///< Device type reserved for ANT+ Bicycle Power.
#define BPWR_ANTPLUS_RF_FREQ 0x39u ///< Frequency, decimal 57 (2457 MHz).
#define BPWR_MSG_PERIOD 8182u ///< Message period, decimal 8182 (4.0049 Hz).
#define BPWR_EXT_ASSIGN 0x00 ///< ANT ext assign (see Ext. Assign Channel Parameters in ant_parameters.h: @ref ant_parameters).
#define BPWR_DISP_CHANNEL_TYPE CHANNEL_TYPE_SLAVE ///< Display Bicycle Power channel type.
#define BPWR_SENS_CHANNEL_TYPE CHANNEL_TYPE_MASTER ///< Sensor Bicycle Power channel type.
#define BPWR_CALIBRATION_TIMOUT_S 5u ///< Time-out for responding to calibration callback (s).
/**@brief Initialize an ANT channel configuration structure for the Bicycle Power profile (Display).
*
* @param[in] NAME Name of related instance.
* @param[in] CHANNEL_NUMBER Number of the channel assigned to the profile instance.
* @param[in] TRANSMISSION_TYPE Type of transmission assigned to the profile instance.
* @param[in] DEVICE_NUMBER Number of the device assigned to the profile instance.
* @param[in] NETWORK_NUMBER Number of the network assigned to the profile instance.
*/
#define BPWR_DISP_CHANNEL_CONFIG_DEF(NAME, \
CHANNEL_NUMBER, \
TRANSMISSION_TYPE, \
DEVICE_NUMBER, \
NETWORK_NUMBER) \
static const ant_channel_config_t NAME##_channel_bpwr_disp_config = \
{ \
.channel_number = (CHANNEL_NUMBER), \
.channel_type = BPWR_DISP_CHANNEL_TYPE, \
.ext_assign = BPWR_EXT_ASSIGN, \
.rf_freq = BPWR_ANTPLUS_RF_FREQ, \
.transmission_type = (TRANSMISSION_TYPE), \
.device_type = BPWR_DEVICE_TYPE, \
.device_number = (DEVICE_NUMBER), \
.channel_period = BPWR_MSG_PERIOD, \
.network_number = (NETWORK_NUMBER), \
}
#define BPWR_DISP_CHANNEL_CONFIG(NAME) &NAME##_channel_bpwr_disp_config
/**@brief Initialize an ANT channel configuration structure for the Bicycle Power profile (Sensor).
*
* @param[in] NAME Name of related instance.
* @param[in] CHANNEL_NUMBER Number of the channel assigned to the profile instance.
* @param[in] TRANSMISSION_TYPE Type of transmission assigned to the profile instance.
* @param[in] DEVICE_NUMBER Number of the device assigned to the profile instance.
* @param[in] NETWORK_NUMBER Number of the network assigned to the profile instance.
*/
#define BPWR_SENS_CHANNEL_CONFIG_DEF(NAME, \
CHANNEL_NUMBER, \
TRANSMISSION_TYPE, \
DEVICE_NUMBER, \
NETWORK_NUMBER) \
static const ant_channel_config_t NAME##_channel_bpwr_sens_config = \
{ \
.channel_number = (CHANNEL_NUMBER), \
.channel_type = BPWR_SENS_CHANNEL_TYPE, \
.ext_assign = BPWR_EXT_ASSIGN, \
.rf_freq = BPWR_ANTPLUS_RF_FREQ, \
.transmission_type = (TRANSMISSION_TYPE), \
.device_type = BPWR_DEVICE_TYPE, \
.device_number = (DEVICE_NUMBER), \
.channel_period = BPWR_MSG_PERIOD, \
.network_number = (NETWORK_NUMBER), \
}
#define BPWR_SENS_CHANNEL_CONFIG(NAME) &NAME##_channel_bpwr_sens_config
/**@brief Initialize an ANT profile configuration structure for the BPWR profile (Display).
*
* @param[in] NAME Name of related instance.
* @param[in] EVT_HANDLER Event handler to be called for handling events in the BPWR profile.
*/
#define BPWR_DISP_PROFILE_CONFIG_DEF(NAME, \
EVT_HANDLER) \
static ant_bpwr_disp_cb_t NAME##_bpwr_disp_cb; \
static const ant_bpwr_disp_config_t NAME##_profile_bpwr_disp_config = \
{ \
.p_cb = &NAME##_bpwr_disp_cb, \
.evt_handler = (EVT_HANDLER), \
}
#define BPWR_DISP_PROFILE_CONFIG(NAME) &NAME##_profile_bpwr_disp_config
/**@brief Initialize an ANT profile configuration structure for the BPWR profile (Sensor).
*
* @param[in] NAME Name of related instance.
* @param[in] TORQUE_USED Determines whether the torque page is included.
* @param[in] CALIB_HANDLER Event handler to be called for handling calibration requests.
* @param[in] EVT_HANDLER Event handler to be called for handling events in the BPWR profile.
*/
#define BPWR_SENS_PROFILE_CONFIG_DEF(NAME, \
TORQUE_USED, \
CALIB_HANDLER, \
EVT_HANDLER) \
static ant_bpwr_sens_cb_t NAME##_bpwr_sens_cb; \
static const ant_bpwr_sens_config_t NAME##_profile_bpwr_sens_config = \
{ \
.torque_use = (TORQUE_USED), \
.calib_handler = (CALIB_HANDLER), \
.p_cb = &NAME##_bpwr_sens_cb, \
.evt_handler = (EVT_HANDLER), \
}
#define BPWR_SENS_PROFILE_CONFIG(NAME) &NAME##_profile_bpwr_sens_config
/**@brief Configuration values for the Bicycle Power torque page. */
typedef enum
{
TORQUE_NONE = 0,
TORQUE_WHEEL = 1,
TORQUE_CRANK = 2,
} ant_bpwr_torque_t;
/**@brief Bicycle Power page number type. */
typedef enum
{
ANT_BPWR_PAGE_1 = 1, ///< Calibration data page.
ANT_BPWR_PAGE_16 = 16, ///< Standard power-only main data page.
ANT_BPWR_PAGE_17 = 17, ///< Standard wheel torque main data page.
ANT_BPWR_PAGE_18 = 18, ///< Standard crank torque main data page.
ANT_BPWR_PAGE_80 = ANT_COMMON_PAGE_80,
ANT_BPWR_PAGE_81 = ANT_COMMON_PAGE_81
} ant_bpwr_page_t;
/**@brief BPWR profile event type. */
typedef enum
{
ANT_BPWR_PAGE_1_UPDATED = ANT_BPWR_PAGE_1, ///< Data page 1 and speed have been updated (Display) or sent (Sensor).
ANT_BPWR_PAGE_16_UPDATED = ANT_BPWR_PAGE_16, ///< Data page 16 and speed have been updated (Display) or sent (Sensor).
ANT_BPWR_PAGE_17_UPDATED = ANT_BPWR_PAGE_17, ///< Data page 17 and speed have been updated (Display) or sent (Sensor).
ANT_BPWR_PAGE_18_UPDATED = ANT_BPWR_PAGE_18, ///< Data page 18 has been updated (Display) or sent (Sensor).
ANT_BPWR_PAGE_80_UPDATED = ANT_BPWR_PAGE_80, ///< Data page 80 has been updated (Display) or sent (Sensor).
ANT_BPWR_PAGE_81_UPDATED = ANT_BPWR_PAGE_81, ///< Data page 81 has been updated (Display) or sent (Sensor).
ANT_BPWR_CALIB_TIMEOUT, ///< Request of calibration time-out occurred (Display).
ANT_BPWR_CALIB_REQUEST_TX_FAILED, ///< Calibration request did not reach the destination (Display).
} ant_bpwr_evt_t;
// Forward declaration of the ant_bpwr_profile_t type.
typedef struct ant_bpwr_profile_s ant_bpwr_profile_t;
/**@brief BPWR event handler type. */
typedef void (* ant_bpwr_evt_handler_t) (ant_bpwr_profile_t *, ant_bpwr_evt_t);
/**@brief BPWR Sensor calibration request handler type. */
typedef void (* ant_bpwr_calib_handler_t) (ant_bpwr_profile_t *, ant_bpwr_page1_data_t *);
#include "ant_bpwr_local.h"
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Bicycle Power Sensor configuration structure. */
typedef struct
{
ant_bpwr_torque_t torque_use; ///< Determines whether the torque page is included.
ant_bpwr_sens_cb_t * p_cb; ///< Pointer to the data buffer for internal use.
ant_bpwr_evt_handler_t evt_handler; ///< Event handler to be called for handling events in the BPWR profile.
ant_bpwr_calib_handler_t calib_handler; ///< Event handler to be called for handling calibration requests.
} ant_bpwr_sens_config_t;
/**@brief Bicycle Power Display configuration structure. */
typedef struct
{
ant_bpwr_disp_cb_t * p_cb; ///< Pointer to the data buffer for internal use.
ant_bpwr_evt_handler_t evt_handler; ///< Event handler to be called for handling events in the BPWR profile.
} ant_bpwr_disp_config_t;
/**@brief Bicycle Power profile structure. */
struct ant_bpwr_profile_s
{
uint8_t channel_number; ///< Channel number assigned to the profile.
union {
ant_bpwr_disp_cb_t * p_disp_cb;
ant_bpwr_sens_cb_t * p_sens_cb;
} _cb; ///< Pointer to internal control block.
ant_bpwr_evt_handler_t evt_handler; ///< Event handler to be called for handling events in the BPWR profile.
ant_bpwr_page1_data_t page_1; ///< Page 1.
ant_bpwr_page16_data_t page_16; ///< Page 16.
ant_bpwr_page17_data_t page_17; ///< Page 17.
ant_bpwr_page18_data_t page_18; ///< Page 18.
ant_common_page80_data_t page_80; ///< Page 80.
ant_common_page81_data_t page_81; ///< Page 81.
ant_bpwr_common_data_t common; ///< BPWR common data.
};
/** @name Defines for accessing ant_bpwr_profile_t member variables
@{ */
#define BPWR_PROFILE_calibration_id page_1.calibration_id
#define BPWR_PROFILE_auto_zero_status page_1.auto_zero_status
#define BPWR_PROFILE_general_calib_data page_1.data.general_calib
#define BPWR_PROFILE_custom_calib_data page_1.data.custom_calib
#define BPWR_PROFILE_instantaneous_cadence common.instantaneous_cadence
#define BPWR_PROFILE_pedal_power page_16.pedal_power.items
#define BPWR_PROFILE_power_update_event_count page_16.update_event_count
#define BPWR_PROFILE_accumulated_power page_16.accumulated_power
#define BPWR_PROFILE_instantaneous_power page_16.instantaneous_power
#define BPWR_PROFILE_wheel_update_event_count page_17.update_event_count
#define BPWR_PROFILE_wheel_tick page_17.tick
#define BPWR_PROFILE_wheel_period page_17.period
#define BPWR_PROFILE_wheel_accumulated_torque page_17.accumulated_torque
#define BPWR_PROFILE_crank_update_event_count page_18.update_event_count
#define BPWR_PROFILE_crank_tick page_18.tick
#define BPWR_PROFILE_crank_period page_18.period
#define BPWR_PROFILE_crank_accumulated_torque page_18.accumulated_torque
#define BPWR_PROFILE_manuf_id page_80.manuf_id
#define BPWR_PROFILE_hw_revision page_80.hw_revision
#define BPWR_PROFILE_manufacturer_id page_80.manufacturer_id
#define BPWR_PROFILE_model_number page_80.model_number
#define BPWR_PROFILE_sw_revision_minor page_81.sw_revision_minor
#define BPWR_PROFILE_sw_revision_major page_81.sw_revision_major
#define BPWR_PROFILE_serial_number page_81.serial_number
/** @} */
/**@brief Function for initializing the ANT Bicycle Power Display profile instance.
*
* @param[in] p_profile Pointer to the profile instance.
* @param[in] p_channel_config Pointer to the ANT channel configuration structure.
* @param[in] p_disp_config Pointer to the Bicycle Power Display configuration structure.
*
* @retval NRF_SUCCESS If initialization was successful. Otherwise, an error code is returned.
*/
ret_code_t ant_bpwr_disp_init(ant_bpwr_profile_t * p_profile,
ant_channel_config_t const * p_channel_config,
ant_bpwr_disp_config_t const * p_disp_config);
/**@brief Function for initializing the ANT Bicycle Power Sensor profile instance.
*
* @param[in] p_profile Pointer to the profile instance.
* @param[in] p_channel_config Pointer to the ANT channel configuration structure.
* @param[in] p_sens_config Pointer to the Bicycle Power Sensor configuration structure.
*
* @retval NRF_SUCCESS If initialization was successful. Otherwise, an error code is returned.
*/
ret_code_t ant_bpwr_sens_init(ant_bpwr_profile_t * p_profile,
ant_channel_config_t const * p_channel_config,
ant_bpwr_sens_config_t const * p_sens_config);
/**@brief Function for opening the profile instance channel for ANT BPWR Display.
*
* Before calling this function, pages should be configured.
*
* @param[in] p_profile Pointer to the profile instance.
*
* @retval NRF_SUCCESS If the channel was successfully opened. Otherwise, an error code is returned.
*/
ret_code_t ant_bpwr_disp_open(ant_bpwr_profile_t * p_profile);
/**@brief Function for opening the profile instance channel for ANT BPWR Sensor.
*
* Before calling this function, pages should be configured.
*
* @param[in] p_profile Pointer to the profile instance.
*
* @retval NRF_SUCCESS If the channel was successfully opened. Otherwise, an error code is returned.
*/
ret_code_t ant_bpwr_sens_open(ant_bpwr_profile_t * p_profile);
/** @name Functions: Sensor calibration API
* @{
*/
/** @brief Function for initializing the response for a calibration request.
*
* This function should be used to signal the status of the calibration procedure to the ANT profile layer .
*
* @param[in] p_profile Pointer to the profile instance.
*/
void ant_bpwr_calib_response(ant_bpwr_profile_t * p_profile);
/** @} */
/**@brief Function for handling the Sensor ANT events.
*
* @details This function handles all events from the ANT stack that are of interest to the Bicycle Power Display profile.
*
* @param[in] p_profile Pointer to the profile instance.
* @param[in] p_ant_event Event received from the ANT stack.
*/
void ant_bpwr_sens_evt_handler(ant_bpwr_profile_t * p_profile, ant_evt_t * p_ant_event);
/**@brief Function for handling the Display ANT events.
*
* @details This function handles all events from the ANT stack that are of interest to the Bicycle Power Display profile.
*
* @param[in] p_profile Pointer to the profile instance.
* @param[in] p_ant_event Event received from the ANT stack.
*/
void ant_bpwr_disp_evt_handler(ant_bpwr_profile_t * p_profile, ant_evt_t * p_ant_event);
/** @name Functions: Display calibration API
* @{
*/
/**@brief Function for initializing the calibration request process from the Bicycle Power Display side.
*
* @details This function requests a transfer to the Sensor and starts watching for the calibration response.
* If a calibration response has already been requested, the function ignores the new request and returns NRF_SUCCESS.
*
* @param [in] p_profile Pointer to the profile instance.
* @param [in] p_page_1 Pointer to the prepared page 1.
*
* @return Values returned by the @ref sd_ant_acknowledge_message_tx SVC callback.
*/
uint32_t ant_bpwr_calib_request(ant_bpwr_profile_t * p_profile, ant_bpwr_page1_data_t * p_page_1);
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif // ANT_BICYCLE_POWER_H__

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_LOCAL_H__
#define ANT_BPWR_LOCAL_H__
#include <stdint.h>
#include <stdbool.h>
#include "ant_bpwr.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @addtogroup ant_bpwr
* @{
*/
/** @brief Bicycle Power Sensor control block. */
typedef struct
{
uint8_t message_counter;
ant_bpwr_torque_t torque_use;
enum
{
BPWR_SENS_CALIB_NONE, ///< Idle state.
BPWR_SENS_CALIB_REQUESTED, ///< Received request for general calibration result message by the sensor.
BPWR_SENS_CALIB_READY, ///< Calibration response message is ready to be transmitted.
} calib_stat;
ant_bpwr_calib_handler_t calib_handler;
} ant_bpwr_sens_cb_t;
/**@brief Bicycle Power Sensor RX control block. */
typedef struct
{
uint8_t calib_timeout;
enum
{
BPWR_DISP_CALIB_NONE, ///< Idle state.
BPWR_DISP_CALIB_REQUESTED, ///< Calibration requested.
} calib_stat;
} ant_bpwr_disp_cb_t;
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_LOCAL_H__

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_BPWR)
#include "ant_bpwr_common_data.h"
#include "ant_bpwr_utils.h"
#define NRF_LOG_MODULE_NAME "ANT_BPWR_COMMON"
#if ANT_BPWR_COMMON_LOG_ENABLED
#define NRF_LOG_LEVEL ANT_BPWR_COMMON_LOG_LEVEL
#define NRF_LOG_INFO_COLOR ANT_BPWR_COMMON_INFO_COLOR
#else // ANT_BPWR_COMMON_LOG_ENABLED
#define NRF_LOG_LEVEL 0
#endif // ANT_BPWR_COMMON_LOG_ENABLED
#include "nrf_log.h"
/**@brief BPWR common page data layout structure. */
typedef struct
{
uint8_t reserved0[2];
uint8_t instantaneous_cadence;
uint8_t reserved1[4];
}ant_bpwr_cadence_data_layout_t;
/**@brief Function for tracing common data.
*
* @param[in] p_common_data Pointer to the common data.
*/
static void cadence_data_log(ant_bpwr_common_data_t const * p_common_data)
{
if (p_common_data->instantaneous_cadence == 0xFF)
{
NRF_LOG_INFO("instantaneous cadence: -- rpm\r\n\n");
}
else
{
NRF_LOG_INFO("instantaneous cadence: %u rpm\r\n\n",
p_common_data->instantaneous_cadence);
}
}
void ant_bpwr_cadence_encode(uint8_t * p_page_buffer,
ant_bpwr_common_data_t const * p_common_data)
{
ant_bpwr_cadence_data_layout_t * p_outcoming_data = (ant_bpwr_cadence_data_layout_t *)p_page_buffer;
p_outcoming_data->instantaneous_cadence = p_common_data->instantaneous_cadence;
cadence_data_log(p_common_data);
}
void ant_bpwr_cadence_decode(uint8_t const * p_page_buffer,
ant_bpwr_common_data_t * p_common_data)
{
ant_bpwr_cadence_data_layout_t const * p_incoming_data = (ant_bpwr_cadence_data_layout_t *)p_page_buffer;
p_common_data->instantaneous_cadence = p_incoming_data->instantaneous_cadence;
cadence_data_log(p_common_data);
}
#endif // NRF_MODULE_ENABLED(ANT_BPWR)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_COMMON_DATA_H__
#define ANT_BPWR_COMMON_DATA_H__
/** @file
*
* @defgroup ant_sdk_profiles_bpwr_common_data_page Stride Based Speed and Distance Monitor profile common data
* @{
* @ingroup ant_sdk_profiles_bpwr_pages
*/
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Data structure for BPWR common data.
*
* @details This structure stores data that is not associated with a particular page.
*/
typedef struct
{
uint8_t instantaneous_cadence; ///< Crank cadence (rpm, 0 - 254, 255-> invalid).
} ant_bpwr_common_data_t;
/**@brief Initialize common data.
*/
#define DEFAULT_ANT_BPWR_COMMON_DATA() \
(ant_bpwr_common_data_t) \
{ \
.instantaneous_cadence = 0, \
}
/**@brief Function for encoding speed.
*
* This function can be used for pages 16, 17, and 18.
*
* @param[in] p_common_data Pointer to the common data.
* @param[out] p_page_buffer Pointer to the data buffer.
*/
void ant_bpwr_cadence_encode(uint8_t * p_page_buffer,
ant_bpwr_common_data_t const * p_common_data);
/**@brief Function for decoding speed.
*
* This function can be used for pages 16, 17, and 18.
*
* @param[in] p_page_buffer Pointer to the data buffer.
* @param[out] p_common_data Pointer to the common data.
*/
void ant_bpwr_cadence_decode(uint8_t const * p_page_buffer,
ant_bpwr_common_data_t * p_common_data);
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_COMMON_DATA_H__
/** @} */

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_BPWR)
#include <string.h>
#include "ant_bpwr_page_1.h"
#define NRF_LOG_MODULE_NAME "ANT_BPWR_PAGE_1"
#if ANT_BPWR_PAGE_1_LOG_ENABLED
#define NRF_LOG_LEVEL ANT_BPWR_PAGE_1_LOG_LEVEL
#define NRF_LOG_INFO_COLOR ANT_BPWR_PAGE_1_INFO_COLOR
#else // ANT_BPWR_PAGE_1_LOG_ENABLED
#define NRF_LOG_LEVEL 0
#endif // ANT_BPWR_PAGE_1_LOG_ENABLED
#include "nrf_log.h"
/**@brief bicycle power page 1 data layout structure. */
typedef struct
{
uint8_t calibration_id; ///< Calibration request type
union
{
struct
{
uint8_t reserved[6]; ///< Unused, fill by 0xFF.
} general_calib_request;
struct
{
uint8_t auto_zero_status; ///< Status of automatic zero feature of power sensor.
uint8_t reserved[5]; ///< Unused, fill by 0xFF.
} auto_zero_config;
struct
{
uint8_t auto_zero_status; ///< Status of automatic zero feature of power sensor.
uint8_t reserved[3]; ///< Unused, fill by 0xFF.
uint8_t data[2]; ///< Calibration Data.
} general_calib_response;
struct
{
uint8_t enable : 1;
uint8_t status : 1;
uint8_t reserved0 : 6; ///< Unused, fill by 0x00.
uint8_t reserved1[5]; ///< Unused, fill by 0xFF.
} auto_zero_support;
struct
{
uint8_t manufac_spec[6]; ///< Manufacture Specyfic Data.
} custom_calib;
} data;
} ant_bpwr_page1_data_layout_t;
static void page1_data_log(ant_bpwr_page1_data_t const * p_page_data)
{
NRF_LOG_INFO("Calibration id: %u\r\n", p_page_data->calibration_id);
switch (p_page_data->calibration_id)
{
case ANT_BPWR_CALIB_ID_MANUAL:
// No implementation needed
break;
case ANT_BPWR_CALIB_ID_MANUAL_SUCCESS:
/* fall through */
case ANT_BPWR_CALIB_ID_FAILED:
NRF_LOG_INFO("General calibration data: %u\r\n",
p_page_data->data.general_calib);
/* fall through */
case ANT_BPWR_CALIB_ID_AUTO:
/* fall through */
case ANT_BPWR_CALIB_ID_AUTO_SUPPORT:
switch (p_page_data->auto_zero_status)
{
case ANT_BPWR_AUTO_ZERO_NOT_SUPPORTED:
NRF_LOG_INFO("Auto zero not supported\r\n\n");
break;
case ANT_BPWR_AUTO_ZERO_OFF:
NRF_LOG_INFO("Auto zero off\r\n\n");
break;
case ANT_BPWR_AUTO_ZERO_ON:
NRF_LOG_INFO("Auto zero on\r\n\n");
break;
}
break;
case ANT_BPWR_CALIB_ID_CTF:
NRF_LOG_INFO("Not supported\r\n\n");
break;
case ANT_BPWR_CALIB_ID_CUSTOM_REQ:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_REQ_SUCCESS:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_UPDATE:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_UPDATE_SUCCESS:
NRF_LOG_INFO("Manufacture specyfic: ");
NRF_LOG_HEXDUMP_INFO((uint8_t*)p_page_data->data.custom_calib,
sizeof (p_page_data->data.custom_calib));
break;
default: // shouldn't occur
NRF_LOG_INFO("Unsupported calibration ID\r\n\n");
break;
}
}
void ant_bpwr_page_1_encode(uint8_t * p_page_buffer,
ant_bpwr_page1_data_t const * p_page_data)
{
ant_bpwr_page1_data_layout_t * p_outcoming_data = (ant_bpwr_page1_data_layout_t *)p_page_buffer;
page1_data_log(p_page_data);
p_outcoming_data->calibration_id = p_page_data->calibration_id;
switch (p_page_data->calibration_id)
{
case ANT_BPWR_CALIB_ID_MANUAL:
memset(p_outcoming_data->data.general_calib_request.reserved, 0xFF,
sizeof (p_outcoming_data->data.general_calib_request.reserved));
break;
case ANT_BPWR_CALIB_ID_AUTO:
memset(p_outcoming_data->data.auto_zero_config.reserved, 0xFF,
sizeof (p_outcoming_data->data.auto_zero_config.reserved));
p_outcoming_data->data.auto_zero_config.auto_zero_status =
p_page_data->auto_zero_status;
break;
case ANT_BPWR_CALIB_ID_MANUAL_SUCCESS:
/* fall through */
case ANT_BPWR_CALIB_ID_FAILED:
memset(p_outcoming_data->data.general_calib_response.reserved, 0xFF,
sizeof (p_outcoming_data->data.general_calib_response.reserved));
p_outcoming_data->data.general_calib_response.auto_zero_status =
p_page_data->auto_zero_status;
UNUSED_PARAMETER(uint16_encode(p_page_data->data.general_calib,
p_outcoming_data->data.general_calib_response.data));
break;
case ANT_BPWR_CALIB_ID_CTF:
NRF_LOG_INFO("Not supported\r\n");
break;
case ANT_BPWR_CALIB_ID_AUTO_SUPPORT:
memset(p_outcoming_data->data.auto_zero_support.reserved1, 0xFF,
sizeof (p_outcoming_data->data.auto_zero_support.reserved1));
p_outcoming_data->data.auto_zero_support.reserved0 = 0x00;
p_outcoming_data->data.auto_zero_support.enable =
(p_page_data->auto_zero_status == ANT_BPWR_AUTO_ZERO_NOT_SUPPORTED) ? false : true;
p_outcoming_data->data.auto_zero_support.status =
(p_page_data->auto_zero_status == ANT_BPWR_AUTO_ZERO_ON) ? true : false;
break;
case ANT_BPWR_CALIB_ID_CUSTOM_REQ:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_REQ_SUCCESS:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_UPDATE:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_UPDATE_SUCCESS:
memcpy(p_outcoming_data->data.custom_calib.manufac_spec,
(void *)p_page_data->data.custom_calib,
sizeof (p_page_data->data.custom_calib));
break;
default: // shouldn't occur
break;
}
}
void ant_bpwr_page_1_decode(uint8_t const * p_page_buffer,
ant_bpwr_page1_data_t * p_page_data)
{
ant_bpwr_page1_data_layout_t const * p_incoming_data =
(ant_bpwr_page1_data_layout_t *)p_page_buffer;
p_page_data->calibration_id = (ant_bpwr_calib_id_t)p_incoming_data->calibration_id;
switch (p_incoming_data->calibration_id)
{
case ANT_BPWR_CALIB_ID_MANUAL:
// No implementation needed
break;
case ANT_BPWR_CALIB_ID_AUTO:
/* fall through */
p_page_data->auto_zero_status =
(ant_bpwr_auto_zero_status_t)p_incoming_data->data.auto_zero_config.auto_zero_status;
break;
case ANT_BPWR_CALIB_ID_MANUAL_SUCCESS:
/* fall through */
case ANT_BPWR_CALIB_ID_FAILED:
p_page_data->auto_zero_status =
(ant_bpwr_auto_zero_status_t)p_incoming_data->data.general_calib_response.
auto_zero_status;
p_page_data->data.general_calib = uint16_decode(
p_incoming_data->data.general_calib_response.data);
break;
case ANT_BPWR_CALIB_ID_CTF:
NRF_LOG_INFO("Not supported\r\n");
break;
case ANT_BPWR_CALIB_ID_AUTO_SUPPORT:
if (p_incoming_data->data.auto_zero_support.enable == false)
{
p_page_data->auto_zero_status = ANT_BPWR_AUTO_ZERO_NOT_SUPPORTED;
}
else if (p_incoming_data->data.auto_zero_support.status)
{
p_page_data->auto_zero_status = ANT_BPWR_AUTO_ZERO_ON;
}
else
{
p_page_data->auto_zero_status = ANT_BPWR_AUTO_ZERO_OFF;
}
break;
case ANT_BPWR_CALIB_ID_CUSTOM_REQ:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_REQ_SUCCESS:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_UPDATE:
/* fall through */
case ANT_BPWR_CALIB_ID_CUSTOM_UPDATE_SUCCESS:
memcpy((void *)p_page_data->data.custom_calib,
p_incoming_data->data.custom_calib.manufac_spec,
sizeof (p_page_data->data.custom_calib));
break;
default: // shouldn't occur
break;
}
page1_data_log(p_page_data);
}
#endif // NRF_MODULE_ENABLED(ANT_BPWR)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_PAGE_1_H__
#define ANT_BPWR_PAGE_1_H__
/** @file
*
* @defgroup ant_sdk_profiles_bpwr_page1 Bicycle Power profile page 1
* @{
* @ingroup ant_sdk_profiles_bpwr_pages
*/
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**@brief BPWR Calibration ID.
*/
typedef enum
{
ANT_BPWR_CALIB_ID_NONE = 0x00,
ANT_BPWR_CALIB_ID_MANUAL = 0xAA, ///< Calibration Request: Manual Zero.
ANT_BPWR_CALIB_ID_AUTO = 0xAB, ///< Calibration Request: Auto Zero Configuration.
ANT_BPWR_CALIB_ID_MANUAL_SUCCESS = 0xAC, ///< Calibration Response: Manual Zero Successful.
ANT_BPWR_CALIB_ID_FAILED = 0xAF, ///< Calibration Response: Failed.
ANT_BPWR_CALIB_ID_CTF = 0x10, ///< Crank Torque Frequency (CTF) Power sensor Defined Message.
ANT_BPWR_CALIB_ID_AUTO_SUPPORT = 0x12, ///< Auto Zero Support.
ANT_BPWR_CALIB_ID_CUSTOM_REQ = 0xBA, ///< Custom Calibration Parameter Request.
ANT_BPWR_CALIB_ID_CUSTOM_REQ_SUCCESS = 0xBB, ///< Custom Calibration Parameter Response.
ANT_BPWR_CALIB_ID_CUSTOM_UPDATE = 0xBC, ///< Custom Calibration Parameter Update.
ANT_BPWR_CALIB_ID_CUSTOM_UPDATE_SUCCESS = 0xBD, ///< Custom Calibration Parameter Update Response.
} ant_bpwr_calib_id_t;
/**@brief BPWR Calibration Auto Zero Status.
*/
typedef enum
{
ANT_BPWR_AUTO_ZERO_NOT_SUPPORTED = 0xFF, ///< Auto Zero Not Supported.
ANT_BPWR_AUTO_ZERO_OFF = 0x00, ///< Auto Zero OFF.
ANT_BPWR_AUTO_ZERO_ON = 0x01, ///< Auto Zero ON.
} ant_bpwr_auto_zero_status_t;
/**@brief Data structure for Bicycle Power data page 1.
*/
typedef struct
{
ant_bpwr_calib_id_t calibration_id; ///< Calibration request type.
ant_bpwr_auto_zero_status_t auto_zero_status; ///< Status of automatic zero feature of power sensor.
union
{
int16_t general_calib;
uint8_t custom_calib[6];
} data;
} ant_bpwr_page1_data_t;
/**@brief Initialize page 1.
*/
#define DEFAULT_ANT_BPWR_PAGE1() \
(ant_bpwr_page1_data_t) \
{ \
.calibration_id = ANT_BPWR_CALIB_ID_NONE, \
.auto_zero_status = ANT_BPWR_AUTO_ZERO_NOT_SUPPORTED, \
.data.general_calib = 0x00, \
}
/**@brief Initialize page 1 with the general request.
*/
#define ANT_BPWR_GENERAL_CALIB_REQUEST() \
(ant_bpwr_page1_data_t) \
{ \
.calibration_id = ANT_BPWR_CALIB_ID_MANUAL, \
}
/**@brief Function for encoding page 1.
*
* @param[in] p_page_data Pointer to the page data.
* @param[out] p_page_buffer Pointer to the data buffer.
*/
void ant_bpwr_page_1_encode(uint8_t * p_page_buffer,
ant_bpwr_page1_data_t const * p_page_data);
/**@brief Function for decoding page 1.
*
* @param[in] p_page_buffer Pointer to the data buffer.
* @param[out] p_page_data Pointer to the page data.
*/
void ant_bpwr_page_1_decode(uint8_t const * p_page_buffer,
ant_bpwr_page1_data_t * p_page_data);
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_PAGE_1_H__
/** @} */

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_BPWR)
#include "ant_bpwr_page_16.h"
#define NRF_LOG_MODULE_NAME "ANT_BPWR_PAGE_16"
#if ANT_BPWR_PAGE_16_LOG_ENABLED
#define NRF_LOG_LEVEL ANT_BPWR_PAGE_16_LOG_LEVEL
#define NRF_LOG_INFO_COLOR ANT_BPWR_PAGE_16_INFO_COLOR
#else // ANT_BPWR_PAGE_16_LOG_ENABLED
#define NRF_LOG_LEVEL 0
#endif // ANT_BPWR_PAGE_16_LOG_ENABLED
#include "nrf_log.h"
/**@brief bicycle power page 16 data layout structure. */
typedef struct
{
uint8_t update_event_count;
uint8_t pedal_power;
uint8_t reserved;
uint8_t accumulated_power[2];
uint8_t instantaneous_power[2];
}ant_bpwr_page16_data_layout_t;
static void page16_data_log(ant_bpwr_page16_data_t const * p_page_data)
{
NRF_LOG_INFO("event count: %u\r\n", p_page_data->update_event_count);
if (p_page_data->pedal_power.byte != 0xFF)
{
NRF_LOG_INFO("pedal power: %u %%\r\n",
p_page_data->pedal_power.items.distribution);
}
else
{
NRF_LOG_INFO("pedal power: --\r\n");
}
NRF_LOG_INFO("accumulated power: %u W\r\n", p_page_data->accumulated_power);
NRF_LOG_INFO("instantaneous power: %u W\r\n", p_page_data->instantaneous_power);
}
void ant_bpwr_page_16_encode(uint8_t * p_page_buffer,
ant_bpwr_page16_data_t const * p_page_data)
{
ant_bpwr_page16_data_layout_t * p_outcoming_data =
(ant_bpwr_page16_data_layout_t *)p_page_buffer;
p_outcoming_data->update_event_count = p_page_data->update_event_count;
p_outcoming_data->pedal_power = p_page_data->pedal_power.byte;
UNUSED_PARAMETER(uint16_encode(p_page_data->accumulated_power,
p_outcoming_data->accumulated_power));
UNUSED_PARAMETER(uint16_encode(p_page_data->instantaneous_power,
p_outcoming_data->instantaneous_power));
page16_data_log(p_page_data);
}
void ant_bpwr_page_16_decode(uint8_t const * p_page_buffer,
ant_bpwr_page16_data_t * p_page_data)
{
ant_bpwr_page16_data_layout_t const * p_incoming_data =
(ant_bpwr_page16_data_layout_t *)p_page_buffer;
p_page_data->update_event_count = p_incoming_data->update_event_count;
p_page_data->pedal_power.byte = p_incoming_data->pedal_power;
p_page_data->accumulated_power = uint16_decode(p_incoming_data->accumulated_power);
p_page_data->instantaneous_power = uint16_decode(p_incoming_data->instantaneous_power);
page16_data_log(p_page_data);
}
#endif // NRF_MODULE_ENABLED(ANT_BPWR)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_PAGE_16_H__
#define ANT_BPWR_PAGE_16_H__
/** @file
*
* @defgroup ant_sdk_profiles_bpwr_page16 Bicycle Power profile page 16
* @{
* @ingroup ant_sdk_profiles_bpwr_pages
*/
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Data structure for Bicycle Power data page 16.
*
* @note This structure implements only page 16 specific data.
*/
typedef struct
{
union
{
struct
{
uint8_t distribution : 7; ///< Pedal power distribution (%).
uint8_t differentiation : 1; ///< Pedal differentiation: 1 -> right, 0 -> unknown.
} items;
uint8_t byte;
} pedal_power;
uint8_t update_event_count; ///< Power event count.
uint16_t accumulated_power; ///< Accumulated power (W).
uint16_t instantaneous_power; ///< Instantaneous power (W).
} ant_bpwr_page16_data_t;
/**@brief Initialize page 16.
*/
#define DEFAULT_ANT_BPWR_PAGE16() \
(ant_bpwr_page16_data_t) \
{ \
.update_event_count = 0, \
.pedal_power.items.distribution = 0, \
.pedal_power.items.differentiation = 0, \
.accumulated_power = 0, \
.instantaneous_power = 0, \
}
/**@brief Function for encoding page 16.
*
* @param[in] p_page_data Pointer to the page data.
* @param[out] p_page_buffer Pointer to the data buffer.
*/
void ant_bpwr_page_16_encode(uint8_t * p_page_buffer,
ant_bpwr_page16_data_t const * p_page_data);
/**@brief Function for decoding page 16.
*
* @param[in] p_page_buffer Pointer to the data buffer.
* @param[out] p_page_data Pointer to the page data.
*/
void ant_bpwr_page_16_decode(uint8_t const * p_page_buffer,
ant_bpwr_page16_data_t * p_page_data);
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_PAGE_16_H__
/** @} */

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_BPWR)
#include "ant_bpwr_page_17.h"
#define NRF_LOG_MODULE_NAME "ANT_BPWR_PAGE_17"
#if ANT_BPWR_PAGE_17_LOG_ENABLED
#define NRF_LOG_LEVEL ANT_BPWR_PAGE_17_LOG_LEVEL
#define NRF_LOG_INFO_COLOR ANT_BPWR_PAGE_17_INFO_COLOR
#else // ANT_BPWR_PAGE_17_LOG_ENABLED
#define NRF_LOG_LEVEL 0
#endif // ANT_BPWR_PAGE_17_LOG_ENABLED
#include "nrf_log.h"
static void page17_data_log(ant_bpwr_page17_data_t const * p_page_data)
{
NRF_LOG_INFO("Wheel:\r\n");
ant_bpwr_page_torque_log((ant_bpwr_page_torque_data_t *) p_page_data);
}
void ant_bpwr_page_17_encode(uint8_t * p_page_buffer,
ant_bpwr_page17_data_t const * p_page_data)
{
ant_bpwr_page_torque_encode(p_page_buffer, (ant_bpwr_page_torque_data_t *)p_page_data);
page17_data_log(p_page_data);
}
void ant_bpwr_page_17_decode(uint8_t const * p_page_buffer,
ant_bpwr_page17_data_t * p_page_data)
{
ant_bpwr_page_torque_decode(p_page_buffer, (ant_bpwr_page_torque_data_t *) p_page_data);
page17_data_log(p_page_data);
}
#endif // NRF_MODULE_ENABLED(ANT_BPWR)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_PAGE_17_H__
#define ANT_BPWR_PAGE_17_H__
/** @file
*
* @defgroup ant_sdk_profiles_bpwr_page17 Bicycle Power profile page 17
* @{
* @ingroup ant_sdk_profiles_bpwr_pages
*/
#include <stdint.h>
#include "ant_bpwr_page_torque.h"
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Data structure for Bicycle Power data page 17.
*
* @note This structure implements only page 17 specific data.
*/
typedef ant_bpwr_page_torque_data_t ant_bpwr_page17_data_t;
/**@brief Initialize page 17.
*/
#define DEFAULT_ANT_BPWR_PAGE17() (ant_bpwr_page17_data_t) DEFAULT_ANT_BPWR_PAGE_TORQUE(0, 0, 0, 0)
/**@brief Function for encoding page 17.
*
* @param[in] p_page_data Pointer to the page data.
* @param[out] p_page_buffer Pointer to the data buffer.
*/
void ant_bpwr_page_17_encode(uint8_t * p_page_buffer,
ant_bpwr_page17_data_t const * p_page_data);
/**@brief Function for decoding page 17.
*
* @param[in] p_page_buffer Pointer to the data buffer.
* @param[out] p_page_data Pointer to the page data.
*/
void ant_bpwr_page_17_decode(uint8_t const * p_page_buffer,
ant_bpwr_page17_data_t * p_page_data);
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_PAGE_17_H__
/** @} */

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_BPWR)
#include "ant_bpwr_page_18.h"
#define NRF_LOG_MODULE_NAME "ANT_BPWR_PAGE_18"
#if ANT_BPWR_PAGE_18_LOG_ENABLED
#define NRF_LOG_LEVEL ANT_BPWR_PAGE_18_LOG_LEVEL
#define NRF_LOG_INFO_COLOR ANT_BPWR_PAGE_18_INFO_COLOR
#else // ANT_BPWR_PAGE_18_LOG_ENABLED
#define NRF_LOG_LEVEL 0
#endif // ANT_BPWR_PAGE_18_LOG_ENABLED
#include "nrf_log.h"
static void page18_data_log(ant_bpwr_page18_data_t const * p_page_data)
{
NRF_LOG_INFO("Crank:\r\n");
ant_bpwr_page_torque_log((ant_bpwr_page_torque_data_t *) p_page_data);
}
void ant_bpwr_page_18_encode(uint8_t * p_page_buffer,
ant_bpwr_page18_data_t const * p_page_data)
{
ant_bpwr_page_torque_encode(p_page_buffer, (ant_bpwr_page_torque_data_t *)p_page_data);
page18_data_log(p_page_data);
}
void ant_bpwr_page_18_decode(uint8_t const * p_page_buffer,
ant_bpwr_page18_data_t * p_page_data)
{
ant_bpwr_page_torque_decode(p_page_buffer, (ant_bpwr_page_torque_data_t *) p_page_data);
page18_data_log(p_page_data);
}
#endif // NRF_MODULE_ENABLED(ANT_BPWR)

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/**
* Copyright (c) 2011 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_PAGE_18_H__
#define ANT_BPWR_PAGE_18_H__
/** @file
*
* @defgroup ant_sdk_profiles_bpwr_page18 Bicycle Power profile page 18
* @{
* @ingroup ant_sdk_profiles_bpwr_pages
*/
#include <stdint.h>
#include "ant_bpwr_page_torque.h"
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Data structure for Bicycle Power data page 18.
*
* @note This structure implements only page 18 specific data.
*/
typedef ant_bpwr_page_torque_data_t ant_bpwr_page18_data_t;
/**@brief Initialize page 18.
*/
#define DEFAULT_ANT_BPWR_PAGE18() (ant_bpwr_page18_data_t) DEFAULT_ANT_BPWR_PAGE_TORQUE(0, 0, 0, 0)
/**@brief Function for encoding page 18.
*
* @param[in] p_page_data Pointer to the page data.
* @param[out] p_page_buffer Pointer to the data buffer.
*/
void ant_bpwr_page_18_encode(uint8_t * p_page_buffer,
ant_bpwr_page18_data_t const * p_page_data);
/**@brief Function for decoding page 18.
*
* @param[in] p_page_buffer Pointer to the data buffer.
* @param[out] p_page_data Pointer to the page data.
*/
void ant_bpwr_page_18_decode(uint8_t const * p_page_buffer,
ant_bpwr_page18_data_t * p_page_data);
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_PAGE_18_H__
/** @} */

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "sdk_common.h"
#if NRF_MODULE_ENABLED(ANT_BPWR)
#include <stdio.h>
#include "ant_bpwr_page_torque.h"
#include "ant_bpwr_utils.h"
#define NRF_LOG_MODULE_NAME "ANT_BPWR_PAGE_TORQUE"
#if ANT_BPWR_PAGE_TORQUE_LOG_ENABLED
#define NRF_LOG_LEVEL ANT_BPWR_PAGE_TORQUE_LOG_LEVEL
#define NRF_LOG_INFO_COLOR ANT_BPWR_PAGE_TORQUE_INFO_COLOR
#else // ANT_BPWR_PAGE_TORQUE_LOG_ENABLED
#define NRF_LOG_LEVEL 0
#endif // ANT_BPWR_PAGE_TORQUE_LOG_ENABLED
#include "nrf_log.h"
/**@brief bicycle power page torque data layout structure. */
typedef struct
{
uint8_t update_event_count;
uint8_t tick;
uint8_t reserved;
uint8_t period[2];
uint8_t accumulated_torque[2];
}ant_bpwr_page_torque_data_layout_t;
STATIC_ASSERT(ANT_BPWR_TORQUE_PERIOD_DISP_PRECISION == 1000); ///< Display format need to be updated
STATIC_ASSERT(ANT_BPWR_ACC_TORQUE_DISP_PRECISION == 10); ///< Display format need to be updated
void ant_bpwr_page_torque_log(ant_bpwr_page_torque_data_t const * p_page_data)
{
uint16_t period = ANT_BPWR_TORQUE_PERIOD_RESCALE(p_page_data->period);
uint32_t acc_torque = ANT_BPWR_ACC_TORQUE_RESCALE(p_page_data->accumulated_torque);
NRF_LOG_INFO("event count: %u\r\n", p_page_data->update_event_count);
NRF_LOG_INFO("tick: %u\r\n", p_page_data->tick);
NRF_LOG_INFO("period: %u.%03us\r\n",
(unsigned int)(period / ANT_BPWR_TORQUE_PERIOD_DISP_PRECISION),
(unsigned int)(period % ANT_BPWR_TORQUE_PERIOD_DISP_PRECISION));
NRF_LOG_INFO("accumulated torque: %u.%01uNm\r\n",
(unsigned int)(acc_torque / ANT_BPWR_ACC_TORQUE_DISP_PRECISION),
(unsigned int)(acc_torque % ANT_BPWR_ACC_TORQUE_DISP_PRECISION));
}
void ant_bpwr_page_torque_encode(uint8_t * p_page_buffer,
ant_bpwr_page_torque_data_t const * p_page_data)
{
ant_bpwr_page_torque_data_layout_t * p_outcoming_data =
(ant_bpwr_page_torque_data_layout_t *)p_page_buffer;
p_outcoming_data->update_event_count = p_page_data->update_event_count;
p_outcoming_data->tick = p_page_data->tick;
UNUSED_PARAMETER(uint16_encode(p_page_data->period, p_outcoming_data->period));
UNUSED_PARAMETER(uint16_encode(p_page_data->accumulated_torque,
p_outcoming_data->accumulated_torque));
}
void ant_bpwr_page_torque_decode(uint8_t const * p_page_buffer,
ant_bpwr_page_torque_data_t * p_page_data)
{
ant_bpwr_page_torque_data_layout_t const * p_incoming_data =
(ant_bpwr_page_torque_data_layout_t *)p_page_buffer;
p_page_data->update_event_count = p_incoming_data->update_event_count;
p_page_data->tick = p_incoming_data->tick;
p_page_data->period = uint16_decode(p_incoming_data->period);
p_page_data->accumulated_torque = uint16_decode(p_incoming_data->accumulated_torque);
}
#endif // NRF_MODULE_ENABLED(ANT_BPWR)

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_PAGE_TORQUE_COMMON_H__
#define ANT_BPWR_PAGE_TORQUE_COMMON_H__
/** @file
*
* @defgroup ant_sdk_profiles_bicycle_p_page_torque Bicycle Power profile pages 17, 18 (commons)
* @{
* @ingroup ant_sdk_profiles_bpwr_pages
*/
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/**@brief Common data structure for Bicycle Power data pages 17, 18.
*
* @note This structure implements specific data that is common for pages 17, 18.
*/
typedef struct
{
uint8_t update_event_count; ///< Power event count.
uint8_t tick; ///< Wheel/crank revolutions counter.
uint16_t period; ///< Accumulated wheel/crank period (1/2048 s).
uint16_t accumulated_torque; ///< Accumulated wheel/torque (1/32 Nm).
} ant_bpwr_page_torque_data_t;
/**@brief Initialize page torque.
*/
#define DEFAULT_ANT_BPWR_PAGE_TORQUE(up_evt_cnt, def_tick, def_period, acc_torque) \
{ \
.update_event_count = (up_evt_cnt), \
.tick = (def_tick), \
.period = (def_period), \
.accumulated_torque = (acc_torque) \
}
/**@brief Function for encoding pages 17, 18.
*
* @param[in] p_page_data Pointer to the page data.
* @param[out] p_page_buffer Pointer to the data buffer.
*/
void ant_bpwr_page_torque_encode(uint8_t * p_page_buffer,
ant_bpwr_page_torque_data_t const * p_page_data);
/**@brief Function for decoding pages 17, 18.
*
* @param[in] p_page_buffer Pointer to the data buffer.
* @param[out] p_page_data Pointer to the page data.
*/
void ant_bpwr_page_torque_decode(uint8_t const * p_page_buffer,
ant_bpwr_page_torque_data_t * p_page_data);
/**@brief Function for logging pages 17, 18.
*
* @param[in] p_page_data Pointer to the page data.
*/
void ant_bpwr_page_torque_log(ant_bpwr_page_torque_data_t const * p_page_data);
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_PAGE_TORQUE_COMMON_H__
/** @} */

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_PAGES_H__
#define ANT_BPWR_PAGES_H__
/** @file
*
* @defgroup ant_sdk_profiles_bpwr_pages Bicycle Power profile pages
* @{
* @ingroup ant_bpwr
* @brief This module implements functions for the BPWR data pages.
*/
#include "ant_bpwr_page_1.h" // Calibration message main data page.
#include "ant_bpwr_page_16.h" // Standard power-only page.
#include "ant_bpwr_page_17.h" // Wheel Torque main data page.
#include "ant_bpwr_page_18.h" // Crank Torque main data page.
#include "ant_bpwr_common_data.h" // Instantaneous cadence data.
#include "ant_common_page_80.h" // Manufacturer's information data page.
#include "ant_common_page_81.h" // Product information data page.
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_PAGES_H__
/** @} */

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/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#include "ant_bpwr_simulator.h"
#include "app_util.h"
#include "nordic_common.h"
#define POWER_MIN 0
#define POWER_MAX 2000
#define POWER_INCR 10
#define CADENCE_MIN 0
#define CADENCE_MAX (UINT8_MAX - 1)
#define CADENCE_INCR 1
#define PEDAL_MIN 0
#define PEDAL_MAX 100
#define PEDAL_INCR 1
#define TORQUE_PERIOD 774
#define SIMULATOR_TIME_INCREMENT BPWR_MSG_PERIOD
#define TORQUE_INCR 10
void ant_bpwr_simulator_init(ant_bpwr_simulator_t * p_simulator,
ant_bpwr_simulator_cfg_t const * p_config,
bool auto_change)
{
p_simulator->p_profile = p_config->p_profile;
p_simulator->_cb.auto_change = auto_change;
p_simulator->_cb.tick_incr = 0;
p_simulator->_cb.power_sensorsim_cfg.min = POWER_MIN;
p_simulator->_cb.power_sensorsim_cfg.max = POWER_MAX;
p_simulator->_cb.power_sensorsim_cfg.incr = POWER_INCR;
p_simulator->_cb.power_sensorsim_cfg.start_at_max = false;
p_simulator->_cb.cadence_sensorsim_cfg.min = CADENCE_MIN;
p_simulator->_cb.cadence_sensorsim_cfg.max = CADENCE_MAX;
p_simulator->_cb.cadence_sensorsim_cfg.incr = CADENCE_INCR;
p_simulator->_cb.cadence_sensorsim_cfg.start_at_max = false;
p_simulator->_cb.pedal_sensorsim_cfg.min = PEDAL_MIN;
p_simulator->_cb.pedal_sensorsim_cfg.max = PEDAL_MAX;
p_simulator->_cb.pedal_sensorsim_cfg.incr = PEDAL_INCR;
p_simulator->_cb.pedal_sensorsim_cfg.start_at_max = false;
p_simulator->p_profile->BPWR_PROFILE_pedal_power.differentiation = 0x01; // right
sensorsim_init(&(p_simulator->_cb.power_sensorsim_state),
&(p_simulator->_cb.power_sensorsim_cfg));
sensorsim_init(&(p_simulator->_cb.cadence_sensorsim_state),
&(p_simulator->_cb.cadence_sensorsim_cfg));
sensorsim_init(&(p_simulator->_cb.pedal_sensorsim_state),
&(p_simulator->_cb.pedal_sensorsim_cfg));
}
void ant_bpwr_simulator_one_iteration(ant_bpwr_simulator_t * p_simulator, ant_bpwr_evt_t event)
{
switch (event)
{
case ANT_BPWR_PAGE_16_UPDATED:
if (p_simulator->_cb.auto_change)
{
UNUSED_PARAMETER(sensorsim_measure(&(p_simulator->_cb.power_sensorsim_state),
&(p_simulator->_cb.power_sensorsim_cfg)));
UNUSED_PARAMETER(sensorsim_measure(&(p_simulator->_cb.cadence_sensorsim_state),
&(p_simulator->_cb.cadence_sensorsim_cfg)));
UNUSED_PARAMETER(sensorsim_measure(&(p_simulator->_cb.pedal_sensorsim_state),
&(p_simulator->_cb.pedal_sensorsim_cfg)));
}
p_simulator->p_profile->BPWR_PROFILE_instantaneous_power =
p_simulator->_cb.power_sensorsim_state.current_val;
p_simulator->p_profile->BPWR_PROFILE_accumulated_power +=
p_simulator->_cb.power_sensorsim_state.current_val;
if (p_simulator->p_profile->BPWR_PROFILE_accumulated_power == UINT16_MAX)
{
p_simulator->p_profile->BPWR_PROFILE_accumulated_power = 0;
}
p_simulator->p_profile->BPWR_PROFILE_instantaneous_cadence =
p_simulator->_cb.cadence_sensorsim_state.current_val;
p_simulator->p_profile->BPWR_PROFILE_pedal_power.distribution =
p_simulator->_cb.pedal_sensorsim_state.current_val;
p_simulator->p_profile->BPWR_PROFILE_power_update_event_count++;
break;
case ANT_BPWR_PAGE_17_UPDATED:
if (p_simulator->_cb.auto_change)
{
UNUSED_PARAMETER(sensorsim_measure(&(p_simulator->_cb.cadence_sensorsim_state),
&(p_simulator->_cb.cadence_sensorsim_cfg)));
}
p_simulator->p_profile->BPWR_PROFILE_instantaneous_cadence =
p_simulator->_cb.cadence_sensorsim_state.current_val;
p_simulator->p_profile->BPWR_PROFILE_wheel_period += TORQUE_PERIOD;
p_simulator->_cb.tick_incr +=
SIMULATOR_TIME_INCREMENT;
p_simulator->p_profile->BPWR_PROFILE_wheel_tick +=
p_simulator->_cb.tick_incr / (TORQUE_PERIOD * 16);
p_simulator->_cb.tick_incr =
p_simulator->_cb.tick_incr % (TORQUE_PERIOD * 16);
p_simulator->p_profile->BPWR_PROFILE_wheel_accumulated_torque += TORQUE_INCR;
p_simulator->p_profile->BPWR_PROFILE_wheel_update_event_count++;
break;
case ANT_BPWR_PAGE_18_UPDATED:
if (p_simulator->_cb.auto_change)
{
UNUSED_PARAMETER(sensorsim_measure(&(p_simulator->_cb.cadence_sensorsim_state),
&(p_simulator->_cb.cadence_sensorsim_cfg)));
}
p_simulator->p_profile->BPWR_PROFILE_instantaneous_cadence =
p_simulator->_cb.cadence_sensorsim_state.current_val;
p_simulator->p_profile->BPWR_PROFILE_crank_period = TORQUE_PERIOD;
p_simulator->_cb.tick_incr +=
SIMULATOR_TIME_INCREMENT;
p_simulator->p_profile->BPWR_PROFILE_crank_tick +=
p_simulator->_cb.tick_incr / (TORQUE_PERIOD * 16);
p_simulator->_cb.tick_incr =
p_simulator->_cb.tick_incr % (TORQUE_PERIOD * 16);
p_simulator->p_profile->BPWR_PROFILE_crank_accumulated_torque += TORQUE_INCR;
p_simulator->p_profile->BPWR_PROFILE_crank_update_event_count++;
break;
default:
break;
}
}
void ant_bpwr_simulator_increment(ant_bpwr_simulator_t * p_simulator)
{
if (!p_simulator->_cb.auto_change)
{
sensorsim_increment(&(p_simulator->_cb.power_sensorsim_state),
&(p_simulator->_cb.power_sensorsim_cfg));
sensorsim_increment(&(p_simulator->_cb.cadence_sensorsim_state),
&(p_simulator->_cb.cadence_sensorsim_cfg));
sensorsim_increment(&(p_simulator->_cb.pedal_sensorsim_state),
&(p_simulator->_cb.pedal_sensorsim_cfg));
}
}
void ant_bpwr_simulator_decrement(ant_bpwr_simulator_t * p_simulator)
{
if (!p_simulator->_cb.auto_change)
{
sensorsim_decrement(&(p_simulator->_cb.power_sensorsim_state),
&(p_simulator->_cb.power_sensorsim_cfg));
sensorsim_decrement(&(p_simulator->_cb.cadence_sensorsim_state),
&(p_simulator->_cb.cadence_sensorsim_cfg));
sensorsim_decrement(&(p_simulator->_cb.pedal_sensorsim_state),
&(p_simulator->_cb.pedal_sensorsim_cfg));
}
}

123
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@ -1,123 +0,0 @@
/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_SIMULATOR_H__
#define ANT_BPWR_SIMULATOR_H__
/** @file
*
* @defgroup ant_sdk_simulators ANT simulators
* @ingroup ant_sdk_utils
* @brief Modules that simulate sensors.
*
* @defgroup ant_sdk_bpwr_simulator ANT BPWR simulator
* @{
* @ingroup ant_sdk_simulators
* @brief ANT BPWR simulator module.
*
* @details This module simulates power for the ANT BPWR profile. The module calculates
* abstract values, which are handled by the BPWR pages data model to ensure that they are
* compatible. It provides a handler for changing the power value manually and functionality
* for changing the power automatically.
*
*/
#include <stdint.h>
#include <stdbool.h>
#include "bsp.h"
#include "ant_bpwr.h"
#include "sensorsim.h"
#include "ant_bpwr_simulator_local.h"
#ifdef __cplusplus
extern "C" {
#endif
/**@brief BPWR simulator configuration structure. */
typedef struct
{
ant_bpwr_profile_t * p_profile; ///< Related profile.
ant_bpwr_torque_t sensor_type; ///< Type of related sensor.
} ant_bpwr_simulator_cfg_t;
/**@brief BPWR simulator structure. */
typedef struct
{
ant_bpwr_profile_t * p_profile; ///< Related profile.
ant_bpwr_simulator_cb_t _cb; ///< Internal control block.
} ant_bpwr_simulator_t;
/**@brief Function for initializing the ANT BPWR simulator instance.
*
* @param[in] p_simulator Pointer to the simulator instance.
* @param[in] p_config Pointer to the simulator configuration structure.
* @param[in] auto_change Enable or disable automatic changes of the power.
*/
void ant_bpwr_simulator_init(ant_bpwr_simulator_t * p_simulator,
ant_bpwr_simulator_cfg_t const * p_config,
bool auto_change);
/**@brief Function for simulating a device event.
*
* @details Based on this event, the transmitter data is simulated.
*
* This function should be called in the BPWR TX event handler.
*/
void ant_bpwr_simulator_one_iteration(ant_bpwr_simulator_t * p_simulator, ant_bpwr_evt_t event);
/**@brief Function for incrementing the power value.
*
* @param[in] p_simulator Pointer to the simulator instance.
*/
void ant_bpwr_simulator_increment(ant_bpwr_simulator_t * p_simulator);
/**@brief Function for decrementing the power value.
*
* @param[in] p_simulator Pointer to the simulator instance.
*/
void ant_bpwr_simulator_decrement(ant_bpwr_simulator_t * p_simulator);
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_SIMULATOR_H__
/** @} */

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@ -1,74 +0,0 @@
/**
* Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef ANT_BPWR_SIMULATOR_LOCAL_H__
#define ANT_BPWR_SIMULATOR_LOCAL_H__
#include <stdint.h>
#include <stdbool.h>
#include "bsp.h"
#include "ant_bpwr.h"
#include "sensorsim.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @ingroup ant_sdk_bpwr_simulator
* @brief BPWR simulator control block structure. */
typedef struct
{
bool auto_change; ///< Power will change automatically (if auto_change is set) or manually.
uint32_t tick_incr; ///< Fractional part of tick increment.
sensorsim_state_t power_sensorsim_state; ///< Power state of the simulated sensor.
sensorsim_cfg_t power_sensorsim_cfg; ///< Power configuration of the simulated sensor.
sensorsim_state_t cadence_sensorsim_state; ///< Cadence stated of the simulated sensor.
sensorsim_cfg_t cadence_sensorsim_cfg; ///< Cadence configuration of the simulated sensor.
sensorsim_state_t pedal_sensorsim_state; ///< Pedal state of the simulated sensor.
sensorsim_cfg_t pedal_sensorsim_cfg; ///< Pedal configuration of the simulated sensor.
}ant_bpwr_simulator_cb_t;
#ifdef __cplusplus
}
#endif
#endif // ANT_BPWR_SIMULATOR_LOCAL_H__

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