forked from springcute/rt-thread
[bsp][tm4c129x] Do not free net driver rx pBuf in receive method when device is not ready. Fix#4625
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7841aff0ca
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eebb2561ec
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@ -89,10 +89,12 @@
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#define PHY_PHYS_ADDR 0
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#endif
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#if 1
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#ifndef EMAC_PHY_CONFIG
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#define EMAC_PHY_CONFIG (EMAC_PHY_TYPE_INTERNAL | EMAC_PHY_INT_MDIX_EN | \
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EMAC_PHY_AN_100B_T_FULL_DUPLEX)
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#endif
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#endif
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/**
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* If necessary, set the defaui32t number of transmit and receive DMA descriptors
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@ -142,6 +144,11 @@ extern void lwIPHostGetTime(u32_t *time_s, u32_t *time_ns);
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#include "lwipopts.h"
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#include "drv_eth.h"
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/* Define those to better describe your network interface. */
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#define IFNAME0 't'
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#define IFNAME1 'i'
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/**
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* A structure used to keep track of driver state and error counts.
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*/
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@ -233,6 +240,13 @@ static tStellarisIF g_StellarisIFData = {
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volatile uint32_t g_ui32NormalInts;
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volatile uint32_t g_ui32AbnormalInts;
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/**
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* Status flag for EEE link established
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*/
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#if EEE_SUPPORT
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volatile bool g_bEEELinkActive;
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#endif
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/**
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* A macro which determines whether a pointer is within the SRAM address
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* space and, hence, points to a buffer that the Ethernet MAC can directly
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@ -335,9 +349,35 @@ tivaif_hwinit(struct netif *psNetif)
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{
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uint16_t ui16Val;
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/* clear the EEE Link Active flag */
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#if EEE_SUPPORT
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g_bEEELinkActive = false;
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#endif
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/* Set MAC hardware address length */
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psNetif->hwaddr_len = ETHARP_HWADDR_LEN;
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/* Set MAC hardware address */
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EMACAddrGet(EMAC0_BASE, 0, &(psNetif->hwaddr[0]));
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/* Maximum transfer unit */
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psNetif->mtu = 1500;
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/* Device capabilities */
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psNetif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP;
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/* Initialize the DMA descriptors. */
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InitDMADescriptors();
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#if defined(EMAC_PHY_IS_EXT_MII) || defined(EMAC_PHY_IS_EXT_RMII)
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/* If PHY is external then reset the PHY before configuring it */
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EMACPHYWrite(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_BMCR,
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EPHY_BMCR_MIIRESET);
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while((EMACPHYRead(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_BMCR) &
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EPHY_BMCR_MIIRESET) == EPHY_BMCR_MIIRESET);
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#endif
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/* Clear any stray PHY interrupts that may be set. */
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ui16Val = EMACPHYRead(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_MISR1);
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ui16Val = EMACPHYRead(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_MISR2);
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@ -398,8 +438,13 @@ tivaif_hwinit(struct netif *psNetif)
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IntMasterEnable();
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/* Tell the PHY to start an auto-negotiation cycle. */
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#if defined(EMAC_PHY_IS_EXT_MII) || defined(EMAC_PHY_IS_EXT_RMII)
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EMACPHYWrite(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_BMCR, (EPHY_BMCR_SPEED |
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EPHY_BMCR_DUPLEXM | EPHY_BMCR_ANEN | EPHY_BMCR_RESTARTAN));
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#else
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EMACPHYWrite(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_BMCR, (EPHY_BMCR_ANEN |
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EPHY_BMCR_RESTARTAN));
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#endif
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}
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#ifdef DEBUG
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@ -484,16 +529,16 @@ tivaif_check_pbuf(struct pbuf *p)
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tivaif_trace_pbuf("Copied:", pBuf);
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#endif
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DRIVER_STATS_INC(TXCopyCount);
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/* Reduce the reference count on the original pbuf since
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* we're not going to hold on to it after returning from
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* tivaif_transmit. Note that we already bumped
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* the reference count at the top of tivaif_transmit.
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*/
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pbuf_free(p);
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}
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}
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/* Reduce the reference count on the original pbuf since we're not
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* going to hold on to it after returning from tivaif_transmit.
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* Note that we already bumped the reference count at the top of
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* tivaif_transmit.
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*/
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pbuf_free(p);
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/* Send back the new pbuf pointer or NULL if an error occurred. */
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return(pBuf);
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}
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@ -573,7 +618,7 @@ tivaif_transmit(net_device_t dev, struct pbuf *p)
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{
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/**
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* The current write descriptor has a pbuf attached to it so this
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* implies that the ring is fui32l. Reject this transmit request with a
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* implies that the ring is full. Reject this transmit request with a
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* memory error since we can't satisfy it just now.
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*/
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pbuf_free(p);
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@ -630,13 +675,8 @@ tivaif_transmit(net_device_t dev, struct pbuf *p)
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pDesc->Desc.ui32CtrlStatus = 0;
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}
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#ifdef RT_LWIP_USING_HW_CHECKSUM
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pDesc->Desc.ui32CtrlStatus |= (DES0_TX_CTRL_IP_ALL_CKHSUMS |
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DES0_TX_CTRL_CHAINED);
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#else
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pDesc->Desc.ui32CtrlStatus |= (DES0_TX_CTRL_NO_CHKSUM |
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DES0_TX_CTRL_CHAINED);
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#endif
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/* Decrement our descriptor counter, move on to the next buffer in the
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* pbuf chain. */
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@ -761,7 +801,7 @@ tivaif_receive(net_device_t dev)
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{
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tDescriptorList *pDescList;
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tStellarisIF *pIF;
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struct pbuf *pBuf;
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static struct pbuf *pBuf = NULL;
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uint32_t ui32DescEnd;
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/* Get a pointer to our state data */
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@ -773,10 +813,10 @@ tivaif_receive(net_device_t dev)
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/* Start with a NULL pbuf so that we don't try to link chain the first
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* time round.
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*/
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pBuf = NULL;
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//pBuf = NULL;
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/* Determine where we start and end our walk of the descriptor list */
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ui32DescEnd = pDescList->ui32Read ? (pDescList->ui32Read - 1) : (pDescList->ui32NumDescs - 1);
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ui32DescEnd = pDescList->ui32Read ? (pDescList->ui32Read - 1) : (pDescList->ui32NumDescs - 1);
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/* Step through the descriptors that are marked for CPU attention. */
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while(pDescList->ui32Read != ui32DescEnd)
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@ -816,7 +856,7 @@ tivaif_receive(net_device_t dev)
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if(pBuf)
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{
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/* Link this pbuf to the last one we looked at since this buffer
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* is a continuation of an existing frame (split across mui32tiple
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* is a continuation of an existing frame (split across multiple
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* pbufs). Note that we use pbuf_cat() here rather than
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* pbuf_chain() since we don't want to increase the reference
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* count of either pbuf - we only want to link them together.
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@ -843,6 +883,7 @@ tivaif_receive(net_device_t dev)
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pbuf_free(pBuf);
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LINK_STATS_INC(link.drop);
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DRIVER_STATS_INC(RXPacketErrCount);
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pBuf = NULL;
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}
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else
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{
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@ -860,13 +901,11 @@ tivaif_receive(net_device_t dev)
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#if NO_SYS
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if(ethernet_input(pBuf, psNetif) != RT_EOK)
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{
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#else
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//if(tcpip_input(pBuf, psNetif) != RT_EOK)
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if((rt_mb_send(dev->rx_pbuf_mb, (rt_uint32_t)pBuf) != RT_EOK) ||
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(eth_device_ready(&(dev->parent)) != RT_EOK))
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{
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//if(tcpip_input(pBuf, psNetif) != ERR_OK)
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if(rt_mb_send(dev->rx_pbuf_mb, (rt_uint32_t)pBuf) != RT_EOK)
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#endif
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{
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/* drop the packet */
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LWIP_DEBUGF(NETIF_DEBUG, ("tivaif_input: input error\n"));
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pbuf_free(pBuf);
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@ -943,6 +982,9 @@ void
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tivaif_process_phy_interrupt(net_device_t dev)
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{
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uint16_t ui16Val, ui16Status;
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#if EEE_SUPPORT
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uint16_t ui16EEEStatus;
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#endif
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uint32_t ui32Config, ui32Mode, ui32RxMaxFrameSize;
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/* Read the PHY interrupt status. This clears all interrupt sources.
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@ -951,13 +993,16 @@ tivaif_process_phy_interrupt(net_device_t dev)
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*/
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ui16Val = EMACPHYRead(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_MISR1);
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/*
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* Dummy read PHY REG EPHY_BMSR, it will force update the EPHY_STS register
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*/
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EMACPHYRead(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_BMSR);
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/* Read the current PHY status. */
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ui16Status = EMACPHYRead(EMAC0_BASE, PHY_PHYS_ADDR, EPHY_STS);
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/* If EEE mode support is requested then read the value of the Link
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* partners status
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*/
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#if EEE_SUPPORT
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ui16EEEStatus = EMACPHYMMDRead(EMAC0_BASE, PHY_PHYS_ADDR, 0x703D);
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#endif
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/* Has the link status changed? */
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if(ui16Val & EPHY_MISR1_LINKSTAT)
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{
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@ -972,6 +1017,19 @@ tivaif_process_phy_interrupt(net_device_t dev)
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eth_device_linkchange(&(dev->parent), RT_TRUE);
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#endif
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/* if the link has been advertised as EEE capable then configure
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* the MAC register for LPI timers and manually set the PHY link
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* status bit
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*/
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#if EEE_SUPPORT
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if(ui16EEEStatus & 0x2)
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{
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EMACLPIConfig(EMAC0_BASE, true, 1000, 36);
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EMACLPILinkSet(EMAC0_BASE);
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g_bEEELinkActive = true;
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}
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#endif
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/* In this case we drop through since we may need to reconfigure
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* the MAC depending upon the speed and half/fui32l-duplex settings.
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*/
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@ -985,6 +1043,16 @@ tivaif_process_phy_interrupt(net_device_t dev)
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//tcpip_callback((tcpip_callback_fn)netif_set_link_down, psNetif);
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eth_device_linkchange(&(dev->parent), RT_FALSE);
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#endif
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/* if the link has been advertised as EEE capable then clear the
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* MAC register LPI timers and manually clear the PHY link status
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* bit
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*/
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#if EEE_SUPPORT
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g_bEEELinkActive = false;
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EMACLPILinkClear(EMAC0_BASE);
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EMACLPIConfig(EMAC0_BASE, false, 1000, 0);
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#endif
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}
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}
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@ -1061,11 +1129,17 @@ tivaif_interrupt(net_device_t dev, uint32_t ui32Status)
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*/
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if(ui32Status & EMAC_INT_TRANSMIT)
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{
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#if EEE_SUPPORT
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if(g_bEEELinkActive)
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{
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EMACLPIEnter(EMAC0_BASE);
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}
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#endif
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tivaif_process_transmit(dev->dma_if);
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}
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/**
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* Process the receive DMA list and pass all successfui32ly received packets
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* Process the receive DMA list and pass all successfully received packets
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* up the stack. We also call this function in cases where the receiver has
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* stalled due to missing buffers since the receive function will attempt to
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* allocate new pbufs for descriptor entries which have none.
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