forked from springcute/rt-thread
Merge branch 'master' of https://github.com/RT-Thread/rt-thread
This commit is contained in:
Bernard Xiong
commit
0e52533f66
|
|
@ -3,13 +3,28 @@
|
|||
import os
|
||||
from building import *
|
||||
|
||||
Import('rtconfig')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
objs = []
|
||||
list = os.listdir(cwd)
|
||||
|
||||
for d in list:
|
||||
path = os.path.join(cwd, d)
|
||||
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||
objs = objs + SConscript(os.path.join('drivers', 'SConscript'))
|
||||
objs = objs + SConscript(os.path.join('utilities', 'SConscript'))
|
||||
|
||||
if rtconfig.CROSS_TOOL == 'gcc':
|
||||
objs = objs + SConscript(os.path.join('mcuxpresso', 'SConscript'))
|
||||
elif rtconfig.CROSS_TOOL == 'keil':
|
||||
objs = objs + SConscript(os.path.join('arm', 'SConscript'))
|
||||
elif rtconfig.CROSS_TOOL == 'iar':
|
||||
objs = objs + SConscript(os.path.join('iar', 'SConscript'))
|
||||
|
||||
src = Glob('*.c')
|
||||
CPPPATH = [cwd]
|
||||
CPPDEFINES = ['CORE_M4', 'CPU_LPC54608', 'CPU_LPC54608J512ET180=1']
|
||||
|
||||
group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
|
||||
|
||||
objs = objs + group
|
||||
|
||||
Return('objs')
|
||||
|
|
|
|||
|
|
@ -1,22 +1,10 @@
|
|||
# RT-Thread building script for component
|
||||
|
||||
Import('rtconfig')
|
||||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Split('''
|
||||
startup_LPC54608.s
|
||||
''')
|
||||
src += [cwd + '/../system_LPC54608.c']
|
||||
CPPPATH = [cwd + '/../../../CMSIS/Include']
|
||||
CPPPATH = [cwd + '/..']
|
||||
CPPDEFINES = ['CORE_M4']
|
||||
CPPDEFINES += ['CPU_LPC54608']
|
||||
CPPDEFINES += ['CPU_LPC54608J512ET180=1']
|
||||
|
||||
# add for startup script
|
||||
if rtconfig.CROSS_TOOL == 'keil':
|
||||
src += ['startup_LPC54608.s']
|
||||
|
||||
group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES, LIBS=['keil_lib_power'], LIBPATH=[cwd])
|
||||
group = DefineGroup('CMSIS', src, depend = [''], LIBS=['keil_lib_power'], LIBPATH=[cwd])
|
||||
|
||||
Return('group')
|
||||
|
|
|
|||
Binary file not shown.
|
|
@ -0,0 +1,119 @@
|
|||
/*
|
||||
** ###################################################################
|
||||
** Processors: LPC54608J512BD208
|
||||
** LPC54608J512ET180
|
||||
**
|
||||
** Compiler: IAR ANSI C/C++ Compiler for ARM
|
||||
** Reference manual: LPC54S60x/LPC5460x User manual Rev.0.9 7 Nov 2016
|
||||
** Version: rev. 1.1, 2016-11-25
|
||||
** Build: b161227
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the IAR ANSI C/C++ Compiler for ARM
|
||||
**
|
||||
** Copyright (c) 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016 - 2017 NXP
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** o Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** o Neither the name of the copyright holder nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0;
|
||||
define symbol __ram_vector_table_offset__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003FF : 0;
|
||||
|
||||
define symbol m_interrupts_start = 0x00000000;
|
||||
define symbol m_interrupts_end = 0x000003FF;
|
||||
|
||||
define symbol m_text_start = 0x00000400;
|
||||
define symbol m_text_end = 0x0007FFFF;
|
||||
|
||||
define symbol m_interrupts_ram_start = 0x20000000;
|
||||
define symbol m_interrupts_ram_end = 0x20000000 + __ram_vector_table_offset__;
|
||||
|
||||
define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
|
||||
define symbol m_data_end = 0x20027FFF;
|
||||
|
||||
define symbol m_usb_sram_start = 0x40100000;
|
||||
define symbol m_usb_sram_end = 0x40101FFF;
|
||||
|
||||
/* USB BDT size */
|
||||
define symbol usb_bdt_size = 0x0;
|
||||
/* Sizes */
|
||||
if (isdefinedsymbol(__stack_size__)) {
|
||||
define symbol __size_cstack__ = __stack_size__;
|
||||
} else {
|
||||
define symbol __size_cstack__ = 0x0400;
|
||||
}
|
||||
|
||||
if (isdefinedsymbol(__heap_size__)) {
|
||||
define symbol __size_heap__ = __heap_size__;
|
||||
} else {
|
||||
define symbol __size_heap__ = 0x0400;
|
||||
}
|
||||
|
||||
define exported symbol __VECTOR_TABLE = m_interrupts_start;
|
||||
define exported symbol __VECTOR_RAM = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start;
|
||||
define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
|
||||
| mem:[from m_text_start to m_text_end];
|
||||
define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
|
||||
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
|
||||
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||
define block RW { readwrite };
|
||||
define block ZI { zi };
|
||||
|
||||
/* regions for USB */
|
||||
define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
|
||||
define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
|
||||
place in USB_BDT_region { section m_usb_bdt };
|
||||
place in USB_SRAM_region { section m_usb_global };
|
||||
|
||||
initialize by copy { readwrite, section .textrw };
|
||||
|
||||
if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
|
||||
{
|
||||
/* Required in a multi-threaded application */
|
||||
initialize by copy with packing = none { section __DLIB_PERTHREAD };
|
||||
}
|
||||
|
||||
do not initialize { section .noinit, section m_usb_bdt, section m_usb_global };
|
||||
|
||||
place at address mem: m_interrupts_start { readonly section .intvec };
|
||||
place in TEXT_region { readonly };
|
||||
place in DATA_region { block RW };
|
||||
place in DATA_region { block ZI };
|
||||
place in DATA_region { last block HEAP };
|
||||
place in CSTACK_region { block CSTACK };
|
||||
place in m_interrupts_ram_region { section m_interrupts_ram };
|
||||
|
||||
|
|
@ -0,0 +1,111 @@
|
|||
/*
|
||||
** ###################################################################
|
||||
** Processors: LPC54608J512BD208
|
||||
** LPC54608J512ET180
|
||||
**
|
||||
** Compiler: IAR ANSI C/C++ Compiler for ARM
|
||||
** Reference manual: LPC54S60x/LPC5460x User manual Rev.0.9 7 Nov 2016
|
||||
** Version: rev. 1.1, 2016-11-25
|
||||
** Build: b161227
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the IAR ANSI C/C++ Compiler for ARM
|
||||
**
|
||||
** Copyright (c) 2016 Freescale Semiconductor, Inc.
|
||||
** Copyright 2016 - 2017 NXP
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** o Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** o Neither the name of the copyright holder nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.nxp.com
|
||||
** mail: support@nxp.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
define symbol m_interrupts_start = 0x20000000;
|
||||
define symbol m_interrupts_end = 0x200003FF;
|
||||
|
||||
define symbol m_text_start = 0x20000400;
|
||||
define symbol m_text_end = 0x200141FF;
|
||||
|
||||
define symbol m_data_start = 0x20014200;
|
||||
define symbol m_data_end = 0x20027FFF;
|
||||
|
||||
define symbol m_usb_sram_start = 0x40100000;
|
||||
define symbol m_usb_sram_end = 0x40101FFF;
|
||||
|
||||
/* USB BDT size */
|
||||
define symbol usb_bdt_size = 0x0;
|
||||
/* Sizes */
|
||||
if (isdefinedsymbol(__stack_size__)) {
|
||||
define symbol __size_cstack__ = __stack_size__;
|
||||
} else {
|
||||
define symbol __size_cstack__ = 0x0400;
|
||||
}
|
||||
|
||||
if (isdefinedsymbol(__heap_size__)) {
|
||||
define symbol __size_heap__ = __heap_size__;
|
||||
} else {
|
||||
define symbol __size_heap__ = 0x0400;
|
||||
}
|
||||
|
||||
define exported symbol __VECTOR_TABLE = m_interrupts_start;
|
||||
define exported symbol __VECTOR_RAM = m_interrupts_start;
|
||||
define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
|
||||
| mem:[from m_text_start to m_text_end];
|
||||
define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
|
||||
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
||||
define block RW { readwrite };
|
||||
define block ZI { zi };
|
||||
|
||||
/* regions for USB */
|
||||
define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
|
||||
define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
|
||||
place in USB_BDT_region { section m_usb_bdt };
|
||||
place in USB_SRAM_region { section m_usb_global };
|
||||
|
||||
initialize by copy { readwrite, section .textrw };
|
||||
|
||||
if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
|
||||
{
|
||||
/* Required in a multi-threaded application */
|
||||
initialize by copy with packing = none { section __DLIB_PERTHREAD };
|
||||
}
|
||||
|
||||
do not initialize { section .noinit, section m_usb_bdt, section m_usb_global };
|
||||
|
||||
place at address mem: m_interrupts_start { readonly section .intvec };
|
||||
place in TEXT_region { readonly };
|
||||
place in DATA_region { block RW };
|
||||
place in DATA_region { block ZI };
|
||||
place in DATA_region { last block HEAP };
|
||||
place in CSTACK_region { block CSTACK };
|
||||
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Split('''
|
||||
startup_LPC54608.s
|
||||
''')
|
||||
|
||||
group = DefineGroup('CMSIS', src, depend = [''], LIBS=['iar_lib_power'], LIBPATH=[cwd])
|
||||
|
||||
Return('group')
|
||||
Binary file not shown.
|
|
@ -0,0 +1,615 @@
|
|||
;/*****************************************************************************
|
||||
; * @file: startup_LPC54608.s
|
||||
; * @purpose: CMSIS Cortex-M4 Core Device Startup File
|
||||
; * LPC54608
|
||||
; * @version: 1.1
|
||||
; * @date: 2016-11-25
|
||||
; *----------------------------------------------------------------------------
|
||||
; *
|
||||
; * Copyright 1997 - 2016 Freescale Semiconductor.
|
||||
; * Copyright 2016 - 2017 NXP
|
||||
; *
|
||||
; Redistribution and use in source and binary forms, with or without modification,
|
||||
; are permitted provided that the following conditions are met:
|
||||
;
|
||||
; o Redistributions of source code must retain the above copyright notice, this list
|
||||
; of conditions and the following disclaimer.
|
||||
;
|
||||
; o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
; list of conditions and the following disclaimer in the documentation and/or
|
||||
; other materials provided with the distribution.
|
||||
;
|
||||
; o Neither the name of the copyright holder nor the names of its
|
||||
; contributors may be used to endorse or promote products derived from this
|
||||
; software without specific prior written permission.
|
||||
;
|
||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
; ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
; ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;
|
||||
; The modules in this file are included in the libraries, and may be replaced
|
||||
; by any user-defined modules that define the PUBLIC symbol _program_start or
|
||||
; a user defined start symbol.
|
||||
; To override the cstartup defined in the library, simply add your modified
|
||||
; version to the workbench project.
|
||||
;
|
||||
; The vector table is normally located at address 0.
|
||||
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
|
||||
; The name "__vector_table" has special meaning for C-SPY:
|
||||
; it is where the SP start value is found, and the NVIC vector
|
||||
; table register (VTOR) is initialized to this address if != 0.
|
||||
;
|
||||
; Cortex-M version
|
||||
;
|
||||
|
||||
MODULE ?cstartup
|
||||
|
||||
;; Forward declaration of sections.
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
SECTION .intvec:CODE:NOROOT(2)
|
||||
|
||||
EXTERN __iar_program_start
|
||||
EXTERN SystemInit
|
||||
PUBLIC __vector_table
|
||||
PUBLIC __vector_table_0x1c
|
||||
PUBLIC __Vectors
|
||||
PUBLIC __Vectors_End
|
||||
PUBLIC __Vectors_Size
|
||||
|
||||
DATA
|
||||
|
||||
__vector_table
|
||||
DCD sfe(CSTACK)
|
||||
DCD Reset_Handler
|
||||
|
||||
DCD NMI_Handler
|
||||
DCD HardFault_Handler
|
||||
DCD MemManage_Handler
|
||||
DCD BusFault_Handler
|
||||
DCD UsageFault_Handler
|
||||
__vector_table_0x1c
|
||||
DCD 0
|
||||
DCD 0xFFFFFFFF ;ECRP
|
||||
DCD 0
|
||||
DCD 0
|
||||
DCD SVC_Handler
|
||||
DCD DebugMon_Handler
|
||||
DCD 0
|
||||
DCD PendSV_Handler
|
||||
DCD SysTick_Handler
|
||||
|
||||
; External Interrupts
|
||||
DCD WDT_BOD_IRQHandler ; Windowed watchdog timer, Brownout detect
|
||||
DCD DMA0_IRQHandler ; DMA controller
|
||||
DCD GINT0_IRQHandler ; GPIO group 0
|
||||
DCD GINT1_IRQHandler ; GPIO group 1
|
||||
DCD PIN_INT0_IRQHandler ; Pin interrupt 0 or pattern match engine slice 0
|
||||
DCD PIN_INT1_IRQHandler ; Pin interrupt 1or pattern match engine slice 1
|
||||
DCD PIN_INT2_IRQHandler ; Pin interrupt 2 or pattern match engine slice 2
|
||||
DCD PIN_INT3_IRQHandler ; Pin interrupt 3 or pattern match engine slice 3
|
||||
DCD UTICK0_IRQHandler ; Micro-tick Timer
|
||||
DCD MRT0_IRQHandler ; Multi-rate timer
|
||||
DCD CTIMER0_IRQHandler ; Standard counter/timer CTIMER0
|
||||
DCD CTIMER1_IRQHandler ; Standard counter/timer CTIMER1
|
||||
DCD SCT0_IRQHandler ; SCTimer/PWM
|
||||
DCD CTIMER3_IRQHandler ; Standard counter/timer CTIMER3
|
||||
DCD FLEXCOMM0_IRQHandler ; Flexcomm Interface 0 (USART, SPI, I2C, FLEXCOMM)
|
||||
DCD FLEXCOMM1_IRQHandler ; Flexcomm Interface 1 (USART, SPI, I2C, FLEXCOMM)
|
||||
DCD FLEXCOMM2_IRQHandler ; Flexcomm Interface 2 (USART, SPI, I2C, FLEXCOMM)
|
||||
DCD FLEXCOMM3_IRQHandler ; Flexcomm Interface 3 (USART, SPI, I2C, FLEXCOMM)
|
||||
DCD FLEXCOMM4_IRQHandler ; Flexcomm Interface 4 (USART, SPI, I2C, FLEXCOMM)
|
||||
DCD FLEXCOMM5_IRQHandler ; Flexcomm Interface 5 (USART, SPI, I2C,, FLEXCOMM)
|
||||
DCD FLEXCOMM6_IRQHandler ; Flexcomm Interface 6 (USART, SPI, I2C, I2S,, FLEXCOMM)
|
||||
DCD FLEXCOMM7_IRQHandler ; Flexcomm Interface 7 (USART, SPI, I2C, I2S,, FLEXCOMM)
|
||||
DCD ADC0_SEQA_IRQHandler ; ADC0 sequence A completion.
|
||||
DCD ADC0_SEQB_IRQHandler ; ADC0 sequence B completion.
|
||||
DCD ADC0_THCMP_IRQHandler ; ADC0 threshold compare and error.
|
||||
DCD DMIC0_IRQHandler ; Digital microphone and DMIC subsystem
|
||||
DCD HWVAD0_IRQHandler ; Hardware Voice Activity Detector
|
||||
DCD USB0_NEEDCLK_IRQHandler ; USB Activity Wake-up Interrupt
|
||||
DCD USB0_IRQHandler ; USB device
|
||||
DCD RTC_IRQHandler ; RTC alarm and wake-up interrupts
|
||||
DCD Reserved46_IRQHandler ; Reserved interrupt
|
||||
DCD Reserved47_IRQHandler ; Reserved interrupt
|
||||
DCD PIN_INT4_IRQHandler ; Pin interrupt 4 or pattern match engine slice 4 int
|
||||
DCD PIN_INT5_IRQHandler ; Pin interrupt 5 or pattern match engine slice 5 int
|
||||
DCD PIN_INT6_IRQHandler ; Pin interrupt 6 or pattern match engine slice 6 int
|
||||
DCD PIN_INT7_IRQHandler ; Pin interrupt 7 or pattern match engine slice 7 int
|
||||
DCD CTIMER2_IRQHandler ; Standard counter/timer CTIMER2
|
||||
DCD CTIMER4_IRQHandler ; Standard counter/timer CTIMER4
|
||||
DCD RIT_IRQHandler ; Repetitive Interrupt Timer
|
||||
DCD SPIFI0_IRQHandler ; SPI flash interface
|
||||
DCD FLEXCOMM8_IRQHandler ; Flexcomm Interface 8 (USART, SPI, I2C, FLEXCOMM)
|
||||
DCD FLEXCOMM9_IRQHandler ; Flexcomm Interface 9 (USART, SPI, I2C, FLEXCOMM)
|
||||
DCD SDIO_IRQHandler ; SD/MMC
|
||||
DCD CAN0_IRQ0_IRQHandler ; CAN0 interrupt0
|
||||
DCD CAN0_IRQ1_IRQHandler ; CAN0 interrupt1
|
||||
DCD CAN1_IRQ0_IRQHandler ; CAN1 interrupt0
|
||||
DCD CAN1_IRQ1_IRQHandler ; CAN1 interrupt1
|
||||
DCD USB1_IRQHandler ; USB1 interrupt
|
||||
DCD USB1_NEEDCLK_IRQHandler ; USB1 activity
|
||||
DCD ETHERNET_IRQHandler ; Ethernet
|
||||
DCD ETHERNET_PMT_IRQHandler ; Ethernet power management interrupt
|
||||
DCD ETHERNET_MACLP_IRQHandler ; Ethernet MAC interrupt
|
||||
DCD EEPROM_IRQHandler ; EEPROM interrupt
|
||||
DCD LCD_IRQHandler ; LCD interrupt
|
||||
DCD SHA_IRQHandler ; SHA interrupt
|
||||
DCD SMARTCARD0_IRQHandler ; Smart card 0 interrupt
|
||||
DCD SMARTCARD1_IRQHandler ; Smart card 1 interrupt
|
||||
__Vectors_End
|
||||
|
||||
__Vectors EQU __vector_table
|
||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||
|
||||
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Default interrupt handlers.
|
||||
;;
|
||||
|
||||
THUMB
|
||||
|
||||
PUBWEAK Reset_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reset_Handler
|
||||
LDR r0, =SystemInit
|
||||
BLX r0
|
||||
LDR r0, =__iar_program_start
|
||||
BX r0
|
||||
|
||||
PUBWEAK NMI_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
NMI_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK HardFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
HardFault_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK MemManage_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
MemManage_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK BusFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
BusFault_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK UsageFault_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
UsageFault_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK SVC_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SVC_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK DebugMon_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
DebugMon_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK PendSV_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
PendSV_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK SysTick_Handler
|
||||
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||
SysTick_Handler
|
||||
B .
|
||||
|
||||
PUBWEAK WDT_BOD_IRQHandler
|
||||
PUBWEAK WDT_BOD_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
WDT_BOD_IRQHandler
|
||||
LDR R0, =WDT_BOD_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK DMA0_IRQHandler
|
||||
PUBWEAK DMA0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
DMA0_IRQHandler
|
||||
LDR R0, =DMA0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK GINT0_IRQHandler
|
||||
PUBWEAK GINT0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
GINT0_IRQHandler
|
||||
LDR R0, =GINT0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK GINT1_IRQHandler
|
||||
PUBWEAK GINT1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
GINT1_IRQHandler
|
||||
LDR R0, =GINT1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PIN_INT0_IRQHandler
|
||||
PUBWEAK PIN_INT0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT0_IRQHandler
|
||||
LDR R0, =PIN_INT0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PIN_INT1_IRQHandler
|
||||
PUBWEAK PIN_INT1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT1_IRQHandler
|
||||
LDR R0, =PIN_INT1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PIN_INT2_IRQHandler
|
||||
PUBWEAK PIN_INT2_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT2_IRQHandler
|
||||
LDR R0, =PIN_INT2_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PIN_INT3_IRQHandler
|
||||
PUBWEAK PIN_INT3_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT3_IRQHandler
|
||||
LDR R0, =PIN_INT3_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK UTICK0_IRQHandler
|
||||
PUBWEAK UTICK0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
UTICK0_IRQHandler
|
||||
LDR R0, =UTICK0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK MRT0_IRQHandler
|
||||
PUBWEAK MRT0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
MRT0_IRQHandler
|
||||
LDR R0, =MRT0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CTIMER0_IRQHandler
|
||||
PUBWEAK CTIMER0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CTIMER0_IRQHandler
|
||||
LDR R0, =CTIMER0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CTIMER1_IRQHandler
|
||||
PUBWEAK CTIMER1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CTIMER1_IRQHandler
|
||||
LDR R0, =CTIMER1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SCT0_IRQHandler
|
||||
PUBWEAK SCT0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SCT0_IRQHandler
|
||||
LDR R0, =SCT0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CTIMER3_IRQHandler
|
||||
PUBWEAK CTIMER3_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CTIMER3_IRQHandler
|
||||
LDR R0, =CTIMER3_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM0_IRQHandler
|
||||
PUBWEAK FLEXCOMM0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM0_IRQHandler
|
||||
LDR R0, =FLEXCOMM0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM1_IRQHandler
|
||||
PUBWEAK FLEXCOMM1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM1_IRQHandler
|
||||
LDR R0, =FLEXCOMM1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM2_IRQHandler
|
||||
PUBWEAK FLEXCOMM2_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM2_IRQHandler
|
||||
LDR R0, =FLEXCOMM2_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM3_IRQHandler
|
||||
PUBWEAK FLEXCOMM3_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM3_IRQHandler
|
||||
LDR R0, =FLEXCOMM3_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM4_IRQHandler
|
||||
PUBWEAK FLEXCOMM4_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM4_IRQHandler
|
||||
LDR R0, =FLEXCOMM4_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM5_IRQHandler
|
||||
PUBWEAK FLEXCOMM5_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM5_IRQHandler
|
||||
LDR R0, =FLEXCOMM5_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM6_IRQHandler
|
||||
PUBWEAK FLEXCOMM6_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM6_IRQHandler
|
||||
LDR R0, =FLEXCOMM6_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM7_IRQHandler
|
||||
PUBWEAK FLEXCOMM7_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM7_IRQHandler
|
||||
LDR R0, =FLEXCOMM7_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK ADC0_SEQA_IRQHandler
|
||||
PUBWEAK ADC0_SEQA_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
ADC0_SEQA_IRQHandler
|
||||
LDR R0, =ADC0_SEQA_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK ADC0_SEQB_IRQHandler
|
||||
PUBWEAK ADC0_SEQB_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
ADC0_SEQB_IRQHandler
|
||||
LDR R0, =ADC0_SEQB_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK ADC0_THCMP_IRQHandler
|
||||
PUBWEAK ADC0_THCMP_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
ADC0_THCMP_IRQHandler
|
||||
LDR R0, =ADC0_THCMP_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK DMIC0_IRQHandler
|
||||
PUBWEAK DMIC0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
DMIC0_IRQHandler
|
||||
LDR R0, =DMIC0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK HWVAD0_IRQHandler
|
||||
PUBWEAK HWVAD0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
HWVAD0_IRQHandler
|
||||
LDR R0, =HWVAD0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK USB0_NEEDCLK_IRQHandler
|
||||
PUBWEAK USB0_NEEDCLK_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
USB0_NEEDCLK_IRQHandler
|
||||
LDR R0, =USB0_NEEDCLK_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK USB0_IRQHandler
|
||||
PUBWEAK USB0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
USB0_IRQHandler
|
||||
LDR R0, =USB0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK RTC_IRQHandler
|
||||
PUBWEAK RTC_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
RTC_IRQHandler
|
||||
LDR R0, =RTC_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK Reserved46_IRQHandler
|
||||
PUBWEAK Reserved46_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reserved46_IRQHandler
|
||||
LDR R0, =Reserved46_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK Reserved47_IRQHandler
|
||||
PUBWEAK Reserved47_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
Reserved47_IRQHandler
|
||||
LDR R0, =Reserved47_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PIN_INT4_IRQHandler
|
||||
PUBWEAK PIN_INT4_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT4_IRQHandler
|
||||
LDR R0, =PIN_INT4_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PIN_INT5_IRQHandler
|
||||
PUBWEAK PIN_INT5_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT5_IRQHandler
|
||||
LDR R0, =PIN_INT5_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PIN_INT6_IRQHandler
|
||||
PUBWEAK PIN_INT6_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT6_IRQHandler
|
||||
LDR R0, =PIN_INT6_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK PIN_INT7_IRQHandler
|
||||
PUBWEAK PIN_INT7_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
PIN_INT7_IRQHandler
|
||||
LDR R0, =PIN_INT7_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CTIMER2_IRQHandler
|
||||
PUBWEAK CTIMER2_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CTIMER2_IRQHandler
|
||||
LDR R0, =CTIMER2_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CTIMER4_IRQHandler
|
||||
PUBWEAK CTIMER4_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CTIMER4_IRQHandler
|
||||
LDR R0, =CTIMER4_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK RIT_IRQHandler
|
||||
PUBWEAK RIT_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
RIT_IRQHandler
|
||||
LDR R0, =RIT_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SPIFI0_IRQHandler
|
||||
PUBWEAK SPIFI0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SPIFI0_IRQHandler
|
||||
LDR R0, =SPIFI0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM8_IRQHandler
|
||||
PUBWEAK FLEXCOMM8_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM8_IRQHandler
|
||||
LDR R0, =FLEXCOMM8_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK FLEXCOMM9_IRQHandler
|
||||
PUBWEAK FLEXCOMM9_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
FLEXCOMM9_IRQHandler
|
||||
LDR R0, =FLEXCOMM9_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SDIO_IRQHandler
|
||||
PUBWEAK SDIO_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SDIO_IRQHandler
|
||||
LDR R0, =SDIO_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CAN0_IRQ0_IRQHandler
|
||||
PUBWEAK CAN0_IRQ0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CAN0_IRQ0_IRQHandler
|
||||
LDR R0, =CAN0_IRQ0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CAN0_IRQ1_IRQHandler
|
||||
PUBWEAK CAN0_IRQ1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CAN0_IRQ1_IRQHandler
|
||||
LDR R0, =CAN0_IRQ1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CAN1_IRQ0_IRQHandler
|
||||
PUBWEAK CAN1_IRQ0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CAN1_IRQ0_IRQHandler
|
||||
LDR R0, =CAN1_IRQ0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK CAN1_IRQ1_IRQHandler
|
||||
PUBWEAK CAN1_IRQ1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
CAN1_IRQ1_IRQHandler
|
||||
LDR R0, =CAN1_IRQ1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK USB1_IRQHandler
|
||||
PUBWEAK USB1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
USB1_IRQHandler
|
||||
LDR R0, =USB1_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK USB1_NEEDCLK_IRQHandler
|
||||
PUBWEAK USB1_NEEDCLK_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
USB1_NEEDCLK_IRQHandler
|
||||
LDR R0, =USB1_NEEDCLK_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK ETHERNET_IRQHandler
|
||||
PUBWEAK ETHERNET_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
ETHERNET_IRQHandler
|
||||
LDR R0, =ETHERNET_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK ETHERNET_PMT_IRQHandler
|
||||
PUBWEAK ETHERNET_PMT_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
ETHERNET_PMT_IRQHandler
|
||||
LDR R0, =ETHERNET_PMT_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK ETHERNET_MACLP_IRQHandler
|
||||
PUBWEAK ETHERNET_MACLP_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
ETHERNET_MACLP_IRQHandler
|
||||
LDR R0, =ETHERNET_MACLP_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK EEPROM_IRQHandler
|
||||
PUBWEAK EEPROM_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
EEPROM_IRQHandler
|
||||
LDR R0, =EEPROM_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK LCD_IRQHandler
|
||||
PUBWEAK LCD_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
LCD_IRQHandler
|
||||
LDR R0, =LCD_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SHA_IRQHandler
|
||||
PUBWEAK SHA_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SHA_IRQHandler
|
||||
LDR R0, =SHA_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SMARTCARD0_IRQHandler
|
||||
PUBWEAK SMARTCARD0_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SMARTCARD0_IRQHandler
|
||||
LDR R0, =SMARTCARD0_DriverIRQHandler
|
||||
BX R0
|
||||
PUBWEAK SMARTCARD1_IRQHandler
|
||||
PUBWEAK SMARTCARD1_DriverIRQHandler
|
||||
SECTION .text:CODE:REORDER:NOROOT(2)
|
||||
SMARTCARD1_IRQHandler
|
||||
LDR R0, =SMARTCARD1_DriverIRQHandler
|
||||
BX R0
|
||||
WDT_BOD_DriverIRQHandler
|
||||
DMA0_DriverIRQHandler
|
||||
GINT0_DriverIRQHandler
|
||||
GINT1_DriverIRQHandler
|
||||
PIN_INT0_DriverIRQHandler
|
||||
PIN_INT1_DriverIRQHandler
|
||||
PIN_INT2_DriverIRQHandler
|
||||
PIN_INT3_DriverIRQHandler
|
||||
UTICK0_DriverIRQHandler
|
||||
MRT0_DriverIRQHandler
|
||||
CTIMER0_DriverIRQHandler
|
||||
CTIMER1_DriverIRQHandler
|
||||
SCT0_DriverIRQHandler
|
||||
CTIMER3_DriverIRQHandler
|
||||
FLEXCOMM0_DriverIRQHandler
|
||||
FLEXCOMM1_DriverIRQHandler
|
||||
FLEXCOMM2_DriverIRQHandler
|
||||
FLEXCOMM3_DriverIRQHandler
|
||||
FLEXCOMM4_DriverIRQHandler
|
||||
FLEXCOMM5_DriverIRQHandler
|
||||
FLEXCOMM6_DriverIRQHandler
|
||||
FLEXCOMM7_DriverIRQHandler
|
||||
ADC0_SEQA_DriverIRQHandler
|
||||
ADC0_SEQB_DriverIRQHandler
|
||||
ADC0_THCMP_DriverIRQHandler
|
||||
DMIC0_DriverIRQHandler
|
||||
HWVAD0_DriverIRQHandler
|
||||
USB0_NEEDCLK_DriverIRQHandler
|
||||
USB0_DriverIRQHandler
|
||||
RTC_DriverIRQHandler
|
||||
Reserved46_DriverIRQHandler
|
||||
Reserved47_DriverIRQHandler
|
||||
PIN_INT4_DriverIRQHandler
|
||||
PIN_INT5_DriverIRQHandler
|
||||
PIN_INT6_DriverIRQHandler
|
||||
PIN_INT7_DriverIRQHandler
|
||||
CTIMER2_DriverIRQHandler
|
||||
CTIMER4_DriverIRQHandler
|
||||
RIT_DriverIRQHandler
|
||||
SPIFI0_DriverIRQHandler
|
||||
FLEXCOMM8_DriverIRQHandler
|
||||
FLEXCOMM9_DriverIRQHandler
|
||||
SDIO_DriverIRQHandler
|
||||
CAN0_IRQ0_DriverIRQHandler
|
||||
CAN0_IRQ1_DriverIRQHandler
|
||||
CAN1_IRQ0_DriverIRQHandler
|
||||
CAN1_IRQ1_DriverIRQHandler
|
||||
USB1_DriverIRQHandler
|
||||
USB1_NEEDCLK_DriverIRQHandler
|
||||
ETHERNET_DriverIRQHandler
|
||||
ETHERNET_PMT_DriverIRQHandler
|
||||
ETHERNET_MACLP_DriverIRQHandler
|
||||
EEPROM_DriverIRQHandler
|
||||
LCD_DriverIRQHandler
|
||||
SHA_DriverIRQHandler
|
||||
SMARTCARD0_DriverIRQHandler
|
||||
SMARTCARD1_DriverIRQHandler
|
||||
DefaultISR
|
||||
B .
|
||||
|
||||
END
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
from building import *
|
||||
Import('rtconfig')
|
||||
|
||||
# handle softfp or hard
|
||||
flags = rtconfig.CFLAGS.split(' ')
|
||||
softfp = 'softfp'
|
||||
for item in flags:
|
||||
if item.find('-mfloat-abi='):
|
||||
if item.find('hard'):
|
||||
softfp = 'hard'
|
||||
else:
|
||||
softfp = 'softfp'
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Split('''
|
||||
startup_LPC54608.c
|
||||
''')
|
||||
|
||||
if softfp == 'softfp':
|
||||
LIBS = ['fsl_power_lib_softabi']
|
||||
else:
|
||||
LIBS = ['fsl_power_lib']
|
||||
|
||||
group = DefineGroup('CMSIS', src, depend = [''], LIBS=LIBS, LIBPATH=[cwd])
|
||||
|
||||
Return('group')
|
||||
Binary file not shown.
Binary file not shown.
|
|
@ -0,0 +1,761 @@
|
|||
//*****************************************************************************
|
||||
// LPC54608 startup code for use with MCUXpresso IDE
|
||||
//
|
||||
// Version : 070217
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright(C) NXP Semiconductors, 2017
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without modification,
|
||||
// are permitted provided that the following conditions are met:
|
||||
//
|
||||
// o Redistributions of source code must retain the above copyright notice, this list
|
||||
// of conditions and the following disclaimer.
|
||||
//
|
||||
// o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
// list of conditions and the following disclaimer in the documentation and/or
|
||||
// other materials provided with the distribution.
|
||||
//
|
||||
// o Neither the name of copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
// ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
// ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined (DEBUG)
|
||||
#pragma GCC push_options
|
||||
#pragma GCC optimize ("Og")
|
||||
#endif // (DEBUG)
|
||||
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define WEAK_AV __attribute__ ((weak, section(".after_vectors")))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
// Variable to store CRP value in. Will be placed automatically
|
||||
// by the linker when "Enable Code Read Protect" selected.
|
||||
// See crp.h header for more information
|
||||
//*****************************************************************************
|
||||
// #include <NXP/crp.h>
|
||||
// __CRP const unsigned int CRP_WORD = CRP_NO_CRP ;
|
||||
|
||||
//*****************************************************************************
|
||||
// Declaration of external SystemInit function
|
||||
//*****************************************************************************
|
||||
#if defined (__USE_CMSIS)
|
||||
extern void SystemInit(void);
|
||||
#endif // (__USE_CMSIS)
|
||||
|
||||
//*****************************************************************************
|
||||
// Forward declaration of the core exception handlers.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void MemManage_Handler(void);
|
||||
WEAK void BusFault_Handler(void);
|
||||
WEAK void UsageFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void DebugMon_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
// Forward declaration of the application IRQ handlers. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over weak definitions below
|
||||
//*****************************************************************************
|
||||
WEAK void WDT_BOD_IRQHandler(void);
|
||||
WEAK void DMA0_IRQHandler(void);
|
||||
WEAK void GINT0_IRQHandler(void);
|
||||
WEAK void GINT1_IRQHandler(void);
|
||||
WEAK void PIN_INT0_IRQHandler(void);
|
||||
WEAK void PIN_INT1_IRQHandler(void);
|
||||
WEAK void PIN_INT2_IRQHandler(void);
|
||||
WEAK void PIN_INT3_IRQHandler(void);
|
||||
WEAK void UTICK0_IRQHandler(void);
|
||||
WEAK void MRT0_IRQHandler(void);
|
||||
WEAK void CTIMER0_IRQHandler(void);
|
||||
WEAK void CTIMER1_IRQHandler(void);
|
||||
WEAK void SCT0_IRQHandler(void);
|
||||
WEAK void CTIMER3_IRQHandler(void);
|
||||
WEAK void FLEXCOMM0_IRQHandler(void);
|
||||
WEAK void FLEXCOMM1_IRQHandler(void);
|
||||
WEAK void FLEXCOMM2_IRQHandler(void);
|
||||
WEAK void FLEXCOMM3_IRQHandler(void);
|
||||
WEAK void FLEXCOMM4_IRQHandler(void);
|
||||
WEAK void FLEXCOMM5_IRQHandler(void);
|
||||
WEAK void FLEXCOMM6_IRQHandler(void);
|
||||
WEAK void FLEXCOMM7_IRQHandler(void);
|
||||
WEAK void ADC0_SEQA_IRQHandler(void);
|
||||
WEAK void ADC0_SEQB_IRQHandler(void);
|
||||
WEAK void ADC0_THCMP_IRQHandler(void);
|
||||
WEAK void DMIC0_IRQHandler(void);
|
||||
WEAK void HWVAD0_IRQHandler(void);
|
||||
WEAK void USB0_NEEDCLK_IRQHandler(void);
|
||||
WEAK void USB0_IRQHandler(void);
|
||||
WEAK void RTC_IRQHandler(void);
|
||||
WEAK void Reserved46_IRQHandler(void);
|
||||
WEAK void Reserved47_IRQHandler(void);
|
||||
WEAK void PIN_INT4_IRQHandler(void);
|
||||
WEAK void PIN_INT5_IRQHandler(void);
|
||||
WEAK void PIN_INT6_IRQHandler(void);
|
||||
WEAK void PIN_INT7_IRQHandler(void);
|
||||
WEAK void CTIMER2_IRQHandler(void);
|
||||
WEAK void CTIMER4_IRQHandler(void);
|
||||
WEAK void RIT_IRQHandler(void);
|
||||
WEAK void SPIFI0_IRQHandler(void);
|
||||
WEAK void FLEXCOMM8_IRQHandler(void);
|
||||
WEAK void FLEXCOMM9_IRQHandler(void);
|
||||
WEAK void SDIO_IRQHandler(void);
|
||||
WEAK void CAN0_IRQ0_IRQHandler(void);
|
||||
WEAK void CAN0_IRQ1_IRQHandler(void);
|
||||
WEAK void CAN1_IRQ0_IRQHandler(void);
|
||||
WEAK void CAN1_IRQ1_IRQHandler(void);
|
||||
WEAK void USB1_IRQHandler(void);
|
||||
WEAK void USB1_NEEDCLK_IRQHandler(void);
|
||||
WEAK void ETHERNET_IRQHandler(void);
|
||||
WEAK void ETHERNET_PMT_IRQHandler(void);
|
||||
WEAK void ETHERNET_MACLP_IRQHandler(void);
|
||||
WEAK void EEPROM_IRQHandler(void);
|
||||
WEAK void LCD_IRQHandler(void);
|
||||
WEAK void SHA_IRQHandler(void);
|
||||
WEAK void SMARTCARD0_IRQHandler(void);
|
||||
WEAK void SMARTCARD1_IRQHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
// Forward declaration of the driver IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the driver
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//*****************************************************************************
|
||||
void WDT_BOD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void DMA0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GINT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GINT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UTICK0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void MRT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SCT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC0_SEQA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC0_SEQB_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC0_THCMP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void DMIC0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void HWVAD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB0_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RTC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void Reserved46_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void Reserved47_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RIT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SPIFI0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM8_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM9_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SDIO_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN0_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN0_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN1_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN1_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB1_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ETHERNET_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ETHERNET_PMT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ETHERNET_MACLP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EEPROM_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void LCD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SHA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SMARTCARD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SMARTCARD1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
|
||||
//*****************************************************************************
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
// External declaration for LPC MCU vector table checksum from Linker Script
|
||||
//*****************************************************************************
|
||||
WEAK extern void __valid_user_code_checksum();
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
// The vector table.
|
||||
// This relies on the linker script to place at correct location in memory.
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
extern void * __Vectors __attribute__ ((alias ("g_pfnVectors")));
|
||||
|
||||
__attribute__ ((used, section(".isr_vector")))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
// Core Level - CM4
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MPU fault handler
|
||||
BusFault_Handler, // The bus fault handler
|
||||
UsageFault_Handler, // The usage fault handler
|
||||
__valid_user_code_checksum, // LPC MCU checksum
|
||||
0, // ECRP
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// Chip Level - LPC54608
|
||||
WDT_BOD_IRQHandler, // 16: Windowed watchdog timer, Brownout detect
|
||||
DMA0_IRQHandler, // 17: DMA controller
|
||||
GINT0_IRQHandler, // 18: GPIO group 0
|
||||
GINT1_IRQHandler, // 19: GPIO group 1
|
||||
PIN_INT0_IRQHandler, // 20: Pin interrupt 0 or pattern match engine slice 0
|
||||
PIN_INT1_IRQHandler, // 21: Pin interrupt 1or pattern match engine slice 1
|
||||
PIN_INT2_IRQHandler, // 22: Pin interrupt 2 or pattern match engine slice 2
|
||||
PIN_INT3_IRQHandler, // 23: Pin interrupt 3 or pattern match engine slice 3
|
||||
UTICK0_IRQHandler, // 24: Micro-tick Timer
|
||||
MRT0_IRQHandler, // 25: Multi-rate timer
|
||||
CTIMER0_IRQHandler, // 26: Standard counter/timer CTIMER0
|
||||
CTIMER1_IRQHandler, // 27: Standard counter/timer CTIMER1
|
||||
SCT0_IRQHandler, // 28: SCTimer/PWM
|
||||
CTIMER3_IRQHandler, // 29: Standard counter/timer CTIMER3
|
||||
FLEXCOMM0_IRQHandler, // 30: Flexcomm Interface 0 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM1_IRQHandler, // 31: Flexcomm Interface 1 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM2_IRQHandler, // 32: Flexcomm Interface 2 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM3_IRQHandler, // 33: Flexcomm Interface 3 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM4_IRQHandler, // 34: Flexcomm Interface 4 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM5_IRQHandler, // 35: Flexcomm Interface 5 (USART, SPI, I2C,, FLEXCOMM)
|
||||
FLEXCOMM6_IRQHandler, // 36: Flexcomm Interface 6 (USART, SPI, I2C, I2S,, FLEXCOMM)
|
||||
FLEXCOMM7_IRQHandler, // 37: Flexcomm Interface 7 (USART, SPI, I2C, I2S,, FLEXCOMM)
|
||||
ADC0_SEQA_IRQHandler, // 38: ADC0 sequence A completion.
|
||||
ADC0_SEQB_IRQHandler, // 39: ADC0 sequence B completion.
|
||||
ADC0_THCMP_IRQHandler, // 40: ADC0 threshold compare and error.
|
||||
DMIC0_IRQHandler, // 41: Digital microphone and DMIC subsystem
|
||||
HWVAD0_IRQHandler, // 42: Hardware Voice Activity Detector
|
||||
USB0_NEEDCLK_IRQHandler, // 43: USB Activity Wake-up Interrupt
|
||||
USB0_IRQHandler, // 44: USB device
|
||||
RTC_IRQHandler, // 45: RTC alarm and wake-up interrupts
|
||||
Reserved46_IRQHandler, // 46: Reserved interrupt
|
||||
Reserved47_IRQHandler, // 47: Reserved interrupt
|
||||
PIN_INT4_IRQHandler, // 48: Pin interrupt 4 or pattern match engine slice 4 int
|
||||
PIN_INT5_IRQHandler, // 49: Pin interrupt 5 or pattern match engine slice 5 int
|
||||
PIN_INT6_IRQHandler, // 50: Pin interrupt 6 or pattern match engine slice 6 int
|
||||
PIN_INT7_IRQHandler, // 51: Pin interrupt 7 or pattern match engine slice 7 int
|
||||
CTIMER2_IRQHandler, // 52: Standard counter/timer CTIMER2
|
||||
CTIMER4_IRQHandler, // 53: Standard counter/timer CTIMER4
|
||||
RIT_IRQHandler, // 54: Repetitive Interrupt Timer
|
||||
SPIFI0_IRQHandler, // 55: SPI flash interface
|
||||
FLEXCOMM8_IRQHandler, // 56: Flexcomm Interface 8 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM9_IRQHandler, // 57: Flexcomm Interface 9 (USART, SPI, I2C, FLEXCOMM)
|
||||
SDIO_IRQHandler, // 58: SD/MMC
|
||||
CAN0_IRQ0_IRQHandler, // 59: CAN0 interrupt0
|
||||
CAN0_IRQ1_IRQHandler, // 60: CAN0 interrupt1
|
||||
CAN1_IRQ0_IRQHandler, // 61: CAN1 interrupt0
|
||||
CAN1_IRQ1_IRQHandler, // 62: CAN1 interrupt1
|
||||
USB1_IRQHandler, // 63: USB1 interrupt
|
||||
USB1_NEEDCLK_IRQHandler, // 64: USB1 activity
|
||||
ETHERNET_IRQHandler, // 65: Ethernet
|
||||
ETHERNET_PMT_IRQHandler, // 66: Ethernet power management interrupt
|
||||
ETHERNET_MACLP_IRQHandler, // 67: Ethernet MAC interrupt
|
||||
EEPROM_IRQHandler, // 68: EEPROM interrupt
|
||||
LCD_IRQHandler, // 69: LCD interrupt
|
||||
SHA_IRQHandler, // 70: SHA interrupt
|
||||
SMARTCARD0_IRQHandler, // 71: Smart card 0 interrupt
|
||||
SMARTCARD1_IRQHandler, // 72: Smart card 1 interrupt
|
||||
}; /* End of g_pfnVectors */
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors.init_data")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors.init_bss")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors.reset")))
|
||||
void ResetISR(void) {
|
||||
|
||||
// Disable interrupts
|
||||
__asm volatile ("cpsid i");
|
||||
|
||||
// Enable SRAM clock used by Stack
|
||||
__asm volatile ("LDR R0, =0x40000220\n\t"
|
||||
"MOV R1, #56\n\t"
|
||||
"STR R1, [R0]");
|
||||
|
||||
#if defined (__USE_CMSIS)
|
||||
// If __USE_CMSIS defined, then call CMSIS SystemInit code
|
||||
SystemInit();
|
||||
#endif // (__USE_CMSIS)
|
||||
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
#if !defined (__USE_CMSIS)
|
||||
// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
|
||||
// will enable the FPU
|
||||
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
|
||||
//
|
||||
// Code to enable the Cortex-M4 FPU only included
|
||||
// if appropriate build options have been selected.
|
||||
// Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
|
||||
//
|
||||
// Read CPACR (located at address 0xE000ED88)
|
||||
// Set bits 20-23 to enable CP10 and CP11 coprocessors
|
||||
// Write back the modified value to the CPACR
|
||||
__asm volatile ("LDR.W R0, =0xE000ED88\n\t"
|
||||
"LDR R1, [R0]\n\t"
|
||||
"ORR R1, R1, #(0xF << 20)\n\t"
|
||||
"STR R1, [R0]");
|
||||
#endif // (__VFP_FP__) && !(__SOFTFP__)
|
||||
#endif // (__USE_CMSIS)
|
||||
|
||||
#if !defined (__USE_CMSIS)
|
||||
// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
|
||||
// will setup the VTOR register
|
||||
|
||||
// Check to see if we are running the code from a non-zero
|
||||
// address (eg RAM, external flash), in which case we need
|
||||
// to modify the VTOR register to tell the CPU that the
|
||||
// vector table is located at a non-0x0 address.
|
||||
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
|
||||
if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
|
||||
*pSCB_VTOR = (unsigned int)g_pfnVectors;
|
||||
}
|
||||
#endif // (__USE_CMSIS)
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
// Reenable interrupts
|
||||
__asm volatile ("cpsie i");
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main();
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default core exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
WEAK_AV void NMI_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void HardFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void MemManage_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void BusFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void UsageFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void SVC_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void DebugMon_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void PendSV_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void SysTick_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//*****************************************************************************
|
||||
WEAK_AV void IntDefaultHandler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default application exception handlers. Override the ones here by defining
|
||||
// your own handler routines in your application code. These routines call
|
||||
// driver exception handlers or IntDefaultHandler() if no driver exception
|
||||
// handler is included.
|
||||
//*****************************************************************************
|
||||
WEAK void WDT_BOD_IRQHandler(void)
|
||||
{ WDT_BOD_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void DMA0_IRQHandler(void)
|
||||
{ DMA0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void GINT0_IRQHandler(void)
|
||||
{ GINT0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void GINT1_IRQHandler(void)
|
||||
{ GINT1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT0_IRQHandler(void)
|
||||
{ PIN_INT0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT1_IRQHandler(void)
|
||||
{ PIN_INT1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT2_IRQHandler(void)
|
||||
{ PIN_INT2_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT3_IRQHandler(void)
|
||||
{ PIN_INT3_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void UTICK0_IRQHandler(void)
|
||||
{ UTICK0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void MRT0_IRQHandler(void)
|
||||
{ MRT0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER0_IRQHandler(void)
|
||||
{ CTIMER0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER1_IRQHandler(void)
|
||||
{ CTIMER1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SCT0_IRQHandler(void)
|
||||
{ SCT0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER3_IRQHandler(void)
|
||||
{ CTIMER3_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM0_IRQHandler(void)
|
||||
{ FLEXCOMM0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM1_IRQHandler(void)
|
||||
{ FLEXCOMM1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM2_IRQHandler(void)
|
||||
{ FLEXCOMM2_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM3_IRQHandler(void)
|
||||
{ FLEXCOMM3_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM4_IRQHandler(void)
|
||||
{ FLEXCOMM4_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM5_IRQHandler(void)
|
||||
{ FLEXCOMM5_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM6_IRQHandler(void)
|
||||
{ FLEXCOMM6_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM7_IRQHandler(void)
|
||||
{ FLEXCOMM7_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ADC0_SEQA_IRQHandler(void)
|
||||
{ ADC0_SEQA_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ADC0_SEQB_IRQHandler(void)
|
||||
{ ADC0_SEQB_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ADC0_THCMP_IRQHandler(void)
|
||||
{ ADC0_THCMP_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void DMIC0_IRQHandler(void)
|
||||
{ DMIC0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void HWVAD0_IRQHandler(void)
|
||||
{ HWVAD0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void USB0_NEEDCLK_IRQHandler(void)
|
||||
{ USB0_NEEDCLK_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void USB0_IRQHandler(void)
|
||||
{ USB0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void RTC_IRQHandler(void)
|
||||
{ RTC_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void Reserved46_IRQHandler(void)
|
||||
{ Reserved46_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void Reserved47_IRQHandler(void)
|
||||
{ Reserved47_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT4_IRQHandler(void)
|
||||
{ PIN_INT4_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT5_IRQHandler(void)
|
||||
{ PIN_INT5_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT6_IRQHandler(void)
|
||||
{ PIN_INT6_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT7_IRQHandler(void)
|
||||
{ PIN_INT7_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER2_IRQHandler(void)
|
||||
{ CTIMER2_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER4_IRQHandler(void)
|
||||
{ CTIMER4_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void RIT_IRQHandler(void)
|
||||
{ RIT_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SPIFI0_IRQHandler(void)
|
||||
{ SPIFI0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM8_IRQHandler(void)
|
||||
{ FLEXCOMM8_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM9_IRQHandler(void)
|
||||
{ FLEXCOMM9_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SDIO_IRQHandler(void)
|
||||
{ SDIO_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CAN0_IRQ0_IRQHandler(void)
|
||||
{ CAN0_IRQ0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CAN0_IRQ1_IRQHandler(void)
|
||||
{ CAN0_IRQ1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CAN1_IRQ0_IRQHandler(void)
|
||||
{ CAN1_IRQ0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CAN1_IRQ1_IRQHandler(void)
|
||||
{ CAN1_IRQ1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void USB1_IRQHandler(void)
|
||||
{ USB1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void USB1_NEEDCLK_IRQHandler(void)
|
||||
{ USB1_NEEDCLK_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ETHERNET_IRQHandler(void)
|
||||
{ ETHERNET_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ETHERNET_PMT_IRQHandler(void)
|
||||
{ ETHERNET_PMT_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ETHERNET_MACLP_IRQHandler(void)
|
||||
{ ETHERNET_MACLP_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void EEPROM_IRQHandler(void)
|
||||
{ EEPROM_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void LCD_IRQHandler(void)
|
||||
{ LCD_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SHA_IRQHandler(void)
|
||||
{ SHA_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SMARTCARD0_IRQHandler(void)
|
||||
{ SMARTCARD0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SMARTCARD1_IRQHandler(void)
|
||||
{ SMARTCARD1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined (DEBUG)
|
||||
#pragma GCC pop_options
|
||||
#endif // (DEBUG)
|
||||
|
|
@ -0,0 +1,761 @@
|
|||
//*****************************************************************************
|
||||
// LPC54608 startup code for use with MCUXpresso IDE
|
||||
//
|
||||
// Version : 070217
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Copyright(C) NXP Semiconductors, 2017
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without modification,
|
||||
// are permitted provided that the following conditions are met:
|
||||
//
|
||||
// o Redistributions of source code must retain the above copyright notice, this list
|
||||
// of conditions and the following disclaimer.
|
||||
//
|
||||
// o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
// list of conditions and the following disclaimer in the documentation and/or
|
||||
// other materials provided with the distribution.
|
||||
//
|
||||
// o Neither the name of copyright holder nor the names of its
|
||||
// contributors may be used to endorse or promote products derived from this
|
||||
// software without specific prior written permission.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
// ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
// ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined (DEBUG)
|
||||
#pragma GCC push_options
|
||||
#pragma GCC optimize ("Og")
|
||||
#endif // (DEBUG)
|
||||
|
||||
#if defined (__cplusplus)
|
||||
#ifdef __REDLIB__
|
||||
#error Redlib does not support C++
|
||||
#else
|
||||
//*****************************************************************************
|
||||
//
|
||||
// The entry point for the C++ library startup
|
||||
//
|
||||
//*****************************************************************************
|
||||
extern "C" {
|
||||
extern void __libc_init_array(void);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEAK __attribute__ ((weak))
|
||||
#define WEAK_AV __attribute__ ((weak, section(".after_vectors")))
|
||||
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
// Variable to store CRP value in. Will be placed automatically
|
||||
// by the linker when "Enable Code Read Protect" selected.
|
||||
// See crp.h header for more information
|
||||
//*****************************************************************************
|
||||
#include <NXP/crp.h>
|
||||
__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;
|
||||
|
||||
//*****************************************************************************
|
||||
// Declaration of external SystemInit function
|
||||
//*****************************************************************************
|
||||
#if defined (__USE_CMSIS)
|
||||
extern void SystemInit(void);
|
||||
#endif // (__USE_CMSIS)
|
||||
|
||||
//*****************************************************************************
|
||||
// Forward declaration of the core exception handlers.
|
||||
// When the application defines a handler (with the same name), this will
|
||||
// automatically take precedence over these weak definitions
|
||||
//*****************************************************************************
|
||||
void ResetISR(void);
|
||||
WEAK void NMI_Handler(void);
|
||||
WEAK void HardFault_Handler(void);
|
||||
WEAK void MemManage_Handler(void);
|
||||
WEAK void BusFault_Handler(void);
|
||||
WEAK void UsageFault_Handler(void);
|
||||
WEAK void SVC_Handler(void);
|
||||
WEAK void DebugMon_Handler(void);
|
||||
WEAK void PendSV_Handler(void);
|
||||
WEAK void SysTick_Handler(void);
|
||||
WEAK void IntDefaultHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
// Forward declaration of the application IRQ handlers. When the application
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over weak definitions below
|
||||
//*****************************************************************************
|
||||
WEAK void WDT_BOD_IRQHandler(void);
|
||||
WEAK void DMA0_IRQHandler(void);
|
||||
WEAK void GINT0_IRQHandler(void);
|
||||
WEAK void GINT1_IRQHandler(void);
|
||||
WEAK void PIN_INT0_IRQHandler(void);
|
||||
WEAK void PIN_INT1_IRQHandler(void);
|
||||
WEAK void PIN_INT2_IRQHandler(void);
|
||||
WEAK void PIN_INT3_IRQHandler(void);
|
||||
WEAK void UTICK0_IRQHandler(void);
|
||||
WEAK void MRT0_IRQHandler(void);
|
||||
WEAK void CTIMER0_IRQHandler(void);
|
||||
WEAK void CTIMER1_IRQHandler(void);
|
||||
WEAK void SCT0_IRQHandler(void);
|
||||
WEAK void CTIMER3_IRQHandler(void);
|
||||
WEAK void FLEXCOMM0_IRQHandler(void);
|
||||
WEAK void FLEXCOMM1_IRQHandler(void);
|
||||
WEAK void FLEXCOMM2_IRQHandler(void);
|
||||
WEAK void FLEXCOMM3_IRQHandler(void);
|
||||
WEAK void FLEXCOMM4_IRQHandler(void);
|
||||
WEAK void FLEXCOMM5_IRQHandler(void);
|
||||
WEAK void FLEXCOMM6_IRQHandler(void);
|
||||
WEAK void FLEXCOMM7_IRQHandler(void);
|
||||
WEAK void ADC0_SEQA_IRQHandler(void);
|
||||
WEAK void ADC0_SEQB_IRQHandler(void);
|
||||
WEAK void ADC0_THCMP_IRQHandler(void);
|
||||
WEAK void DMIC0_IRQHandler(void);
|
||||
WEAK void HWVAD0_IRQHandler(void);
|
||||
WEAK void USB0_NEEDCLK_IRQHandler(void);
|
||||
WEAK void USB0_IRQHandler(void);
|
||||
WEAK void RTC_IRQHandler(void);
|
||||
WEAK void Reserved46_IRQHandler(void);
|
||||
WEAK void Reserved47_IRQHandler(void);
|
||||
WEAK void PIN_INT4_IRQHandler(void);
|
||||
WEAK void PIN_INT5_IRQHandler(void);
|
||||
WEAK void PIN_INT6_IRQHandler(void);
|
||||
WEAK void PIN_INT7_IRQHandler(void);
|
||||
WEAK void CTIMER2_IRQHandler(void);
|
||||
WEAK void CTIMER4_IRQHandler(void);
|
||||
WEAK void RIT_IRQHandler(void);
|
||||
WEAK void SPIFI0_IRQHandler(void);
|
||||
WEAK void FLEXCOMM8_IRQHandler(void);
|
||||
WEAK void FLEXCOMM9_IRQHandler(void);
|
||||
WEAK void SDIO_IRQHandler(void);
|
||||
WEAK void CAN0_IRQ0_IRQHandler(void);
|
||||
WEAK void CAN0_IRQ1_IRQHandler(void);
|
||||
WEAK void CAN1_IRQ0_IRQHandler(void);
|
||||
WEAK void CAN1_IRQ1_IRQHandler(void);
|
||||
WEAK void USB1_IRQHandler(void);
|
||||
WEAK void USB1_NEEDCLK_IRQHandler(void);
|
||||
WEAK void ETHERNET_IRQHandler(void);
|
||||
WEAK void ETHERNET_PMT_IRQHandler(void);
|
||||
WEAK void ETHERNET_MACLP_IRQHandler(void);
|
||||
WEAK void EEPROM_IRQHandler(void);
|
||||
WEAK void LCD_IRQHandler(void);
|
||||
WEAK void SHA_IRQHandler(void);
|
||||
WEAK void SMARTCARD0_IRQHandler(void);
|
||||
WEAK void SMARTCARD1_IRQHandler(void);
|
||||
|
||||
//*****************************************************************************
|
||||
// Forward declaration of the driver IRQ handlers. These are aliased
|
||||
// to the IntDefaultHandler, which is a 'forever' loop. When the driver
|
||||
// defines a handler (with the same name), this will automatically take
|
||||
// precedence over these weak definitions
|
||||
//*****************************************************************************
|
||||
void WDT_BOD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void DMA0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GINT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void GINT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void UTICK0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void MRT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SCT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC0_SEQA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC0_SEQB_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ADC0_THCMP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void DMIC0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void HWVAD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB0_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RTC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void Reserved46_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void Reserved47_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void PIN_INT7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CTIMER4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void RIT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SPIFI0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM8_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void FLEXCOMM9_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SDIO_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN0_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN0_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN1_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void CAN1_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void USB1_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ETHERNET_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ETHERNET_PMT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void ETHERNET_MACLP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void EEPROM_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void LCD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SHA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SMARTCARD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
void SMARTCARD1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
|
||||
|
||||
//*****************************************************************************
|
||||
// The entry point for the application.
|
||||
// __main() is the entry point for Redlib based applications
|
||||
// main() is the entry point for Newlib based applications
|
||||
//*****************************************************************************
|
||||
#if defined (__REDLIB__)
|
||||
extern void __main(void);
|
||||
#endif
|
||||
extern int main(void);
|
||||
|
||||
//*****************************************************************************
|
||||
// External declaration for the pointer to the stack top from the Linker Script
|
||||
//*****************************************************************************
|
||||
extern void _vStackTop(void);
|
||||
|
||||
//*****************************************************************************
|
||||
// External declaration for LPC MCU vector table checksum from Linker Script
|
||||
//*****************************************************************************
|
||||
WEAK extern void __valid_user_code_checksum();
|
||||
|
||||
//*****************************************************************************
|
||||
#if defined (__cplusplus)
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
//*****************************************************************************
|
||||
// The vector table.
|
||||
// This relies on the linker script to place at correct location in memory.
|
||||
//*****************************************************************************
|
||||
extern void (* const g_pfnVectors[])(void);
|
||||
extern void * __Vectors __attribute__ ((alias ("g_pfnVectors")));
|
||||
|
||||
__attribute__ ((used, section(".isr_vector")))
|
||||
void (* const g_pfnVectors[])(void) = {
|
||||
// Core Level - CM4
|
||||
&_vStackTop, // The initial stack pointer
|
||||
ResetISR, // The reset handler
|
||||
NMI_Handler, // The NMI handler
|
||||
HardFault_Handler, // The hard fault handler
|
||||
MemManage_Handler, // The MPU fault handler
|
||||
BusFault_Handler, // The bus fault handler
|
||||
UsageFault_Handler, // The usage fault handler
|
||||
__valid_user_code_checksum, // LPC MCU checksum
|
||||
0, // ECRP
|
||||
0, // Reserved
|
||||
0, // Reserved
|
||||
SVC_Handler, // SVCall handler
|
||||
DebugMon_Handler, // Debug monitor handler
|
||||
0, // Reserved
|
||||
PendSV_Handler, // The PendSV handler
|
||||
SysTick_Handler, // The SysTick handler
|
||||
|
||||
// Chip Level - LPC54608
|
||||
WDT_BOD_IRQHandler, // 16: Windowed watchdog timer, Brownout detect
|
||||
DMA0_IRQHandler, // 17: DMA controller
|
||||
GINT0_IRQHandler, // 18: GPIO group 0
|
||||
GINT1_IRQHandler, // 19: GPIO group 1
|
||||
PIN_INT0_IRQHandler, // 20: Pin interrupt 0 or pattern match engine slice 0
|
||||
PIN_INT1_IRQHandler, // 21: Pin interrupt 1or pattern match engine slice 1
|
||||
PIN_INT2_IRQHandler, // 22: Pin interrupt 2 or pattern match engine slice 2
|
||||
PIN_INT3_IRQHandler, // 23: Pin interrupt 3 or pattern match engine slice 3
|
||||
UTICK0_IRQHandler, // 24: Micro-tick Timer
|
||||
MRT0_IRQHandler, // 25: Multi-rate timer
|
||||
CTIMER0_IRQHandler, // 26: Standard counter/timer CTIMER0
|
||||
CTIMER1_IRQHandler, // 27: Standard counter/timer CTIMER1
|
||||
SCT0_IRQHandler, // 28: SCTimer/PWM
|
||||
CTIMER3_IRQHandler, // 29: Standard counter/timer CTIMER3
|
||||
FLEXCOMM0_IRQHandler, // 30: Flexcomm Interface 0 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM1_IRQHandler, // 31: Flexcomm Interface 1 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM2_IRQHandler, // 32: Flexcomm Interface 2 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM3_IRQHandler, // 33: Flexcomm Interface 3 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM4_IRQHandler, // 34: Flexcomm Interface 4 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM5_IRQHandler, // 35: Flexcomm Interface 5 (USART, SPI, I2C,, FLEXCOMM)
|
||||
FLEXCOMM6_IRQHandler, // 36: Flexcomm Interface 6 (USART, SPI, I2C, I2S,, FLEXCOMM)
|
||||
FLEXCOMM7_IRQHandler, // 37: Flexcomm Interface 7 (USART, SPI, I2C, I2S,, FLEXCOMM)
|
||||
ADC0_SEQA_IRQHandler, // 38: ADC0 sequence A completion.
|
||||
ADC0_SEQB_IRQHandler, // 39: ADC0 sequence B completion.
|
||||
ADC0_THCMP_IRQHandler, // 40: ADC0 threshold compare and error.
|
||||
DMIC0_IRQHandler, // 41: Digital microphone and DMIC subsystem
|
||||
HWVAD0_IRQHandler, // 42: Hardware Voice Activity Detector
|
||||
USB0_NEEDCLK_IRQHandler, // 43: USB Activity Wake-up Interrupt
|
||||
USB0_IRQHandler, // 44: USB device
|
||||
RTC_IRQHandler, // 45: RTC alarm and wake-up interrupts
|
||||
Reserved46_IRQHandler, // 46: Reserved interrupt
|
||||
Reserved47_IRQHandler, // 47: Reserved interrupt
|
||||
PIN_INT4_IRQHandler, // 48: Pin interrupt 4 or pattern match engine slice 4 int
|
||||
PIN_INT5_IRQHandler, // 49: Pin interrupt 5 or pattern match engine slice 5 int
|
||||
PIN_INT6_IRQHandler, // 50: Pin interrupt 6 or pattern match engine slice 6 int
|
||||
PIN_INT7_IRQHandler, // 51: Pin interrupt 7 or pattern match engine slice 7 int
|
||||
CTIMER2_IRQHandler, // 52: Standard counter/timer CTIMER2
|
||||
CTIMER4_IRQHandler, // 53: Standard counter/timer CTIMER4
|
||||
RIT_IRQHandler, // 54: Repetitive Interrupt Timer
|
||||
SPIFI0_IRQHandler, // 55: SPI flash interface
|
||||
FLEXCOMM8_IRQHandler, // 56: Flexcomm Interface 8 (USART, SPI, I2C, FLEXCOMM)
|
||||
FLEXCOMM9_IRQHandler, // 57: Flexcomm Interface 9 (USART, SPI, I2C, FLEXCOMM)
|
||||
SDIO_IRQHandler, // 58: SD/MMC
|
||||
CAN0_IRQ0_IRQHandler, // 59: CAN0 interrupt0
|
||||
CAN0_IRQ1_IRQHandler, // 60: CAN0 interrupt1
|
||||
CAN1_IRQ0_IRQHandler, // 61: CAN1 interrupt0
|
||||
CAN1_IRQ1_IRQHandler, // 62: CAN1 interrupt1
|
||||
USB1_IRQHandler, // 63: USB1 interrupt
|
||||
USB1_NEEDCLK_IRQHandler, // 64: USB1 activity
|
||||
ETHERNET_IRQHandler, // 65: Ethernet
|
||||
ETHERNET_PMT_IRQHandler, // 66: Ethernet power management interrupt
|
||||
ETHERNET_MACLP_IRQHandler, // 67: Ethernet MAC interrupt
|
||||
EEPROM_IRQHandler, // 68: EEPROM interrupt
|
||||
LCD_IRQHandler, // 69: LCD interrupt
|
||||
SHA_IRQHandler, // 70: SHA interrupt
|
||||
SMARTCARD0_IRQHandler, // 71: Smart card 0 interrupt
|
||||
SMARTCARD1_IRQHandler, // 72: Smart card 1 interrupt
|
||||
}; /* End of g_pfnVectors */
|
||||
|
||||
//*****************************************************************************
|
||||
// Functions to carry out the initialization of RW and BSS data sections. These
|
||||
// are written as separate functions rather than being inlined within the
|
||||
// ResetISR() function in order to cope with MCUs with multiple banks of
|
||||
// memory.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors.init_data")))
|
||||
void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int *pulSrc = (unsigned int*) romstart;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = *pulSrc++;
|
||||
}
|
||||
|
||||
__attribute__ ((section(".after_vectors.init_bss")))
|
||||
void bss_init(unsigned int start, unsigned int len) {
|
||||
unsigned int *pulDest = (unsigned int*) start;
|
||||
unsigned int loop;
|
||||
for (loop = 0; loop < len; loop = loop + 4)
|
||||
*pulDest++ = 0;
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// The following symbols are constructs generated by the linker, indicating
|
||||
// the location of various points in the "Global Section Table". This table is
|
||||
// created by the linker via the Code Red managed linker script mechanism. It
|
||||
// contains the load address, execution address and length of each RW data
|
||||
// section and the execution and length of each BSS (zero initialized) section.
|
||||
//*****************************************************************************
|
||||
extern unsigned int __data_section_table;
|
||||
extern unsigned int __data_section_table_end;
|
||||
extern unsigned int __bss_section_table;
|
||||
extern unsigned int __bss_section_table_end;
|
||||
|
||||
//*****************************************************************************
|
||||
// Reset entry point for your code.
|
||||
// Sets up a simple runtime environment and initializes the C/C++
|
||||
// library.
|
||||
//*****************************************************************************
|
||||
__attribute__ ((section(".after_vectors.reset")))
|
||||
void ResetISR(void) {
|
||||
|
||||
// Disable interrupts
|
||||
__asm volatile ("cpsid i");
|
||||
|
||||
// Enable SRAM clock used by Stack
|
||||
__asm volatile ("LDR R0, =0x40000220\n\t"
|
||||
"MOV R1, #56\n\t"
|
||||
"STR R1, [R0]");
|
||||
|
||||
#if defined (__USE_CMSIS)
|
||||
// If __USE_CMSIS defined, then call CMSIS SystemInit code
|
||||
SystemInit();
|
||||
#endif // (__USE_CMSIS)
|
||||
|
||||
//
|
||||
// Copy the data sections from flash to SRAM.
|
||||
//
|
||||
unsigned int LoadAddr, ExeAddr, SectionLen;
|
||||
unsigned int *SectionTableAddr;
|
||||
|
||||
// Load base address of Global Section Table
|
||||
SectionTableAddr = &__data_section_table;
|
||||
|
||||
// Copy the data sections from flash to SRAM.
|
||||
while (SectionTableAddr < &__data_section_table_end) {
|
||||
LoadAddr = *SectionTableAddr++;
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
data_init(LoadAddr, ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
// At this point, SectionTableAddr = &__bss_section_table;
|
||||
// Zero fill the bss segment
|
||||
while (SectionTableAddr < &__bss_section_table_end) {
|
||||
ExeAddr = *SectionTableAddr++;
|
||||
SectionLen = *SectionTableAddr++;
|
||||
bss_init(ExeAddr, SectionLen);
|
||||
}
|
||||
|
||||
#if !defined (__USE_CMSIS)
|
||||
// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
|
||||
// will enable the FPU
|
||||
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
|
||||
//
|
||||
// Code to enable the Cortex-M4 FPU only included
|
||||
// if appropriate build options have been selected.
|
||||
// Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
|
||||
//
|
||||
// Read CPACR (located at address 0xE000ED88)
|
||||
// Set bits 20-23 to enable CP10 and CP11 coprocessors
|
||||
// Write back the modified value to the CPACR
|
||||
asm volatile ("LDR.W R0, =0xE000ED88\n\t"
|
||||
"LDR R1, [R0]\n\t"
|
||||
"ORR R1, R1, #(0xF << 20)\n\t"
|
||||
"STR R1, [R0]");
|
||||
#endif // (__VFP_FP__) && !(__SOFTFP__)
|
||||
#endif // (__USE_CMSIS)
|
||||
|
||||
#if !defined (__USE_CMSIS)
|
||||
// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
|
||||
// will setup the VTOR register
|
||||
|
||||
// Check to see if we are running the code from a non-zero
|
||||
// address (eg RAM, external flash), in which case we need
|
||||
// to modify the VTOR register to tell the CPU that the
|
||||
// vector table is located at a non-0x0 address.
|
||||
unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
|
||||
if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
|
||||
*pSCB_VTOR = (unsigned int)g_pfnVectors;
|
||||
}
|
||||
#endif // (__USE_CMSIS)
|
||||
|
||||
#if defined (__cplusplus)
|
||||
//
|
||||
// Call C++ library initialisation
|
||||
//
|
||||
__libc_init_array();
|
||||
#endif
|
||||
|
||||
// Reenable interrupts
|
||||
__asm volatile ("cpsie i");
|
||||
|
||||
#if defined (__REDLIB__)
|
||||
// Call the Redlib library, which in turn calls main()
|
||||
__main();
|
||||
#else
|
||||
main();
|
||||
#endif
|
||||
|
||||
//
|
||||
// main() shouldn't return, but if it does, we'll just enter an infinite loop
|
||||
//
|
||||
while (1) {
|
||||
;
|
||||
}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default core exception handlers. Override the ones here by defining your own
|
||||
// handler routines in your application code.
|
||||
//*****************************************************************************
|
||||
WEAK_AV void NMI_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void HardFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void MemManage_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void BusFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void UsageFault_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void SVC_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void DebugMon_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void PendSV_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
WEAK_AV void SysTick_Handler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Processor ends up here if an unexpected interrupt occurs or a specific
|
||||
// handler is not present in the application code.
|
||||
//*****************************************************************************
|
||||
WEAK_AV void IntDefaultHandler(void)
|
||||
{ while(1) {}
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
// Default application exception handlers. Override the ones here by defining
|
||||
// your own handler routines in your application code. These routines call
|
||||
// driver exception handlers or IntDefaultHandler() if no driver exception
|
||||
// handler is included.
|
||||
//*****************************************************************************
|
||||
WEAK void WDT_BOD_IRQHandler(void)
|
||||
{ WDT_BOD_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void DMA0_IRQHandler(void)
|
||||
{ DMA0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void GINT0_IRQHandler(void)
|
||||
{ GINT0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void GINT1_IRQHandler(void)
|
||||
{ GINT1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT0_IRQHandler(void)
|
||||
{ PIN_INT0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT1_IRQHandler(void)
|
||||
{ PIN_INT1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT2_IRQHandler(void)
|
||||
{ PIN_INT2_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT3_IRQHandler(void)
|
||||
{ PIN_INT3_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void UTICK0_IRQHandler(void)
|
||||
{ UTICK0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void MRT0_IRQHandler(void)
|
||||
{ MRT0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER0_IRQHandler(void)
|
||||
{ CTIMER0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER1_IRQHandler(void)
|
||||
{ CTIMER1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SCT0_IRQHandler(void)
|
||||
{ SCT0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER3_IRQHandler(void)
|
||||
{ CTIMER3_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM0_IRQHandler(void)
|
||||
{ FLEXCOMM0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM1_IRQHandler(void)
|
||||
{ FLEXCOMM1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM2_IRQHandler(void)
|
||||
{ FLEXCOMM2_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM3_IRQHandler(void)
|
||||
{ FLEXCOMM3_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM4_IRQHandler(void)
|
||||
{ FLEXCOMM4_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM5_IRQHandler(void)
|
||||
{ FLEXCOMM5_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM6_IRQHandler(void)
|
||||
{ FLEXCOMM6_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM7_IRQHandler(void)
|
||||
{ FLEXCOMM7_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ADC0_SEQA_IRQHandler(void)
|
||||
{ ADC0_SEQA_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ADC0_SEQB_IRQHandler(void)
|
||||
{ ADC0_SEQB_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ADC0_THCMP_IRQHandler(void)
|
||||
{ ADC0_THCMP_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void DMIC0_IRQHandler(void)
|
||||
{ DMIC0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void HWVAD0_IRQHandler(void)
|
||||
{ HWVAD0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void USB0_NEEDCLK_IRQHandler(void)
|
||||
{ USB0_NEEDCLK_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void USB0_IRQHandler(void)
|
||||
{ USB0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void RTC_IRQHandler(void)
|
||||
{ RTC_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void Reserved46_IRQHandler(void)
|
||||
{ Reserved46_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void Reserved47_IRQHandler(void)
|
||||
{ Reserved47_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT4_IRQHandler(void)
|
||||
{ PIN_INT4_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT5_IRQHandler(void)
|
||||
{ PIN_INT5_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT6_IRQHandler(void)
|
||||
{ PIN_INT6_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void PIN_INT7_IRQHandler(void)
|
||||
{ PIN_INT7_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER2_IRQHandler(void)
|
||||
{ CTIMER2_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CTIMER4_IRQHandler(void)
|
||||
{ CTIMER4_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void RIT_IRQHandler(void)
|
||||
{ RIT_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SPIFI0_IRQHandler(void)
|
||||
{ SPIFI0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM8_IRQHandler(void)
|
||||
{ FLEXCOMM8_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void FLEXCOMM9_IRQHandler(void)
|
||||
{ FLEXCOMM9_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SDIO_IRQHandler(void)
|
||||
{ SDIO_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CAN0_IRQ0_IRQHandler(void)
|
||||
{ CAN0_IRQ0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CAN0_IRQ1_IRQHandler(void)
|
||||
{ CAN0_IRQ1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CAN1_IRQ0_IRQHandler(void)
|
||||
{ CAN1_IRQ0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void CAN1_IRQ1_IRQHandler(void)
|
||||
{ CAN1_IRQ1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void USB1_IRQHandler(void)
|
||||
{ USB1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void USB1_NEEDCLK_IRQHandler(void)
|
||||
{ USB1_NEEDCLK_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ETHERNET_IRQHandler(void)
|
||||
{ ETHERNET_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ETHERNET_PMT_IRQHandler(void)
|
||||
{ ETHERNET_PMT_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void ETHERNET_MACLP_IRQHandler(void)
|
||||
{ ETHERNET_MACLP_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void EEPROM_IRQHandler(void)
|
||||
{ EEPROM_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void LCD_IRQHandler(void)
|
||||
{ LCD_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SHA_IRQHandler(void)
|
||||
{ SHA_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SMARTCARD0_IRQHandler(void)
|
||||
{ SMARTCARD0_DriverIRQHandler();
|
||||
}
|
||||
|
||||
WEAK void SMARTCARD1_IRQHandler(void)
|
||||
{ SMARTCARD1_DriverIRQHandler();
|
||||
}
|
||||
|
||||
//*****************************************************************************
|
||||
|
||||
#if defined (DEBUG)
|
||||
#pragma GCC pop_options
|
||||
#endif // (DEBUG)
|
||||
|
|
@ -0,0 +1,160 @@
|
|||
/*
|
||||
* linker script for LPC1788 (512kB Flash, 48kB + 48kB SRAM ) with GNU ld
|
||||
* yiyue.fang 2012-04-14
|
||||
*/
|
||||
|
||||
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||
MEMORY
|
||||
{
|
||||
CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
|
||||
DATA (rw) : ORIGIN = 0x10000000, LENGTH = 0x00010000
|
||||
}
|
||||
ENTRY(Reset_Handler)
|
||||
_system_stack_size = 0x200;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.interrupt_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
/* old GCC version uses .ctors */
|
||||
KEEP(*(SORT(.ctors.*)))
|
||||
KEEP(*(.ctors))
|
||||
/* new GCC version uses .init_array */
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
} > CODE = 0
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab*)
|
||||
} > CODE
|
||||
|
||||
/* The .ARM.exidx section is used for C++ exception handling. */
|
||||
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sidata = .;
|
||||
} > CODE
|
||||
__exidx_end = .;
|
||||
|
||||
/* .data section which is used for initialized data */
|
||||
|
||||
.data : AT (_sidata)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.dtors.*)))
|
||||
KEEP(*(.dtors))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_sdata = . ;
|
||||
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .data secion */
|
||||
_edata = . ;
|
||||
} > DATA
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = . + _system_stack_size;
|
||||
. = ALIGN(4);
|
||||
_estack = .;
|
||||
} >DATA
|
||||
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_sbss = .;
|
||||
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* This is used by the startup in order to initialize the .bss secion */
|
||||
_ebss = . ;
|
||||
*(.bss.init)
|
||||
} > DATA
|
||||
__bss_end = .;
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -209,20 +209,11 @@
|
|||
// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
|
||||
// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />
|
||||
#define RT_LWIP_IPADDR0 192
|
||||
#define RT_LWIP_IPADDR1 168
|
||||
#define RT_LWIP_IPADDR2 1
|
||||
#define RT_LWIP_IPADDR3 30
|
||||
#define RT_LWIP_IPADDR "192.168.1.30"
|
||||
// <ipaddr name="RT_LWIP_GWADDR" description="Gateway address of device" default="192.168.1.1" />
|
||||
#define RT_LWIP_GWADDR0 192
|
||||
#define RT_LWIP_GWADDR1 168
|
||||
#define RT_LWIP_GWADDR2 1
|
||||
#define RT_LWIP_GWADDR3 1
|
||||
#define RT_LWIP_GWADDR "192.168.1.1"
|
||||
// <ipaddr name="RT_LWIP_MSKADDR" description="Mask address of device" default="255.255.255.0" />
|
||||
#define RT_LWIP_MSKADDR0 255
|
||||
#define RT_LWIP_MSKADDR1 255
|
||||
#define RT_LWIP_MSKADDR2 255
|
||||
#define RT_LWIP_MSKADDR3 0
|
||||
#define RT_LWIP_MSKADDR "255.255.255.0"
|
||||
// </section>
|
||||
|
||||
// <section name="RT_USING_RTGUI" description="RT-Thread/GUI" default="true" >
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@ import os
|
|||
ARCH='arm'
|
||||
CPU='cortex-m4'
|
||||
CROSS_TOOL='gcc'
|
||||
BOARD_NAME = 'lpc5410x'
|
||||
BOARD_NAME = 'lpcxpresso'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
|
@ -39,10 +39,10 @@ if PLATFORM == 'gcc':
|
|||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
|
||||
CFLAGS = DEVICE + ' -g -Wall '
|
||||
DEVICE = ' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections -mfpu=fpv4-sp-d16 -mfloat-abi=hard'
|
||||
CFLAGS = DEVICE + ' -g -Wall -std=c99'
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-' + BOARD_NAME +'.map,-cref,-u,Reset_Handler -T rtthread-' + BOARD_NAME + '.ld'
|
||||
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,ResetISR -T link.lds'
|
||||
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
|
|
|||
Loading…
Reference in New Issue