mirror of https://github.com/lawrancej/logisim.git
Repairing items noted in Ilia's 27 Feb 2011 e-mail.
git-svn-id: https://circuit.svn.sourceforge.net/svnroot/circuit/trunk@194 70edf91d-0b9e-4248-82e7-2488d7716404
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@ -152,9 +152,11 @@ side.</dd>
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<dd>Indicates how false and true results should be translated into output values.
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By default, false is indicated by a low voltage (0) and true by a high voltage (1),
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but one or the other can be replaced by a high-impedance (<q>floating</q>) value
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instead. This allows wired-or and wired-and connections, as illustrated below;
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at left, the wired-or is built using floating/1 output values on the gates and a pull-to-0 resistor,
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at right, the wired-and is built using 0/floating output values on the gates and a pull-to-1 resistor.
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instead. This allows wired-or and wired-and connections, as illustrated below:
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At left, the buffers' Output Value attribute is floating/1 and the resistor pulls to 0,
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giving wired-or behavior;
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at right, the buffers' Output Value attribute is 0/floating and the resistor pulls to 1,
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giving wired-and behavior.
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<center><img src="../../../img-libs/wand-wor.png"></center></dd>
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@ -10,6 +10,10 @@ Feature: Added an enable input to the multiplexer, demultiplexer, and decoder, a
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Feature: During a rectangular selection, the rectangle is drawn with a light blue, and components that will be affected are indicated with a slate-blue outline.
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Feature: The gates in the Gates library (except Controlled Buffer and Controlled Inverter) have a new Output Value attribute so that a gate can output a floating value when the result is true or when the result is false. This is useful for building a wired-or and wired-and connections.
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Feature: The attribute table contains a header line describing which attributes are being edited.
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Feature: Added a "Close" item to the Window menu, which closes the current window. The "Close" item in the File menu continues to close the current project; its shortcut is now Control-Shift-W.
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Bug fix: When simulation is disabled, selecting Tick Once will still cause a tick once the simulation is stepped.
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@ -18,15 +22,10 @@ Bug fix: Changing the label for a Tunnel would not immediately affect the values
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Bug fix: In the Karnaugh maps drawn by the Combinational Analysis module, each implicant was indicated by a red rectangle, but they were meant to use varied colors.
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Design change: For the Memory library's Random component, a reset when the seed is 0 computes a new initial seed based on the current time. (It previously reset to the initial seed for the current simulation.)
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Feature: The gates in the Gates library (except Controlled Buffer and Controlled Inverter) have a new Output Value attribute so that a gate can output a floating value when the result is true or when the result is false. This is useful for building a wired-or and wired-and connections.
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Feature: The attribute table contains a header line describing which attributes are being edited.
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Bug fix: Pull resistors did not respect "printer view," which is meant to be black and white.
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Design change: For the Memory library's Random component, a reset when the seed is 0 computes a new initial seed based on the current time. (It previously reset to the initial seed for the current simulation.)
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Design change: Deleted the "Legacy" library for supporting versions 1.x of Logisim.
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Design change: All components except Constant now use the included GIF icons rather than Java code.
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