forked from OSchip/llvm-project
88 lines
3.3 KiB
LLVM
88 lines
3.3 KiB
LLVM
; Test -hwasan-with-ifunc flag.
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;
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; RUN: opt -hwasan -S < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS,CHECK-HISTORY
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; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=1 -hwasan-record-stack-history=1 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS,CHECK-HISTORY
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; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=1 -hwasan-record-stack-history=0 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-IFUNC,CHECK-NOHISTORY
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; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=0 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL,CHECK-NOHISTORY
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; RUN: opt -hwasan -S -hwasan-with-ifunc=1 -hwasan-with-tls=0 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECk-NOGLOBAL,CHECK-IFUNC,CHECK-NOHISTORY
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-android22"
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; CHECK-IFUNC: @__hwasan_shadow = external global [0 x i8]
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; CHECK-NOIFUNC: @__hwasan_shadow_memory_dynamic_address = external global i64
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define i32 @test_load(i32* %a) sanitize_hwaddress {
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; First instrumentation in the function must be to load the dynamic shadow
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; address into a local variable.
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; CHECK-LABEL: @test_load
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; CHECK: entry:
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; CHECK-NOGLOBAL: %[[A:[^ ]*]] = call i8* asm "", "=r,0"([0 x i8]* @__hwasan_shadow)
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; CHECK-NOGLOBAL: @llvm.hwasan.check.memaccess(i8* %[[A]]
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; CHECK-GLOBAL: load i8*, i8** @__hwasan_shadow_memory_dynamic_address
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; "store i64" is only used to update stack history (this input IR intentionally does not use any i64)
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; W/o any allocas, the history is not updated, even if it is enabled explicitly with -hwasan-record-stack-history=1
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; CHECK-NOT: store i64
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; CHECK: ret i32
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entry:
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%x = load i32, i32* %a, align 4
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ret i32 %x
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}
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declare void @use(i32* %p)
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define void @test_alloca() sanitize_hwaddress {
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; First instrumentation in the function must be to load the dynamic shadow
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; address into a local variable.
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; CHECK-LABEL: @test_alloca
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; CHECK: entry:
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; CHECK-IFUNC: %[[A:[^ ]*]] = call i8* asm "", "=r,0"([0 x i8]* @__hwasan_shadow)
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; CHECK-IFUNC: getelementptr i8, i8* %[[A]]
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; CHECK-GLOBAL: load i8*, i8** @__hwasan_shadow_memory_dynamic_address
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; CHECK-TLS: %[[A:[^ ]*]] = call i8* @llvm.thread.pointer()
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; CHECK-TLS: %[[B:[^ ]*]] = getelementptr i8, i8* %[[A]], i32 48
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; CHECK-TLS: %[[C:[^ ]*]] = bitcast i8* %[[B]] to i64*
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; CHECK-TLS: %[[D:[^ ]*]] = load i64, i64* %[[C]]
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; CHECK-TLS: %[[E:[^ ]*]] = ashr i64 %[[D]], 3
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; CHECK-NOHISTORY-NOT: store i64
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; CHECK-HISTORY: call i64 @llvm.read_register.i64(metadata [[MD:![0-9]*]])
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; CHECK-HISTORY: %[[PTR:[^ ]*]] = inttoptr i64 %[[D]] to i64*
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; CHECK-HISTORY: store i64 %{{.*}}, i64* %[[PTR]]
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; CHECK-HISTORY: %[[D1:[^ ]*]] = ashr i64 %[[D]], 56
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; CHECK-HISTORY: %[[D2:[^ ]*]] = shl nuw nsw i64 %[[D1]], 12
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; CHECK-HISTORY: %[[D3:[^ ]*]] = xor i64 %[[D2]], -1
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; CHECK-HISTORY: %[[D4:[^ ]*]] = add i64 %[[D]], 8
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; CHECK-HISTORY: %[[D5:[^ ]*]] = and i64 %[[D4]], %[[D3]]
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; CHECK-HISTORY: store i64 %[[D5]], i64* %[[C]]
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; CHECK-TLS: %[[F:[^ ]*]] = or i64 %[[D]], 4294967295
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; CHECK-TLS: = add i64 %[[F]], 1
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; CHECK-HISTORY: = xor i64 %[[E]], 0
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; CHECK-NOHISTORY-NOT: store i64
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entry:
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%x = alloca i32, align 4
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call void @use(i32* %x)
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ret void
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}
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; CHECK-HISTORY: [[MD]] = !{!"pc"}
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