forked from OSchip/llvm-project
95 lines
3.6 KiB
LLVM
95 lines
3.6 KiB
LLVM
; RUN: llc -mtriple=thumbv6m-eabi -verify-machineinstrs %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECKV6
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; RUN: llc -mtriple=thumbv6m-eabi -O=0 -verify-machineinstrs %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECKV6
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; RUN: llc -mtriple=thumbv7a-eabi -mattr=-neon -verify-machineinstrs %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECKV7
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; RUN: llc -mtriple=armv7a-eabi -mattr=-neon -verify-machineinstrs %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECKV7
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@d = external global [64 x i32]
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@s = external global [64 x i32]
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; Function Attrs: nounwind
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define void @t1() #0 {
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entry:
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; CHECK-LABEL: t1:
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; CHECKV6: ldr [[LB:r[0-7]]],
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; CHECKV6-NEXT: ldr [[SB:r[0-7]]],
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; We use '[rl0-9]+' to allow 'r0'..'r12', 'lr'
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; CHECKV7: movt [[LB:[rl0-9]+]], :upper16:d
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; CHECKV7-NEXT: movt [[SB:[rl0-9]+]], :upper16:s
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; CHECK-NEXT: ldm{{(\.w)?}} [[LB]]!,
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!,
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; Think of the monstrosity '{{\[}}[[LB]]]' as '[ [[LB]] ]' without the spaces.
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; CHECK-NEXT: ldrb{{(\.w)?}} {{.*}}, {{\[}}[[LB]]]
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; CHECK-NEXT: strb{{(\.w)?}} {{.*}}, {{\[}}[[SB]]]
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 bitcast ([64 x i32]* @s to i8*), i8* align 4 bitcast ([64 x i32]* @d to i8*), i32 17, i1 false)
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ret void
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}
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; Function Attrs: nounwind
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define void @t2() #0 {
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entry:
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; CHECK-LABEL: t2:
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; CHECKV6: ldr [[LB:r[0-7]]],
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; CHECKV6-NEXT: ldr [[SB:r[0-7]]],
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; CHECKV7: movt [[LB:[rl0-9]+]], :upper16:d
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; CHECKV7-NEXT: movt [[SB:[rl0-9]+]], :upper16:s
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; CHECK-NEXT: ldm{{(\.w)?}} [[LB]]!,
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; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!,
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; CHECK-NEXT: ldrh{{(\.w)?}} {{.*}}, {{\[}}[[LB]]]
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; CHECK-NEXT: ldrb{{(\.w)?}} {{.*}}, {{\[}}[[LB]], #2]
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; CHECK-NEXT: strb{{(\.w)?}} {{.*}}, {{\[}}[[SB]], #2]
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; CHECK-NEXT: strh{{(\.w)?}} {{.*}}, {{\[}}[[SB]]]
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 bitcast ([64 x i32]* @s to i8*), i8* align 4 bitcast ([64 x i32]* @d to i8*), i32 15, i1 false)
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ret void
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}
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; PR23768
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%struct.T = type { i8, i64, i8 }
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@copy = external global %struct.T, align 8
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@etest = external global %struct.T, align 8
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define void @t3() {
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call void @llvm.memcpy.p0i8.p0i8.i32(
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i8* align 8 getelementptr inbounds (%struct.T, %struct.T* @copy, i32 0, i32 0),
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i8* align 8 getelementptr inbounds (%struct.T, %struct.T* @etest, i32 0, i32 0),
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i32 24, i1 false)
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call void @llvm.memcpy.p0i8.p0i8.i32(
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i8* align 8 getelementptr inbounds (%struct.T, %struct.T* @copy, i32 0, i32 0),
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i8* align 8 getelementptr inbounds (%struct.T, %struct.T* @etest, i32 0, i32 0),
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i32 24, i1 false)
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ret void
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}
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%struct.S = type { [12 x i32] }
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; CHECK-LABEL: test3
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define void @test3(%struct.S* %d, %struct.S* %s) #0 {
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%1 = bitcast %struct.S* %d to i8*
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%2 = bitcast %struct.S* %s to i8*
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tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %1, i8* align 4 %2, i32 48, i1 false)
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; 3 ldm/stm pairs in v6; 2 in v7
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; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1:{.*}]]
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; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1]]
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; CHECK: ldm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST2:{.*}]]
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; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST2]]
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; CHECKV6: ldm {{r[0-7]!?}}, [[REGLIST3:{.*}]]
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; CHECKV6: stm {{r[0-7]!?}}, [[REGLIST3]]
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; CHECKV7-NOT: ldm
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; CHECKV7-NOT: stm
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%arrayidx = getelementptr inbounds %struct.S, %struct.S* %s, i32 0, i32 0, i32 1
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tail call void @g(i32* %arrayidx) #3
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ret void
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}
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declare void @g(i32*)
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; Set "no-frame-pointer-elim" to increase register pressure
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attributes #0 = { "no-frame-pointer-elim"="true" }
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; Function Attrs: nounwind
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1
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