forked from OSchip/llvm-project
106 lines
4.3 KiB
LLVM
106 lines
4.3 KiB
LLVM
; RUN: opt %loadPolly -S -polly-codegen < %s | FileCheck %s
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;
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; int jd(int *restrict A, int x, int N, int c) {
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; for (int i = 0; i < N; i++)
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; for (int j = 0; j < N; j++)
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; if (i < c)
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; x += A[i];
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; return x;
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; }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define i32 @jd(i32* noalias %A, i32 %x, i32 %N, i32 %c) {
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entry:
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; CHECK-LABEL: entry:
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; CHECK-DAG: %x.addr.2.s2a = alloca i32
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; CHECK-DAG: %x.addr.2.phiops = alloca i32
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; CHECK-DAG: %x.addr.1.s2a = alloca i32
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; CHECK-DAG: %x.addr.1.phiops = alloca i32
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; CHECK-DAG: %x.addr.0.s2a = alloca i32
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; CHECK-DAG: %x.addr.0.phiops = alloca i32
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%tmp = sext i32 %N to i64
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%tmp1 = sext i32 %c to i64
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br label %for.cond
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; CHECK-LABEL: polly.merge_new_and_old:
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; CHECK: %x.addr.0.merge = phi i32 [ %x.addr.0.final_reload, %polly.exiting ], [ %x.addr.0, %for.cond ]
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; CHECK: ret i32 %x.addr.0.merge
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; CHECK-LABEL: polly.start:
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; CHECK-NEXT: store i32 %x, i32* %x.addr.0.phiops
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; CHECK-NEXT: sext
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; CHECK-LABEL: polly.merge{{[a-z_0-9]*}}:
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; CHECK: %x.addr.0.final_reload = load i32, i32* %x.addr.0.s2a
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for.cond: ; preds = %for.inc5, %entry
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; CHECK-LABEL: polly.stmt.for.cond{{[0-9]*}}:
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; CHECK: %x.addr.0.phiops.reload[[R1:[0-9]*]] = load i32, i32* %x.addr.0.phiops
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; CHECK: store i32 %x.addr.0.phiops.reload[[R1]], i32* %x.addr.0.s2a
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc5 ], [ 0, %entry ]
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%x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1, %for.inc5 ]
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%cmp = icmp slt i64 %indvars.iv, %tmp
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br i1 %cmp, label %for.body, label %for.end7
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for.body: ; preds = %for.cond
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; CHECK-LABEL: polly.stmt.for.body:
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; CHECK: %x.addr.0.s2a.reload[[R2:[0-9]*]] = load i32, i32* %x.addr.0.s2a
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; CHECK: store i32 %x.addr.0.s2a.reload[[R2]], i32* %x.addr.1.phiops
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br label %for.cond1
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for.inc5: ; preds = %for.end
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; CHECK-LABEL: polly.stmt.for.inc5:
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; CHECK: %x.addr.1.s2a.reload[[R5:[0-9]*]] = load i32, i32* %x.addr.1.s2a
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; CHECK: store i32 %x.addr.1.s2a.reload[[R5]], i32* %x.addr.0.phiops
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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br label %for.cond
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for.cond1: ; preds = %for.inc, %for.body
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; CHECK-LABEL: polly.stmt.for.cond1:
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; CHECK: %x.addr.1.phiops.reload = load i32, i32* %x.addr.1.phiops
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; CHECK: store i32 %x.addr.1.phiops.reload, i32* %x.addr.1.s2a
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%x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %x.addr.2, %for.inc ]
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%j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ]
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%exitcond = icmp ne i32 %j.0, %N
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br i1 %exitcond, label %for.body3, label %for.end
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for.body3: ; preds = %for.cond1
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; CHECK-LABEL: polly.stmt.for.body3:
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; CHECK: %x.addr.1.s2a.reload = load i32, i32* %x.addr.1.s2a
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; CHECK: store i32 %x.addr.1.s2a.reload, i32* %x.addr.2.phiops
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%cmp4 = icmp slt i64 %indvars.iv, %tmp1
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br i1 %cmp4, label %if.then, label %if.end
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if.end: ; preds = %if.then, %for.body3
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; CHECK-LABEL: polly.stmt.if.end:
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; CHECK: %x.addr.2.phiops.reload = load i32, i32* %x.addr.2.phiops
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; CHECK: store i32 %x.addr.2.phiops.reload, i32* %x.addr.2.s2a
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%x.addr.2 = phi i32 [ %add, %if.then ], [ %x.addr.1, %for.body3 ]
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br label %for.inc
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for.inc: ; preds = %if.end
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; CHECK-LABEL: polly.stmt.for.inc:
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; CHECK: %x.addr.2.s2a.reload[[R3:[0-9]*]] = load i32, i32* %x.addr.2.s2a
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; CHECK: store i32 %x.addr.2.s2a.reload[[R3]], i32* %x.addr.1.phiops
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%inc = add nsw i32 %j.0, 1
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br label %for.cond1
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if.then: ; preds = %for.body3
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; CHECK-LABEL: polly.stmt.if.then:
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; CHECK: %x.addr.1.s2a.reload[[R5:[0-9]*]] = load i32, i32* %x.addr.1.s2a
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; CHECK: %p_add = add nsw i32 %x.addr.1.s2a.reload[[R5]], %tmp2_p_scalar_
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; CHECK: store i32 %p_add, i32* %x.addr.2.phiops
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%arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv
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%tmp2 = load i32, i32* %arrayidx, align 4
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%add = add nsw i32 %x.addr.1, %tmp2
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br label %if.end
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for.end: ; preds = %for.cond1
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br label %for.inc5
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for.end7: ; preds = %for.cond
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ret i32 %x.addr.0
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}
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