forked from OSchip/llvm-project
29 lines
785 B
Plaintext
29 lines
785 B
Plaintext
{
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"context" : "{ : }",
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"name" : "for.cond => for.end14",
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"statements" : [
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{
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"accesses" : [
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{
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"kind" : "write",
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"relation" : "{ Stmt_for_body[i0] -> MemRef_A[i0] }"
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}
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],
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"domain" : "{ Stmt_for_body[i0] : i0 >= 0 and i0 <= 11 }",
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"name" : "Stmt_for_body",
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"schedule" : "{ Stmt_for_body[i0] -> [0, i0, 0] }"
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},
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{
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"accesses" : [
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{
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"kind" : "write",
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"relation" : "{ Stmt_for_body7[i0] -> MemRef_B[i0] }"
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}
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],
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"domain" : "{ Stmt_for_body7[i0] : i0 >= 0 and i0 <= 11 }",
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"name" : "Stmt_for_body7",
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"schedule" : "{ Stmt_for_body7[i0] -> [0, i0, 0] }"
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}
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]
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}
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