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llvm-project/llvm/test/Transforms/CodeGenPrepare
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Junmo Park 161dc1c605 [CodeGenPrepare] Remove load-based heuristic 
Summary:
Both the hardware and LLVM have changed since 2012.
Now, load-based heuristic don't show big differences any more on OoO cores.

There is no notable regressons and improvements on spec2000/2006. (Cortex-A57, Core i5).

Reviewers: spatel, zansari
    
Differential Revision: http://reviews.llvm.org/D16836

llvm-svn: 261809
 		2016-02-25 00:23:27 +00:00
..
AArch64 Move free-zext.ll to llvm/test/Transforms/CodeGenPrepare/AArch64/ 2015-11-20 22:55:34 +00:00
AMDGPU AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ARM [InstCombine] Rewrite bswap/bitreverse handling completely. 2016-01-15 09:20:19 +00:00
X86 [CodeGenPrepare] Remove load-based heuristic 2016-02-25 00:23:27 +00:00
2008-11-24-RAUW-Self.ll
…
basic.ll
…
bitreverse-hang.ll [InstCombine] Rewrite bswap/bitreverse handling completely. 2016-01-15 09:20:19 +00:00
invariant.group.ll Introducing llvm.invariant.group.barrier intrinsic 2015-09-15 18:32:14 +00:00
overflow-intrinsics.ll [InstCombine][CodeGenPrep] Create llvm.uadd.with.overflow in CGP. 2015-04-10 21:07:09 +00:00
statepoint-relocate.ll [gc.statepoint] Change gc.statepoint intrinsic's return type to token type instead of i32 type 2015-12-26 07:54:32 +00:00