Colin LeMahieu ab9eca4d9f [Hexagon] As a size optimization, not lazy extending TPREL or DTPREL variants since they're usually in range. ... llvm-svn: 262258		2016-02-29 21:21:56 +00:00
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AArch64	AArch64: remove CRC feature from Cyclone.	2016-02-24 18:10:17 +00:00
AMDGPU	AMDGPU: Implement readcyclecounter	2016-02-27 08:53:46 +00:00
ARM	ARM: disallow pc as a base register in Thumb2 memory ops.	2016-02-25 16:54:52 +00:00
AsmParser	[MC] Fixed parsing of macro arguments where expressions with spaces are present.	2016-02-11 13:48:49 +00:00
COFF	[codeview] Dump def range lengths in hex	2016-02-11 23:40:14 +00:00
Disassembler	[mips] Range check uimm20 and fixed a bug this revealed.	2016-02-29 16:06:38 +00:00
ELF	Accept subtractions involving a weak symbol.	2016-01-20 18:57:48 +00:00
Hexagon	[Hexagon] As a size optimization, not lazy extending TPREL or DTPREL variants since they're usually in range.	2016-02-29 21:21:56 +00:00
MachO	Form reform for MCDwarf.	2015-12-23 01:57:31 +00:00
Markup	…
Mips	[mips] Range check uimm20 and fixed a bug this revealed.	2016-02-29 16:06:38 +00:00
PowerPC	Power9] Implement new vsx instructions: compare and conversion	2016-02-26 21:11:55 +00:00
Sparc	Addition of tests to previous check-in. Tests for coprocessor register usage in Sparc.	2016-02-27 12:52:26 +00:00
SystemZ	[SystemZ] Sort relocs to avoid code corruption by linker optimization	2015-12-16 18:12:40 +00:00
X86	[X86] Move an encoding test from CodeGen to MC. NFC.	2016-02-26 23:00:03 +00:00