Srividya Karumuri 9e3e1aad31 [InstCombine] Allow fake vector insert folding to bit-logic only if the insert element is integer type ... The below commit is causing assertion when insert element type is not integer type such as half. This is because the transformation is creating zext before doing bitwise OR, and the zext is supported only for integer types 80ab06c599 Reviewed By: spatel Differential Revision: https://reviews.llvm.org/D114734		2021-11-30 13:54:52 -08:00
..
AggressiveInstCombine	[llvm] Use llvm::reverse (NFC)	2021-11-06 19:31:18 -07:00
CFGuard	llvmbuildectomy - replace llvm-build by plain cmake	2020-11-13 10:35:24 +01:00
Coroutines	Coro: Remove coro_end and coro_suspend_retcon in private unprocessed functions	2021-11-18 07:48:24 -08:00
Hello	…
IPO	[CSSPGO] Sorting nodes in a cycle of profiled call graph.	2021-11-30 09:01:08 -08:00
InstCombine	[InstCombine] Allow fake vector insert folding to bit-logic only if the insert element is integer type	2021-11-30 13:54:52 -08:00
Instrumentation	[LLVM][NFC]Inclusive language: remove occurances of sanity check/test from llvm	2021-11-24 17:29:55 -05:00
ObjCARC	[llvm] Use range-based for loops (NFC)	2021-11-28 18:14:49 -08:00
Scalar	[DSE] Use optimized access if available for redundant store elimination.	2021-11-30 15:40:14 +00:00
Utils	[SCEVExpander] Drop poison generating flags when reusing instructions	2021-11-29 15:23:34 -08:00
Vectorize	[SLP]Improve isFixedVectorShuffle and its use.	2021-11-30 10:10:20 -08:00
CMakeLists.txt	[NewPM][HelloWorld] Move HelloWorld to Utils	2021-02-03 12:59:40 -08:00