forked from OSchip/llvm-project
ee6c233ae0
Thread sanitizer instrumentation fails to skip all loads and stores to
profile counters. This can happen if profile counter updates are merged:
%.sink = phi i64* ...
%pgocount5 = load i64, i64* %.sink
%27 = add i64 %pgocount5, 1
%28 = bitcast i64* %.sink to i8*
call void @__tsan_write8(i8* %28)
store i64 %27, i64* %.sink
To suppress TSan diagnostics about racy counter updates, make the
counter updates atomic when TSan is enabled. If there's general interest
in this mode it can be surfaced as a clang/swift driver option.
Testing: check-{llvm,clang,profile}
rdar://40477803
Differential Revision: https://reviews.llvm.org/D50867
llvm-svn: 339955
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|---|---|---|
| .. | ||
| AddressSanitizer | ||
| BoundsChecking | ||
| DataFlowSanitizer | ||
| EfficiencySanitizer | ||
| HWAddressSanitizer | ||
| InstrProfiling | ||
| MemorySanitizer | ||
| SanitizerCoverage | ||
| ThreadSanitizer | ||
| cgprofile.ll | ||