forked from OSchip/llvm-project
340 lines
11 KiB
LLVM
340 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -o - | FileCheck %s
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define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-LABEL: __fixunstfdi:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stw 0, 4(1)
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; CHECK-NEXT: stwu 1, -464(1)
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; CHECK-NEXT: mfcr 12
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; CHECK-NEXT: stw 29, 412(1) # 4-byte Folded Spill
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; CHECK-NEXT: stw 30, 416(1) # 4-byte Folded Spill
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; CHECK-NEXT: lis 3, .LCPI0_0@ha
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; CHECK-NEXT: stw 12, 408(1)
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; CHECK-NEXT: stfd 2, 376(1)
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; CHECK-NEXT: stfd 27, 424(1) # 8-byte Folded Spill
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; CHECK-NEXT: stfd 1, 384(1)
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; CHECK-NEXT: stfd 28, 432(1) # 8-byte Folded Spill
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; CHECK-NEXT: stfd 29, 440(1) # 8-byte Folded Spill
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; CHECK-NEXT: stfd 30, 448(1) # 8-byte Folded Spill
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; CHECK-NEXT: stfd 31, 456(1) # 8-byte Folded Spill
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; CHECK-NEXT: lwz 4, 380(1)
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; CHECK-NEXT: lfs 27, .LCPI0_0@l(3)
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; CHECK-NEXT: lwz 3, 384(1)
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; CHECK-NEXT: stw 4, 396(1)
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; CHECK-NEXT: fcmpu 0, 2, 27
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; CHECK-NEXT: lwz 4, 376(1)
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; CHECK-NEXT: fcmpu 1, 1, 27
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; CHECK-NEXT: crand 20, 6, 0
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; CHECK-NEXT: cror 20, 4, 20
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; CHECK-NEXT: stw 4, 392(1)
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; CHECK-NEXT: stw 3, 400(1)
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; CHECK-NEXT: lwz 4, 388(1)
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; CHECK-NEXT: stw 4, 404(1)
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; CHECK-NEXT: bc 4, 20, .LBB0_2
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; CHECK-NEXT: # %bb.1: # %bb5
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: li 4, 0
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; CHECK-NEXT: b .LBB0_17
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; CHECK-NEXT: .LBB0_2: # %bb1
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; CHECK-NEXT: lfd 0, 400(1)
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; CHECK-NEXT: lis 3, 15856
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; CHECK-NEXT: stw 3, 336(1)
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; CHECK-NEXT: lfd 1, 392(1)
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; CHECK-NEXT: li 29, 0
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; CHECK-NEXT: stfd 0, 304(1)
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; CHECK-NEXT: stw 29, 340(1)
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; CHECK-NEXT: stw 29, 332(1)
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; CHECK-NEXT: stw 29, 328(1)
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; CHECK-NEXT: lwz 3, 308(1)
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; CHECK-NEXT: stfd 1, 296(1)
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; CHECK-NEXT: lfd 3, 336(1)
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; CHECK-NEXT: lfd 4, 328(1)
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; CHECK-NEXT: stw 3, 324(1)
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; CHECK-NEXT: lwz 3, 304(1)
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; CHECK-NEXT: stw 3, 320(1)
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; CHECK-NEXT: lwz 3, 300(1)
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; CHECK-NEXT: lfd 31, 320(1)
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; CHECK-NEXT: stw 3, 316(1)
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; CHECK-NEXT: fmr 1, 31
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; CHECK-NEXT: lwz 3, 296(1)
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; CHECK-NEXT: stw 3, 312(1)
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; CHECK-NEXT: lfd 30, 312(1)
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; CHECK-NEXT: fmr 2, 30
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; CHECK-NEXT: bl __gcc_qmul@PLT
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; CHECK-NEXT: lis 3, 16864
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; CHECK-NEXT: stfd 1, 280(1)
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; CHECK-NEXT: stw 3, 368(1)
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; CHECK-NEXT: stfd 2, 288(1)
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; CHECK-NEXT: stw 29, 372(1)
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; CHECK-NEXT: stw 29, 364(1)
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; CHECK-NEXT: stw 29, 360(1)
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; CHECK-NEXT: fmr 29, 1
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; CHECK-NEXT: lwz 3, 284(1)
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; CHECK-NEXT: fmr 28, 2
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; CHECK-NEXT: lfd 3, 368(1)
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; CHECK-NEXT: lfd 4, 360(1)
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; CHECK-NEXT: stw 3, 356(1)
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; CHECK-NEXT: lwz 3, 280(1)
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; CHECK-NEXT: stw 3, 352(1)
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; CHECK-NEXT: lwz 3, 292(1)
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; CHECK-NEXT: lfd 1, 352(1)
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; CHECK-NEXT: stw 3, 348(1)
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; CHECK-NEXT: lwz 3, 288(1)
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; CHECK-NEXT: stw 3, 344(1)
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; CHECK-NEXT: lfd 2, 344(1)
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; CHECK-NEXT: bl __gcc_qsub@PLT
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_1@ha
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; CHECK-NEXT: fcmpu 0, 28, 27
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; CHECK-NEXT: mtfsb0 30
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; CHECK-NEXT: fadd 1, 2, 1
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; CHECK-NEXT: mtfsf 1, 0
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; CHECK-NEXT: fctiwz 0, 1
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; CHECK-NEXT: mffs 1
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; CHECK-NEXT: stfd 0, 160(1)
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: mtfsb0 30
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; CHECK-NEXT: fadd 0, 28, 29
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; CHECK-NEXT: mtfsf 1, 1
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; CHECK-NEXT: lfs 1, .LCPI0_1@l(3)
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; CHECK-NEXT: fctiwz 0, 0
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; CHECK-NEXT: stfd 0, 152(1)
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; CHECK-NEXT: lwz 3, 164(1)
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; CHECK-NEXT: fcmpu 1, 29, 1
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; CHECK-NEXT: lwz 4, 156(1)
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; CHECK-NEXT: crandc 20, 6, 0
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; CHECK-NEXT: cror 20, 5, 20
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; CHECK-NEXT: addis 3, 3, -32768
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; CHECK-NEXT: bc 12, 20, .LBB0_4
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; CHECK-NEXT: # %bb.3: # %bb1
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; CHECK-NEXT: ori 30, 4, 0
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; CHECK-NEXT: b .LBB0_5
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; CHECK-NEXT: .LBB0_4: # %bb1
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; CHECK-NEXT: addi 30, 3, 0
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; CHECK-NEXT: .LBB0_5: # %bb1
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; CHECK-NEXT: li 4, 0
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; CHECK-NEXT: mr 3, 30
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; CHECK-NEXT: bl __floatditf@PLT
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; CHECK-NEXT: lis 3, 17392
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; CHECK-NEXT: stfd 1, 208(1)
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; CHECK-NEXT: stw 3, 240(1)
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; CHECK-NEXT: stfd 2, 200(1)
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; CHECK-NEXT: stw 29, 244(1)
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; CHECK-NEXT: stw 29, 236(1)
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; CHECK-NEXT: stw 29, 232(1)
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; CHECK-NEXT: fmr 29, 1
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; CHECK-NEXT: lwz 3, 212(1)
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; CHECK-NEXT: fmr 28, 2
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; CHECK-NEXT: lfd 3, 240(1)
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; CHECK-NEXT: lfd 4, 232(1)
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; CHECK-NEXT: cmpwi 2, 30, 0
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; CHECK-NEXT: stw 3, 228(1)
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; CHECK-NEXT: lwz 3, 208(1)
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; CHECK-NEXT: stw 3, 224(1)
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; CHECK-NEXT: lwz 3, 204(1)
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; CHECK-NEXT: lfd 1, 224(1)
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; CHECK-NEXT: stw 3, 220(1)
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; CHECK-NEXT: lwz 3, 200(1)
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; CHECK-NEXT: stw 3, 216(1)
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; CHECK-NEXT: lfd 2, 216(1)
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; CHECK-NEXT: bl __gcc_qadd@PLT
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; CHECK-NEXT: blt 2, .LBB0_7
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; CHECK-NEXT: # %bb.6: # %bb1
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; CHECK-NEXT: fmr 2, 28
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; CHECK-NEXT: .LBB0_7: # %bb1
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; CHECK-NEXT: blt 2, .LBB0_9
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; CHECK-NEXT: # %bb.8: # %bb1
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; CHECK-NEXT: fmr 1, 29
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; CHECK-NEXT: .LBB0_9: # %bb1
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; CHECK-NEXT: stfd 1, 184(1)
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; CHECK-NEXT: stfd 2, 192(1)
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; CHECK-NEXT: fmr 1, 31
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; CHECK-NEXT: lwz 3, 188(1)
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; CHECK-NEXT: fmr 2, 30
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; CHECK-NEXT: stw 3, 260(1)
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; CHECK-NEXT: lwz 3, 184(1)
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; CHECK-NEXT: stw 3, 256(1)
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; CHECK-NEXT: lwz 3, 196(1)
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; CHECK-NEXT: lfd 3, 256(1)
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; CHECK-NEXT: stw 3, 252(1)
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; CHECK-NEXT: lwz 3, 192(1)
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; CHECK-NEXT: stw 3, 248(1)
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; CHECK-NEXT: lfd 4, 248(1)
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; CHECK-NEXT: bl __gcc_qsub@PLT
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; CHECK-NEXT: stfd 2, 176(1)
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; CHECK-NEXT: stfd 1, 168(1)
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; CHECK-NEXT: fcmpu 1, 2, 27
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; CHECK-NEXT: lwz 3, 180(1)
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; CHECK-NEXT: fcmpu 0, 1, 27
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; CHECK-NEXT: crandc 20, 2, 4
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; CHECK-NEXT: stw 3, 268(1)
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; CHECK-NEXT: lwz 3, 176(1)
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; CHECK-NEXT: stw 3, 264(1)
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; CHECK-NEXT: lwz 3, 172(1)
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; CHECK-NEXT: lfd 30, 264(1)
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; CHECK-NEXT: stw 3, 276(1)
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; CHECK-NEXT: lwz 3, 168(1)
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; CHECK-NEXT: stw 3, 272(1)
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; CHECK-NEXT: lfd 31, 272(1)
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; CHECK-NEXT: bc 12, 20, .LBB0_14
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; CHECK-NEXT: # %bb.10: # %bb1
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; CHECK-NEXT: cror 20, 1, 3
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; CHECK-NEXT: bc 12, 20, .LBB0_14
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; CHECK-NEXT: # %bb.11: # %bb2
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; CHECK-NEXT: fneg 28, 31
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; CHECK-NEXT: stfd 28, 48(1)
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; CHECK-NEXT: lis 3, 16864
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; CHECK-NEXT: stw 3, 80(1)
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; CHECK-NEXT: fneg 29, 30
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; CHECK-NEXT: lwz 3, 52(1)
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; CHECK-NEXT: stfd 29, 40(1)
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; CHECK-NEXT: li 29, 0
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; CHECK-NEXT: stw 29, 84(1)
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; CHECK-NEXT: stw 29, 76(1)
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; CHECK-NEXT: stw 29, 72(1)
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; CHECK-NEXT: stw 3, 68(1)
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; CHECK-NEXT: lfd 3, 80(1)
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; CHECK-NEXT: lfd 4, 72(1)
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; CHECK-NEXT: lwz 3, 48(1)
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; CHECK-NEXT: stw 3, 64(1)
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; CHECK-NEXT: lwz 3, 44(1)
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; CHECK-NEXT: lfd 1, 64(1)
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; CHECK-NEXT: stw 3, 60(1)
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; CHECK-NEXT: lwz 3, 40(1)
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; CHECK-NEXT: stw 3, 56(1)
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; CHECK-NEXT: lfd 2, 56(1)
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; CHECK-NEXT: bl __gcc_qsub@PLT
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_2@ha
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; CHECK-NEXT: mtfsb0 30
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; CHECK-NEXT: fadd 1, 2, 1
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; CHECK-NEXT: mtfsf 1, 0
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; CHECK-NEXT: fctiwz 0, 1
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; CHECK-NEXT: mffs 1
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; CHECK-NEXT: stfd 0, 32(1)
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lfs 0, .LCPI0_2@l(3)
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; CHECK-NEXT: lis 3, .LCPI0_3@ha
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; CHECK-NEXT: mtfsb0 30
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; CHECK-NEXT: fadd 2, 29, 28
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; CHECK-NEXT: mtfsf 1, 1
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; CHECK-NEXT: lfs 1, .LCPI0_3@l(3)
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; CHECK-NEXT: fcmpu 0, 30, 0
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; CHECK-NEXT: fctiwz 2, 2
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; CHECK-NEXT: stfd 2, 24(1)
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; CHECK-NEXT: lwz 3, 36(1)
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; CHECK-NEXT: fcmpu 1, 31, 1
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; CHECK-NEXT: lwz 4, 28(1)
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; CHECK-NEXT: crandc 20, 6, 1
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; CHECK-NEXT: cror 20, 4, 20
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; CHECK-NEXT: addis 3, 3, -32768
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; CHECK-NEXT: bc 12, 20, .LBB0_13
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; CHECK-NEXT: # %bb.12: # %bb2
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; CHECK-NEXT: ori 3, 4, 0
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; CHECK-NEXT: b .LBB0_13
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; CHECK-NEXT: .LBB0_13: # %bb2
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; CHECK-NEXT: subfic 4, 3, 0
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; CHECK-NEXT: subfe 3, 29, 30
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; CHECK-NEXT: b .LBB0_17
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; CHECK-NEXT: .LBB0_14: # %bb3
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; CHECK-NEXT: stfd 31, 112(1)
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: stw 3, 148(1)
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; CHECK-NEXT: stw 3, 140(1)
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; CHECK-NEXT: stw 3, 136(1)
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; CHECK-NEXT: stfd 30, 104(1)
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; CHECK-NEXT: lis 4, 16864
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; CHECK-NEXT: lwz 3, 116(1)
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; CHECK-NEXT: stw 4, 144(1)
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; CHECK-NEXT: lfd 4, 136(1)
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; CHECK-NEXT: stw 3, 132(1)
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; CHECK-NEXT: lfd 3, 144(1)
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; CHECK-NEXT: lwz 3, 112(1)
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; CHECK-NEXT: stw 3, 128(1)
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; CHECK-NEXT: lwz 3, 108(1)
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; CHECK-NEXT: lfd 1, 128(1)
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; CHECK-NEXT: stw 3, 124(1)
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; CHECK-NEXT: lwz 3, 104(1)
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; CHECK-NEXT: stw 3, 120(1)
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; CHECK-NEXT: lfd 2, 120(1)
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; CHECK-NEXT: bl __gcc_qsub@PLT
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_0@ha
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; CHECK-NEXT: mtfsb0 30
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; CHECK-NEXT: fadd 1, 2, 1
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; CHECK-NEXT: mtfsf 1, 0
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; CHECK-NEXT: fctiwz 0, 1
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; CHECK-NEXT: mffs 1
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; CHECK-NEXT: stfd 0, 96(1)
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lfs 0, .LCPI0_0@l(3)
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; CHECK-NEXT: lis 3, .LCPI0_1@ha
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; CHECK-NEXT: mtfsb0 30
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; CHECK-NEXT: fadd 2, 30, 31
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; CHECK-NEXT: mtfsf 1, 1
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; CHECK-NEXT: lfs 1, .LCPI0_1@l(3)
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; CHECK-NEXT: fcmpu 0, 30, 0
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; CHECK-NEXT: fctiwz 2, 2
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; CHECK-NEXT: stfd 2, 88(1)
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; CHECK-NEXT: lwz 3, 100(1)
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; CHECK-NEXT: fcmpu 1, 31, 1
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; CHECK-NEXT: lwz 4, 92(1)
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; CHECK-NEXT: crandc 20, 6, 0
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; CHECK-NEXT: cror 20, 5, 20
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; CHECK-NEXT: addis 3, 3, -32768
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; CHECK-NEXT: bc 12, 20, .LBB0_15
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; CHECK-NEXT: b .LBB0_16
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; CHECK-NEXT: .LBB0_15: # %bb3
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; CHECK-NEXT: addi 4, 3, 0
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; CHECK-NEXT: .LBB0_16: # %bb3
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; CHECK-NEXT: mr 3, 30
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; CHECK-NEXT: .LBB0_17: # %bb5
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; CHECK-NEXT: lfd 31, 456(1) # 8-byte Folded Reload
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; CHECK-NEXT: lfd 30, 448(1) # 8-byte Folded Reload
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; CHECK-NEXT: lfd 29, 440(1) # 8-byte Folded Reload
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; CHECK-NEXT: lfd 28, 432(1) # 8-byte Folded Reload
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; CHECK-NEXT: lwz 12, 408(1)
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; CHECK-NEXT: lfd 27, 424(1) # 8-byte Folded Reload
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; CHECK-NEXT: lwz 30, 416(1) # 4-byte Folded Reload
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; CHECK-NEXT: mtcrf 32, 12 # cr2
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; CHECK-NEXT: lwz 29, 412(1) # 4-byte Folded Reload
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; CHECK-NEXT: lwz 0, 468(1)
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; CHECK-NEXT: addi 1, 1, 464
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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entry:
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%0 = fcmp olt ppc_fp128 %a, 0xM00000000000000000000000000000000 ; <i1> [#uses=1]
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br i1 %0, label %bb5, label %bb1
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bb1: ; preds = %entry
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%1 = fmul ppc_fp128 %a, 0xM3DF00000000000000000000000000000 ; <ppc_fp128> [#uses=1]
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%2 = fptoui ppc_fp128 %1 to i32 ; <i32> [#uses=1]
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%3 = zext i32 %2 to i64 ; <i64> [#uses=1]
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%4 = shl i64 %3, 32 ; <i64> [#uses=3]
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%5 = uitofp i64 %4 to ppc_fp128 ; <ppc_fp128> [#uses=1]
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%6 = fsub ppc_fp128 %a, %5 ; <ppc_fp128> [#uses=3]
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%7 = fcmp olt ppc_fp128 %6, 0xM00000000000000000000000000000000 ; <i1> [#uses=1]
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br i1 %7, label %bb2, label %bb3
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bb2: ; preds = %bb1
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%8 = fsub ppc_fp128 0xM80000000000000000000000000000000, %6 ; <ppc_fp128> [#uses=1]
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%9 = fptoui ppc_fp128 %8 to i32 ; <i32> [#uses=1]
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%10 = zext i32 %9 to i64 ; <i64> [#uses=1]
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%11 = sub i64 %4, %10 ; <i64> [#uses=1]
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ret i64 %11
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bb3: ; preds = %bb1
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%12 = fptoui ppc_fp128 %6 to i32 ; <i32> [#uses=1]
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%13 = zext i32 %12 to i64 ; <i64> [#uses=1]
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%14 = or i64 %13, %4 ; <i64> [#uses=1]
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ret i64 %14
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bb5: ; preds = %entry
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ret i64 0
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}
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