llvm-project/llvm/test/CodeGen/PowerPC
jasonliu 7707d8aa9d [XCOFF][AIX] Check linkage on the function, and two fixes for comments
This is a follow up commit to address post-commit comment in D70443

Differential revision: https://reviews.llvm.org/D70443
2019-11-26 16:09:31 +00:00
..
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2006-01-11-darwin-fp-argument.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-02-16-InlineAsmNConstraint.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-02-23-lr-saved-twice.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-04-30-InlineAsmEarlyClobber.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-05-03-InlineAsm-S-Constraint.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-05-14-InlineAsmSelectCrash.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-05-22-tailmerge-3.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-05-30-dagcombine-miscomp.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-10-21-LocalRegAllocAssert2.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-11-04-CoalescerCrash.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-11-16-landingpad-split.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-02-09-LocalRegAllocAssert.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-03-05-RegScavengerAssert.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-04-10-LiveIntervalCrash.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-04-16-CoalescerBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-04-23-CoalescerCrash.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-05-01-ppc_fp128.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll
2008-07-15-Bswap.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-07-15-Fabs.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-07-15-SignExtendInreg.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-07-17-Fneg.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-07-24-PPC64-CCBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-09-12-CoalescerBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-10-17-AsmMatchingOperands.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-10-28-UnprocessedNode.ll
2008-10-28-f128-i32.ll [PowerPC] Turn on CR-Logical reducer pass 2019-10-22 12:20:38 +00:00
2008-10-31-PPCF128Libcalls.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2008-12-02-LegalizeTypeAssert.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2009-01-16-DeclareISelBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2009-03-17-LSRBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2009-05-28-LegalizeBRCC.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2009-07-16-InlineAsm-M-Operand.ll [CodeGen] Print external symbols as $symbol in both MIR and debug output 2017-12-14 10:02:58 +00:00
2009-08-17-inline-asm-addr-mode-breakage.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2009-09-18-carrybit.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2009-11-15-ProcImpDefsBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2009-11-25-ImpDefBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2010-02-04-EmptyGlobal.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
2010-02-12-saveCR.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2010-03-09-indirect-call.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2010-04-01-MachineCSEBug.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2010-05-03-retaddr1.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
2011-12-05-NoSpillDupCR.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2011-12-06-SpillAndRestoreCR.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll
2012-11-16-mischedcall.ll
2013-05-15-preinc-fold.ll
2013-07-01-PHIElimBug.mir [NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention 2019-07-22 19:55:33 +00:00
2016-01-07-BranchWeightCrash.ll
2016-04-16-ADD8TLS.ll
2016-04-17-combine.ll
2016-04-28-setjmp.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
2018-09-19-sextinreg-vector-crash.ll [PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when type is v2i16 and v2i8 2018-10-10 02:33:48 +00:00
Atomics-64.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
BoolRetToIntTest-2.ll
BoolRetToIntTest.ll
BreakableToken-reduced.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
CSR-fit.ll [PowerPC] Fix VSX clobbers of CSR registers 2019-11-25 11:41:34 -06:00
CompareEliminationSpillIssue.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
DbgValueOtherTargets.test
DisableHoistingDueToBlockHotnessNoProfileData.mir [NFC] Fix test case after edab7dd426 2019-11-11 20:40:40 -06:00
DisableHoistingDueToBlockHotnessProfileData.mir [NFC] Fix test case after edab7dd426 2019-11-11 20:40:40 -06:00
Frames-alloca.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
Frames-large.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
Frames-leaf.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
Frames-small.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
LargeAbsoluteAddr.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
MCSE-caller-preserved-reg.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
MMO-flags-assertion.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
MergeConsecutiveStores.ll [Power9] Code Cleanup - Remove needsAggressiveScheduling() 2018-07-19 19:34:18 +00:00
NoCRFieldRedefWhenSpillingCRBIT.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
PR3488.ll
PR33636.ll
PR33671.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
PR35812-neg-cmpxchg.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
VSX-DForm-Scalars.ll
VSX-XForm-Scalars.ll [PowerPC] Exploit single instruction load-and-splat for word and doubleword 2019-09-17 16:45:20 +00:00
a2-fp-basic.ll
a2q-stackalign.ll
a2q.ll
aa-tbaa.ll
aantidep-def-ec.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
aantidep-inline-asm-use.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
absol-jump-table-enabled.ll [PowerPC] Option for enabling absolute jumptables with command line 2019-11-07 19:33:15 -06:00
add-fi.ll
add_cmp.ll [NFC][PowerPC] Modify the test case add_cmp.ll 2019-07-19 02:23:26 +00:00
addc.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
adde_return_type.ll [PowerPC] Fix the bug of ISD::ADDE to set its second return type to glue 2018-12-25 03:29:51 +00:00
addegluecrash.ll Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block" 2019-05-03 19:06:57 +00:00
addi-licm.ll [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop. 2019-07-03 01:49:03 +00:00
addi-offset-fold.ll [PowerPC] avoid masking already-zero bits in BitPermutationSelector 2018-10-12 14:02:20 +00:00
addi-reassoc.ll
addisdtprelha-nonr3.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
addrfuncstr.ll
addrspacecast.ll [PowerPC] Make AddrSpaceCast noop 2018-03-19 18:50:02 +00:00
addze.ll [PowerPC] Combine ADD to ADDZE 2018-09-07 07:56:05 +00:00
aggressive-anti-dep-breaker-subreg.ll Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
aix-byval-param.ll [AIX] Refactor AIX Call Lowering to use CCState. NFCI. 2019-10-28 12:44:22 -04:00
aix-func-dsc-gen.ll [AIX][XCOFF] Write Function descriptors and TOC base to data section 2019-11-19 16:11:00 +00:00
aix-lower-block-address.ll [AIX] Lowering jump table, constant pool and block address in asm 2019-11-20 10:27:15 -05:00
aix-lower-constant-pool-index.ll [AIX] Lowering jump table, constant pool and block address in asm 2019-11-20 10:27:15 -05:00
aix-lower-jump-table.ll [AIX] Lowering jump table, constant pool and block address in asm 2019-11-20 10:27:15 -05:00
aix-lr.ll Reland r368691: "[AIX] Implement LR prolog/epilog save/restore" 2019-08-13 17:05:53 +00:00
aix-nest-param.ll [AIX] Refactor AIX Call Lowering to use CCState. NFCI. 2019-10-28 12:44:22 -04:00
aix-return55.ll [AIX][XCOFF] Output XCOFF object text section header and symbol entry for program code. 2019-10-15 17:09:54 +00:00
aix-space.ll [AIX] Use .space instead of .zero in assembly 2019-10-11 15:07:28 +00:00
aix-sret-param.ll [AIX] Refactor AIX Call Lowering to use CCState. NFCI. 2019-10-28 12:44:22 -04:00
aix-stackargs.ll [AIX] Refactor AIX Call Lowering to use CCState. NFCI. 2019-10-28 12:44:22 -04:00
aix-undef-func-call.ll [AIX][XCOFF] Generate undefined symbol in symbol table for external function call 2019-11-25 15:02:01 +00:00
aix-weak-undef-func-call.ll [XCOFF][AIX] Check linkage on the function, and two fixes for comments 2019-11-26 16:09:31 +00:00
aix-xcoff-data.ll [PowerPC][XCOFF] Add support for zero initialized global values. 2019-11-11 18:52:10 -05:00
aix-xcoff-lcomm.ll [XCOFF][AIX] Differentiate usage of label symbol and csect symbol 2019-11-08 09:30:10 -05:00
aix-xcoff-mergeable-str.ll [AIX][XCOFF] Add support for generating assembly code for one-byte mergable strings 2019-11-20 11:26:49 -05:00
aix-xcoff-rodata.ll [XCOFF][AIX] Read-only data section object file generation 2019-11-22 15:49:37 +00:00
aix_fpr_param.ll [AIX] Add call lowering for parameters that could pass onto FPRs 2019-08-14 14:13:11 +00:00
aix_gpr_param.ll [AIX] Implement function descriptor on SDAG 2019-06-06 19:13:36 +00:00
alias.ll
align.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
allocate-r0.ll
altivec-ord.ll
and-branch.ll
and-elim.ll
and-imm.ll
and_add.ll
and_sext.ll
and_sra.ll
andc.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
anon_aggr.ll RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
anyext_srl.ll
arr-fp-arg-no-copy.ll
ashr-neg1.ll
asm-Zy.ll
asm-constraints.ll
asm-dialect.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
asm-printer-topological-order.ll Use .set instead of = when printing assignment in assembly output 2018-03-27 16:44:41 +00:00
asym-regclass-copy.ll
atomic-1.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
atomic-2.ll [PowerPC] Fix assert from machine verify pass that atomic pseudo expanding causes mismatched register class 2018-12-28 02:12:55 +00:00
atomic-minmax.ll [PowerPC] Fix assert from machine verify pass that atomic pseudo expanding causes mismatched register class 2018-12-28 02:12:55 +00:00
atomics-constant.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
atomics-fences.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
atomics-indexed.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
atomics-regression.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
atomics.ll [PowerPC] Fix assert from machine verify pass that atomic pseudo expanding causes mismatched register class 2018-12-28 02:12:55 +00:00
available-externally.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
bdzlr.ll
big-endian-actual-args.ll
big-endian-call-result.ll
big-endian-formal-args.ll
big-endian-store-forward.ll [DAG] Fix Big Endian in Load-Store forwarding 2018-10-11 18:28:59 +00:00
bitcast-peephole.mir [PeepholeOptimizer] Don't assume bitcast def always has input 2019-08-19 14:19:04 +00:00
bitcasts-direct-move.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
bitfieldinsert.ll [PowerPC] handle ISD:TRUNCATE in BitPermutationSelector 2018-12-28 08:00:39 +00:00
block-placement-1.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
block-placement.mir Revert [CodeGen] Do the Simple Early Return in block-placement pass to optimize the blocks 2019-10-04 22:24:21 +00:00
blockaddress.ll
bool-math.ll Teach the DAGCombine to fold this pattern(c1 and c2 is constant). 2019-06-26 05:12:53 +00:00
bperm.ll [PowerPC] avoid unprofitable Repl32 flag in BitPermutationSelector 2018-06-07 13:21:14 +00:00
branch-hint.ll
branch-opt.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
branch_coalesce.ll [PowerPC] Add a peephole post RA to transform the inst that fed by add 2018-08-20 02:52:55 +00:00
branch_selector.ll [PPC] Adjust the computed branch offset for the possible shorter distance 2019-03-06 18:22:22 +00:00
brcond.ll [PowerPC] Turn on CR-Logical reducer pass 2019-10-22 12:20:38 +00:00
bswap-load-store.ll
bswap64.ll [PowerPC][NFC] Fix typos in triples 2019-05-14 03:11:24 +00:00
build-vector-allones.ll [PowerPC] Use xxleqv to set all one vector IMM(-1). 2019-08-15 14:32:51 +00:00
build-vector-tests.ll [PowerPC] Remove allow-deprecated-dag-overlap and fix broken tests 2019-11-12 15:18:54 +00:00
buildvec_canonicalize.ll
builtins-ppc-elf2-abi.ll
builtins-ppc-p8vector.ll
builtins-ppc-p9-f128.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
bv-pres-v8i1.ll
bv-widen-undef.ll
byval-agg-info.ll [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
byval-aliased.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
calls.ll
can-lower-ret.ll
cannonicalize-vector-shifts.ll
cc.ll
change-no-infs.ll
cmp-cmp.ll
cmp_elimination.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
cmpb-ppc32.ll
cmpb.ll
coalesce-ext.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
code-align.ll [NFC][PowerPC] Use -check-prefixes to simplify the check in code-align.ll 2019-04-30 03:39:05 +00:00
codemodel.ll [Targets] Fixup incorrect targets in codemodel tests 2018-12-10 20:55:34 +00:00
coldcc.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
coldcc2.ll Re-commit : [PowerPC] Add handling for ColdCC calling convention and a pass to mark 2018-01-30 16:17:22 +00:00
collapse-rotates.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
combine-fneg.ll [PowerPC] Adjust the naming and operand order of fnmsub patterns 2019-10-03 19:36:42 +00:00
combine-setcc.ll [PowerPC] Fix some missed optimization opportunities in combineSetCC 2018-10-26 06:48:53 +00:00
combine-sext-and-shl-after-isel.ll [PowerPC][Peephole] Combine extsw and sldi after instruction selection 2019-07-09 02:55:08 +00:00
combine-to-pre-index-store-crash.ll
compare-duplicate.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
compare-simm.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
complex-return.ll
constant-combines.ll Disable big-endian constant store merges from rL354676. 2019-02-22 16:20:34 +00:00
constants-i64.ll
constants.ll
convert-rr-to-ri-instr-add.mir [PowerPC] fix killed/dead flag after convert x-form to d-form tranformation. 2019-03-05 04:56:54 +00:00
convert-rr-to-ri-instrs-R0-special-handling.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
convert-rr-to-ri-instrs-kill-flag.mir [PowerPC] fix killed/dead flag after convert x-form to d-form tranformation. 2019-03-05 04:56:54 +00:00
convert-rr-to-ri-instrs-out-of-range.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
convert-rr-to-ri-instrs.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
convert-rr-to-ri-p9-vector.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
copysignl.ll
cr-spills.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
cr1eq-no-extra-moves.ll
cr1eq.ll
cr_spilling.ll
crash.ll [PowerPC] Fix the assert of combineBVOfConsecutiveLoads when element num is 1 2018-09-20 03:09:15 +00:00
crbit-asm-disabled.ll
crbit-asm.ll
crbits.ll [PowerPC] Recommit r314244 with refactoring and off by default 2017-11-30 13:39:10 +00:00
crsave.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
crypto_bifs.ll
csr-save-restore-order.ll [MachineScheduler] checkResourceLimit boundary condition update 2019-06-07 14:54:47 +00:00
csr-split.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
ctr-cleanup.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
ctr-loop-tls-const.ll
ctr-minmaxnum.ll [PowerPC] Emit scalar fp min/max instructions 2019-10-28 19:13:33 -05:00
ctrloop-asm.ll
ctrloop-cpsgn.ll
ctrloop-fp64.ll
ctrloop-i64.ll
ctrloop-i128.ll
ctrloop-intrin.ll [CodeGen] Generic Hardware Loop Support 2019-06-07 07:35:30 +00:00
ctrloop-large-ec.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
ctrloop-le.ll [PowerPC] exclude more icmps in LSR which is converted in later hardware loop pass 2019-07-25 01:22:08 +00:00
ctrloop-lt.ll [PowerPC] exclude more icmps in LSR which is converted in later hardware loop pass 2019-07-25 01:22:08 +00:00
ctrloop-ne.ll [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop. 2019-07-03 01:49:03 +00:00
ctrloop-reg.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
ctrloop-s000.ll
ctrloop-sh.ll
ctrloop-shortLoops.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
ctrloop-sums.ll
ctrloop-udivti3.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
ctrloops-hot-exit.ll [PowerPC] Check hot loop exit edge in PPCCTRLoops 2018-02-05 12:25:29 +00:00
ctrloops-softfloat.ll
ctrloops.ll
cttz.ll
cxx_tlscc64.ll [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
darwin-labels.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
dbg.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
dcbf.ll Add __builtin_dcbf support for PPC 2019-04-29 23:25:33 +00:00
dcbt-sched.ll
debuginfo-split-int.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
debuginfo-stackarg.ll [DebugInfo] Remove some users of DBG_VALUEs IsIndirect field 2019-10-15 10:46:24 +00:00
delete-node.ll
dform-adjust.ll [PowerPC][NFC] Precomit test case for upcoming patch 2019-07-21 21:03:45 +00:00
direct-move-profit.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
div-2.ll
div-e-32.ll
div-e-all.ll
duplicate-returns-for-tailcall.ll [PowerPC] fix a bug in TCO eligibility check 2017-12-30 08:09:04 +00:00
dyn-alloca-aligned.ll
dyn-alloca-offset.ll
e500-1.ll
early-ret.ll
early-ret2.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
ec-input.ll
eh-dwarf-cfa.ll
elf-common.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
eliminate-compare-of-copy.ll [PowerPC] Look through copies for compare elimination 2019-06-03 19:09:15 +00:00
empty-functions.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
emptystruct.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
emutls_generic.ll [TLS] use emulated TLS if the target supports only this mode 2018-02-28 17:48:55 +00:00
eqv-andc-orc-nor.ll
expand-contiguous-isel.ll [PowerPC] Partially enable the ISEL expansion pass. 2017-12-11 20:42:37 +00:00
expand-foldable-isel.ll [MBP] Move a latch block with conditional exit and multi predecessors to top of loop 2019-06-14 23:08:59 +00:00
expand-isel-1.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-2.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-3.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-4.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-5.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-6.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-7.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-8.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-9.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel-10.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
expand-isel.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
ext-bool-trunc-repl.ll
extra-toc-reg-deps.ll Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant stores 2018-03-23 15:28:15 +00:00
extract-and-store.ll [MachineScheduler] Enable AA in PostRA Machine scheduler 2019-11-05 11:58:50 +00:00
extsh.ll
extswsli.ll [PowerPC] Recommit r340016 after fixing the reported issue 2018-08-27 11:20:27 +00:00
f32-to-i64.ll
f128-aggregates.ll [MachineScheduler] Enable AA in PostRA Machine scheduler 2019-11-05 11:58:50 +00:00
f128-arith.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
f128-bitcast.ll [Power9] Add __float128 support in the backend for bitcast to a i128 2018-10-23 17:11:36 +00:00
f128-compare.ll [PowerPC] [NFC] Update __float128 tests 2018-07-12 20:18:57 +00:00
f128-conv.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
f128-fma.ll [PowerPC] Adjust the naming and operand order of fnmsub patterns 2019-10-03 19:36:42 +00:00
f128-passByValue.ll [MachineScheduler] checkResourceLimit boundary condition update 2019-06-07 14:54:47 +00:00
f128-rounding.ll [PowerPC] [NFC] Update __float128 tests 2018-07-12 20:18:57 +00:00
f128-truncateNconv.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
f128-vecExtractNconv.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
fabs.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
fast-isel-GEP-coalesce.ll
fast-isel-binary.ll
fast-isel-br-const.ll
fast-isel-call.ll [NFC][PowerPC] Fast-isel VSX support test 2019-09-19 18:18:18 +00:00
fast-isel-cmp-imm.ll [PowerPC] Enhance the fast selection of cmp instruction and clean up related asserts 2019-01-25 07:24:59 +00:00
fast-isel-const.ll [NFC][PowerPC] Fast-isel VSX support test 2019-09-19 18:18:18 +00:00
fast-isel-conversion-p5.ll
fast-isel-conversion.ll Introduce codegen for the Signal Processing Engine 2018-07-18 04:25:10 +00:00
fast-isel-crash.ll
fast-isel-ext.ll
fast-isel-fcmp-nan.ll Recommit "[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel" 2019-01-10 06:20:14 +00:00
fast-isel-fold.ll
fast-isel-fpconv.ll
fast-isel-i64offset.ll
fast-isel-icmp-split.ll
fast-isel-indirectbr.ll
fast-isel-load-store-vsx.ll [PowerPC] Add a peephole post RA to transform the inst that fed by add 2018-08-20 02:52:55 +00:00
fast-isel-load-store.ll [NFC][PowerPC] Fast-isel VSX support test 2019-09-19 18:18:18 +00:00
fast-isel-redefinition.ll
fast-isel-ret.ll [NFC][PowerPC] Fast-isel VSX support test 2019-09-19 18:18:18 +00:00
fast-isel-rsp.ll [PowerPC] [PowerPC] Enhance the fast selection of fptoi & fptrunc instruction and clean up related asserts 2019-02-25 02:46:16 +00:00
fast-isel-shifter.ll
fastcc_stacksize.ll [PowerPC] Reduce stack frame for fastcc functions by only allocating parameter save area when needed 2018-02-20 15:09:45 +00:00
fastisel-gep-promote-before-add.ll
fcpsgn.ll
fdiv-combine.ll
fdiv.ll [PowerPC] Add missing pattern for VSX Scalar Negative Multiply-Subtract Single Precision 2019-09-26 15:11:33 +00:00
float-asmprint.ll
float-load-store-pair.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
float-logic-ops.ll [PowerPC][NFC] Fix typos in triples 2019-05-14 03:11:24 +00:00
float-to-int.ll [PowerPC] Add a peephole post RA to transform the inst that fed by add 2018-08-20 02:52:55 +00:00
float-vector-gather.ll [PowerPC] Improve float vector gather codegen 2019-11-18 15:53:32 -06:00
floatPSA.ll
flt-preinc.ll
fma-aggr-FMF.ll Utilize new SDNode flag functionality to expand current support for fma 2018-06-16 00:03:06 +00:00
fma-assoc.ll [PowerPC] Adjust the naming and operand order of fnmsub patterns 2019-10-03 19:36:42 +00:00
fma-ext.ll [PowerPC] Adjust the naming and operand order of fnmsub patterns 2019-10-03 19:36:42 +00:00
fma-mutate-duplicate-vreg.ll
fma-mutate-register-constraint.ll
fma-mutate.ll Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control 2019-07-31 21:57:28 +00:00
fma.ll
fmaxnum.ll
fmf-propagation.ll Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control 2019-07-31 21:57:28 +00:00
fminnum.ll
fnabs.ll
fneg.ll [DAGCombiner] cancel fnegs from multiplied operands of FMA 2019-08-27 15:17:46 +00:00
fold-frame-offset-using-rr.mir [PowerPC] [Peephole] fold frame offset by using index form to save add. 2019-10-25 04:13:30 -04:00
fold-li.ll
fold-rlwinm-1.ll Revert "[PowerPC] combine rlwinm+rlwinm to rlwinm" 2019-11-24 22:46:26 -05:00
fold-zero.ll
fp-branch.ll
fp-int-conversions-direct-moves.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
fp-int-fp.ll
fp-int128-fp-combine.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
fp-intrinsics-fptosi-legal.ll [FPEnv] Strict FP tests should use the requisite function attributes. 2019-10-04 17:03:46 +00:00
fp-splat.ll
fp-to-int-ext.ll
fp-to-int-to-fp.ll [DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros 2018-06-27 18:16:40 +00:00
fp2int2fp-ppcfp128.ll
fp64-to-int16.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
fp128-bitcast-after-operation.ll [PowerPC] Add a peephole post RA to transform the inst that fed by add 2018-08-20 02:52:55 +00:00
fp128-libcalls.ll [PowerPC] Support fp128 libcalls 2019-07-15 05:02:32 +00:00
fp_to_uint.ll
fpcopy.ll
frame-size.ll
frameaddr.ll
frounds.ll
fsel.ll
fsl-e500mc.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
fsl-e5500.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
fsqrt.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
fsub-fneg.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
ftrunc-legalize.ll [SelectionDAG] soften assertion when legalizing narrow vector FP ops 2019-05-25 13:48:07 +00:00
ftrunc-vec.ll [DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros 2018-06-27 18:16:40 +00:00
func-addr-consts.ll Revert "[PowerPC] Make no-PIC default to match GCC - LLVM" 2018-11-16 19:24:23 +00:00
func-addr.ll
funnel-shift-rot.ll [SelectionDAG] try harder to convert funnel shift to rotate 2018-08-09 17:26:22 +00:00
funnel-shift.ll [PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8 2018-09-03 03:14:29 +00:00
glob-comp-aa-crash.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
gpr-vsr-spill.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
hello-reloc.s [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
hello.ll
hidden-vis-2.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
hidden-vis.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
hoist-logic.ll [DAGCombiner] don't hoist logic op if operands have other uses, part 2 2018-12-06 19:18:56 +00:00
htm-ttest.ll [PowerPC][HTM] Fix impossible reg-to-reg copy assert with ttest builtin 2019-07-16 20:24:33 +00:00
htm.ll [PowerPC][HTM] Fix disassembling buffer overflow for tabortdc and others 2019-06-27 14:11:31 +00:00
i1-ext-fold.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
i1-to-double.ll [Power9] Code Cleanup - Remove needsAggressiveScheduling() 2018-07-19 19:34:18 +00:00
i32-to-float.ll
i64-to-float.ll [PowerPC] Add a peephole post RA to transform the inst that fed by add 2018-08-20 02:52:55 +00:00
i64_fp.ll
i64_fp_round.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
i128-and-beyond.ll
ia-mem-r0.ll
ia-neg-const.ll
iabs.ll
ifcvt-diamond-ret.mir [PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC 2019-09-13 14:18:36 +00:00
ifcvt-forked-bug-2016-08-08.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
ifcvt.ll
illegal-element-type.ll
in-asm-f64-reg.ll
inc-of-add.ll [PowerPC] Remove the SPE4RC register class and instead add f32 to the GPRC register class. 2019-09-12 22:07:35 +00:00
indexed-load.ll
indirect-hidden.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
indirectbr.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
inline-asm-i-constraint-i1.ll [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
inline-asm-multilevel-gep.ll [TargetLowering] Handle multi depth GEPs w/ inline asm constraints 2019-05-13 17:27:44 +00:00
inline-asm-s-modifier.ll
inline-asm-scalar-to-vector-error.ll
inline-asm-vsx-clobbers.ll [PowerPC] Fix VSX clobbers of CSR registers 2019-11-25 11:41:34 -06:00
inlineasm-copy.ll
inlineasm-extendedmne.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
inlineasm-i64-reg.ll
inlineasm-output-template.ll [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00
inlineasm-vsx-reg.ll [PowerPC] Support constraint code "ww" 2019-07-04 04:44:42 +00:00
instr-properties.ll [PowerPC] Fix the incorrect 'RM' flag set on load/store instr 2019-11-06 02:46:37 +00:00
int-fp-conv-0.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
int-fp-conv-1.ll
inverted-bool-compares.ll
isel-rc-nox0.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
isel.ll
ispositive.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
itofp128.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
jaggedstructs.ll [CodeGen] Allow mempcy/memset to generate small overlapping stores. 2018-12-13 09:56:19 +00:00
jump-tables-collapse-rotate.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
knowCRBitSpill.ll [PowerPC] Remove redundant CRSET/CRUNSET in custom lowering of known CR bit spills 2019-11-08 15:32:31 +00:00
larger-than-red-zone.ll [PowerPC][NFC] Added tests for prologue and epilogue code gen. 2019-02-13 23:37:23 +00:00
lbz-from-ld-shift.ll
lbzux.ll
ld-st-upd.ll
ldtoc-inv.ll
legalize-vaarg.ll [PowerPC] Implement the areMemAccessesTriviallyDisjoint hook 2019-07-02 03:28:52 +00:00
lha.ll
licm-remat.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
licm-tocReg.ll [NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming convention 2019-07-22 19:55:33 +00:00
lit.local.cfg [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
livephysregs.mir Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
llrint-conv.ll [CodeGen] Add lrint/llrint builtins 2019-05-28 20:47:44 +00:00
llround-conv.ll [CodeGen] Add lround/llround builtins 2019-05-16 13:15:27 +00:00
load-and-splat.ll [PowerPC] Exploit single instruction load-and-splat for word and doubleword 2019-09-17 16:45:20 +00:00
load-constant-addr.ll
load-shift-combine.ll
load-shuffle-and-shuffle-store.ll recommit:[PowerPC] Eliminate loads/swap feeding swap/store for vector type by using big-endian load/store 2019-08-01 05:26:02 +00:00
load-two-flts.ll [PowerPC] Return true in enableMultipleCopyHints(). 2018-01-31 09:26:51 +00:00
load-v4i8-improved.ll [PowerPC] Improve codegen for vector loads using scalar_to_vector 2018-08-08 15:20:43 +00:00
logic-ops-on-compares.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
long-compare.ll
longcall.ll
longdbl-truncate.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
loop-align.ll [PowerPC] Set the innermost hot loop to align 32 bytes 2019-06-15 15:10:24 +00:00
loop-data-prefetch-inner.ll
loop-data-prefetch.ll
loop-hoist-toc-save.ll Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant stores 2018-03-23 15:28:15 +00:00
loop-instr-form-prepare.ll [PowerPC] extend PPCPreIncPrep Pass for ds/dq form 2019-11-17 21:38:43 -05:00
loop-prep-all.ll
lower-globaladdr32-aix-asm.ll [AIX] TOC pseudo expansion for 64bit large + 64bit small + 32bit large models 2019-10-17 13:20:25 +00:00
lower-globaladdr32-aix.ll [AIX]Lowering global address for 32/64bit small/large code models 2019-08-13 20:29:01 +00:00
lower-globaladdr64-aix-asm.ll [AIX] TOC pseudo expansion for 64bit large + 64bit small + 32bit large models 2019-10-17 13:20:25 +00:00
lower-globaladdr64-aix.ll [AIX]Lowering global address for 32/64bit small/large code models 2019-08-13 20:29:01 +00:00
lower-massv-attr.ll Lower generic MASSV entries to PowerPC subtarget-specific entries 2019-11-04 17:17:24 +00:00
lower-massv.ll Lower generic MASSV entries to PowerPC subtarget-specific entries 2019-11-04 17:17:24 +00:00
lrint-conv.ll [CodeGen] Add lrint/llrint builtins 2019-05-28 20:47:44 +00:00
lround-conv.ll [CodeGen] Add lround/llround builtins 2019-05-16 13:15:27 +00:00
lsa.ll [Power9] Code Cleanup - Remove needsAggressiveScheduling() 2018-07-19 19:34:18 +00:00
lsr-ctrloop.ll [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop. 2019-07-03 01:49:03 +00:00
lsr-postinc-pos.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
lxv-aligned-stack-slots.ll [PowerPC] Add a peephole post RA to transform the inst that fed by add 2018-08-20 02:52:55 +00:00
lxvw4x-bug.ll
machine-backward-cp.mir Test commit via git. 2019-10-25 01:36:55 +00:00
machine-combiner.ll [PowerPC] Remove allow-deprecated-dag-overlap and fix broken tests 2019-11-12 15:18:54 +00:00
machine-pre.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
maddld.ll [PowerPC] More precise exploitation of P9 maddld instruction when operands are constant 2019-04-12 05:21:31 +00:00
mask64.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
mature-mc-support.ll Run these tests, the errors were old and not valid anymore. 2018-02-16 23:02:28 +00:00
mc-instrlat.ll
mcm-1.ll
mcm-2.ll
mcm-3.ll
mcm-4.ll [PowerPC] Add a peephole post RA to transform the inst that fed by add 2018-08-20 02:52:55 +00:00
mcm-5.ll
mcm-6.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
mcm-7.ll
mcm-8.ll
mcm-9.ll
mcm-10.ll
mcm-11.ll
mcm-12.ll [PowerPC] Add a peephole post RA to transform the inst that fed by add 2018-08-20 02:52:55 +00:00
mcm-13.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
mcm-default.ll
mcm-obj-2.ll
mcm-obj.ll
mcount-insertion.ll Rename CountingFunctionInserter and use for both mcount and cygprofile calls, before and after inlining 2017-11-14 21:09:45 +00:00
mem-rr-addr-mode.ll
memCmpUsedInZeroEqualityComparison.ll Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."" 2019-09-10 10:39:09 +00:00
mem_update.ll
memcmp-mergeexpand.ll Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."" 2019-09-10 10:39:09 +00:00
memcmp.ll Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."" 2019-09-10 10:39:09 +00:00
memcmpIR.ll [X86] Make memcmp vector lowering handle arbitrary expansions 2019-10-30 09:12:57 +02:00
memcpy-vec.ll [PowerPC] Remove allow-deprecated-dag-overlap and fix broken tests 2019-11-12 15:18:54 +00:00
memcpy_dereferenceable.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
memset-nc-le.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
memset-nc.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
merge-st-chain-op.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
merge_stores_dereferenceable.ll
mftb.ll
mi-scheduling-lhs.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
misched-inorder-latency.ll
misched.ll
mtvsrdd.ll
mul-const-i64.ll [PowerPC] Strength reduction of multiply by a constant by shift and add/sub in place 2019-03-29 03:08:39 +00:00
mul-const-vector.ll [PowerPC] Strength reduction of multiply by a constant by shift and add/sub in place 2019-03-29 03:08:39 +00:00
mul-const.ll [PowerPC] Strength reduction of multiply by a constant by shift and add/sub in place 2019-03-29 03:08:39 +00:00
mul-with-overflow.ll
mulhs.ll
mulld.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
mult-alt-generic-powerpc.ll
mult-alt-generic-powerpc64.ll
multi-return.ll
named-reg-alloc-r0.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
named-reg-alloc-r1-64.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
named-reg-alloc-r1.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
named-reg-alloc-r2-64.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
named-reg-alloc-r2.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
named-reg-alloc-r13-64.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
named-reg-alloc-r13.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
neg.ll
negate-i1.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
negctr.ll [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop. 2019-07-03 01:49:03 +00:00
no-ctr-loop-if-exit-in-nested-loop.ll [PowerPC] No CTR loop if the candidate exiting block is in a different loop 2018-05-02 22:56:04 +00:00
no-dead-strip.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
no-dup-of-bdnz.ll [PowerPC] Mark the BDNZ intrinsic as NoDuplicate 2018-04-17 13:07:01 +00:00
no-dup-spill-fp.ll
no-ext-with-count-zeros.ll
no-extra-fp-conv-ldst.ll [DAGCombiner] restrict (float)((int) f) --> ftrunc with no-signed-zeros 2018-06-27 18:16:40 +00:00
no-pref-jumps.ll
no-rlwimi-trivial-commute.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
noPermuteFormasking.ll [PowerPC][NFC] Fix typos in triples 2019-05-14 03:11:24 +00:00
non-simple-args-intrin.ll [PowerPC] Can not assume an intrinsic argument is a simple type. 2018-01-09 03:03:41 +00:00
not-fixed-frame-object.ll [PowerPC] Move the stack pointer update instruction later in the prologue and earlier in the epilogue. 2019-02-28 12:23:28 +00:00
novrsave.ll
opt-cmp-inst-cr0-live.ll [CodeGen] Don't omit any redundant information in -debug output 2018-02-26 15:23:42 +00:00
opt-li-add-to-addi.ll Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-27 16:59:10 +00:00
opt-sub-inst-cr0-live.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
optcmp.ll [PowerPC] Recommit r314244 with refactoring and off by default 2017-11-30 13:39:10 +00:00
optimize-andiso.ll Set useful flags for vector imm setting instructions 2019-03-12 18:27:09 +00:00
optnone-crbits-i1-ret.ll
or-addressing-mode.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
ori_imm32.ll
p8-isel-sched.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
p8-scalar_vector_conversions.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
p8altivec-shuffles-pred.ll
p9-dform-load-alignment.ll [PowerPC] Folding XForm to DForm loads requires alignment for some DForm loads. 2018-10-01 20:16:27 +00:00
p9-vector-compares-and-counts.ll
p9-vinsert-vextract.ll [Power9] Fix the resource list for the COPY instruction. 2018-03-27 17:51:53 +00:00
p9-xxinsertw-xxextractuw.ll [PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st. 2017-11-20 14:38:30 +00:00
p9_copy_fp.ll [PowerPC] Emit xscpsgndp instead of xxlor when copying floating point scalar registers for P9 2018-08-24 20:00:24 +00:00
peephole-align.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
peephole-miscompile-extswsli.mir [PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC 2019-09-13 14:18:36 +00:00
pie.ll
pip-inner.ll
popcnt-zext.ll [DAGCombiner] widen any_ext of popcount based on target support 2019-10-28 10:07:12 -04:00
popcnt.ll [DAGCombiner] widen any_ext of popcount based on target support 2019-10-28 10:07:12 -04:00
post-ra-ec.ll
pow.75.ll [DAGCombine] Optimize pow(X, 0.75) to sqrt(X) * sqrt(sqrt(X)) 2019-02-08 19:50:58 +00:00
power9-moves-and-splats.ll [PowerPC] Exploit single instruction load-and-splat for word and doubleword 2019-09-17 16:45:20 +00:00
ppc-crbits-onoff.ll [PowerPC] Recommit r314244 with refactoring and off by default 2017-11-30 13:39:10 +00:00
ppc-ctr-dead-code.ll
ppc-empty-fs.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
ppc-label.ll [PowerPC] Fix label address calculation for ppc32 2018-06-19 13:07:40 +00:00
ppc-label2.ll [PowerPC] Fix label address calculation for ppc64 2018-09-17 11:03:40 +00:00
ppc-passname-assert.ll [PowerPC] Add initialization for some ppc passes 2019-04-12 09:59:40 +00:00
ppc-passname.ll [CodeGen] Generic Hardware Loop Support 2019-06-07 07:35:30 +00:00
ppc-prologue.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
ppc-redzone-alignment-bug.ll Revert "[PowerPC] Manually schedule the prologue and epilogue" 2018-01-12 13:12:49 +00:00
ppc-shrink-wrapping.ll [PowerPC] Move the stack pointer update instruction later in the prologue and earlier in the epilogue. 2019-02-28 12:23:28 +00:00
ppc-vaarg-agg.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
ppc32-align-long-double-sf.ll [CodeGen] Always use `printReg` to print registers in both MIR and debug 2017-11-30 16:12:24 +00:00
ppc32-constant-BE-ppcf128.ll
ppc32-cyclecounter.ll
ppc32-i1-stack-arguments-abi-bug.ll [PowerPC] Fix the calling convention for i1 arguments on PPC32 2018-09-14 21:26:05 +00:00
ppc32-i1-vaarg.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
ppc32-lshrti3.ll
ppc32-nest.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
ppc32-pic-large.ll Default to Secure PLT on PPC for musl libc. 2019-06-28 19:48:31 +00:00
ppc32-pic.ll [PPC32] Support PLT calls for -msecure-plt -fpic 2019-06-25 15:56:32 +00:00
ppc32-secure-plt-tls.ll [PowerPC] Add secure plt support for TLS symbols 2019-03-06 15:00:10 +00:00
ppc32-secure-plt-tls2.ll [PPC32] Support PLT calls for -msecure-plt -fpic 2019-06-25 15:56:32 +00:00
ppc32-skip-regs.ll [PowerPC] Implement the areMemAccessesTriviallyDisjoint hook 2019-07-02 03:28:52 +00:00
ppc32-vacopy.ll [Power9] Code Cleanup - Remove needsAggressiveScheduling() 2018-07-19 19:34:18 +00:00
ppc64-32bit-addic.ll
ppc64-P9-mod.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
ppc64-P9-setb.ll [DAGCombiner][X86][PowerPC] Teach visitSIGN_EXTEND_INREG to fold (sext_in_reg (aext/sext x)) -> (sext x) when x has more than 1 sign bit and the sext_inreg is from one of them. 2019-01-02 17:58:27 +00:00
ppc64-P9-vabsd.ll [PowerPC]Exploit P9 vabsdu for unsigned vselect patterns 2018-12-19 03:04:07 +00:00
ppc64-abi-extend.ll
ppc64-align-long-double.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
ppc64-altivec-abi.ll
ppc64-anyregcc-crash.ll RegAlloc: try to fail more gracefully when out of registers 2019-05-15 17:29:58 +00:00
ppc64-anyregcc.ll [PowerPC] Fix machine verify pass error for PATCHPOINT pseudo instruction that bad machine code 2018-12-30 15:13:51 +00:00
ppc64-blnop.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
ppc64-byval-align.ll [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. 2019-03-13 17:07:09 +00:00
ppc64-calls.ll
ppc64-crash.ll
ppc64-cyclecounter.ll
ppc64-elf-abi.ll [PPC64] Parse -elfv1 -elfv2 when specified on target triple 2019-05-22 07:29:59 +00:00
ppc64-fastcc-fast-isel.ll
ppc64-fastcc.ll
ppc64-func-desc-hoist.ll Re-commit: [MachineLICM] Add functions to MachineLICM to hoist invariant stores 2018-03-23 15:28:15 +00:00
ppc64-gep-opt.ll [Power9] Code Cleanup - Remove needsAggressiveScheduling() 2018-07-19 19:34:18 +00:00
ppc64-get-cache-line-size.ll
ppc64-i128-abi.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
ppc64-icbt-pwr7.ll
ppc64-icbt-pwr8.ll
ppc64-linux-func-size.ll
ppc64-nest.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
ppc64-nonfunc-calls.ll
ppc64-patchpoint.ll [PowerPC] Fix machine verify pass error for PATCHPOINT pseudo instruction that bad machine code 2018-12-30 15:13:51 +00:00
ppc64-pre-inc-no-extra-phi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
ppc64-prefetch.ll
ppc64-r2-alloc.ll
ppc64-sibcall-shrinkwrap.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
ppc64-sibcall.ll [PowerPC] fix a bug in TCO eligibility check 2017-12-30 08:09:04 +00:00
ppc64-smallarg.ll [PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store 2019-07-23 03:34:40 +00:00
ppc64-stackmap-nops.ll
ppc64-stackmap.ll [PowerPC] Fix machine verify pass error for PATCHPOINT pseudo instruction that bad machine code 2018-12-30 15:13:51 +00:00
ppc64-toc.ll
ppc64-vaarg-int.ll
ppc64-zext.ll
ppc64le-aggregates.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
ppc64le-calls.ll
ppc64le-crsave.ll
ppc64le-localentry-large.ll
ppc64le-localentry.ll
ppc64le-smallarg.ll [PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store 2019-07-23 03:34:40 +00:00
ppc440-fp-basic.ll
ppc440-msync.ll
ppcf128-1-opt.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
ppcf128-1.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
ppcf128-2.ll
ppcf128-3.ll
ppcf128-4.ll
ppcf128-endian.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
ppcf128sf.ll
ppcsoftops.ll
pr3711_widen_bit.ll
pr12757.ll
pr13641.ll
pr13891.ll
pr15031.ll
pr15359.ll [llvm-readobj] Change -t to --symbols in tests. NFC 2019-05-01 09:28:24 +00:00
pr15630.ll
pr15632.ll [PowerPC] preserve test intent by removing undef 2018-05-16 22:48:48 +00:00
pr16556-2.ll
pr16556.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
pr16573.ll
pr17168.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
pr17354.ll [IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format 2019-05-15 02:35:32 +00:00
pr18663-2.ll
pr18663.ll
pr20442.ll
pr22711.ll
pr24216.ll
pr24546.ll Adjust documentation for git migration. 2019-01-29 16:37:27 +00:00
pr24636.ll
pr25080.ll [PowerPC] Fix ICE when truncating some vectors 2019-08-13 07:53:29 +00:00
pr25157-peephole.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
pr25157.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
pr26180.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
pr26193.ll
pr26356.ll
pr26378.ll
pr26381.ll
pr26617.ll
pr26690.ll
pr27078.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
pr27350.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
pr28130.ll
pr28630.ll
pr30451.ll
pr30640.ll
pr30663.ll
pr30715.ll [PowerPC] Remove the match pattern in the definition of LXSDX/STXSDX 2018-05-24 03:20:28 +00:00
pr31144.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
pr32063.ll
pr32140.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
pr33093.ll [PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8 2018-09-03 03:14:29 +00:00
pr33547.ll [PowerPC] Disable shrink-wrapping when getting PC address through the LR 2018-02-23 23:08:34 +00:00
pr35402.ll [PPC] Avoid non-simple MVT in STBRX optimization 2018-03-15 17:49:12 +00:00
pr35688.ll Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg 2019-04-10 18:00:41 +00:00
pr36068.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
pr36292.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
pr38087.ll [PowerPC] make tests immune to improved undef handling 2019-09-28 13:34:53 +00:00
pr38899-split-register-at-spill.mir [LDV][RAGreedy] Inform LiveDebugVariables about new VRegs added by InlineSpiller 2019-11-01 16:25:32 +01:00
pr39478.ll [DAGCombine] Prune unnused nodes. 2019-03-29 17:35:56 +00:00
pr39815.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
pr40922.ll [DAGCombiner] Do not generate ISD::ADDE node if adde is not legal for the target when combine ISD::TRUNC node 2019-04-30 03:01:14 +00:00
pr41177.ll [PowerPC] Fix wrong ElemSIze when calling isConsecutiveLS() 2019-04-18 07:24:15 +00:00
pr42492.ll [PowerPC] Turn on CR-Logical reducer pass 2019-10-22 12:20:38 +00:00
pr43527.ll [PowerPC] Do not emit HW loop if the body contains calls to lrint/lround 2019-10-28 17:23:08 -05:00
pre-inc-disable.ll [PowerPC][NFC] Regenerate test using script 2019-07-21 18:42:29 +00:00
preemption.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
preinc-ld-sel-crash.ll
preincprep-i64-check.ll [PowerPC] Don't make it as pre-inc candidate if displacement isn't 4's multiple for i64 pre-inc load/store 2018-07-02 05:46:09 +00:00
preincprep-invoke.ll
preincprep-nontrans-crash.ll
private.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
prolog_vec_spills.mir [PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC 2019-09-13 14:18:36 +00:00
pwr3-6x.ll
pwr7-gt-nop.ll [PowerPC] Replace float load/store pair with integer load/store pair when it's only used in load/store 2019-07-23 03:34:40 +00:00
pzero-fp-xored.ll
qpx-bv-sint.ll [PowerPC] fix tests to be independent of FP undef 2018-03-10 16:14:05 +00:00
qpx-bv.ll
qpx-func-clobber.ll
qpx-load-splat.ll [PowerPC] Exploit single instruction load-and-splat for word and doubleword 2019-09-17 16:45:20 +00:00
qpx-load.ll
qpx-recipest.ll [DAGCombiner] Improve division estimation of floating points. 2019-09-12 07:51:24 +00:00
qpx-rounding-ops.ll
qpx-s-load.ll
qpx-s-sel.ll
qpx-s-store.ll
qpx-sel.ll
qpx-split-vsetcc.ll
qpx-store.ll
qpx-unal-cons-lds.ll
qpx-unalperm.ll
quadint-return.ll Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
r31.ll
recipest.ll [DAGCombiner] Improve division estimation of floating points. 2019-09-12 07:51:24 +00:00
reduce_cr.ll [PPC] Correctly adjust branch probability in PPCReduceCRLogicals 2019-05-31 16:11:17 +00:00
reduce_scalarization.ll [PowerPC] custom lower `v2f64 fpext v2f32` 2019-05-10 14:04:06 +00:00
reduce_scalarization02.ll [PowerPC] Cust lower fpext v2f32 to v2f64 from extract_subvector v4f32 2019-09-16 20:04:15 +00:00
redundant-copy-after-tail-dup.ll Revert "[MachineCopyPropagation] Remove redundant copies after TailDup via machine-cp" 2019-09-09 16:46:45 +00:00
reg-coalesce-simple.ll
reg-names.ll First step towards more human-friendly PPC assembler output: 2017-11-29 23:05:56 +00:00
reg-scavenging.ll [PowerPC][NFC] Added tests for prologue and epilogue code gen. 2019-02-13 23:37:23 +00:00
reloc-align.ll
remap-crash.ll
remat-imm.ll
remove-copy-crunsetcrbit.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
remove-implicit-use.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
remove-redundant-load-imm.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
remove-redundant-load-imm.mir [PowerPC] Remove assertion "Shouldn't overwrite a register before it is killed" 2019-10-11 05:32:29 +00:00
remove-redundant-moves.ll
remove-redundant-toc-saves.ll [PowerPC] Move TOC save to prologue when profitable 2019-07-05 18:38:09 +00:00
remove-self-copies.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
repeated-fp-divisors.ll [PowerPC] Adjust the naming and operand order of fnmsub patterns 2019-10-03 19:36:42 +00:00
resolvefi-basereg.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
resolvefi-disp.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
restore-r30.ll
retaddr.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
retaddr2.ll
return-val-i128.ll
rlwimi-and-or-bits.ll
rlwimi-and.ll
rlwimi-commute.ll
rlwimi-dyn-and.ll [PowerPC] avoid masking already-zero bits in BitPermutationSelector 2018-10-12 14:02:20 +00:00
rlwimi-keep-rsh.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
rlwimi.ll
rlwimi2.ll
rlwimi3.ll
rlwinm-zero-ext.ll [PowerPC] Do not emit record-form rotates when record-form andi suffices 2018-03-05 19:27:16 +00:00
rlwinm.ll
rlwinm2.ll
rlwinm_rldicl_to_andi.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
rm-zext.ll
rotl-2.ll
rotl-64.ll
rotl-rotr-crash.ll
rotl.ll
rounding-ops.ll
rs-undef-use.ll
s000-alias-misched.ll
sat-add.ll [PowerPC] Use xxleqv to set all one vector IMM(-1). 2019-08-15 14:32:51 +00:00
save-bp.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
save-cr-ppc32svr4.ll [Power9] Code Cleanup - Remove needsAggressiveScheduling() 2018-07-19 19:34:18 +00:00
save-crbp-ppc32svr4.ll [Power9] Code Cleanup - Remove needsAggressiveScheduling() 2018-07-19 19:34:18 +00:00
scalar-min-max.ll [PowerPC] Emit scalar fp min/max instructions 2019-10-28 19:13:33 -05:00
scalar_vector_test_1.ll Test commit 2018-12-19 15:21:07 +00:00
scalar_vector_test_2.ll [PowerPC] Exploit store instructions that store a single vector element 2019-01-24 23:44:28 +00:00
scalar_vector_test_3.ll [PowerPC] Improve codegen for vector loads using scalar_to_vector 2018-08-08 15:20:43 +00:00
scalar_vector_test_4.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
scavenging.mir Fixed typos in tests: s/CHEKC/CHECK/ 2019-02-25 13:41:59 +00:00
schedule-addi-load.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
scheduling-mem-dependency.ll [PowerPC] Clear the sideeffect bit for those instructions that didn't have the match pattern 2019-10-30 07:59:32 +00:00
sdag-ppcf128.ll
sdiv-pow2.ll
sections.ll
select-addrRegRegOnly.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
select-cc.ll
select-i1-vs-i1.ll [PPC] Correctly adjust branch probability in PPCReduceCRLogicals 2019-05-31 16:11:17 +00:00
select_const.ll Teach the DAGCombine to fold this pattern(c1 and c2 is constant). 2019-06-26 05:12:53 +00:00
select_lt0.ll
selectiondag-extload-computeknownbits.ll
selectiondag-sextload.ll
set0-v8i16.ll
setcc-logic.ll [PowerPC] Use xxleqv to set all one vector IMM(-1). 2019-08-15 14:32:51 +00:00
setcc-to-sub.ll [DAGCombiner] form 'not' ops ahead of shifts (PR39657) 2018-11-22 19:24:10 +00:00
setcc_no_zext.ll
setcclike-or-comb.ll
setcr_bc.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
setcr_bc2.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
setcr_bc3.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
seteq-0.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
setrnd.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
sext-vector-inreg.ll [NFC] Add one test for PowerPC to verify the sext_inreg for vector type. 2019-11-14 10:57:05 +00:00
sh-overflow.mir [PowerPC] Fix SH field overflow issue 2019-10-02 20:25:16 +00:00
shift-cmp.ll [Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold 2019-07-24 22:57:22 +00:00
shift128.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
shift_mask.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
shl_elim.ll
shl_sext.ll
shrink-wrap.ll [NFC][PowerPC] Add the test case shrink-wrap.mir and shrink-wrap.ll for PPC 2019-08-12 17:50:01 +00:00
shrink-wrap.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
sign_ext_inreg1.ll
signbit-shift.ll [PowerPC] Use xxleqv to set all one vector IMM(-1). 2019-08-15 14:32:51 +00:00
simplifyConstCmpToISEL.ll Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred. 2018-06-20 22:01:04 +00:00
sj-ctr-loop.ll [NFC][PowerPC] add verify-machineinstrs check 2018-12-13 12:55:42 +00:00
sjlj.ll [PowerPC] intrinsic llvm.eh.sjlj.setjmp should not have flag isBarrier. 2018-12-13 12:25:20 +00:00
sjlj_no0x.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
small-arguments.ll
sms-cpy-1.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
sms-grp-order.ll [MemorySSA] Re-enable MemorySSA use. 2019-09-04 19:16:04 +00:00
sms-iterator.ll [PowerPC][NFC] Update testcase to avoid dead code 2019-07-11 19:16:33 +00:00
sms-phi-1.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
sms-phi-2.ll Re-commit "[PowerPC][NFC][MachinePipeliner] Add some regression testcases"" 2019-08-08 17:37:58 +00:00
sms-phi-3.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
sms-phi-5.ll Re-commit "[PowerPC][NFC][MachinePipeliner] Add some regression testcases"" 2019-08-08 17:37:58 +00:00
sms-phi.ll [MachinePipeliner] Fix Phi refers to Phi in same stage in 1st epilogue 2019-07-09 02:27:35 +00:00
sms-simple.ll [PowerPC][NFC] Remove deprecated Function Attrs comments #2 2019-10-22 21:50:50 +00:00
smulfixsat.ll [CodeGen] Handle SMULFIXSAT with scale zero in TargetLowering::expandFixedPointMul 2019-09-07 12:16:23 +00:00
spe.ll PowerPC/SPE: Fix load/store handling for SPE 2019-07-17 12:30:04 +00:00
spill-nor0.ll
spill_p9_setb.ll [PowerPC] Spill CR LT bits on P9 using setb 2019-11-24 00:27:40 -06:00
splat-bug.ll
splat-larger-types-as-v16i8.ll
split-index-tc.ll
splitstore-check-volatile.ll [CodeGenPrepare] Don't split the store if it is volatile 2019-05-08 07:32:12 +00:00
srem-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
srem-vector-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
srl-mask.ll
stack-guard-reassign.ll [CodeGen] Don't resolve the stack protector frame accesses until PEI 2019-07-25 22:23:48 +00:00
stack-no-redzone.ll
stack-protector.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
stack-realign.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
stackmap-frame-setup.ll
stacksize.ll
std-unal-fi.ll
stdux-constuse.ll
stfiwx-2.ll
stfiwx.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
store-combine.ll [PowerPC][NFC] Update test assertions using update_llc_test_checks.py 2019-09-10 02:28:24 +00:00
store-constant.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
store-load-fwd.ll
store-update.ll
store_fptoi.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
structsinmem.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
structsinregs.ll Replace "no-frame-pointer-*" function attributes with "frame-pointer" 2019-01-14 10:55:55 +00:00
stubs.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
stwu-gta.ll
stwu-sched.ll [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop. 2019-07-03 01:49:03 +00:00
stwu8.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
stwux.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
sub-bv-types.ll
sub-of-not.ll [PowerPC] Remove the SPE4RC register class and instead add f32 to the GPRC register class. 2019-09-12 22:07:35 +00:00
subc.ll
subreg-postra-2.ll
subreg-postra.ll
subtract_from_imm.ll
svr4-redzone.ll
swaps-le-1.ll [PowerPC] extend PPCPreIncPrep Pass for ds/dq form 2019-11-17 21:38:43 -05:00
swaps-le-2.ll
swaps-le-3.ll
swaps-le-4.ll
swaps-le-5.ll
swaps-le-6.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
swaps-le-7.ll [PowerPC] Exploit single instruction load-and-splat for word and doubleword 2019-09-17 16:45:20 +00:00
tail-dup-analyzable-fallthrough.ll
tail-dup-branch-to-fallthrough.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
tail-dup-break-cfg.ll [PowerPC] Do not emit record-form rotates when record-form andi/andis suffices 2018-09-18 13:43:16 +00:00
tail-dup-layout.ll [PowerPC] Do not emit record-form rotates when record-form andi/andis suffices 2018-09-18 13:43:16 +00:00
tailcall-string-rvo.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
tailcall1-64.ll
tailcall1.ll
tailcallpic1.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
test-and-cmp-folding.ll [PowerPC] Implement isMaskAndCmp0FoldingBeneficial 2018-05-02 23:55:23 +00:00
testBitReverse.ll [PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8 2018-09-03 03:14:29 +00:00
testComparesi32gtu.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
testComparesi32leu.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
testComparesi32ltu.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
testComparesieqsc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesieqsi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesieqsll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesieqss.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiequc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiequi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiequll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiequs.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigesc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigesi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigesll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigess.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigeuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigeui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigeull.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigeus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigtsc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigtsi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigtsll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigtss.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigtuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigtui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesigtus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesilesc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesilesi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesilesll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiless.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesileuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesileui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesileull.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesileus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiltsc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiltsi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiltsll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiltss.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiltuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiltui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiltus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesinesc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesinesi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesinesll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesiness.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesineuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesineui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesineull.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesineus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testCompareslleqsc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testCompareslleqsi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testCompareslleqsll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testCompareslleqss.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllequc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllequi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllequll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllequs.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgesc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgesi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgesll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgess.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgeuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgeui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgeull.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgeus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgtsll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgtuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgtui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllgtus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testCompareslllesc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testCompareslllesi.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testCompareslllesll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllless.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllleuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllleui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllleull.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllleus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllltsll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllltuc.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllltui.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllltus.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllnesll.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
testComparesllneull.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
test_call_aix.ll Reland r368691: "[AIX] Implement LR prolog/epilog save/restore" 2019-08-13 17:05:53 +00:00
test_func_desc.ll [AIX]Emit function descriptor csect in assembly 2019-09-26 19:38:32 +00:00
thread-pointer.ll
tls-cse.ll
tls-pic.ll
tls-pie-xform.ll [PowerPC] Optimize TLS initial-exec sequence to use X-Form loads/stores 2018-03-15 15:34:41 +00:00
tls-store2.ll
tls.ll [PowerPC][NFC] Use -mtriple in RUN line, remove target triple in tls.ll 2019-08-30 02:57:33 +00:00
tls_get_addr_clobbers.ll [PowerPC] Move the stack pointer update instruction later in the prologue and earlier in the epilogue. 2019-02-28 12:23:28 +00:00
tls_get_addr_fence1.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
tls_get_addr_fence2.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
tls_get_addr_stackframe.ll
toc-float.ll [NFC] fix test case issue that with wrong label check. 2018-12-18 04:25:41 +00:00
toc-load-sched-bug.ll Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
tocSaveInPrologue.ll [PowerPC] Turn on CR-Logical reducer pass 2019-10-22 12:20:38 +00:00
trampoline.ll
trunc-srl-load.ll [DAGCombine] Improve ReduceLoad for SRL 2018-04-09 08:16:11 +00:00
uint-to-fp-v4i32.ll [PowerPC] Remove allow-deprecated-dag-overlap and fix broken tests 2019-11-12 15:18:54 +00:00
uint-to-ppcfp128-crash.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
umulfixsat.ll [Intrinsic] Add the llvm.umul.fix.sat intrinsic 2019-09-07 12:16:14 +00:00
umulo-128-legalisation-lowering.ll [PowerPC][NFC] Avoid checking non-relevant .cfi instructions 2019-08-30 19:24:25 +00:00
unal-altivec-wint.ll
unal-altivec.ll [PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop. 2019-07-03 01:49:03 +00:00
unal-altivec2.ll
unal-vec-ldst.ll [PowerPC] Automatically generate various tests. NFC 2019-08-23 13:30:45 +00:00
unal-vec-negarith.ll [CodeGen] Use MIR syntax for MachineMemOperand printing 2018-03-14 21:52:13 +00:00
unal4-std.ll
unaligned-addressing-mode.ll [PowerPC] [ISEL] select x-form instruction for unaligned offset 2019-05-22 02:57:31 +00:00
unaligned.ll [PowerPC] Remove the match pattern in the definition of LXSDX/STXSDX 2018-05-24 03:20:28 +00:00
unsafe-math.ll
unwind-dw2-g.ll [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
unwind-dw2.ll
urem-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
urem-vector-lkk.ll [SelectionDAG] Add tests for LKK algorithm 2019-10-05 14:29:25 +00:00
use-cr-result-of-dom-icmp-st.ll [CGP] Make ICMP_EQ use CR result of ICMP_S(L|G)T dominators 2019-11-11 17:28:50 +00:00
uwtables.ll [Exception Handling] Unwind tables are required for all functions that have an EH personality. 2018-08-24 19:38:29 +00:00
vaddsplat.ll
varargs-struct-float.ll
varargs.ll [PowerPC] Implement the areMemAccessesTriviallyDisjoint hook 2019-07-02 03:28:52 +00:00
variable_elem_vec_extracts.ll [SelectionDAG] Reverse the order of operands in the ISD::ADD created by TargetLowering::getVectorElementPointer so that the FrameIndex is on the left. 2017-12-22 17:18:13 +00:00
vavg.ll [NFC][Test] Add the vavg test for PowerPC 2019-11-18 10:41:47 +00:00
vcmp-fold.ll
vec-abi-align.ll
vec-asm-disabled.ll [PowerPC] Support constraint code "ww" 2019-07-04 04:44:42 +00:00
vec-itofp.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
vec-min-max.ll [PowerPC] Turn on CR-Logical reducer pass 2019-10-22 12:20:38 +00:00
vec-select.ll [PowerPC] Emit XXSEL for vec_sel and code that has the same pattern 2019-06-25 10:46:13 +00:00
vec-trunc.ll [PowerPC] Avoid scalarization of vector truncate 2019-02-11 17:29:14 +00:00
vec_abs.ll
vec_absd.ll
vec_add_sub_doubleword.ll [PowerPC] Use xxleqv to set all one vector IMM(-1). 2019-08-15 14:32:51 +00:00
vec_add_sub_quadword.ll [NFC][PPC] Autogenerate vec_add_sub_quadword.ll test 2019-05-23 18:08:26 +00:00
vec_auto_constant.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
vec_br_cmp.ll
vec_buildvector_loadstore.ll [PowerPC] Automatically generate vec_buildvector_loadstore.ll . NFC 2019-08-22 20:42:50 +00:00
vec_call.ll
vec_clz.ll [CodeGen] Add missing vector type legalization for ctlz_zero_undef 2019-06-24 19:27:07 +00:00
vec_cmp.ll
vec_cmpd.ll
vec_constants.ll
vec_conv.ll
vec_conv_fp32_to_i8_elts.ll [PowerPC] P9 Scheduling Model: dispatching rule fixes 2019-06-04 15:22:23 +00:00
vec_conv_fp32_to_i16_elts.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
vec_conv_fp32_to_i64_elts.ll [MachineScheduler] Enable AA in PostRA Machine scheduler 2019-11-05 11:58:50 +00:00
vec_conv_fp64_to_i8_elts.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
vec_conv_fp64_to_i16_elts.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
vec_conv_fp64_to_i32_elts.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
vec_conv_fp_to_i_4byte_elts.ll [PowerPC][NFC] Add tests for vector fp <-> int conversions 2018-11-16 20:24:10 +00:00
vec_conv_fp_to_i_8byte_elts.ll [MachineScheduler] checkResourceLimit boundary condition update 2019-06-07 14:54:47 +00:00
vec_conv_i8_to_fp32_elts.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
vec_conv_i8_to_fp64_elts.ll Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes." 2019-03-27 19:54:41 +00:00
vec_conv_i16_to_fp32_elts.ll [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
vec_conv_i16_to_fp64_elts.ll [MachineScheduler] Enable AA in PostRA Machine scheduler 2019-11-05 11:58:50 +00:00
vec_conv_i32_to_fp64_elts.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
vec_conv_i64_to_fp32_elts.ll [MachineScheduler] Enable AA in PostRA Machine scheduler 2019-11-05 11:58:50 +00:00
vec_conv_i_to_fp_4byte_elts.ll [PowerPC][NFC] Add tests for vector fp <-> int conversions 2018-11-16 20:24:10 +00:00
vec_conv_i_to_fp_8byte_elts.ll [MachineScheduler] checkResourceLimit boundary condition update 2019-06-07 14:54:47 +00:00
vec_extload.ll
vec_extract_p9.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
vec_extract_p9_2.ll [DAGCombiner] When combining zero_extend of a truncate, only mask before extending for vectors. 2018-03-01 22:32:25 +00:00
vec_fmuladd.ll
vec_fneg.ll
vec_insert.ll
vec_int_ext.ll [CodeGen] Unify MBB reference format in both MIR and debug output 2017-12-04 17:18:51 +00:00
vec_mergeow.ll
vec_minmax.ll
vec_misaligned.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
vec_mul.ll
vec_mul_even_odd.ll
vec_perf_shuffle.ll
vec_popcnt.ll
vec_revb.ll [NFC][Test] Adding the test for bswap + logic op for PowerPC 2019-11-25 08:21:12 +00:00
vec_rotate_shift.ll NFC - Various typo fixes in tests 2018-07-04 13:28:39 +00:00
vec_rounding.ll
vec_select.ll [PowerPC] Enhance the selection(ISD::VSELECT) of vector type 2018-11-14 02:34:45 +00:00
vec_shift.ll
vec_shuffle.ll [PowerPC] Automatically generate various tests. NFC 2019-08-22 20:26:56 +00:00
vec_shuffle_le.ll [PowerPC] Automatically generate various tests. NFC 2019-08-22 20:26:56 +00:00
vec_shuffle_p8vector.ll [PowerPC] Automatically generate various tests. NFC 2019-08-22 20:26:56 +00:00
vec_shuffle_p8vector_le.ll [PowerPC] Automatically generate various tests. NFC 2019-08-22 20:26:56 +00:00
vec_sldwi.ll
vec_splat.ll UpdateTestChecks: ppc32 triple support 2019-05-23 19:54:41 +00:00
vec_splat_constant.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
vec_sqrt.ll
vec_urem_const.ll
vec_veqv_vnand_vorc.ll
vec_vrsave.ll
vec_xxpermdi.ll
vec_zero.ll
vector-constrained-fp-intrinsics.ll [FPEnv] Strict FP tests should use the requisite function attributes. 2019-10-04 17:03:46 +00:00
vector-copysign.ll [PowerPC] Mark FCOPYSIGN legal for FP vectors 2019-06-26 01:48:57 +00:00
vector-extend-sign.ll [PowerPC] Implement the vector extend sign instruction pattern match 2019-11-22 08:58:27 +00:00
vector-identity-shuffle.ll
vector-merge-store-fp-constants.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
vector.ll
vperm-instcombine.ll
vperm-lowering.ll
vrspill.ll
vsel-prom.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
vselect-constants.ll [PowerPC] Use xxleqv to set all one vector IMM(-1). 2019-08-15 14:32:51 +00:00
vsx-args.ll
vsx-div.ll
vsx-elementary-arith.ll
vsx-fma-m.ll
vsx-fma-mutate-trivial-copy.ll [PowerPC] Use the two-constant NR algorithm for refining estimates 2019-05-07 13:48:03 +00:00
vsx-fma-mutate-undef.ll [PowerPC] make tests immune to improved undef handling 2019-09-28 13:34:53 +00:00
vsx-fma-sp.ll
vsx-infl-copy1.ll Set useful flags for vector imm setting instructions 2019-03-12 18:27:09 +00:00
vsx-infl-copy2.ll
vsx-ldst-builtin-le.ll
vsx-ldst.ll
vsx-minmax.ll
vsx-p8.ll
vsx-p9.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
vsx-partword-int-loads-and-stores.ll [PowerPC] Remove UseVSXReg 2019-03-26 20:28:21 +00:00
vsx-recip-est.ll
vsx-self-copy.ll Recommit "[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel" 2019-01-10 06:20:14 +00:00
vsx-spill-norwstore.ll
vsx-spill.ll [Power9] Enable the Out-of-Order scheduling model for P9 hw 2019-01-03 05:04:18 +00:00
vsx-vec-spill.ll
vsx-word-splats.ll
vsx.ll [PowerPC] Implement the areMemAccessesTriviallyDisjoint hook 2019-07-02 03:28:52 +00:00
vsxD-Form-spills.ll [PowerPC] Replace the Post RA List Scheduler with the Machine Scheduler 2018-07-04 18:54:25 +00:00
vsx_builtins.ll [Power9] Add support for stxvw4x.be and stxvd2x.be intrinsics 2018-11-05 17:31:26 +00:00
vsx_insert_extract_le.ll [PowerPC] Regenerate vsx_insert_extract_le.ll tests 2019-11-19 13:18:44 +00:00
vsx_scalar_ld_st.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
vsx_shuffle_le.ll recommit:[PowerPC] Eliminate loads/swap feeding swap/store for vector type by using big-endian load/store 2019-08-01 05:26:02 +00:00
vtable-reloc.ll
weak_def_can_be_hidden.ll [PPC] Remove Darwin support from POWER backend. 2018-08-28 01:18:29 +00:00
xray-attribute-instrumentation.ll
xray-conditional-return.ll
xray-ret-is-terminator.ll [FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack 2019-06-13 13:56:19 +00:00
xray-tail-call-hidden.ll
xray-tail-call-sled.ll [PowerPC] Make no-PIC default to match GCC - LLVM 2018-12-04 20:14:57 +00:00
xvcmpeqdp-v2f64.ll [PowerPC] Fix assert from machine verify pass that missing undef register flag 2018-12-07 05:25:16 +00:00
xxleqv_xxlnand_xxlorc.ll
zero-not-run.ll
zext-and-cmp.ll [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
zext-bitperm.ll
zext-free.ll