llvm-project/llvm/test/CodeGen/Hexagon
Arthur Eubanks 6699029b67 [NewPM][opt] Run the "default" AA pipeline by default
We tend to assume that the AA pipeline is by default the default AA
pipeline and it's confusing when it's empty instead.

PR48779

Initially reverted due to BasicAA running analyses in an unspecified
order (multiple function calls as parameters), fixed by fetching
analyses before the call to construct BasicAA.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D95117
2021-01-21 21:08:54 -08:00
..
autohvx [Hexagon] Fix segment start to adjust for gaps between segments 2021-01-19 12:49:39 -06:00
intrinsics [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
loop-idiom [NewPM][opt] Run the "default" AA pipeline by default 2021-01-21 21:08:54 -08:00
pipeliner [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
vect [Hexagon] Regenerate zext-v4i1.ll tests 2021-01-06 12:56:06 +00:00
64bit_tstbit.ll Fix pattern error for S2_tstbit_i instruction 2019-10-30 11:21:48 -05:00
Atomics.ll
BranchPredict.ll
Halide_vec_cast_trunc1.ll
Halide_vec_cast_trunc2.ll
M4_mpyri_addi_global.ll
M4_mpyrr_addi_global.ll
NVJumpCmp.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
P08214.ll
PR33749.ll
S3_2op.ll [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
SUnit-boundary-prob.ll
V60-VDblNew.ll
abi-padding-2.ll [Hexagon] Reducing minimum alignment requirement 2020-06-24 10:28:37 -05:00
abi-padding.ll [Hexagon] Reducing minimum alignment requirement 2020-06-24 10:28:37 -05:00
abs.ll
absaddr-store.ll
absimm.ll
add-use.ll
add_int_double.ll
add_mpi_RRR.ll
addaddi.ll
addasl-address.ll
addh-sext-trunc.ll Migrate function attribute "no-frame-pointer-elim-non-leaf" to "frame-pointer"="non-leaf" as cleanups after D56351 2019-12-24 16:05:15 -08:00
addh-shifted.ll
addh.ll
addr-calc-opt.ll
addr-mode-opt.ll
addrmode-align.ll Update LSR's logic that identifies a post-increment SCEV value. 2020-03-02 16:34:18 -06:00
addrmode-globoff.mir
addrmode-immop.mir
addrmode-indoff.ll
addrmode-keepdeadphis.ll
addrmode-keepdeadphis.mir
addrmode-offset.ll
addrmode-rr-to-io.mir
addrmode.ll
addsubcarry.ll
adjust-latency-stackST.ll
aggr-antidep-tied.ll
aggr-copy-order.ll
aggr-licm.ll
aggressive_licm.ll
align_Os.ll
align_test.ll
alu64.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
always-ext.ll
anti-dep-partial.mir
args.ll
ashift-left-right.ll
asr-rnd.ll
asr-rnd64.ll
assert-postinc-ptr-not-value.ll
atomic-rmw-add.ll Handle part-word LL/SC in atomic expansion pass 2020-04-28 10:07:39 -05:00
atomic-store-byte.ll Align store conditional address 2020-07-30 10:42:00 -05:00
avoid-predspill-calleesaved.ll
avoid-predspill.ll
avoidVectorLowering.ll
bank-conflict-load.mir
bank-conflict.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
barrier-flag.ll
base-offset-addr.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
base-offset-post.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
base-offset-stv4.ll
bit-addr-align.mir
bit-bitsplit-at.ll
bit-bitsplit-regclass.ll [Hexagon] Use InstSimplify instead of ConstantProp 2020-08-04 15:42:39 -07:00
bit-bitsplit-src.ll
bit-bitsplit.ll
bit-cmp0.mir
bit-eval.ll
bit-ext-sat.ll
bit-extract-off.ll
bit-extract.ll
bit-extractu-half.ll
bit-gen-rseq.ll
bit-has.ll
bit-loop-rc-mismatch.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
bit-loop.ll
bit-phi.ll
bit-rie.ll
bit-skip-byval.ll OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
bit-validate-reg.ll
bit-visit-flowq.ll [NFC] Make tests more robust for new optimizations 2019-05-25 14:10:20 +00:00
bitconvert-vector.ll
bitmanip.ll
bkfir.ll
block-addr.ll
block-address.ll
block-ranges-nodef.ll
blockaddr-fpic.ll
branch-folder-hoist-kills.mir
branch-non-mbb.ll
branchfolder-insert-impdef.mir
branchfolder-keep-impdef.ll
brcond-setne.ll
brev_ld.ll
brev_st.ll
bss-local.ll
bug-aa4463-ifconv-vecpred.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
bug-allocframe-size.ll
bug-hcp-tied-kill.ll
bug6757-endloop.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
bug9049.ll
bug9963.ll
bug14859-iv-cleanup-lpad.ll
bug14859-split-const-block-addr.ll
bug15515-shuffle.ll Enable LoopVectorization by default. 2019-04-25 04:49:48 +00:00
bug17276.ll
bug17386.ll
bug18008.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
bug18491-optsize.ll
bug19076.ll
bug19119.ll
bug19254-ifconv-vec.ll
bug27085.ll
bug31839.ll
bugAsmHWloop.ll
build-vector-shuffle.ll
build-vector-v4i8-zext.ll
builtin-expect.ll
builtin-prefetch-offset.ll
builtin-prefetch.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
call-long1.ll
call-ret-i1.ll
call-v4.ll Rename ExpandISelPseudo->FinalizeISel, delay register reservation 2019-06-19 00:25:39 +00:00
callR_noreturn.ll
calling-conv-2.ll OpaquePtr: Update more tests to use typed sret 2020-11-20 20:08:43 -05:00
calling-conv.ll OpaquePtr: Update more tests to use typed sret 2020-11-20 20:08:43 -05:00
callr-dep-edge.ll
cext-check.ll
cext-ice.ll
cext-opt-basic.mir
cext-opt-negative-fi.mir OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
cext-opt-numops.mir
cext-opt-range-assert.mir
cext-opt-range-offset.mir Simplify MachineVerifier's block-successor verification. 2020-06-06 22:30:51 -04:00
cext-opt-shifted-range.mir
cext-opt-stack-no-rr.mir
cext-unnamed-global.mir
cext-valid-packet1.ll
cext-valid-packet2.ll
cext.ll
cexti16.ll
cfgopt-fall-through.ll
cfi-late-and-regpressure-init.ll
cfi-late.ll
cfi-offset.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
cfi_offset.ll [CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree 2021-01-02 01:01:19 +03:00
cfi_offset2.ll
check-dot-new.ll
check-subregister-for-latency.ll Handle cases for subregisters. 2020-04-30 20:32:33 -05:00
checktabs.ll
circ-load-isel.ll
circ_ld.ll
circ_ldd_bug.ll
circ_ldw.ll
circ_new.ll
circ_pcr_assert.ll
circ_st.ll
clr_set_toggle.ll
cmp-extend.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
cmp-promote.ll
cmp-to-genreg.ll
cmp-to-predreg.ll
cmp.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
cmp_pred.ll
cmp_pred2.ll
cmp_pred_reg.ll
cmpb-dec-imm.ll
cmpb-eq.ll
cmpb_gtu.ll
cmpb_pred.ll
cmpbeq.ll
cmph-gtu.ll
cmpy-round.ll
coalesce_tfri.ll
coalescing-hvx-across-calls.ll
combine-imm-ext.ll
combine-imm-ext2.ll
combine.ll
combine_ir.ll
combine_lh.ll
combiner-lts.ll
common-gep-basic.ll
common-gep-icm.ll
common-gep-inbounds.ll
common-global-addr.ll
compound.ll
concat-vectors-legalize.ll
const-combine.ll
const-pool-tf.ll
const64.ll
constant_compound.ll [llvm] Fix missing FileCheck directive colons 2020-04-06 09:59:08 -06:00
constext-call.ll
constext-immstore.ll
constext-replace.ll
constp-andir-global.mir
constp-clb.ll
constp-combine-neg.ll Migrate function attribute "no-frame-pointer-elim-non-leaf" to "frame-pointer"="non-leaf" as cleanups after D56351 2019-12-24 16:05:15 -08:00
constp-ctb.ll
constp-extract.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
constp-physreg.ll Migrate function attribute "no-frame-pointer-elim-non-leaf" to "frame-pointer"="non-leaf" as cleanups after D56351 2019-12-24 16:05:15 -08:00
constp-rewrite-branches.ll
constp-rseq.ll
constp-vsplat.ll
convert-to-dot-old.ll
convert_const_i1_to_i8.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
copy-to-combine-dbg.ll
count_0s.ll
countbits-basic.ll
csr-func-usedef.ll
csr-stubs-spill-threshold.ll
csr_stub_calls_dwarf_frame_info.ll
ctor.ll
dadd.ll
dag-combine-select-or0.ll
dag-indexed.ll
dccleana.ll
dead-store-stack.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
dealloc-store.ll
dealloc_return.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
debug-line_table_start.ll
debug-prologue-loc.ll
debug-prologue.ll
def-undef-deps.ll
default-align.ll
deflate.ll
df-min-max.ll [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
dfp.ll
dhry.ll
dhry_proc8.ll
dhry_stall.ll
disable-const64-tinycore.ll [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
disable-const64.ll [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
dmul.ll
dont_rotate_pregs_at_O2.ll
double.ll
dsub.ll
dualstore.ll
duplex-addi-global-imm.mir
duplex.ll
dwarf-discriminator.ll
early-if-conv-lifetime.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
early-if-conversion-bug1.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
early-if-debug.mir [MachineVerifier] Verify that a DBG_VALUE has a debug location 2020-05-28 13:53:40 -07:00
early-if-low8.mir
early-if-merge-loop.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
early-if-phi-i1.ll
early-if-predicator.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
early-if-spare.ll
early-if-vecpi.ll
early-if-vecpred.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
early-if.ll
eh_return-r30.ll
eh_return.ll
eh_save_restore.ll
ehabi.ll [CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree 2021-01-02 01:01:19 +03:00
eliminate-pred-spill.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
entryBB-isLoopHdr.ll
expand-condsets-basic.ll
expand-condsets-copy-lis.ll
expand-condsets-dead-bad.ll
expand-condsets-dead-pred.ll [Hexagon] Remove icmp undef from reduced tests 2019-03-15 15:07:44 +00:00
expand-condsets-dead.ll
expand-condsets-def-undef.mir
expand-condsets-extend.ll
expand-condsets-imm.mir
expand-condsets-impuse.mir
expand-condsets-impuse2.mir
expand-condsets-phys-reg.mir [Hexagon] Fix two testcase errors 2019-11-20 15:06:35 -06:00
expand-condsets-pred-undef.ll OpaquePtr: Update more tests to use typed sret 2020-11-20 20:08:43 -05:00
expand-condsets-pred-undef2.ll
expand-condsets-rm-reg.mir
expand-condsets-rm-segment.ll
expand-condsets-same-inputs.mir
expand-condsets-undef.ll
expand-condsets-undef2.ll
expand-condsets-undefvni.ll
expand-condsets.ll
expand-copyw-undef.mir [Hexagon] Recognize undefined registers in expandPostRAPseudo 2020-03-06 08:27:42 -06:00
expand-vselect-kill.mir
expand-vstorerw-undef.ll
expand-vstorerw-undef2.ll
expand-wselect.mir
extload-combine.ll
extlow.ll
extract-basic.ll
extract_0bits.ll
extractu_0bits.ll
fadd.ll
fcmp.ll
feature-compound.ll [Hexagon] Add a target feature to disable compound instructions 2020-01-16 12:37:30 -06:00
feature-memops.ll
find-loop-instr.ll
find-loop.ll
fixed-spill-mutable.ll
float-amode.ll
float-bitcast.ll
float-const64-G0.ll
float-gen-cmpop.ll
float.ll
floatconvert-ieee-rnd-near.ll
fltnvjump.ll
fmadd.ll
fminmax-v67.ll [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
fminmax.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
fmul-v67.ll [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
fmul.ll
formal-args-i1.ll
fp_latency.ll
fpelim-basic.ll Migrate function attribute "no-frame-pointer-elim"="false" to "frame-pointer"="none" as cleanups after D56351 2019-12-24 16:27:51 -08:00
frame-offset-overflow.ll
fsel.ll
fsub.ll
funnel-shift.ll [Hexagon] Correct the order of operands when lowering funnel shift-left 2020-07-28 21:22:41 -05:00
funnel-shift2.ll [Hexagon] Correct the order of operands when lowering funnel shift-left 2020-07-28 21:22:41 -05:00
fusedandshift.ll
generic-cpu.ll
getBlockAddress.ll
glob-align-volatile.ll
global-const-gep.ll
global-ctor-pcrel.ll
global64bitbug.ll
gp-plus-offset-load.ll
gp-plus-offset-store.ll
gp-rel.ll
hasfp-crash1.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
hasfp-crash2.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
hello-world-v55.ll
hello-world-v60.ll
hexagon-cond-jumpr31.ll
hexagon-tfr-add.ll
hexagon-verify-implicit-use.ll
hexagon_cfi_offset.ll
hexagon_vector_loop_carried_reuse.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
hexagon_vector_loop_carried_reuse_commutative.ll [Hexagon] Rework VLCR algorithm 2019-07-01 13:50:47 +00:00
hexagon_vector_loop_carried_reuse_constant.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
hexagon_vector_loop_carried_reuse_invalid.ll [Hexagon] Fix reuse bug in Vector Loop Carried Reuse pass 2019-04-12 16:37:12 +00:00
hidden-relocation.ll
honor-optsize.ll
hrc-stack-coloring.ll
hvx-bitcast-v64i1.ll [Hexagon] Implement llvm.masked.load and llvm.masked.store for HVX 2020-08-26 13:10:22 -05:00
hvx-byte-store-double.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
hvx-byte-store.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
hvx-dbl-dual-output.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
hvx-double-vzero.ll
hvx-dual-output.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
hvx-isel-vselect-v256i16.ll [Hexagon] Check if EVT is simple type in HVX lowering 2020-08-25 15:02:44 -05:00
hvx-loopidiom-memcpy.ll
hvx-nontemporal.ll
hvx-vzero.ll
hwloop-cleanup.ll
hwloop-const.ll
hwloop-crit-edge.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
hwloop-dbg.ll
hwloop-ice.ll
hwloop-le.ll
hwloop-long.ll
hwloop-loop1.ll
hwloop-lt.ll
hwloop-lt1.ll
hwloop-missed.ll
hwloop-ne.ll
hwloop-noreturn-call.ll
hwloop-ph-deadcode.ll
hwloop-phi-subreg.ll
hwloop-pos-ivbump1.ll
hwloop-preh.ll
hwloop-preheader.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
hwloop-range.ll
hwloop-recursion.ll
hwloop-redef-imm.mir
hwloop-subreg.ll
hwloop-swap.ll
hwloop-with-return-call.ll
hwloop-wrap.ll
hwloop-wrap2.ll
hwloop1.ll
hwloop2.ll
hwloop3.ll
hwloop4.ll
hwloop5.ll
hx_V6_lo_hi.ll
i1_VarArg.ll
i8_VarArg.ll
i16_VarArg.ll
i128-bitop.ll
idxload-with-zero-offset.ll
ifcvt-common-kill.mir
ifcvt-diamond-bad.ll
ifcvt-diamond-bug-2016-08-26.ll
ifcvt-diamond-ret.mir
ifcvt-edge-weight.ll [llc] (almost) remove `--print-machineinstrs` 2020-07-20 10:43:28 -07:00
ifcvt-impuse-livein.mir
ifcvt-live-subreg.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
ifcvt-simple-bprob.ll
ignore-terminal-mbb.ll
indirect-br.ll
initial-exec.ll
inline-asm-a.ll
inline-asm-bad-constraint.ll
inline-asm-clobber-lr.ll
inline-asm-error.ll OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
inline-asm-filetype-null.ll
inline-asm-hexagon.ll
inline-asm-i1.ll
inline-asm-qv.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
inline-asm-vecpred128.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
inlineasm-output-template.ll [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00
insert-basic.ll
insert.ll
insert4.ll Migrate function attribute "no-frame-pointer-elim-non-leaf" to "frame-pointer"="non-leaf" as cleanups after D56351 2019-12-24 16:05:15 -08:00
intrinsics-v60-alu.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
intrinsics-v60-misc.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
intrinsics-v60-permute.ll
intrinsics-v60-shift.ll
intrinsics-v60-vcmp.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
intrinsics-v60-vmpy-acc-128B.ll
intrinsics-v60-vmpy-acc.ll
intrinsics-v60-vmpy.ll
intrinsics-v66.ll
intrinsics-v67.ll [Hexagon] Add support for Hexagon/HVX v67 ISA 2020-01-20 16:16:49 -06:00
invalid-dotnew-attempt.mir
invalid-memrefs.ll
is-legal-void.ll
isel-bitcast-v1i8-i8.ll [Hexagon] Fix bitcasting v1i8 -> i8 2020-12-15 16:01:24 -06:00
isel-bitcast-v8i1-i8.ll [Hexagon] Fix type in HexagonTargetLowering::ReplaceNodeResults 2019-09-05 16:19:47 +00:00
isel-bitcast-v8i8-v4i16.ll [Hexagon] Bitcast v4i16 to v8i8, unify no-op casts between scalar and HVX 2019-09-23 14:33:27 +00:00
isel-combine-half.ll
isel-dcfetch-intrin-map.ll [Hexagon] Map dcfetch intrinsic to Y2_dcfetchbo, not Y2_dcfetch 2020-02-28 14:19:20 -06:00
isel-exti1.ll
isel-global-offset-alignment.ll
isel-hvx-pred-bitcast-order.ll [Hexagon] Fix perfect shuffle generation for single vectors 2020-08-30 06:43:16 -05:00
isel-i1arg-crash.ll
isel-minmax-v64bit.ll [Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns 2020-11-25 19:02:17 +00:00
isel-op-zext-i1.ll
isel-prefer.ll [Hexagon] Improve generated code for test-if-bit-clear, one more time 2019-09-04 15:22:36 +00:00
isel-select-v4i8.ll [Hexagon] Don't generate short vectors in ISD::SELECT in preprocessing 2020-02-11 15:27:33 -06:00
isel-setcc-i1.ll
isel-simplify-crash.ll [Hexagon] Use InstSimplify instead of ConstantProp 2020-08-04 15:42:39 -07:00
isel-splat-vector-crash.ll [Hexagon] Replace HexagonISD::VSPLAT with ISD::SPLAT_VECTOR 2020-10-10 19:49:47 -05:00
isel-splat-vector-dag-crash.ll [Hexagon] Replace HexagonISD::VSPLAT with ISD::SPLAT_VECTOR 2020-10-10 19:49:47 -05:00
isel-splat-vector-neg-i8.ll [Hexagon] Fix bad SDNodeXForm 2021-01-04 10:43:01 -06:00
isel-uaddo-1.ll [Hexagon] Custom-lower UADDO(x, 1) and USUBO(x, 1) 2019-07-01 15:50:09 +00:00
isel-vacopy.ll
isel-vlsr-v2i16.ll
isel-vselect-v4i8.ll [Hexagon] Generate min/max instructions for 64-bit vectors 2019-08-16 16:16:27 +00:00
isel-zext-vNi1.ll
jt-in-text.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
jump-prob.ll
jump-table-g0.ll
jump-table-isel.ll
large-number-of-preds.ll
late-pred.ll
late_instr.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
lcomm.ll
lit.local.cfg [lit] Delete empty lines at the end of lit.local.cfg NFC 2019-06-17 09:51:07 +00:00
livephysregs-add-pristines.mir
livephysregs-lane-masks.mir [Hexagon] Add missing live-in registers in some codegen tests 2020-04-23 10:28:04 -05:00
livephysregs-lane-masks2.mir [Hexagon] Add missing live-in registers in some codegen tests 2020-04-23 10:28:04 -05:00
livephysregs-regmask-clobber.mir
load-abs.ll
loadi1-G0.ll
loadi1-v4-G0.ll
loadi1-v4.ll
loadi1.ll
local-exec.ll
long-calls.ll
loop-prefetch.ll
loop-rotate-bug.ll
loop-rotate-liveins.ll
loop_correctness.ll [Hexagon] Use InstSimplify instead of ConstantProp 2020-08-04 15:42:39 -07:00
lower-extract-subvector.ll
lower-i1.ll
lsr-post-inc-cross-use-offsets.ll
lsr-postinc-nested-loop.ll Update LSR's logic that identifies a post-increment SCEV value. 2020-03-02 16:34:18 -06:00
machine-cp-clobbers.mir
machine-sink.ll
macint.ll
maddsubu.ll
mapped_intrinsics.ll
maxd.ll
maxh.ll
maxud.ll
maxuw.ll
maxw.ll
mem-fi-add.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
mem-load-circ.ll
mem-ops-sub.ll
mem-ops-sub_01.ll
mem-ops-sub_i16.ll
mem-ops-sub_i16_01.ll
memcmp.ll
memcpy-likely-aligned.ll
memcpy-memmove-inline.ll
memop-bit18.ll
memops-stack.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
memops.ll
memops1.ll
memops2.ll
memops3.ll
memops_global.ll
memset-inline.ll
mind.ll
minu-zext-8.ll
minu-zext-16.ll
minud.ll
minuw.ll
minw.ll
mipi-double-small.ll
misaligned-access.ll
misaligned-const-load.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
misaligned-const-store.ll Revert "Revert "Reland "[Support] make report_fatal_error `abort` instead of `exit`""" 2020-02-13 10:16:06 -08:00
misaligned_double_vector_store_not_fast.ll [SimplifyCFG] Teach removeUndefIntroducingPredecessor to preserve DomTree 2021-01-02 01:01:20 +03:00
misched-top-rptracker-sync.ll
mlong-calls.ll
mnaci_v66.ll
mpy.ll
mpysin-imm.ll
mul64-sext.ll
mul64.ll
mulh.ll
mulhs.ll
multi-cycle.ll
mux-basic.ll
mux-kill1.mir
mux-kill2.mir
mux-kill3.mir
mux-undef.ll
muxii-bug.ll [Hexagon] Validate the iterators before converting them to mux. 2019-11-14 13:01:16 -06:00
muxii-crash.ll
namedreg.ll
neg.ll
newify-crash.ll
newvalueSameReg.ll
newvaluejump-c4.mir
newvaluejump-float.mir
newvaluejump-kill.ll [Hexagon] Use InstSimplify instead of ConstantProp 2020-08-04 15:42:39 -07:00
newvaluejump-kill2.mir
newvaluejump-postinc.ll
newvaluejump-solo.mir
newvaluejump.ll
newvaluejump2.ll Revert "[BPI] Improve static heuristics for integer comparisons" 2020-08-17 20:44:33 +02:00
newvaluejump3.ll
newvaluestore.ll
newvaluestore2.ll
no-falign-function-for-size.ll
no-packets-gather.ll
no-packets.ll
noFalignAfterCallAtO2.ll
no_struct_element.ll
noreturn-noepilog.ll
noreturn-notail.ll
noreturn-stack-elim.ll
not-op.ll
ntstbit.ll UpdateTestChecks: hexagon support 2019-06-05 14:08:01 +00:00
nv_store_vec.ll
opt-addr-mode-subreg-use.ll OpaquePtr: Update more tests to use typed sret 2020-11-20 20:08:43 -05:00
opt-addr-mode.ll
opt-fabs.ll
opt-fneg.ll
opt-glob-addrs-000.ll
opt-glob-addrs-001.ll
opt-glob-addrs-003.ll
opt-sext-intrinsics.ll
opt-spill-volatile.ll
optimize-mux.ll
packed-store.ll
packetize-allocframe.ll [CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree 2021-01-02 01:01:19 +03:00
packetize-call-r29.ll
packetize-cfi-location.ll
packetize-dccleana.mir
packetize-debug-loc.mir
packetize-frame-setup-destroy.mir
packetize-impdef-1.ll [Hexagon] Use InstSimplify instead of ConstantProp 2020-08-04 15:42:39 -07:00
packetize-impdef.ll
packetize-l2fetch.ll
packetize-load-store-aliasing.mir
packetize-nvj-no-prune.mir
packetize-nvstore.mir
packetize-return-arg.ll
packetize-tailcall-arg.ll
packetize-update-offset.mir
packetize-vgather-slot01.mir [Hexagon] Avoid creating 5-instruction packets with vgather pseudos 2019-03-06 17:43:50 +00:00
packetize-volatiles.ll
packetize_cond_inst.ll
packetizer-resources.ll [DFAPacketizer] Use DFAEmitter. NFC. 2019-10-17 08:34:29 +00:00
partword-cmpxchg.ll Handle part-word LL/SC in atomic expansion pass 2020-04-28 10:07:39 -05:00
peephole-kill-flags.ll
peephole-move-phi.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
peephole-op-swap.ll
phi-elim.ll
pic-jt-big.ll [test] Fix tests when run on windows after SVN r369426. NFC. 2019-08-20 20:58:02 +00:00
pic-jumptables.ll
pic-local.ll
pic-regusage.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
pic-sdata.ll [test] Fix tests when run on windows after SVN r369426. NFC. 2019-08-20 20:58:02 +00:00
pic-simple.ll
pic-static.ll
plt-rel.ll
pmpyw_acc.ll
post-inc-aa-metadata.ll
post-ra-kill-update.mir
postinc-aggr-dag-cycle.ll
postinc-baseoffset.mir
postinc-float.ll
postinc-load.ll
postinc-offset.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
postinc-order.ll
postinc-store.ll
postra-sink-subregs.mir
pred-absolute-store.ll
pred-gp.ll
pred-instrs.ll
pred-sched.ll
pred-simp.ll
pred-taken-jump.ll
predicate-copy.ll
predicate-logical.ll
predicate-rcmp.ll
predtfrs.ll
prefetch-intr.ll
prefetch-shuffler-ice.ll
prob-types.ll
prof-early-if.ll Revert "Include static prof data when collecting loop BBs" 2020-03-24 09:41:16 -07:00
propagate-vcombine.ll
ps_call_nr.ll
rdf-copy-renamable-reserved.mir
rdf-copy-undef.ll
rdf-copy-undef2.ll
rdf-copy.ll
rdf-cover-use.ll
rdf-dead-loop.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
rdf-def-mask.ll
rdf-ehlabel-live.mir
rdf-extra-livein.ll
rdf-filter-defs.ll
rdf-ignore-undef.ll [NFC] Make tests more robust for new optimizations 2019-05-25 14:10:20 +00:00
rdf-inline-asm-fixed.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
rdf-inline-asm.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
rdf-kill-last-op.ll
rdf-multiple-phis-up.ll
rdf-phi-shadows.ll
rdf-phi-up.ll
rdf-reset-kills.ll
readcyclecounter.ll
redundant-branching2.ll Revert [MBP] Disable aggressive loop rotate in plain mode 2019-08-29 19:03:58 +00:00
reg-by-name.ll [Hexagon] Handle remaining registers in getRegisterByName() 2019-10-29 08:56:01 -05:00
reg-eq-cmp.ll
reg-scav-imp-use-dbl-vec.ll
reg-scavengebug-2.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
reg-scavengebug-3.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
reg-scavengebug-4.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
reg-scavengebug-5.ll
reg-scavengebug.ll [NFC] Make tests more robust for new optimizations 2019-05-25 14:10:20 +00:00
reg-scavenger-valid-slot.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
reg_seq.ll
regalloc-bad-undef.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
regalloc-block-overlap.ll [NFC] Make tests more robust for new optimizations 2019-05-25 14:10:20 +00:00
regalloc-coal-extend-short-subrange.mir [RegisterCoalescer] Extend a subrange if needed when filling range gap 2020-05-04 16:49:59 -05:00
regalloc-coal-fullreg-undef.mir
regalloc-liveout-undef.mir
registerpassbuildercallbacks.ll [NPM] Add target specific hook to add passes for New Pass Manager 2020-09-30 13:29:43 -07:00
registerscav-missing-spill-slot.ll
registerscavenger-fail1.ll
regp-underflow.ll
regscav-wrong-super-sub-regs.ll
regscavenger_fail_hwloop.ll
regscavengerbug.ll OpaquePtr: Update more tests to use typed sret 2020-11-20 20:08:43 -05:00
relax.ll
remove-endloop.ll
remove_lsr.ll
restore-single-reg.ll
ret-struct-by-val.ll
retval-redundant-copy.ll
rotate-multi.ll Add more rotate tests, including ORs of rotates 2019-03-21 17:14:22 +00:00
rotate.ll Add more rotate tests, including ORs of rotates 2019-03-21 17:14:22 +00:00
rotl-i64.ll
runtime-stkchk.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
save-kill-csr.ll
save-regs-thresh.ll
sdata-array.ll
sdata-basic.ll
sdata-expand-const.ll
sdata-explicit-section.ll
sdata-load-size.ll
sdata-opaque-type.ll
sdata-stack-guard.ll
sdiv-minsigned.ll
sdr-basic.ll
sdr-global.mir [Hexagon] Fix two testcase errors 2019-11-20 15:06:35 -06:00
sdr-nosplit1.ll
sdr-reg-profit.ll
sdr-shr32.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
section_7275.ll
select-instr-align.ll
setmemrefs.ll
sf-min-max.ll
sffms.ll
sfmin_dce.ll
sfmpyacc_scale.ll
shrink-frame-basic.ll
signed_immediates.ll
signext-inreg.ll [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG for vector type as 'expand' instead of 'legal' 2020-01-03 03:26:41 +00:00
simple_addend.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
simpletailcall.ll
simplify64bitops_7223.ll
spill-vector-alignment.mir [Hexagon] Fix vector spill expansion to use proper alignment 2019-11-12 09:43:21 -06:00
split-const32-const64.ll
split-muxii.ll
split-vecpred.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
stack-align-reset.ll
stack-align1.ll
stack-align2.ll
stack-alloca1.ll
stack-alloca2.ll
stack-guard-acceptable-type.ll
static.ll
store-AbsSet.ll
store-abs.ll
store-constant.ll
store-imm-amode.ll
store-imm-byte.ll
store-imm-halword.ll
store-imm-large-stack.ll
store-imm-stack-object.ll
store-imm-word.ll
store-shift.ll
store-vector-pred.ll [Hexagon] Implement llvm.masked.load and llvm.masked.store for HVX 2020-08-26 13:10:22 -05:00
store-widen-aliased-load.ll
store-widen-negv.ll
store-widen-negv2.ll
store-widen-subreg.ll
store-widen.ll
store1.ll
store_abs.ll
storerd-io-over-rr.ll
storerinewabs.ll
struct-const.ll
struct_args.ll
struct_args_large.ll OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
struct_copy.ll
struct_copy_sched_r16.ll
sub-add.ll
subh-shifted.ll
subh.ll
subi-asl.ll [DAGCombiner] Combine OR as ADD when no common bits are set 2019-04-23 10:01:08 +00:00
switch-lut-explicit-section.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
switch-lut-function-section.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
switch-lut-multiple-functions.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
switch-lut-text-section.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
swp-art-deps-rec.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-bad-sched.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-badorder.ll
swp-carried-1.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-carried-dep1.mir [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-carried-dep2.mir [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-chain-refs.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-change-dep-cycle.ll
swp-change-dep.ll
swp-change-dep1.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-change-deps.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-check-offset.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-const-tc.ll
swp-const-tc1.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-const-tc2.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-const-tc3.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-conv3x3-nested.ll [ModuloSchedule] Fix modulo expansion for data loop carried dependencies. 2019-11-11 12:09:27 -08:00
swp-copytophi-dag.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-crash-iter.ll [Pipeliner] Fix an assertion caused by iterator invalidation. 2019-11-14 13:08:06 -06:00
swp-cse-phi.ll
swp-dag-phi.ll
swp-dag-phi1.ll
swp-dead-regseq.ll
swp-dep-neg-offset.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-disable-Os.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-epilog-numphis.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-epilog-phi2.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-epilog-phi4.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-epilog-phi5.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-epilog-phi6.ll
swp-epilog-phi7.ll [MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduceLoopCount 2019-09-21 08:19:41 +00:00
swp-epilog-phi8.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-epilog-phi9.ll [Hexagon] Remove icmp undef from reduced tests 2019-03-15 15:07:44 +00:00
swp-epilog-phi10.ll [SimplifyCFG] Teach removeUndefIntroducingPredecessor to preserve DomTree 2021-01-02 01:01:20 +03:00
swp-epilog-phi11.ll
swp-epilog-phi12.ll [ModuloSchedule] Fix a bug in experimental expander 2019-11-23 16:01:47 -08:00
swp-epilog-phi13.ll [ModuloSchedule] Fix epilogue peeling with illegal phi. 2020-05-07 10:04:05 -07:00
swp-epilog-reuse-1.ll
swp-epilog-reuse.ll
swp-epilog-reuse2.ll
swp-epilog-reuse3.ll
swp-epilog-reuse4.ll
swp-exit-fixup.ll
swp-fix-last-use.ll
swp-fix-last-use1.ll
swp-intreglow8.ll
swp-kernel-last-use.ll
swp-kernel-phi1.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-large-rec.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-listen-loop3.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-loop-carried-crash.ll
swp-loop-carried-unknown.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-loop-carried.ll
swp-loopval.ll
swp-lots-deps.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-matmul-bitext.ll
swp-max-stage3.ll
swp-max.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-maxstart.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-memrefs-epilog.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-more-phi.ll
swp-multi-loops.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-multi-phi-refs.ll
swp-new-phi.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-node-order.ll
swp-order-carried.ll
swp-order-copies.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-order-deps1.ll
swp-order-deps3.ll [SimplifyCFG] Teach removeUndefIntroducingPredecessor to preserve DomTree 2021-01-02 01:01:20 +03:00
swp-order-deps4.ll
swp-order-deps5.ll
swp-order-deps6.ll
swp-order-deps7.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-order-prec.ll
swp-order.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-order1.ll
swp-phi-ch-offset.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-phi-chains.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-phi-def-use.ll
swp-phi-dep.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-phi-dep1.ll
swp-phi-order.ll
swp-phi-ref.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-phi-ref1.ll
swp-phi-start.ll
swp-phi.ll
swp-physreg.ll
swp-pragma-disable-bug.ll [Pipeliner] Fix the bug in pragma that disables the pipeliner. 2020-04-10 12:52:16 -05:00
swp-pragma-disable.ii [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-pragma-initiation-interval-reset.ii [MachinePipeliner] Fix II_setByPragma initialization 2020-09-09 13:38:35 +00:00
swp-pragma-initiation-interval.ii [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-prolog-phi.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
swp-prolog-phi4.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
swp-regseq.ll
swp-remove-dep-ice.ll
swp-rename-dead-phi.ll
swp-rename.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-replace-uses1.ll
swp-resmii-1.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-resmii.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-reuse-phi-1.ll
swp-reuse-phi-2.ll
swp-reuse-phi-4.ll [SimplifyCFG] Teach removeUndefIntroducingPredecessor to preserve DomTree 2021-01-02 01:01:20 +03:00
swp-reuse-phi-5.ll
swp-reuse-phi-6.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-reuse-phi.ll
swp-sigma.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
swp-stages.ll
swp-stages3.ll
swp-stages4.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
swp-stages5.ll [ModuloSchedule] removeBranch() *before* creating the trip count condition 2019-10-03 17:10:32 +00:00
swp-subreg.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-swap.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-tfri.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-vect-dotprod.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-vmult.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-vsum.ll [ModuloSchedule] Peel out prologs and epilogs, generate actual code 2019-10-02 12:46:44 +00:00
swp-xxh2.ll
tail-call-mem-intrinsics.ll
tail-call-trunc.ll
tail-dup-subreg-abort.ll
tail-dup-subreg-map.ll OpaquePtr: Bulk update tests to use typed sret 2020-11-20 17:58:26 -05:00
tailcall_fastcc_ccc.ll
target-flag-ext.mir
tc_duplex.ll [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
tc_duplex_asm.ll [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
tc_sched.ll [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
tc_sched1.ll [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
tcm-zext.ll
testbits.ll
tfr-cleanup.ll
tfr-mux-nvj.ll
tfr-to-combine.ll
tied_oper.ll
tiny_bkfir_artdeps.ll [Hexagon] Add REQUIRES: asserts to a testcase using -debug-only 2020-01-21 13:22:01 -06:00
tiny_bkfir_loop_align.ll [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
tinycore.ll [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
tls_gd.ll
tls_pic.ll
tls_static.ll [test] Add explicit dso_local to definitions in ELF static relocation model tests 2020-12-30 15:47:16 -08:00
trap-crash.ll [Hexagon] Use misaligned load instead of trap0(#0) for __builtin_trap 2019-02-21 19:42:39 +00:00
trap-unreachable.ll [Hexagon] Use misaligned load instead of trap0(#0) for __builtin_trap 2019-02-21 19:42:39 +00:00
trivialmemaliascheck.ll
trunc-mpy.ll
tstbit.ll [Hexagon] Improve generated code for test-if-bit-clear, one more time 2019-09-04 15:22:36 +00:00
two-addr-tied-subregs.mir
two-crash.ll
twoaddressbug.ll
undef-ret.ll
undo-dag-shift.ll
union-1.ll
unordered-fcmp.ll
unreachable-mbb-phi-subreg.mir
upper-mpy.ll
usr-ovf-dep.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
v5_insns.ll
v6-inlasm1.ll
v6-inlasm2.ll
v6-inlasm3.ll
v6-inlasm4.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v6-shuffl.ll
v6-spill1.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v6-unaligned-spill.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v6-vecpred-copy.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v6vassignp.ll
v6vec-vmemcur-prob.mir
v6vec-vmemu1.ll
v6vec-vmemu2.ll
v6vec-vprint.ll Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351 2019-12-24 15:57:33 -08:00
v6vec-vshuff.ll
v6vec_inc1.ll
v6vec_zero.ll
v6vect-dbl-fail1.ll
v6vect-dbl-spill.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v6vect-dbl.ll
v6vect-dh1.ll
v6vect-locals1.ll OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
v6vect-no-sideeffects.ll [Hexagon] Realign HVX vectors wherever possible 2020-12-09 17:11:25 -06:00
v6vect-pred2.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v6vect-spill-kill.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v6vect-vmem1.ll
v6vect-vsplat.ll
v60-align.ll
v60-cur.ll
v60-haar-postinc.ll
v60-halide-vcombinei8.ll
v60-vec-128b-1.ll
v60-vecpred-spill.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v60-vsel1.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v60-vsel2.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v60Intrins.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v60Vasr.ll
v60_Q6_P_rol_PI.ll
v60_sort16.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
v60rol-instrs.ll
v60small.ll [Hexagon] Fix match pattern in a testcase 2020-03-09 09:09:58 -05:00
v62-CJAllSlots.ll
v62-inlasm4.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
vacopy.ll Add support for Linux/Musl ABI 2020-01-20 09:59:56 -06:00
vadd1.ll
vaddh.ll
validate-offset.ll
vararg-deallocate-sp.ll Add support for Linux/Musl ABI 2020-01-20 09:59:56 -06:00
vararg-formal.ll
vararg-linux-abi.ll Add support for Linux/Musl ABI 2020-01-20 09:59:56 -06:00
vararg.ll OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
vararg_align_check.ll OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
vararg_double_onstack.ll OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
vararg_named.ll OpaquePtr: Bulk update tests to use typed byval 2020-11-20 14:00:46 -05:00
varargs-memv.ll
vassign-to-combine.ll
vcombine128_to_req_seq.ll
vcombine_subreg.ll
vcombine_to_req_seq.ll
vdmpy-halide-test.ll
vdotprod.ll
vec-align.ll
vec-call-full1.ll
vec-pred-spill1.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
vec-vararg-align.ll
vecPred2Vec.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
vect-any_extend.ll
vect-dbl-post-inc.ll
vect-downscale.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
vect-regpairs.ll [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
vect-set_cc_v2i32.ll
vect-vd0.ll
vect-zero_extend.ll
vect_setcc.ll
vect_setcc_v2i16.ll
vector-align.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
vector-ext-load.ll
verify-liveness-at-def.mir Extend LaneBitmask to 64 bit 2020-03-02 12:10:52 -08:00
verify-sink-code.ll
verify-undef.ll
vextract-basic.mir
vgather-packetize.mir [Hexagon] Add missing live-in registers in some codegen tests 2020-04-23 10:28:04 -05:00
vload-postinc-sel.ll
vmemu-128.ll
vmpa-halide-test.ll
vpack_eo.ll
vrcmpys.ll [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
vselect-pseudo.ll [Hexagon] Change HVX vector predicate types from v512/1024i1 to v64/128i1 2020-02-19 14:14:56 -06:00
vsplat-ext.ll
vsplat-isel.ll
wcsrtomb.ll
zextloadi1.ll