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llvm-project/mlir/integration_test/Dialect
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aartbik 6404fb428a [mlir] [VectorOps] [integration-test] Add i64 typed outer product 
Yields proper SIMD vpmullq/vpaddq on x86.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D83328
 		2020-07-07 12:34:41 -07:00
..
LLVMIR/CPU [mlir] [VectorOps] Extend vector reduction integration test with reassoc=true cases. 2020-06-29 13:28:20 -07:00
Vector/CPU [mlir] [VectorOps] [integration-test] Add i64 typed outer product 2020-07-07 12:34:41 -07:00