llvm-project/llvm/lib/Target/MSP430
Fangrui Song 3d87d0b925 [MC] Add parameter `Address` to MCInstrPrinter::printInstruction
Follow-up of D72172.

Reviewed By: jhenderson, rnk

Differential Revision: https://reviews.llvm.org/D72180
2020-01-06 20:44:14 -08:00
..
AsmParser [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
Disassembler [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
MCTargetDesc [MC] Add parameter `Address` to MCInstrPrinter::printInstruction 2020-01-06 20:44:14 -08:00
TargetInfo [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
CMakeLists.txt [MSP430] Move InstPrinter files to MCTargetDesc. NFC 2019-05-11 01:58:52 +00:00
LLVMBuild.txt [MSP430] Move InstPrinter files to MCTargetDesc. NFC 2019-05-11 01:58:52 +00:00
MSP430.h
MSP430.td
MSP430AsmPrinter.cpp [MSP430] Allow msp430_intrcc functions to not have interrupt attribute. 2019-09-25 18:58:07 +00:00
MSP430BranchSelector.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
MSP430CallingConv.td
MSP430FrameLowering.cpp
MSP430FrameLowering.h Use Align for TFL::TransientStackAlignment 2019-10-21 08:31:25 +00:00
MSP430ISelDAGToDAG.cpp MSP430 - fix uninitialized variable warnings. NFCI. 2019-11-14 14:21:16 +00:00
MSP430ISelLowering.cpp [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (4) 2019-11-13 09:23:08 +01:00
MSP430ISelLowering.h [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (4) 2019-11-13 09:23:08 +01:00
MSP430InstrFormats.td
MSP430InstrInfo.cpp Use MCRegister in copyPhysReg 2019-11-11 14:42:33 +05:30
MSP430InstrInfo.h Use MCRegister in copyPhysReg 2019-11-11 14:42:33 +05:30
MSP430InstrInfo.td
MSP430MCInstLower.cpp
MSP430MCInstLower.h
MSP430MachineFunctionInfo.cpp
MSP430MachineFunctionInfo.h MSP430 - fix uninitialized variable warnings. NFCI. 2019-11-14 14:21:16 +00:00
MSP430RegisterInfo.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
MSP430RegisterInfo.h CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
MSP430RegisterInfo.td
MSP430Subtarget.cpp
MSP430Subtarget.h MSP430 - fix uninitialized variable warnings. NFCI. 2019-11-14 14:21:16 +00:00
MSP430TargetMachine.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
MSP430TargetMachine.h
README.txt

README.txt

//===---------------------------------------------------------------------===//
// MSP430 backend.
//===---------------------------------------------------------------------===//

DISCLAIMER: This backend should be considered as highly experimental. I never
seen nor worked with this MCU, all information was gathered from datasheet
only. The original intention of making this backend was to write documentation
of form "How to write backend for dummies" :) Thes notes hopefully will be
available pretty soon.

Some things are incomplete / not implemented yet (this list surely is not
complete as well):

1. Verify, how stuff is handling implicit zext with 8 bit operands (this might
be modelled currently in improper way - should we need to mark the superreg as
def for every 8 bit instruction?).

2. Libcalls: multiplication, division, remainder. Note, that calling convention
for libcalls is incomptible with calling convention of libcalls of msp430-gcc
(these cannot be used though due to license restriction).

3. Implement multiplication / division by constant (dag combiner hook?).

4. Implement non-constant shifts.

5. Implement varargs stuff.

6. Verify and fix (if needed) how's stuff playing with i32 / i64.

7. Implement floating point stuff (softfp?)

8. Implement instruction encoding for (possible) direct code emission in the
future.

9. Since almost all instructions set flags - implement brcond / select in better
way (currently they emit explicit comparison).

10. Handle imm in comparisons in better way (see comment in MSP430InstrInfo.td)

11. Implement hooks for better memory op folding, etc.