forked from OSchip/llvm-project
e745f7c563
The code previously used two BUILD_PAIRs to concatenate the two UMULO results with 0s in the lower bits to match original VT. Then it created an ADD and a UADDO with the original bit width. Each of those operations need to be expanded since they have illegal types. Since we put 0s in the lower bits before the ADD, the lower half of the ADD result will be 0. So the lower half of the UADDO result is solely determined by the other operand. Since the UADDO need to be split in half, we don't really needd an operation for the lower bits. Unfortunately, we don't see that in type legalization and end up creating something more complicated and DAG combine or lowering aren't always able to recover it. This patch directly generates the narrower ADD and UADDO to avoid needing to legalize them. Now only the MUL is done on the original type. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D97440 |
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.. | ||
32abi.ll | ||
64abi.ll | ||
64atomics.ll | ||
64bit.ll | ||
64cond.ll | ||
64spill.ll | ||
2006-01-22-BitConvertLegalize.ll | ||
2007-05-09-JumpTables.ll | ||
2007-07-05-LiveIntervalAssert.ll | ||
2008-10-10-InlineAsmMemoryOperand.ll | ||
2008-10-10-InlineAsmRegOperand.ll | ||
2009-08-28-PIC.ll | ||
2009-08-28-WeakLinkage.ll | ||
2011-01-11-CC.ll | ||
2011-01-11-Call.ll | ||
2011-01-11-FrameAddr.ll | ||
2011-01-19-DelaySlot.ll | ||
2011-01-21-ByValArgs.ll | ||
2011-01-22-SRet.ll | ||
2011-12-03-TailDuplication.ll | ||
2012-05-01-LowerArguments.ll | ||
2013-05-17-CallFrame.ll | ||
DbgValueOtherTargets.test | ||
LeonCASAInstructionUT.ll | ||
LeonDetectRoundChangePassUT.ll | ||
LeonFixAllFDIVSQRTPassUT.ll | ||
LeonInsertNOPLoadPassUT.ll | ||
LeonItinerariesUT.ll | ||
LeonSMACUMACInstructionUT.ll | ||
analyze-branch.ll | ||
atomics.ll | ||
basictest.ll | ||
blockaddr.ll | ||
cast-sret-func.ll | ||
codemodel.ll | ||
constpool.ll | ||
constructor.ll | ||
ctpop.ll | ||
disable-fsmuld-fmuls.ll | ||
empty-functions.ll | ||
exception.ll | ||
fail-alloca-align.ll | ||
float-constants.ll | ||
float.ll | ||
fp16-promote.ll | ||
fp128-split.ll | ||
fp128.ll | ||
fshl.ll | ||
func-addr.ll | ||
globals.ll | ||
imm.ll | ||
inline-asm-i-constraint-i1.ll | ||
inlineasm-bad.ll | ||
inlineasm-output-template.ll | ||
inlineasm-v9.ll | ||
inlineasm.ll | ||
leafproc.ll | ||
lit.local.cfg | ||
mature-mc-support.ll | ||
missing-sret.ll | ||
missinglabel.ll | ||
mult-alt-generic-sparc.ll | ||
multiple-div.ll | ||
obj-relocs.ll | ||
parts.ll | ||
pic.ll | ||
private.ll | ||
readcycle.ll | ||
reg64.ll | ||
register-clobber.ll | ||
rem.ll | ||
reserved-regs.ll | ||
select-mask.ll | ||
sethiandn.ll | ||
setjmp.ll | ||
soft-float.ll | ||
soft-mul-div.ll | ||
spill.ll | ||
spillsize.ll | ||
sret-secondary.ll | ||
stack-align.ll | ||
stack-protector.ll | ||
thread-pointer.ll | ||
tls.ll | ||
trap.ll | ||
umulo-128-legalisation-lowering.ll | ||
varargs-v8.ll | ||
varargs.ll | ||
vector-call.ll | ||
vector-extract-elt.ll | ||
zerostructcall.ll |