forked from OSchip/llvm-project
240 lines
6.3 KiB
LLVM
240 lines
6.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
|
|
|
|
define i1 @t32_3_1(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_3_1:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #43691
|
|
; CHECK-NEXT: movk w8, #43690, lsl #16
|
|
; CHECK-NEXT: mov w9, #1431655765
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 3
|
|
%cmp = icmp eq i32 %urem, 1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t32_3_2(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_3_2:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #43691
|
|
; CHECK-NEXT: movk w8, #43690, lsl #16
|
|
; CHECK-NEXT: mov w9, #-1431655766
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #1431655765
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 3
|
|
%cmp = icmp eq i32 %urem, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
|
|
define i1 @t32_5_1(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_5_1:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #52429
|
|
; CHECK-NEXT: movk w8, #52428, lsl #16
|
|
; CHECK-NEXT: mov w9, #858993459
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 5
|
|
%cmp = icmp eq i32 %urem, 1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t32_5_2(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_5_2:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #52429
|
|
; CHECK-NEXT: movk w8, #52428, lsl #16
|
|
; CHECK-NEXT: mov w9, #1717986918
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #858993459
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 5
|
|
%cmp = icmp eq i32 %urem, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t32_5_3(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_5_3:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #52429
|
|
; CHECK-NEXT: movk w8, #52428, lsl #16
|
|
; CHECK-NEXT: mov w9, #-1717986919
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #858993459
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 5
|
|
%cmp = icmp eq i32 %urem, 3
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t32_5_4(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_5_4:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #52429
|
|
; CHECK-NEXT: movk w8, #52428, lsl #16
|
|
; CHECK-NEXT: mov w9, #-858993460
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #858993459
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 5
|
|
%cmp = icmp eq i32 %urem, 4
|
|
ret i1 %cmp
|
|
}
|
|
|
|
|
|
define i1 @t32_6_1(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_6_1:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #43691
|
|
; CHECK-NEXT: movk w8, #43690, lsl #16
|
|
; CHECK-NEXT: mov w9, #1431655765
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #43691
|
|
; CHECK-NEXT: ror w8, w8, #1
|
|
; CHECK-NEXT: movk w9, #10922, lsl #16
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 6
|
|
%cmp = icmp eq i32 %urem, 1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t32_6_2(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_6_2:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #43691
|
|
; CHECK-NEXT: movk w8, #43690, lsl #16
|
|
; CHECK-NEXT: mov w9, #-1431655766
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #43691
|
|
; CHECK-NEXT: ror w8, w8, #1
|
|
; CHECK-NEXT: movk w9, #10922, lsl #16
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 6
|
|
%cmp = icmp eq i32 %urem, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t32_6_3(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_6_3:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #43691
|
|
; CHECK-NEXT: movk w8, #43690, lsl #16
|
|
; CHECK-NEXT: mul w8, w0, w8
|
|
; CHECK-NEXT: sub w8, w8, #1 // =1
|
|
; CHECK-NEXT: mov w9, #43691
|
|
; CHECK-NEXT: ror w8, w8, #1
|
|
; CHECK-NEXT: movk w9, #10922, lsl #16
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 6
|
|
%cmp = icmp eq i32 %urem, 3
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t32_6_4(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_6_4:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #43691
|
|
; CHECK-NEXT: mov w9, #21844
|
|
; CHECK-NEXT: movk w8, #43690, lsl #16
|
|
; CHECK-NEXT: movk w9, #21845, lsl #16
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #43690
|
|
; CHECK-NEXT: ror w8, w8, #1
|
|
; CHECK-NEXT: movk w9, #10922, lsl #16
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 6
|
|
%cmp = icmp eq i32 %urem, 4
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t32_6_5(i32 %X) nounwind {
|
|
; CHECK-LABEL: t32_6_5:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #43691
|
|
; CHECK-NEXT: mov w9, #43689
|
|
; CHECK-NEXT: movk w8, #43690, lsl #16
|
|
; CHECK-NEXT: movk w9, #43690, lsl #16
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #43690
|
|
; CHECK-NEXT: ror w8, w8, #1
|
|
; CHECK-NEXT: movk w9, #10922, lsl #16
|
|
; CHECK-NEXT: cmp w8, w9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i32 %X, 6
|
|
%cmp = icmp eq i32 %urem, 5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
;-------------------------------------------------------------------------------
|
|
; Other widths.
|
|
|
|
define i1 @t16_3_2(i16 %X) nounwind {
|
|
; CHECK-LABEL: t16_3_2:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-21845
|
|
; CHECK-NEXT: mov w9, #-21846
|
|
; CHECK-NEXT: madd w8, w0, w8, w9
|
|
; CHECK-NEXT: mov w9, #21845
|
|
; CHECK-NEXT: cmp w9, w8, uxth
|
|
; CHECK-NEXT: cset w0, hi
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i16 %X, 3
|
|
%cmp = icmp eq i16 %urem, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t8_3_2(i8 %X) nounwind {
|
|
; CHECK-LABEL: t8_3_2:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov w8, #-85
|
|
; CHECK-NEXT: mul w8, w0, w8
|
|
; CHECK-NEXT: sub w8, w8, #86 // =86
|
|
; CHECK-NEXT: and w8, w8, #0xff
|
|
; CHECK-NEXT: cmp w8, #85 // =85
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i8 %X, 3
|
|
%cmp = icmp eq i8 %urem, 2
|
|
ret i1 %cmp
|
|
}
|
|
|
|
define i1 @t64_3_2(i64 %X) nounwind {
|
|
; CHECK-LABEL: t64_3_2:
|
|
; CHECK: // %bb.0:
|
|
; CHECK-NEXT: mov x8, #-6148914691236517206
|
|
; CHECK-NEXT: movk x8, #43691
|
|
; CHECK-NEXT: mov x9, #-6148914691236517206
|
|
; CHECK-NEXT: madd x8, x0, x8, x9
|
|
; CHECK-NEXT: mov x9, #6148914691236517205
|
|
; CHECK-NEXT: cmp x8, x9
|
|
; CHECK-NEXT: cset w0, lo
|
|
; CHECK-NEXT: ret
|
|
%urem = urem i64 %X, 3
|
|
%cmp = icmp eq i64 %urem, 2
|
|
ret i1 %cmp
|
|
}
|