forked from OSchip/llvm-project
378 lines
7.8 KiB
YAML
378 lines
7.8 KiB
YAML
# Strip out debug info, then run ldst-opt with limit=1.
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# RUN: llc -aarch64-load-store-scan-limit=1 -mtriple=aarch64-none-linux-gnu -run-pass mir-strip-debug,aarch64-ldst-opt -mir-strip-debugify-only=0 -verify-machineinstrs -o - %s | FileCheck %s
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#
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# Run ldst-opt with limit=1, then strip out debug info.
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# RUN: llc -aarch64-load-store-scan-limit=1 -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-opt,mir-strip-debug -mir-strip-debugify-only=0 -verify-machineinstrs -o - %s | FileCheck %s
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---
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### STG and its offset limits
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# CHECK-LABEL: name: test_STG_post
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# CHECK: STGPostIndex $x0, $x0, 7
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name: test_STG_post
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body: |
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bb.0.entry:
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liveins: $x0
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STGOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STG_post_same_reg
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# CHECK: STGPostIndex $x1, $x0, 7
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name: test_STG_post_same_reg
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body: |
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bb.0.entry:
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liveins: $x0, $x1
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STGOffset $x1, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STG_post_unaligned
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# CHECK: STGOffset $x0, $x0, 0
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# CHECK-NEXT: ADDXri $x0, 8, 0
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name: test_STG_post_unaligned
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body: |
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bb.0.entry:
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liveins: $x0
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STGOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 8, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STG_post2
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# CHECK: STGPostIndex $x0, $x0, -256
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name: test_STG_post2
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body: |
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bb.0.entry:
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liveins: $x0
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STGOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = SUBXri $x0, 4096, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STG_post3
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# CHECK: STGOffset $x0, $x0, 0
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# CHECK-NEXT: SUBXri $x0, 4112, 0
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name: test_STG_post3
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body: |
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bb.0.entry:
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liveins: $x0
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STGOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = SUBXri $x0, 4112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STG_post4
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# CHECK: STGPostIndex $x0, $x0, 255
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name: test_STG_post4
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body: |
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bb.0.entry:
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liveins: $x0
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STGOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 4080, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STG_post5
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# CHECK: STGOffset $x0, $x0, 0
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# CHECK-NEXT: ADDXri $x0, 4096, 0
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name: test_STG_post5
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body: |
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bb.0.entry:
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liveins: $x0
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STGOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 4096, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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### The rest of ST*G variants.
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# CHECK-LABEL: name: test_STZG_post
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# CHECK: STZGPostIndex $x0, $x0, 7
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name: test_STZG_post
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body: |
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bb.0.entry:
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liveins: $x0
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STZGOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_ST2G_post
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# CHECK: ST2GPostIndex $x0, $x0, 7
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name: test_ST2G_post
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body: |
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bb.0.entry:
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liveins: $x0
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ST2GOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STZ2G_post
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# CHECK: STZ2GPostIndex $x0, $x0, 7
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name: test_STZ2G_post
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body: |
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bb.0.entry:
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liveins: $x0
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STZ2GOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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### STGP and its offset limits
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# CHECK-LABEL: name: test_STGP_post
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# CHECK: STGPpost $x1, $x2, $x0, 7
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name: test_STGP_post
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $x2
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STGPi $x1, $x2, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STGP_post2
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# CHECK: STGPpost $x1, $x2, $x0, -64
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name: test_STGP_post2
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $x2
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STGPi $x1, $x2, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = SUBXri $x0, 1024, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STGP_post3
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# CHECK: STGPi $x1, $x2, $x0, 0
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# CHECK-NEXT: SUBXri $x0, 1040, 0
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name: test_STGP_post3
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $x2
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STGPi $x1, $x2, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = SUBXri $x0, 1040, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STGP_post4
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# CHECK: STGPpost $x1, $x2, $x0, 63
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name: test_STGP_post4
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $x2
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STGPi $x1, $x2, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 1008, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STGP_post5
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# CHECK: STGPi $x1, $x2, $x0, 0
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# CHECK-NEXT: ADDXri $x0, 1024, 0
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name: test_STGP_post5
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $x2
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STGPi $x1, $x2, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 1024, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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### Pre-indexed forms
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# CHECK-LABEL: name: test_STG_pre
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# CHECK: STGPreIndex $x0, $x0, 10
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name: test_STG_pre
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body: |
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bb.0.entry:
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liveins: $x0
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STGOffset $x0, $x0, 10
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 160, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STGP_pre
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# CHECK: STGPpre $x1, $x2, $x0, 10
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name: test_STGP_pre
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $x2
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STGPi $x1, $x2, $x0, 10
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 160, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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### Pre-indexed forms with add/sub coming before the store.
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# CHECK-LABEL: name: test_STG_pre_back
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# CHECK: STGPreIndex $x0, $x0, 2
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name: test_STG_pre_back
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body: |
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bb.0.entry:
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liveins: $x0
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$x0 = ADDXri $x0, 32, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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STGOffset $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STGP_pre_back
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# CHECK: STGPpre $x1, $x2, $x0, -3
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name: test_STGP_pre_back
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body: |
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bb.0.entry:
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liveins: $x0, $x1, $x2
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$x0 = SUBXri $x0, 48, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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STGPi $x1, $x2, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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### STGP with source register == address register
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# CHECK-LABEL: name: test_STGP_post_same_reg
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# CHECK: STGPpost $x0, $x0, $x0, 7
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name: test_STGP_post_same_reg
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body: |
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bb.0.entry:
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liveins: $x0
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STGPi $x0, $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# CHECK-LABEL: name: test_STGP_pre_same_reg
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# CHECK: STGPpre $x0, $x0, $x0, 7
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name: test_STGP_pre_same_reg
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body: |
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bb.0.entry:
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liveins: $x0
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STGPi $x0, $x0, $x0, 7
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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$x0 = ADDXri $x0, 112, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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# This case can not be merged because the source register is always read before writeback.
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# CHECK-LABEL: name: test_STGP_pre_back_same_reg
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# CHECK: SUBXri $x0, 48, 0
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# CHECK-NEXT: STGPi $x0, $x0, $x0, 0
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name: test_STGP_pre_back_same_reg
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body: |
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bb.0.entry:
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liveins: $x0
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$x0 = SUBXri $x0, 48, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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STGPi $x0, $x0, $x0, 0
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DBG_VALUE $x0, 0
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DBG_VALUE $x0, 0
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RET_ReallyLR implicit $x0
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...
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