llvm-project/llvm/test/MC/Hexagon/quad_regs.s

6 lines
243 B
ArmAsm

# RUN: llvm-mc -arch=hexagon -mcpu=hexagonv66 -mhvx -filetype=obj %s | llvm-objdump --mcpu=hexagonv66 --mhvx -d - | FileCheck %s
# Test for quad register parsing and printing
# CHECK: { v3:0.w = vrmpyz(v0.b,r0.b) }
v3:0.w = vrmpyz(v0.b,r0.b)