forked from OSchip/llvm-project
114 lines
3.0 KiB
LLVM
114 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefix=RV32I
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define i32 @square(i32 %a) {
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; RV32I-LABEL: square:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: lui a1, %hi(__mulsi3)
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; RV32I-NEXT: addi a2, a1, %lo(__mulsi3)
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; RV32I-NEXT: mv a1, a0
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; RV32I-NEXT: jalr a2
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = mul i32 %a, %a
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ret i32 %1
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}
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define i32 @mul(i32 %a, i32 %b) {
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; RV32I-LABEL: mul:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: lui a2, %hi(__mulsi3)
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; RV32I-NEXT: addi a2, a2, %lo(__mulsi3)
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; RV32I-NEXT: jalr a2
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = mul i32 %a, %b
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ret i32 %1
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}
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define i32 @mul_constant(i32 %a) {
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; RV32I-LABEL: mul_constant:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: lui a1, %hi(__mulsi3)
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; RV32I-NEXT: addi a2, a1, %lo(__mulsi3)
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; RV32I-NEXT: addi a1, zero, 5
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; RV32I-NEXT: jalr a2
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = mul i32 %a, 5
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ret i32 %1
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}
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define i32 @mul_pow2(i32 %a) {
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; RV32I-LABEL: mul_pow2:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: slli a0, a0, 3
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = mul i32 %a, 8
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ret i32 %1
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}
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define i64 @mul64(i64 %a, i64 %b) {
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; RV32I-LABEL: mul64:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: lui a4, %hi(__muldi3)
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; RV32I-NEXT: addi a4, a4, %lo(__muldi3)
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; RV32I-NEXT: jalr a4
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = mul i64 %a, %b
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ret i64 %1
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}
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define i64 @mul64_constant(i64 %a) {
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; RV32I-LABEL: mul64_constant:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: sw s0, 8(sp)
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; RV32I-NEXT: addi s0, sp, 16
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; RV32I-NEXT: lui a2, %hi(__muldi3)
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; RV32I-NEXT: addi a4, a2, %lo(__muldi3)
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; RV32I-NEXT: addi a2, zero, 5
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; RV32I-NEXT: mv a3, zero
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; RV32I-NEXT: jalr a4
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; RV32I-NEXT: lw s0, 8(sp)
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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%1 = mul i64 %a, 5
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ret i64 %1
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}
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