llvm-project/llvm/test/CodeGen/MIR/Generic
Puyan Lotfi f63b64c0c3 [llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands.
This patch makes it so that cases where multiple instructions that
differ only in their ConstantInt or ConstantFP MachineOperand values no
longer collide. For instance:

%0:_(s1) = G_CONSTANT i1 true
%1:_(s1) = G_CONSTANT i1 false
%2:_(s32) = G_FCONSTANT float 1.0
%3:_(s32) = G_FCONSTANT float 0.0

Prior to this patch the first two instructions would collide together.
Also, the last two G_FCONSTANT instructions would also collide. Now they
will no longer collide.

Differential Revision: https://reviews.llvm.org/D71558
2019-12-16 18:25:04 -05:00
..
CFPImmMIRCanonHash.mir [llvm][MIRVRegNamerUtils] Adding hashing on CImm / FPImm MachineOperands. 2019-12-16 18:25:04 -05:00
basic-blocks.mir
expected-colon-after-basic-block.mir
expected-mbb-reference-for-successor-mbb.mir
frame-info.mir
global-isel-properties.mir
invalid-jump-table-kind.mir
lit.local.cfg
llvm-ir-error-reported.mir
llvmIR.mir
llvmIRMissing.mir
machine-basic-block-ir-block-reference.mir
machine-basic-block-redefinition-error.mir
machine-basic-block-undefined-ir-block.mir
machine-basic-block-unknown-name.mir
machine-function-missing-body.mir
machine-function-missing-function.mir
machine-function-missing-name.mir
machine-function-redefinition-error.mir
machine-function.mir [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
multiRunPass.mir
parse-integer-true-false.mir
register-info.mir
runPass.mir