llvm-project/llvm/lib/CodeGen
Craig Topper 1687a8d83b [X86][SelectionDAG] Add SADDO_CARRY and SSUBO_CARRY to support multipart signed add/sub overflow legalization.
This passes existing X86 test but I'm not sure if it handles all type
legalization cases it needs to.

Alternative to D89200

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D89222
2020-10-12 23:18:29 -07:00
..
AsmPrinter [DebugInfo] Support for DWARF attribute DW_AT_rank 2020-10-10 17:51:12 +05:30
GlobalISel [GlobalISel][KnownBits] Early return on out of bound shift amounts 2020-10-12 18:39:19 +02:00
LiveDebugValues LiveDebugValues: Fix typos and indentation 2020-09-30 10:35:25 -04:00
MIRParser [NFC] Reformat MILexer.cpp:getIdentifierKind 2020-10-09 15:21:24 +00:00
SelectionDAG [X86][SelectionDAG] Add SADDO_CARRY and SSUBO_CARRY to support multipart signed add/sub overflow legalization. 2020-10-12 23:18:29 -07:00
AggressiveAntiDepBreaker.cpp AggressiveAntiDepBreaker.cpp - remove headers explicitly included in AggressiveAntiDepBreaker.h. NFC. 2020-05-16 15:00:56 +01:00
AggressiveAntiDepBreaker.h [AntidepBreaker] Move AntiDepBreaker to include folder. 2020-04-14 11:40:57 -07:00
AllocationOrder.cpp [NFC][regalloc] Unit test for AllocationOrder iteration. 2020-09-29 10:48:07 -07:00
AllocationOrder.h [NFC][regalloc] Separate iteration from AllocationOrder 2020-10-05 16:13:18 -07:00
Analysis.cpp [CodeGen] Enable tail call position check for speculatable functions 2020-06-03 10:37:45 -05:00
AtomicExpandPass.cpp Align store conditional address 2020-07-30 10:42:00 -05:00
BasicBlockSections.cpp Introduce and use a new section type for the bb_addr_map section. 2020-10-08 11:13:19 -07:00
BasicTargetTransformInfo.cpp
BranchFolding.cpp Fix some clang-tidy bugprone-argument-comment issues 2020-09-19 20:41:25 -07:00
BranchFolding.h Fix some clang-tidy bugprone-argument-comment issues 2020-09-19 20:41:25 -07:00
BranchRelaxation.cpp [AArch64] Enable implicit null check transformation 2020-09-17 16:00:19 -07:00
BreakFalseDeps.cpp [NFC][MC] Type uses of MCRegUnitIterator as MCRegister 2020-10-06 12:09:56 -07:00
BuiltinGCs.cpp
CFGuardLongjmp.cpp Revert rG5dd566b7c7b78bd- "PassManager.h - remove unnecessary Function.h/Module.h includes. NFCI." 2020-07-24 13:02:33 +01:00
CFIInstrInserter.cpp Call Frame Information (CFI) Handling for Basic Block Sections 2020-07-14 12:54:12 -07:00
CMakeLists.txt Revert "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline" 2020-09-11 18:52:32 -07:00
CalcSpillWeights.cpp [NFC][Regalloc] Pass VirtRegMap by reference. 2020-10-12 08:32:30 -07:00
CallingConvLower.cpp Cleanup CodeGen/CallingConvLower.cpp 2020-10-05 14:47:46 -07:00
CodeGen.cpp [NFC] Rename BBSectionsPrepare -> BasicBlockSections. 2020-08-06 13:12:06 -07:00
CodeGenPrepare.cpp [CGP] Limit converting phi types to simple loads and stores 2020-09-14 12:08:34 +01:00
CommandFlags.cpp [AIX] add new option -mignore-xcoff-visibility 2020-10-08 09:34:58 -04:00
CriticalAntiDepBreaker.cpp CriticalAntiDepBreaker.cpp - remove includes directly defined in CriticalAntiDepBreaker.h header. NFC. 2020-05-30 14:32:36 +01:00
CriticalAntiDepBreaker.h [AntidepBreaker] Move AntiDepBreaker to include folder. 2020-04-14 11:40:57 -07:00
DFAPacketizer.cpp
DeadMachineInstructionElim.cpp [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU. 2020-01-14 19:26:15 -05:00
DetectDeadLanes.cpp
DwarfEHPrepare.cpp [DwarfEHPrepare] Don't prune unreachable resumes at optnone 2020-05-23 20:58:01 +02:00
EarlyIfConversion.cpp [NFC][MC] Type uses of MCRegUnitIterator as MCRegister 2020-10-06 12:09:56 -07:00
EdgeBundles.cpp CodeGen/EdgeBundles - move Twine.h include down into EdgeBundles.cpp. NFC. 2020-04-11 12:21:04 +01:00
ExecutionDomainFix.cpp
ExpandMemCmp.cpp TargetLowering.h - remove unnecessary TargetMachine.h include. NFC 2020-05-23 19:49:38 +01:00
ExpandPostRAPseudos.cpp
ExpandReductions.cpp [llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics. 2020-10-07 10:36:44 -07:00
FEntryInserter.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
FaultMaps.cpp [MC] Add MCStreamer::emitInt{8,16,32,64} 2020-02-29 09:40:21 -08:00
FinalizeISel.cpp
FixupStatepointCallerSaved.cpp [Statepoints] Change statepoint machine instr format to better suit VReg lowering. 2020-10-06 17:40:29 +07:00
FuncletLayout.cpp
GCMetadata.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
GCMetadataPrinter.cpp
GCRootLowering.cpp [NFC] Clean up uses of MachineModuleInfoWrapperPass 2020-07-01 09:45:05 -07:00
GCStrategy.cpp
GlobalMerge.cpp [SVE][CodeGen] Replace use of TypeSize operator< in GlobalMerge::doMerge 2020-10-01 14:06:59 +01:00
HardwareLoops.cpp [LoopInfo] empty() -> isInnermost(), add isOutermost() 2020-09-22 23:28:51 +03:00
IfConversion.cpp [NFC] Clean up uses of MachineModuleInfoWrapperPass 2020-07-01 09:45:05 -07:00
ImplicitNullChecks.cpp Remove unused variables 2020-10-07 18:30:12 -07:00
IndirectBrExpandPass.cpp
InlineSpiller.cpp [NFC][MC] MCRegister API typing. 2020-10-08 15:08:34 -07:00
InterferenceCache.cpp [NFC][regalloc] Use MCRegister instead of unsigned in InterferenceCache 2020-10-07 14:48:43 -07:00
InterferenceCache.h [NFC][regalloc] Use MCRegister instead of unsigned in InterferenceCache 2020-10-07 14:48:43 -07:00
InterleavedAccessPass.cpp [SVE] Remove calls to VectorType::getNumElements from CodeGen 2020-07-09 12:43:36 -07:00
InterleavedLoadCombinePass.cpp [SVE] Remove calls to VectorType::getNumElements from CodeGen 2020-07-09 12:43:36 -07:00
IntrinsicLowering.cpp [FPEnv] Intrinsic llvm.roundeven 2020-05-26 19:24:58 +07:00
LLVMBuild.txt lib/CodeGen doesn't depend on lib/Passes. 2020-08-08 13:40:24 +02:00
LLVMTargetMachine.cpp Revert "[NewPM][CodeGen] Introduce CodeGenPassBuilder to help build codegen pipeline" 2020-09-11 18:52:32 -07:00
LatencyPriorityQueue.cpp
LazyMachineBlockFrequencyInfo.cpp
LexicalScopes.cpp [NFC] Fix quadratic LexicalScopes::constructScopeNest 2020-06-08 18:40:56 +01:00
LiveDebugVariables.cpp LiveDebugVariables.cpp - remove unnecessary Compiler.h include. NFCI. 2020-09-17 15:06:02 +01:00
LiveDebugVariables.h [LiveDebugVariables] Delete unneeded doInitialization 2020-09-04 13:27:42 -07:00
LiveInterval.cpp [NFC][Regalloc] accessors for 'reg' and 'weight' 2020-09-16 08:28:57 -07:00
LiveIntervalCalc.cpp [NFC][Regalloc] accessors for 'reg' and 'weight' 2020-09-16 08:28:57 -07:00
LiveIntervalUnion.cpp [NFC][Regalloc] accessors for 'reg' and 'weight' 2020-09-16 08:28:57 -07:00
LiveIntervals.cpp [NFC][MC] MCRegister API typing. 2020-10-08 15:08:34 -07:00
LivePhysRegs.cpp [ARM][LowOverheadLoops] Update liveness info 2020-01-16 15:44:25 +00:00
LiveRangeCalc.cpp Split LiveRangeCalc in LiveRangeCalc/LiveIntervalCalc. NFC 2020-04-10 11:26:21 -07:00
LiveRangeEdit.cpp [NFC][Regalloc] Pass VirtRegMap by reference. 2020-10-12 08:32:30 -07:00
LiveRangeShrink.cpp [DebugInfo] Update MachineInstr to help support variadic DBG_VALUE instructions 2020-06-22 16:01:12 +01:00
LiveRangeUtils.h
LiveRegMatrix.cpp [NFC][MC] Use MCRegister in LiveRangeMatrix 2020-10-12 08:54:36 -07:00
LiveRegUnits.cpp LiveRegUnits.h - reduce MachineRegisterInfo.h include. NFC. 2020-09-08 17:27:00 +01:00
LiveStacks.cpp
LiveVariables.cpp [LiveVariables] Replace std::vector with SmallVector. 2020-07-16 11:39:54 -07:00
LocalStackSlotAllocation.cpp LocalStackSlotAllocation: Swap order of check 2020-09-16 12:56:40 -04:00
LoopTraversal.cpp
LowLevelType.cpp [GISel] Add new combines for unary FP instrs with constant operand 2020-09-16 10:34:15 -07:00
LowerEmuTLS.cpp LowerEmuTLS.cpp - remove unused TargetLowering.h include. NFC. 2020-09-03 14:40:09 +01:00
MBFIWrapper.cpp [MBFIWrapper] Add a new function getBlockProfileCount 2020-09-23 09:31:45 -07:00
MIRCanonicalizerPass.cpp [NFC] Fix some spelling mistakes to test pushing to GH. 2020-02-04 11:07:31 +00:00
MIRNamerPass.cpp
MIRPrinter.cpp MachineBasicBlock: add printName method 2020-07-24 18:18:09 +02:00
MIRPrintingPass.cpp
MIRVRegNamerUtils.cpp [MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo) 2020-09-03 16:13:09 -04:00
MIRVRegNamerUtils.h MIRVRegNamerUtils.h - remove unnecessary includes. NFC. 2020-04-20 15:59:39 +01:00
MachineBasicBlock.cpp [MCRegister] Simplify isStackSlot & isPhysicalRegister and delete isPhysical. NFC 2020-10-08 22:08:33 -07:00
MachineBlockFrequencyInfo.cpp [llvm][NFC] refactor setBlockFrequency for clarity. 2020-07-28 13:04:11 -07:00
MachineBlockPlacement.cpp [MBFIWrapper] Add a new function getBlockProfileCount 2020-09-23 09:31:45 -07:00
MachineBranchProbabilityInfo.cpp
MachineCSE.cpp MachineCSE.cpp - use auto const& iterators in for-range loops to avoid copies. NFCI. 2020-09-26 14:31:57 +01:00
MachineCombiner.cpp [PowerPC] fma chain break to expose more ILP 2020-06-15 00:00:04 -04:00
MachineCopyPropagation.cpp [MachineCopyPropagation] In isNopCopy, check the destination registers match in addition to the source registers. 2020-09-01 12:44:32 -07:00
MachineDebugify.cpp [MachineDebugify] Insert synthetic DBG_VALUE instructions 2020-04-22 17:03:39 -07:00
MachineDominanceFrontier.cpp
MachineDominators.cpp
MachineFrameInfo.cpp Revert accidentally landed patch citing o build errors 2020-06-28 11:52:33 +00:00
MachineFunction.cpp Fix some clang-tidy bugprone-argument-comment issues 2020-09-19 20:41:25 -07:00
MachineFunctionPass.cpp
MachineFunctionPrinterPass.cpp
MachineFunctionSplitter.cpp [llvm][CodeGen] Machine Function Splitter 2020-08-28 11:10:14 -07:00
MachineInstr.cpp [MachineInstr] exclude call instruction in mayAlias 2020-10-07 00:12:21 -04:00
MachineInstrBundle.cpp CodeGen: Use Register in MachineInstrBuilder 2020-04-08 17:03:53 -04:00
MachineLICM.cpp Disable hoisting MI to hotter basic blocks when using pgo 2020-09-17 14:17:00 -05:00
MachineLoopInfo.cpp Revert "Include static prof data when collecting loop BBs" 2020-03-24 09:41:16 -07:00
MachineLoopUtils.cpp [CodeGen] Fix a simple FIXME. NFC. 2020-04-09 10:54:03 +01:00
MachineModuleInfo.cpp Fix the move constructor of MMI to move MachineFunctions map 2020-07-27 14:10:05 -07:00
MachineModuleInfoImpls.cpp
MachineOperand.cpp [MCRegister] Simplify isStackSlot & isPhysicalRegister and delete isPhysical. NFC 2020-10-08 22:08:33 -07:00
MachineOptimizationRemarkEmitter.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
MachineOutliner.cpp LiveRegUnits.h - reduce MachineRegisterInfo.h include. NFC. 2020-09-08 17:27:00 +01:00
MachinePassManager.cpp [NewPM][PassInstrumentation] Add PreservedAnalyses parameter to AfterPass* callbacks 2020-08-21 16:10:42 +07:00
MachinePipeliner.cpp [MachinePipeliner] Fix II_setByPragma initialization 2020-09-09 13:38:35 +00:00
MachinePostDominators.cpp
MachineRegionInfo.cpp
MachineRegisterInfo.cpp [DebugInfo] Update MachineInstr to help support variadic DBG_VALUE instructions 2020-06-22 16:01:12 +01:00
MachineSSAUpdater.cpp MachineSSAUpdater: Allow initialization with just a register class 2020-08-21 23:04:35 +02:00
MachineScheduler.cpp [CodeGen][MachineSched] Fixup function name typo. NFC 2020-10-05 12:43:50 -07:00
MachineSink.cpp [Machinesink] add one more profitable loop related pattern 2020-09-26 21:02:21 -04:00
MachineSizeOpts.cpp Revert rG5dd566b7c7b78bd- "PassManager.h - remove unnecessary Function.h/Module.h includes. NFCI." 2020-07-24 13:02:33 +01:00
MachineStableHash.cpp MachineStableHash.h - remove MachineInstr.h include. NFC. 2020-09-07 13:33:48 +01:00
MachineStripDebug.cpp Don't accidentally create MachineFunctions in mir-debugify/mir-strip-debugify 2020-04-17 14:28:41 -07:00
MachineTraceMetrics.cpp
MachineVerifier.cpp [GlobalISel] Add G_VECREDUCE_* opcodes for vector reductions. 2020-10-08 10:33:19 -07:00
MacroFusion.cpp Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit" 2020-09-21 13:33:05 +02:00
ModuloSchedule.cpp ModuloSchedule.cpp - remove unnecessary includes. NFCI. 2020-09-17 16:47:48 +01:00
NonRelocatableStringpool.cpp [Dsymutil][Debuginfo][NFC] Reland: Refactor dsymutil to separate DWARF optimizing part. #2. 2020-01-08 14:15:31 +03:00
OptimizePHIs.cpp
PHIElimination.cpp [PHIElimination] Fix the killed flag for LowerPHINode() 2020-07-30 08:18:50 +00:00
PHIEliminationUtils.cpp PR47468: Fix findPHICopyInsertPoint, so that copies aren't incorrectly inserted after an INLINEASM_BR. 2020-09-18 14:14:04 -04:00
PHIEliminationUtils.h
ParallelCG.cpp [Support] On Windows, ensure hardware_concurrency() extends to all CPU sockets and all NUMA groups 2020-02-14 10:24:22 -05:00
PatchableFunction.cpp [PatchableFunction] Use an empty DebugLoc 2020-02-01 14:12:06 -08:00
PeepholeOptimizer.cpp Improve 723fea2307 - Silence 'warning: unused variable' when compiling with Clang 10.0 2020-09-24 09:07:22 -04:00
PostRAHazardRecognizer.cpp
PostRASchedulerList.cpp Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit" 2020-09-21 13:33:05 +02:00
PreISelIntrinsicLowering.cpp [IR] Replace all uses of CallBase::getCalledValue() with getCalledOperand(). 2020-04-27 22:17:03 -07:00
ProcessImplicitDefs.cpp
PrologEpilogInserter.cpp [DebugInfo] Update MachineInstr to help support variadic DBG_VALUE instructions 2020-06-22 16:01:12 +01:00
PseudoSourceValue.cpp Revert rG5c4b4a62256876 "PseudoSourceValue.h - reduce GlobalValue.h include to forward declaration. NFC." 2020-04-29 16:12:19 +01:00
RDFGraph.cpp [RDF] Really remove remaining uses of PhysicalRegisterInfo::normalize 2020-08-04 18:23:38 -05:00
RDFLiveness.cpp Use properlyDominates in RDFLiveness when sorting on dominance. 2020-08-26 15:16:40 -07:00
RDFRegisters.cpp [RDF] Add operator<<(raw_ostream&, RegisterAggr), NFC 2020-08-04 18:40:07 -05:00
README.txt
ReachingDefAnalysis.cpp [ARM] Attempt to make Tail predication / RDA more resilient to empty blocks 2020-10-10 14:50:25 +01:00
RegAllocBase.cpp [NFC][MC] Use MCRegister in LiveRangeMatrix 2020-10-12 08:54:36 -07:00
RegAllocBase.h [NFC][MC] Use MCRegister in LiveRangeMatrix 2020-10-12 08:54:36 -07:00
RegAllocBasic.cpp [NFC][MC] Use MCRegister in LiveRangeMatrix 2020-10-12 08:54:36 -07:00
RegAllocFast.cpp RegAllocFast: Add extra DBG_VALUE for live out spills 2020-09-30 10:35:25 -04:00
RegAllocGreedy.cpp [NFC][MC] Use MCRegister in LiveRangeMatrix 2020-10-12 08:54:36 -07:00
RegAllocPBQP.cpp [NFC][Regalloc] Pass VirtRegMap by reference. 2020-10-12 08:32:30 -07:00
RegUsageInfoCollector.cpp
RegUsageInfoPropagate.cpp [Pass] Ensure we don't include PassSupport.h or PassAnalysisSupport.h directly 2020-04-26 12:58:20 +01:00
RegisterClassInfo.cpp RegisterClassInfo::computePSetLimit - assert that we actually find a register. 2020-01-15 12:18:12 +00:00
RegisterCoalescer.cpp [NFC][MC] MCRegister API typing. 2020-10-08 15:08:34 -07:00
RegisterCoalescer.h [NFC][MC] MCRegister API typing. 2020-10-08 15:08:34 -07:00
RegisterPressure.cpp [MachineBasicBlock] Add helpers for skipping debug instructions [1/14] 2020-04-22 17:03:39 -07:00
RegisterScavenging.cpp [RegisterScavenging] Delete dead function unprocess(). 2020-08-27 13:19:32 -07:00
RegisterUsageInfo.cpp
RenameIndependentSubregs.cpp [NFC][Regalloc] accessors for 'reg' and 'weight' 2020-09-16 08:28:57 -07:00
ResetMachineFunctionPass.cpp
SafeStack.cpp [StackSafety] Add "Must Live" logic 2020-06-18 16:53:37 -07:00
SafeStackLayout.cpp SafeStackLayout.cpp - remove unnecessary StackLifetime.h include. NFCI. 2020-09-17 14:56:46 +01:00
SafeStackLayout.h [SafeStack,NFC] Fix names after files move 2020-06-17 01:08:40 -07:00
ScalarizeMaskedMemIntrin.cpp [llvm][CodeGen] Do not scalarize `llvm.masked.[gather|scatter]` operating on scalable vectors. 2020-09-16 16:00:28 +00:00
ScheduleDAG.cpp Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit" 2020-09-21 13:33:05 +02:00
ScheduleDAGInstrs.cpp [SchedDAGInstrs] Delete redundant contains(). NFC 2020-10-11 20:58:30 -07:00
ScheduleDAGPrinter.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
ScoreboardHazardRecognizer.cpp [MC] Widen the functional unit type from 32 to 64 bits. 2020-02-24 09:37:00 +01:00
ShadowStackGCLowering.cpp
ShrinkWrap.cpp Change the INLINEASM_BR MachineInstr to be a non-terminating instruction. 2020-07-01 12:51:50 -04:00
SjLjEHPrepare.cpp StoreInst should store Align, not MaybeAlign 2020-05-15 12:26:58 -07:00
SlotIndexes.cpp [LiveIntervals] Replace handleMoveIntoBundle 2020-04-16 19:58:19 +09:00
SpillPlacement.cpp SpillPlacement.cpp - remove unnecessary includes. NFCI. 2020-09-15 12:18:24 +01:00
SpillPlacement.h
SplitKit.cpp [SplitKit] Cope with no live subranges in defFromParent 2020-09-30 10:16:25 +01:00
SplitKit.h [SplitKit] In addDeadDef tolerate parent range that defines more lanes 2020-09-25 11:31:56 +01:00
StackColoring.cpp [NFC] Remove unused GetUnderlyingObject paramenter 2020-07-31 02:10:03 -07:00
StackMapLivenessAnalysis.cpp
StackMaps.cpp Silence -Wunused-variable in NDEBUG mode 2020-10-06 16:02:17 +02:00
StackProtector.cpp [StackProtector] Fix crash with vararg due to not checking LocationSize validity. 2020-09-03 00:08:48 -07:00
StackSlotColoring.cpp [NFC][Regalloc] accessors for 'reg' and 'weight' 2020-09-16 08:28:57 -07:00
SwiftErrorValueTracking.cpp [CallSite removal][CodeGen] Use CallBase instead of ImmutableCallSite in SwiftErrorValueTracking. NFC 2020-04-13 00:19:27 -07:00
SwitchLoweringUtils.cpp SwitchLoweringUtils.h - reduce TargetLowering.h include. NFCI. 2020-09-10 17:42:18 +01:00
TailDuplication.cpp [PGO][PGSO] Handle MBFIWrapper 2020-01-31 09:36:55 -08:00
TailDuplicator.cpp [CodeGen][TailDuplicator] Don't duplicate blocks with INLINEASM_BR 2020-10-06 18:44:59 -07:00
TargetFrameLoweringImpl.cpp TargetFrameLowering.h - remove unnecessary includes. NFC. 2020-06-03 11:12:42 +01:00
TargetInstrInfo.cpp [Statepoint] Turn assert into check in foldPatchpoint. 2020-08-28 20:00:23 +07:00
TargetLoweringBase.cpp [X86][SelectionDAG] Add SADDO_CARRY and SSUBO_CARRY to support multipart signed add/sub overflow legalization. 2020-10-12 23:18:29 -07:00
TargetLoweringObjectFileImpl.cpp [XCOFF] Enable -fdata-sections on AIX 2020-10-02 00:16:24 +00:00
TargetOptionsImpl.cpp [DWARF] Avoid entry_values production for SCE 2020-07-24 13:34:05 +02:00
TargetPassConfig.cpp TargetPassConfig.cpp - use auto const& iterator in for-range loop to avoid copies. NFCI. 2020-09-21 17:17:11 +01:00
TargetRegisterInfo.cpp [NFC][Regalloc] accessors for 'reg' and 'weight' 2020-09-16 08:28:57 -07:00
TargetSchedule.cpp
TargetSubtargetInfo.cpp [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
TwoAddressInstructionPass.cpp [TwoAddressInstruction][PowerPC] Call `regOverlapsSet` to find out real clobbers and uses 2020-10-09 02:34:54 +00:00
TypePromotion.cpp [SVE][CodeGen] Fix implicit TypeSize->uint64_t casts in TypePromotion 2020-10-02 08:12:11 +01:00
UnreachableBlockElim.cpp [NFC] Clean up uses of MachineModuleInfoWrapperPass 2020-07-01 09:45:05 -07:00
ValueTypes.cpp [VE] Add new MVT types for NEC SX Aurora VE vector 2020-10-09 12:07:41 +09:00
VirtRegMap.cpp [NFC][MC] MCRegister API typing. 2020-10-08 15:08:34 -07:00
WasmEHPrepare.cpp [IR] Replace all uses of CallBase::getCalledValue() with getCalledOperand(). 2020-04-27 22:17:03 -07:00
WinEHPrepare.cpp Revert rG5dd566b7c7b78bd- "PassManager.h - remove unnecessary Function.h/Module.h includes. NFCI." 2020-07-24 13:02:33 +01:00
XRayInstrumentation.cpp [Attributes] Add a method to check if an Attribute has AttrKind None. Use instead of hasAttribute(Attribute::None) 2020-08-28 13:23:45 -07:00

README.txt

//===---------------------------------------------------------------------===//

Common register allocation / spilling problem:

        mul lr, r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        ldr r4, [sp, #+52]
        mla r4, r3, lr, r4

can be:

        mul lr, r4, lr
        mov r4, lr
        str lr, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

and then "merge" mul and mov:

        mul r4, r4, lr
        str r4, [sp, #+52]
        ldr lr, [r1, #+32]
        sxth r3, r3
        mla r4, r3, lr, r4

It also increase the likelihood the store may become dead.

//===---------------------------------------------------------------------===//

bb27 ...
        ...
        %reg1037 = ADDri %reg1039, 1
        %reg1038 = ADDrs %reg1032, %reg1039, %noreg, 10
    Successors according to CFG: 0x8b03bf0 (#5)

bb76 (0x8b03bf0, LLVM BB @0x8b032d0, ID#5):
    Predecessors according to CFG: 0x8b0c5f0 (#3) 0x8b0a7c0 (#4)
        %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>

Note ADDri is not a two-address instruction. However, its result %reg1037 is an
operand of the PHI node in bb76 and its operand %reg1039 is the result of the
PHI node. We should treat it as a two-address code and make sure the ADDri is
scheduled after any node that reads %reg1039.

//===---------------------------------------------------------------------===//

Use local info (i.e. register scavenger) to assign it a free register to allow
reuse:
        ldr r3, [sp, #+4]
        add r3, r3, #3
        ldr r2, [sp, #+8]
        add r2, r2, #2
        ldr r1, [sp, #+4]  <==
        add r1, r1, #1
        ldr r0, [sp, #+4]
        add r0, r0, #2

//===---------------------------------------------------------------------===//

LLVM aggressively lift CSE out of loop. Sometimes this can be negative side-
effects:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
load [i + R1]
...
load [i + R2]
...
load [i + R3]

Suppose there is high register pressure, R1, R2, R3, can be spilled. We need
to implement proper re-materialization to handle this:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
R1 = X + 4  @ re-materialized
load [i + R1]
...
R2 = X + 7 @ re-materialized
load [i + R2]
...
R3 = X + 15 @ re-materialized
load [i + R3]

Furthermore, with re-association, we can enable sharing:

R1 = X + 4
R2 = X + 7
R3 = X + 15

loop:
T = i + X
load [T + 4]
...
load [T + 7]
...
load [T + 15]
//===---------------------------------------------------------------------===//

It's not always a good idea to choose rematerialization over spilling. If all
the load / store instructions would be folded then spilling is cheaper because
it won't require new live intervals / registers. See 2003-05-31-LongShifts for
an example.

//===---------------------------------------------------------------------===//

With a copying garbage collector, derived pointers must not be retained across
collector safe points; the collector could move the objects and invalidate the
derived pointer. This is bad enough in the first place, but safe points can
crop up unpredictably. Consider:

        %array = load { i32, [0 x %obj] }** %array_addr
        %nth_el = getelementptr { i32, [0 x %obj] }* %array, i32 0, i32 %n
        %old = load %obj** %nth_el
        %z = div i64 %x, %y
        store %obj* %new, %obj** %nth_el

If the i64 division is lowered to a libcall, then a safe point will (must)
appear for the call site. If a collection occurs, %array and %nth_el no longer
point into the correct object.

The fix for this is to copy address calculations so that dependent pointers
are never live across safe point boundaries. But the loads cannot be copied
like this if there was an intervening store, so may be hard to get right.

Only a concurrent mutator can trigger a collection at the libcall safe point.
So single-threaded programs do not have this requirement, even with a copying
collector. Still, LLVM optimizations would probably undo a front-end's careful
work.

//===---------------------------------------------------------------------===//

The ocaml frametable structure supports liveness information. It would be good
to support it.

//===---------------------------------------------------------------------===//

The FIXME in ComputeCommonTailLength in BranchFolding.cpp needs to be
revisited. The check is there to work around a misuse of directives in inline
assembly.

//===---------------------------------------------------------------------===//

It would be good to detect collector/target compatibility instead of silently
doing the wrong thing.

//===---------------------------------------------------------------------===//

It would be really nice to be able to write patterns in .td files for copies,
which would eliminate a bunch of explicit predicates on them (e.g. no side
effects).  Once this is in place, it would be even better to have tblgen
synthesize the various copy insertion/inspection methods in TargetInstrInfo.

//===---------------------------------------------------------------------===//

Stack coloring improvements:

1. Do proper LiveStacks analysis on all stack objects including those which are
   not spill slots.
2. Reorder objects to fill in gaps between objects.
   e.g. 4, 1, <gap>, 4, 1, 1, 1, <gap>, 4 => 4, 1, 1, 1, 1, 4, 4

//===---------------------------------------------------------------------===//

The scheduler should be able to sort nearby instructions by their address. For
example, in an expanded memset sequence it's not uncommon to see code like this:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

Each of the stores is independent, and the scheduler is currently making an
arbitrary decision about the order.

//===---------------------------------------------------------------------===//

Another opportunitiy in this code is that the $0 could be moved to a register:

  movl $0, 4(%rdi)
  movl $0, 8(%rdi)
  movl $0, 12(%rdi)
  movl $0, 0(%rdi)

This would save substantial code size, especially for longer sequences like
this. It would be easy to have a rule telling isel to avoid matching MOV32mi
if the immediate has more than some fixed number of uses. It's more involved
to teach the register allocator how to do late folding to recover from
excessive register pressure.