llvm-project/llvm/test/CodeGen
Roman Lebedev 24159592ca [NFC][X86] Add BEXTR test with load and 33-bit mask (PR43381 / D67875)
llvm-svn: 372524
2019-09-22 19:36:38 +00:00
..
AArch64 [AArch64][GlobalISel] Implement selection for G_SHL of <2 x i64> 2019-09-21 09:21:16 +00:00
AMDGPU AMDGPU/GlobalISel: Allow selection of scalar min/max 2019-09-21 02:37:33 +00:00
ARC
ARM Remove the obsolete BlockByRefStruct flag from LLVM IR 2019-09-18 22:38:56 +00:00
AVR
BPF [BPF] Permit all user instructed offset relocatiions 2019-09-18 03:49:07 +00:00
Generic Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."" 2019-09-10 10:39:09 +00:00
Hexagon [MachinePipeliner] Improve the TargetInstrInfo API analyzeLoop/reduceLoopCount 2019-09-21 08:19:41 +00:00
Inputs
Lanai [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
MIR Add a missing space in a MIR parser error message 2019-09-20 14:41:41 +00:00
MSP430
Mips [MIPS] For vectors, select `add %x, C` as `sub %x, -C` if it results in inline immediate 2019-09-18 19:34:41 +00:00
NVPTX
PowerPC [NFC][PowerPC] Consolidate testing of common linkage symbols 2019-09-20 20:31:37 +00:00
RISCV [RISCV] Switch to the Machine Scheduler 2019-09-17 11:15:35 +00:00
SPARC [test] Fix tests when run on windows after SVN r369426. NFC. 2019-08-20 20:58:02 +00:00
SystemZ [SystemZ] Support z15 processor name 2019-09-20 23:04:45 +00:00
Thumb [Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing 2019-09-11 11:16:48 +00:00
Thumb2 [ARM] Fix CTTZ not generating correct instructions MVE 2019-09-20 15:03:44 +00:00
WebAssembly [WebAssembly] Restore defaults for stores per memop 2019-09-18 23:18:16 +00:00
WinCFGuard
WinEH [Windows] Replace TrapUnreachable with an int3 insertion pass 2019-09-09 23:04:25 +00:00
X86 [NFC][X86] Add BEXTR test with load and 33-bit mask (PR43381 / D67875) 2019-09-22 19:36:38 +00:00
XCore