llvm-project/llvm/test/MC/Mips/mips32r2
Vasileios Kalintiris 238692beb9 [mips] Add support for COP1's Branch-On-Cond-Likely instructions
Summary: Depends on D5782

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5802

llvm-svn: 220042
2014-10-17 14:08:28 +00:00
..
abiflags.s Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags 2014-07-14 15:05:51 +00:00
invalid-mips64r2.s [mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2 2014-05-12 12:15:41 +00:00
invalid.s [mips] Implement jr.hb and jalr.hb (Jump Register and Jump and Link Register with Hazard Barrier). 2014-06-11 15:05:56 +00:00
valid-xfail.s Revert: r215698 - Current implementation of c.cond.fmt instructions only accept default cc0 register... 2014-08-17 19:47:47 +00:00
valid.s [mips] Add support for COP1's Branch-On-Cond-Likely instructions 2014-10-17 14:08:28 +00:00