Scott Linder 0e9368cc8c [AMDGPU] Move frame pointer from s34 to s33 ... Remove the gap left between the stack pointer (s32) and frame pointer (s34) now that the scratch wave offset is no longer a part of the calling convention ABI. Update llvm/docs/AMDGPUUsage.rst to reflect the change. Tags: #llvm Differential Revision: https://reviews.llvm.org/D75657		2020-03-19 15:35:16 -04:00
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expected-target-index-name.mir	[AMDGPU] Extend buffer intrinsics with swizzling	2019-10-02 17:22:36 +00:00
intrinsics.mir	…
invalid-target-index-operand.mir	[AMDGPU] Extend buffer intrinsics with swizzling	2019-10-02 17:22:36 +00:00
lit.local.cfg	…
llc-target-cpu-attr-from-cmdline-ir.mir	llc: Change behavior of -mcpu with existing attribute	2020-01-07 10:10:25 -05:00
llc-target-cpu-attr-from-cmdline.mir	llc/MIR: Fix setFunctionAttributes for MIR functions	2020-01-06 17:21:51 -05:00
load-store-opt-dlc.mir	[AMDGPU] Extend buffer intrinsics with swizzling	2019-10-02 17:22:36 +00:00
machine-function-info-no-ir.mir	[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions	2020-03-19 15:35:16 -04:00
machine-function-info-register-parse-error1.mir	…
machine-function-info-register-parse-error2.mir	…
machine-function-info.ll	[AMDGPU] Move frame pointer from s34 to s33	2020-03-19 15:35:16 -04:00
mfi-frame-offset-reg-class.mir	…
mfi-parse-error-frame-offset-reg.mir	…
mfi-parse-error-scratch-rsrc-reg.mir	…
mfi-parse-error-stack-ptr-offset-reg.mir	…
mfi-scratch-rsrc-reg-reg-class.mir	…
mfi-stack-ptr-offset-reg-class.mir	…
mir-canon-multi.mir	[MIRNamer]: Make the check lines in the test robust with regex.	2019-11-16 22:58:45 -08:00
mircanon-memoperands.mir	[llvm][MIRVRegNamerUtils] Adding hashing on memoperands.	2019-12-11 22:11:49 -05:00
parse-order-reserved-regs.mir	[AMDGPU] Add Scratch Wave Offset to Scratch Buffer Descriptor in entry functions	2020-03-19 15:35:16 -04:00
stack-id.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
syncscopes.mir	[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing	2019-09-11 11:16:48 +00:00
target-flags.mir	AMDGPU: Prepare for explicit absolute relocations in code generation	2019-06-16 17:43:37 +00:00
target-index-operands.mir	[AMDGPU] Extend buffer intrinsics with swizzling	2019-10-02 17:22:36 +00:00