.. |
AArch64
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[GlobalISel] Rewrite CallLowering::lowerReturn to accept multiple VRegs per Value
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2018-08-02 08:33:31 +00:00 |
AMDGPU
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DAG: Fix vector widening fcanonicalize
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2018-08-02 13:43:53 +00:00 |
ARC
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…
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ARM
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[GlobalISel] Rewrite CallLowering::lowerReturn to accept multiple VRegs per Value
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2018-08-02 08:33:31 +00:00 |
AVR
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[AVR] Set trackLivenessAfterRegAlloc
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2018-06-11 14:46:48 +00:00 |
BPF
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bpf: add missing RegState to notify MachineInstr verifier necessary register usage
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2018-07-27 16:58:52 +00:00 |
Generic
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Implement strip.invariant.group
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2018-07-02 04:49:30 +00:00 |
Hexagon
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[Hexagon] Simplify A4_rcmp[n]eqi R, 0
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2018-07-30 14:28:02 +00:00 |
Inputs
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…
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Lanai
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…
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MIR
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[DebugInfo][X86] Add start-after flags to MIR tests
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2018-07-12 14:36:48 +00:00 |
MSP430
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…
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Mips
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[MIPS GlobalISel] Select global address
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2018-08-01 09:03:23 +00:00 |
NVPTX
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finish: [FileCheck] Add -allow-deprecated-dag-overlap to failing llvm tests
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2018-07-11 20:31:51 +00:00 |
Nios2
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…
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PowerPC
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[PowerPC] Do not round values prior to converting to integer
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2018-08-02 00:03:22 +00:00 |
RISCV
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[RISCV] Fixed test case failure due to r338047
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2018-07-31 00:36:28 +00:00 |
SPARC
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Regenerate remainder test.
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2018-07-20 13:14:29 +00:00 |
SystemZ
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[SystemZ, TableGen] Fix shift count handling
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2018-08-01 11:57:58 +00:00 |
Thumb
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[ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1.
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2018-07-25 18:22:22 +00:00 |
Thumb2
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[ARM] Treat cmn immediates as legal in isLegalICmpImmediate.
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2018-07-10 23:44:37 +00:00 |
WebAssembly
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[WebAssembly] Support for a ternary atomic RMW instruction
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2018-08-01 19:40:28 +00:00 |
WinCFGuard
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…
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WinEH
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…
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X86
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[X86][SSE] Add more UDIV nonuniform-constant vector tests
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2018-08-02 10:53:53 +00:00 |
XCore
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[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
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2018-07-15 16:27:07 +00:00 |