forked from OSchip/llvm-project
65 lines
1.7 KiB
LLVM
65 lines
1.7 KiB
LLVM
; Test 64-bit atomic XORs, z196 version.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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; Check XOR of a variable.
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define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK-LABEL: f1:
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; CHECK: laxg %r2, %r4, 0(%r3)
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 %b seq_cst
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ret i64 %res
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}
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; Check XOR of 1, which needs a temporary.
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define i64 @f2(i64 %dummy, i64 *%src) {
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; CHECK-LABEL: f2:
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; CHECK: lghi [[TMP:%r[0-5]]], 1
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; CHECK: laxg %r2, [[TMP]], 0(%r3)
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 1 seq_cst
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ret i64 %res
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}
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; Check the high end of the LAXG range.
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define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK-LABEL: f3:
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; CHECK: laxg %r2, %r4, 524280(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 65535
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%res = atomicrmw xor i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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; Check the next doubleword up, which needs separate address logic.
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define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK-LABEL: f4:
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; CHECK: agfi %r3, 524288
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; CHECK: laxg %r2, %r4, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 65536
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%res = atomicrmw xor i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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; Check the low end of the LAXG range.
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define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK-LABEL: f5:
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; CHECK: laxg %r2, %r4, -524288(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 -65536
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%res = atomicrmw xor i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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; Check the next doubleword down, which needs separate address logic.
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define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK-LABEL: f6:
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; CHECK: agfi %r3, -524296
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; CHECK: laxg %r2, %r4, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 -65537
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%res = atomicrmw xor i64 *%ptr, i64 %b seq_cst
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ret i64 %res
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}
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