forked from OSchip/llvm-project
144 lines
3.6 KiB
C++
144 lines
3.6 KiB
C++
//===-- ARMAsmLexer.cpp - Tokenize ARM assembly to AsmTokens --------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/ARMBaseInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCParser/MCAsmLexer.h"
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#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCTargetAsmLexer.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/ADT/OwningPtr.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringSwitch.h"
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#include <string>
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#include <map>
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using namespace llvm;
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namespace {
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class ARMBaseAsmLexer : public MCTargetAsmLexer {
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const MCAsmInfo &AsmInfo;
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const AsmToken &lexDefinite() {
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return getLexer()->Lex();
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}
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AsmToken LexTokenUAL();
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protected:
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typedef std::map <std::string, unsigned> rmap_ty;
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rmap_ty RegisterMap;
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void InitRegisterMap(const MCRegisterInfo *info) {
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unsigned numRegs = info->getNumRegs();
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for (unsigned i = 0; i < numRegs; ++i) {
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const char *regName = info->getName(i);
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if (regName)
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RegisterMap[regName] = i;
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}
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}
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unsigned MatchRegisterName(StringRef Name) {
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rmap_ty::iterator iter = RegisterMap.find(Name.str());
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if (iter != RegisterMap.end())
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return iter->second;
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else
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return 0;
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}
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AsmToken LexToken() {
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if (!Lexer) {
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SetError(SMLoc(), "No MCAsmLexer installed");
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return AsmToken(AsmToken::Error, "", 0);
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}
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switch (AsmInfo.getAssemblerDialect()) {
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default:
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SetError(SMLoc(), "Unhandled dialect");
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return AsmToken(AsmToken::Error, "", 0);
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case 0:
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return LexTokenUAL();
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}
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}
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public:
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ARMBaseAsmLexer(const Target &T, const MCAsmInfo &MAI)
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: MCTargetAsmLexer(T), AsmInfo(MAI) {
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}
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};
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class ARMAsmLexer : public ARMBaseAsmLexer {
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public:
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ARMAsmLexer(const Target &T, const MCRegisterInfo &MRI, const MCAsmInfo &MAI)
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: ARMBaseAsmLexer(T, MAI) {
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InitRegisterMap(&MRI);
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}
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};
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class ThumbAsmLexer : public ARMBaseAsmLexer {
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public:
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ThumbAsmLexer(const Target &T, const MCRegisterInfo &MRI,const MCAsmInfo &MAI)
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: ARMBaseAsmLexer(T, MAI) {
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InitRegisterMap(&MRI);
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}
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};
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} // end anonymous namespace
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AsmToken ARMBaseAsmLexer::LexTokenUAL() {
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const AsmToken &lexedToken = lexDefinite();
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switch (lexedToken.getKind()) {
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default: break;
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case AsmToken::Error:
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SetError(Lexer->getErrLoc(), Lexer->getErr());
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break;
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case AsmToken::Identifier: {
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std::string upperCase = lexedToken.getString().str();
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std::string lowerCase = LowercaseString(upperCase);
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StringRef lowerRef(lowerCase);
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unsigned regID = MatchRegisterName(lowerRef);
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// Check for register aliases.
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// r13 -> sp
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// r14 -> lr
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// r15 -> pc
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// ip -> r12
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// FIXME: Some assemblers support lots of others. Do we want them all?
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if (!regID) {
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regID = StringSwitch<unsigned>(lowerCase)
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.Case("r13", ARM::SP)
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.Case("r14", ARM::LR)
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.Case("r15", ARM::PC)
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.Case("ip", ARM::R12)
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.Default(0);
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}
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if (regID)
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return AsmToken(AsmToken::Register,
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lexedToken.getString(),
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static_cast<int64_t>(regID));
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}
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}
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return AsmToken(lexedToken);
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}
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extern "C" void LLVMInitializeARMAsmLexer() {
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RegisterMCAsmLexer<ARMAsmLexer> X(TheARMTarget);
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RegisterMCAsmLexer<ThumbAsmLexer> Y(TheThumbTarget);
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}
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