forked from OSchip/llvm-project
59 lines
2.8 KiB
Plaintext
59 lines
2.8 KiB
Plaintext
// REQUIRES: x86-registered-target
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// REQUIRES: nvptx-registered-target
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// RUN: %clang_cc1 -std=c++11 -fcuda-is-device -triple nvptx64-nvidia-cuda -emit-llvm -o - %s | FileCheck --check-prefix=DEVICE %s
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// RUN: echo "GPU binary would be here" > %t
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// RUN: %clang_cc1 -std=c++11 -triple x86_64-unknown-linux-gnu -target-sdk-version=8.0 -fcuda-include-gpubinary %t -emit-llvm -o - %s | FileCheck --check-prefix=HOST %s
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// Accessing nvvm intrinsics in this way no longer works.
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// XFAIL: *
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struct textureReference {
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int desc;
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};
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enum ReadMode {
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ElementType = 0,
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NormalizedFloat = 1
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};
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template <typename T, int dim = 1, enum ReadMode mode = ElementType>
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struct __attribute__((device_builtin_texture_type)) texture : public textureReference {
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};
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// On the device side, texture references are represented as `i64` handles.
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// DEVICE: @tex ={{.*}} addrspace(1) externally_initialized global i64 undef, align 4
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// DEVICE: @norm ={{.*}} addrspace(1) externally_initialized global i64 undef, align 4
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// On the host side, they remain in the original type.
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// HOST: @tex = internal global %struct.texture
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// HOST: @norm = internal global %struct.texture
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// HOST: @0 = private unnamed_addr constant [4 x i8] c"tex\00"
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// HOST: @1 = private unnamed_addr constant [5 x i8] c"norm\00"
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texture<float, 2, ElementType> tex;
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texture<float, 2, NormalizedFloat> norm;
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struct v4f {
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float x, y, z, w;
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};
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__attribute__((device)) v4f tex2d_ld(texture<float, 2, ElementType>, float, float) asm("llvm.nvvm.tex.unified.2d.v4f32.f32");
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__attribute__((device)) v4f tex2d_ld(texture<float, 2, NormalizedFloat>, int, int) asm("llvm.nvvm.tex.unified.2d.v4f32.s32");
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// DEVICE-LABEL: float @_Z3fooff(float noundef %x, float noundef %y)
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// DEVICE: call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @tex)
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// DEVICE: call %struct.v4f @llvm.nvvm.tex.unified.2d.v4f32.f32(i64 %{{.*}}, float noundef %{{.*}}, float noundef %{{.*}})
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// DEVICE: call i64 @llvm.nvvm.texsurf.handle.internal.p1i64(i64 addrspace(1)* @norm)
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// DEVICE: call %struct.v4f @llvm.nvvm.tex.unified.2d.v4f32.s32(i64 %{{.*}}, i32 noundef %{{.*}}, i32 noundef %{{.*}})
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__attribute__((device)) float foo(float x, float y) {
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return tex2d_ld(tex, x, y).x + tex2d_ld(norm, int(x), int(y)).x;
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}
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// HOST: define internal void @[[PREFIX:__cuda]]_register_globals
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// Texture references need registering with correct arguments.
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// HOST: call void @[[PREFIX]]RegisterTexture(i8** %0, i8*{{.*}}({{.*}}@tex{{.*}}), i8*{{.*}}({{.*}}@0{{.*}}), i8*{{.*}}({{.*}}@0{{.*}}), i32 2, i32 0, i32 0)
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// HOST: call void @[[PREFIX]]RegisterTexture(i8** %0, i8*{{.*}}({{.*}}@norm{{.*}}), i8*{{.*}}({{.*}}@1{{.*}}), i8*{{.*}}({{.*}}@1{{.*}}), i32 2, i32 1, i32 0)
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// They also need annotating in metadata.
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// DEVICE: !0 = !{i64 addrspace(1)* @tex, !"texture", i32 1}
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// DEVICE: !1 = !{i64 addrspace(1)* @norm, !"texture", i32 1}
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