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AArch64
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[AArch64]Merge halfword loads into a 32-bit load
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2015-10-27 19:16:03 +00:00 |
AMDGPU
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AMDGPU/SI: use S_AND for i1 trunc
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2015-10-29 15:05:03 +00:00 |
ARM
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ARM: add support for WatchOS's compact unwind information.
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2015-10-28 22:56:36 +00:00 |
BPF
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[bpf] Do not expand UNDEF SDNode during insn selection lowering
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2015-10-08 18:52:40 +00:00 |
CPP
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Fix CPP Backend for GEP API changes for opaque pointer types
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2015-09-08 18:42:29 +00:00 |
Generic
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[Hexagon] Reverting test file change.
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2015-10-17 01:58:51 +00:00 |
Hexagon
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Tail duplication can mix incompatible registers in phi nodes
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2015-10-21 02:40:06 +00:00 |
Inputs
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DI: Require subprogram definitions to be distinct
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2015-08-28 20:26:49 +00:00 |
MIR
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Create a new interface addSuccessorWithoutWeight(MBB*) in MBB to add successors when optimization is disabled.
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2015-10-27 17:59:36 +00:00 |
MSP430
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…
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Mips
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[mips] wrong opcode for ll/sc instructions on mipsr6 when -integrated-as is used
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2015-10-29 14:40:19 +00:00 |
NVPTX
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[NVPTX] Let NVPTX backend detect integer min and max patterns.
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2015-08-26 23:22:02 +00:00 |
PowerPC
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[PowerPC] Recurse through constants when looking for TLS globals
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2015-10-28 23:43:00 +00:00 |
SPARC
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Drop assert that a call with struct return goes to a function with sret
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2015-10-21 20:05:01 +00:00 |
SystemZ
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[MachineVerifier] Analyze MachineMemOperands for mem-to-mem moves.
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2015-10-29 08:28:35 +00:00 |
Thumb
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[ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM.
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2015-10-05 14:49:54 +00:00 |
Thumb2
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[ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev
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2015-10-23 17:19:19 +00:00 |
WebAssembly
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[WebAssembly] Update opcode name format for conversions
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2015-10-29 04:10:52 +00:00 |
WinEH
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[WinEH] Fix eh.exceptionpointer intrinsic lowering
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2015-10-17 00:08:08 +00:00 |
X86
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[X86][AVX512] Test UNPCK with non-sequential scalars
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2015-10-27 21:18:45 +00:00 |
XCore
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[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
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2015-09-11 03:22:04 +00:00 |